1 /****************************************************************************
2 * Driver for Solarflare Solarstorm network controllers and boards
3 * Copyright 2005-2006 Fen Systems Ltd.
4 * Copyright 2006-2009 Solarflare Communications Inc.
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License version 2 as published
8 * by the Free Software Foundation, incorporated herein by reference.
11 #include <linux/bitops.h>
12 #include <linux/module.h>
13 #include <linux/mtd/mtd.h>
14 #include <linux/delay.h>
15 #include <linux/rtnetlink.h>
17 #define EFX_DRIVER_NAME "sfc_mtd"
18 #include "net_driver.h"
23 #include "mcdi_pcol.h"
25 #define EFX_SPI_VERIFY_BUF_LEN 16
26 #define EFX_MCDI_CHUNK_LEN 128
28 struct efx_mtd_partition
{
38 const char *type_name
;
39 char name
[IFNAMSIZ
+ 20];
43 int (*read
)(struct mtd_info
*mtd
, loff_t start
, size_t len
,
44 size_t *retlen
, u8
*buffer
);
45 int (*erase
)(struct mtd_info
*mtd
, loff_t start
, size_t len
);
46 int (*write
)(struct mtd_info
*mtd
, loff_t start
, size_t len
,
47 size_t *retlen
, const u8
*buffer
);
48 int (*sync
)(struct mtd_info
*mtd
);
52 struct list_head node
;
54 const struct efx_spi_device
*spi
;
56 const struct efx_mtd_ops
*ops
;
58 struct efx_mtd_partition part
[0];
61 #define efx_for_each_partition(part, efx_mtd) \
62 for ((part) = &(efx_mtd)->part[0]; \
63 (part) != &(efx_mtd)->part[(efx_mtd)->n_parts]; \
66 #define to_efx_mtd_partition(mtd) \
67 container_of(mtd, struct efx_mtd_partition, mtd)
69 static int falcon_mtd_probe(struct efx_nic
*efx
);
70 static int siena_mtd_probe(struct efx_nic
*efx
);
74 static int efx_spi_slow_wait(struct efx_mtd
*efx_mtd
, bool uninterruptible
)
76 const struct efx_spi_device
*spi
= efx_mtd
->spi
;
77 struct efx_nic
*efx
= efx_mtd
->efx
;
81 /* Wait up to 4s for flash/EEPROM to finish a slow operation. */
82 for (i
= 0; i
< 40; i
++) {
83 __set_current_state(uninterruptible
?
84 TASK_UNINTERRUPTIBLE
: TASK_INTERRUPTIBLE
);
85 schedule_timeout(HZ
/ 10);
86 rc
= falcon_spi_cmd(efx
, spi
, SPI_RDSR
, -1, NULL
,
87 &status
, sizeof(status
));
90 if (!(status
& SPI_STATUS_NRDY
))
92 if (signal_pending(current
))
95 EFX_ERR(efx
, "timed out waiting for %s\n", efx_mtd
->name
);
100 efx_spi_unlock(struct efx_nic
*efx
, const struct efx_spi_device
*spi
)
102 const u8 unlock_mask
= (SPI_STATUS_BP2
| SPI_STATUS_BP1
|
107 rc
= falcon_spi_cmd(efx
, spi
, SPI_RDSR
, -1, NULL
,
108 &status
, sizeof(status
));
112 if (!(status
& unlock_mask
))
113 return 0; /* already unlocked */
115 rc
= falcon_spi_cmd(efx
, spi
, SPI_WREN
, -1, NULL
, NULL
, 0);
118 rc
= falcon_spi_cmd(efx
, spi
, SPI_SST_EWSR
, -1, NULL
, NULL
, 0);
122 status
&= ~unlock_mask
;
123 rc
= falcon_spi_cmd(efx
, spi
, SPI_WRSR
, -1, &status
,
124 NULL
, sizeof(status
));
127 rc
= falcon_spi_wait_write(efx
, spi
);
134 static int efx_spi_erase(struct efx_mtd
*efx_mtd
, loff_t start
, size_t len
)
136 const struct efx_spi_device
*spi
= efx_mtd
->spi
;
137 struct efx_nic
*efx
= efx_mtd
->efx
;
138 unsigned pos
, block_len
;
139 u8 empty
[EFX_SPI_VERIFY_BUF_LEN
];
140 u8 buffer
[EFX_SPI_VERIFY_BUF_LEN
];
143 if (len
!= spi
->erase_size
)
146 if (spi
->erase_command
== 0)
149 rc
= efx_spi_unlock(efx
, spi
);
152 rc
= falcon_spi_cmd(efx
, spi
, SPI_WREN
, -1, NULL
, NULL
, 0);
155 rc
= falcon_spi_cmd(efx
, spi
, spi
->erase_command
, start
, NULL
,
159 rc
= efx_spi_slow_wait(efx_mtd
, false);
161 /* Verify the entire region has been wiped */
162 memset(empty
, 0xff, sizeof(empty
));
163 for (pos
= 0; pos
< len
; pos
+= block_len
) {
164 block_len
= min(len
- pos
, sizeof(buffer
));
165 rc
= falcon_spi_read(efx
, spi
, start
+ pos
, block_len
,
169 if (memcmp(empty
, buffer
, block_len
))
172 /* Avoid locking up the system */
174 if (signal_pending(current
))
183 static int efx_mtd_erase(struct mtd_info
*mtd
, struct erase_info
*erase
)
185 struct efx_mtd
*efx_mtd
= mtd
->priv
;
188 rc
= efx_mtd
->ops
->erase(mtd
, erase
->addr
, erase
->len
);
190 erase
->state
= MTD_ERASE_DONE
;
192 erase
->state
= MTD_ERASE_FAILED
;
193 erase
->fail_addr
= 0xffffffff;
195 mtd_erase_callback(erase
);
199 static void efx_mtd_sync(struct mtd_info
*mtd
)
201 struct efx_mtd
*efx_mtd
= mtd
->priv
;
202 struct efx_nic
*efx
= efx_mtd
->efx
;
205 rc
= efx_mtd
->ops
->sync(mtd
);
207 EFX_ERR(efx
, "%s sync failed (%d)\n", efx_mtd
->name
, rc
);
210 static void efx_mtd_remove_partition(struct efx_mtd_partition
*part
)
215 rc
= del_mtd_device(&part
->mtd
);
223 static void efx_mtd_remove_device(struct efx_mtd
*efx_mtd
)
225 struct efx_mtd_partition
*part
;
227 efx_for_each_partition(part
, efx_mtd
)
228 efx_mtd_remove_partition(part
);
229 list_del(&efx_mtd
->node
);
233 static void efx_mtd_rename_device(struct efx_mtd
*efx_mtd
)
235 struct efx_mtd_partition
*part
;
237 efx_for_each_partition(part
, efx_mtd
)
238 if (efx_nic_rev(efx_mtd
->efx
) >= EFX_REV_SIENA_A0
)
239 snprintf(part
->name
, sizeof(part
->name
),
240 "%s %s:%02x", efx_mtd
->efx
->name
,
241 part
->type_name
, part
->mcdi
.fw_subtype
);
243 snprintf(part
->name
, sizeof(part
->name
),
244 "%s %s", efx_mtd
->efx
->name
,
248 static int efx_mtd_probe_device(struct efx_nic
*efx
, struct efx_mtd
*efx_mtd
)
250 struct efx_mtd_partition
*part
;
254 efx_mtd_rename_device(efx_mtd
);
256 efx_for_each_partition(part
, efx_mtd
) {
257 part
->mtd
.writesize
= 1;
259 part
->mtd
.owner
= THIS_MODULE
;
260 part
->mtd
.priv
= efx_mtd
;
261 part
->mtd
.name
= part
->name
;
262 part
->mtd
.erase
= efx_mtd_erase
;
263 part
->mtd
.read
= efx_mtd
->ops
->read
;
264 part
->mtd
.write
= efx_mtd
->ops
->write
;
265 part
->mtd
.sync
= efx_mtd_sync
;
267 if (add_mtd_device(&part
->mtd
))
271 list_add(&efx_mtd
->node
, &efx
->mtd_list
);
275 while (part
!= &efx_mtd
->part
[0]) {
277 efx_mtd_remove_partition(part
);
279 /* add_mtd_device() returns 1 if the MTD table is full */
283 void efx_mtd_remove(struct efx_nic
*efx
)
285 struct efx_mtd
*efx_mtd
, *next
;
287 WARN_ON(efx_dev_registered(efx
));
289 list_for_each_entry_safe(efx_mtd
, next
, &efx
->mtd_list
, node
)
290 efx_mtd_remove_device(efx_mtd
);
293 void efx_mtd_rename(struct efx_nic
*efx
)
295 struct efx_mtd
*efx_mtd
;
299 list_for_each_entry(efx_mtd
, &efx
->mtd_list
, node
)
300 efx_mtd_rename_device(efx_mtd
);
303 int efx_mtd_probe(struct efx_nic
*efx
)
305 if (efx_nic_rev(efx
) >= EFX_REV_SIENA_A0
)
306 return siena_mtd_probe(efx
);
308 return falcon_mtd_probe(efx
);
311 /* Implementation of MTD operations for Falcon */
313 static int falcon_mtd_read(struct mtd_info
*mtd
, loff_t start
,
314 size_t len
, size_t *retlen
, u8
*buffer
)
316 struct efx_mtd_partition
*part
= to_efx_mtd_partition(mtd
);
317 struct efx_mtd
*efx_mtd
= mtd
->priv
;
318 const struct efx_spi_device
*spi
= efx_mtd
->spi
;
319 struct efx_nic
*efx
= efx_mtd
->efx
;
322 rc
= mutex_lock_interruptible(&efx
->spi_lock
);
325 rc
= falcon_spi_read(efx
, spi
, part
->offset
+ start
, len
,
327 mutex_unlock(&efx
->spi_lock
);
331 static int falcon_mtd_erase(struct mtd_info
*mtd
, loff_t start
, size_t len
)
333 struct efx_mtd_partition
*part
= to_efx_mtd_partition(mtd
);
334 struct efx_mtd
*efx_mtd
= mtd
->priv
;
335 struct efx_nic
*efx
= efx_mtd
->efx
;
338 rc
= mutex_lock_interruptible(&efx
->spi_lock
);
341 rc
= efx_spi_erase(efx_mtd
, part
->offset
+ start
, len
);
342 mutex_unlock(&efx
->spi_lock
);
346 static int falcon_mtd_write(struct mtd_info
*mtd
, loff_t start
,
347 size_t len
, size_t *retlen
, const u8
*buffer
)
349 struct efx_mtd_partition
*part
= to_efx_mtd_partition(mtd
);
350 struct efx_mtd
*efx_mtd
= mtd
->priv
;
351 const struct efx_spi_device
*spi
= efx_mtd
->spi
;
352 struct efx_nic
*efx
= efx_mtd
->efx
;
355 rc
= mutex_lock_interruptible(&efx
->spi_lock
);
358 rc
= falcon_spi_write(efx
, spi
, part
->offset
+ start
, len
,
360 mutex_unlock(&efx
->spi_lock
);
364 static int falcon_mtd_sync(struct mtd_info
*mtd
)
366 struct efx_mtd
*efx_mtd
= mtd
->priv
;
367 struct efx_nic
*efx
= efx_mtd
->efx
;
370 mutex_lock(&efx
->spi_lock
);
371 rc
= efx_spi_slow_wait(efx_mtd
, true);
372 mutex_unlock(&efx
->spi_lock
);
376 static struct efx_mtd_ops falcon_mtd_ops
= {
377 .read
= falcon_mtd_read
,
378 .erase
= falcon_mtd_erase
,
379 .write
= falcon_mtd_write
,
380 .sync
= falcon_mtd_sync
,
383 static int falcon_mtd_probe(struct efx_nic
*efx
)
385 struct efx_spi_device
*spi
= efx
->spi_flash
;
386 struct efx_mtd
*efx_mtd
;
391 if (!spi
|| spi
->size
<= FALCON_FLASH_BOOTCODE_START
)
394 efx_mtd
= kzalloc(sizeof(*efx_mtd
) + sizeof(efx_mtd
->part
[0]),
400 efx_mtd
->name
= "flash";
401 efx_mtd
->ops
= &falcon_mtd_ops
;
403 efx_mtd
->n_parts
= 1;
404 efx_mtd
->part
[0].mtd
.type
= MTD_NORFLASH
;
405 efx_mtd
->part
[0].mtd
.flags
= MTD_CAP_NORFLASH
;
406 efx_mtd
->part
[0].mtd
.size
= spi
->size
- FALCON_FLASH_BOOTCODE_START
;
407 efx_mtd
->part
[0].mtd
.erasesize
= spi
->erase_size
;
408 efx_mtd
->part
[0].offset
= FALCON_FLASH_BOOTCODE_START
;
409 efx_mtd
->part
[0].type_name
= "sfc_flash_bootrom";
411 rc
= efx_mtd_probe_device(efx
, efx_mtd
);
417 /* Implementation of MTD operations for Siena */
419 static int siena_mtd_read(struct mtd_info
*mtd
, loff_t start
,
420 size_t len
, size_t *retlen
, u8
*buffer
)
422 struct efx_mtd_partition
*part
= to_efx_mtd_partition(mtd
);
423 struct efx_mtd
*efx_mtd
= mtd
->priv
;
424 struct efx_nic
*efx
= efx_mtd
->efx
;
425 loff_t offset
= start
;
426 loff_t end
= min_t(loff_t
, start
+ len
, mtd
->size
);
430 while (offset
< end
) {
431 chunk
= min_t(size_t, end
- offset
, EFX_MCDI_CHUNK_LEN
);
432 rc
= efx_mcdi_nvram_read(efx
, part
->mcdi
.nvram_type
, offset
,
440 *retlen
= offset
- start
;
444 static int siena_mtd_erase(struct mtd_info
*mtd
, loff_t start
, size_t len
)
446 struct efx_mtd_partition
*part
= to_efx_mtd_partition(mtd
);
447 struct efx_mtd
*efx_mtd
= mtd
->priv
;
448 struct efx_nic
*efx
= efx_mtd
->efx
;
449 loff_t offset
= start
& ~((loff_t
)(mtd
->erasesize
- 1));
450 loff_t end
= min_t(loff_t
, start
+ len
, mtd
->size
);
451 size_t chunk
= part
->mtd
.erasesize
;
454 if (!part
->mcdi
.updating
) {
455 rc
= efx_mcdi_nvram_update_start(efx
, part
->mcdi
.nvram_type
);
458 part
->mcdi
.updating
= 1;
461 /* The MCDI interface can in fact do multiple erase blocks at once;
462 * but erasing may be slow, so we make multiple calls here to avoid
463 * tripping the MCDI RPC timeout. */
464 while (offset
< end
) {
465 rc
= efx_mcdi_nvram_erase(efx
, part
->mcdi
.nvram_type
, offset
,
475 static int siena_mtd_write(struct mtd_info
*mtd
, loff_t start
,
476 size_t len
, size_t *retlen
, const u8
*buffer
)
478 struct efx_mtd_partition
*part
= to_efx_mtd_partition(mtd
);
479 struct efx_mtd
*efx_mtd
= mtd
->priv
;
480 struct efx_nic
*efx
= efx_mtd
->efx
;
481 loff_t offset
= start
;
482 loff_t end
= min_t(loff_t
, start
+ len
, mtd
->size
);
486 if (!part
->mcdi
.updating
) {
487 rc
= efx_mcdi_nvram_update_start(efx
, part
->mcdi
.nvram_type
);
490 part
->mcdi
.updating
= 1;
493 while (offset
< end
) {
494 chunk
= min_t(size_t, end
- offset
, EFX_MCDI_CHUNK_LEN
);
495 rc
= efx_mcdi_nvram_write(efx
, part
->mcdi
.nvram_type
, offset
,
503 *retlen
= offset
- start
;
507 static int siena_mtd_sync(struct mtd_info
*mtd
)
509 struct efx_mtd_partition
*part
= to_efx_mtd_partition(mtd
);
510 struct efx_mtd
*efx_mtd
= mtd
->priv
;
511 struct efx_nic
*efx
= efx_mtd
->efx
;
514 if (part
->mcdi
.updating
) {
515 part
->mcdi
.updating
= 0;
516 rc
= efx_mcdi_nvram_update_finish(efx
, part
->mcdi
.nvram_type
);
522 static struct efx_mtd_ops siena_mtd_ops
= {
523 .read
= siena_mtd_read
,
524 .erase
= siena_mtd_erase
,
525 .write
= siena_mtd_write
,
526 .sync
= siena_mtd_sync
,
529 struct siena_nvram_type_info
{
534 static struct siena_nvram_type_info siena_nvram_types
[] = {
535 [MC_CMD_NVRAM_TYPE_DISABLED_CALLISTO
] = { 0, "sfc_dummy_phy" },
536 [MC_CMD_NVRAM_TYPE_MC_FW
] = { 0, "sfc_mcfw" },
537 [MC_CMD_NVRAM_TYPE_MC_FW_BACKUP
] = { 0, "sfc_mcfw_backup" },
538 [MC_CMD_NVRAM_TYPE_STATIC_CFG_PORT0
] = { 0, "sfc_static_cfg" },
539 [MC_CMD_NVRAM_TYPE_STATIC_CFG_PORT1
] = { 1, "sfc_static_cfg" },
540 [MC_CMD_NVRAM_TYPE_DYNAMIC_CFG_PORT0
] = { 0, "sfc_dynamic_cfg" },
541 [MC_CMD_NVRAM_TYPE_DYNAMIC_CFG_PORT1
] = { 1, "sfc_dynamic_cfg" },
542 [MC_CMD_NVRAM_TYPE_EXP_ROM
] = { 0, "sfc_exp_rom" },
543 [MC_CMD_NVRAM_TYPE_EXP_ROM_CFG_PORT0
] = { 0, "sfc_exp_rom_cfg" },
544 [MC_CMD_NVRAM_TYPE_EXP_ROM_CFG_PORT1
] = { 1, "sfc_exp_rom_cfg" },
545 [MC_CMD_NVRAM_TYPE_PHY_PORT0
] = { 0, "sfc_phy_fw" },
546 [MC_CMD_NVRAM_TYPE_PHY_PORT1
] = { 1, "sfc_phy_fw" },
549 static int siena_mtd_probe_partition(struct efx_nic
*efx
,
550 struct efx_mtd
*efx_mtd
,
551 unsigned int part_id
,
554 struct efx_mtd_partition
*part
= &efx_mtd
->part
[part_id
];
555 struct siena_nvram_type_info
*info
;
556 size_t size
, erase_size
;
560 if (type
>= ARRAY_SIZE(siena_nvram_types
))
563 info
= &siena_nvram_types
[type
];
565 if (info
->port
!= efx_port_num(efx
))
568 rc
= efx_mcdi_nvram_info(efx
, type
, &size
, &erase_size
, &protected);
572 return -ENODEV
; /* hide it */
574 part
->mcdi
.nvram_type
= type
;
575 part
->type_name
= info
->name
;
577 part
->mtd
.type
= MTD_NORFLASH
;
578 part
->mtd
.flags
= MTD_CAP_NORFLASH
;
579 part
->mtd
.size
= size
;
580 part
->mtd
.erasesize
= erase_size
;
585 static int siena_mtd_get_fw_subtypes(struct efx_nic
*efx
,
586 struct efx_mtd
*efx_mtd
)
588 struct efx_mtd_partition
*part
;
589 uint16_t fw_subtype_list
[MC_CMD_GET_BOARD_CFG_OUT_FW_SUBTYPE_LIST_LEN
/
593 rc
= efx_mcdi_get_board_cfg(efx
, NULL
, fw_subtype_list
);
597 efx_for_each_partition(part
, efx_mtd
)
598 part
->mcdi
.fw_subtype
= fw_subtype_list
[part
->mcdi
.nvram_type
];
603 static int siena_mtd_probe(struct efx_nic
*efx
)
605 struct efx_mtd
*efx_mtd
;
612 rc
= efx_mcdi_nvram_types(efx
, &nvram_types
);
616 efx_mtd
= kzalloc(sizeof(*efx_mtd
) +
617 hweight32(nvram_types
) * sizeof(efx_mtd
->part
[0]),
622 efx_mtd
->name
= "Siena NVRAM manager";
624 efx_mtd
->ops
= &siena_mtd_ops
;
627 efx_mtd
->n_parts
= 0;
629 while (nvram_types
!= 0) {
630 if (nvram_types
& 1) {
631 rc
= siena_mtd_probe_partition(efx
, efx_mtd
,
632 efx_mtd
->n_parts
, type
);
635 else if (rc
!= -ENODEV
)
642 rc
= siena_mtd_get_fw_subtypes(efx
, efx_mtd
);
646 rc
= efx_mtd_probe_device(efx
, efx_mtd
);