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[mirror_ubuntu-bionic-kernel.git] / drivers / net / sis900.c
1 /* sis900.c: A SiS 900/7016 PCI Fast Ethernet driver for Linux.
2 Copyright 1999 Silicon Integrated System Corporation
3 Revision: 1.08.10 Apr. 2 2006
4
5 Modified from the driver which is originally written by Donald Becker.
6
7 This software may be used and distributed according to the terms
8 of the GNU General Public License (GPL), incorporated herein by reference.
9 Drivers based on this skeleton fall under the GPL and must retain
10 the authorship (implicit copyright) notice.
11
12 References:
13 SiS 7016 Fast Ethernet PCI Bus 10/100 Mbps LAN Controller with OnNow Support,
14 preliminary Rev. 1.0 Jan. 14, 1998
15 SiS 900 Fast Ethernet PCI Bus 10/100 Mbps LAN Single Chip with OnNow Support,
16 preliminary Rev. 1.0 Nov. 10, 1998
17 SiS 7014 Single Chip 100BASE-TX/10BASE-T Physical Layer Solution,
18 preliminary Rev. 1.0 Jan. 18, 1998
19
20 Rev 1.08.10 Apr. 2 2006 Daniele Venzano add vlan (jumbo packets) support
21 Rev 1.08.09 Sep. 19 2005 Daniele Venzano add Wake on LAN support
22 Rev 1.08.08 Jan. 22 2005 Daniele Venzano use netif_msg for debugging messages
23 Rev 1.08.07 Nov. 2 2003 Daniele Venzano <venza@brownhat.org> add suspend/resume support
24 Rev 1.08.06 Sep. 24 2002 Mufasa Yang bug fix for Tx timeout & add SiS963 support
25 Rev 1.08.05 Jun. 6 2002 Mufasa Yang bug fix for read_eeprom & Tx descriptor over-boundary
26 Rev 1.08.04 Apr. 25 2002 Mufasa Yang <mufasa@sis.com.tw> added SiS962 support
27 Rev 1.08.03 Feb. 1 2002 Matt Domsch <Matt_Domsch@dell.com> update to use library crc32 function
28 Rev 1.08.02 Nov. 30 2001 Hui-Fen Hsu workaround for EDB & bug fix for dhcp problem
29 Rev 1.08.01 Aug. 25 2001 Hui-Fen Hsu update for 630ET & workaround for ICS1893 PHY
30 Rev 1.08.00 Jun. 11 2001 Hui-Fen Hsu workaround for RTL8201 PHY and some bug fix
31 Rev 1.07.11 Apr. 2 2001 Hui-Fen Hsu updates PCI drivers to use the new pci_set_dma_mask for kernel 2.4.3
32 Rev 1.07.10 Mar. 1 2001 Hui-Fen Hsu <hfhsu@sis.com.tw> some bug fix & 635M/B support
33 Rev 1.07.09 Feb. 9 2001 Dave Jones <davej@suse.de> PCI enable cleanup
34 Rev 1.07.08 Jan. 8 2001 Lei-Chun Chang added RTL8201 PHY support
35 Rev 1.07.07 Nov. 29 2000 Lei-Chun Chang added kernel-doc extractable documentation and 630 workaround fix
36 Rev 1.07.06 Nov. 7 2000 Jeff Garzik <jgarzik@pobox.com> some bug fix and cleaning
37 Rev 1.07.05 Nov. 6 2000 metapirat<metapirat@gmx.de> contribute media type select by ifconfig
38 Rev 1.07.04 Sep. 6 2000 Lei-Chun Chang added ICS1893 PHY support
39 Rev 1.07.03 Aug. 24 2000 Lei-Chun Chang (lcchang@sis.com.tw) modified 630E eqaulizer workaround rule
40 Rev 1.07.01 Aug. 08 2000 Ollie Lho minor update for SiS 630E and SiS 630E A1
41 Rev 1.07 Mar. 07 2000 Ollie Lho bug fix in Rx buffer ring
42 Rev 1.06.04 Feb. 11 2000 Jeff Garzik <jgarzik@pobox.com> softnet and init for kernel 2.4
43 Rev 1.06.03 Dec. 23 1999 Ollie Lho Third release
44 Rev 1.06.02 Nov. 23 1999 Ollie Lho bug in mac probing fixed
45 Rev 1.06.01 Nov. 16 1999 Ollie Lho CRC calculation provide by Joseph Zbiciak (im14u2c@primenet.com)
46 Rev 1.06 Nov. 4 1999 Ollie Lho (ollie@sis.com.tw) Second release
47 Rev 1.05.05 Oct. 29 1999 Ollie Lho (ollie@sis.com.tw) Single buffer Tx/Rx
48 Chin-Shan Li (lcs@sis.com.tw) Added AMD Am79c901 HomePNA PHY support
49 Rev 1.05 Aug. 7 1999 Jim Huang (cmhuang@sis.com.tw) Initial release
50 */
51
52 #include <linux/module.h>
53 #include <linux/moduleparam.h>
54 #include <linux/kernel.h>
55 #include <linux/string.h>
56 #include <linux/timer.h>
57 #include <linux/errno.h>
58 #include <linux/ioport.h>
59 #include <linux/slab.h>
60 #include <linux/interrupt.h>
61 #include <linux/pci.h>
62 #include <linux/netdevice.h>
63 #include <linux/init.h>
64 #include <linux/mii.h>
65 #include <linux/etherdevice.h>
66 #include <linux/skbuff.h>
67 #include <linux/delay.h>
68 #include <linux/ethtool.h>
69 #include <linux/crc32.h>
70 #include <linux/bitops.h>
71 #include <linux/dma-mapping.h>
72
73 #include <asm/processor.h> /* Processor type for cache alignment. */
74 #include <asm/io.h>
75 #include <asm/irq.h>
76 #include <asm/uaccess.h> /* User space memory access functions */
77
78 #include "sis900.h"
79
80 #define SIS900_MODULE_NAME "sis900"
81 #define SIS900_DRV_VERSION "v1.08.10 Apr. 2 2006"
82
83 static char version[] __devinitdata =
84 KERN_INFO "sis900.c: " SIS900_DRV_VERSION "\n";
85
86 static int max_interrupt_work = 40;
87 static int multicast_filter_limit = 128;
88
89 static int sis900_debug = -1; /* Use SIS900_DEF_MSG as value */
90
91 #define SIS900_DEF_MSG \
92 (NETIF_MSG_DRV | \
93 NETIF_MSG_LINK | \
94 NETIF_MSG_RX_ERR | \
95 NETIF_MSG_TX_ERR)
96
97 /* Time in jiffies before concluding the transmitter is hung. */
98 #define TX_TIMEOUT (4*HZ)
99
100 enum {
101 SIS_900 = 0,
102 SIS_7016
103 };
104 static const char * card_names[] = {
105 "SiS 900 PCI Fast Ethernet",
106 "SiS 7016 PCI Fast Ethernet"
107 };
108 static struct pci_device_id sis900_pci_tbl [] = {
109 {PCI_VENDOR_ID_SI, PCI_DEVICE_ID_SI_900,
110 PCI_ANY_ID, PCI_ANY_ID, 0, 0, SIS_900},
111 {PCI_VENDOR_ID_SI, PCI_DEVICE_ID_SI_7016,
112 PCI_ANY_ID, PCI_ANY_ID, 0, 0, SIS_7016},
113 {0,}
114 };
115 MODULE_DEVICE_TABLE (pci, sis900_pci_tbl);
116
117 static void sis900_read_mode(struct net_device *net_dev, int *speed, int *duplex);
118
119 static const struct mii_chip_info {
120 const char * name;
121 u16 phy_id0;
122 u16 phy_id1;
123 u8 phy_types;
124 #define HOME 0x0001
125 #define LAN 0x0002
126 #define MIX 0x0003
127 #define UNKNOWN 0x0
128 } mii_chip_table[] = {
129 { "SiS 900 Internal MII PHY", 0x001d, 0x8000, LAN },
130 { "SiS 7014 Physical Layer Solution", 0x0016, 0xf830, LAN },
131 { "SiS 900 on Foxconn 661 7MI", 0x0143, 0xBC70, LAN },
132 { "Altimata AC101LF PHY", 0x0022, 0x5520, LAN },
133 { "ADM 7001 LAN PHY", 0x002e, 0xcc60, LAN },
134 { "AMD 79C901 10BASE-T PHY", 0x0000, 0x6B70, LAN },
135 { "AMD 79C901 HomePNA PHY", 0x0000, 0x6B90, HOME},
136 { "ICS LAN PHY", 0x0015, 0xF440, LAN },
137 { "ICS LAN PHY", 0x0143, 0xBC70, LAN },
138 { "NS 83851 PHY", 0x2000, 0x5C20, MIX },
139 { "NS 83847 PHY", 0x2000, 0x5C30, MIX },
140 { "Realtek RTL8201 PHY", 0x0000, 0x8200, LAN },
141 { "VIA 6103 PHY", 0x0101, 0x8f20, LAN },
142 {NULL,},
143 };
144
145 struct mii_phy {
146 struct mii_phy * next;
147 int phy_addr;
148 u16 phy_id0;
149 u16 phy_id1;
150 u16 status;
151 u8 phy_types;
152 };
153
154 typedef struct _BufferDesc {
155 u32 link;
156 u32 cmdsts;
157 u32 bufptr;
158 } BufferDesc;
159
160 struct sis900_private {
161 struct net_device_stats stats;
162 struct pci_dev * pci_dev;
163
164 spinlock_t lock;
165
166 struct mii_phy * mii;
167 struct mii_phy * first_mii; /* record the first mii structure */
168 unsigned int cur_phy;
169 struct mii_if_info mii_info;
170
171 struct timer_list timer; /* Link status detection timer. */
172 u8 autong_complete; /* 1: auto-negotiate complete */
173
174 u32 msg_enable;
175
176 unsigned int cur_rx, dirty_rx; /* producer/comsumer pointers for Tx/Rx ring */
177 unsigned int cur_tx, dirty_tx;
178
179 /* The saved address of a sent/receive-in-place packet buffer */
180 struct sk_buff *tx_skbuff[NUM_TX_DESC];
181 struct sk_buff *rx_skbuff[NUM_RX_DESC];
182 BufferDesc *tx_ring;
183 BufferDesc *rx_ring;
184
185 dma_addr_t tx_ring_dma;
186 dma_addr_t rx_ring_dma;
187
188 unsigned int tx_full; /* The Tx queue is full. */
189 u8 host_bridge_rev;
190 u8 chipset_rev;
191 };
192
193 MODULE_AUTHOR("Jim Huang <cmhuang@sis.com.tw>, Ollie Lho <ollie@sis.com.tw>");
194 MODULE_DESCRIPTION("SiS 900 PCI Fast Ethernet driver");
195 MODULE_LICENSE("GPL");
196
197 module_param(multicast_filter_limit, int, 0444);
198 module_param(max_interrupt_work, int, 0444);
199 module_param(sis900_debug, int, 0444);
200 MODULE_PARM_DESC(multicast_filter_limit, "SiS 900/7016 maximum number of filtered multicast addresses");
201 MODULE_PARM_DESC(max_interrupt_work, "SiS 900/7016 maximum events handled per interrupt");
202 MODULE_PARM_DESC(sis900_debug, "SiS 900/7016 bitmapped debugging message level");
203
204 #ifdef CONFIG_NET_POLL_CONTROLLER
205 static void sis900_poll(struct net_device *dev);
206 #endif
207 static int sis900_open(struct net_device *net_dev);
208 static int sis900_mii_probe (struct net_device * net_dev);
209 static void sis900_init_rxfilter (struct net_device * net_dev);
210 static u16 read_eeprom(long ioaddr, int location);
211 static int mdio_read(struct net_device *net_dev, int phy_id, int location);
212 static void mdio_write(struct net_device *net_dev, int phy_id, int location, int val);
213 static void sis900_timer(unsigned long data);
214 static void sis900_check_mode (struct net_device *net_dev, struct mii_phy *mii_phy);
215 static void sis900_tx_timeout(struct net_device *net_dev);
216 static void sis900_init_tx_ring(struct net_device *net_dev);
217 static void sis900_init_rx_ring(struct net_device *net_dev);
218 static int sis900_start_xmit(struct sk_buff *skb, struct net_device *net_dev);
219 static int sis900_rx(struct net_device *net_dev);
220 static void sis900_finish_xmit (struct net_device *net_dev);
221 static irqreturn_t sis900_interrupt(int irq, void *dev_instance);
222 static int sis900_close(struct net_device *net_dev);
223 static int mii_ioctl(struct net_device *net_dev, struct ifreq *rq, int cmd);
224 static struct net_device_stats *sis900_get_stats(struct net_device *net_dev);
225 static u16 sis900_mcast_bitnr(u8 *addr, u8 revision);
226 static void set_rx_mode(struct net_device *net_dev);
227 static void sis900_reset(struct net_device *net_dev);
228 static void sis630_set_eq(struct net_device *net_dev, u8 revision);
229 static int sis900_set_config(struct net_device *dev, struct ifmap *map);
230 static u16 sis900_default_phy(struct net_device * net_dev);
231 static void sis900_set_capability( struct net_device *net_dev ,struct mii_phy *phy);
232 static u16 sis900_reset_phy(struct net_device *net_dev, int phy_addr);
233 static void sis900_auto_negotiate(struct net_device *net_dev, int phy_addr);
234 static void sis900_set_mode (long ioaddr, int speed, int duplex);
235 static const struct ethtool_ops sis900_ethtool_ops;
236
237 /**
238 * sis900_get_mac_addr - Get MAC address for stand alone SiS900 model
239 * @pci_dev: the sis900 pci device
240 * @net_dev: the net device to get address for
241 *
242 * Older SiS900 and friends, use EEPROM to store MAC address.
243 * MAC address is read from read_eeprom() into @net_dev->dev_addr.
244 */
245
246 static int __devinit sis900_get_mac_addr(struct pci_dev * pci_dev, struct net_device *net_dev)
247 {
248 long ioaddr = pci_resource_start(pci_dev, 0);
249 u16 signature;
250 int i;
251
252 /* check to see if we have sane EEPROM */
253 signature = (u16) read_eeprom(ioaddr, EEPROMSignature);
254 if (signature == 0xffff || signature == 0x0000) {
255 printk (KERN_WARNING "%s: Error EERPOM read %x\n",
256 pci_name(pci_dev), signature);
257 return 0;
258 }
259
260 /* get MAC address from EEPROM */
261 for (i = 0; i < 3; i++)
262 ((u16 *)(net_dev->dev_addr))[i] = read_eeprom(ioaddr, i+EEPROMMACAddr);
263
264 return 1;
265 }
266
267 /**
268 * sis630e_get_mac_addr - Get MAC address for SiS630E model
269 * @pci_dev: the sis900 pci device
270 * @net_dev: the net device to get address for
271 *
272 * SiS630E model, use APC CMOS RAM to store MAC address.
273 * APC CMOS RAM is accessed through ISA bridge.
274 * MAC address is read into @net_dev->dev_addr.
275 */
276
277 static int __devinit sis630e_get_mac_addr(struct pci_dev * pci_dev,
278 struct net_device *net_dev)
279 {
280 struct pci_dev *isa_bridge = NULL;
281 u8 reg;
282 int i;
283
284 isa_bridge = pci_get_device(PCI_VENDOR_ID_SI, 0x0008, isa_bridge);
285 if (!isa_bridge)
286 isa_bridge = pci_get_device(PCI_VENDOR_ID_SI, 0x0018, isa_bridge);
287 if (!isa_bridge) {
288 printk(KERN_WARNING "%s: Can not find ISA bridge\n",
289 pci_name(pci_dev));
290 return 0;
291 }
292 pci_read_config_byte(isa_bridge, 0x48, &reg);
293 pci_write_config_byte(isa_bridge, 0x48, reg | 0x40);
294
295 for (i = 0; i < 6; i++) {
296 outb(0x09 + i, 0x70);
297 ((u8 *)(net_dev->dev_addr))[i] = inb(0x71);
298 }
299 pci_write_config_byte(isa_bridge, 0x48, reg & ~0x40);
300 pci_dev_put(isa_bridge);
301
302 return 1;
303 }
304
305
306 /**
307 * sis635_get_mac_addr - Get MAC address for SIS635 model
308 * @pci_dev: the sis900 pci device
309 * @net_dev: the net device to get address for
310 *
311 * SiS635 model, set MAC Reload Bit to load Mac address from APC
312 * to rfdr. rfdr is accessed through rfcr. MAC address is read into
313 * @net_dev->dev_addr.
314 */
315
316 static int __devinit sis635_get_mac_addr(struct pci_dev * pci_dev,
317 struct net_device *net_dev)
318 {
319 long ioaddr = net_dev->base_addr;
320 u32 rfcrSave;
321 u32 i;
322
323 rfcrSave = inl(rfcr + ioaddr);
324
325 outl(rfcrSave | RELOAD, ioaddr + cr);
326 outl(0, ioaddr + cr);
327
328 /* disable packet filtering before setting filter */
329 outl(rfcrSave & ~RFEN, rfcr + ioaddr);
330
331 /* load MAC addr to filter data register */
332 for (i = 0 ; i < 3 ; i++) {
333 outl((i << RFADDR_shift), ioaddr + rfcr);
334 *( ((u16 *)net_dev->dev_addr) + i) = inw(ioaddr + rfdr);
335 }
336
337 /* enable packet filtering */
338 outl(rfcrSave | RFEN, rfcr + ioaddr);
339
340 return 1;
341 }
342
343 /**
344 * sis96x_get_mac_addr - Get MAC address for SiS962 or SiS963 model
345 * @pci_dev: the sis900 pci device
346 * @net_dev: the net device to get address for
347 *
348 * SiS962 or SiS963 model, use EEPROM to store MAC address. And EEPROM
349 * is shared by
350 * LAN and 1394. When access EEPROM, send EEREQ signal to hardware first
351 * and wait for EEGNT. If EEGNT is ON, EEPROM is permitted to be access
352 * by LAN, otherwise is not. After MAC address is read from EEPROM, send
353 * EEDONE signal to refuse EEPROM access by LAN.
354 * The EEPROM map of SiS962 or SiS963 is different to SiS900.
355 * The signature field in SiS962 or SiS963 spec is meaningless.
356 * MAC address is read into @net_dev->dev_addr.
357 */
358
359 static int __devinit sis96x_get_mac_addr(struct pci_dev * pci_dev,
360 struct net_device *net_dev)
361 {
362 long ioaddr = net_dev->base_addr;
363 long ee_addr = ioaddr + mear;
364 u32 waittime = 0;
365 int i;
366
367 outl(EEREQ, ee_addr);
368 while(waittime < 2000) {
369 if(inl(ee_addr) & EEGNT) {
370
371 /* get MAC address from EEPROM */
372 for (i = 0; i < 3; i++)
373 ((u16 *)(net_dev->dev_addr))[i] = read_eeprom(ioaddr, i+EEPROMMACAddr);
374
375 outl(EEDONE, ee_addr);
376 return 1;
377 } else {
378 udelay(1);
379 waittime ++;
380 }
381 }
382 outl(EEDONE, ee_addr);
383 return 0;
384 }
385
386 /**
387 * sis900_probe - Probe for sis900 device
388 * @pci_dev: the sis900 pci device
389 * @pci_id: the pci device ID
390 *
391 * Check and probe sis900 net device for @pci_dev.
392 * Get mac address according to the chip revision,
393 * and assign SiS900-specific entries in the device structure.
394 * ie: sis900_open(), sis900_start_xmit(), sis900_close(), etc.
395 */
396
397 static int __devinit sis900_probe(struct pci_dev *pci_dev,
398 const struct pci_device_id *pci_id)
399 {
400 struct sis900_private *sis_priv;
401 struct net_device *net_dev;
402 struct pci_dev *dev;
403 dma_addr_t ring_dma;
404 void *ring_space;
405 long ioaddr;
406 int i, ret;
407 const char *card_name = card_names[pci_id->driver_data];
408 const char *dev_name = pci_name(pci_dev);
409
410 /* when built into the kernel, we only print version if device is found */
411 #ifndef MODULE
412 static int printed_version;
413 if (!printed_version++)
414 printk(version);
415 #endif
416
417 /* setup various bits in PCI command register */
418 ret = pci_enable_device(pci_dev);
419 if(ret) return ret;
420
421 i = pci_set_dma_mask(pci_dev, DMA_32BIT_MASK);
422 if(i){
423 printk(KERN_ERR "sis900.c: architecture does not support"
424 "32bit PCI busmaster DMA\n");
425 return i;
426 }
427
428 pci_set_master(pci_dev);
429
430 net_dev = alloc_etherdev(sizeof(struct sis900_private));
431 if (!net_dev)
432 return -ENOMEM;
433 SET_NETDEV_DEV(net_dev, &pci_dev->dev);
434
435 /* We do a request_region() to register /proc/ioports info. */
436 ioaddr = pci_resource_start(pci_dev, 0);
437 ret = pci_request_regions(pci_dev, "sis900");
438 if (ret)
439 goto err_out;
440
441 sis_priv = net_dev->priv;
442 net_dev->base_addr = ioaddr;
443 net_dev->irq = pci_dev->irq;
444 sis_priv->pci_dev = pci_dev;
445 spin_lock_init(&sis_priv->lock);
446
447 pci_set_drvdata(pci_dev, net_dev);
448
449 ring_space = pci_alloc_consistent(pci_dev, TX_TOTAL_SIZE, &ring_dma);
450 if (!ring_space) {
451 ret = -ENOMEM;
452 goto err_out_cleardev;
453 }
454 sis_priv->tx_ring = (BufferDesc *)ring_space;
455 sis_priv->tx_ring_dma = ring_dma;
456
457 ring_space = pci_alloc_consistent(pci_dev, RX_TOTAL_SIZE, &ring_dma);
458 if (!ring_space) {
459 ret = -ENOMEM;
460 goto err_unmap_tx;
461 }
462 sis_priv->rx_ring = (BufferDesc *)ring_space;
463 sis_priv->rx_ring_dma = ring_dma;
464
465 /* The SiS900-specific entries in the device structure. */
466 net_dev->open = &sis900_open;
467 net_dev->hard_start_xmit = &sis900_start_xmit;
468 net_dev->stop = &sis900_close;
469 net_dev->get_stats = &sis900_get_stats;
470 net_dev->set_config = &sis900_set_config;
471 net_dev->set_multicast_list = &set_rx_mode;
472 net_dev->do_ioctl = &mii_ioctl;
473 net_dev->tx_timeout = sis900_tx_timeout;
474 net_dev->watchdog_timeo = TX_TIMEOUT;
475 net_dev->ethtool_ops = &sis900_ethtool_ops;
476
477 #ifdef CONFIG_NET_POLL_CONTROLLER
478 net_dev->poll_controller = &sis900_poll;
479 #endif
480
481 if (sis900_debug > 0)
482 sis_priv->msg_enable = sis900_debug;
483 else
484 sis_priv->msg_enable = SIS900_DEF_MSG;
485
486 sis_priv->mii_info.dev = net_dev;
487 sis_priv->mii_info.mdio_read = mdio_read;
488 sis_priv->mii_info.mdio_write = mdio_write;
489 sis_priv->mii_info.phy_id_mask = 0x1f;
490 sis_priv->mii_info.reg_num_mask = 0x1f;
491
492 /* Get Mac address according to the chip revision */
493 pci_read_config_byte(pci_dev, PCI_CLASS_REVISION, &(sis_priv->chipset_rev));
494 if(netif_msg_probe(sis_priv))
495 printk(KERN_DEBUG "%s: detected revision %2.2x, "
496 "trying to get MAC address...\n",
497 dev_name, sis_priv->chipset_rev);
498
499 ret = 0;
500 if (sis_priv->chipset_rev == SIS630E_900_REV)
501 ret = sis630e_get_mac_addr(pci_dev, net_dev);
502 else if ((sis_priv->chipset_rev > 0x81) && (sis_priv->chipset_rev <= 0x90) )
503 ret = sis635_get_mac_addr(pci_dev, net_dev);
504 else if (sis_priv->chipset_rev == SIS96x_900_REV)
505 ret = sis96x_get_mac_addr(pci_dev, net_dev);
506 else
507 ret = sis900_get_mac_addr(pci_dev, net_dev);
508
509 if (ret == 0) {
510 printk(KERN_WARNING "%s: Cannot read MAC address.\n", dev_name);
511 ret = -ENODEV;
512 goto err_unmap_rx;
513 }
514
515 /* 630ET : set the mii access mode as software-mode */
516 if (sis_priv->chipset_rev == SIS630ET_900_REV)
517 outl(ACCESSMODE | inl(ioaddr + cr), ioaddr + cr);
518
519 /* probe for mii transceiver */
520 if (sis900_mii_probe(net_dev) == 0) {
521 printk(KERN_WARNING "%s: Error probing MII device.\n",
522 dev_name);
523 ret = -ENODEV;
524 goto err_unmap_rx;
525 }
526
527 /* save our host bridge revision */
528 dev = pci_get_device(PCI_VENDOR_ID_SI, PCI_DEVICE_ID_SI_630, NULL);
529 if (dev) {
530 pci_read_config_byte(dev, PCI_CLASS_REVISION, &sis_priv->host_bridge_rev);
531 pci_dev_put(dev);
532 }
533
534 ret = register_netdev(net_dev);
535 if (ret)
536 goto err_unmap_rx;
537
538 /* print some information about our NIC */
539 printk(KERN_INFO "%s: %s at %#lx, IRQ %d, ", net_dev->name,
540 card_name, ioaddr, net_dev->irq);
541 for (i = 0; i < 5; i++)
542 printk("%2.2x:", (u8)net_dev->dev_addr[i]);
543 printk("%2.2x.\n", net_dev->dev_addr[i]);
544
545 /* Detect Wake on Lan support */
546 ret = (inl(net_dev->base_addr + CFGPMC) & PMESP) >> 27;
547 if (netif_msg_probe(sis_priv) && (ret & PME_D3C) == 0)
548 printk(KERN_INFO "%s: Wake on LAN only available from suspend to RAM.", net_dev->name);
549
550 return 0;
551
552 err_unmap_rx:
553 pci_free_consistent(pci_dev, RX_TOTAL_SIZE, sis_priv->rx_ring,
554 sis_priv->rx_ring_dma);
555 err_unmap_tx:
556 pci_free_consistent(pci_dev, TX_TOTAL_SIZE, sis_priv->tx_ring,
557 sis_priv->tx_ring_dma);
558 err_out_cleardev:
559 pci_set_drvdata(pci_dev, NULL);
560 pci_release_regions(pci_dev);
561 err_out:
562 free_netdev(net_dev);
563 return ret;
564 }
565
566 /**
567 * sis900_mii_probe - Probe MII PHY for sis900
568 * @net_dev: the net device to probe for
569 *
570 * Search for total of 32 possible mii phy addresses.
571 * Identify and set current phy if found one,
572 * return error if it failed to found.
573 */
574
575 static int __devinit sis900_mii_probe(struct net_device * net_dev)
576 {
577 struct sis900_private * sis_priv = net_dev->priv;
578 const char *dev_name = pci_name(sis_priv->pci_dev);
579 u16 poll_bit = MII_STAT_LINK, status = 0;
580 unsigned long timeout = jiffies + 5 * HZ;
581 int phy_addr;
582
583 sis_priv->mii = NULL;
584
585 /* search for total of 32 possible mii phy addresses */
586 for (phy_addr = 0; phy_addr < 32; phy_addr++) {
587 struct mii_phy * mii_phy = NULL;
588 u16 mii_status;
589 int i;
590
591 mii_phy = NULL;
592 for(i = 0; i < 2; i++)
593 mii_status = mdio_read(net_dev, phy_addr, MII_STATUS);
594
595 if (mii_status == 0xffff || mii_status == 0x0000) {
596 if (netif_msg_probe(sis_priv))
597 printk(KERN_DEBUG "%s: MII at address %d"
598 " not accessible\n",
599 dev_name, phy_addr);
600 continue;
601 }
602
603 if ((mii_phy = kmalloc(sizeof(struct mii_phy), GFP_KERNEL)) == NULL) {
604 printk(KERN_WARNING "Cannot allocate mem for struct mii_phy\n");
605 mii_phy = sis_priv->first_mii;
606 while (mii_phy) {
607 struct mii_phy *phy;
608 phy = mii_phy;
609 mii_phy = mii_phy->next;
610 kfree(phy);
611 }
612 return 0;
613 }
614
615 mii_phy->phy_id0 = mdio_read(net_dev, phy_addr, MII_PHY_ID0);
616 mii_phy->phy_id1 = mdio_read(net_dev, phy_addr, MII_PHY_ID1);
617 mii_phy->phy_addr = phy_addr;
618 mii_phy->status = mii_status;
619 mii_phy->next = sis_priv->mii;
620 sis_priv->mii = mii_phy;
621 sis_priv->first_mii = mii_phy;
622
623 for (i = 0; mii_chip_table[i].phy_id1; i++)
624 if ((mii_phy->phy_id0 == mii_chip_table[i].phy_id0 ) &&
625 ((mii_phy->phy_id1 & 0xFFF0) == mii_chip_table[i].phy_id1)){
626 mii_phy->phy_types = mii_chip_table[i].phy_types;
627 if (mii_chip_table[i].phy_types == MIX)
628 mii_phy->phy_types =
629 (mii_status & (MII_STAT_CAN_TX_FDX | MII_STAT_CAN_TX)) ? LAN : HOME;
630 printk(KERN_INFO "%s: %s transceiver found "
631 "at address %d.\n",
632 dev_name,
633 mii_chip_table[i].name,
634 phy_addr);
635 break;
636 }
637
638 if( !mii_chip_table[i].phy_id1 ) {
639 printk(KERN_INFO "%s: Unknown PHY transceiver found at address %d.\n",
640 dev_name, phy_addr);
641 mii_phy->phy_types = UNKNOWN;
642 }
643 }
644
645 if (sis_priv->mii == NULL) {
646 printk(KERN_INFO "%s: No MII transceivers found!\n", dev_name);
647 return 0;
648 }
649
650 /* select default PHY for mac */
651 sis_priv->mii = NULL;
652 sis900_default_phy( net_dev );
653
654 /* Reset phy if default phy is internal sis900 */
655 if ((sis_priv->mii->phy_id0 == 0x001D) &&
656 ((sis_priv->mii->phy_id1&0xFFF0) == 0x8000))
657 status = sis900_reset_phy(net_dev, sis_priv->cur_phy);
658
659 /* workaround for ICS1893 PHY */
660 if ((sis_priv->mii->phy_id0 == 0x0015) &&
661 ((sis_priv->mii->phy_id1&0xFFF0) == 0xF440))
662 mdio_write(net_dev, sis_priv->cur_phy, 0x0018, 0xD200);
663
664 if(status & MII_STAT_LINK){
665 while (poll_bit) {
666 yield();
667
668 poll_bit ^= (mdio_read(net_dev, sis_priv->cur_phy, MII_STATUS) & poll_bit);
669 if (time_after_eq(jiffies, timeout)) {
670 printk(KERN_WARNING "%s: reset phy and link down now\n",
671 dev_name);
672 return -ETIME;
673 }
674 }
675 }
676
677 if (sis_priv->chipset_rev == SIS630E_900_REV) {
678 /* SiS 630E has some bugs on default value of PHY registers */
679 mdio_write(net_dev, sis_priv->cur_phy, MII_ANADV, 0x05e1);
680 mdio_write(net_dev, sis_priv->cur_phy, MII_CONFIG1, 0x22);
681 mdio_write(net_dev, sis_priv->cur_phy, MII_CONFIG2, 0xff00);
682 mdio_write(net_dev, sis_priv->cur_phy, MII_MASK, 0xffc0);
683 //mdio_write(net_dev, sis_priv->cur_phy, MII_CONTROL, 0x1000);
684 }
685
686 if (sis_priv->mii->status & MII_STAT_LINK)
687 netif_carrier_on(net_dev);
688 else
689 netif_carrier_off(net_dev);
690
691 return 1;
692 }
693
694 /**
695 * sis900_default_phy - Select default PHY for sis900 mac.
696 * @net_dev: the net device to probe for
697 *
698 * Select first detected PHY with link as default.
699 * If no one is link on, select PHY whose types is HOME as default.
700 * If HOME doesn't exist, select LAN.
701 */
702
703 static u16 sis900_default_phy(struct net_device * net_dev)
704 {
705 struct sis900_private * sis_priv = net_dev->priv;
706 struct mii_phy *phy = NULL, *phy_home = NULL,
707 *default_phy = NULL, *phy_lan = NULL;
708 u16 status;
709
710 for (phy=sis_priv->first_mii; phy; phy=phy->next) {
711 status = mdio_read(net_dev, phy->phy_addr, MII_STATUS);
712 status = mdio_read(net_dev, phy->phy_addr, MII_STATUS);
713
714 /* Link ON & Not select default PHY & not ghost PHY */
715 if ((status & MII_STAT_LINK) && !default_phy &&
716 (phy->phy_types != UNKNOWN))
717 default_phy = phy;
718 else {
719 status = mdio_read(net_dev, phy->phy_addr, MII_CONTROL);
720 mdio_write(net_dev, phy->phy_addr, MII_CONTROL,
721 status | MII_CNTL_AUTO | MII_CNTL_ISOLATE);
722 if (phy->phy_types == HOME)
723 phy_home = phy;
724 else if(phy->phy_types == LAN)
725 phy_lan = phy;
726 }
727 }
728
729 if (!default_phy && phy_home)
730 default_phy = phy_home;
731 else if (!default_phy && phy_lan)
732 default_phy = phy_lan;
733 else if (!default_phy)
734 default_phy = sis_priv->first_mii;
735
736 if (sis_priv->mii != default_phy) {
737 sis_priv->mii = default_phy;
738 sis_priv->cur_phy = default_phy->phy_addr;
739 printk(KERN_INFO "%s: Using transceiver found at address %d as default\n",
740 pci_name(sis_priv->pci_dev), sis_priv->cur_phy);
741 }
742
743 sis_priv->mii_info.phy_id = sis_priv->cur_phy;
744
745 status = mdio_read(net_dev, sis_priv->cur_phy, MII_CONTROL);
746 status &= (~MII_CNTL_ISOLATE);
747
748 mdio_write(net_dev, sis_priv->cur_phy, MII_CONTROL, status);
749 status = mdio_read(net_dev, sis_priv->cur_phy, MII_STATUS);
750 status = mdio_read(net_dev, sis_priv->cur_phy, MII_STATUS);
751
752 return status;
753 }
754
755
756 /**
757 * sis900_set_capability - set the media capability of network adapter.
758 * @net_dev : the net device to probe for
759 * @phy : default PHY
760 *
761 * Set the media capability of network adapter according to
762 * mii status register. It's necessary before auto-negotiate.
763 */
764
765 static void sis900_set_capability(struct net_device *net_dev, struct mii_phy *phy)
766 {
767 u16 cap;
768 u16 status;
769
770 status = mdio_read(net_dev, phy->phy_addr, MII_STATUS);
771 status = mdio_read(net_dev, phy->phy_addr, MII_STATUS);
772
773 cap = MII_NWAY_CSMA_CD |
774 ((phy->status & MII_STAT_CAN_TX_FDX)? MII_NWAY_TX_FDX:0) |
775 ((phy->status & MII_STAT_CAN_TX) ? MII_NWAY_TX:0) |
776 ((phy->status & MII_STAT_CAN_T_FDX) ? MII_NWAY_T_FDX:0)|
777 ((phy->status & MII_STAT_CAN_T) ? MII_NWAY_T:0);
778
779 mdio_write(net_dev, phy->phy_addr, MII_ANADV, cap);
780 }
781
782
783 /* Delay between EEPROM clock transitions. */
784 #define eeprom_delay() inl(ee_addr)
785
786 /**
787 * read_eeprom - Read Serial EEPROM
788 * @ioaddr: base i/o address
789 * @location: the EEPROM location to read
790 *
791 * Read Serial EEPROM through EEPROM Access Register.
792 * Note that location is in word (16 bits) unit
793 */
794
795 static u16 __devinit read_eeprom(long ioaddr, int location)
796 {
797 int i;
798 u16 retval = 0;
799 long ee_addr = ioaddr + mear;
800 u32 read_cmd = location | EEread;
801
802 outl(0, ee_addr);
803 eeprom_delay();
804 outl(EECS, ee_addr);
805 eeprom_delay();
806
807 /* Shift the read command (9) bits out. */
808 for (i = 8; i >= 0; i--) {
809 u32 dataval = (read_cmd & (1 << i)) ? EEDI | EECS : EECS;
810 outl(dataval, ee_addr);
811 eeprom_delay();
812 outl(dataval | EECLK, ee_addr);
813 eeprom_delay();
814 }
815 outl(EECS, ee_addr);
816 eeprom_delay();
817
818 /* read the 16-bits data in */
819 for (i = 16; i > 0; i--) {
820 outl(EECS, ee_addr);
821 eeprom_delay();
822 outl(EECS | EECLK, ee_addr);
823 eeprom_delay();
824 retval = (retval << 1) | ((inl(ee_addr) & EEDO) ? 1 : 0);
825 eeprom_delay();
826 }
827
828 /* Terminate the EEPROM access. */
829 outl(0, ee_addr);
830 eeprom_delay();
831
832 return (retval);
833 }
834
835 /* Read and write the MII management registers using software-generated
836 serial MDIO protocol. Note that the command bits and data bits are
837 send out separately */
838 #define mdio_delay() inl(mdio_addr)
839
840 static void mdio_idle(long mdio_addr)
841 {
842 outl(MDIO | MDDIR, mdio_addr);
843 mdio_delay();
844 outl(MDIO | MDDIR | MDC, mdio_addr);
845 }
846
847 /* Syncronize the MII management interface by shifting 32 one bits out. */
848 static void mdio_reset(long mdio_addr)
849 {
850 int i;
851
852 for (i = 31; i >= 0; i--) {
853 outl(MDDIR | MDIO, mdio_addr);
854 mdio_delay();
855 outl(MDDIR | MDIO | MDC, mdio_addr);
856 mdio_delay();
857 }
858 return;
859 }
860
861 /**
862 * mdio_read - read MII PHY register
863 * @net_dev: the net device to read
864 * @phy_id: the phy address to read
865 * @location: the phy regiester id to read
866 *
867 * Read MII registers through MDIO and MDC
868 * using MDIO management frame structure and protocol(defined by ISO/IEC).
869 * Please see SiS7014 or ICS spec
870 */
871
872 static int mdio_read(struct net_device *net_dev, int phy_id, int location)
873 {
874 long mdio_addr = net_dev->base_addr + mear;
875 int mii_cmd = MIIread|(phy_id<<MIIpmdShift)|(location<<MIIregShift);
876 u16 retval = 0;
877 int i;
878
879 mdio_reset(mdio_addr);
880 mdio_idle(mdio_addr);
881
882 for (i = 15; i >= 0; i--) {
883 int dataval = (mii_cmd & (1 << i)) ? MDDIR | MDIO : MDDIR;
884 outl(dataval, mdio_addr);
885 mdio_delay();
886 outl(dataval | MDC, mdio_addr);
887 mdio_delay();
888 }
889
890 /* Read the 16 data bits. */
891 for (i = 16; i > 0; i--) {
892 outl(0, mdio_addr);
893 mdio_delay();
894 retval = (retval << 1) | ((inl(mdio_addr) & MDIO) ? 1 : 0);
895 outl(MDC, mdio_addr);
896 mdio_delay();
897 }
898 outl(0x00, mdio_addr);
899
900 return retval;
901 }
902
903 /**
904 * mdio_write - write MII PHY register
905 * @net_dev: the net device to write
906 * @phy_id: the phy address to write
907 * @location: the phy regiester id to write
908 * @value: the register value to write with
909 *
910 * Write MII registers with @value through MDIO and MDC
911 * using MDIO management frame structure and protocol(defined by ISO/IEC)
912 * please see SiS7014 or ICS spec
913 */
914
915 static void mdio_write(struct net_device *net_dev, int phy_id, int location,
916 int value)
917 {
918 long mdio_addr = net_dev->base_addr + mear;
919 int mii_cmd = MIIwrite|(phy_id<<MIIpmdShift)|(location<<MIIregShift);
920 int i;
921
922 mdio_reset(mdio_addr);
923 mdio_idle(mdio_addr);
924
925 /* Shift the command bits out. */
926 for (i = 15; i >= 0; i--) {
927 int dataval = (mii_cmd & (1 << i)) ? MDDIR | MDIO : MDDIR;
928 outb(dataval, mdio_addr);
929 mdio_delay();
930 outb(dataval | MDC, mdio_addr);
931 mdio_delay();
932 }
933 mdio_delay();
934
935 /* Shift the value bits out. */
936 for (i = 15; i >= 0; i--) {
937 int dataval = (value & (1 << i)) ? MDDIR | MDIO : MDDIR;
938 outl(dataval, mdio_addr);
939 mdio_delay();
940 outl(dataval | MDC, mdio_addr);
941 mdio_delay();
942 }
943 mdio_delay();
944
945 /* Clear out extra bits. */
946 for (i = 2; i > 0; i--) {
947 outb(0, mdio_addr);
948 mdio_delay();
949 outb(MDC, mdio_addr);
950 mdio_delay();
951 }
952 outl(0x00, mdio_addr);
953
954 return;
955 }
956
957
958 /**
959 * sis900_reset_phy - reset sis900 mii phy.
960 * @net_dev: the net device to write
961 * @phy_addr: default phy address
962 *
963 * Some specific phy can't work properly without reset.
964 * This function will be called during initialization and
965 * link status change from ON to DOWN.
966 */
967
968 static u16 sis900_reset_phy(struct net_device *net_dev, int phy_addr)
969 {
970 int i;
971 u16 status;
972
973 for (i = 0; i < 2; i++)
974 status = mdio_read(net_dev, phy_addr, MII_STATUS);
975
976 mdio_write( net_dev, phy_addr, MII_CONTROL, MII_CNTL_RESET );
977
978 return status;
979 }
980
981 #ifdef CONFIG_NET_POLL_CONTROLLER
982 /*
983 * Polling 'interrupt' - used by things like netconsole to send skbs
984 * without having to re-enable interrupts. It's not called while
985 * the interrupt routine is executing.
986 */
987 static void sis900_poll(struct net_device *dev)
988 {
989 disable_irq(dev->irq);
990 sis900_interrupt(dev->irq, dev);
991 enable_irq(dev->irq);
992 }
993 #endif
994
995 /**
996 * sis900_open - open sis900 device
997 * @net_dev: the net device to open
998 *
999 * Do some initialization and start net interface.
1000 * enable interrupts and set sis900 timer.
1001 */
1002
1003 static int
1004 sis900_open(struct net_device *net_dev)
1005 {
1006 struct sis900_private *sis_priv = net_dev->priv;
1007 long ioaddr = net_dev->base_addr;
1008 int ret;
1009
1010 /* Soft reset the chip. */
1011 sis900_reset(net_dev);
1012
1013 /* Equalizer workaround Rule */
1014 sis630_set_eq(net_dev, sis_priv->chipset_rev);
1015
1016 ret = request_irq(net_dev->irq, &sis900_interrupt, IRQF_SHARED,
1017 net_dev->name, net_dev);
1018 if (ret)
1019 return ret;
1020
1021 sis900_init_rxfilter(net_dev);
1022
1023 sis900_init_tx_ring(net_dev);
1024 sis900_init_rx_ring(net_dev);
1025
1026 set_rx_mode(net_dev);
1027
1028 netif_start_queue(net_dev);
1029
1030 /* Workaround for EDB */
1031 sis900_set_mode(ioaddr, HW_SPEED_10_MBPS, FDX_CAPABLE_HALF_SELECTED);
1032
1033 /* Enable all known interrupts by setting the interrupt mask. */
1034 outl((RxSOVR|RxORN|RxERR|RxOK|TxURN|TxERR|TxIDLE), ioaddr + imr);
1035 outl(RxENA | inl(ioaddr + cr), ioaddr + cr);
1036 outl(IE, ioaddr + ier);
1037
1038 sis900_check_mode(net_dev, sis_priv->mii);
1039
1040 /* Set the timer to switch to check for link beat and perhaps switch
1041 to an alternate media type. */
1042 init_timer(&sis_priv->timer);
1043 sis_priv->timer.expires = jiffies + HZ;
1044 sis_priv->timer.data = (unsigned long)net_dev;
1045 sis_priv->timer.function = &sis900_timer;
1046 add_timer(&sis_priv->timer);
1047
1048 return 0;
1049 }
1050
1051 /**
1052 * sis900_init_rxfilter - Initialize the Rx filter
1053 * @net_dev: the net device to initialize for
1054 *
1055 * Set receive filter address to our MAC address
1056 * and enable packet filtering.
1057 */
1058
1059 static void
1060 sis900_init_rxfilter (struct net_device * net_dev)
1061 {
1062 struct sis900_private *sis_priv = net_dev->priv;
1063 long ioaddr = net_dev->base_addr;
1064 u32 rfcrSave;
1065 u32 i;
1066
1067 rfcrSave = inl(rfcr + ioaddr);
1068
1069 /* disable packet filtering before setting filter */
1070 outl(rfcrSave & ~RFEN, rfcr + ioaddr);
1071
1072 /* load MAC addr to filter data register */
1073 for (i = 0 ; i < 3 ; i++) {
1074 u32 w;
1075
1076 w = (u32) *((u16 *)(net_dev->dev_addr)+i);
1077 outl((i << RFADDR_shift), ioaddr + rfcr);
1078 outl(w, ioaddr + rfdr);
1079
1080 if (netif_msg_hw(sis_priv)) {
1081 printk(KERN_DEBUG "%s: Receive Filter Addrss[%d]=%x\n",
1082 net_dev->name, i, inl(ioaddr + rfdr));
1083 }
1084 }
1085
1086 /* enable packet filtering */
1087 outl(rfcrSave | RFEN, rfcr + ioaddr);
1088 }
1089
1090 /**
1091 * sis900_init_tx_ring - Initialize the Tx descriptor ring
1092 * @net_dev: the net device to initialize for
1093 *
1094 * Initialize the Tx descriptor ring,
1095 */
1096
1097 static void
1098 sis900_init_tx_ring(struct net_device *net_dev)
1099 {
1100 struct sis900_private *sis_priv = net_dev->priv;
1101 long ioaddr = net_dev->base_addr;
1102 int i;
1103
1104 sis_priv->tx_full = 0;
1105 sis_priv->dirty_tx = sis_priv->cur_tx = 0;
1106
1107 for (i = 0; i < NUM_TX_DESC; i++) {
1108 sis_priv->tx_skbuff[i] = NULL;
1109
1110 sis_priv->tx_ring[i].link = sis_priv->tx_ring_dma +
1111 ((i+1)%NUM_TX_DESC)*sizeof(BufferDesc);
1112 sis_priv->tx_ring[i].cmdsts = 0;
1113 sis_priv->tx_ring[i].bufptr = 0;
1114 }
1115
1116 /* load Transmit Descriptor Register */
1117 outl(sis_priv->tx_ring_dma, ioaddr + txdp);
1118 if (netif_msg_hw(sis_priv))
1119 printk(KERN_DEBUG "%s: TX descriptor register loaded with: %8.8x\n",
1120 net_dev->name, inl(ioaddr + txdp));
1121 }
1122
1123 /**
1124 * sis900_init_rx_ring - Initialize the Rx descriptor ring
1125 * @net_dev: the net device to initialize for
1126 *
1127 * Initialize the Rx descriptor ring,
1128 * and pre-allocate recevie buffers (socket buffer)
1129 */
1130
1131 static void
1132 sis900_init_rx_ring(struct net_device *net_dev)
1133 {
1134 struct sis900_private *sis_priv = net_dev->priv;
1135 long ioaddr = net_dev->base_addr;
1136 int i;
1137
1138 sis_priv->cur_rx = 0;
1139 sis_priv->dirty_rx = 0;
1140
1141 /* init RX descriptor */
1142 for (i = 0; i < NUM_RX_DESC; i++) {
1143 sis_priv->rx_skbuff[i] = NULL;
1144
1145 sis_priv->rx_ring[i].link = sis_priv->rx_ring_dma +
1146 ((i+1)%NUM_RX_DESC)*sizeof(BufferDesc);
1147 sis_priv->rx_ring[i].cmdsts = 0;
1148 sis_priv->rx_ring[i].bufptr = 0;
1149 }
1150
1151 /* allocate sock buffers */
1152 for (i = 0; i < NUM_RX_DESC; i++) {
1153 struct sk_buff *skb;
1154
1155 if ((skb = dev_alloc_skb(RX_BUF_SIZE)) == NULL) {
1156 /* not enough memory for skbuff, this makes a "hole"
1157 on the buffer ring, it is not clear how the
1158 hardware will react to this kind of degenerated
1159 buffer */
1160 break;
1161 }
1162 sis_priv->rx_skbuff[i] = skb;
1163 sis_priv->rx_ring[i].cmdsts = RX_BUF_SIZE;
1164 sis_priv->rx_ring[i].bufptr = pci_map_single(sis_priv->pci_dev,
1165 skb->data, RX_BUF_SIZE, PCI_DMA_FROMDEVICE);
1166 }
1167 sis_priv->dirty_rx = (unsigned int) (i - NUM_RX_DESC);
1168
1169 /* load Receive Descriptor Register */
1170 outl(sis_priv->rx_ring_dma, ioaddr + rxdp);
1171 if (netif_msg_hw(sis_priv))
1172 printk(KERN_DEBUG "%s: RX descriptor register loaded with: %8.8x\n",
1173 net_dev->name, inl(ioaddr + rxdp));
1174 }
1175
1176 /**
1177 * sis630_set_eq - set phy equalizer value for 630 LAN
1178 * @net_dev: the net device to set equalizer value
1179 * @revision: 630 LAN revision number
1180 *
1181 * 630E equalizer workaround rule(Cyrus Huang 08/15)
1182 * PHY register 14h(Test)
1183 * Bit 14: 0 -- Automatically dectect (default)
1184 * 1 -- Manually set Equalizer filter
1185 * Bit 13: 0 -- (Default)
1186 * 1 -- Speed up convergence of equalizer setting
1187 * Bit 9 : 0 -- (Default)
1188 * 1 -- Disable Baseline Wander
1189 * Bit 3~7 -- Equalizer filter setting
1190 * Link ON: Set Bit 9, 13 to 1, Bit 14 to 0
1191 * Then calculate equalizer value
1192 * Then set equalizer value, and set Bit 14 to 1, Bit 9 to 0
1193 * Link Off:Set Bit 13 to 1, Bit 14 to 0
1194 * Calculate Equalizer value:
1195 * When Link is ON and Bit 14 is 0, SIS900PHY will auto-dectect proper equalizer value.
1196 * When the equalizer is stable, this value is not a fixed value. It will be within
1197 * a small range(eg. 7~9). Then we get a minimum and a maximum value(eg. min=7, max=9)
1198 * 0 <= max <= 4 --> set equalizer to max
1199 * 5 <= max <= 14 --> set equalizer to max+1 or set equalizer to max+2 if max == min
1200 * max >= 15 --> set equalizer to max+5 or set equalizer to max+6 if max == min
1201 */
1202
1203 static void sis630_set_eq(struct net_device *net_dev, u8 revision)
1204 {
1205 struct sis900_private *sis_priv = net_dev->priv;
1206 u16 reg14h, eq_value=0, max_value=0, min_value=0;
1207 int i, maxcount=10;
1208
1209 if ( !(revision == SIS630E_900_REV || revision == SIS630EA1_900_REV ||
1210 revision == SIS630A_900_REV || revision == SIS630ET_900_REV) )
1211 return;
1212
1213 if (netif_carrier_ok(net_dev)) {
1214 reg14h = mdio_read(net_dev, sis_priv->cur_phy, MII_RESV);
1215 mdio_write(net_dev, sis_priv->cur_phy, MII_RESV,
1216 (0x2200 | reg14h) & 0xBFFF);
1217 for (i=0; i < maxcount; i++) {
1218 eq_value = (0x00F8 & mdio_read(net_dev,
1219 sis_priv->cur_phy, MII_RESV)) >> 3;
1220 if (i == 0)
1221 max_value=min_value=eq_value;
1222 max_value = (eq_value > max_value) ?
1223 eq_value : max_value;
1224 min_value = (eq_value < min_value) ?
1225 eq_value : min_value;
1226 }
1227 /* 630E rule to determine the equalizer value */
1228 if (revision == SIS630E_900_REV || revision == SIS630EA1_900_REV ||
1229 revision == SIS630ET_900_REV) {
1230 if (max_value < 5)
1231 eq_value = max_value;
1232 else if (max_value >= 5 && max_value < 15)
1233 eq_value = (max_value == min_value) ?
1234 max_value+2 : max_value+1;
1235 else if (max_value >= 15)
1236 eq_value=(max_value == min_value) ?
1237 max_value+6 : max_value+5;
1238 }
1239 /* 630B0&B1 rule to determine the equalizer value */
1240 if (revision == SIS630A_900_REV &&
1241 (sis_priv->host_bridge_rev == SIS630B0 ||
1242 sis_priv->host_bridge_rev == SIS630B1)) {
1243 if (max_value == 0)
1244 eq_value = 3;
1245 else
1246 eq_value = (max_value + min_value + 1)/2;
1247 }
1248 /* write equalizer value and setting */
1249 reg14h = mdio_read(net_dev, sis_priv->cur_phy, MII_RESV);
1250 reg14h = (reg14h & 0xFF07) | ((eq_value << 3) & 0x00F8);
1251 reg14h = (reg14h | 0x6000) & 0xFDFF;
1252 mdio_write(net_dev, sis_priv->cur_phy, MII_RESV, reg14h);
1253 } else {
1254 reg14h = mdio_read(net_dev, sis_priv->cur_phy, MII_RESV);
1255 if (revision == SIS630A_900_REV &&
1256 (sis_priv->host_bridge_rev == SIS630B0 ||
1257 sis_priv->host_bridge_rev == SIS630B1))
1258 mdio_write(net_dev, sis_priv->cur_phy, MII_RESV,
1259 (reg14h | 0x2200) & 0xBFFF);
1260 else
1261 mdio_write(net_dev, sis_priv->cur_phy, MII_RESV,
1262 (reg14h | 0x2000) & 0xBFFF);
1263 }
1264 return;
1265 }
1266
1267 /**
1268 * sis900_timer - sis900 timer routine
1269 * @data: pointer to sis900 net device
1270 *
1271 * On each timer ticks we check two things,
1272 * link status (ON/OFF) and link mode (10/100/Full/Half)
1273 */
1274
1275 static void sis900_timer(unsigned long data)
1276 {
1277 struct net_device *net_dev = (struct net_device *)data;
1278 struct sis900_private *sis_priv = net_dev->priv;
1279 struct mii_phy *mii_phy = sis_priv->mii;
1280 static const int next_tick = 5*HZ;
1281 u16 status;
1282
1283 if (!sis_priv->autong_complete){
1284 int speed, duplex = 0;
1285
1286 sis900_read_mode(net_dev, &speed, &duplex);
1287 if (duplex){
1288 sis900_set_mode(net_dev->base_addr, speed, duplex);
1289 sis630_set_eq(net_dev, sis_priv->chipset_rev);
1290 netif_start_queue(net_dev);
1291 }
1292
1293 sis_priv->timer.expires = jiffies + HZ;
1294 add_timer(&sis_priv->timer);
1295 return;
1296 }
1297
1298 status = mdio_read(net_dev, sis_priv->cur_phy, MII_STATUS);
1299 status = mdio_read(net_dev, sis_priv->cur_phy, MII_STATUS);
1300
1301 /* Link OFF -> ON */
1302 if (!netif_carrier_ok(net_dev)) {
1303 LookForLink:
1304 /* Search for new PHY */
1305 status = sis900_default_phy(net_dev);
1306 mii_phy = sis_priv->mii;
1307
1308 if (status & MII_STAT_LINK){
1309 sis900_check_mode(net_dev, mii_phy);
1310 netif_carrier_on(net_dev);
1311 }
1312 } else {
1313 /* Link ON -> OFF */
1314 if (!(status & MII_STAT_LINK)){
1315 netif_carrier_off(net_dev);
1316 if(netif_msg_link(sis_priv))
1317 printk(KERN_INFO "%s: Media Link Off\n", net_dev->name);
1318
1319 /* Change mode issue */
1320 if ((mii_phy->phy_id0 == 0x001D) &&
1321 ((mii_phy->phy_id1 & 0xFFF0) == 0x8000))
1322 sis900_reset_phy(net_dev, sis_priv->cur_phy);
1323
1324 sis630_set_eq(net_dev, sis_priv->chipset_rev);
1325
1326 goto LookForLink;
1327 }
1328 }
1329
1330 sis_priv->timer.expires = jiffies + next_tick;
1331 add_timer(&sis_priv->timer);
1332 }
1333
1334 /**
1335 * sis900_check_mode - check the media mode for sis900
1336 * @net_dev: the net device to be checked
1337 * @mii_phy: the mii phy
1338 *
1339 * Older driver gets the media mode from mii status output
1340 * register. Now we set our media capability and auto-negotiate
1341 * to get the upper bound of speed and duplex between two ends.
1342 * If the types of mii phy is HOME, it doesn't need to auto-negotiate
1343 * and autong_complete should be set to 1.
1344 */
1345
1346 static void sis900_check_mode(struct net_device *net_dev, struct mii_phy *mii_phy)
1347 {
1348 struct sis900_private *sis_priv = net_dev->priv;
1349 long ioaddr = net_dev->base_addr;
1350 int speed, duplex;
1351
1352 if (mii_phy->phy_types == LAN) {
1353 outl(~EXD & inl(ioaddr + cfg), ioaddr + cfg);
1354 sis900_set_capability(net_dev , mii_phy);
1355 sis900_auto_negotiate(net_dev, sis_priv->cur_phy);
1356 } else {
1357 outl(EXD | inl(ioaddr + cfg), ioaddr + cfg);
1358 speed = HW_SPEED_HOME;
1359 duplex = FDX_CAPABLE_HALF_SELECTED;
1360 sis900_set_mode(ioaddr, speed, duplex);
1361 sis_priv->autong_complete = 1;
1362 }
1363 }
1364
1365 /**
1366 * sis900_set_mode - Set the media mode of mac register.
1367 * @ioaddr: the address of the device
1368 * @speed : the transmit speed to be determined
1369 * @duplex: the duplex mode to be determined
1370 *
1371 * Set the media mode of mac register txcfg/rxcfg according to
1372 * speed and duplex of phy. Bit EDB_MASTER_EN indicates the EDB
1373 * bus is used instead of PCI bus. When this bit is set 1, the
1374 * Max DMA Burst Size for TX/RX DMA should be no larger than 16
1375 * double words.
1376 */
1377
1378 static void sis900_set_mode (long ioaddr, int speed, int duplex)
1379 {
1380 u32 tx_flags = 0, rx_flags = 0;
1381
1382 if (inl(ioaddr + cfg) & EDB_MASTER_EN) {
1383 tx_flags = TxATP | (DMA_BURST_64 << TxMXDMA_shift) |
1384 (TX_FILL_THRESH << TxFILLT_shift);
1385 rx_flags = DMA_BURST_64 << RxMXDMA_shift;
1386 } else {
1387 tx_flags = TxATP | (DMA_BURST_512 << TxMXDMA_shift) |
1388 (TX_FILL_THRESH << TxFILLT_shift);
1389 rx_flags = DMA_BURST_512 << RxMXDMA_shift;
1390 }
1391
1392 if (speed == HW_SPEED_HOME || speed == HW_SPEED_10_MBPS) {
1393 rx_flags |= (RxDRNT_10 << RxDRNT_shift);
1394 tx_flags |= (TxDRNT_10 << TxDRNT_shift);
1395 } else {
1396 rx_flags |= (RxDRNT_100 << RxDRNT_shift);
1397 tx_flags |= (TxDRNT_100 << TxDRNT_shift);
1398 }
1399
1400 if (duplex == FDX_CAPABLE_FULL_SELECTED) {
1401 tx_flags |= (TxCSI | TxHBI);
1402 rx_flags |= RxATX;
1403 }
1404
1405 #if defined(CONFIG_VLAN_8021Q) || defined(CONFIG_VLAN_8021Q_MODULE)
1406 /* Can accept Jumbo packet */
1407 rx_flags |= RxAJAB;
1408 #endif
1409
1410 outl (tx_flags, ioaddr + txcfg);
1411 outl (rx_flags, ioaddr + rxcfg);
1412 }
1413
1414 /**
1415 * sis900_auto_negotiate - Set the Auto-Negotiation Enable/Reset bit.
1416 * @net_dev: the net device to read mode for
1417 * @phy_addr: mii phy address
1418 *
1419 * If the adapter is link-on, set the auto-negotiate enable/reset bit.
1420 * autong_complete should be set to 0 when starting auto-negotiation.
1421 * autong_complete should be set to 1 if we didn't start auto-negotiation.
1422 * sis900_timer will wait for link on again if autong_complete = 0.
1423 */
1424
1425 static void sis900_auto_negotiate(struct net_device *net_dev, int phy_addr)
1426 {
1427 struct sis900_private *sis_priv = net_dev->priv;
1428 int i = 0;
1429 u32 status;
1430
1431 for (i = 0; i < 2; i++)
1432 status = mdio_read(net_dev, phy_addr, MII_STATUS);
1433
1434 if (!(status & MII_STAT_LINK)){
1435 if(netif_msg_link(sis_priv))
1436 printk(KERN_INFO "%s: Media Link Off\n", net_dev->name);
1437 sis_priv->autong_complete = 1;
1438 netif_carrier_off(net_dev);
1439 return;
1440 }
1441
1442 /* (Re)start AutoNegotiate */
1443 mdio_write(net_dev, phy_addr, MII_CONTROL,
1444 MII_CNTL_AUTO | MII_CNTL_RST_AUTO);
1445 sis_priv->autong_complete = 0;
1446 }
1447
1448
1449 /**
1450 * sis900_read_mode - read media mode for sis900 internal phy
1451 * @net_dev: the net device to read mode for
1452 * @speed : the transmit speed to be determined
1453 * @duplex : the duplex mode to be determined
1454 *
1455 * The capability of remote end will be put in mii register autorec
1456 * after auto-negotiation. Use AND operation to get the upper bound
1457 * of speed and duplex between two ends.
1458 */
1459
1460 static void sis900_read_mode(struct net_device *net_dev, int *speed, int *duplex)
1461 {
1462 struct sis900_private *sis_priv = net_dev->priv;
1463 struct mii_phy *phy = sis_priv->mii;
1464 int phy_addr = sis_priv->cur_phy;
1465 u32 status;
1466 u16 autoadv, autorec;
1467 int i;
1468
1469 for (i = 0; i < 2; i++)
1470 status = mdio_read(net_dev, phy_addr, MII_STATUS);
1471
1472 if (!(status & MII_STAT_LINK))
1473 return;
1474
1475 /* AutoNegotiate completed */
1476 autoadv = mdio_read(net_dev, phy_addr, MII_ANADV);
1477 autorec = mdio_read(net_dev, phy_addr, MII_ANLPAR);
1478 status = autoadv & autorec;
1479
1480 *speed = HW_SPEED_10_MBPS;
1481 *duplex = FDX_CAPABLE_HALF_SELECTED;
1482
1483 if (status & (MII_NWAY_TX | MII_NWAY_TX_FDX))
1484 *speed = HW_SPEED_100_MBPS;
1485 if (status & ( MII_NWAY_TX_FDX | MII_NWAY_T_FDX))
1486 *duplex = FDX_CAPABLE_FULL_SELECTED;
1487
1488 sis_priv->autong_complete = 1;
1489
1490 /* Workaround for Realtek RTL8201 PHY issue */
1491 if ((phy->phy_id0 == 0x0000) && ((phy->phy_id1 & 0xFFF0) == 0x8200)) {
1492 if (mdio_read(net_dev, phy_addr, MII_CONTROL) & MII_CNTL_FDX)
1493 *duplex = FDX_CAPABLE_FULL_SELECTED;
1494 if (mdio_read(net_dev, phy_addr, 0x0019) & 0x01)
1495 *speed = HW_SPEED_100_MBPS;
1496 }
1497
1498 if(netif_msg_link(sis_priv))
1499 printk(KERN_INFO "%s: Media Link On %s %s-duplex \n",
1500 net_dev->name,
1501 *speed == HW_SPEED_100_MBPS ?
1502 "100mbps" : "10mbps",
1503 *duplex == FDX_CAPABLE_FULL_SELECTED ?
1504 "full" : "half");
1505 }
1506
1507 /**
1508 * sis900_tx_timeout - sis900 transmit timeout routine
1509 * @net_dev: the net device to transmit
1510 *
1511 * print transmit timeout status
1512 * disable interrupts and do some tasks
1513 */
1514
1515 static void sis900_tx_timeout(struct net_device *net_dev)
1516 {
1517 struct sis900_private *sis_priv = net_dev->priv;
1518 long ioaddr = net_dev->base_addr;
1519 unsigned long flags;
1520 int i;
1521
1522 if(netif_msg_tx_err(sis_priv))
1523 printk(KERN_INFO "%s: Transmit timeout, status %8.8x %8.8x \n",
1524 net_dev->name, inl(ioaddr + cr), inl(ioaddr + isr));
1525
1526 /* Disable interrupts by clearing the interrupt mask. */
1527 outl(0x0000, ioaddr + imr);
1528
1529 /* use spinlock to prevent interrupt handler accessing buffer ring */
1530 spin_lock_irqsave(&sis_priv->lock, flags);
1531
1532 /* discard unsent packets */
1533 sis_priv->dirty_tx = sis_priv->cur_tx = 0;
1534 for (i = 0; i < NUM_TX_DESC; i++) {
1535 struct sk_buff *skb = sis_priv->tx_skbuff[i];
1536
1537 if (skb) {
1538 pci_unmap_single(sis_priv->pci_dev,
1539 sis_priv->tx_ring[i].bufptr, skb->len,
1540 PCI_DMA_TODEVICE);
1541 dev_kfree_skb_irq(skb);
1542 sis_priv->tx_skbuff[i] = NULL;
1543 sis_priv->tx_ring[i].cmdsts = 0;
1544 sis_priv->tx_ring[i].bufptr = 0;
1545 sis_priv->stats.tx_dropped++;
1546 }
1547 }
1548 sis_priv->tx_full = 0;
1549 netif_wake_queue(net_dev);
1550
1551 spin_unlock_irqrestore(&sis_priv->lock, flags);
1552
1553 net_dev->trans_start = jiffies;
1554
1555 /* load Transmit Descriptor Register */
1556 outl(sis_priv->tx_ring_dma, ioaddr + txdp);
1557
1558 /* Enable all known interrupts by setting the interrupt mask. */
1559 outl((RxSOVR|RxORN|RxERR|RxOK|TxURN|TxERR|TxIDLE), ioaddr + imr);
1560 return;
1561 }
1562
1563 /**
1564 * sis900_start_xmit - sis900 start transmit routine
1565 * @skb: socket buffer pointer to put the data being transmitted
1566 * @net_dev: the net device to transmit with
1567 *
1568 * Set the transmit buffer descriptor,
1569 * and write TxENA to enable transmit state machine.
1570 * tell upper layer if the buffer is full
1571 */
1572
1573 static int
1574 sis900_start_xmit(struct sk_buff *skb, struct net_device *net_dev)
1575 {
1576 struct sis900_private *sis_priv = net_dev->priv;
1577 long ioaddr = net_dev->base_addr;
1578 unsigned int entry;
1579 unsigned long flags;
1580 unsigned int index_cur_tx, index_dirty_tx;
1581 unsigned int count_dirty_tx;
1582
1583 /* Don't transmit data before the complete of auto-negotiation */
1584 if(!sis_priv->autong_complete){
1585 netif_stop_queue(net_dev);
1586 return 1;
1587 }
1588
1589 spin_lock_irqsave(&sis_priv->lock, flags);
1590
1591 /* Calculate the next Tx descriptor entry. */
1592 entry = sis_priv->cur_tx % NUM_TX_DESC;
1593 sis_priv->tx_skbuff[entry] = skb;
1594
1595 /* set the transmit buffer descriptor and enable Transmit State Machine */
1596 sis_priv->tx_ring[entry].bufptr = pci_map_single(sis_priv->pci_dev,
1597 skb->data, skb->len, PCI_DMA_TODEVICE);
1598 sis_priv->tx_ring[entry].cmdsts = (OWN | skb->len);
1599 outl(TxENA | inl(ioaddr + cr), ioaddr + cr);
1600
1601 sis_priv->cur_tx ++;
1602 index_cur_tx = sis_priv->cur_tx;
1603 index_dirty_tx = sis_priv->dirty_tx;
1604
1605 for (count_dirty_tx = 0; index_cur_tx != index_dirty_tx; index_dirty_tx++)
1606 count_dirty_tx ++;
1607
1608 if (index_cur_tx == index_dirty_tx) {
1609 /* dirty_tx is met in the cycle of cur_tx, buffer full */
1610 sis_priv->tx_full = 1;
1611 netif_stop_queue(net_dev);
1612 } else if (count_dirty_tx < NUM_TX_DESC) {
1613 /* Typical path, tell upper layer that more transmission is possible */
1614 netif_start_queue(net_dev);
1615 } else {
1616 /* buffer full, tell upper layer no more transmission */
1617 sis_priv->tx_full = 1;
1618 netif_stop_queue(net_dev);
1619 }
1620
1621 spin_unlock_irqrestore(&sis_priv->lock, flags);
1622
1623 net_dev->trans_start = jiffies;
1624
1625 if (netif_msg_tx_queued(sis_priv))
1626 printk(KERN_DEBUG "%s: Queued Tx packet at %p size %d "
1627 "to slot %d.\n",
1628 net_dev->name, skb->data, (int)skb->len, entry);
1629
1630 return 0;
1631 }
1632
1633 /**
1634 * sis900_interrupt - sis900 interrupt handler
1635 * @irq: the irq number
1636 * @dev_instance: the client data object
1637 * @regs: snapshot of processor context
1638 *
1639 * The interrupt handler does all of the Rx thread work,
1640 * and cleans up after the Tx thread
1641 */
1642
1643 static irqreturn_t sis900_interrupt(int irq, void *dev_instance)
1644 {
1645 struct net_device *net_dev = dev_instance;
1646 struct sis900_private *sis_priv = net_dev->priv;
1647 int boguscnt = max_interrupt_work;
1648 long ioaddr = net_dev->base_addr;
1649 u32 status;
1650 unsigned int handled = 0;
1651
1652 spin_lock (&sis_priv->lock);
1653
1654 do {
1655 status = inl(ioaddr + isr);
1656
1657 if ((status & (HIBERR|TxURN|TxERR|TxIDLE|RxORN|RxERR|RxOK)) == 0)
1658 /* nothing intresting happened */
1659 break;
1660 handled = 1;
1661
1662 /* why dow't we break after Tx/Rx case ?? keyword: full-duplex */
1663 if (status & (RxORN | RxERR | RxOK))
1664 /* Rx interrupt */
1665 sis900_rx(net_dev);
1666
1667 if (status & (TxURN | TxERR | TxIDLE))
1668 /* Tx interrupt */
1669 sis900_finish_xmit(net_dev);
1670
1671 /* something strange happened !!! */
1672 if (status & HIBERR) {
1673 if(netif_msg_intr(sis_priv))
1674 printk(KERN_INFO "%s: Abnormal interrupt,"
1675 "status %#8.8x.\n", net_dev->name, status);
1676 break;
1677 }
1678 if (--boguscnt < 0) {
1679 if(netif_msg_intr(sis_priv))
1680 printk(KERN_INFO "%s: Too much work at interrupt, "
1681 "interrupt status = %#8.8x.\n",
1682 net_dev->name, status);
1683 break;
1684 }
1685 } while (1);
1686
1687 if(netif_msg_intr(sis_priv))
1688 printk(KERN_DEBUG "%s: exiting interrupt, "
1689 "interrupt status = 0x%#8.8x.\n",
1690 net_dev->name, inl(ioaddr + isr));
1691
1692 spin_unlock (&sis_priv->lock);
1693 return IRQ_RETVAL(handled);
1694 }
1695
1696 /**
1697 * sis900_rx - sis900 receive routine
1698 * @net_dev: the net device which receives data
1699 *
1700 * Process receive interrupt events,
1701 * put buffer to higher layer and refill buffer pool
1702 * Note: This function is called by interrupt handler,
1703 * don't do "too much" work here
1704 */
1705
1706 static int sis900_rx(struct net_device *net_dev)
1707 {
1708 struct sis900_private *sis_priv = net_dev->priv;
1709 long ioaddr = net_dev->base_addr;
1710 unsigned int entry = sis_priv->cur_rx % NUM_RX_DESC;
1711 u32 rx_status = sis_priv->rx_ring[entry].cmdsts;
1712 int rx_work_limit;
1713
1714 if (netif_msg_rx_status(sis_priv))
1715 printk(KERN_DEBUG "sis900_rx, cur_rx:%4.4d, dirty_rx:%4.4d "
1716 "status:0x%8.8x\n",
1717 sis_priv->cur_rx, sis_priv->dirty_rx, rx_status);
1718 rx_work_limit = sis_priv->dirty_rx + NUM_RX_DESC - sis_priv->cur_rx;
1719
1720 while (rx_status & OWN) {
1721 unsigned int rx_size;
1722 unsigned int data_size;
1723
1724 if (--rx_work_limit < 0)
1725 break;
1726
1727 data_size = rx_status & DSIZE;
1728 rx_size = data_size - CRC_SIZE;
1729
1730 #if defined(CONFIG_VLAN_8021Q) || defined(CONFIG_VLAN_8021Q_MODULE)
1731 /* ``TOOLONG'' flag means jumbo packet recived. */
1732 if ((rx_status & TOOLONG) && data_size <= MAX_FRAME_SIZE)
1733 rx_status &= (~ ((unsigned int)TOOLONG));
1734 #endif
1735
1736 if (rx_status & (ABORT|OVERRUN|TOOLONG|RUNT|RXISERR|CRCERR|FAERR)) {
1737 /* corrupted packet received */
1738 if (netif_msg_rx_err(sis_priv))
1739 printk(KERN_DEBUG "%s: Corrupted packet "
1740 "received, buffer status = 0x%8.8x/%d.\n",
1741 net_dev->name, rx_status, data_size);
1742 sis_priv->stats.rx_errors++;
1743 if (rx_status & OVERRUN)
1744 sis_priv->stats.rx_over_errors++;
1745 if (rx_status & (TOOLONG|RUNT))
1746 sis_priv->stats.rx_length_errors++;
1747 if (rx_status & (RXISERR | FAERR))
1748 sis_priv->stats.rx_frame_errors++;
1749 if (rx_status & CRCERR)
1750 sis_priv->stats.rx_crc_errors++;
1751 /* reset buffer descriptor state */
1752 sis_priv->rx_ring[entry].cmdsts = RX_BUF_SIZE;
1753 } else {
1754 struct sk_buff * skb;
1755 struct sk_buff * rx_skb;
1756
1757 pci_unmap_single(sis_priv->pci_dev,
1758 sis_priv->rx_ring[entry].bufptr, RX_BUF_SIZE,
1759 PCI_DMA_FROMDEVICE);
1760
1761 /* refill the Rx buffer, what if there is not enought
1762 * memory for new socket buffer ?? */
1763 if ((skb = dev_alloc_skb(RX_BUF_SIZE)) == NULL) {
1764 /*
1765 * Not enough memory to refill the buffer
1766 * so we need to recycle the old one so
1767 * as to avoid creating a memory hole
1768 * in the rx ring
1769 */
1770 skb = sis_priv->rx_skbuff[entry];
1771 sis_priv->stats.rx_dropped++;
1772 goto refill_rx_ring;
1773 }
1774
1775 /* This situation should never happen, but due to
1776 some unknow bugs, it is possible that
1777 we are working on NULL sk_buff :-( */
1778 if (sis_priv->rx_skbuff[entry] == NULL) {
1779 if (netif_msg_rx_err(sis_priv))
1780 printk(KERN_WARNING "%s: NULL pointer "
1781 "encountered in Rx ring\n"
1782 "cur_rx:%4.4d, dirty_rx:%4.4d\n",
1783 net_dev->name, sis_priv->cur_rx,
1784 sis_priv->dirty_rx);
1785 break;
1786 }
1787
1788 /* give the socket buffer to upper layers */
1789 rx_skb = sis_priv->rx_skbuff[entry];
1790 skb_put(rx_skb, rx_size);
1791 rx_skb->protocol = eth_type_trans(rx_skb, net_dev);
1792 netif_rx(rx_skb);
1793
1794 /* some network statistics */
1795 if ((rx_status & BCAST) == MCAST)
1796 sis_priv->stats.multicast++;
1797 net_dev->last_rx = jiffies;
1798 sis_priv->stats.rx_bytes += rx_size;
1799 sis_priv->stats.rx_packets++;
1800 sis_priv->dirty_rx++;
1801 refill_rx_ring:
1802 sis_priv->rx_skbuff[entry] = skb;
1803 sis_priv->rx_ring[entry].cmdsts = RX_BUF_SIZE;
1804 sis_priv->rx_ring[entry].bufptr =
1805 pci_map_single(sis_priv->pci_dev, skb->data,
1806 RX_BUF_SIZE, PCI_DMA_FROMDEVICE);
1807 }
1808 sis_priv->cur_rx++;
1809 entry = sis_priv->cur_rx % NUM_RX_DESC;
1810 rx_status = sis_priv->rx_ring[entry].cmdsts;
1811 } // while
1812
1813 /* refill the Rx buffer, what if the rate of refilling is slower
1814 * than consuming ?? */
1815 for (; sis_priv->cur_rx != sis_priv->dirty_rx; sis_priv->dirty_rx++) {
1816 struct sk_buff *skb;
1817
1818 entry = sis_priv->dirty_rx % NUM_RX_DESC;
1819
1820 if (sis_priv->rx_skbuff[entry] == NULL) {
1821 if ((skb = dev_alloc_skb(RX_BUF_SIZE)) == NULL) {
1822 /* not enough memory for skbuff, this makes a
1823 * "hole" on the buffer ring, it is not clear
1824 * how the hardware will react to this kind
1825 * of degenerated buffer */
1826 if (netif_msg_rx_err(sis_priv))
1827 printk(KERN_INFO "%s: Memory squeeze,"
1828 "deferring packet.\n",
1829 net_dev->name);
1830 sis_priv->stats.rx_dropped++;
1831 break;
1832 }
1833 sis_priv->rx_skbuff[entry] = skb;
1834 sis_priv->rx_ring[entry].cmdsts = RX_BUF_SIZE;
1835 sis_priv->rx_ring[entry].bufptr =
1836 pci_map_single(sis_priv->pci_dev, skb->data,
1837 RX_BUF_SIZE, PCI_DMA_FROMDEVICE);
1838 }
1839 }
1840 /* re-enable the potentially idle receive state matchine */
1841 outl(RxENA | inl(ioaddr + cr), ioaddr + cr );
1842
1843 return 0;
1844 }
1845
1846 /**
1847 * sis900_finish_xmit - finish up transmission of packets
1848 * @net_dev: the net device to be transmitted on
1849 *
1850 * Check for error condition and free socket buffer etc
1851 * schedule for more transmission as needed
1852 * Note: This function is called by interrupt handler,
1853 * don't do "too much" work here
1854 */
1855
1856 static void sis900_finish_xmit (struct net_device *net_dev)
1857 {
1858 struct sis900_private *sis_priv = net_dev->priv;
1859
1860 for (; sis_priv->dirty_tx != sis_priv->cur_tx; sis_priv->dirty_tx++) {
1861 struct sk_buff *skb;
1862 unsigned int entry;
1863 u32 tx_status;
1864
1865 entry = sis_priv->dirty_tx % NUM_TX_DESC;
1866 tx_status = sis_priv->tx_ring[entry].cmdsts;
1867
1868 if (tx_status & OWN) {
1869 /* The packet is not transmitted yet (owned by hardware) !
1870 * Note: the interrupt is generated only when Tx Machine
1871 * is idle, so this is an almost impossible case */
1872 break;
1873 }
1874
1875 if (tx_status & (ABORT | UNDERRUN | OWCOLL)) {
1876 /* packet unsuccessfully transmitted */
1877 if (netif_msg_tx_err(sis_priv))
1878 printk(KERN_DEBUG "%s: Transmit "
1879 "error, Tx status %8.8x.\n",
1880 net_dev->name, tx_status);
1881 sis_priv->stats.tx_errors++;
1882 if (tx_status & UNDERRUN)
1883 sis_priv->stats.tx_fifo_errors++;
1884 if (tx_status & ABORT)
1885 sis_priv->stats.tx_aborted_errors++;
1886 if (tx_status & NOCARRIER)
1887 sis_priv->stats.tx_carrier_errors++;
1888 if (tx_status & OWCOLL)
1889 sis_priv->stats.tx_window_errors++;
1890 } else {
1891 /* packet successfully transmitted */
1892 sis_priv->stats.collisions += (tx_status & COLCNT) >> 16;
1893 sis_priv->stats.tx_bytes += tx_status & DSIZE;
1894 sis_priv->stats.tx_packets++;
1895 }
1896 /* Free the original skb. */
1897 skb = sis_priv->tx_skbuff[entry];
1898 pci_unmap_single(sis_priv->pci_dev,
1899 sis_priv->tx_ring[entry].bufptr, skb->len,
1900 PCI_DMA_TODEVICE);
1901 dev_kfree_skb_irq(skb);
1902 sis_priv->tx_skbuff[entry] = NULL;
1903 sis_priv->tx_ring[entry].bufptr = 0;
1904 sis_priv->tx_ring[entry].cmdsts = 0;
1905 }
1906
1907 if (sis_priv->tx_full && netif_queue_stopped(net_dev) &&
1908 sis_priv->cur_tx - sis_priv->dirty_tx < NUM_TX_DESC - 4) {
1909 /* The ring is no longer full, clear tx_full and schedule
1910 * more transmission by netif_wake_queue(net_dev) */
1911 sis_priv->tx_full = 0;
1912 netif_wake_queue (net_dev);
1913 }
1914 }
1915
1916 /**
1917 * sis900_close - close sis900 device
1918 * @net_dev: the net device to be closed
1919 *
1920 * Disable interrupts, stop the Tx and Rx Status Machine
1921 * free Tx and RX socket buffer
1922 */
1923
1924 static int sis900_close(struct net_device *net_dev)
1925 {
1926 long ioaddr = net_dev->base_addr;
1927 struct sis900_private *sis_priv = net_dev->priv;
1928 struct sk_buff *skb;
1929 int i;
1930
1931 netif_stop_queue(net_dev);
1932
1933 /* Disable interrupts by clearing the interrupt mask. */
1934 outl(0x0000, ioaddr + imr);
1935 outl(0x0000, ioaddr + ier);
1936
1937 /* Stop the chip's Tx and Rx Status Machine */
1938 outl(RxDIS | TxDIS | inl(ioaddr + cr), ioaddr + cr);
1939
1940 del_timer(&sis_priv->timer);
1941
1942 free_irq(net_dev->irq, net_dev);
1943
1944 /* Free Tx and RX skbuff */
1945 for (i = 0; i < NUM_RX_DESC; i++) {
1946 skb = sis_priv->rx_skbuff[i];
1947 if (skb) {
1948 pci_unmap_single(sis_priv->pci_dev,
1949 sis_priv->rx_ring[i].bufptr,
1950 RX_BUF_SIZE, PCI_DMA_FROMDEVICE);
1951 dev_kfree_skb(skb);
1952 sis_priv->rx_skbuff[i] = NULL;
1953 }
1954 }
1955 for (i = 0; i < NUM_TX_DESC; i++) {
1956 skb = sis_priv->tx_skbuff[i];
1957 if (skb) {
1958 pci_unmap_single(sis_priv->pci_dev,
1959 sis_priv->tx_ring[i].bufptr, skb->len,
1960 PCI_DMA_TODEVICE);
1961 dev_kfree_skb(skb);
1962 sis_priv->tx_skbuff[i] = NULL;
1963 }
1964 }
1965
1966 /* Green! Put the chip in low-power mode. */
1967
1968 return 0;
1969 }
1970
1971 /**
1972 * sis900_get_drvinfo - Return information about driver
1973 * @net_dev: the net device to probe
1974 * @info: container for info returned
1975 *
1976 * Process ethtool command such as "ehtool -i" to show information
1977 */
1978
1979 static void sis900_get_drvinfo(struct net_device *net_dev,
1980 struct ethtool_drvinfo *info)
1981 {
1982 struct sis900_private *sis_priv = net_dev->priv;
1983
1984 strcpy (info->driver, SIS900_MODULE_NAME);
1985 strcpy (info->version, SIS900_DRV_VERSION);
1986 strcpy (info->bus_info, pci_name(sis_priv->pci_dev));
1987 }
1988
1989 static u32 sis900_get_msglevel(struct net_device *net_dev)
1990 {
1991 struct sis900_private *sis_priv = net_dev->priv;
1992 return sis_priv->msg_enable;
1993 }
1994
1995 static void sis900_set_msglevel(struct net_device *net_dev, u32 value)
1996 {
1997 struct sis900_private *sis_priv = net_dev->priv;
1998 sis_priv->msg_enable = value;
1999 }
2000
2001 static u32 sis900_get_link(struct net_device *net_dev)
2002 {
2003 struct sis900_private *sis_priv = net_dev->priv;
2004 return mii_link_ok(&sis_priv->mii_info);
2005 }
2006
2007 static int sis900_get_settings(struct net_device *net_dev,
2008 struct ethtool_cmd *cmd)
2009 {
2010 struct sis900_private *sis_priv = net_dev->priv;
2011 spin_lock_irq(&sis_priv->lock);
2012 mii_ethtool_gset(&sis_priv->mii_info, cmd);
2013 spin_unlock_irq(&sis_priv->lock);
2014 return 0;
2015 }
2016
2017 static int sis900_set_settings(struct net_device *net_dev,
2018 struct ethtool_cmd *cmd)
2019 {
2020 struct sis900_private *sis_priv = net_dev->priv;
2021 int rt;
2022 spin_lock_irq(&sis_priv->lock);
2023 rt = mii_ethtool_sset(&sis_priv->mii_info, cmd);
2024 spin_unlock_irq(&sis_priv->lock);
2025 return rt;
2026 }
2027
2028 static int sis900_nway_reset(struct net_device *net_dev)
2029 {
2030 struct sis900_private *sis_priv = net_dev->priv;
2031 return mii_nway_restart(&sis_priv->mii_info);
2032 }
2033
2034 /**
2035 * sis900_set_wol - Set up Wake on Lan registers
2036 * @net_dev: the net device to probe
2037 * @wol: container for info passed to the driver
2038 *
2039 * Process ethtool command "wol" to setup wake on lan features.
2040 * SiS900 supports sending WoL events if a correct packet is received,
2041 * but there is no simple way to filter them to only a subset (broadcast,
2042 * multicast, unicast or arp).
2043 */
2044
2045 static int sis900_set_wol(struct net_device *net_dev, struct ethtool_wolinfo *wol)
2046 {
2047 struct sis900_private *sis_priv = net_dev->priv;
2048 long pmctrl_addr = net_dev->base_addr + pmctrl;
2049 u32 cfgpmcsr = 0, pmctrl_bits = 0;
2050
2051 if (wol->wolopts == 0) {
2052 pci_read_config_dword(sis_priv->pci_dev, CFGPMCSR, &cfgpmcsr);
2053 cfgpmcsr &= ~PME_EN;
2054 pci_write_config_dword(sis_priv->pci_dev, CFGPMCSR, cfgpmcsr);
2055 outl(pmctrl_bits, pmctrl_addr);
2056 if (netif_msg_wol(sis_priv))
2057 printk(KERN_DEBUG "%s: Wake on LAN disabled\n", net_dev->name);
2058 return 0;
2059 }
2060
2061 if (wol->wolopts & (WAKE_MAGICSECURE | WAKE_UCAST | WAKE_MCAST
2062 | WAKE_BCAST | WAKE_ARP))
2063 return -EINVAL;
2064
2065 if (wol->wolopts & WAKE_MAGIC)
2066 pmctrl_bits |= MAGICPKT;
2067 if (wol->wolopts & WAKE_PHY)
2068 pmctrl_bits |= LINKON;
2069
2070 outl(pmctrl_bits, pmctrl_addr);
2071
2072 pci_read_config_dword(sis_priv->pci_dev, CFGPMCSR, &cfgpmcsr);
2073 cfgpmcsr |= PME_EN;
2074 pci_write_config_dword(sis_priv->pci_dev, CFGPMCSR, cfgpmcsr);
2075 if (netif_msg_wol(sis_priv))
2076 printk(KERN_DEBUG "%s: Wake on LAN enabled\n", net_dev->name);
2077
2078 return 0;
2079 }
2080
2081 static void sis900_get_wol(struct net_device *net_dev, struct ethtool_wolinfo *wol)
2082 {
2083 long pmctrl_addr = net_dev->base_addr + pmctrl;
2084 u32 pmctrl_bits;
2085
2086 pmctrl_bits = inl(pmctrl_addr);
2087 if (pmctrl_bits & MAGICPKT)
2088 wol->wolopts |= WAKE_MAGIC;
2089 if (pmctrl_bits & LINKON)
2090 wol->wolopts |= WAKE_PHY;
2091
2092 wol->supported = (WAKE_PHY | WAKE_MAGIC);
2093 }
2094
2095 static const struct ethtool_ops sis900_ethtool_ops = {
2096 .get_drvinfo = sis900_get_drvinfo,
2097 .get_msglevel = sis900_get_msglevel,
2098 .set_msglevel = sis900_set_msglevel,
2099 .get_link = sis900_get_link,
2100 .get_settings = sis900_get_settings,
2101 .set_settings = sis900_set_settings,
2102 .nway_reset = sis900_nway_reset,
2103 .get_wol = sis900_get_wol,
2104 .set_wol = sis900_set_wol
2105 };
2106
2107 /**
2108 * mii_ioctl - process MII i/o control command
2109 * @net_dev: the net device to command for
2110 * @rq: parameter for command
2111 * @cmd: the i/o command
2112 *
2113 * Process MII command like read/write MII register
2114 */
2115
2116 static int mii_ioctl(struct net_device *net_dev, struct ifreq *rq, int cmd)
2117 {
2118 struct sis900_private *sis_priv = net_dev->priv;
2119 struct mii_ioctl_data *data = if_mii(rq);
2120
2121 switch(cmd) {
2122 case SIOCGMIIPHY: /* Get address of MII PHY in use. */
2123 data->phy_id = sis_priv->mii->phy_addr;
2124 /* Fall Through */
2125
2126 case SIOCGMIIREG: /* Read MII PHY register. */
2127 data->val_out = mdio_read(net_dev, data->phy_id & 0x1f, data->reg_num & 0x1f);
2128 return 0;
2129
2130 case SIOCSMIIREG: /* Write MII PHY register. */
2131 if (!capable(CAP_NET_ADMIN))
2132 return -EPERM;
2133 mdio_write(net_dev, data->phy_id & 0x1f, data->reg_num & 0x1f, data->val_in);
2134 return 0;
2135 default:
2136 return -EOPNOTSUPP;
2137 }
2138 }
2139
2140 /**
2141 * sis900_get_stats - Get sis900 read/write statistics
2142 * @net_dev: the net device to get statistics for
2143 *
2144 * get tx/rx statistics for sis900
2145 */
2146
2147 static struct net_device_stats *
2148 sis900_get_stats(struct net_device *net_dev)
2149 {
2150 struct sis900_private *sis_priv = net_dev->priv;
2151
2152 return &sis_priv->stats;
2153 }
2154
2155 /**
2156 * sis900_set_config - Set media type by net_device.set_config
2157 * @dev: the net device for media type change
2158 * @map: ifmap passed by ifconfig
2159 *
2160 * Set media type to 10baseT, 100baseT or 0(for auto) by ifconfig
2161 * we support only port changes. All other runtime configuration
2162 * changes will be ignored
2163 */
2164
2165 static int sis900_set_config(struct net_device *dev, struct ifmap *map)
2166 {
2167 struct sis900_private *sis_priv = dev->priv;
2168 struct mii_phy *mii_phy = sis_priv->mii;
2169
2170 u16 status;
2171
2172 if ((map->port != (u_char)(-1)) && (map->port != dev->if_port)) {
2173 /* we switch on the ifmap->port field. I couldn't find anything
2174 * like a definition or standard for the values of that field.
2175 * I think the meaning of those values is device specific. But
2176 * since I would like to change the media type via the ifconfig
2177 * command I use the definition from linux/netdevice.h
2178 * (which seems to be different from the ifport(pcmcia) definition) */
2179 switch(map->port){
2180 case IF_PORT_UNKNOWN: /* use auto here */
2181 dev->if_port = map->port;
2182 /* we are going to change the media type, so the Link
2183 * will be temporary down and we need to reflect that
2184 * here. When the Link comes up again, it will be
2185 * sensed by the sis_timer procedure, which also does
2186 * all the rest for us */
2187 netif_carrier_off(dev);
2188
2189 /* read current state */
2190 status = mdio_read(dev, mii_phy->phy_addr, MII_CONTROL);
2191
2192 /* enable auto negotiation and reset the negotioation
2193 * (I don't really know what the auto negatiotiation
2194 * reset really means, but it sounds for me right to
2195 * do one here) */
2196 mdio_write(dev, mii_phy->phy_addr,
2197 MII_CONTROL, status | MII_CNTL_AUTO | MII_CNTL_RST_AUTO);
2198
2199 break;
2200
2201 case IF_PORT_10BASET: /* 10BaseT */
2202 dev->if_port = map->port;
2203
2204 /* we are going to change the media type, so the Link
2205 * will be temporary down and we need to reflect that
2206 * here. When the Link comes up again, it will be
2207 * sensed by the sis_timer procedure, which also does
2208 * all the rest for us */
2209 netif_carrier_off(dev);
2210
2211 /* set Speed to 10Mbps */
2212 /* read current state */
2213 status = mdio_read(dev, mii_phy->phy_addr, MII_CONTROL);
2214
2215 /* disable auto negotiation and force 10MBit mode*/
2216 mdio_write(dev, mii_phy->phy_addr,
2217 MII_CONTROL, status & ~(MII_CNTL_SPEED |
2218 MII_CNTL_AUTO));
2219 break;
2220
2221 case IF_PORT_100BASET: /* 100BaseT */
2222 case IF_PORT_100BASETX: /* 100BaseTx */
2223 dev->if_port = map->port;
2224
2225 /* we are going to change the media type, so the Link
2226 * will be temporary down and we need to reflect that
2227 * here. When the Link comes up again, it will be
2228 * sensed by the sis_timer procedure, which also does
2229 * all the rest for us */
2230 netif_carrier_off(dev);
2231
2232 /* set Speed to 100Mbps */
2233 /* disable auto negotiation and enable 100MBit Mode */
2234 status = mdio_read(dev, mii_phy->phy_addr, MII_CONTROL);
2235 mdio_write(dev, mii_phy->phy_addr,
2236 MII_CONTROL, (status & ~MII_CNTL_SPEED) |
2237 MII_CNTL_SPEED);
2238
2239 break;
2240
2241 case IF_PORT_10BASE2: /* 10Base2 */
2242 case IF_PORT_AUI: /* AUI */
2243 case IF_PORT_100BASEFX: /* 100BaseFx */
2244 /* These Modes are not supported (are they?)*/
2245 return -EOPNOTSUPP;
2246 break;
2247
2248 default:
2249 return -EINVAL;
2250 }
2251 }
2252 return 0;
2253 }
2254
2255 /**
2256 * sis900_mcast_bitnr - compute hashtable index
2257 * @addr: multicast address
2258 * @revision: revision id of chip
2259 *
2260 * SiS 900 uses the most sigificant 7 bits to index a 128 bits multicast
2261 * hash table, which makes this function a little bit different from other drivers
2262 * SiS 900 B0 & 635 M/B uses the most significat 8 bits to index 256 bits
2263 * multicast hash table.
2264 */
2265
2266 static inline u16 sis900_mcast_bitnr(u8 *addr, u8 revision)
2267 {
2268
2269 u32 crc = ether_crc(6, addr);
2270
2271 /* leave 8 or 7 most siginifant bits */
2272 if ((revision >= SIS635A_900_REV) || (revision == SIS900B_900_REV))
2273 return ((int)(crc >> 24));
2274 else
2275 return ((int)(crc >> 25));
2276 }
2277
2278 /**
2279 * set_rx_mode - Set SiS900 receive mode
2280 * @net_dev: the net device to be set
2281 *
2282 * Set SiS900 receive mode for promiscuous, multicast, or broadcast mode.
2283 * And set the appropriate multicast filter.
2284 * Multicast hash table changes from 128 to 256 bits for 635M/B & 900B0.
2285 */
2286
2287 static void set_rx_mode(struct net_device *net_dev)
2288 {
2289 long ioaddr = net_dev->base_addr;
2290 struct sis900_private * sis_priv = net_dev->priv;
2291 u16 mc_filter[16] = {0}; /* 256/128 bits multicast hash table */
2292 int i, table_entries;
2293 u32 rx_mode;
2294
2295 /* 635 Hash Table entries = 256(2^16) */
2296 if((sis_priv->chipset_rev >= SIS635A_900_REV) ||
2297 (sis_priv->chipset_rev == SIS900B_900_REV))
2298 table_entries = 16;
2299 else
2300 table_entries = 8;
2301
2302 if (net_dev->flags & IFF_PROMISC) {
2303 /* Accept any kinds of packets */
2304 rx_mode = RFPromiscuous;
2305 for (i = 0; i < table_entries; i++)
2306 mc_filter[i] = 0xffff;
2307 } else if ((net_dev->mc_count > multicast_filter_limit) ||
2308 (net_dev->flags & IFF_ALLMULTI)) {
2309 /* too many multicast addresses or accept all multicast packet */
2310 rx_mode = RFAAB | RFAAM;
2311 for (i = 0; i < table_entries; i++)
2312 mc_filter[i] = 0xffff;
2313 } else {
2314 /* Accept Broadcast packet, destination address matchs our
2315 * MAC address, use Receive Filter to reject unwanted MCAST
2316 * packets */
2317 struct dev_mc_list *mclist;
2318 rx_mode = RFAAB;
2319 for (i = 0, mclist = net_dev->mc_list;
2320 mclist && i < net_dev->mc_count;
2321 i++, mclist = mclist->next) {
2322 unsigned int bit_nr =
2323 sis900_mcast_bitnr(mclist->dmi_addr, sis_priv->chipset_rev);
2324 mc_filter[bit_nr >> 4] |= (1 << (bit_nr & 0xf));
2325 }
2326 }
2327
2328 /* update Multicast Hash Table in Receive Filter */
2329 for (i = 0; i < table_entries; i++) {
2330 /* why plus 0x04 ??, That makes the correct value for hash table. */
2331 outl((u32)(0x00000004+i) << RFADDR_shift, ioaddr + rfcr);
2332 outl(mc_filter[i], ioaddr + rfdr);
2333 }
2334
2335 outl(RFEN | rx_mode, ioaddr + rfcr);
2336
2337 /* sis900 is capable of looping back packets at MAC level for
2338 * debugging purpose */
2339 if (net_dev->flags & IFF_LOOPBACK) {
2340 u32 cr_saved;
2341 /* We must disable Tx/Rx before setting loopback mode */
2342 cr_saved = inl(ioaddr + cr);
2343 outl(cr_saved | TxDIS | RxDIS, ioaddr + cr);
2344 /* enable loopback */
2345 outl(inl(ioaddr + txcfg) | TxMLB, ioaddr + txcfg);
2346 outl(inl(ioaddr + rxcfg) | RxATX, ioaddr + rxcfg);
2347 /* restore cr */
2348 outl(cr_saved, ioaddr + cr);
2349 }
2350
2351 return;
2352 }
2353
2354 /**
2355 * sis900_reset - Reset sis900 MAC
2356 * @net_dev: the net device to reset
2357 *
2358 * reset sis900 MAC and wait until finished
2359 * reset through command register
2360 * change backoff algorithm for 900B0 & 635 M/B
2361 */
2362
2363 static void sis900_reset(struct net_device *net_dev)
2364 {
2365 struct sis900_private * sis_priv = net_dev->priv;
2366 long ioaddr = net_dev->base_addr;
2367 int i = 0;
2368 u32 status = TxRCMP | RxRCMP;
2369
2370 outl(0, ioaddr + ier);
2371 outl(0, ioaddr + imr);
2372 outl(0, ioaddr + rfcr);
2373
2374 outl(RxRESET | TxRESET | RESET | inl(ioaddr + cr), ioaddr + cr);
2375
2376 /* Check that the chip has finished the reset. */
2377 while (status && (i++ < 1000)) {
2378 status ^= (inl(isr + ioaddr) & status);
2379 }
2380
2381 if( (sis_priv->chipset_rev >= SIS635A_900_REV) ||
2382 (sis_priv->chipset_rev == SIS900B_900_REV) )
2383 outl(PESEL | RND_CNT, ioaddr + cfg);
2384 else
2385 outl(PESEL, ioaddr + cfg);
2386 }
2387
2388 /**
2389 * sis900_remove - Remove sis900 device
2390 * @pci_dev: the pci device to be removed
2391 *
2392 * remove and release SiS900 net device
2393 */
2394
2395 static void __devexit sis900_remove(struct pci_dev *pci_dev)
2396 {
2397 struct net_device *net_dev = pci_get_drvdata(pci_dev);
2398 struct sis900_private * sis_priv = net_dev->priv;
2399 struct mii_phy *phy = NULL;
2400
2401 while (sis_priv->first_mii) {
2402 phy = sis_priv->first_mii;
2403 sis_priv->first_mii = phy->next;
2404 kfree(phy);
2405 }
2406
2407 pci_free_consistent(pci_dev, RX_TOTAL_SIZE, sis_priv->rx_ring,
2408 sis_priv->rx_ring_dma);
2409 pci_free_consistent(pci_dev, TX_TOTAL_SIZE, sis_priv->tx_ring,
2410 sis_priv->tx_ring_dma);
2411 unregister_netdev(net_dev);
2412 free_netdev(net_dev);
2413 pci_release_regions(pci_dev);
2414 pci_set_drvdata(pci_dev, NULL);
2415 }
2416
2417 #ifdef CONFIG_PM
2418
2419 static int sis900_suspend(struct pci_dev *pci_dev, pm_message_t state)
2420 {
2421 struct net_device *net_dev = pci_get_drvdata(pci_dev);
2422 long ioaddr = net_dev->base_addr;
2423
2424 if(!netif_running(net_dev))
2425 return 0;
2426
2427 netif_stop_queue(net_dev);
2428 netif_device_detach(net_dev);
2429
2430 /* Stop the chip's Tx and Rx Status Machine */
2431 outl(RxDIS | TxDIS | inl(ioaddr + cr), ioaddr + cr);
2432
2433 pci_set_power_state(pci_dev, PCI_D3hot);
2434 pci_save_state(pci_dev);
2435
2436 return 0;
2437 }
2438
2439 static int sis900_resume(struct pci_dev *pci_dev)
2440 {
2441 struct net_device *net_dev = pci_get_drvdata(pci_dev);
2442 struct sis900_private *sis_priv = net_dev->priv;
2443 long ioaddr = net_dev->base_addr;
2444
2445 if(!netif_running(net_dev))
2446 return 0;
2447 pci_restore_state(pci_dev);
2448 pci_set_power_state(pci_dev, PCI_D0);
2449
2450 sis900_init_rxfilter(net_dev);
2451
2452 sis900_init_tx_ring(net_dev);
2453 sis900_init_rx_ring(net_dev);
2454
2455 set_rx_mode(net_dev);
2456
2457 netif_device_attach(net_dev);
2458 netif_start_queue(net_dev);
2459
2460 /* Workaround for EDB */
2461 sis900_set_mode(ioaddr, HW_SPEED_10_MBPS, FDX_CAPABLE_HALF_SELECTED);
2462
2463 /* Enable all known interrupts by setting the interrupt mask. */
2464 outl((RxSOVR|RxORN|RxERR|RxOK|TxURN|TxERR|TxIDLE), ioaddr + imr);
2465 outl(RxENA | inl(ioaddr + cr), ioaddr + cr);
2466 outl(IE, ioaddr + ier);
2467
2468 sis900_check_mode(net_dev, sis_priv->mii);
2469
2470 return 0;
2471 }
2472 #endif /* CONFIG_PM */
2473
2474 static struct pci_driver sis900_pci_driver = {
2475 .name = SIS900_MODULE_NAME,
2476 .id_table = sis900_pci_tbl,
2477 .probe = sis900_probe,
2478 .remove = __devexit_p(sis900_remove),
2479 #ifdef CONFIG_PM
2480 .suspend = sis900_suspend,
2481 .resume = sis900_resume,
2482 #endif /* CONFIG_PM */
2483 };
2484
2485 static int __init sis900_init_module(void)
2486 {
2487 /* when a module, this is printed whether or not devices are found in probe */
2488 #ifdef MODULE
2489 printk(version);
2490 #endif
2491
2492 return pci_register_driver(&sis900_pci_driver);
2493 }
2494
2495 static void __exit sis900_cleanup_module(void)
2496 {
2497 pci_unregister_driver(&sis900_pci_driver);
2498 }
2499
2500 module_init(sis900_init_module);
2501 module_exit(sis900_cleanup_module);
2502
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