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[mirror_ubuntu-artful-kernel.git] / drivers / net / skfp / drvfbi.c
1 /******************************************************************************
2 *
3 * (C)Copyright 1998,1999 SysKonnect,
4 * a business unit of Schneider & Koch & Co. Datensysteme GmbH.
5 *
6 * See the file "skfddi.c" for further information.
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; either version 2 of the License, or
11 * (at your option) any later version.
12 *
13 * The information in this file is provided "AS IS" without warranty.
14 *
15 ******************************************************************************/
16
17 /*
18 * FBI board dependent Driver for SMT and LLC
19 */
20
21 #include "h/types.h"
22 #include "h/fddi.h"
23 #include "h/smc.h"
24 #include "h/supern_2.h"
25 #include "h/skfbiinc.h"
26
27 #ifndef lint
28 static const char ID_sccs[] = "@(#)drvfbi.c 1.63 99/02/11 (C) SK " ;
29 #endif
30
31 /*
32 * PCM active state
33 */
34 #define PC8_ACTIVE 8
35
36 #define LED_Y_ON 0x11 /* Used for ring up/down indication */
37 #define LED_Y_OFF 0x10
38
39
40 #define MS2BCLK(x) ((x)*12500L)
41
42 /*
43 * valid configuration values are:
44 */
45 #ifdef ISA
46 const int opt_ints[] = {8, 3, 4, 5, 9, 10, 11, 12, 15} ;
47 const int opt_iops[] = {8,
48 0x100, 0x120, 0x180, 0x1a0, 0x220, 0x240, 0x320, 0x340};
49 const int opt_dmas[] = {4, 3, 5, 6, 7} ;
50 const int opt_eproms[] = {15, 0xc0, 0xc2, 0xc4, 0xc6, 0xc8, 0xca, 0xcc, 0xce,
51 0xd0, 0xd2, 0xd4, 0xd6, 0xd8, 0xda, 0xdc} ;
52 #endif
53 #ifdef EISA
54 const int opt_ints[] = {5, 9, 10, 11} ;
55 const int opt_dmas[] = {0, 5, 6, 7} ;
56 const int opt_eproms[] = {0xc0, 0xc2, 0xc4, 0xc6, 0xc8, 0xca, 0xcc, 0xce,
57 0xd0, 0xd2, 0xd4, 0xd6, 0xd8, 0xda, 0xdc} ;
58 #endif
59
60 #ifdef MCA
61 int opt_ints[] = {3, 11, 10, 9} ; /* FM1 */
62 int opt_eproms[] = {0, 0xc4, 0xc8, 0xcc, 0xd0, 0xd4, 0xd8, 0xdc} ;
63 #endif /* MCA */
64
65 /*
66 * xPOS_ID:xxxx
67 * | \ /
68 * | \/
69 * | --------------------- the patched POS_ID of the Adapter
70 * | xxxx = (Vendor ID low byte,
71 * | Vendor ID high byte,
72 * | Device ID low byte,
73 * | Device ID high byte)
74 * +------------------------------ the patched oem_id must be
75 * 'S' for SK or 'I' for IBM
76 * this is a short id for the driver.
77 */
78 #ifndef MULT_OEM
79 #ifndef OEM_CONCEPT
80 #ifndef MCA
81 const u_char oem_id[] = "xPOS_ID:xxxx" ;
82 #else
83 const u_char oem_id[] = "xPOSID1:xxxx" ; /* FM1 card id. */
84 #endif
85 #else /* OEM_CONCEPT */
86 #ifndef MCA
87 const u_char oem_id[] = OEM_ID ;
88 #else
89 const u_char oem_id[] = OEM_ID1 ; /* FM1 card id. */
90 #endif /* MCA */
91 #endif /* OEM_CONCEPT */
92 #define ID_BYTE0 8
93 #define OEMID(smc,i) oem_id[ID_BYTE0 + i]
94 #else /* MULT_OEM */
95 const struct s_oem_ids oem_ids[] = {
96 #include "oemids.h"
97 {0}
98 };
99 #define OEMID(smc,i) smc->hw.oem_id->oi_id[i]
100 #endif /* MULT_OEM */
101
102 /* Prototypes of external functions */
103 #ifdef AIX
104 extern int AIX_vpdReadByte() ;
105 #endif
106
107
108 /* Prototypes of local functions. */
109 void smt_stop_watchdog(struct s_smc *smc);
110
111 #ifdef MCA
112 static int read_card_id() ;
113 static void DisableSlotAccess() ;
114 static void EnableSlotAccess() ;
115 #ifdef AIX
116 extern int attach_POS_addr() ;
117 extern int detach_POS_addr() ;
118 extern u_char read_POS() ;
119 extern void write_POS() ;
120 extern int AIX_vpdReadByte() ;
121 #else
122 #define read_POS(smc,a1,a2) ((u_char) inp(a1))
123 #define write_POS(smc,a1,a2,a3) outp((a1),(a3))
124 #endif
125 #endif /* MCA */
126
127
128 /*
129 * FDDI card reset
130 */
131 static void card_start(struct s_smc *smc)
132 {
133 int i ;
134 #ifdef PCI
135 u_char rev_id ;
136 u_short word;
137 #endif
138
139 smt_stop_watchdog(smc) ;
140
141 #ifdef ISA
142 outpw(CSR_A,0) ; /* reset for all chips */
143 for (i = 10 ; i ; i--) /* delay for PLC's */
144 (void)inpw(ISR_A) ;
145 OUT_82c54_TIMER(3,COUNT(2) | RW_OP(3) | TMODE(2)) ;
146 /* counter 2, mode 2 */
147 OUT_82c54_TIMER(2,97) ; /* LSB */
148 OUT_82c54_TIMER(2,0) ; /* MSB ( 15.6 us ) */
149 outpw(CSR_A,CS_CRESET) ;
150 #endif
151 #ifdef EISA
152 outpw(CSR_A,0) ; /* reset for all chips */
153 for (i = 10 ; i ; i--) /* delay for PLC's */
154 (void)inpw(ISR_A) ;
155 outpw(CSR_A,CS_CRESET) ;
156 smc->hw.led = (2<<6) ;
157 outpw(CSR_A,CS_CRESET | smc->hw.led) ;
158 #endif
159 #ifdef MCA
160 outp(ADDR(CARD_DIS),0) ; /* reset for all chips */
161 for (i = 10 ; i ; i--) /* delay for PLC's */
162 (void)inpw(ISR_A) ;
163 outp(ADDR(CARD_EN),0) ;
164 /* first I/O after reset must not be a access to FORMAC or PLC */
165
166 /*
167 * bus timeout (MCA)
168 */
169 OUT_82c54_TIMER(3,COUNT(2) | RW_OP(3) | TMODE(3)) ;
170 /* counter 2, mode 3 */
171 OUT_82c54_TIMER(2,(2*24)) ; /* 3.9 us * 2 square wave */
172 OUT_82c54_TIMER(2,0) ; /* MSB */
173
174 /* POS 102 indicated an activ Check Line or Buss Error monitoring */
175 if (inpw(CSA_A) & (POS_EN_CHKINT | POS_EN_BUS_ERR)) {
176 outp(ADDR(IRQ_CHCK_EN),0) ;
177 }
178
179 if (!((i = inpw(CSR_A)) & CS_SAS)) {
180 if (!(i & CS_BYSTAT)) {
181 outp(ADDR(BYPASS(STAT_INS)),0) ;/* insert station */
182 }
183 }
184 outpw(LEDR_A,LED_1) ; /* yellow */
185 #endif /* MCA */
186 #ifdef PCI
187 /*
188 * make sure no transfer activity is pending
189 */
190 outpw(FM_A(FM_MDREG1),FM_MINIT) ;
191 outp(ADDR(B0_CTRL), CTRL_HPI_SET) ;
192 hwt_wait_time(smc,hwt_quick_read(smc),MS2BCLK(10)) ;
193 /*
194 * now reset everything
195 */
196 outp(ADDR(B0_CTRL),CTRL_RST_SET) ; /* reset for all chips */
197 i = (int) inp(ADDR(B0_CTRL)) ; /* do dummy read */
198 SK_UNUSED(i) ; /* Make LINT happy. */
199 outp(ADDR(B0_CTRL), CTRL_RST_CLR) ;
200
201 /*
202 * Reset all bits in the PCI STATUS register
203 */
204 outp(ADDR(B0_TST_CTRL), TST_CFG_WRITE_ON) ; /* enable for writes */
205 word = inpw(PCI_C(PCI_STATUS)) ;
206 outpw(PCI_C(PCI_STATUS), word | PCI_ERRBITS) ;
207 outp(ADDR(B0_TST_CTRL), TST_CFG_WRITE_OFF) ; /* disable writes */
208
209 /*
210 * Release the reset of all the State machines
211 * Release Master_Reset
212 * Release HPI_SM_Reset
213 */
214 outp(ADDR(B0_CTRL), CTRL_MRST_CLR|CTRL_HPI_CLR) ;
215
216 /*
217 * determine the adapter type
218 * Note: Do it here, because some drivers may call card_start() once
219 * at very first before any other initialization functions is
220 * executed.
221 */
222 rev_id = inp(PCI_C(PCI_REV_ID)) ;
223 if ((rev_id & 0xf0) == SK_ML_ID_1 || (rev_id & 0xf0) == SK_ML_ID_2) {
224 smc->hw.hw_is_64bit = TRUE ;
225 } else {
226 smc->hw.hw_is_64bit = FALSE ;
227 }
228
229 /*
230 * Watermark initialization
231 */
232 if (!smc->hw.hw_is_64bit) {
233 outpd(ADDR(B4_R1_F), RX_WATERMARK) ;
234 outpd(ADDR(B5_XA_F), TX_WATERMARK) ;
235 outpd(ADDR(B5_XS_F), TX_WATERMARK) ;
236 }
237
238 outp(ADDR(B0_CTRL),CTRL_RST_CLR) ; /* clear the reset chips */
239 outp(ADDR(B0_LED),LED_GA_OFF|LED_MY_ON|LED_GB_OFF) ; /* ye LED on */
240
241 /* init the timer value for the watch dog 2,5 minutes */
242 outpd(ADDR(B2_WDOG_INI),0x6FC23AC0) ;
243
244 /* initialize the ISR mask */
245 smc->hw.is_imask = ISR_MASK ;
246 smc->hw.hw_state = STOPPED ;
247 #endif
248 GET_PAGE(0) ; /* necessary for BOOT */
249 }
250
251 void card_stop(struct s_smc *smc)
252 {
253 smt_stop_watchdog(smc) ;
254 smc->hw.mac_ring_is_up = 0 ; /* ring down */
255 #ifdef ISA
256 outpw(CSR_A,0) ; /* reset for all chips */
257 #endif
258 #ifdef EISA
259 outpw(CSR_A,0) ; /* reset for all chips */
260 #endif
261 #ifdef MCA
262 outp(ADDR(CARD_DIS),0) ; /* reset for all chips */
263 #endif
264 #ifdef PCI
265 /*
266 * make sure no transfer activity is pending
267 */
268 outpw(FM_A(FM_MDREG1),FM_MINIT) ;
269 outp(ADDR(B0_CTRL), CTRL_HPI_SET) ;
270 hwt_wait_time(smc,hwt_quick_read(smc),MS2BCLK(10)) ;
271 /*
272 * now reset everything
273 */
274 outp(ADDR(B0_CTRL),CTRL_RST_SET) ; /* reset for all chips */
275 outp(ADDR(B0_CTRL),CTRL_RST_CLR) ; /* reset for all chips */
276 outp(ADDR(B0_LED),LED_GA_OFF|LED_MY_OFF|LED_GB_OFF) ; /* all LEDs off */
277 smc->hw.hw_state = STOPPED ;
278 #endif
279 }
280 /*--------------------------- ISR handling ----------------------------------*/
281
282 void mac1_irq(struct s_smc *smc, u_short stu, u_short stl)
283 {
284 int restart_tx = 0 ;
285 again:
286 #ifndef PCI
287 #ifndef ISA
288 /*
289 * FORMAC+ bug modified the queue pointer if many read/write accesses happens!?
290 */
291 if (stl & (FM_SPCEPDS | /* parit/coding err. syn.q.*/
292 FM_SPCEPDA0 | /* parit/coding err. a.q.0 */
293 FM_SPCEPDA1 | /* parit/coding err. a.q.1 */
294 FM_SPCEPDA2)) { /* parit/coding err. a.q.2 */
295 SMT_PANIC(smc,SMT_E0132, SMT_E0132_MSG) ;
296 }
297 if (stl & (FM_STBURS | /* tx buffer underrun syn.q.*/
298 FM_STBURA0 | /* tx buffer underrun a.q.0 */
299 FM_STBURA1 | /* tx buffer underrun a.q.1 */
300 FM_STBURA2)) { /* tx buffer underrun a.q.2 */
301 SMT_PANIC(smc,SMT_E0133, SMT_E0133_MSG) ;
302 }
303 #endif
304 if ( (stu & (FM_SXMTABT | /* transmit abort */
305 #ifdef SYNC
306 FM_STXABRS | /* syn. tx abort */
307 #endif /* SYNC */
308 FM_STXABRA0)) || /* asyn. tx abort */
309 (stl & (FM_SQLCKS | /* lock for syn. q. */
310 FM_SQLCKA0)) ) { /* lock for asyn. q. */
311 formac_tx_restart(smc) ; /* init tx */
312 restart_tx = 1 ;
313 stu = inpw(FM_A(FM_ST1U)) ;
314 stl = inpw(FM_A(FM_ST1L)) ;
315 stu &= ~ (FM_STECFRMA0 | FM_STEFRMA0 | FM_STEFRMS) ;
316 if (stu || stl)
317 goto again ;
318 }
319
320 #ifndef SYNC
321 if (stu & (FM_STECFRMA0 | /* end of chain asyn tx */
322 FM_STEFRMA0)) { /* end of frame asyn tx */
323 /* free tx_queue */
324 smc->hw.n_a_send = 0 ;
325 if (++smc->hw.fp.tx_free < smc->hw.fp.tx_max) {
326 start_next_send(smc);
327 }
328 restart_tx = 1 ;
329 }
330 #else /* SYNC */
331 if (stu & (FM_STEFRMA0 | /* end of asyn tx */
332 FM_STEFRMS)) { /* end of sync tx */
333 restart_tx = 1 ;
334 }
335 #endif /* SYNC */
336 if (restart_tx)
337 llc_restart_tx(smc) ;
338 }
339 #else /* PCI */
340
341 /*
342 * parity error: note encoding error is not possible in tag mode
343 */
344 if (stl & (FM_SPCEPDS | /* parity err. syn.q.*/
345 FM_SPCEPDA0 | /* parity err. a.q.0 */
346 FM_SPCEPDA1)) { /* parity err. a.q.1 */
347 SMT_PANIC(smc,SMT_E0134, SMT_E0134_MSG) ;
348 }
349 /*
350 * buffer underrun: can only occur if a tx threshold is specified
351 */
352 if (stl & (FM_STBURS | /* tx buffer underrun syn.q.*/
353 FM_STBURA0 | /* tx buffer underrun a.q.0 */
354 FM_STBURA1)) { /* tx buffer underrun a.q.2 */
355 SMT_PANIC(smc,SMT_E0133, SMT_E0133_MSG) ;
356 }
357
358 if ( (stu & (FM_SXMTABT | /* transmit abort */
359 FM_STXABRS | /* syn. tx abort */
360 FM_STXABRA0)) || /* asyn. tx abort */
361 (stl & (FM_SQLCKS | /* lock for syn. q. */
362 FM_SQLCKA0)) ) { /* lock for asyn. q. */
363 formac_tx_restart(smc) ; /* init tx */
364 restart_tx = 1 ;
365 stu = inpw(FM_A(FM_ST1U)) ;
366 stl = inpw(FM_A(FM_ST1L)) ;
367 stu &= ~ (FM_STECFRMA0 | FM_STEFRMA0 | FM_STEFRMS) ;
368 if (stu || stl)
369 goto again ;
370 }
371
372 if (stu & (FM_STEFRMA0 | /* end of asyn tx */
373 FM_STEFRMS)) { /* end of sync tx */
374 restart_tx = 1 ;
375 }
376
377 if (restart_tx)
378 llc_restart_tx(smc) ;
379 }
380 #endif /* PCI */
381 /*
382 * interrupt source= plc1
383 * this function is called in nwfbisr.asm
384 */
385 void plc1_irq(struct s_smc *smc)
386 {
387 u_short st = inpw(PLC(PB,PL_INTR_EVENT)) ;
388
389 #if (defined(ISA) || defined(EISA))
390 /* reset PLC Int. bits */
391 outpw(PLC1_I,inpw(PLC1_I)) ;
392 #endif
393 plc_irq(smc,PB,st) ;
394 }
395
396 /*
397 * interrupt source= plc2
398 * this function is called in nwfbisr.asm
399 */
400 void plc2_irq(struct s_smc *smc)
401 {
402 u_short st = inpw(PLC(PA,PL_INTR_EVENT)) ;
403
404 #if (defined(ISA) || defined(EISA))
405 /* reset PLC Int. bits */
406 outpw(PLC2_I,inpw(PLC2_I)) ;
407 #endif
408 plc_irq(smc,PA,st) ;
409 }
410
411
412 /*
413 * interrupt source= timer
414 */
415 void timer_irq(struct s_smc *smc)
416 {
417 hwt_restart(smc);
418 smc->hw.t_stop = smc->hw.t_start;
419 smt_timer_done(smc) ;
420 }
421
422 /*
423 * return S-port (PA or PB)
424 */
425 int pcm_get_s_port(struct s_smc *smc)
426 {
427 SK_UNUSED(smc) ;
428 return(PS) ;
429 }
430
431 /*
432 * Station Label = "FDDI-XYZ" where
433 *
434 * X = connector type
435 * Y = PMD type
436 * Z = port type
437 */
438 #define STATION_LABEL_CONNECTOR_OFFSET 5
439 #define STATION_LABEL_PMD_OFFSET 6
440 #define STATION_LABEL_PORT_OFFSET 7
441
442 void read_address(struct s_smc *smc, u_char *mac_addr)
443 {
444 char ConnectorType ;
445 char PmdType ;
446 int i ;
447
448 extern const u_char canonical[256] ;
449
450 #if (defined(ISA) || defined(MCA))
451 for (i = 0; i < 4 ;i++) { /* read mac address from board */
452 smc->hw.fddi_phys_addr.a[i] =
453 canonical[(inpw(PR_A(i+SA_MAC))&0xff)] ;
454 }
455 for (i = 4; i < 6; i++) {
456 smc->hw.fddi_phys_addr.a[i] =
457 canonical[(inpw(PR_A(i+SA_MAC+PRA_OFF))&0xff)] ;
458 }
459 #endif
460 #ifdef EISA
461 /*
462 * Note: We get trouble on an Alpha machine if we make a inpw()
463 * instead of inp()
464 */
465 for (i = 0; i < 4 ;i++) { /* read mac address from board */
466 smc->hw.fddi_phys_addr.a[i] =
467 canonical[inp(PR_A(i+SA_MAC))] ;
468 }
469 for (i = 4; i < 6; i++) {
470 smc->hw.fddi_phys_addr.a[i] =
471 canonical[inp(PR_A(i+SA_MAC+PRA_OFF))] ;
472 }
473 #endif
474 #ifdef PCI
475 for (i = 0; i < 6; i++) { /* read mac address from board */
476 smc->hw.fddi_phys_addr.a[i] =
477 canonical[inp(ADDR(B2_MAC_0+i))] ;
478 }
479 #endif
480 #ifndef PCI
481 ConnectorType = inpw(PR_A(SA_PMD_TYPE)) & 0xff ;
482 PmdType = inpw(PR_A(SA_PMD_TYPE+1)) & 0xff ;
483 #else
484 ConnectorType = inp(ADDR(B2_CONN_TYP)) ;
485 PmdType = inp(ADDR(B2_PMD_TYP)) ;
486 #endif
487
488 smc->y[PA].pmd_type[PMD_SK_CONN] =
489 smc->y[PB].pmd_type[PMD_SK_CONN] = ConnectorType ;
490 smc->y[PA].pmd_type[PMD_SK_PMD ] =
491 smc->y[PB].pmd_type[PMD_SK_PMD ] = PmdType ;
492
493 if (mac_addr) {
494 for (i = 0; i < 6 ;i++) {
495 smc->hw.fddi_canon_addr.a[i] = mac_addr[i] ;
496 smc->hw.fddi_home_addr.a[i] = canonical[mac_addr[i]] ;
497 }
498 return ;
499 }
500 smc->hw.fddi_home_addr = smc->hw.fddi_phys_addr ;
501
502 for (i = 0; i < 6 ;i++) {
503 smc->hw.fddi_canon_addr.a[i] =
504 canonical[smc->hw.fddi_phys_addr.a[i]] ;
505 }
506 }
507
508 /*
509 * FDDI card soft reset
510 */
511 void init_board(struct s_smc *smc, u_char *mac_addr)
512 {
513 card_start(smc) ;
514 read_address(smc,mac_addr) ;
515
516 #ifndef PCI
517 if (inpw(CSR_A) & CS_SAS)
518 #else
519 if (!(inp(ADDR(B0_DAS)) & DAS_AVAIL))
520 #endif
521 smc->s.sas = SMT_SAS ; /* Single att. station */
522 else
523 smc->s.sas = SMT_DAS ; /* Dual att. station */
524
525 #ifndef PCI
526 if (inpw(CSR_A) & CS_BYSTAT)
527 #else
528 if (!(inp(ADDR(B0_DAS)) & DAS_BYP_ST))
529 #endif
530 smc->mib.fddiSMTBypassPresent = 0 ;
531 /* without opt. bypass */
532 else
533 smc->mib.fddiSMTBypassPresent = 1 ;
534 /* with opt. bypass */
535 }
536
537 /*
538 * insert or deinsert optical bypass (called by ECM)
539 */
540 void sm_pm_bypass_req(struct s_smc *smc, int mode)
541 {
542 #if (defined(ISA) || defined(EISA))
543 int csra_v ;
544 #endif
545
546 DB_ECMN(1,"ECM : sm_pm_bypass_req(%s)\n",(mode == BP_INSERT) ?
547 "BP_INSERT" : "BP_DEINSERT",0) ;
548
549 if (smc->s.sas != SMT_DAS)
550 return ;
551
552 #if (defined(ISA) || defined(EISA))
553
554 csra_v = inpw(CSR_A) & ~CS_BYPASS ;
555 #ifdef EISA
556 csra_v |= smc->hw.led ;
557 #endif
558
559 switch(mode) {
560 case BP_INSERT :
561 outpw(CSR_A,csra_v | CS_BYPASS) ;
562 break ;
563 case BP_DEINSERT :
564 outpw(CSR_A,csra_v) ;
565 break ;
566 }
567 #endif /* ISA / EISA */
568 #ifdef MCA
569 switch(mode) {
570 case BP_INSERT :
571 outp(ADDR(BYPASS(STAT_INS)),0) ;/* insert station */
572 break ;
573 case BP_DEINSERT :
574 outp(ADDR(BYPASS(STAT_BYP)),0) ; /* bypass station */
575 break ;
576 }
577 #endif
578 #ifdef PCI
579 switch(mode) {
580 case BP_INSERT :
581 outp(ADDR(B0_DAS),DAS_BYP_INS) ; /* insert station */
582 break ;
583 case BP_DEINSERT :
584 outp(ADDR(B0_DAS),DAS_BYP_RMV) ; /* bypass station */
585 break ;
586 }
587 #endif
588 }
589
590 /*
591 * check if bypass connected
592 */
593 int sm_pm_bypass_present(struct s_smc *smc)
594 {
595 #ifndef PCI
596 return( (inpw(CSR_A) & CS_BYSTAT) ? FALSE : TRUE ) ;
597 #else
598 return( (inp(ADDR(B0_DAS)) & DAS_BYP_ST) ? TRUE: FALSE) ;
599 #endif
600 }
601
602 void plc_clear_irq(struct s_smc *smc, int p)
603 {
604 SK_UNUSED(p) ;
605
606 #if (defined(ISA) || defined(EISA))
607 switch (p) {
608 case PA :
609 /* reset PLC Int. bits */
610 outpw(PLC2_I,inpw(PLC2_I)) ;
611 break ;
612 case PB :
613 /* reset PLC Int. bits */
614 outpw(PLC1_I,inpw(PLC1_I)) ;
615 break ;
616 }
617 #else
618 SK_UNUSED(smc) ;
619 #endif
620 }
621
622
623 /*
624 * led_indication called by rmt_indication() and
625 * pcm_state_change()
626 *
627 * Input:
628 * smc: SMT context
629 * led_event:
630 * 0 Only switch green LEDs according to their respective PCM state
631 * LED_Y_OFF just switch yellow LED off
632 * LED_Y_ON just switch yello LED on
633 */
634 void led_indication(struct s_smc *smc, int led_event)
635 {
636 /* use smc->hw.mac_ring_is_up == TRUE
637 * as indication for Ring Operational
638 */
639 u_short led_state ;
640 struct s_phy *phy ;
641 struct fddi_mib_p *mib_a ;
642 struct fddi_mib_p *mib_b ;
643
644 phy = &smc->y[PA] ;
645 mib_a = phy->mib ;
646 phy = &smc->y[PB] ;
647 mib_b = phy->mib ;
648
649 #ifdef EISA
650 /* Ring up = yellow led OFF*/
651 if (led_event == LED_Y_ON) {
652 smc->hw.led |= CS_LED_1 ;
653 }
654 else if (led_event == LED_Y_OFF) {
655 smc->hw.led &= ~CS_LED_1 ;
656 }
657 else {
658 /* Link at Port A or B = green led ON */
659 if (mib_a->fddiPORTPCMState == PC8_ACTIVE ||
660 mib_b->fddiPORTPCMState == PC8_ACTIVE) {
661 smc->hw.led |= CS_LED_0 ;
662 }
663 else {
664 smc->hw.led &= ~CS_LED_0 ;
665 }
666 }
667 #endif
668 #ifdef MCA
669 led_state = inpw(LEDR_A) ;
670
671 /* Ring up = yellow led OFF*/
672 if (led_event == LED_Y_ON) {
673 led_state |= LED_1 ;
674 }
675 else if (led_event == LED_Y_OFF) {
676 led_state &= ~LED_1 ;
677 }
678 else {
679 led_state &= ~(LED_2|LED_0) ;
680
681 /* Link at Port A = green led A ON */
682 if (mib_a->fddiPORTPCMState == PC8_ACTIVE) {
683 led_state |= LED_2 ;
684 }
685
686 /* Link at Port B/S = green led B ON */
687 if (mib_b->fddiPORTPCMState == PC8_ACTIVE) {
688 led_state |= LED_0 ;
689 }
690 }
691
692 outpw(LEDR_A, led_state) ;
693 #endif /* MCA */
694 #ifdef PCI
695 led_state = 0 ;
696
697 /* Ring up = yellow led OFF*/
698 if (led_event == LED_Y_ON) {
699 led_state |= LED_MY_ON ;
700 }
701 else if (led_event == LED_Y_OFF) {
702 led_state |= LED_MY_OFF ;
703 }
704 else { /* PCM state changed */
705 /* Link at Port A/S = green led A ON */
706 if (mib_a->fddiPORTPCMState == PC8_ACTIVE) {
707 led_state |= LED_GA_ON ;
708 }
709 else {
710 led_state |= LED_GA_OFF ;
711 }
712
713 /* Link at Port B = green led B ON */
714 if (mib_b->fddiPORTPCMState == PC8_ACTIVE) {
715 led_state |= LED_GB_ON ;
716 }
717 else {
718 led_state |= LED_GB_OFF ;
719 }
720 }
721
722 outp(ADDR(B0_LED), led_state) ;
723 #endif /* PCI */
724
725 }
726
727
728 void pcm_state_change(struct s_smc *smc, int plc, int p_state)
729 {
730 /*
731 * the current implementation of pcm_state_change() in the driver
732 * parts must be renamed to drv_pcm_state_change() which will be called
733 * now after led_indication.
734 */
735 DRV_PCM_STATE_CHANGE(smc,plc,p_state) ;
736
737 led_indication(smc,0) ;
738 }
739
740
741 void rmt_indication(struct s_smc *smc, int i)
742 {
743 /* Call a driver special function if defined */
744 DRV_RMT_INDICATION(smc,i) ;
745
746 led_indication(smc, i ? LED_Y_OFF : LED_Y_ON) ;
747 }
748
749
750 /*
751 * llc_recover_tx called by init_tx (fplus.c)
752 */
753 void llc_recover_tx(struct s_smc *smc)
754 {
755 #ifdef LOAD_GEN
756 extern int load_gen_flag ;
757
758 load_gen_flag = 0 ;
759 #endif
760 #ifndef SYNC
761 smc->hw.n_a_send= 0 ;
762 #else
763 SK_UNUSED(smc) ;
764 #endif
765 }
766
767 /*--------------------------- DMA init ----------------------------*/
768 #ifdef ISA
769
770 /*
771 * init DMA
772 */
773 void init_dma(struct s_smc *smc, int dma)
774 {
775 SK_UNUSED(smc) ;
776
777 /*
778 * set cascade mode,
779 * clear mask bit (enable DMA cannal)
780 */
781 if (dma > 3) {
782 outp(0xd6,(dma & 0x03) | 0xc0) ;
783 outp(0xd4, dma & 0x03) ;
784 }
785 else {
786 outp(0x0b,(dma & 0x03) | 0xc0) ;
787 outp(0x0a,dma & 0x03) ;
788 }
789 }
790
791 /*
792 * disable DMA
793 */
794 void dis_dma(struct s_smc *smc, int dma)
795 {
796 SK_UNUSED(smc) ;
797
798 /*
799 * set mask bit (disable DMA cannal)
800 */
801 if (dma > 3) {
802 outp(0xd4,(dma & 0x03) | 0x04) ;
803 }
804 else {
805 outp(0x0a,(dma & 0x03) | 0x04) ;
806 }
807 }
808
809 #endif /* ISA */
810
811 #ifdef EISA
812
813 /*arrays with io addresses of dma controller length and address registers*/
814 static const int cntr[8] = { 0x001,0x003,0x005,0x007,0,0x0c6,0x0ca,0x0ce } ;
815 static const int base[8] = { 0x000,0x002,0x004,0x006,0,0x0c4,0x0c8,0x0cc } ;
816 static const int page[8] = { 0x087,0x083,0x081,0x082,0,0x08b,0x089,0x08a } ;
817
818 void init_dma(struct s_smc *smc, int dma)
819 {
820 /*
821 * extended mode register
822 * 32 bit IO
823 * type c
824 * TC output
825 * disable stop
826 */
827
828 /* mode read (write) demand */
829 smc->hw.dma_rmode = (dma & 3) | 0x08 | 0x0 ;
830 smc->hw.dma_wmode = (dma & 3) | 0x04 | 0x0 ;
831
832 /* 32 bit IO's, burst DMA mode (type "C") */
833 smc->hw.dma_emode = (dma & 3) | 0x08 | 0x30 ;
834
835 outp((dma < 4) ? 0x40b : 0x4d6,smc->hw.dma_emode) ;
836
837 /* disable chaining */
838 outp((dma < 4) ? 0x40a : 0x4d4,(dma&3)) ;
839
840 /*load dma controller addresses for fast access during set dma*/
841 smc->hw.dma_base_word_count = cntr[smc->hw.dma];
842 smc->hw.dma_base_address = base[smc->hw.dma];
843 smc->hw.dma_base_address_page = page[smc->hw.dma];
844
845 }
846
847 void dis_dma(struct s_smc *smc, int dma)
848 {
849 SK_UNUSED(smc) ;
850
851 outp((dma < 4) ? 0x0a : 0xd4,(dma&3)|4) ;/* mask bit */
852 }
853 #endif /* EISA */
854
855 #ifdef MCA
856 void init_dma(struct s_smc *smc, int dma)
857 {
858 SK_UNUSED(smc) ;
859 SK_UNUSED(dma) ;
860 }
861
862 void dis_dma(struct s_smc *smc, int dma)
863 {
864 SK_UNUSED(smc) ;
865 SK_UNUSED(dma) ;
866 }
867 #endif
868
869 #ifdef PCI
870 void init_dma(struct s_smc *smc, int dma)
871 {
872 SK_UNUSED(smc) ;
873 SK_UNUSED(dma) ;
874 }
875
876 void dis_dma(struct s_smc *smc, int dma)
877 {
878 SK_UNUSED(smc) ;
879 SK_UNUSED(dma) ;
880 }
881 #endif
882
883 #ifdef MULT_OEM
884 static int is_equal_num(char comp1[], char comp2[], int num)
885 {
886 int i ;
887
888 for (i = 0 ; i < num ; i++) {
889 if (comp1[i] != comp2[i])
890 return (0) ;
891 }
892 return (1) ;
893 } /* is_equal_num */
894
895
896 /*
897 * set the OEM ID defaults, and test the contents of the OEM data base
898 * The default OEM is the first ACTIVE entry in the OEM data base
899 *
900 * returns: 0 success
901 * 1 error in data base
902 * 2 data base empty
903 * 3 no active entry
904 */
905 int set_oi_id_def(struct s_smc *smc)
906 {
907 int sel_id ;
908 int i ;
909 int act_entries ;
910
911 i = 0 ;
912 sel_id = -1 ;
913 act_entries = FALSE ;
914 smc->hw.oem_id = 0 ;
915 smc->hw.oem_min_status = OI_STAT_ACTIVE ;
916
917 /* check OEM data base */
918 while (oem_ids[i].oi_status) {
919 switch (oem_ids[i].oi_status) {
920 case OI_STAT_ACTIVE:
921 act_entries = TRUE ; /* we have active IDs */
922 if (sel_id == -1)
923 sel_id = i ; /* save the first active ID */
924 case OI_STAT_VALID:
925 case OI_STAT_PRESENT:
926 i++ ;
927 break ; /* entry ok */
928 default:
929 return (1) ; /* invalid oi_status */
930 }
931 }
932
933 if (i == 0)
934 return (2) ;
935 if (!act_entries)
936 return (3) ;
937
938 /* ok, we have a valid OEM data base with an active entry */
939 smc->hw.oem_id = (struct s_oem_ids *) &oem_ids[sel_id] ;
940 return (0) ;
941 }
942 #endif /* MULT_OEM */
943
944
945 #ifdef MCA
946 /************************
947 *
948 * BEGIN_MANUAL_ENTRY()
949 *
950 * exist_board
951 *
952 * Check if an MCA board is present in the specified slot.
953 *
954 * int exist_board(
955 * struct s_smc *smc,
956 * int slot) ;
957 * In
958 * smc - A pointer to the SMT Context struct.
959 *
960 * slot - The number of the slot to inspect.
961 * Out
962 * 0 = No adapter present.
963 * 1 = Found FM1 adapter.
964 *
965 * Pseudo
966 * Read MCA ID
967 * for all valid OEM_IDs
968 * compare with ID read
969 * if equal, return 1
970 * return(0
971 *
972 * Note
973 * The smc pointer must be valid now.
974 *
975 * END_MANUAL_ENTRY()
976 *
977 ************************/
978 #define LONG_CARD_ID(lo, hi) ((((hi) & 0xff) << 8) | ((lo) & 0xff))
979 int exist_board(struct s_smc *smc, int slot)
980 {
981 #ifdef MULT_OEM
982 SK_LOC_DECL(u_char,id[2]) ;
983 int idi ;
984 #endif /* MULT_OEM */
985
986 /* No longer valid. */
987 if (smc == NULL)
988 return(0) ;
989
990 #ifndef MULT_OEM
991 if (read_card_id(smc, slot)
992 == LONG_CARD_ID(OEMID(smc,0), OEMID(smc,1)))
993 return (1) ; /* Found FM adapter. */
994
995 #else /* MULT_OEM */
996 idi = read_card_id(smc, slot) ;
997 id[0] = idi & 0xff ;
998 id[1] = idi >> 8 ;
999
1000 smc->hw.oem_id = (struct s_oem_ids *) &oem_ids[0] ;
1001 for (; smc->hw.oem_id->oi_status != OI_STAT_LAST; smc->hw.oem_id++) {
1002 if (smc->hw.oem_id->oi_status < smc->hw.oem_min_status)
1003 continue ;
1004
1005 if (is_equal_num(&id[0],&OEMID(smc,0),2))
1006 return (1) ;
1007 }
1008 #endif /* MULT_OEM */
1009 return (0) ; /* No adapter found. */
1010 }
1011
1012 /************************
1013 *
1014 * read_card_id
1015 *
1016 * Read the MCA card id from the specified slot.
1017 * In
1018 * smc - A pointer to the SMT Context struct.
1019 * CAVEAT: This pointer may be NULL and *must not* be used within this
1020 * function. It's only purpose is for drivers that need some information
1021 * for the inp() and outp() macros.
1022 *
1023 * slot - The number of the slot for which the card id is returned.
1024 * Out
1025 * Returns the card id read from the specified slot. If an illegal slot
1026 * number is specified, the function returns zero.
1027 *
1028 ************************/
1029 static int read_card_id(struct s_smc *smc, int slot)
1030 /* struct s_smc *smc ; Do not use. */
1031 {
1032 int card_id ;
1033
1034 SK_UNUSED(smc) ; /* Make LINT happy. */
1035 if ((slot < 1) || (slot > 15)) /* max 16 slots, 0 = motherboard */
1036 return (0) ; /* Illegal slot number specified. */
1037
1038 EnableSlotAccess(smc, slot) ;
1039
1040 card_id = ((read_POS(smc,POS_ID_HIGH,slot - 1) & 0xff) << 8) |
1041 (read_POS(smc,POS_ID_LOW,slot - 1) & 0xff) ;
1042
1043 DisableSlotAccess(smc) ;
1044
1045 return (card_id) ;
1046 }
1047
1048 /************************
1049 *
1050 * BEGIN_MANUAL_ENTRY()
1051 *
1052 * get_board_para
1053 *
1054 * Get adapter configuration information. Fill all board specific
1055 * parameters within the 'smc' structure.
1056 *
1057 * int get_board_para(
1058 * struct s_smc *smc,
1059 * int slot) ;
1060 * In
1061 * smc - A pointer to the SMT Context struct, to which this function will
1062 * write some adapter configuration data.
1063 *
1064 * slot - The number of the slot, in which the adapter is installed.
1065 * Out
1066 * 0 = No adapter present.
1067 * 1 = Ok.
1068 * 2 = Adapter present, but card enable bit not set.
1069 *
1070 * END_MANUAL_ENTRY()
1071 *
1072 ************************/
1073 int get_board_para(struct s_smc *smc, int slot)
1074 {
1075 int val ;
1076 int i ;
1077
1078 /* Check if adapter present & get type of adapter. */
1079 switch (exist_board(smc, slot)) {
1080 case 0: /* Adapter not present. */
1081 return (0) ;
1082 case 1: /* FM Rev. 1 */
1083 smc->hw.rev = FM1_REV ;
1084 smc->hw.VFullRead = 0x0a ;
1085 smc->hw.VFullWrite = 0x05 ;
1086 smc->hw.DmaWriteExtraBytes = 8 ; /* 2 extra words. */
1087 break ;
1088 }
1089 smc->hw.slot = slot ;
1090
1091 EnableSlotAccess(smc, slot) ;
1092
1093 if (!(read_POS(smc,POS_102, slot - 1) & POS_CARD_EN)) {
1094 DisableSlotAccess(smc) ;
1095 return (2) ; /* Card enable bit not set. */
1096 }
1097
1098 val = read_POS(smc,POS_104, slot - 1) ; /* I/O, IRQ */
1099
1100 #ifndef MEM_MAPPED_IO /* is defined by the operating system */
1101 i = val & POS_IOSEL ; /* I/O base addr. (0x0200 .. 0xfe00) */
1102 smc->hw.iop = (i + 1) * 0x0400 - 0x200 ;
1103 #endif
1104 i = ((val & POS_IRQSEL) >> 6) & 0x03 ; /* IRQ <0, 1> */
1105 smc->hw.irq = opt_ints[i] ;
1106
1107 /* FPROM base addr. */
1108 i = ((read_POS(smc,POS_103, slot - 1) & POS_MSEL) >> 4) & 0x07 ;
1109 smc->hw.eprom = opt_eproms[i] ;
1110
1111 DisableSlotAccess(smc) ;
1112
1113 /* before this, the smc->hw.iop must be set !!! */
1114 smc->hw.slot_32 = inpw(CSF_A) & SLOT_32 ;
1115
1116 return (1) ;
1117 }
1118
1119 /* Enable access to specified MCA slot. */
1120 static void EnableSlotAccess(struct s_smc *smc, int slot)
1121 {
1122 SK_UNUSED(slot) ;
1123
1124 #ifndef AIX
1125 SK_UNUSED(smc) ;
1126
1127 /* System mode. */
1128 outp(POS_SYS_SETUP, POS_SYSTEM) ;
1129
1130 /* Select slot. */
1131 outp(POS_CHANNEL_POS, POS_CHANNEL_BIT | (slot-1)) ;
1132 #else
1133 attach_POS_addr (smc) ;
1134 #endif
1135 }
1136
1137 /* Disable access to MCA slot formerly enabled via EnableSlotAccess(). */
1138 static void DisableSlotAccess(struct s_smc *smc)
1139 {
1140 #ifndef AIX
1141 SK_UNUSED(smc) ;
1142
1143 outp(POS_CHANNEL_POS, 0) ;
1144 #else
1145 detach_POS_addr (smc) ;
1146 #endif
1147 }
1148 #endif /* MCA */
1149
1150 #ifdef EISA
1151 #ifndef MEM_MAPPED_IO
1152 #define SADDR(slot) (((slot)<<12)&0xf000)
1153 #else /* MEM_MAPPED_IO */
1154 #define SADDR(slot) (smc->hw.iop)
1155 #endif /* MEM_MAPPED_IO */
1156
1157 /************************
1158 *
1159 * BEGIN_MANUAL_ENTRY()
1160 *
1161 * exist_board
1162 *
1163 * Check if an EISA board is present in the specified slot.
1164 *
1165 * int exist_board(
1166 * struct s_smc *smc,
1167 * int slot) ;
1168 * In
1169 * smc - A pointer to the SMT Context struct.
1170 *
1171 * slot - The number of the slot to inspect.
1172 * Out
1173 * 0 = No adapter present.
1174 * 1 = Found adapter.
1175 *
1176 * Pseudo
1177 * Read EISA ID
1178 * for all valid OEM_IDs
1179 * compare with ID read
1180 * if equal, return 1
1181 * return(0
1182 *
1183 * Note
1184 * The smc pointer must be valid now.
1185 *
1186 ************************/
1187 int exist_board(struct s_smc *smc, int slot)
1188 {
1189 int i ;
1190 #ifdef MULT_OEM
1191 SK_LOC_DECL(u_char,id[4]) ;
1192 #endif /* MULT_OEM */
1193
1194 /* No longer valid. */
1195 if (smc == NULL)
1196 return(0);
1197
1198 SK_UNUSED(slot) ;
1199
1200 #ifndef MULT_OEM
1201 for (i = 0 ; i < 4 ; i++) {
1202 if (inp(SADDR(slot)+PRA(i)) != OEMID(smc,i))
1203 return(0) ;
1204 }
1205 return(1) ;
1206 #else /* MULT_OEM */
1207 for (i = 0 ; i < 4 ; i++)
1208 id[i] = inp(SADDR(slot)+PRA(i)) ;
1209
1210 smc->hw.oem_id = (struct s_oem_ids *) &oem_ids[0] ;
1211
1212 for (; smc->hw.oem_id->oi_status != OI_STAT_LAST; smc->hw.oem_id++) {
1213 if (smc->hw.oem_id->oi_status < smc->hw.oem_min_status)
1214 continue ;
1215
1216 if (is_equal_num(&id[0],&OEMID(smc,0),4))
1217 return (1) ;
1218 }
1219 return (0) ; /* No adapter found. */
1220 #endif /* MULT_OEM */
1221 }
1222
1223
1224 int get_board_para(struct s_smc *smc, int slot)
1225 {
1226 int i ;
1227
1228 if (!exist_board(smc,slot))
1229 return(0) ;
1230
1231 smc->hw.slot = slot ;
1232 #ifndef MEM_MAPPED_IO /* if defined by the operating system */
1233 smc->hw.iop = SADDR(slot) ;
1234 #endif
1235
1236 if (!(inp(C0_A(0))&CFG_CARD_EN)) {
1237 return(2) ; /* CFG_CARD_EN bit not set! */
1238 }
1239
1240 smc->hw.irq = opt_ints[(inp(C1_A(0)) & CFG_IRQ_SEL)] ;
1241 smc->hw.dma = opt_dmas[((inp(C1_A(0)) & CFG_DRQ_SEL)>>3)] ;
1242
1243 if ((i = inp(C2_A(0)) & CFG_EPROM_SEL) != 0x0f)
1244 smc->hw.eprom = opt_eproms[i] ;
1245 else
1246 smc->hw.eprom = 0 ;
1247
1248 smc->hw.DmaWriteExtraBytes = 8 ;
1249
1250 return(1) ;
1251 }
1252 #endif /* EISA */
1253
1254 #ifdef ISA
1255 #ifndef MULT_OEM
1256 const u_char sklogo[6] = SKLOGO_STR ;
1257 #define SIZE_SKLOGO(smc) sizeof(sklogo)
1258 #define SKLOGO(smc,i) sklogo[i]
1259 #else /* MULT_OEM */
1260 #define SIZE_SKLOGO(smc) smc->hw.oem_id->oi_logo_len
1261 #define SKLOGO(smc,i) smc->hw.oem_id->oi_logo[i]
1262 #endif /* MULT_OEM */
1263
1264
1265 int exist_board(struct s_smc *smc, HW_PTR port)
1266 {
1267 int i ;
1268 #ifdef MULT_OEM
1269 int bytes_read ;
1270 u_char board_logo[15] ;
1271 SK_LOC_DECL(u_char,id[4]) ;
1272 #endif /* MULT_OEM */
1273
1274 /* No longer valid. */
1275 if (smc == NULL)
1276 return(0);
1277
1278 SK_UNUSED(smc) ;
1279 #ifndef MULT_OEM
1280 for (i = SADDRL ; i < (signed) (SADDRL+SIZE_SKLOGO(smc)) ; i++) {
1281 if ((u_char)inpw((PRA(i)+port)) != SKLOGO(smc,i-SADDRL)) {
1282 return(0) ;
1283 }
1284 }
1285
1286 /* check MAC address (S&K or other) */
1287 for (i = 0 ; i < 3 ; i++) {
1288 if ((u_char)inpw((PRA(i)+port)) != OEMID(smc,i))
1289 return(0) ;
1290 }
1291 return(1) ;
1292 #else /* MULT_OEM */
1293 smc->hw.oem_id = (struct s_oem_ids *) &oem_ids[0] ;
1294 board_logo[0] = (u_char)inpw((PRA(SADDRL)+port)) ;
1295 bytes_read = 1 ;
1296
1297 for (; smc->hw.oem_id->oi_status != OI_STAT_LAST; smc->hw.oem_id++) {
1298 if (smc->hw.oem_id->oi_status < smc->hw.oem_min_status)
1299 continue ;
1300
1301 /* Test all read bytes with current OEM_entry */
1302 /* for (i=0; (i<bytes_read) && (i < SIZE_SKLOGO(smc)); i++) { */
1303 for (i = 0; i < bytes_read; i++) {
1304 if (board_logo[i] != SKLOGO(smc,i))
1305 break ;
1306 }
1307
1308 /* If mismatch, switch to next OEM entry */
1309 if ((board_logo[i] != SKLOGO(smc,i)) && (i < bytes_read))
1310 continue ;
1311
1312 --i ;
1313 while (bytes_read < SIZE_SKLOGO(smc)) {
1314 // inpw next byte SK_Logo
1315 i++ ;
1316 board_logo[i] = (u_char)inpw((PRA(SADDRL+i)+port)) ;
1317 bytes_read++ ;
1318 if (board_logo[i] != SKLOGO(smc,i))
1319 break ;
1320 }
1321
1322 for (i = 0 ; i < 3 ; i++)
1323 id[i] = (u_char)inpw((PRA(i)+port)) ;
1324
1325 if ((board_logo[i] == SKLOGO(smc,i))
1326 && (bytes_read == SIZE_SKLOGO(smc))) {
1327
1328 if (is_equal_num(&id[0],&OEMID(smc,0),3))
1329 return(1);
1330 }
1331 } /* for */
1332 return(0) ;
1333 #endif /* MULT_OEM */
1334 }
1335
1336 int get_board_para(struct s_smc *smc, int slot)
1337 {
1338 SK_UNUSED(smc) ;
1339 SK_UNUSED(slot) ;
1340 return(0) ; /* for ISA not supported */
1341 }
1342 #endif /* ISA */
1343
1344 #ifdef PCI
1345 #ifdef USE_BIOS_FUN
1346 int exist_board(struct s_smc *smc, int slot)
1347 {
1348 u_short dev_id ;
1349 u_short ven_id ;
1350 int found ;
1351 int i ;
1352
1353 found = FALSE ; /* make sure we returned with adatper not found*/
1354 /* if an empty oemids.h was included */
1355
1356 #ifdef MULT_OEM
1357 smc->hw.oem_id = (struct s_oem_ids *) &oem_ids[0] ;
1358 for (; smc->hw.oem_id->oi_status != OI_STAT_LAST; smc->hw.oem_id++) {
1359 if (smc->hw.oem_id->oi_status < smc->hw.oem_min_status)
1360 continue ;
1361 #endif
1362 ven_id = OEMID(smc,0) + (OEMID(smc,1) << 8) ;
1363 dev_id = OEMID(smc,2) + (OEMID(smc,3) << 8) ;
1364 for (i = 0; i < slot; i++) {
1365 if (pci_find_device(i,&smc->hw.pci_handle,
1366 dev_id,ven_id) != 0) {
1367
1368 found = FALSE ;
1369 } else {
1370 found = TRUE ;
1371 }
1372 }
1373 if (found) {
1374 return(1) ; /* adapter was found */
1375 }
1376 #ifdef MULT_OEM
1377 }
1378 #endif
1379 return(0) ; /* adapter was not found */
1380 }
1381 #endif /* PCI */
1382 #endif /* USE_BIOS_FUNC */
1383
1384 void driver_get_bia(struct s_smc *smc, struct fddi_addr *bia_addr)
1385 {
1386 int i ;
1387
1388 extern const u_char canonical[256] ;
1389
1390 for (i = 0 ; i < 6 ; i++) {
1391 bia_addr->a[i] = canonical[smc->hw.fddi_phys_addr.a[i]] ;
1392 }
1393 }
1394
1395 void smt_start_watchdog(struct s_smc *smc)
1396 {
1397 SK_UNUSED(smc) ; /* Make LINT happy. */
1398
1399 #ifndef DEBUG
1400
1401 #ifdef PCI
1402 if (smc->hw.wdog_used) {
1403 outpw(ADDR(B2_WDOG_CRTL),TIM_START) ; /* Start timer. */
1404 }
1405 #endif
1406
1407 #endif /* DEBUG */
1408 }
1409
1410 void smt_stop_watchdog(struct s_smc *smc)
1411 {
1412 SK_UNUSED(smc) ; /* Make LINT happy. */
1413 #ifndef DEBUG
1414
1415 #ifdef PCI
1416 if (smc->hw.wdog_used) {
1417 outpw(ADDR(B2_WDOG_CRTL),TIM_STOP) ; /* Stop timer. */
1418 }
1419 #endif
1420
1421 #endif /* DEBUG */
1422 }
1423
1424 #ifdef PCI
1425 static char get_rom_byte(struct s_smc *smc, u_short addr)
1426 {
1427 GET_PAGE(addr) ;
1428 return (READ_PROM(ADDR(B2_FDP))) ;
1429 }
1430
1431 /*
1432 * ROM image defines
1433 */
1434 #define ROM_SIG_1 0
1435 #define ROM_SIG_2 1
1436 #define PCI_DATA_1 0x18
1437 #define PCI_DATA_2 0x19
1438
1439 /*
1440 * PCI data structure defines
1441 */
1442 #define VPD_DATA_1 0x08
1443 #define VPD_DATA_2 0x09
1444 #define IMAGE_LEN_1 0x10
1445 #define IMAGE_LEN_2 0x11
1446 #define CODE_TYPE 0x14
1447 #define INDICATOR 0x15
1448
1449 /*
1450 * BEGIN_MANUAL_ENTRY(mac_drv_vpd_read)
1451 * mac_drv_vpd_read(smc,buf,size,image)
1452 *
1453 * function DOWNCALL (FDDIWARE)
1454 * reads the VPD data of the FPROM and writes it into the
1455 * buffer
1456 *
1457 * para buf points to the buffer for the VPD data
1458 * size size of the VPD data buffer
1459 * image boot image; code type of the boot image
1460 * image = 0 Intel x86, PC-AT compatible
1461 * 1 OPENBOOT standard for PCI
1462 * 2-FF reserved
1463 *
1464 * returns len number of VPD data bytes read form the FPROM
1465 * <0 number of read bytes
1466 * >0 error: data invalid
1467 *
1468 * END_MANUAL_ENTRY
1469 */
1470 int mac_drv_vpd_read(struct s_smc *smc, char *buf, int size, char image)
1471 {
1472 u_short ibase ;
1473 u_short pci_base ;
1474 u_short vpd ;
1475 int len ;
1476
1477 len = 0 ;
1478 ibase = 0 ;
1479 /*
1480 * as long images defined
1481 */
1482 while (get_rom_byte(smc,ibase+ROM_SIG_1) == 0x55 &&
1483 (u_char) get_rom_byte(smc,ibase+ROM_SIG_2) == 0xaa) {
1484 /*
1485 * get the pointer to the PCI data structure
1486 */
1487 pci_base = ibase + get_rom_byte(smc,ibase+PCI_DATA_1) +
1488 (get_rom_byte(smc,ibase+PCI_DATA_2) << 8) ;
1489
1490 if (image == get_rom_byte(smc,pci_base+CODE_TYPE)) {
1491 /*
1492 * we have the right image, read the VPD data
1493 */
1494 vpd = ibase + get_rom_byte(smc,pci_base+VPD_DATA_1) +
1495 (get_rom_byte(smc,pci_base+VPD_DATA_2) << 8) ;
1496 if (vpd == ibase) {
1497 break ; /* no VPD data */
1498 }
1499 for (len = 0; len < size; len++,buf++,vpd++) {
1500 *buf = get_rom_byte(smc,vpd) ;
1501 }
1502 break ;
1503 }
1504 else {
1505 /*
1506 * try the next image
1507 */
1508 if (get_rom_byte(smc,pci_base+INDICATOR) & 0x80) {
1509 break ; /* this was the last image */
1510 }
1511 ibase = ibase + get_rom_byte(smc,ibase+IMAGE_LEN_1) +
1512 (get_rom_byte(smc,ibase+IMAGE_LEN_2) << 8) ;
1513 }
1514 }
1515
1516 return(len) ;
1517 }
1518
1519 void mac_drv_pci_fix(struct s_smc *smc, u_long fix_value)
1520 {
1521 smc->hw.pci_fix_value = fix_value ;
1522 }
1523
1524 void mac_do_pci_fix(struct s_smc *smc)
1525 {
1526 SK_UNUSED(smc) ;
1527 }
1528 #endif /* PCI */
1529
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