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[mirror_ubuntu-bionic-kernel.git] / drivers / net / smc911x.c
1 /*
2 * smc911x.c
3 * This is a driver for SMSC's LAN911{5,6,7,8} single-chip Ethernet devices.
4 *
5 * Copyright (C) 2005 Sensoria Corp
6 * Derived from the unified SMC91x driver by Nicolas Pitre
7 * and the smsc911x.c reference driver by SMSC
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License as published by
11 * the Free Software Foundation; either version 2 of the License, or
12 * (at your option) any later version.
13 *
14 * This program is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
18 *
19 * You should have received a copy of the GNU General Public License
20 * along with this program; if not, write to the Free Software
21 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
22 *
23 * Arguments:
24 * watchdog = TX watchdog timeout
25 * tx_fifo_kb = Size of TX FIFO in KB
26 *
27 * History:
28 * 04/16/05 Dustin McIntire Initial version
29 */
30 static const char version[] =
31 "smc911x.c: v1.0 04-16-2005 by Dustin McIntire <dustin@sensoria.com>\n";
32
33 /* Debugging options */
34 #define ENABLE_SMC_DEBUG_RX 0
35 #define ENABLE_SMC_DEBUG_TX 0
36 #define ENABLE_SMC_DEBUG_DMA 0
37 #define ENABLE_SMC_DEBUG_PKTS 0
38 #define ENABLE_SMC_DEBUG_MISC 0
39 #define ENABLE_SMC_DEBUG_FUNC 0
40
41 #define SMC_DEBUG_RX ((ENABLE_SMC_DEBUG_RX ? 1 : 0) << 0)
42 #define SMC_DEBUG_TX ((ENABLE_SMC_DEBUG_TX ? 1 : 0) << 1)
43 #define SMC_DEBUG_DMA ((ENABLE_SMC_DEBUG_DMA ? 1 : 0) << 2)
44 #define SMC_DEBUG_PKTS ((ENABLE_SMC_DEBUG_PKTS ? 1 : 0) << 3)
45 #define SMC_DEBUG_MISC ((ENABLE_SMC_DEBUG_MISC ? 1 : 0) << 4)
46 #define SMC_DEBUG_FUNC ((ENABLE_SMC_DEBUG_FUNC ? 1 : 0) << 5)
47
48 #ifndef SMC_DEBUG
49 #define SMC_DEBUG ( SMC_DEBUG_RX | \
50 SMC_DEBUG_TX | \
51 SMC_DEBUG_DMA | \
52 SMC_DEBUG_PKTS | \
53 SMC_DEBUG_MISC | \
54 SMC_DEBUG_FUNC \
55 )
56 #endif
57
58 #include <linux/init.h>
59 #include <linux/module.h>
60 #include <linux/kernel.h>
61 #include <linux/sched.h>
62 #include <linux/slab.h>
63 #include <linux/delay.h>
64 #include <linux/interrupt.h>
65 #include <linux/errno.h>
66 #include <linux/ioport.h>
67 #include <linux/crc32.h>
68 #include <linux/device.h>
69 #include <linux/platform_device.h>
70 #include <linux/spinlock.h>
71 #include <linux/ethtool.h>
72 #include <linux/mii.h>
73 #include <linux/workqueue.h>
74
75 #include <linux/netdevice.h>
76 #include <linux/etherdevice.h>
77 #include <linux/skbuff.h>
78
79 #include <asm/io.h>
80 #include <asm/irq.h>
81
82 #include "smc911x.h"
83
84 /*
85 * Transmit timeout, default 5 seconds.
86 */
87 static int watchdog = 5000;
88 module_param(watchdog, int, 0400);
89 MODULE_PARM_DESC(watchdog, "transmit timeout in milliseconds");
90
91 static int tx_fifo_kb=8;
92 module_param(tx_fifo_kb, int, 0400);
93 MODULE_PARM_DESC(tx_fifo_kb,"transmit FIFO size in KB (1<x<15)(default=8)");
94
95 MODULE_LICENSE("GPL");
96
97 /*
98 * The internal workings of the driver. If you are changing anything
99 * here with the SMC stuff, you should have the datasheet and know
100 * what you are doing.
101 */
102 #define CARDNAME "smc911x"
103
104 /*
105 * Use power-down feature of the chip
106 */
107 #define POWER_DOWN 1
108
109
110 /* store this information for the driver.. */
111 struct smc911x_local {
112 /*
113 * If I have to wait until the DMA is finished and ready to reload a
114 * packet, I will store the skbuff here. Then, the DMA will send it
115 * out and free it.
116 */
117 struct sk_buff *pending_tx_skb;
118
119 /*
120 * these are things that the kernel wants me to keep, so users
121 * can find out semi-useless statistics of how well the card is
122 * performing
123 */
124 struct net_device_stats stats;
125
126 /* version/revision of the SMC911x chip */
127 u16 version;
128 u16 revision;
129
130 /* FIFO sizes */
131 int tx_fifo_kb;
132 int tx_fifo_size;
133 int rx_fifo_size;
134 int afc_cfg;
135
136 /* Contains the current active receive/phy mode */
137 int ctl_rfduplx;
138 int ctl_rspeed;
139
140 u32 msg_enable;
141 u32 phy_type;
142 struct mii_if_info mii;
143
144 /* work queue */
145 struct work_struct phy_configure;
146 int work_pending;
147
148 int tx_throttle;
149 spinlock_t lock;
150
151 struct net_device *netdev;
152
153 #ifdef SMC_USE_DMA
154 /* DMA needs the physical address of the chip */
155 u_long physaddr;
156 int rxdma;
157 int txdma;
158 int rxdma_active;
159 int txdma_active;
160 struct sk_buff *current_rx_skb;
161 struct sk_buff *current_tx_skb;
162 struct device *dev;
163 #endif
164 };
165
166 #if SMC_DEBUG > 0
167 #define DBG(n, args...) \
168 do { \
169 if (SMC_DEBUG & (n)) \
170 printk(args); \
171 } while (0)
172
173 #define PRINTK(args...) printk(args)
174 #else
175 #define DBG(n, args...) do { } while (0)
176 #define PRINTK(args...) printk(KERN_DEBUG args)
177 #endif
178
179 #if SMC_DEBUG_PKTS > 0
180 static void PRINT_PKT(u_char *buf, int length)
181 {
182 int i;
183 int remainder;
184 int lines;
185
186 lines = length / 16;
187 remainder = length % 16;
188
189 for (i = 0; i < lines ; i ++) {
190 int cur;
191 for (cur = 0; cur < 8; cur++) {
192 u_char a, b;
193 a = *buf++;
194 b = *buf++;
195 printk("%02x%02x ", a, b);
196 }
197 printk("\n");
198 }
199 for (i = 0; i < remainder/2 ; i++) {
200 u_char a, b;
201 a = *buf++;
202 b = *buf++;
203 printk("%02x%02x ", a, b);
204 }
205 printk("\n");
206 }
207 #else
208 #define PRINT_PKT(x...) do { } while (0)
209 #endif
210
211
212 /* this enables an interrupt in the interrupt mask register */
213 #define SMC_ENABLE_INT(x) do { \
214 unsigned int __mask; \
215 unsigned long __flags; \
216 spin_lock_irqsave(&lp->lock, __flags); \
217 __mask = SMC_GET_INT_EN(); \
218 __mask |= (x); \
219 SMC_SET_INT_EN(__mask); \
220 spin_unlock_irqrestore(&lp->lock, __flags); \
221 } while (0)
222
223 /* this disables an interrupt from the interrupt mask register */
224 #define SMC_DISABLE_INT(x) do { \
225 unsigned int __mask; \
226 unsigned long __flags; \
227 spin_lock_irqsave(&lp->lock, __flags); \
228 __mask = SMC_GET_INT_EN(); \
229 __mask &= ~(x); \
230 SMC_SET_INT_EN(__mask); \
231 spin_unlock_irqrestore(&lp->lock, __flags); \
232 } while (0)
233
234 /*
235 * this does a soft reset on the device
236 */
237 static void smc911x_reset(struct net_device *dev)
238 {
239 unsigned long ioaddr = dev->base_addr;
240 struct smc911x_local *lp = netdev_priv(dev);
241 unsigned int reg, timeout=0, resets=1;
242 unsigned long flags;
243
244 DBG(SMC_DEBUG_FUNC, "%s: --> %s\n", dev->name, __FUNCTION__);
245
246 /* Take out of PM setting first */
247 if ((SMC_GET_PMT_CTRL() & PMT_CTRL_READY_) == 0) {
248 /* Write to the bytetest will take out of powerdown */
249 SMC_SET_BYTE_TEST(0);
250 timeout=10;
251 do {
252 udelay(10);
253 reg = SMC_GET_PMT_CTRL() & PMT_CTRL_READY_;
254 } while ( timeout-- && !reg);
255 if (timeout == 0) {
256 PRINTK("%s: smc911x_reset timeout waiting for PM restore\n", dev->name);
257 return;
258 }
259 }
260
261 /* Disable all interrupts */
262 spin_lock_irqsave(&lp->lock, flags);
263 SMC_SET_INT_EN(0);
264 spin_unlock_irqrestore(&lp->lock, flags);
265
266 while (resets--) {
267 SMC_SET_HW_CFG(HW_CFG_SRST_);
268 timeout=10;
269 do {
270 udelay(10);
271 reg = SMC_GET_HW_CFG();
272 /* If chip indicates reset timeout then try again */
273 if (reg & HW_CFG_SRST_TO_) {
274 PRINTK("%s: chip reset timeout, retrying...\n", dev->name);
275 resets++;
276 break;
277 }
278 } while ( timeout-- && (reg & HW_CFG_SRST_));
279 }
280 if (timeout == 0) {
281 PRINTK("%s: smc911x_reset timeout waiting for reset\n", dev->name);
282 return;
283 }
284
285 /* make sure EEPROM has finished loading before setting GPIO_CFG */
286 timeout=1000;
287 while ( timeout-- && (SMC_GET_E2P_CMD() & E2P_CMD_EPC_BUSY_)) {
288 udelay(10);
289 }
290 if (timeout == 0){
291 PRINTK("%s: smc911x_reset timeout waiting for EEPROM busy\n", dev->name);
292 return;
293 }
294
295 /* Initialize interrupts */
296 SMC_SET_INT_EN(0);
297 SMC_ACK_INT(-1);
298
299 /* Reset the FIFO level and flow control settings */
300 SMC_SET_HW_CFG((lp->tx_fifo_kb & 0xF) << 16);
301 //TODO: Figure out what appropriate pause time is
302 SMC_SET_FLOW(FLOW_FCPT_ | FLOW_FCEN_);
303 SMC_SET_AFC_CFG(lp->afc_cfg);
304
305
306 /* Set to LED outputs */
307 SMC_SET_GPIO_CFG(0x70070000);
308
309 /*
310 * Deassert IRQ for 1*10us for edge type interrupts
311 * and drive IRQ pin push-pull
312 */
313 SMC_SET_IRQ_CFG( (1 << 24) | INT_CFG_IRQ_EN_ | INT_CFG_IRQ_TYPE_ );
314
315 /* clear anything saved */
316 if (lp->pending_tx_skb != NULL) {
317 dev_kfree_skb (lp->pending_tx_skb);
318 lp->pending_tx_skb = NULL;
319 lp->stats.tx_errors++;
320 lp->stats.tx_aborted_errors++;
321 }
322 }
323
324 /*
325 * Enable Interrupts, Receive, and Transmit
326 */
327 static void smc911x_enable(struct net_device *dev)
328 {
329 unsigned long ioaddr = dev->base_addr;
330 struct smc911x_local *lp = netdev_priv(dev);
331 unsigned mask, cfg, cr;
332 unsigned long flags;
333
334 DBG(SMC_DEBUG_FUNC, "%s: --> %s\n", dev->name, __FUNCTION__);
335
336 SMC_SET_MAC_ADDR(dev->dev_addr);
337
338 /* Enable TX */
339 cfg = SMC_GET_HW_CFG();
340 cfg &= HW_CFG_TX_FIF_SZ_ | 0xFFF;
341 cfg |= HW_CFG_SF_;
342 SMC_SET_HW_CFG(cfg);
343 SMC_SET_FIFO_TDA(0xFF);
344 /* Update TX stats on every 64 packets received or every 1 sec */
345 SMC_SET_FIFO_TSL(64);
346 SMC_SET_GPT_CFG(GPT_CFG_TIMER_EN_ | 10000);
347
348 spin_lock_irqsave(&lp->lock, flags);
349 SMC_GET_MAC_CR(cr);
350 cr |= MAC_CR_TXEN_ | MAC_CR_HBDIS_;
351 SMC_SET_MAC_CR(cr);
352 SMC_SET_TX_CFG(TX_CFG_TX_ON_);
353 spin_unlock_irqrestore(&lp->lock, flags);
354
355 /* Add 2 byte padding to start of packets */
356 SMC_SET_RX_CFG((2<<8) & RX_CFG_RXDOFF_);
357
358 /* Turn on receiver and enable RX */
359 if (cr & MAC_CR_RXEN_)
360 DBG(SMC_DEBUG_RX, "%s: Receiver already enabled\n", dev->name);
361
362 spin_lock_irqsave(&lp->lock, flags);
363 SMC_SET_MAC_CR( cr | MAC_CR_RXEN_ );
364 spin_unlock_irqrestore(&lp->lock, flags);
365
366 /* Interrupt on every received packet */
367 SMC_SET_FIFO_RSA(0x01);
368 SMC_SET_FIFO_RSL(0x00);
369
370 /* now, enable interrupts */
371 mask = INT_EN_TDFA_EN_ | INT_EN_TSFL_EN_ | INT_EN_RSFL_EN_ |
372 INT_EN_GPT_INT_EN_ | INT_EN_RXDFH_INT_EN_ | INT_EN_RXE_EN_ |
373 INT_EN_PHY_INT_EN_;
374 if (IS_REV_A(lp->revision))
375 mask|=INT_EN_RDFL_EN_;
376 else {
377 mask|=INT_EN_RDFO_EN_;
378 }
379 SMC_ENABLE_INT(mask);
380 }
381
382 /*
383 * this puts the device in an inactive state
384 */
385 static void smc911x_shutdown(struct net_device *dev)
386 {
387 unsigned long ioaddr = dev->base_addr;
388 struct smc911x_local *lp = netdev_priv(dev);
389 unsigned cr;
390 unsigned long flags;
391
392 DBG(SMC_DEBUG_FUNC, "%s: --> %s\n", CARDNAME, __FUNCTION__);
393
394 /* Disable IRQ's */
395 SMC_SET_INT_EN(0);
396
397 /* Turn of Rx and TX */
398 spin_lock_irqsave(&lp->lock, flags);
399 SMC_GET_MAC_CR(cr);
400 cr &= ~(MAC_CR_TXEN_ | MAC_CR_RXEN_ | MAC_CR_HBDIS_);
401 SMC_SET_MAC_CR(cr);
402 SMC_SET_TX_CFG(TX_CFG_STOP_TX_);
403 spin_unlock_irqrestore(&lp->lock, flags);
404 }
405
406 static inline void smc911x_drop_pkt(struct net_device *dev)
407 {
408 unsigned long ioaddr = dev->base_addr;
409 unsigned int fifo_count, timeout, reg;
410
411 DBG(SMC_DEBUG_FUNC | SMC_DEBUG_RX, "%s: --> %s\n", CARDNAME, __FUNCTION__);
412 fifo_count = SMC_GET_RX_FIFO_INF() & 0xFFFF;
413 if (fifo_count <= 4) {
414 /* Manually dump the packet data */
415 while (fifo_count--)
416 SMC_GET_RX_FIFO();
417 } else {
418 /* Fast forward through the bad packet */
419 SMC_SET_RX_DP_CTRL(RX_DP_CTRL_FFWD_BUSY_);
420 timeout=50;
421 do {
422 udelay(10);
423 reg = SMC_GET_RX_DP_CTRL() & RX_DP_CTRL_FFWD_BUSY_;
424 } while ( timeout-- && reg);
425 if (timeout == 0) {
426 PRINTK("%s: timeout waiting for RX fast forward\n", dev->name);
427 }
428 }
429 }
430
431 /*
432 * This is the procedure to handle the receipt of a packet.
433 * It should be called after checking for packet presence in
434 * the RX status FIFO. It must be called with the spin lock
435 * already held.
436 */
437 static inline void smc911x_rcv(struct net_device *dev)
438 {
439 struct smc911x_local *lp = netdev_priv(dev);
440 unsigned long ioaddr = dev->base_addr;
441 unsigned int pkt_len, status;
442 struct sk_buff *skb;
443 unsigned char *data;
444
445 DBG(SMC_DEBUG_FUNC | SMC_DEBUG_RX, "%s: --> %s\n",
446 dev->name, __FUNCTION__);
447 status = SMC_GET_RX_STS_FIFO();
448 DBG(SMC_DEBUG_RX, "%s: Rx pkt len %d status 0x%08x \n",
449 dev->name, (status & 0x3fff0000) >> 16, status & 0xc000ffff);
450 pkt_len = (status & RX_STS_PKT_LEN_) >> 16;
451 if (status & RX_STS_ES_) {
452 /* Deal with a bad packet */
453 lp->stats.rx_errors++;
454 if (status & RX_STS_CRC_ERR_)
455 lp->stats.rx_crc_errors++;
456 else {
457 if (status & RX_STS_LEN_ERR_)
458 lp->stats.rx_length_errors++;
459 if (status & RX_STS_MCAST_)
460 lp->stats.multicast++;
461 }
462 /* Remove the bad packet data from the RX FIFO */
463 smc911x_drop_pkt(dev);
464 } else {
465 /* Receive a valid packet */
466 /* Alloc a buffer with extra room for DMA alignment */
467 skb=dev_alloc_skb(pkt_len+32);
468 if (unlikely(skb == NULL)) {
469 PRINTK( "%s: Low memory, rcvd packet dropped.\n",
470 dev->name);
471 lp->stats.rx_dropped++;
472 smc911x_drop_pkt(dev);
473 return;
474 }
475 /* Align IP header to 32 bits
476 * Note that the device is configured to add a 2
477 * byte padding to the packet start, so we really
478 * want to write to the orignal data pointer */
479 data = skb->data;
480 skb_reserve(skb, 2);
481 skb_put(skb,pkt_len-4);
482 #ifdef SMC_USE_DMA
483 {
484 unsigned int fifo;
485 /* Lower the FIFO threshold if possible */
486 fifo = SMC_GET_FIFO_INT();
487 if (fifo & 0xFF) fifo--;
488 DBG(SMC_DEBUG_RX, "%s: Setting RX stat FIFO threshold to %d\n",
489 dev->name, fifo & 0xff);
490 SMC_SET_FIFO_INT(fifo);
491 /* Setup RX DMA */
492 SMC_SET_RX_CFG(RX_CFG_RX_END_ALGN16_ | ((2<<8) & RX_CFG_RXDOFF_));
493 lp->rxdma_active = 1;
494 lp->current_rx_skb = skb;
495 SMC_PULL_DATA(data, (pkt_len+2+15) & ~15);
496 /* Packet processing deferred to DMA RX interrupt */
497 }
498 #else
499 SMC_SET_RX_CFG(RX_CFG_RX_END_ALGN4_ | ((2<<8) & RX_CFG_RXDOFF_));
500 SMC_PULL_DATA(data, pkt_len+2+3);
501
502 DBG(SMC_DEBUG_PKTS, "%s: Received packet\n", dev->name,);
503 PRINT_PKT(data, ((pkt_len - 4) <= 64) ? pkt_len - 4 : 64);
504 dev->last_rx = jiffies;
505 skb->dev = dev;
506 skb->protocol = eth_type_trans(skb, dev);
507 netif_rx(skb);
508 lp->stats.rx_packets++;
509 lp->stats.rx_bytes += pkt_len-4;
510 #endif
511 }
512 }
513
514 /*
515 * This is called to actually send a packet to the chip.
516 */
517 static void smc911x_hardware_send_pkt(struct net_device *dev)
518 {
519 struct smc911x_local *lp = netdev_priv(dev);
520 unsigned long ioaddr = dev->base_addr;
521 struct sk_buff *skb;
522 unsigned int cmdA, cmdB, len;
523 unsigned char *buf;
524 unsigned long flags;
525
526 DBG(SMC_DEBUG_FUNC | SMC_DEBUG_TX, "%s: --> %s\n", dev->name, __FUNCTION__);
527 BUG_ON(lp->pending_tx_skb == NULL);
528
529 skb = lp->pending_tx_skb;
530 lp->pending_tx_skb = NULL;
531
532 /* cmdA {25:24] data alignment [20:16] start offset [10:0] buffer length */
533 /* cmdB {31:16] pkt tag [10:0] length */
534 #ifdef SMC_USE_DMA
535 /* 16 byte buffer alignment mode */
536 buf = (char*)((u32)(skb->data) & ~0xF);
537 len = (skb->len + 0xF + ((u32)skb->data & 0xF)) & ~0xF;
538 cmdA = (1<<24) | (((u32)skb->data & 0xF)<<16) |
539 TX_CMD_A_INT_FIRST_SEG_ | TX_CMD_A_INT_LAST_SEG_ |
540 skb->len;
541 #else
542 buf = (char*)((u32)skb->data & ~0x3);
543 len = (skb->len + 3 + ((u32)skb->data & 3)) & ~0x3;
544 cmdA = (((u32)skb->data & 0x3) << 16) |
545 TX_CMD_A_INT_FIRST_SEG_ | TX_CMD_A_INT_LAST_SEG_ |
546 skb->len;
547 #endif
548 /* tag is packet length so we can use this in stats update later */
549 cmdB = (skb->len << 16) | (skb->len & 0x7FF);
550
551 DBG(SMC_DEBUG_TX, "%s: TX PKT LENGTH 0x%04x (%d) BUF 0x%p CMDA 0x%08x CMDB 0x%08x\n",
552 dev->name, len, len, buf, cmdA, cmdB);
553 SMC_SET_TX_FIFO(cmdA);
554 SMC_SET_TX_FIFO(cmdB);
555
556 DBG(SMC_DEBUG_PKTS, "%s: Transmitted packet\n", dev->name);
557 PRINT_PKT(buf, len <= 64 ? len : 64);
558
559 /* Send pkt via PIO or DMA */
560 #ifdef SMC_USE_DMA
561 lp->current_tx_skb = skb;
562 SMC_PUSH_DATA(buf, len);
563 /* DMA complete IRQ will free buffer and set jiffies */
564 #else
565 SMC_PUSH_DATA(buf, len);
566 dev->trans_start = jiffies;
567 dev_kfree_skb(skb);
568 #endif
569 spin_lock_irqsave(&lp->lock, flags);
570 if (!lp->tx_throttle) {
571 netif_wake_queue(dev);
572 }
573 spin_unlock_irqrestore(&lp->lock, flags);
574 SMC_ENABLE_INT(INT_EN_TDFA_EN_ | INT_EN_TSFL_EN_);
575 }
576
577 /*
578 * Since I am not sure if I will have enough room in the chip's ram
579 * to store the packet, I call this routine which either sends it
580 * now, or set the card to generates an interrupt when ready
581 * for the packet.
582 */
583 static int smc911x_hard_start_xmit(struct sk_buff *skb, struct net_device *dev)
584 {
585 struct smc911x_local *lp = netdev_priv(dev);
586 unsigned long ioaddr = dev->base_addr;
587 unsigned int free;
588 unsigned long flags;
589
590 DBG(SMC_DEBUG_FUNC | SMC_DEBUG_TX, "%s: --> %s\n",
591 dev->name, __FUNCTION__);
592
593 BUG_ON(lp->pending_tx_skb != NULL);
594
595 free = SMC_GET_TX_FIFO_INF() & TX_FIFO_INF_TDFREE_;
596 DBG(SMC_DEBUG_TX, "%s: TX free space %d\n", dev->name, free);
597
598 /* Turn off the flow when running out of space in FIFO */
599 if (free <= SMC911X_TX_FIFO_LOW_THRESHOLD) {
600 DBG(SMC_DEBUG_TX, "%s: Disabling data flow due to low FIFO space (%d)\n",
601 dev->name, free);
602 spin_lock_irqsave(&lp->lock, flags);
603 /* Reenable when at least 1 packet of size MTU present */
604 SMC_SET_FIFO_TDA((SMC911X_TX_FIFO_LOW_THRESHOLD)/64);
605 lp->tx_throttle = 1;
606 netif_stop_queue(dev);
607 spin_unlock_irqrestore(&lp->lock, flags);
608 }
609
610 /* Drop packets when we run out of space in TX FIFO
611 * Account for overhead required for:
612 *
613 * Tx command words 8 bytes
614 * Start offset 15 bytes
615 * End padding 15 bytes
616 */
617 if (unlikely(free < (skb->len + 8 + 15 + 15))) {
618 printk("%s: No Tx free space %d < %d\n",
619 dev->name, free, skb->len);
620 lp->pending_tx_skb = NULL;
621 lp->stats.tx_errors++;
622 lp->stats.tx_dropped++;
623 dev_kfree_skb(skb);
624 return 0;
625 }
626
627 #ifdef SMC_USE_DMA
628 {
629 /* If the DMA is already running then defer this packet Tx until
630 * the DMA IRQ starts it
631 */
632 spin_lock_irqsave(&lp->lock, flags);
633 if (lp->txdma_active) {
634 DBG(SMC_DEBUG_TX | SMC_DEBUG_DMA, "%s: Tx DMA running, deferring packet\n", dev->name);
635 lp->pending_tx_skb = skb;
636 netif_stop_queue(dev);
637 spin_unlock_irqrestore(&lp->lock, flags);
638 return 0;
639 } else {
640 DBG(SMC_DEBUG_TX | SMC_DEBUG_DMA, "%s: Activating Tx DMA\n", dev->name);
641 lp->txdma_active = 1;
642 }
643 spin_unlock_irqrestore(&lp->lock, flags);
644 }
645 #endif
646 lp->pending_tx_skb = skb;
647 smc911x_hardware_send_pkt(dev);
648
649 return 0;
650 }
651
652 /*
653 * This handles a TX status interrupt, which is only called when:
654 * - a TX error occurred, or
655 * - TX of a packet completed.
656 */
657 static void smc911x_tx(struct net_device *dev)
658 {
659 unsigned long ioaddr = dev->base_addr;
660 struct smc911x_local *lp = netdev_priv(dev);
661 unsigned int tx_status;
662
663 DBG(SMC_DEBUG_FUNC | SMC_DEBUG_TX, "%s: --> %s\n",
664 dev->name, __FUNCTION__);
665
666 /* Collect the TX status */
667 while (((SMC_GET_TX_FIFO_INF() & TX_FIFO_INF_TSUSED_) >> 16) != 0) {
668 DBG(SMC_DEBUG_TX, "%s: Tx stat FIFO used 0x%04x\n",
669 dev->name,
670 (SMC_GET_TX_FIFO_INF() & TX_FIFO_INF_TSUSED_) >> 16);
671 tx_status = SMC_GET_TX_STS_FIFO();
672 lp->stats.tx_packets++;
673 lp->stats.tx_bytes+=tx_status>>16;
674 DBG(SMC_DEBUG_TX, "%s: Tx FIFO tag 0x%04x status 0x%04x\n",
675 dev->name, (tx_status & 0xffff0000) >> 16,
676 tx_status & 0x0000ffff);
677 /* count Tx errors, but ignore lost carrier errors when in
678 * full-duplex mode */
679 if ((tx_status & TX_STS_ES_) && !(lp->ctl_rfduplx &&
680 !(tx_status & 0x00000306))) {
681 lp->stats.tx_errors++;
682 }
683 if (tx_status & TX_STS_MANY_COLL_) {
684 lp->stats.collisions+=16;
685 lp->stats.tx_aborted_errors++;
686 } else {
687 lp->stats.collisions+=(tx_status & TX_STS_COLL_CNT_) >> 3;
688 }
689 /* carrier error only has meaning for half-duplex communication */
690 if ((tx_status & (TX_STS_LOC_ | TX_STS_NO_CARR_)) &&
691 !lp->ctl_rfduplx) {
692 lp->stats.tx_carrier_errors++;
693 }
694 if (tx_status & TX_STS_LATE_COLL_) {
695 lp->stats.collisions++;
696 lp->stats.tx_aborted_errors++;
697 }
698 }
699 }
700
701
702 /*---PHY CONTROL AND CONFIGURATION-----------------------------------------*/
703 /*
704 * Reads a register from the MII Management serial interface
705 */
706
707 static int smc911x_phy_read(struct net_device *dev, int phyaddr, int phyreg)
708 {
709 unsigned long ioaddr = dev->base_addr;
710 unsigned int phydata;
711
712 SMC_GET_MII(phyreg, phyaddr, phydata);
713
714 DBG(SMC_DEBUG_MISC, "%s: phyaddr=0x%x, phyreg=0x%02x, phydata=0x%04x\n",
715 __FUNCTION__, phyaddr, phyreg, phydata);
716 return phydata;
717 }
718
719
720 /*
721 * Writes a register to the MII Management serial interface
722 */
723 static void smc911x_phy_write(struct net_device *dev, int phyaddr, int phyreg,
724 int phydata)
725 {
726 unsigned long ioaddr = dev->base_addr;
727
728 DBG(SMC_DEBUG_MISC, "%s: phyaddr=0x%x, phyreg=0x%x, phydata=0x%x\n",
729 __FUNCTION__, phyaddr, phyreg, phydata);
730
731 SMC_SET_MII(phyreg, phyaddr, phydata);
732 }
733
734 /*
735 * Finds and reports the PHY address (115 and 117 have external
736 * PHY interface 118 has internal only
737 */
738 static void smc911x_phy_detect(struct net_device *dev)
739 {
740 unsigned long ioaddr = dev->base_addr;
741 struct smc911x_local *lp = netdev_priv(dev);
742 int phyaddr;
743 unsigned int cfg, id1, id2;
744
745 DBG(SMC_DEBUG_FUNC, "%s: --> %s\n", dev->name, __FUNCTION__);
746
747 lp->phy_type = 0;
748
749 /*
750 * Scan all 32 PHY addresses if necessary, starting at
751 * PHY#1 to PHY#31, and then PHY#0 last.
752 */
753 switch(lp->version) {
754 case 0x115:
755 case 0x117:
756 cfg = SMC_GET_HW_CFG();
757 if (cfg & HW_CFG_EXT_PHY_DET_) {
758 cfg &= ~HW_CFG_PHY_CLK_SEL_;
759 cfg |= HW_CFG_PHY_CLK_SEL_CLK_DIS_;
760 SMC_SET_HW_CFG(cfg);
761 udelay(10); /* Wait for clocks to stop */
762
763 cfg |= HW_CFG_EXT_PHY_EN_;
764 SMC_SET_HW_CFG(cfg);
765 udelay(10); /* Wait for clocks to stop */
766
767 cfg &= ~HW_CFG_PHY_CLK_SEL_;
768 cfg |= HW_CFG_PHY_CLK_SEL_EXT_PHY_;
769 SMC_SET_HW_CFG(cfg);
770 udelay(10); /* Wait for clocks to stop */
771
772 cfg |= HW_CFG_SMI_SEL_;
773 SMC_SET_HW_CFG(cfg);
774
775 for (phyaddr = 1; phyaddr < 32; ++phyaddr) {
776
777 /* Read the PHY identifiers */
778 SMC_GET_PHY_ID1(phyaddr & 31, id1);
779 SMC_GET_PHY_ID2(phyaddr & 31, id2);
780
781 /* Make sure it is a valid identifier */
782 if (id1 != 0x0000 && id1 != 0xffff &&
783 id1 != 0x8000 && id2 != 0x0000 &&
784 id2 != 0xffff && id2 != 0x8000) {
785 /* Save the PHY's address */
786 lp->mii.phy_id = phyaddr & 31;
787 lp->phy_type = id1 << 16 | id2;
788 break;
789 }
790 }
791 }
792 default:
793 /* Internal media only */
794 SMC_GET_PHY_ID1(1, id1);
795 SMC_GET_PHY_ID2(1, id2);
796 /* Save the PHY's address */
797 lp->mii.phy_id = 1;
798 lp->phy_type = id1 << 16 | id2;
799 }
800
801 DBG(SMC_DEBUG_MISC, "%s: phy_id1=0x%x, phy_id2=0x%x phyaddr=0x%d\n",
802 dev->name, id1, id2, lp->mii.phy_id);
803 }
804
805 /*
806 * Sets the PHY to a configuration as determined by the user.
807 * Called with spin_lock held.
808 */
809 static int smc911x_phy_fixed(struct net_device *dev)
810 {
811 struct smc911x_local *lp = netdev_priv(dev);
812 unsigned long ioaddr = dev->base_addr;
813 int phyaddr = lp->mii.phy_id;
814 int bmcr;
815
816 DBG(SMC_DEBUG_FUNC, "%s: --> %s\n", dev->name, __FUNCTION__);
817
818 /* Enter Link Disable state */
819 SMC_GET_PHY_BMCR(phyaddr, bmcr);
820 bmcr |= BMCR_PDOWN;
821 SMC_SET_PHY_BMCR(phyaddr, bmcr);
822
823 /*
824 * Set our fixed capabilities
825 * Disable auto-negotiation
826 */
827 bmcr &= ~BMCR_ANENABLE;
828 if (lp->ctl_rfduplx)
829 bmcr |= BMCR_FULLDPLX;
830
831 if (lp->ctl_rspeed == 100)
832 bmcr |= BMCR_SPEED100;
833
834 /* Write our capabilities to the phy control register */
835 SMC_SET_PHY_BMCR(phyaddr, bmcr);
836
837 /* Re-Configure the Receive/Phy Control register */
838 bmcr &= ~BMCR_PDOWN;
839 SMC_SET_PHY_BMCR(phyaddr, bmcr);
840
841 return 1;
842 }
843
844 /*
845 * smc911x_phy_reset - reset the phy
846 * @dev: net device
847 * @phy: phy address
848 *
849 * Issue a software reset for the specified PHY and
850 * wait up to 100ms for the reset to complete. We should
851 * not access the PHY for 50ms after issuing the reset.
852 *
853 * The time to wait appears to be dependent on the PHY.
854 *
855 */
856 static int smc911x_phy_reset(struct net_device *dev, int phy)
857 {
858 struct smc911x_local *lp = netdev_priv(dev);
859 unsigned long ioaddr = dev->base_addr;
860 int timeout;
861 unsigned long flags;
862 unsigned int reg;
863
864 DBG(SMC_DEBUG_FUNC, "%s: --> %s()\n", dev->name, __FUNCTION__);
865
866 spin_lock_irqsave(&lp->lock, flags);
867 reg = SMC_GET_PMT_CTRL();
868 reg &= ~0xfffff030;
869 reg |= PMT_CTRL_PHY_RST_;
870 SMC_SET_PMT_CTRL(reg);
871 spin_unlock_irqrestore(&lp->lock, flags);
872 for (timeout = 2; timeout; timeout--) {
873 msleep(50);
874 spin_lock_irqsave(&lp->lock, flags);
875 reg = SMC_GET_PMT_CTRL();
876 spin_unlock_irqrestore(&lp->lock, flags);
877 if (!(reg & PMT_CTRL_PHY_RST_)) {
878 /* extra delay required because the phy may
879 * not be completed with its reset
880 * when PHY_BCR_RESET_ is cleared. 256us
881 * should suffice, but use 500us to be safe
882 */
883 udelay(500);
884 break;
885 }
886 }
887
888 return reg & PMT_CTRL_PHY_RST_;
889 }
890
891 /*
892 * smc911x_phy_powerdown - powerdown phy
893 * @dev: net device
894 * @phy: phy address
895 *
896 * Power down the specified PHY
897 */
898 static void smc911x_phy_powerdown(struct net_device *dev, int phy)
899 {
900 unsigned long ioaddr = dev->base_addr;
901 unsigned int bmcr;
902
903 /* Enter Link Disable state */
904 SMC_GET_PHY_BMCR(phy, bmcr);
905 bmcr |= BMCR_PDOWN;
906 SMC_SET_PHY_BMCR(phy, bmcr);
907 }
908
909 /*
910 * smc911x_phy_check_media - check the media status and adjust BMCR
911 * @dev: net device
912 * @init: set true for initialisation
913 *
914 * Select duplex mode depending on negotiation state. This
915 * also updates our carrier state.
916 */
917 static void smc911x_phy_check_media(struct net_device *dev, int init)
918 {
919 struct smc911x_local *lp = netdev_priv(dev);
920 unsigned long ioaddr = dev->base_addr;
921 int phyaddr = lp->mii.phy_id;
922 unsigned int bmcr, cr;
923
924 DBG(SMC_DEBUG_FUNC, "%s: --> %s\n", dev->name, __FUNCTION__);
925
926 if (mii_check_media(&lp->mii, netif_msg_link(lp), init)) {
927 /* duplex state has changed */
928 SMC_GET_PHY_BMCR(phyaddr, bmcr);
929 SMC_GET_MAC_CR(cr);
930 if (lp->mii.full_duplex) {
931 DBG(SMC_DEBUG_MISC, "%s: Configuring for full-duplex mode\n", dev->name);
932 bmcr |= BMCR_FULLDPLX;
933 cr |= MAC_CR_RCVOWN_;
934 } else {
935 DBG(SMC_DEBUG_MISC, "%s: Configuring for half-duplex mode\n", dev->name);
936 bmcr &= ~BMCR_FULLDPLX;
937 cr &= ~MAC_CR_RCVOWN_;
938 }
939 SMC_SET_PHY_BMCR(phyaddr, bmcr);
940 SMC_SET_MAC_CR(cr);
941 }
942 }
943
944 /*
945 * Configures the specified PHY through the MII management interface
946 * using Autonegotiation.
947 * Calls smc911x_phy_fixed() if the user has requested a certain config.
948 * If RPC ANEG bit is set, the media selection is dependent purely on
949 * the selection by the MII (either in the MII BMCR reg or the result
950 * of autonegotiation.) If the RPC ANEG bit is cleared, the selection
951 * is controlled by the RPC SPEED and RPC DPLX bits.
952 */
953 static void smc911x_phy_configure(struct work_struct *work)
954 {
955 struct smc911x_local *lp = container_of(work, struct smc911x_local,
956 phy_configure);
957 struct net_device *dev = lp->netdev;
958 unsigned long ioaddr = dev->base_addr;
959 int phyaddr = lp->mii.phy_id;
960 int my_phy_caps; /* My PHY capabilities */
961 int my_ad_caps; /* My Advertised capabilities */
962 int status;
963 unsigned long flags;
964
965 DBG(SMC_DEBUG_FUNC, "%s: --> %s()\n", dev->name, __FUNCTION__);
966
967 /*
968 * We should not be called if phy_type is zero.
969 */
970 if (lp->phy_type == 0)
971 goto smc911x_phy_configure_exit_nolock;
972
973 if (smc911x_phy_reset(dev, phyaddr)) {
974 printk("%s: PHY reset timed out\n", dev->name);
975 goto smc911x_phy_configure_exit_nolock;
976 }
977 spin_lock_irqsave(&lp->lock, flags);
978
979 /*
980 * Enable PHY Interrupts (for register 18)
981 * Interrupts listed here are enabled
982 */
983 SMC_SET_PHY_INT_MASK(phyaddr, PHY_INT_MASK_ENERGY_ON_ |
984 PHY_INT_MASK_ANEG_COMP_ | PHY_INT_MASK_REMOTE_FAULT_ |
985 PHY_INT_MASK_LINK_DOWN_);
986
987 /* If the user requested no auto neg, then go set his request */
988 if (lp->mii.force_media) {
989 smc911x_phy_fixed(dev);
990 goto smc911x_phy_configure_exit;
991 }
992
993 /* Copy our capabilities from MII_BMSR to MII_ADVERTISE */
994 SMC_GET_PHY_BMSR(phyaddr, my_phy_caps);
995 if (!(my_phy_caps & BMSR_ANEGCAPABLE)) {
996 printk(KERN_INFO "Auto negotiation NOT supported\n");
997 smc911x_phy_fixed(dev);
998 goto smc911x_phy_configure_exit;
999 }
1000
1001 /* CSMA capable w/ both pauses */
1002 my_ad_caps = ADVERTISE_CSMA | ADVERTISE_PAUSE_CAP | ADVERTISE_PAUSE_ASYM;
1003
1004 if (my_phy_caps & BMSR_100BASE4)
1005 my_ad_caps |= ADVERTISE_100BASE4;
1006 if (my_phy_caps & BMSR_100FULL)
1007 my_ad_caps |= ADVERTISE_100FULL;
1008 if (my_phy_caps & BMSR_100HALF)
1009 my_ad_caps |= ADVERTISE_100HALF;
1010 if (my_phy_caps & BMSR_10FULL)
1011 my_ad_caps |= ADVERTISE_10FULL;
1012 if (my_phy_caps & BMSR_10HALF)
1013 my_ad_caps |= ADVERTISE_10HALF;
1014
1015 /* Disable capabilities not selected by our user */
1016 if (lp->ctl_rspeed != 100)
1017 my_ad_caps &= ~(ADVERTISE_100BASE4|ADVERTISE_100FULL|ADVERTISE_100HALF);
1018
1019 if (!lp->ctl_rfduplx)
1020 my_ad_caps &= ~(ADVERTISE_100FULL|ADVERTISE_10FULL);
1021
1022 /* Update our Auto-Neg Advertisement Register */
1023 SMC_SET_PHY_MII_ADV(phyaddr, my_ad_caps);
1024 lp->mii.advertising = my_ad_caps;
1025
1026 /*
1027 * Read the register back. Without this, it appears that when
1028 * auto-negotiation is restarted, sometimes it isn't ready and
1029 * the link does not come up.
1030 */
1031 udelay(10);
1032 SMC_GET_PHY_MII_ADV(phyaddr, status);
1033
1034 DBG(SMC_DEBUG_MISC, "%s: phy caps=0x%04x\n", dev->name, my_phy_caps);
1035 DBG(SMC_DEBUG_MISC, "%s: phy advertised caps=0x%04x\n", dev->name, my_ad_caps);
1036
1037 /* Restart auto-negotiation process in order to advertise my caps */
1038 SMC_SET_PHY_BMCR(phyaddr, BMCR_ANENABLE | BMCR_ANRESTART);
1039
1040 smc911x_phy_check_media(dev, 1);
1041
1042 smc911x_phy_configure_exit:
1043 spin_unlock_irqrestore(&lp->lock, flags);
1044 smc911x_phy_configure_exit_nolock:
1045 lp->work_pending = 0;
1046 }
1047
1048 /*
1049 * smc911x_phy_interrupt
1050 *
1051 * Purpose: Handle interrupts relating to PHY register 18. This is
1052 * called from the "hard" interrupt handler under our private spinlock.
1053 */
1054 static void smc911x_phy_interrupt(struct net_device *dev)
1055 {
1056 struct smc911x_local *lp = netdev_priv(dev);
1057 unsigned long ioaddr = dev->base_addr;
1058 int phyaddr = lp->mii.phy_id;
1059 int status;
1060
1061 DBG(SMC_DEBUG_FUNC, "%s: --> %s\n", dev->name, __FUNCTION__);
1062
1063 if (lp->phy_type == 0)
1064 return;
1065
1066 smc911x_phy_check_media(dev, 0);
1067 /* read to clear status bits */
1068 SMC_GET_PHY_INT_SRC(phyaddr,status);
1069 DBG(SMC_DEBUG_MISC, "%s: PHY interrupt status 0x%04x\n",
1070 dev->name, status & 0xffff);
1071 DBG(SMC_DEBUG_MISC, "%s: AFC_CFG 0x%08x\n",
1072 dev->name, SMC_GET_AFC_CFG());
1073 }
1074
1075 /*--- END PHY CONTROL AND CONFIGURATION-------------------------------------*/
1076
1077 /*
1078 * This is the main routine of the driver, to handle the device when
1079 * it needs some attention.
1080 */
1081 static irqreturn_t smc911x_interrupt(int irq, void *dev_id)
1082 {
1083 struct net_device *dev = dev_id;
1084 unsigned long ioaddr = dev->base_addr;
1085 struct smc911x_local *lp = netdev_priv(dev);
1086 unsigned int status, mask, timeout;
1087 unsigned int rx_overrun=0, cr, pkts;
1088 unsigned long flags;
1089
1090 DBG(SMC_DEBUG_FUNC, "%s: --> %s\n", dev->name, __FUNCTION__);
1091
1092 spin_lock_irqsave(&lp->lock, flags);
1093
1094 /* Spurious interrupt check */
1095 if ((SMC_GET_IRQ_CFG() & (INT_CFG_IRQ_INT_ | INT_CFG_IRQ_EN_)) !=
1096 (INT_CFG_IRQ_INT_ | INT_CFG_IRQ_EN_)) {
1097 spin_unlock_irqrestore(&lp->lock, flags);
1098 return IRQ_NONE;
1099 }
1100
1101 mask = SMC_GET_INT_EN();
1102 SMC_SET_INT_EN(0);
1103
1104 /* set a timeout value, so I don't stay here forever */
1105 timeout = 8;
1106
1107
1108 do {
1109 status = SMC_GET_INT();
1110
1111 DBG(SMC_DEBUG_MISC, "%s: INT 0x%08x MASK 0x%08x OUTSIDE MASK 0x%08x\n",
1112 dev->name, status, mask, status & ~mask);
1113
1114 status &= mask;
1115 if (!status)
1116 break;
1117
1118 /* Handle SW interrupt condition */
1119 if (status & INT_STS_SW_INT_) {
1120 SMC_ACK_INT(INT_STS_SW_INT_);
1121 mask &= ~INT_EN_SW_INT_EN_;
1122 }
1123 /* Handle various error conditions */
1124 if (status & INT_STS_RXE_) {
1125 SMC_ACK_INT(INT_STS_RXE_);
1126 lp->stats.rx_errors++;
1127 }
1128 if (status & INT_STS_RXDFH_INT_) {
1129 SMC_ACK_INT(INT_STS_RXDFH_INT_);
1130 lp->stats.rx_dropped+=SMC_GET_RX_DROP();
1131 }
1132 /* Undocumented interrupt-what is the right thing to do here? */
1133 if (status & INT_STS_RXDF_INT_) {
1134 SMC_ACK_INT(INT_STS_RXDF_INT_);
1135 }
1136
1137 /* Rx Data FIFO exceeds set level */
1138 if (status & INT_STS_RDFL_) {
1139 if (IS_REV_A(lp->revision)) {
1140 rx_overrun=1;
1141 SMC_GET_MAC_CR(cr);
1142 cr &= ~MAC_CR_RXEN_;
1143 SMC_SET_MAC_CR(cr);
1144 DBG(SMC_DEBUG_RX, "%s: RX overrun\n", dev->name);
1145 lp->stats.rx_errors++;
1146 lp->stats.rx_fifo_errors++;
1147 }
1148 SMC_ACK_INT(INT_STS_RDFL_);
1149 }
1150 if (status & INT_STS_RDFO_) {
1151 if (!IS_REV_A(lp->revision)) {
1152 SMC_GET_MAC_CR(cr);
1153 cr &= ~MAC_CR_RXEN_;
1154 SMC_SET_MAC_CR(cr);
1155 rx_overrun=1;
1156 DBG(SMC_DEBUG_RX, "%s: RX overrun\n", dev->name);
1157 lp->stats.rx_errors++;
1158 lp->stats.rx_fifo_errors++;
1159 }
1160 SMC_ACK_INT(INT_STS_RDFO_);
1161 }
1162 /* Handle receive condition */
1163 if ((status & INT_STS_RSFL_) || rx_overrun) {
1164 unsigned int fifo;
1165 DBG(SMC_DEBUG_RX, "%s: RX irq\n", dev->name);
1166 fifo = SMC_GET_RX_FIFO_INF();
1167 pkts = (fifo & RX_FIFO_INF_RXSUSED_) >> 16;
1168 DBG(SMC_DEBUG_RX, "%s: Rx FIFO pkts %d, bytes %d\n",
1169 dev->name, pkts, fifo & 0xFFFF );
1170 if (pkts != 0) {
1171 #ifdef SMC_USE_DMA
1172 unsigned int fifo;
1173 if (lp->rxdma_active){
1174 DBG(SMC_DEBUG_RX | SMC_DEBUG_DMA,
1175 "%s: RX DMA active\n", dev->name);
1176 /* The DMA is already running so up the IRQ threshold */
1177 fifo = SMC_GET_FIFO_INT() & ~0xFF;
1178 fifo |= pkts & 0xFF;
1179 DBG(SMC_DEBUG_RX,
1180 "%s: Setting RX stat FIFO threshold to %d\n",
1181 dev->name, fifo & 0xff);
1182 SMC_SET_FIFO_INT(fifo);
1183 } else
1184 #endif
1185 smc911x_rcv(dev);
1186 }
1187 SMC_ACK_INT(INT_STS_RSFL_);
1188 }
1189 /* Handle transmit FIFO available */
1190 if (status & INT_STS_TDFA_) {
1191 DBG(SMC_DEBUG_TX, "%s: TX data FIFO space available irq\n", dev->name);
1192 SMC_SET_FIFO_TDA(0xFF);
1193 lp->tx_throttle = 0;
1194 #ifdef SMC_USE_DMA
1195 if (!lp->txdma_active)
1196 #endif
1197 netif_wake_queue(dev);
1198 SMC_ACK_INT(INT_STS_TDFA_);
1199 }
1200 /* Handle transmit done condition */
1201 #if 1
1202 if (status & (INT_STS_TSFL_ | INT_STS_GPT_INT_)) {
1203 DBG(SMC_DEBUG_TX | SMC_DEBUG_MISC,
1204 "%s: Tx stat FIFO limit (%d) /GPT irq\n",
1205 dev->name, (SMC_GET_FIFO_INT() & 0x00ff0000) >> 16);
1206 smc911x_tx(dev);
1207 SMC_SET_GPT_CFG(GPT_CFG_TIMER_EN_ | 10000);
1208 SMC_ACK_INT(INT_STS_TSFL_);
1209 SMC_ACK_INT(INT_STS_TSFL_ | INT_STS_GPT_INT_);
1210 }
1211 #else
1212 if (status & INT_STS_TSFL_) {
1213 DBG(SMC_DEBUG_TX, "%s: TX status FIFO limit (%d) irq \n", dev->name, );
1214 smc911x_tx(dev);
1215 SMC_ACK_INT(INT_STS_TSFL_);
1216 }
1217
1218 if (status & INT_STS_GPT_INT_) {
1219 DBG(SMC_DEBUG_RX, "%s: IRQ_CFG 0x%08x FIFO_INT 0x%08x RX_CFG 0x%08x\n",
1220 dev->name,
1221 SMC_GET_IRQ_CFG(),
1222 SMC_GET_FIFO_INT(),
1223 SMC_GET_RX_CFG());
1224 DBG(SMC_DEBUG_RX, "%s: Rx Stat FIFO Used 0x%02x "
1225 "Data FIFO Used 0x%04x Stat FIFO 0x%08x\n",
1226 dev->name,
1227 (SMC_GET_RX_FIFO_INF() & 0x00ff0000) >> 16,
1228 SMC_GET_RX_FIFO_INF() & 0xffff,
1229 SMC_GET_RX_STS_FIFO_PEEK());
1230 SMC_SET_GPT_CFG(GPT_CFG_TIMER_EN_ | 10000);
1231 SMC_ACK_INT(INT_STS_GPT_INT_);
1232 }
1233 #endif
1234
1235 /* Handle PHY interupt condition */
1236 if (status & INT_STS_PHY_INT_) {
1237 DBG(SMC_DEBUG_MISC, "%s: PHY irq\n", dev->name);
1238 smc911x_phy_interrupt(dev);
1239 SMC_ACK_INT(INT_STS_PHY_INT_);
1240 }
1241 } while (--timeout);
1242
1243 /* restore mask state */
1244 SMC_SET_INT_EN(mask);
1245
1246 DBG(SMC_DEBUG_MISC, "%s: Interrupt done (%d loops)\n",
1247 dev->name, 8-timeout);
1248
1249 spin_unlock_irqrestore(&lp->lock, flags);
1250
1251 DBG(3, "%s: Interrupt done (%d loops)\n", dev->name, 8-timeout);
1252
1253 return IRQ_HANDLED;
1254 }
1255
1256 #ifdef SMC_USE_DMA
1257 static void
1258 smc911x_tx_dma_irq(int dma, void *data)
1259 {
1260 struct net_device *dev = (struct net_device *)data;
1261 struct smc911x_local *lp = netdev_priv(dev);
1262 struct sk_buff *skb = lp->current_tx_skb;
1263 unsigned long flags;
1264
1265 DBG(SMC_DEBUG_FUNC, "%s: --> %s\n", dev->name, __FUNCTION__);
1266
1267 DBG(SMC_DEBUG_TX | SMC_DEBUG_DMA, "%s: TX DMA irq handler\n", dev->name);
1268 /* Clear the DMA interrupt sources */
1269 SMC_DMA_ACK_IRQ(dev, dma);
1270 BUG_ON(skb == NULL);
1271 dma_unmap_single(NULL, tx_dmabuf, tx_dmalen, DMA_TO_DEVICE);
1272 dev->trans_start = jiffies;
1273 dev_kfree_skb_irq(skb);
1274 lp->current_tx_skb = NULL;
1275 if (lp->pending_tx_skb != NULL)
1276 smc911x_hardware_send_pkt(dev);
1277 else {
1278 DBG(SMC_DEBUG_TX | SMC_DEBUG_DMA,
1279 "%s: No pending Tx packets. DMA disabled\n", dev->name);
1280 spin_lock_irqsave(&lp->lock, flags);
1281 lp->txdma_active = 0;
1282 if (!lp->tx_throttle) {
1283 netif_wake_queue(dev);
1284 }
1285 spin_unlock_irqrestore(&lp->lock, flags);
1286 }
1287
1288 DBG(SMC_DEBUG_TX | SMC_DEBUG_DMA,
1289 "%s: TX DMA irq completed\n", dev->name);
1290 }
1291 static void
1292 smc911x_rx_dma_irq(int dma, void *data)
1293 {
1294 struct net_device *dev = (struct net_device *)data;
1295 unsigned long ioaddr = dev->base_addr;
1296 struct smc911x_local *lp = netdev_priv(dev);
1297 struct sk_buff *skb = lp->current_rx_skb;
1298 unsigned long flags;
1299 unsigned int pkts;
1300
1301 DBG(SMC_DEBUG_FUNC, "%s: --> %s\n", dev->name, __FUNCTION__);
1302 DBG(SMC_DEBUG_RX | SMC_DEBUG_DMA, "%s: RX DMA irq handler\n", dev->name);
1303 /* Clear the DMA interrupt sources */
1304 SMC_DMA_ACK_IRQ(dev, dma);
1305 dma_unmap_single(NULL, rx_dmabuf, rx_dmalen, DMA_FROM_DEVICE);
1306 BUG_ON(skb == NULL);
1307 lp->current_rx_skb = NULL;
1308 PRINT_PKT(skb->data, skb->len);
1309 dev->last_rx = jiffies;
1310 skb->dev = dev;
1311 skb->protocol = eth_type_trans(skb, dev);
1312 netif_rx(skb);
1313 lp->stats.rx_packets++;
1314 lp->stats.rx_bytes += skb->len;
1315
1316 spin_lock_irqsave(&lp->lock, flags);
1317 pkts = (SMC_GET_RX_FIFO_INF() & RX_FIFO_INF_RXSUSED_) >> 16;
1318 if (pkts != 0) {
1319 smc911x_rcv(dev);
1320 }else {
1321 lp->rxdma_active = 0;
1322 }
1323 spin_unlock_irqrestore(&lp->lock, flags);
1324 DBG(SMC_DEBUG_RX | SMC_DEBUG_DMA,
1325 "%s: RX DMA irq completed. DMA RX FIFO PKTS %d\n",
1326 dev->name, pkts);
1327 }
1328 #endif /* SMC_USE_DMA */
1329
1330 #ifdef CONFIG_NET_POLL_CONTROLLER
1331 /*
1332 * Polling receive - used by netconsole and other diagnostic tools
1333 * to allow network i/o with interrupts disabled.
1334 */
1335 static void smc911x_poll_controller(struct net_device *dev)
1336 {
1337 disable_irq(dev->irq);
1338 smc911x_interrupt(dev->irq, dev);
1339 enable_irq(dev->irq);
1340 }
1341 #endif
1342
1343 /* Our watchdog timed out. Called by the networking layer */
1344 static void smc911x_timeout(struct net_device *dev)
1345 {
1346 struct smc911x_local *lp = netdev_priv(dev);
1347 unsigned long ioaddr = dev->base_addr;
1348 int status, mask;
1349 unsigned long flags;
1350
1351 DBG(SMC_DEBUG_FUNC, "%s: --> %s\n", dev->name, __FUNCTION__);
1352
1353 spin_lock_irqsave(&lp->lock, flags);
1354 status = SMC_GET_INT();
1355 mask = SMC_GET_INT_EN();
1356 spin_unlock_irqrestore(&lp->lock, flags);
1357 DBG(SMC_DEBUG_MISC, "%s: INT 0x%02x MASK 0x%02x \n",
1358 dev->name, status, mask);
1359
1360 /* Dump the current TX FIFO contents and restart */
1361 mask = SMC_GET_TX_CFG();
1362 SMC_SET_TX_CFG(mask | TX_CFG_TXS_DUMP_ | TX_CFG_TXD_DUMP_);
1363 /*
1364 * Reconfiguring the PHY doesn't seem like a bad idea here, but
1365 * smc911x_phy_configure() calls msleep() which calls schedule_timeout()
1366 * which calls schedule(). Hence we use a work queue.
1367 */
1368 if (lp->phy_type != 0) {
1369 if (schedule_work(&lp->phy_configure)) {
1370 lp->work_pending = 1;
1371 }
1372 }
1373
1374 /* We can accept TX packets again */
1375 dev->trans_start = jiffies;
1376 netif_wake_queue(dev);
1377 }
1378
1379 /*
1380 * This routine will, depending on the values passed to it,
1381 * either make it accept multicast packets, go into
1382 * promiscuous mode (for TCPDUMP and cousins) or accept
1383 * a select set of multicast packets
1384 */
1385 static void smc911x_set_multicast_list(struct net_device *dev)
1386 {
1387 struct smc911x_local *lp = netdev_priv(dev);
1388 unsigned long ioaddr = dev->base_addr;
1389 unsigned int multicast_table[2];
1390 unsigned int mcr, update_multicast = 0;
1391 unsigned long flags;
1392 /* table for flipping the order of 5 bits */
1393 static const unsigned char invert5[] =
1394 {0x00, 0x10, 0x08, 0x18, 0x04, 0x14, 0x0C, 0x1C,
1395 0x02, 0x12, 0x0A, 0x1A, 0x06, 0x16, 0x0E, 0x1E,
1396 0x01, 0x11, 0x09, 0x19, 0x05, 0x15, 0x0D, 0x1D,
1397 0x03, 0x13, 0x0B, 0x1B, 0x07, 0x17, 0x0F, 0x1F};
1398
1399
1400 DBG(SMC_DEBUG_FUNC, "%s: --> %s\n", dev->name, __FUNCTION__);
1401
1402 spin_lock_irqsave(&lp->lock, flags);
1403 SMC_GET_MAC_CR(mcr);
1404 spin_unlock_irqrestore(&lp->lock, flags);
1405
1406 if (dev->flags & IFF_PROMISC) {
1407
1408 DBG(SMC_DEBUG_MISC, "%s: RCR_PRMS\n", dev->name);
1409 mcr |= MAC_CR_PRMS_;
1410 }
1411 /*
1412 * Here, I am setting this to accept all multicast packets.
1413 * I don't need to zero the multicast table, because the flag is
1414 * checked before the table is
1415 */
1416 else if (dev->flags & IFF_ALLMULTI || dev->mc_count > 16) {
1417 DBG(SMC_DEBUG_MISC, "%s: RCR_ALMUL\n", dev->name);
1418 mcr |= MAC_CR_MCPAS_;
1419 }
1420
1421 /*
1422 * This sets the internal hardware table to filter out unwanted
1423 * multicast packets before they take up memory.
1424 *
1425 * The SMC chip uses a hash table where the high 6 bits of the CRC of
1426 * address are the offset into the table. If that bit is 1, then the
1427 * multicast packet is accepted. Otherwise, it's dropped silently.
1428 *
1429 * To use the 6 bits as an offset into the table, the high 1 bit is
1430 * the number of the 32 bit register, while the low 5 bits are the bit
1431 * within that register.
1432 */
1433 else if (dev->mc_count) {
1434 int i;
1435 struct dev_mc_list *cur_addr;
1436
1437 /* Set the Hash perfec mode */
1438 mcr |= MAC_CR_HPFILT_;
1439
1440 /* start with a table of all zeros: reject all */
1441 memset(multicast_table, 0, sizeof(multicast_table));
1442
1443 cur_addr = dev->mc_list;
1444 for (i = 0; i < dev->mc_count; i++, cur_addr = cur_addr->next) {
1445 int position;
1446
1447 /* do we have a pointer here? */
1448 if (!cur_addr)
1449 break;
1450 /* make sure this is a multicast address -
1451 shouldn't this be a given if we have it here ? */
1452 if (!(*cur_addr->dmi_addr & 1))
1453 continue;
1454
1455 /* only use the low order bits */
1456 position = crc32_le(~0, cur_addr->dmi_addr, 6) & 0x3f;
1457
1458 /* do some messy swapping to put the bit in the right spot */
1459 multicast_table[invert5[position&0x1F]&0x1] |=
1460 (1<<invert5[(position>>1)&0x1F]);
1461 }
1462
1463 /* be sure I get rid of flags I might have set */
1464 mcr &= ~(MAC_CR_PRMS_ | MAC_CR_MCPAS_);
1465
1466 /* now, the table can be loaded into the chipset */
1467 update_multicast = 1;
1468 } else {
1469 DBG(SMC_DEBUG_MISC, "%s: ~(MAC_CR_PRMS_|MAC_CR_MCPAS_)\n",
1470 dev->name);
1471 mcr &= ~(MAC_CR_PRMS_ | MAC_CR_MCPAS_);
1472
1473 /*
1474 * since I'm disabling all multicast entirely, I need to
1475 * clear the multicast list
1476 */
1477 memset(multicast_table, 0, sizeof(multicast_table));
1478 update_multicast = 1;
1479 }
1480
1481 spin_lock_irqsave(&lp->lock, flags);
1482 SMC_SET_MAC_CR(mcr);
1483 if (update_multicast) {
1484 DBG(SMC_DEBUG_MISC,
1485 "%s: update mcast hash table 0x%08x 0x%08x\n",
1486 dev->name, multicast_table[0], multicast_table[1]);
1487 SMC_SET_HASHL(multicast_table[0]);
1488 SMC_SET_HASHH(multicast_table[1]);
1489 }
1490 spin_unlock_irqrestore(&lp->lock, flags);
1491 }
1492
1493
1494 /*
1495 * Open and Initialize the board
1496 *
1497 * Set up everything, reset the card, etc..
1498 */
1499 static int
1500 smc911x_open(struct net_device *dev)
1501 {
1502 struct smc911x_local *lp = netdev_priv(dev);
1503
1504 DBG(SMC_DEBUG_FUNC, "%s: --> %s\n", dev->name, __FUNCTION__);
1505
1506 /*
1507 * Check that the address is valid. If its not, refuse
1508 * to bring the device up. The user must specify an
1509 * address using ifconfig eth0 hw ether xx:xx:xx:xx:xx:xx
1510 */
1511 if (!is_valid_ether_addr(dev->dev_addr)) {
1512 PRINTK("%s: no valid ethernet hw addr\n", __FUNCTION__);
1513 return -EINVAL;
1514 }
1515
1516 /* reset the hardware */
1517 smc911x_reset(dev);
1518
1519 /* Configure the PHY, initialize the link state */
1520 smc911x_phy_configure(&lp->phy_configure);
1521
1522 /* Turn on Tx + Rx */
1523 smc911x_enable(dev);
1524
1525 netif_start_queue(dev);
1526
1527 return 0;
1528 }
1529
1530 /*
1531 * smc911x_close
1532 *
1533 * this makes the board clean up everything that it can
1534 * and not talk to the outside world. Caused by
1535 * an 'ifconfig ethX down'
1536 */
1537 static int smc911x_close(struct net_device *dev)
1538 {
1539 struct smc911x_local *lp = netdev_priv(dev);
1540
1541 DBG(SMC_DEBUG_FUNC, "%s: --> %s\n", dev->name, __FUNCTION__);
1542
1543 netif_stop_queue(dev);
1544 netif_carrier_off(dev);
1545
1546 /* clear everything */
1547 smc911x_shutdown(dev);
1548
1549 if (lp->phy_type != 0) {
1550 /* We need to ensure that no calls to
1551 * smc911x_phy_configure are pending.
1552
1553 * flush_scheduled_work() cannot be called because we
1554 * are running with the netlink semaphore held (from
1555 * devinet_ioctl()) and the pending work queue
1556 * contains linkwatch_event() (scheduled by
1557 * netif_carrier_off() above). linkwatch_event() also
1558 * wants the netlink semaphore.
1559 */
1560 while (lp->work_pending)
1561 schedule();
1562 smc911x_phy_powerdown(dev, lp->mii.phy_id);
1563 }
1564
1565 if (lp->pending_tx_skb) {
1566 dev_kfree_skb(lp->pending_tx_skb);
1567 lp->pending_tx_skb = NULL;
1568 }
1569
1570 return 0;
1571 }
1572
1573 /*
1574 * Get the current statistics.
1575 * This may be called with the card open or closed.
1576 */
1577 static struct net_device_stats *smc911x_query_statistics(struct net_device *dev)
1578 {
1579 struct smc911x_local *lp = netdev_priv(dev);
1580 DBG(SMC_DEBUG_FUNC, "%s: --> %s\n", dev->name, __FUNCTION__);
1581
1582
1583 return &lp->stats;
1584 }
1585
1586 /*
1587 * Ethtool support
1588 */
1589 static int
1590 smc911x_ethtool_getsettings(struct net_device *dev, struct ethtool_cmd *cmd)
1591 {
1592 struct smc911x_local *lp = netdev_priv(dev);
1593 unsigned long ioaddr = dev->base_addr;
1594 int ret, status;
1595 unsigned long flags;
1596
1597 DBG(SMC_DEBUG_FUNC, "%s: --> %s\n", dev->name, __FUNCTION__);
1598 cmd->maxtxpkt = 1;
1599 cmd->maxrxpkt = 1;
1600
1601 if (lp->phy_type != 0) {
1602 spin_lock_irqsave(&lp->lock, flags);
1603 ret = mii_ethtool_gset(&lp->mii, cmd);
1604 spin_unlock_irqrestore(&lp->lock, flags);
1605 } else {
1606 cmd->supported = SUPPORTED_10baseT_Half |
1607 SUPPORTED_10baseT_Full |
1608 SUPPORTED_TP | SUPPORTED_AUI;
1609
1610 if (lp->ctl_rspeed == 10)
1611 cmd->speed = SPEED_10;
1612 else if (lp->ctl_rspeed == 100)
1613 cmd->speed = SPEED_100;
1614
1615 cmd->autoneg = AUTONEG_DISABLE;
1616 if (lp->mii.phy_id==1)
1617 cmd->transceiver = XCVR_INTERNAL;
1618 else
1619 cmd->transceiver = XCVR_EXTERNAL;
1620 cmd->port = 0;
1621 SMC_GET_PHY_SPECIAL(lp->mii.phy_id, status);
1622 cmd->duplex =
1623 (status & (PHY_SPECIAL_SPD_10FULL_ | PHY_SPECIAL_SPD_100FULL_)) ?
1624 DUPLEX_FULL : DUPLEX_HALF;
1625 ret = 0;
1626 }
1627
1628 return ret;
1629 }
1630
1631 static int
1632 smc911x_ethtool_setsettings(struct net_device *dev, struct ethtool_cmd *cmd)
1633 {
1634 struct smc911x_local *lp = netdev_priv(dev);
1635 int ret;
1636 unsigned long flags;
1637
1638 if (lp->phy_type != 0) {
1639 spin_lock_irqsave(&lp->lock, flags);
1640 ret = mii_ethtool_sset(&lp->mii, cmd);
1641 spin_unlock_irqrestore(&lp->lock, flags);
1642 } else {
1643 if (cmd->autoneg != AUTONEG_DISABLE ||
1644 cmd->speed != SPEED_10 ||
1645 (cmd->duplex != DUPLEX_HALF && cmd->duplex != DUPLEX_FULL) ||
1646 (cmd->port != PORT_TP && cmd->port != PORT_AUI))
1647 return -EINVAL;
1648
1649 lp->ctl_rfduplx = cmd->duplex == DUPLEX_FULL;
1650
1651 ret = 0;
1652 }
1653
1654 return ret;
1655 }
1656
1657 static void
1658 smc911x_ethtool_getdrvinfo(struct net_device *dev, struct ethtool_drvinfo *info)
1659 {
1660 strncpy(info->driver, CARDNAME, sizeof(info->driver));
1661 strncpy(info->version, version, sizeof(info->version));
1662 strncpy(info->bus_info, dev->class_dev.dev->bus_id, sizeof(info->bus_info));
1663 }
1664
1665 static int smc911x_ethtool_nwayreset(struct net_device *dev)
1666 {
1667 struct smc911x_local *lp = netdev_priv(dev);
1668 int ret = -EINVAL;
1669 unsigned long flags;
1670
1671 if (lp->phy_type != 0) {
1672 spin_lock_irqsave(&lp->lock, flags);
1673 ret = mii_nway_restart(&lp->mii);
1674 spin_unlock_irqrestore(&lp->lock, flags);
1675 }
1676
1677 return ret;
1678 }
1679
1680 static u32 smc911x_ethtool_getmsglevel(struct net_device *dev)
1681 {
1682 struct smc911x_local *lp = netdev_priv(dev);
1683 return lp->msg_enable;
1684 }
1685
1686 static void smc911x_ethtool_setmsglevel(struct net_device *dev, u32 level)
1687 {
1688 struct smc911x_local *lp = netdev_priv(dev);
1689 lp->msg_enable = level;
1690 }
1691
1692 static int smc911x_ethtool_getregslen(struct net_device *dev)
1693 {
1694 /* System regs + MAC regs + PHY regs */
1695 return (((E2P_CMD - ID_REV)/4 + 1) +
1696 (WUCSR - MAC_CR)+1 + 32) * sizeof(u32);
1697 }
1698
1699 static void smc911x_ethtool_getregs(struct net_device *dev,
1700 struct ethtool_regs* regs, void *buf)
1701 {
1702 unsigned long ioaddr = dev->base_addr;
1703 struct smc911x_local *lp = netdev_priv(dev);
1704 unsigned long flags;
1705 u32 reg,i,j=0;
1706 u32 *data = (u32*)buf;
1707
1708 regs->version = lp->version;
1709 for(i=ID_REV;i<=E2P_CMD;i+=4) {
1710 data[j++] = SMC_inl(ioaddr,i);
1711 }
1712 for(i=MAC_CR;i<=WUCSR;i++) {
1713 spin_lock_irqsave(&lp->lock, flags);
1714 SMC_GET_MAC_CSR(i, reg);
1715 spin_unlock_irqrestore(&lp->lock, flags);
1716 data[j++] = reg;
1717 }
1718 for(i=0;i<=31;i++) {
1719 spin_lock_irqsave(&lp->lock, flags);
1720 SMC_GET_MII(i, lp->mii.phy_id, reg);
1721 spin_unlock_irqrestore(&lp->lock, flags);
1722 data[j++] = reg & 0xFFFF;
1723 }
1724 }
1725
1726 static int smc911x_ethtool_wait_eeprom_ready(struct net_device *dev)
1727 {
1728 unsigned long ioaddr = dev->base_addr;
1729 unsigned int timeout;
1730 int e2p_cmd;
1731
1732 e2p_cmd = SMC_GET_E2P_CMD();
1733 for(timeout=10;(e2p_cmd & E2P_CMD_EPC_BUSY_) && timeout; timeout--) {
1734 if (e2p_cmd & E2P_CMD_EPC_TIMEOUT_) {
1735 PRINTK("%s: %s timeout waiting for EEPROM to respond\n",
1736 dev->name, __FUNCTION__);
1737 return -EFAULT;
1738 }
1739 mdelay(1);
1740 e2p_cmd = SMC_GET_E2P_CMD();
1741 }
1742 if (timeout == 0) {
1743 PRINTK("%s: %s timeout waiting for EEPROM CMD not busy\n",
1744 dev->name, __FUNCTION__);
1745 return -ETIMEDOUT;
1746 }
1747 return 0;
1748 }
1749
1750 static inline int smc911x_ethtool_write_eeprom_cmd(struct net_device *dev,
1751 int cmd, int addr)
1752 {
1753 unsigned long ioaddr = dev->base_addr;
1754 int ret;
1755
1756 if ((ret = smc911x_ethtool_wait_eeprom_ready(dev))!=0)
1757 return ret;
1758 SMC_SET_E2P_CMD(E2P_CMD_EPC_BUSY_ |
1759 ((cmd) & (0x7<<28)) |
1760 ((addr) & 0xFF));
1761 return 0;
1762 }
1763
1764 static inline int smc911x_ethtool_read_eeprom_byte(struct net_device *dev,
1765 u8 *data)
1766 {
1767 unsigned long ioaddr = dev->base_addr;
1768 int ret;
1769
1770 if ((ret = smc911x_ethtool_wait_eeprom_ready(dev))!=0)
1771 return ret;
1772 *data = SMC_GET_E2P_DATA();
1773 return 0;
1774 }
1775
1776 static inline int smc911x_ethtool_write_eeprom_byte(struct net_device *dev,
1777 u8 data)
1778 {
1779 unsigned long ioaddr = dev->base_addr;
1780 int ret;
1781
1782 if ((ret = smc911x_ethtool_wait_eeprom_ready(dev))!=0)
1783 return ret;
1784 SMC_SET_E2P_DATA(data);
1785 return 0;
1786 }
1787
1788 static int smc911x_ethtool_geteeprom(struct net_device *dev,
1789 struct ethtool_eeprom *eeprom, u8 *data)
1790 {
1791 u8 eebuf[SMC911X_EEPROM_LEN];
1792 int i, ret;
1793
1794 for(i=0;i<SMC911X_EEPROM_LEN;i++) {
1795 if ((ret=smc911x_ethtool_write_eeprom_cmd(dev, E2P_CMD_EPC_CMD_READ_, i ))!=0)
1796 return ret;
1797 if ((ret=smc911x_ethtool_read_eeprom_byte(dev, &eebuf[i]))!=0)
1798 return ret;
1799 }
1800 memcpy(data, eebuf+eeprom->offset, eeprom->len);
1801 return 0;
1802 }
1803
1804 static int smc911x_ethtool_seteeprom(struct net_device *dev,
1805 struct ethtool_eeprom *eeprom, u8 *data)
1806 {
1807 int i, ret;
1808
1809 /* Enable erase */
1810 if ((ret=smc911x_ethtool_write_eeprom_cmd(dev, E2P_CMD_EPC_CMD_EWEN_, 0 ))!=0)
1811 return ret;
1812 for(i=eeprom->offset;i<(eeprom->offset+eeprom->len);i++) {
1813 /* erase byte */
1814 if ((ret=smc911x_ethtool_write_eeprom_cmd(dev, E2P_CMD_EPC_CMD_ERASE_, i ))!=0)
1815 return ret;
1816 /* write byte */
1817 if ((ret=smc911x_ethtool_write_eeprom_byte(dev, *data))!=0)
1818 return ret;
1819 if ((ret=smc911x_ethtool_write_eeprom_cmd(dev, E2P_CMD_EPC_CMD_WRITE_, i ))!=0)
1820 return ret;
1821 }
1822 return 0;
1823 }
1824
1825 static int smc911x_ethtool_geteeprom_len(struct net_device *dev)
1826 {
1827 return SMC911X_EEPROM_LEN;
1828 }
1829
1830 static const struct ethtool_ops smc911x_ethtool_ops = {
1831 .get_settings = smc911x_ethtool_getsettings,
1832 .set_settings = smc911x_ethtool_setsettings,
1833 .get_drvinfo = smc911x_ethtool_getdrvinfo,
1834 .get_msglevel = smc911x_ethtool_getmsglevel,
1835 .set_msglevel = smc911x_ethtool_setmsglevel,
1836 .nway_reset = smc911x_ethtool_nwayreset,
1837 .get_link = ethtool_op_get_link,
1838 .get_regs_len = smc911x_ethtool_getregslen,
1839 .get_regs = smc911x_ethtool_getregs,
1840 .get_eeprom_len = smc911x_ethtool_geteeprom_len,
1841 .get_eeprom = smc911x_ethtool_geteeprom,
1842 .set_eeprom = smc911x_ethtool_seteeprom,
1843 };
1844
1845 /*
1846 * smc911x_findirq
1847 *
1848 * This routine has a simple purpose -- make the SMC chip generate an
1849 * interrupt, so an auto-detect routine can detect it, and find the IRQ,
1850 */
1851 static int __init smc911x_findirq(unsigned long ioaddr)
1852 {
1853 int timeout = 20;
1854 unsigned long cookie;
1855
1856 DBG(SMC_DEBUG_FUNC, "--> %s\n", __FUNCTION__);
1857
1858 cookie = probe_irq_on();
1859
1860 /*
1861 * Force a SW interrupt
1862 */
1863
1864 SMC_SET_INT_EN(INT_EN_SW_INT_EN_);
1865
1866 /*
1867 * Wait until positive that the interrupt has been generated
1868 */
1869 do {
1870 int int_status;
1871 udelay(10);
1872 int_status = SMC_GET_INT_EN();
1873 if (int_status & INT_EN_SW_INT_EN_)
1874 break; /* got the interrupt */
1875 } while (--timeout);
1876
1877 /*
1878 * there is really nothing that I can do here if timeout fails,
1879 * as autoirq_report will return a 0 anyway, which is what I
1880 * want in this case. Plus, the clean up is needed in both
1881 * cases.
1882 */
1883
1884 /* and disable all interrupts again */
1885 SMC_SET_INT_EN(0);
1886
1887 /* and return what I found */
1888 return probe_irq_off(cookie);
1889 }
1890
1891 /*
1892 * Function: smc911x_probe(unsigned long ioaddr)
1893 *
1894 * Purpose:
1895 * Tests to see if a given ioaddr points to an SMC911x chip.
1896 * Returns a 0 on success
1897 *
1898 * Algorithm:
1899 * (1) see if the endian word is OK
1900 * (1) see if I recognize the chip ID in the appropriate register
1901 *
1902 * Here I do typical initialization tasks.
1903 *
1904 * o Initialize the structure if needed
1905 * o print out my vanity message if not done so already
1906 * o print out what type of hardware is detected
1907 * o print out the ethernet address
1908 * o find the IRQ
1909 * o set up my private data
1910 * o configure the dev structure with my subroutines
1911 * o actually GRAB the irq.
1912 * o GRAB the region
1913 */
1914 static int __init smc911x_probe(struct net_device *dev, unsigned long ioaddr)
1915 {
1916 struct smc911x_local *lp = netdev_priv(dev);
1917 int i, retval;
1918 unsigned int val, chip_id, revision;
1919 const char *version_string;
1920
1921 DBG(SMC_DEBUG_FUNC, "%s: --> %s\n", dev->name, __FUNCTION__);
1922
1923 /* First, see if the endian word is recognized */
1924 val = SMC_GET_BYTE_TEST();
1925 DBG(SMC_DEBUG_MISC, "%s: endian probe returned 0x%04x\n", CARDNAME, val);
1926 if (val != 0x87654321) {
1927 printk(KERN_ERR "Invalid chip endian 0x08%x\n",val);
1928 retval = -ENODEV;
1929 goto err_out;
1930 }
1931
1932 /*
1933 * check if the revision register is something that I
1934 * recognize. These might need to be added to later,
1935 * as future revisions could be added.
1936 */
1937 chip_id = SMC_GET_PN();
1938 DBG(SMC_DEBUG_MISC, "%s: id probe returned 0x%04x\n", CARDNAME, chip_id);
1939 for(i=0;chip_ids[i].id != 0; i++) {
1940 if (chip_ids[i].id == chip_id) break;
1941 }
1942 if (!chip_ids[i].id) {
1943 printk(KERN_ERR "Unknown chip ID %04x\n", chip_id);
1944 retval = -ENODEV;
1945 goto err_out;
1946 }
1947 version_string = chip_ids[i].name;
1948
1949 revision = SMC_GET_REV();
1950 DBG(SMC_DEBUG_MISC, "%s: revision = 0x%04x\n", CARDNAME, revision);
1951
1952 /* At this point I'll assume that the chip is an SMC911x. */
1953 DBG(SMC_DEBUG_MISC, "%s: Found a %s\n", CARDNAME, chip_ids[i].name);
1954
1955 /* Validate the TX FIFO size requested */
1956 if ((tx_fifo_kb < 2) || (tx_fifo_kb > 14)) {
1957 printk(KERN_ERR "Invalid TX FIFO size requested %d\n", tx_fifo_kb);
1958 retval = -EINVAL;
1959 goto err_out;
1960 }
1961
1962 /* fill in some of the fields */
1963 dev->base_addr = ioaddr;
1964 lp->version = chip_ids[i].id;
1965 lp->revision = revision;
1966 lp->tx_fifo_kb = tx_fifo_kb;
1967 /* Reverse calculate the RX FIFO size from the TX */
1968 lp->tx_fifo_size=(lp->tx_fifo_kb<<10) - 512;
1969 lp->rx_fifo_size= ((0x4000 - 512 - lp->tx_fifo_size) / 16) * 15;
1970
1971 /* Set the automatic flow control values */
1972 switch(lp->tx_fifo_kb) {
1973 /*
1974 * AFC_HI is about ((Rx Data Fifo Size)*2/3)/64
1975 * AFC_LO is AFC_HI/2
1976 * BACK_DUR is about 5uS*(AFC_LO) rounded down
1977 */
1978 case 2:/* 13440 Rx Data Fifo Size */
1979 lp->afc_cfg=0x008C46AF;break;
1980 case 3:/* 12480 Rx Data Fifo Size */
1981 lp->afc_cfg=0x0082419F;break;
1982 case 4:/* 11520 Rx Data Fifo Size */
1983 lp->afc_cfg=0x00783C9F;break;
1984 case 5:/* 10560 Rx Data Fifo Size */
1985 lp->afc_cfg=0x006E374F;break;
1986 case 6:/* 9600 Rx Data Fifo Size */
1987 lp->afc_cfg=0x0064328F;break;
1988 case 7:/* 8640 Rx Data Fifo Size */
1989 lp->afc_cfg=0x005A2D7F;break;
1990 case 8:/* 7680 Rx Data Fifo Size */
1991 lp->afc_cfg=0x0050287F;break;
1992 case 9:/* 6720 Rx Data Fifo Size */
1993 lp->afc_cfg=0x0046236F;break;
1994 case 10:/* 5760 Rx Data Fifo Size */
1995 lp->afc_cfg=0x003C1E6F;break;
1996 case 11:/* 4800 Rx Data Fifo Size */
1997 lp->afc_cfg=0x0032195F;break;
1998 /*
1999 * AFC_HI is ~1520 bytes less than RX Data Fifo Size
2000 * AFC_LO is AFC_HI/2
2001 * BACK_DUR is about 5uS*(AFC_LO) rounded down
2002 */
2003 case 12:/* 3840 Rx Data Fifo Size */
2004 lp->afc_cfg=0x0024124F;break;
2005 case 13:/* 2880 Rx Data Fifo Size */
2006 lp->afc_cfg=0x0015073F;break;
2007 case 14:/* 1920 Rx Data Fifo Size */
2008 lp->afc_cfg=0x0006032F;break;
2009 default:
2010 PRINTK("%s: ERROR -- no AFC_CFG setting found",
2011 dev->name);
2012 break;
2013 }
2014
2015 DBG(SMC_DEBUG_MISC | SMC_DEBUG_TX | SMC_DEBUG_RX,
2016 "%s: tx_fifo %d rx_fifo %d afc_cfg 0x%08x\n", CARDNAME,
2017 lp->tx_fifo_size, lp->rx_fifo_size, lp->afc_cfg);
2018
2019 spin_lock_init(&lp->lock);
2020
2021 /* Get the MAC address */
2022 SMC_GET_MAC_ADDR(dev->dev_addr);
2023
2024 /* now, reset the chip, and put it into a known state */
2025 smc911x_reset(dev);
2026
2027 /*
2028 * If dev->irq is 0, then the device has to be banged on to see
2029 * what the IRQ is.
2030 *
2031 * Specifying an IRQ is done with the assumption that the user knows
2032 * what (s)he is doing. No checking is done!!!!
2033 */
2034 if (dev->irq < 1) {
2035 int trials;
2036
2037 trials = 3;
2038 while (trials--) {
2039 dev->irq = smc911x_findirq(ioaddr);
2040 if (dev->irq)
2041 break;
2042 /* kick the card and try again */
2043 smc911x_reset(dev);
2044 }
2045 }
2046 if (dev->irq == 0) {
2047 printk("%s: Couldn't autodetect your IRQ. Use irq=xx.\n",
2048 dev->name);
2049 retval = -ENODEV;
2050 goto err_out;
2051 }
2052 dev->irq = irq_canonicalize(dev->irq);
2053
2054 /* Fill in the fields of the device structure with ethernet values. */
2055 ether_setup(dev);
2056
2057 dev->open = smc911x_open;
2058 dev->stop = smc911x_close;
2059 dev->hard_start_xmit = smc911x_hard_start_xmit;
2060 dev->tx_timeout = smc911x_timeout;
2061 dev->watchdog_timeo = msecs_to_jiffies(watchdog);
2062 dev->get_stats = smc911x_query_statistics;
2063 dev->set_multicast_list = smc911x_set_multicast_list;
2064 dev->ethtool_ops = &smc911x_ethtool_ops;
2065 #ifdef CONFIG_NET_POLL_CONTROLLER
2066 dev->poll_controller = smc911x_poll_controller;
2067 #endif
2068
2069 INIT_WORK(&lp->phy_configure, smc911x_phy_configure);
2070 lp->mii.phy_id_mask = 0x1f;
2071 lp->mii.reg_num_mask = 0x1f;
2072 lp->mii.force_media = 0;
2073 lp->mii.full_duplex = 0;
2074 lp->mii.dev = dev;
2075 lp->mii.mdio_read = smc911x_phy_read;
2076 lp->mii.mdio_write = smc911x_phy_write;
2077
2078 /*
2079 * Locate the phy, if any.
2080 */
2081 smc911x_phy_detect(dev);
2082
2083 /* Set default parameters */
2084 lp->msg_enable = NETIF_MSG_LINK;
2085 lp->ctl_rfduplx = 1;
2086 lp->ctl_rspeed = 100;
2087
2088 /* Grab the IRQ */
2089 retval = request_irq(dev->irq, &smc911x_interrupt, IRQF_SHARED, dev->name, dev);
2090 if (retval)
2091 goto err_out;
2092
2093 set_irq_type(dev->irq, IRQT_FALLING);
2094
2095 #ifdef SMC_USE_DMA
2096 lp->rxdma = SMC_DMA_REQUEST(dev, smc911x_rx_dma_irq);
2097 lp->txdma = SMC_DMA_REQUEST(dev, smc911x_tx_dma_irq);
2098 lp->rxdma_active = 0;
2099 lp->txdma_active = 0;
2100 dev->dma = lp->rxdma;
2101 #endif
2102
2103 retval = register_netdev(dev);
2104 if (retval == 0) {
2105 /* now, print out the card info, in a short format.. */
2106 printk("%s: %s (rev %d) at %#lx IRQ %d",
2107 dev->name, version_string, lp->revision,
2108 dev->base_addr, dev->irq);
2109
2110 #ifdef SMC_USE_DMA
2111 if (lp->rxdma != -1)
2112 printk(" RXDMA %d ", lp->rxdma);
2113
2114 if (lp->txdma != -1)
2115 printk("TXDMA %d", lp->txdma);
2116 #endif
2117 printk("\n");
2118 if (!is_valid_ether_addr(dev->dev_addr)) {
2119 printk("%s: Invalid ethernet MAC address. Please "
2120 "set using ifconfig\n", dev->name);
2121 } else {
2122 /* Print the Ethernet address */
2123 printk("%s: Ethernet addr: ", dev->name);
2124 for (i = 0; i < 5; i++)
2125 printk("%2.2x:", dev->dev_addr[i]);
2126 printk("%2.2x\n", dev->dev_addr[5]);
2127 }
2128
2129 if (lp->phy_type == 0) {
2130 PRINTK("%s: No PHY found\n", dev->name);
2131 } else if ((lp->phy_type & ~0xff) == LAN911X_INTERNAL_PHY_ID) {
2132 PRINTK("%s: LAN911x Internal PHY\n", dev->name);
2133 } else {
2134 PRINTK("%s: External PHY 0x%08x\n", dev->name, lp->phy_type);
2135 }
2136 }
2137
2138 err_out:
2139 #ifdef SMC_USE_DMA
2140 if (retval) {
2141 if (lp->rxdma != -1) {
2142 SMC_DMA_FREE(dev, lp->rxdma);
2143 }
2144 if (lp->txdma != -1) {
2145 SMC_DMA_FREE(dev, lp->txdma);
2146 }
2147 }
2148 #endif
2149 return retval;
2150 }
2151
2152 /*
2153 * smc911x_init(void)
2154 *
2155 * Output:
2156 * 0 --> there is a device
2157 * anything else, error
2158 */
2159 static int smc911x_drv_probe(struct platform_device *pdev)
2160 {
2161 struct net_device *ndev;
2162 struct resource *res;
2163 struct smc911x_local *lp;
2164 unsigned int *addr;
2165 int ret;
2166
2167 DBG(SMC_DEBUG_FUNC, "--> %s\n", __FUNCTION__);
2168 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
2169 if (!res) {
2170 ret = -ENODEV;
2171 goto out;
2172 }
2173
2174 /*
2175 * Request the regions.
2176 */
2177 if (!request_mem_region(res->start, SMC911X_IO_EXTENT, CARDNAME)) {
2178 ret = -EBUSY;
2179 goto out;
2180 }
2181
2182 ndev = alloc_etherdev(sizeof(struct smc911x_local));
2183 if (!ndev) {
2184 printk("%s: could not allocate device.\n", CARDNAME);
2185 ret = -ENOMEM;
2186 goto release_1;
2187 }
2188 SET_MODULE_OWNER(ndev);
2189 SET_NETDEV_DEV(ndev, &pdev->dev);
2190
2191 ndev->dma = (unsigned char)-1;
2192 ndev->irq = platform_get_irq(pdev, 0);
2193 lp = netdev_priv(ndev);
2194 lp->netdev = ndev;
2195
2196 addr = ioremap(res->start, SMC911X_IO_EXTENT);
2197 if (!addr) {
2198 ret = -ENOMEM;
2199 goto release_both;
2200 }
2201
2202 platform_set_drvdata(pdev, ndev);
2203 ret = smc911x_probe(ndev, (unsigned long)addr);
2204 if (ret != 0) {
2205 platform_set_drvdata(pdev, NULL);
2206 iounmap(addr);
2207 release_both:
2208 free_netdev(ndev);
2209 release_1:
2210 release_mem_region(res->start, SMC911X_IO_EXTENT);
2211 out:
2212 printk("%s: not found (%d).\n", CARDNAME, ret);
2213 }
2214 #ifdef SMC_USE_DMA
2215 else {
2216 lp->physaddr = res->start;
2217 lp->dev = &pdev->dev;
2218 }
2219 #endif
2220
2221 return ret;
2222 }
2223
2224 static int smc911x_drv_remove(struct platform_device *pdev)
2225 {
2226 struct net_device *ndev = platform_get_drvdata(pdev);
2227 struct resource *res;
2228
2229 DBG(SMC_DEBUG_FUNC, "--> %s\n", __FUNCTION__);
2230 platform_set_drvdata(pdev, NULL);
2231
2232 unregister_netdev(ndev);
2233
2234 free_irq(ndev->irq, ndev);
2235
2236 #ifdef SMC_USE_DMA
2237 {
2238 struct smc911x_local *lp = netdev_priv(ndev);
2239 if (lp->rxdma != -1) {
2240 SMC_DMA_FREE(dev, lp->rxdma);
2241 }
2242 if (lp->txdma != -1) {
2243 SMC_DMA_FREE(dev, lp->txdma);
2244 }
2245 }
2246 #endif
2247 iounmap((void *)ndev->base_addr);
2248 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
2249 release_mem_region(res->start, SMC911X_IO_EXTENT);
2250
2251 free_netdev(ndev);
2252 return 0;
2253 }
2254
2255 static int smc911x_drv_suspend(struct platform_device *dev, pm_message_t state)
2256 {
2257 struct net_device *ndev = platform_get_drvdata(dev);
2258 unsigned long ioaddr = ndev->base_addr;
2259
2260 DBG(SMC_DEBUG_FUNC, "--> %s\n", __FUNCTION__);
2261 if (ndev) {
2262 if (netif_running(ndev)) {
2263 netif_device_detach(ndev);
2264 smc911x_shutdown(ndev);
2265 #if POWER_DOWN
2266 /* Set D2 - Energy detect only setting */
2267 SMC_SET_PMT_CTRL(2<<12);
2268 #endif
2269 }
2270 }
2271 return 0;
2272 }
2273
2274 static int smc911x_drv_resume(struct platform_device *dev)
2275 {
2276 struct net_device *ndev = platform_get_drvdata(dev);
2277
2278 DBG(SMC_DEBUG_FUNC, "--> %s\n", __FUNCTION__);
2279 if (ndev) {
2280 struct smc911x_local *lp = netdev_priv(ndev);
2281
2282 if (netif_running(ndev)) {
2283 smc911x_reset(ndev);
2284 smc911x_enable(ndev);
2285 if (lp->phy_type != 0)
2286 smc911x_phy_configure(&lp->phy_configure);
2287 netif_device_attach(ndev);
2288 }
2289 }
2290 return 0;
2291 }
2292
2293 static struct platform_driver smc911x_driver = {
2294 .probe = smc911x_drv_probe,
2295 .remove = smc911x_drv_remove,
2296 .suspend = smc911x_drv_suspend,
2297 .resume = smc911x_drv_resume,
2298 .driver = {
2299 .name = CARDNAME,
2300 },
2301 };
2302
2303 static int __init smc911x_init(void)
2304 {
2305 return platform_driver_register(&smc911x_driver);
2306 }
2307
2308 static void __exit smc911x_cleanup(void)
2309 {
2310 platform_driver_unregister(&smc911x_driver);
2311 }
2312
2313 module_init(smc911x_init);
2314 module_exit(smc911x_cleanup);
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