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1 /*
2 * smc91x.c
3 * This is a driver for SMSC's 91C9x/91C1xx single-chip Ethernet devices.
4 *
5 * Copyright (C) 1996 by Erik Stahlman
6 * Copyright (C) 2001 Standard Microsystems Corporation
7 * Developed by Simple Network Magic Corporation
8 * Copyright (C) 2003 Monta Vista Software, Inc.
9 * Unified SMC91x driver by Nicolas Pitre
10 *
11 * This program is free software; you can redistribute it and/or modify
12 * it under the terms of the GNU General Public License as published by
13 * the Free Software Foundation; either version 2 of the License, or
14 * (at your option) any later version.
15 *
16 * This program is distributed in the hope that it will be useful,
17 * but WITHOUT ANY WARRANTY; without even the implied warranty of
18 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
19 * GNU General Public License for more details.
20 *
21 * You should have received a copy of the GNU General Public License
22 * along with this program; if not, write to the Free Software
23 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
24 *
25 * Arguments:
26 * io = for the base address
27 * irq = for the IRQ
28 * nowait = 0 for normal wait states, 1 eliminates additional wait states
29 *
30 * original author:
31 * Erik Stahlman <erik@vt.edu>
32 *
33 * hardware multicast code:
34 * Peter Cammaert <pc@denkart.be>
35 *
36 * contributors:
37 * Daris A Nevil <dnevil@snmc.com>
38 * Nicolas Pitre <nico@cam.org>
39 * Russell King <rmk@arm.linux.org.uk>
40 *
41 * History:
42 * 08/20/00 Arnaldo Melo fix kfree(skb) in smc_hardware_send_packet
43 * 12/15/00 Christian Jullien fix "Warning: kfree_skb on hard IRQ"
44 * 03/16/01 Daris A Nevil modified smc9194.c for use with LAN91C111
45 * 08/22/01 Scott Anderson merge changes from smc9194 to smc91111
46 * 08/21/01 Pramod B Bhardwaj added support for RevB of LAN91C111
47 * 12/20/01 Jeff Sutherland initial port to Xscale PXA with DMA support
48 * 04/07/03 Nicolas Pitre unified SMC91x driver, killed irq races,
49 * more bus abstraction, big cleanup, etc.
50 * 29/09/03 Russell King - add driver model support
51 * - ethtool support
52 * - convert to use generic MII interface
53 * - add link up/down notification
54 * - don't try to handle full negotiation in
55 * smc_phy_configure
56 * - clean up (and fix stack overrun) in PHY
57 * MII read/write functions
58 * 22/09/04 Nicolas Pitre big update (see commit log for details)
59 */
60 static const char version[] =
61 "smc91x.c: v1.1, sep 22 2004 by Nicolas Pitre <nico@cam.org>\n";
62
63 /* Debugging level */
64 #ifndef SMC_DEBUG
65 #define SMC_DEBUG 0
66 #endif
67
68
69 #include <linux/init.h>
70 #include <linux/module.h>
71 #include <linux/kernel.h>
72 #include <linux/sched.h>
73 #include <linux/slab.h>
74 #include <linux/delay.h>
75 #include <linux/interrupt.h>
76 #include <linux/errno.h>
77 #include <linux/ioport.h>
78 #include <linux/crc32.h>
79 #include <linux/platform_device.h>
80 #include <linux/spinlock.h>
81 #include <linux/ethtool.h>
82 #include <linux/mii.h>
83 #include <linux/workqueue.h>
84
85 #include <linux/netdevice.h>
86 #include <linux/etherdevice.h>
87 #include <linux/skbuff.h>
88
89 #include <asm/io.h>
90
91 #include "smc91x.h"
92
93 #ifdef CONFIG_ISA
94 /*
95 * the LAN91C111 can be at any of the following port addresses. To change,
96 * for a slightly different card, you can add it to the array. Keep in
97 * mind that the array must end in zero.
98 */
99 static unsigned int smc_portlist[] __initdata = {
100 0x200, 0x220, 0x240, 0x260, 0x280, 0x2A0, 0x2C0, 0x2E0,
101 0x300, 0x320, 0x340, 0x360, 0x380, 0x3A0, 0x3C0, 0x3E0, 0
102 };
103
104 #ifndef SMC_IOADDR
105 # define SMC_IOADDR -1
106 #endif
107 static unsigned long io = SMC_IOADDR;
108 module_param(io, ulong, 0400);
109 MODULE_PARM_DESC(io, "I/O base address");
110
111 #ifndef SMC_IRQ
112 # define SMC_IRQ -1
113 #endif
114 static int irq = SMC_IRQ;
115 module_param(irq, int, 0400);
116 MODULE_PARM_DESC(irq, "IRQ number");
117
118 #endif /* CONFIG_ISA */
119
120 #ifndef SMC_NOWAIT
121 # define SMC_NOWAIT 0
122 #endif
123 static int nowait = SMC_NOWAIT;
124 module_param(nowait, int, 0400);
125 MODULE_PARM_DESC(nowait, "set to 1 for no wait state");
126
127 /*
128 * Transmit timeout, default 5 seconds.
129 */
130 static int watchdog = 1000;
131 module_param(watchdog, int, 0400);
132 MODULE_PARM_DESC(watchdog, "transmit timeout in milliseconds");
133
134 MODULE_LICENSE("GPL");
135
136 /*
137 * The internal workings of the driver. If you are changing anything
138 * here with the SMC stuff, you should have the datasheet and know
139 * what you are doing.
140 */
141 #define CARDNAME "smc91x"
142
143 /*
144 * Use power-down feature of the chip
145 */
146 #define POWER_DOWN 1
147
148 /*
149 * Wait time for memory to be free. This probably shouldn't be
150 * tuned that much, as waiting for this means nothing else happens
151 * in the system
152 */
153 #define MEMORY_WAIT_TIME 16
154
155 /*
156 * The maximum number of processing loops allowed for each call to the
157 * IRQ handler.
158 */
159 #define MAX_IRQ_LOOPS 8
160
161 /*
162 * This selects whether TX packets are sent one by one to the SMC91x internal
163 * memory and throttled until transmission completes. This may prevent
164 * RX overruns a litle by keeping much of the memory free for RX packets
165 * but to the expense of reduced TX throughput and increased IRQ overhead.
166 * Note this is not a cure for a too slow data bus or too high IRQ latency.
167 */
168 #define THROTTLE_TX_PKTS 0
169
170 /*
171 * The MII clock high/low times. 2x this number gives the MII clock period
172 * in microseconds. (was 50, but this gives 6.4ms for each MII transaction!)
173 */
174 #define MII_DELAY 1
175
176 #if SMC_DEBUG > 0
177 #define DBG(n, args...) \
178 do { \
179 if (SMC_DEBUG >= (n)) \
180 printk(args); \
181 } while (0)
182
183 #define PRINTK(args...) printk(args)
184 #else
185 #define DBG(n, args...) do { } while(0)
186 #define PRINTK(args...) printk(KERN_DEBUG args)
187 #endif
188
189 #if SMC_DEBUG > 3
190 static void PRINT_PKT(u_char *buf, int length)
191 {
192 int i;
193 int remainder;
194 int lines;
195
196 lines = length / 16;
197 remainder = length % 16;
198
199 for (i = 0; i < lines ; i ++) {
200 int cur;
201 for (cur = 0; cur < 8; cur++) {
202 u_char a, b;
203 a = *buf++;
204 b = *buf++;
205 printk("%02x%02x ", a, b);
206 }
207 printk("\n");
208 }
209 for (i = 0; i < remainder/2 ; i++) {
210 u_char a, b;
211 a = *buf++;
212 b = *buf++;
213 printk("%02x%02x ", a, b);
214 }
215 printk("\n");
216 }
217 #else
218 #define PRINT_PKT(x...) do { } while(0)
219 #endif
220
221
222 /* this enables an interrupt in the interrupt mask register */
223 #define SMC_ENABLE_INT(x) do { \
224 unsigned char mask; \
225 spin_lock_irq(&lp->lock); \
226 mask = SMC_GET_INT_MASK(); \
227 mask |= (x); \
228 SMC_SET_INT_MASK(mask); \
229 spin_unlock_irq(&lp->lock); \
230 } while (0)
231
232 /* this disables an interrupt from the interrupt mask register */
233 #define SMC_DISABLE_INT(x) do { \
234 unsigned char mask; \
235 spin_lock_irq(&lp->lock); \
236 mask = SMC_GET_INT_MASK(); \
237 mask &= ~(x); \
238 SMC_SET_INT_MASK(mask); \
239 spin_unlock_irq(&lp->lock); \
240 } while (0)
241
242 /*
243 * Wait while MMU is busy. This is usually in the order of a few nanosecs
244 * if at all, but let's avoid deadlocking the system if the hardware
245 * decides to go south.
246 */
247 #define SMC_WAIT_MMU_BUSY() do { \
248 if (unlikely(SMC_GET_MMU_CMD() & MC_BUSY)) { \
249 unsigned long timeout = jiffies + 2; \
250 while (SMC_GET_MMU_CMD() & MC_BUSY) { \
251 if (time_after(jiffies, timeout)) { \
252 printk("%s: timeout %s line %d\n", \
253 dev->name, __FILE__, __LINE__); \
254 break; \
255 } \
256 cpu_relax(); \
257 } \
258 } \
259 } while (0)
260
261
262 /*
263 * this does a soft reset on the device
264 */
265 static void smc_reset(struct net_device *dev)
266 {
267 struct smc_local *lp = netdev_priv(dev);
268 void __iomem *ioaddr = lp->base;
269 unsigned int ctl, cfg;
270 struct sk_buff *pending_skb;
271
272 DBG(2, "%s: %s\n", dev->name, __FUNCTION__);
273
274 /* Disable all interrupts, block TX tasklet */
275 spin_lock_irq(&lp->lock);
276 SMC_SELECT_BANK(2);
277 SMC_SET_INT_MASK(0);
278 pending_skb = lp->pending_tx_skb;
279 lp->pending_tx_skb = NULL;
280 spin_unlock_irq(&lp->lock);
281
282 /* free any pending tx skb */
283 if (pending_skb) {
284 dev_kfree_skb(pending_skb);
285 dev->stats.tx_errors++;
286 dev->stats.tx_aborted_errors++;
287 }
288
289 /*
290 * This resets the registers mostly to defaults, but doesn't
291 * affect EEPROM. That seems unnecessary
292 */
293 SMC_SELECT_BANK(0);
294 SMC_SET_RCR(RCR_SOFTRST);
295
296 /*
297 * Setup the Configuration Register
298 * This is necessary because the CONFIG_REG is not affected
299 * by a soft reset
300 */
301 SMC_SELECT_BANK(1);
302
303 cfg = CONFIG_DEFAULT;
304
305 /*
306 * Setup for fast accesses if requested. If the card/system
307 * can't handle it then there will be no recovery except for
308 * a hard reset or power cycle
309 */
310 if (nowait)
311 cfg |= CONFIG_NO_WAIT;
312
313 /*
314 * Release from possible power-down state
315 * Configuration register is not affected by Soft Reset
316 */
317 cfg |= CONFIG_EPH_POWER_EN;
318
319 SMC_SET_CONFIG(cfg);
320
321 /* this should pause enough for the chip to be happy */
322 /*
323 * elaborate? What does the chip _need_? --jgarzik
324 *
325 * This seems to be undocumented, but something the original
326 * driver(s) have always done. Suspect undocumented timing
327 * info/determined empirically. --rmk
328 */
329 udelay(1);
330
331 /* Disable transmit and receive functionality */
332 SMC_SELECT_BANK(0);
333 SMC_SET_RCR(RCR_CLEAR);
334 SMC_SET_TCR(TCR_CLEAR);
335
336 SMC_SELECT_BANK(1);
337 ctl = SMC_GET_CTL() | CTL_LE_ENABLE;
338
339 /*
340 * Set the control register to automatically release successfully
341 * transmitted packets, to make the best use out of our limited
342 * memory
343 */
344 if(!THROTTLE_TX_PKTS)
345 ctl |= CTL_AUTO_RELEASE;
346 else
347 ctl &= ~CTL_AUTO_RELEASE;
348 SMC_SET_CTL(ctl);
349
350 /* Reset the MMU */
351 SMC_SELECT_BANK(2);
352 SMC_SET_MMU_CMD(MC_RESET);
353 SMC_WAIT_MMU_BUSY();
354 }
355
356 /*
357 * Enable Interrupts, Receive, and Transmit
358 */
359 static void smc_enable(struct net_device *dev)
360 {
361 struct smc_local *lp = netdev_priv(dev);
362 void __iomem *ioaddr = lp->base;
363 int mask;
364
365 DBG(2, "%s: %s\n", dev->name, __FUNCTION__);
366
367 /* see the header file for options in TCR/RCR DEFAULT */
368 SMC_SELECT_BANK(0);
369 SMC_SET_TCR(lp->tcr_cur_mode);
370 SMC_SET_RCR(lp->rcr_cur_mode);
371
372 SMC_SELECT_BANK(1);
373 SMC_SET_MAC_ADDR(dev->dev_addr);
374
375 /* now, enable interrupts */
376 mask = IM_EPH_INT|IM_RX_OVRN_INT|IM_RCV_INT;
377 if (lp->version >= (CHIP_91100 << 4))
378 mask |= IM_MDINT;
379 SMC_SELECT_BANK(2);
380 SMC_SET_INT_MASK(mask);
381
382 /*
383 * From this point the register bank must _NOT_ be switched away
384 * to something else than bank 2 without proper locking against
385 * races with any tasklet or interrupt handlers until smc_shutdown()
386 * or smc_reset() is called.
387 */
388 }
389
390 /*
391 * this puts the device in an inactive state
392 */
393 static void smc_shutdown(struct net_device *dev)
394 {
395 struct smc_local *lp = netdev_priv(dev);
396 void __iomem *ioaddr = lp->base;
397 struct sk_buff *pending_skb;
398
399 DBG(2, "%s: %s\n", CARDNAME, __FUNCTION__);
400
401 /* no more interrupts for me */
402 spin_lock_irq(&lp->lock);
403 SMC_SELECT_BANK(2);
404 SMC_SET_INT_MASK(0);
405 pending_skb = lp->pending_tx_skb;
406 lp->pending_tx_skb = NULL;
407 spin_unlock_irq(&lp->lock);
408 if (pending_skb)
409 dev_kfree_skb(pending_skb);
410
411 /* and tell the card to stay away from that nasty outside world */
412 SMC_SELECT_BANK(0);
413 SMC_SET_RCR(RCR_CLEAR);
414 SMC_SET_TCR(TCR_CLEAR);
415
416 #ifdef POWER_DOWN
417 /* finally, shut the chip down */
418 SMC_SELECT_BANK(1);
419 SMC_SET_CONFIG(SMC_GET_CONFIG() & ~CONFIG_EPH_POWER_EN);
420 #endif
421 }
422
423 /*
424 * This is the procedure to handle the receipt of a packet.
425 */
426 static inline void smc_rcv(struct net_device *dev)
427 {
428 struct smc_local *lp = netdev_priv(dev);
429 void __iomem *ioaddr = lp->base;
430 unsigned int packet_number, status, packet_len;
431
432 DBG(3, "%s: %s\n", dev->name, __FUNCTION__);
433
434 packet_number = SMC_GET_RXFIFO();
435 if (unlikely(packet_number & RXFIFO_REMPTY)) {
436 PRINTK("%s: smc_rcv with nothing on FIFO.\n", dev->name);
437 return;
438 }
439
440 /* read from start of packet */
441 SMC_SET_PTR(PTR_READ | PTR_RCV | PTR_AUTOINC);
442
443 /* First two words are status and packet length */
444 SMC_GET_PKT_HDR(status, packet_len);
445 packet_len &= 0x07ff; /* mask off top bits */
446 DBG(2, "%s: RX PNR 0x%x STATUS 0x%04x LENGTH 0x%04x (%d)\n",
447 dev->name, packet_number, status,
448 packet_len, packet_len);
449
450 back:
451 if (unlikely(packet_len < 6 || status & RS_ERRORS)) {
452 if (status & RS_TOOLONG && packet_len <= (1514 + 4 + 6)) {
453 /* accept VLAN packets */
454 status &= ~RS_TOOLONG;
455 goto back;
456 }
457 if (packet_len < 6) {
458 /* bloody hardware */
459 printk(KERN_ERR "%s: fubar (rxlen %u status %x\n",
460 dev->name, packet_len, status);
461 status |= RS_TOOSHORT;
462 }
463 SMC_WAIT_MMU_BUSY();
464 SMC_SET_MMU_CMD(MC_RELEASE);
465 dev->stats.rx_errors++;
466 if (status & RS_ALGNERR)
467 dev->stats.rx_frame_errors++;
468 if (status & (RS_TOOSHORT | RS_TOOLONG))
469 dev->stats.rx_length_errors++;
470 if (status & RS_BADCRC)
471 dev->stats.rx_crc_errors++;
472 } else {
473 struct sk_buff *skb;
474 unsigned char *data;
475 unsigned int data_len;
476
477 /* set multicast stats */
478 if (status & RS_MULTICAST)
479 dev->stats.multicast++;
480
481 /*
482 * Actual payload is packet_len - 6 (or 5 if odd byte).
483 * We want skb_reserve(2) and the final ctrl word
484 * (2 bytes, possibly containing the payload odd byte).
485 * Furthermore, we add 2 bytes to allow rounding up to
486 * multiple of 4 bytes on 32 bit buses.
487 * Hence packet_len - 6 + 2 + 2 + 2.
488 */
489 skb = dev_alloc_skb(packet_len);
490 if (unlikely(skb == NULL)) {
491 printk(KERN_NOTICE "%s: Low memory, packet dropped.\n",
492 dev->name);
493 SMC_WAIT_MMU_BUSY();
494 SMC_SET_MMU_CMD(MC_RELEASE);
495 dev->stats.rx_dropped++;
496 return;
497 }
498
499 /* Align IP header to 32 bits */
500 skb_reserve(skb, 2);
501
502 /* BUG: the LAN91C111 rev A never sets this bit. Force it. */
503 if (lp->version == 0x90)
504 status |= RS_ODDFRAME;
505
506 /*
507 * If odd length: packet_len - 5,
508 * otherwise packet_len - 6.
509 * With the trailing ctrl byte it's packet_len - 4.
510 */
511 data_len = packet_len - ((status & RS_ODDFRAME) ? 5 : 6);
512 data = skb_put(skb, data_len);
513 SMC_PULL_DATA(data, packet_len - 4);
514
515 SMC_WAIT_MMU_BUSY();
516 SMC_SET_MMU_CMD(MC_RELEASE);
517
518 PRINT_PKT(data, packet_len - 4);
519
520 dev->last_rx = jiffies;
521 skb->protocol = eth_type_trans(skb, dev);
522 netif_rx(skb);
523 dev->stats.rx_packets++;
524 dev->stats.rx_bytes += data_len;
525 }
526 }
527
528 #ifdef CONFIG_SMP
529 /*
530 * On SMP we have the following problem:
531 *
532 * A = smc_hardware_send_pkt()
533 * B = smc_hard_start_xmit()
534 * C = smc_interrupt()
535 *
536 * A and B can never be executed simultaneously. However, at least on UP,
537 * it is possible (and even desirable) for C to interrupt execution of
538 * A or B in order to have better RX reliability and avoid overruns.
539 * C, just like A and B, must have exclusive access to the chip and
540 * each of them must lock against any other concurrent access.
541 * Unfortunately this is not possible to have C suspend execution of A or
542 * B taking place on another CPU. On UP this is no an issue since A and B
543 * are run from softirq context and C from hard IRQ context, and there is
544 * no other CPU where concurrent access can happen.
545 * If ever there is a way to force at least B and C to always be executed
546 * on the same CPU then we could use read/write locks to protect against
547 * any other concurrent access and C would always interrupt B. But life
548 * isn't that easy in a SMP world...
549 */
550 #define smc_special_trylock(lock) \
551 ({ \
552 int __ret; \
553 local_irq_disable(); \
554 __ret = spin_trylock(lock); \
555 if (!__ret) \
556 local_irq_enable(); \
557 __ret; \
558 })
559 #define smc_special_lock(lock) spin_lock_irq(lock)
560 #define smc_special_unlock(lock) spin_unlock_irq(lock)
561 #else
562 #define smc_special_trylock(lock) (1)
563 #define smc_special_lock(lock) do { } while (0)
564 #define smc_special_unlock(lock) do { } while (0)
565 #endif
566
567 /*
568 * This is called to actually send a packet to the chip.
569 */
570 static void smc_hardware_send_pkt(unsigned long data)
571 {
572 struct net_device *dev = (struct net_device *)data;
573 struct smc_local *lp = netdev_priv(dev);
574 void __iomem *ioaddr = lp->base;
575 struct sk_buff *skb;
576 unsigned int packet_no, len;
577 unsigned char *buf;
578
579 DBG(3, "%s: %s\n", dev->name, __FUNCTION__);
580
581 if (!smc_special_trylock(&lp->lock)) {
582 netif_stop_queue(dev);
583 tasklet_schedule(&lp->tx_task);
584 return;
585 }
586
587 skb = lp->pending_tx_skb;
588 if (unlikely(!skb)) {
589 smc_special_unlock(&lp->lock);
590 return;
591 }
592 lp->pending_tx_skb = NULL;
593
594 packet_no = SMC_GET_AR();
595 if (unlikely(packet_no & AR_FAILED)) {
596 printk("%s: Memory allocation failed.\n", dev->name);
597 dev->stats.tx_errors++;
598 dev->stats.tx_fifo_errors++;
599 smc_special_unlock(&lp->lock);
600 goto done;
601 }
602
603 /* point to the beginning of the packet */
604 SMC_SET_PN(packet_no);
605 SMC_SET_PTR(PTR_AUTOINC);
606
607 buf = skb->data;
608 len = skb->len;
609 DBG(2, "%s: TX PNR 0x%x LENGTH 0x%04x (%d) BUF 0x%p\n",
610 dev->name, packet_no, len, len, buf);
611 PRINT_PKT(buf, len);
612
613 /*
614 * Send the packet length (+6 for status words, length, and ctl.
615 * The card will pad to 64 bytes with zeroes if packet is too small.
616 */
617 SMC_PUT_PKT_HDR(0, len + 6);
618
619 /* send the actual data */
620 SMC_PUSH_DATA(buf, len & ~1);
621
622 /* Send final ctl word with the last byte if there is one */
623 SMC_outw(((len & 1) ? (0x2000 | buf[len-1]) : 0), ioaddr, DATA_REG);
624
625 /*
626 * If THROTTLE_TX_PKTS is set, we stop the queue here. This will
627 * have the effect of having at most one packet queued for TX
628 * in the chip's memory at all time.
629 *
630 * If THROTTLE_TX_PKTS is not set then the queue is stopped only
631 * when memory allocation (MC_ALLOC) does not succeed right away.
632 */
633 if (THROTTLE_TX_PKTS)
634 netif_stop_queue(dev);
635
636 /* queue the packet for TX */
637 SMC_SET_MMU_CMD(MC_ENQUEUE);
638 smc_special_unlock(&lp->lock);
639
640 dev->trans_start = jiffies;
641 dev->stats.tx_packets++;
642 dev->stats.tx_bytes += len;
643
644 SMC_ENABLE_INT(IM_TX_INT | IM_TX_EMPTY_INT);
645
646 done: if (!THROTTLE_TX_PKTS)
647 netif_wake_queue(dev);
648
649 dev_kfree_skb(skb);
650 }
651
652 /*
653 * Since I am not sure if I will have enough room in the chip's ram
654 * to store the packet, I call this routine which either sends it
655 * now, or set the card to generates an interrupt when ready
656 * for the packet.
657 */
658 static int smc_hard_start_xmit(struct sk_buff *skb, struct net_device *dev)
659 {
660 struct smc_local *lp = netdev_priv(dev);
661 void __iomem *ioaddr = lp->base;
662 unsigned int numPages, poll_count, status;
663
664 DBG(3, "%s: %s\n", dev->name, __FUNCTION__);
665
666 BUG_ON(lp->pending_tx_skb != NULL);
667
668 /*
669 * The MMU wants the number of pages to be the number of 256 bytes
670 * 'pages', minus 1 (since a packet can't ever have 0 pages :))
671 *
672 * The 91C111 ignores the size bits, but earlier models don't.
673 *
674 * Pkt size for allocating is data length +6 (for additional status
675 * words, length and ctl)
676 *
677 * If odd size then last byte is included in ctl word.
678 */
679 numPages = ((skb->len & ~1) + (6 - 1)) >> 8;
680 if (unlikely(numPages > 7)) {
681 printk("%s: Far too big packet error.\n", dev->name);
682 dev->stats.tx_errors++;
683 dev->stats.tx_dropped++;
684 dev_kfree_skb(skb);
685 return 0;
686 }
687
688 smc_special_lock(&lp->lock);
689
690 /* now, try to allocate the memory */
691 SMC_SET_MMU_CMD(MC_ALLOC | numPages);
692
693 /*
694 * Poll the chip for a short amount of time in case the
695 * allocation succeeds quickly.
696 */
697 poll_count = MEMORY_WAIT_TIME;
698 do {
699 status = SMC_GET_INT();
700 if (status & IM_ALLOC_INT) {
701 SMC_ACK_INT(IM_ALLOC_INT);
702 break;
703 }
704 } while (--poll_count);
705
706 smc_special_unlock(&lp->lock);
707
708 lp->pending_tx_skb = skb;
709 if (!poll_count) {
710 /* oh well, wait until the chip finds memory later */
711 netif_stop_queue(dev);
712 DBG(2, "%s: TX memory allocation deferred.\n", dev->name);
713 SMC_ENABLE_INT(IM_ALLOC_INT);
714 } else {
715 /*
716 * Allocation succeeded: push packet to the chip's own memory
717 * immediately.
718 */
719 smc_hardware_send_pkt((unsigned long)dev);
720 }
721
722 return 0;
723 }
724
725 /*
726 * This handles a TX interrupt, which is only called when:
727 * - a TX error occurred, or
728 * - CTL_AUTO_RELEASE is not set and TX of a packet completed.
729 */
730 static void smc_tx(struct net_device *dev)
731 {
732 struct smc_local *lp = netdev_priv(dev);
733 void __iomem *ioaddr = lp->base;
734 unsigned int saved_packet, packet_no, tx_status, pkt_len;
735
736 DBG(3, "%s: %s\n", dev->name, __FUNCTION__);
737
738 /* If the TX FIFO is empty then nothing to do */
739 packet_no = SMC_GET_TXFIFO();
740 if (unlikely(packet_no & TXFIFO_TEMPTY)) {
741 PRINTK("%s: smc_tx with nothing on FIFO.\n", dev->name);
742 return;
743 }
744
745 /* select packet to read from */
746 saved_packet = SMC_GET_PN();
747 SMC_SET_PN(packet_no);
748
749 /* read the first word (status word) from this packet */
750 SMC_SET_PTR(PTR_AUTOINC | PTR_READ);
751 SMC_GET_PKT_HDR(tx_status, pkt_len);
752 DBG(2, "%s: TX STATUS 0x%04x PNR 0x%02x\n",
753 dev->name, tx_status, packet_no);
754
755 if (!(tx_status & ES_TX_SUC))
756 dev->stats.tx_errors++;
757
758 if (tx_status & ES_LOSTCARR)
759 dev->stats.tx_carrier_errors++;
760
761 if (tx_status & (ES_LATCOL | ES_16COL)) {
762 PRINTK("%s: %s occurred on last xmit\n", dev->name,
763 (tx_status & ES_LATCOL) ?
764 "late collision" : "too many collisions");
765 dev->stats.tx_window_errors++;
766 if (!(dev->stats.tx_window_errors & 63) && net_ratelimit()) {
767 printk(KERN_INFO "%s: unexpectedly large number of "
768 "bad collisions. Please check duplex "
769 "setting.\n", dev->name);
770 }
771 }
772
773 /* kill the packet */
774 SMC_WAIT_MMU_BUSY();
775 SMC_SET_MMU_CMD(MC_FREEPKT);
776
777 /* Don't restore Packet Number Reg until busy bit is cleared */
778 SMC_WAIT_MMU_BUSY();
779 SMC_SET_PN(saved_packet);
780
781 /* re-enable transmit */
782 SMC_SELECT_BANK(0);
783 SMC_SET_TCR(lp->tcr_cur_mode);
784 SMC_SELECT_BANK(2);
785 }
786
787
788 /*---PHY CONTROL AND CONFIGURATION-----------------------------------------*/
789
790 static void smc_mii_out(struct net_device *dev, unsigned int val, int bits)
791 {
792 struct smc_local *lp = netdev_priv(dev);
793 void __iomem *ioaddr = lp->base;
794 unsigned int mii_reg, mask;
795
796 mii_reg = SMC_GET_MII() & ~(MII_MCLK | MII_MDOE | MII_MDO);
797 mii_reg |= MII_MDOE;
798
799 for (mask = 1 << (bits - 1); mask; mask >>= 1) {
800 if (val & mask)
801 mii_reg |= MII_MDO;
802 else
803 mii_reg &= ~MII_MDO;
804
805 SMC_SET_MII(mii_reg);
806 udelay(MII_DELAY);
807 SMC_SET_MII(mii_reg | MII_MCLK);
808 udelay(MII_DELAY);
809 }
810 }
811
812 static unsigned int smc_mii_in(struct net_device *dev, int bits)
813 {
814 struct smc_local *lp = netdev_priv(dev);
815 void __iomem *ioaddr = lp->base;
816 unsigned int mii_reg, mask, val;
817
818 mii_reg = SMC_GET_MII() & ~(MII_MCLK | MII_MDOE | MII_MDO);
819 SMC_SET_MII(mii_reg);
820
821 for (mask = 1 << (bits - 1), val = 0; mask; mask >>= 1) {
822 if (SMC_GET_MII() & MII_MDI)
823 val |= mask;
824
825 SMC_SET_MII(mii_reg);
826 udelay(MII_DELAY);
827 SMC_SET_MII(mii_reg | MII_MCLK);
828 udelay(MII_DELAY);
829 }
830
831 return val;
832 }
833
834 /*
835 * Reads a register from the MII Management serial interface
836 */
837 static int smc_phy_read(struct net_device *dev, int phyaddr, int phyreg)
838 {
839 struct smc_local *lp = netdev_priv(dev);
840 void __iomem *ioaddr = lp->base;
841 unsigned int phydata;
842
843 SMC_SELECT_BANK(3);
844
845 /* Idle - 32 ones */
846 smc_mii_out(dev, 0xffffffff, 32);
847
848 /* Start code (01) + read (10) + phyaddr + phyreg */
849 smc_mii_out(dev, 6 << 10 | phyaddr << 5 | phyreg, 14);
850
851 /* Turnaround (2bits) + phydata */
852 phydata = smc_mii_in(dev, 18);
853
854 /* Return to idle state */
855 SMC_SET_MII(SMC_GET_MII() & ~(MII_MCLK|MII_MDOE|MII_MDO));
856
857 DBG(3, "%s: phyaddr=0x%x, phyreg=0x%x, phydata=0x%x\n",
858 __FUNCTION__, phyaddr, phyreg, phydata);
859
860 SMC_SELECT_BANK(2);
861 return phydata;
862 }
863
864 /*
865 * Writes a register to the MII Management serial interface
866 */
867 static void smc_phy_write(struct net_device *dev, int phyaddr, int phyreg,
868 int phydata)
869 {
870 struct smc_local *lp = netdev_priv(dev);
871 void __iomem *ioaddr = lp->base;
872
873 SMC_SELECT_BANK(3);
874
875 /* Idle - 32 ones */
876 smc_mii_out(dev, 0xffffffff, 32);
877
878 /* Start code (01) + write (01) + phyaddr + phyreg + turnaround + phydata */
879 smc_mii_out(dev, 5 << 28 | phyaddr << 23 | phyreg << 18 | 2 << 16 | phydata, 32);
880
881 /* Return to idle state */
882 SMC_SET_MII(SMC_GET_MII() & ~(MII_MCLK|MII_MDOE|MII_MDO));
883
884 DBG(3, "%s: phyaddr=0x%x, phyreg=0x%x, phydata=0x%x\n",
885 __FUNCTION__, phyaddr, phyreg, phydata);
886
887 SMC_SELECT_BANK(2);
888 }
889
890 /*
891 * Finds and reports the PHY address
892 */
893 static void smc_phy_detect(struct net_device *dev)
894 {
895 struct smc_local *lp = netdev_priv(dev);
896 int phyaddr;
897
898 DBG(2, "%s: %s\n", dev->name, __FUNCTION__);
899
900 lp->phy_type = 0;
901
902 /*
903 * Scan all 32 PHY addresses if necessary, starting at
904 * PHY#1 to PHY#31, and then PHY#0 last.
905 */
906 for (phyaddr = 1; phyaddr < 33; ++phyaddr) {
907 unsigned int id1, id2;
908
909 /* Read the PHY identifiers */
910 id1 = smc_phy_read(dev, phyaddr & 31, MII_PHYSID1);
911 id2 = smc_phy_read(dev, phyaddr & 31, MII_PHYSID2);
912
913 DBG(3, "%s: phy_id1=0x%x, phy_id2=0x%x\n",
914 dev->name, id1, id2);
915
916 /* Make sure it is a valid identifier */
917 if (id1 != 0x0000 && id1 != 0xffff && id1 != 0x8000 &&
918 id2 != 0x0000 && id2 != 0xffff && id2 != 0x8000) {
919 /* Save the PHY's address */
920 lp->mii.phy_id = phyaddr & 31;
921 lp->phy_type = id1 << 16 | id2;
922 break;
923 }
924 }
925 }
926
927 /*
928 * Sets the PHY to a configuration as determined by the user
929 */
930 static int smc_phy_fixed(struct net_device *dev)
931 {
932 struct smc_local *lp = netdev_priv(dev);
933 void __iomem *ioaddr = lp->base;
934 int phyaddr = lp->mii.phy_id;
935 int bmcr, cfg1;
936
937 DBG(3, "%s: %s\n", dev->name, __FUNCTION__);
938
939 /* Enter Link Disable state */
940 cfg1 = smc_phy_read(dev, phyaddr, PHY_CFG1_REG);
941 cfg1 |= PHY_CFG1_LNKDIS;
942 smc_phy_write(dev, phyaddr, PHY_CFG1_REG, cfg1);
943
944 /*
945 * Set our fixed capabilities
946 * Disable auto-negotiation
947 */
948 bmcr = 0;
949
950 if (lp->ctl_rfduplx)
951 bmcr |= BMCR_FULLDPLX;
952
953 if (lp->ctl_rspeed == 100)
954 bmcr |= BMCR_SPEED100;
955
956 /* Write our capabilities to the phy control register */
957 smc_phy_write(dev, phyaddr, MII_BMCR, bmcr);
958
959 /* Re-Configure the Receive/Phy Control register */
960 SMC_SELECT_BANK(0);
961 SMC_SET_RPC(lp->rpc_cur_mode);
962 SMC_SELECT_BANK(2);
963
964 return 1;
965 }
966
967 /*
968 * smc_phy_reset - reset the phy
969 * @dev: net device
970 * @phy: phy address
971 *
972 * Issue a software reset for the specified PHY and
973 * wait up to 100ms for the reset to complete. We should
974 * not access the PHY for 50ms after issuing the reset.
975 *
976 * The time to wait appears to be dependent on the PHY.
977 *
978 * Must be called with lp->lock locked.
979 */
980 static int smc_phy_reset(struct net_device *dev, int phy)
981 {
982 struct smc_local *lp = netdev_priv(dev);
983 unsigned int bmcr;
984 int timeout;
985
986 smc_phy_write(dev, phy, MII_BMCR, BMCR_RESET);
987
988 for (timeout = 2; timeout; timeout--) {
989 spin_unlock_irq(&lp->lock);
990 msleep(50);
991 spin_lock_irq(&lp->lock);
992
993 bmcr = smc_phy_read(dev, phy, MII_BMCR);
994 if (!(bmcr & BMCR_RESET))
995 break;
996 }
997
998 return bmcr & BMCR_RESET;
999 }
1000
1001 /*
1002 * smc_phy_powerdown - powerdown phy
1003 * @dev: net device
1004 *
1005 * Power down the specified PHY
1006 */
1007 static void smc_phy_powerdown(struct net_device *dev)
1008 {
1009 struct smc_local *lp = netdev_priv(dev);
1010 unsigned int bmcr;
1011 int phy = lp->mii.phy_id;
1012
1013 if (lp->phy_type == 0)
1014 return;
1015
1016 /* We need to ensure that no calls to smc_phy_configure are
1017 pending.
1018
1019 flush_scheduled_work() cannot be called because we are
1020 running with the netlink semaphore held (from
1021 devinet_ioctl()) and the pending work queue contains
1022 linkwatch_event() (scheduled by netif_carrier_off()
1023 above). linkwatch_event() also wants the netlink semaphore.
1024 */
1025 while(lp->work_pending)
1026 yield();
1027
1028 bmcr = smc_phy_read(dev, phy, MII_BMCR);
1029 smc_phy_write(dev, phy, MII_BMCR, bmcr | BMCR_PDOWN);
1030 }
1031
1032 /*
1033 * smc_phy_check_media - check the media status and adjust TCR
1034 * @dev: net device
1035 * @init: set true for initialisation
1036 *
1037 * Select duplex mode depending on negotiation state. This
1038 * also updates our carrier state.
1039 */
1040 static void smc_phy_check_media(struct net_device *dev, int init)
1041 {
1042 struct smc_local *lp = netdev_priv(dev);
1043 void __iomem *ioaddr = lp->base;
1044
1045 if (mii_check_media(&lp->mii, netif_msg_link(lp), init)) {
1046 /* duplex state has changed */
1047 if (lp->mii.full_duplex) {
1048 lp->tcr_cur_mode |= TCR_SWFDUP;
1049 } else {
1050 lp->tcr_cur_mode &= ~TCR_SWFDUP;
1051 }
1052
1053 SMC_SELECT_BANK(0);
1054 SMC_SET_TCR(lp->tcr_cur_mode);
1055 }
1056 }
1057
1058 /*
1059 * Configures the specified PHY through the MII management interface
1060 * using Autonegotiation.
1061 * Calls smc_phy_fixed() if the user has requested a certain config.
1062 * If RPC ANEG bit is set, the media selection is dependent purely on
1063 * the selection by the MII (either in the MII BMCR reg or the result
1064 * of autonegotiation.) If the RPC ANEG bit is cleared, the selection
1065 * is controlled by the RPC SPEED and RPC DPLX bits.
1066 */
1067 static void smc_phy_configure(struct work_struct *work)
1068 {
1069 struct smc_local *lp =
1070 container_of(work, struct smc_local, phy_configure);
1071 struct net_device *dev = lp->dev;
1072 void __iomem *ioaddr = lp->base;
1073 int phyaddr = lp->mii.phy_id;
1074 int my_phy_caps; /* My PHY capabilities */
1075 int my_ad_caps; /* My Advertised capabilities */
1076 int status;
1077
1078 DBG(3, "%s:smc_program_phy()\n", dev->name);
1079
1080 spin_lock_irq(&lp->lock);
1081
1082 /*
1083 * We should not be called if phy_type is zero.
1084 */
1085 if (lp->phy_type == 0)
1086 goto smc_phy_configure_exit;
1087
1088 if (smc_phy_reset(dev, phyaddr)) {
1089 printk("%s: PHY reset timed out\n", dev->name);
1090 goto smc_phy_configure_exit;
1091 }
1092
1093 /*
1094 * Enable PHY Interrupts (for register 18)
1095 * Interrupts listed here are disabled
1096 */
1097 smc_phy_write(dev, phyaddr, PHY_MASK_REG,
1098 PHY_INT_LOSSSYNC | PHY_INT_CWRD | PHY_INT_SSD |
1099 PHY_INT_ESD | PHY_INT_RPOL | PHY_INT_JAB |
1100 PHY_INT_SPDDET | PHY_INT_DPLXDET);
1101
1102 /* Configure the Receive/Phy Control register */
1103 SMC_SELECT_BANK(0);
1104 SMC_SET_RPC(lp->rpc_cur_mode);
1105
1106 /* If the user requested no auto neg, then go set his request */
1107 if (lp->mii.force_media) {
1108 smc_phy_fixed(dev);
1109 goto smc_phy_configure_exit;
1110 }
1111
1112 /* Copy our capabilities from MII_BMSR to MII_ADVERTISE */
1113 my_phy_caps = smc_phy_read(dev, phyaddr, MII_BMSR);
1114
1115 if (!(my_phy_caps & BMSR_ANEGCAPABLE)) {
1116 printk(KERN_INFO "Auto negotiation NOT supported\n");
1117 smc_phy_fixed(dev);
1118 goto smc_phy_configure_exit;
1119 }
1120
1121 my_ad_caps = ADVERTISE_CSMA; /* I am CSMA capable */
1122
1123 if (my_phy_caps & BMSR_100BASE4)
1124 my_ad_caps |= ADVERTISE_100BASE4;
1125 if (my_phy_caps & BMSR_100FULL)
1126 my_ad_caps |= ADVERTISE_100FULL;
1127 if (my_phy_caps & BMSR_100HALF)
1128 my_ad_caps |= ADVERTISE_100HALF;
1129 if (my_phy_caps & BMSR_10FULL)
1130 my_ad_caps |= ADVERTISE_10FULL;
1131 if (my_phy_caps & BMSR_10HALF)
1132 my_ad_caps |= ADVERTISE_10HALF;
1133
1134 /* Disable capabilities not selected by our user */
1135 if (lp->ctl_rspeed != 100)
1136 my_ad_caps &= ~(ADVERTISE_100BASE4|ADVERTISE_100FULL|ADVERTISE_100HALF);
1137
1138 if (!lp->ctl_rfduplx)
1139 my_ad_caps &= ~(ADVERTISE_100FULL|ADVERTISE_10FULL);
1140
1141 /* Update our Auto-Neg Advertisement Register */
1142 smc_phy_write(dev, phyaddr, MII_ADVERTISE, my_ad_caps);
1143 lp->mii.advertising = my_ad_caps;
1144
1145 /*
1146 * Read the register back. Without this, it appears that when
1147 * auto-negotiation is restarted, sometimes it isn't ready and
1148 * the link does not come up.
1149 */
1150 status = smc_phy_read(dev, phyaddr, MII_ADVERTISE);
1151
1152 DBG(2, "%s: phy caps=%x\n", dev->name, my_phy_caps);
1153 DBG(2, "%s: phy advertised caps=%x\n", dev->name, my_ad_caps);
1154
1155 /* Restart auto-negotiation process in order to advertise my caps */
1156 smc_phy_write(dev, phyaddr, MII_BMCR, BMCR_ANENABLE | BMCR_ANRESTART);
1157
1158 smc_phy_check_media(dev, 1);
1159
1160 smc_phy_configure_exit:
1161 SMC_SELECT_BANK(2);
1162 spin_unlock_irq(&lp->lock);
1163 lp->work_pending = 0;
1164 }
1165
1166 /*
1167 * smc_phy_interrupt
1168 *
1169 * Purpose: Handle interrupts relating to PHY register 18. This is
1170 * called from the "hard" interrupt handler under our private spinlock.
1171 */
1172 static void smc_phy_interrupt(struct net_device *dev)
1173 {
1174 struct smc_local *lp = netdev_priv(dev);
1175 int phyaddr = lp->mii.phy_id;
1176 int phy18;
1177
1178 DBG(2, "%s: %s\n", dev->name, __FUNCTION__);
1179
1180 if (lp->phy_type == 0)
1181 return;
1182
1183 for(;;) {
1184 smc_phy_check_media(dev, 0);
1185
1186 /* Read PHY Register 18, Status Output */
1187 phy18 = smc_phy_read(dev, phyaddr, PHY_INT_REG);
1188 if ((phy18 & PHY_INT_INT) == 0)
1189 break;
1190 }
1191 }
1192
1193 /*--- END PHY CONTROL AND CONFIGURATION-------------------------------------*/
1194
1195 static void smc_10bt_check_media(struct net_device *dev, int init)
1196 {
1197 struct smc_local *lp = netdev_priv(dev);
1198 void __iomem *ioaddr = lp->base;
1199 unsigned int old_carrier, new_carrier;
1200
1201 old_carrier = netif_carrier_ok(dev) ? 1 : 0;
1202
1203 SMC_SELECT_BANK(0);
1204 new_carrier = (SMC_GET_EPH_STATUS() & ES_LINK_OK) ? 1 : 0;
1205 SMC_SELECT_BANK(2);
1206
1207 if (init || (old_carrier != new_carrier)) {
1208 if (!new_carrier) {
1209 netif_carrier_off(dev);
1210 } else {
1211 netif_carrier_on(dev);
1212 }
1213 if (netif_msg_link(lp))
1214 printk(KERN_INFO "%s: link %s\n", dev->name,
1215 new_carrier ? "up" : "down");
1216 }
1217 }
1218
1219 static void smc_eph_interrupt(struct net_device *dev)
1220 {
1221 struct smc_local *lp = netdev_priv(dev);
1222 void __iomem *ioaddr = lp->base;
1223 unsigned int ctl;
1224
1225 smc_10bt_check_media(dev, 0);
1226
1227 SMC_SELECT_BANK(1);
1228 ctl = SMC_GET_CTL();
1229 SMC_SET_CTL(ctl & ~CTL_LE_ENABLE);
1230 SMC_SET_CTL(ctl);
1231 SMC_SELECT_BANK(2);
1232 }
1233
1234 /*
1235 * This is the main routine of the driver, to handle the device when
1236 * it needs some attention.
1237 */
1238 static irqreturn_t smc_interrupt(int irq, void *dev_id)
1239 {
1240 struct net_device *dev = dev_id;
1241 struct smc_local *lp = netdev_priv(dev);
1242 void __iomem *ioaddr = lp->base;
1243 int status, mask, timeout, card_stats;
1244 int saved_pointer;
1245
1246 DBG(3, "%s: %s\n", dev->name, __FUNCTION__);
1247
1248 spin_lock(&lp->lock);
1249
1250 /* A preamble may be used when there is a potential race
1251 * between the interruptible transmit functions and this
1252 * ISR. */
1253 SMC_INTERRUPT_PREAMBLE;
1254
1255 saved_pointer = SMC_GET_PTR();
1256 mask = SMC_GET_INT_MASK();
1257 SMC_SET_INT_MASK(0);
1258
1259 /* set a timeout value, so I don't stay here forever */
1260 timeout = MAX_IRQ_LOOPS;
1261
1262 do {
1263 status = SMC_GET_INT();
1264
1265 DBG(2, "%s: INT 0x%02x MASK 0x%02x MEM 0x%04x FIFO 0x%04x\n",
1266 dev->name, status, mask,
1267 ({ int meminfo; SMC_SELECT_BANK(0);
1268 meminfo = SMC_GET_MIR();
1269 SMC_SELECT_BANK(2); meminfo; }),
1270 SMC_GET_FIFO());
1271
1272 status &= mask;
1273 if (!status)
1274 break;
1275
1276 if (status & IM_TX_INT) {
1277 /* do this before RX as it will free memory quickly */
1278 DBG(3, "%s: TX int\n", dev->name);
1279 smc_tx(dev);
1280 SMC_ACK_INT(IM_TX_INT);
1281 if (THROTTLE_TX_PKTS)
1282 netif_wake_queue(dev);
1283 } else if (status & IM_RCV_INT) {
1284 DBG(3, "%s: RX irq\n", dev->name);
1285 smc_rcv(dev);
1286 } else if (status & IM_ALLOC_INT) {
1287 DBG(3, "%s: Allocation irq\n", dev->name);
1288 tasklet_hi_schedule(&lp->tx_task);
1289 mask &= ~IM_ALLOC_INT;
1290 } else if (status & IM_TX_EMPTY_INT) {
1291 DBG(3, "%s: TX empty\n", dev->name);
1292 mask &= ~IM_TX_EMPTY_INT;
1293
1294 /* update stats */
1295 SMC_SELECT_BANK(0);
1296 card_stats = SMC_GET_COUNTER();
1297 SMC_SELECT_BANK(2);
1298
1299 /* single collisions */
1300 dev->stats.collisions += card_stats & 0xF;
1301 card_stats >>= 4;
1302
1303 /* multiple collisions */
1304 dev->stats.collisions += card_stats & 0xF;
1305 } else if (status & IM_RX_OVRN_INT) {
1306 DBG(1, "%s: RX overrun (EPH_ST 0x%04x)\n", dev->name,
1307 ({ int eph_st; SMC_SELECT_BANK(0);
1308 eph_st = SMC_GET_EPH_STATUS();
1309 SMC_SELECT_BANK(2); eph_st; }) );
1310 SMC_ACK_INT(IM_RX_OVRN_INT);
1311 dev->stats.rx_errors++;
1312 dev->stats.rx_fifo_errors++;
1313 } else if (status & IM_EPH_INT) {
1314 smc_eph_interrupt(dev);
1315 } else if (status & IM_MDINT) {
1316 SMC_ACK_INT(IM_MDINT);
1317 smc_phy_interrupt(dev);
1318 } else if (status & IM_ERCV_INT) {
1319 SMC_ACK_INT(IM_ERCV_INT);
1320 PRINTK("%s: UNSUPPORTED: ERCV INTERRUPT \n", dev->name);
1321 }
1322 } while (--timeout);
1323
1324 /* restore register states */
1325 SMC_SET_PTR(saved_pointer);
1326 SMC_SET_INT_MASK(mask);
1327 spin_unlock(&lp->lock);
1328
1329 if (timeout == MAX_IRQ_LOOPS)
1330 PRINTK("%s: spurious interrupt (mask = 0x%02x)\n",
1331 dev->name, mask);
1332 DBG(3, "%s: Interrupt done (%d loops)\n",
1333 dev->name, MAX_IRQ_LOOPS - timeout);
1334
1335 /*
1336 * We return IRQ_HANDLED unconditionally here even if there was
1337 * nothing to do. There is a possibility that a packet might
1338 * get enqueued into the chip right after TX_EMPTY_INT is raised
1339 * but just before the CPU acknowledges the IRQ.
1340 * Better take an unneeded IRQ in some occasions than complexifying
1341 * the code for all cases.
1342 */
1343 return IRQ_HANDLED;
1344 }
1345
1346 #ifdef CONFIG_NET_POLL_CONTROLLER
1347 /*
1348 * Polling receive - used by netconsole and other diagnostic tools
1349 * to allow network i/o with interrupts disabled.
1350 */
1351 static void smc_poll_controller(struct net_device *dev)
1352 {
1353 disable_irq(dev->irq);
1354 smc_interrupt(dev->irq, dev);
1355 enable_irq(dev->irq);
1356 }
1357 #endif
1358
1359 /* Our watchdog timed out. Called by the networking layer */
1360 static void smc_timeout(struct net_device *dev)
1361 {
1362 struct smc_local *lp = netdev_priv(dev);
1363 void __iomem *ioaddr = lp->base;
1364 int status, mask, eph_st, meminfo, fifo;
1365
1366 DBG(2, "%s: %s\n", dev->name, __FUNCTION__);
1367
1368 spin_lock_irq(&lp->lock);
1369 status = SMC_GET_INT();
1370 mask = SMC_GET_INT_MASK();
1371 fifo = SMC_GET_FIFO();
1372 SMC_SELECT_BANK(0);
1373 eph_st = SMC_GET_EPH_STATUS();
1374 meminfo = SMC_GET_MIR();
1375 SMC_SELECT_BANK(2);
1376 spin_unlock_irq(&lp->lock);
1377 PRINTK( "%s: TX timeout (INT 0x%02x INTMASK 0x%02x "
1378 "MEM 0x%04x FIFO 0x%04x EPH_ST 0x%04x)\n",
1379 dev->name, status, mask, meminfo, fifo, eph_st );
1380
1381 smc_reset(dev);
1382 smc_enable(dev);
1383
1384 /*
1385 * Reconfiguring the PHY doesn't seem like a bad idea here, but
1386 * smc_phy_configure() calls msleep() which calls schedule_timeout()
1387 * which calls schedule(). Hence we use a work queue.
1388 */
1389 if (lp->phy_type != 0) {
1390 if (schedule_work(&lp->phy_configure)) {
1391 lp->work_pending = 1;
1392 }
1393 }
1394
1395 /* We can accept TX packets again */
1396 dev->trans_start = jiffies;
1397 netif_wake_queue(dev);
1398 }
1399
1400 /*
1401 * This routine will, depending on the values passed to it,
1402 * either make it accept multicast packets, go into
1403 * promiscuous mode (for TCPDUMP and cousins) or accept
1404 * a select set of multicast packets
1405 */
1406 static void smc_set_multicast_list(struct net_device *dev)
1407 {
1408 struct smc_local *lp = netdev_priv(dev);
1409 void __iomem *ioaddr = lp->base;
1410 unsigned char multicast_table[8];
1411 int update_multicast = 0;
1412
1413 DBG(2, "%s: %s\n", dev->name, __FUNCTION__);
1414
1415 if (dev->flags & IFF_PROMISC) {
1416 DBG(2, "%s: RCR_PRMS\n", dev->name);
1417 lp->rcr_cur_mode |= RCR_PRMS;
1418 }
1419
1420 /* BUG? I never disable promiscuous mode if multicasting was turned on.
1421 Now, I turn off promiscuous mode, but I don't do anything to multicasting
1422 when promiscuous mode is turned on.
1423 */
1424
1425 /*
1426 * Here, I am setting this to accept all multicast packets.
1427 * I don't need to zero the multicast table, because the flag is
1428 * checked before the table is
1429 */
1430 else if (dev->flags & IFF_ALLMULTI || dev->mc_count > 16) {
1431 DBG(2, "%s: RCR_ALMUL\n", dev->name);
1432 lp->rcr_cur_mode |= RCR_ALMUL;
1433 }
1434
1435 /*
1436 * This sets the internal hardware table to filter out unwanted
1437 * multicast packets before they take up memory.
1438 *
1439 * The SMC chip uses a hash table where the high 6 bits of the CRC of
1440 * address are the offset into the table. If that bit is 1, then the
1441 * multicast packet is accepted. Otherwise, it's dropped silently.
1442 *
1443 * To use the 6 bits as an offset into the table, the high 3 bits are
1444 * the number of the 8 bit register, while the low 3 bits are the bit
1445 * within that register.
1446 */
1447 else if (dev->mc_count) {
1448 int i;
1449 struct dev_mc_list *cur_addr;
1450
1451 /* table for flipping the order of 3 bits */
1452 static const unsigned char invert3[] = {0, 4, 2, 6, 1, 5, 3, 7};
1453
1454 /* start with a table of all zeros: reject all */
1455 memset(multicast_table, 0, sizeof(multicast_table));
1456
1457 cur_addr = dev->mc_list;
1458 for (i = 0; i < dev->mc_count; i++, cur_addr = cur_addr->next) {
1459 int position;
1460
1461 /* do we have a pointer here? */
1462 if (!cur_addr)
1463 break;
1464 /* make sure this is a multicast address -
1465 shouldn't this be a given if we have it here ? */
1466 if (!(*cur_addr->dmi_addr & 1))
1467 continue;
1468
1469 /* only use the low order bits */
1470 position = crc32_le(~0, cur_addr->dmi_addr, 6) & 0x3f;
1471
1472 /* do some messy swapping to put the bit in the right spot */
1473 multicast_table[invert3[position&7]] |=
1474 (1<<invert3[(position>>3)&7]);
1475 }
1476
1477 /* be sure I get rid of flags I might have set */
1478 lp->rcr_cur_mode &= ~(RCR_PRMS | RCR_ALMUL);
1479
1480 /* now, the table can be loaded into the chipset */
1481 update_multicast = 1;
1482 } else {
1483 DBG(2, "%s: ~(RCR_PRMS|RCR_ALMUL)\n", dev->name);
1484 lp->rcr_cur_mode &= ~(RCR_PRMS | RCR_ALMUL);
1485
1486 /*
1487 * since I'm disabling all multicast entirely, I need to
1488 * clear the multicast list
1489 */
1490 memset(multicast_table, 0, sizeof(multicast_table));
1491 update_multicast = 1;
1492 }
1493
1494 spin_lock_irq(&lp->lock);
1495 SMC_SELECT_BANK(0);
1496 SMC_SET_RCR(lp->rcr_cur_mode);
1497 if (update_multicast) {
1498 SMC_SELECT_BANK(3);
1499 SMC_SET_MCAST(multicast_table);
1500 }
1501 SMC_SELECT_BANK(2);
1502 spin_unlock_irq(&lp->lock);
1503 }
1504
1505
1506 /*
1507 * Open and Initialize the board
1508 *
1509 * Set up everything, reset the card, etc..
1510 */
1511 static int
1512 smc_open(struct net_device *dev)
1513 {
1514 struct smc_local *lp = netdev_priv(dev);
1515
1516 DBG(2, "%s: %s\n", dev->name, __FUNCTION__);
1517
1518 /*
1519 * Check that the address is valid. If its not, refuse
1520 * to bring the device up. The user must specify an
1521 * address using ifconfig eth0 hw ether xx:xx:xx:xx:xx:xx
1522 */
1523 if (!is_valid_ether_addr(dev->dev_addr)) {
1524 PRINTK("%s: no valid ethernet hw addr\n", __FUNCTION__);
1525 return -EINVAL;
1526 }
1527
1528 /* Setup the default Register Modes */
1529 lp->tcr_cur_mode = TCR_DEFAULT;
1530 lp->rcr_cur_mode = RCR_DEFAULT;
1531 lp->rpc_cur_mode = RPC_DEFAULT;
1532
1533 /*
1534 * If we are not using a MII interface, we need to
1535 * monitor our own carrier signal to detect faults.
1536 */
1537 if (lp->phy_type == 0)
1538 lp->tcr_cur_mode |= TCR_MON_CSN;
1539
1540 /* reset the hardware */
1541 smc_reset(dev);
1542 smc_enable(dev);
1543
1544 /* Configure the PHY, initialize the link state */
1545 if (lp->phy_type != 0)
1546 smc_phy_configure(&lp->phy_configure);
1547 else {
1548 spin_lock_irq(&lp->lock);
1549 smc_10bt_check_media(dev, 1);
1550 spin_unlock_irq(&lp->lock);
1551 }
1552
1553 netif_start_queue(dev);
1554 return 0;
1555 }
1556
1557 /*
1558 * smc_close
1559 *
1560 * this makes the board clean up everything that it can
1561 * and not talk to the outside world. Caused by
1562 * an 'ifconfig ethX down'
1563 */
1564 static int smc_close(struct net_device *dev)
1565 {
1566 struct smc_local *lp = netdev_priv(dev);
1567
1568 DBG(2, "%s: %s\n", dev->name, __FUNCTION__);
1569
1570 netif_stop_queue(dev);
1571 netif_carrier_off(dev);
1572
1573 /* clear everything */
1574 smc_shutdown(dev);
1575 tasklet_kill(&lp->tx_task);
1576 smc_phy_powerdown(dev);
1577 return 0;
1578 }
1579
1580 /*
1581 * Ethtool support
1582 */
1583 static int
1584 smc_ethtool_getsettings(struct net_device *dev, struct ethtool_cmd *cmd)
1585 {
1586 struct smc_local *lp = netdev_priv(dev);
1587 int ret;
1588
1589 cmd->maxtxpkt = 1;
1590 cmd->maxrxpkt = 1;
1591
1592 if (lp->phy_type != 0) {
1593 spin_lock_irq(&lp->lock);
1594 ret = mii_ethtool_gset(&lp->mii, cmd);
1595 spin_unlock_irq(&lp->lock);
1596 } else {
1597 cmd->supported = SUPPORTED_10baseT_Half |
1598 SUPPORTED_10baseT_Full |
1599 SUPPORTED_TP | SUPPORTED_AUI;
1600
1601 if (lp->ctl_rspeed == 10)
1602 cmd->speed = SPEED_10;
1603 else if (lp->ctl_rspeed == 100)
1604 cmd->speed = SPEED_100;
1605
1606 cmd->autoneg = AUTONEG_DISABLE;
1607 cmd->transceiver = XCVR_INTERNAL;
1608 cmd->port = 0;
1609 cmd->duplex = lp->tcr_cur_mode & TCR_SWFDUP ? DUPLEX_FULL : DUPLEX_HALF;
1610
1611 ret = 0;
1612 }
1613
1614 return ret;
1615 }
1616
1617 static int
1618 smc_ethtool_setsettings(struct net_device *dev, struct ethtool_cmd *cmd)
1619 {
1620 struct smc_local *lp = netdev_priv(dev);
1621 int ret;
1622
1623 if (lp->phy_type != 0) {
1624 spin_lock_irq(&lp->lock);
1625 ret = mii_ethtool_sset(&lp->mii, cmd);
1626 spin_unlock_irq(&lp->lock);
1627 } else {
1628 if (cmd->autoneg != AUTONEG_DISABLE ||
1629 cmd->speed != SPEED_10 ||
1630 (cmd->duplex != DUPLEX_HALF && cmd->duplex != DUPLEX_FULL) ||
1631 (cmd->port != PORT_TP && cmd->port != PORT_AUI))
1632 return -EINVAL;
1633
1634 // lp->port = cmd->port;
1635 lp->ctl_rfduplx = cmd->duplex == DUPLEX_FULL;
1636
1637 // if (netif_running(dev))
1638 // smc_set_port(dev);
1639
1640 ret = 0;
1641 }
1642
1643 return ret;
1644 }
1645
1646 static void
1647 smc_ethtool_getdrvinfo(struct net_device *dev, struct ethtool_drvinfo *info)
1648 {
1649 strncpy(info->driver, CARDNAME, sizeof(info->driver));
1650 strncpy(info->version, version, sizeof(info->version));
1651 strncpy(info->bus_info, dev->dev.parent->bus_id, sizeof(info->bus_info));
1652 }
1653
1654 static int smc_ethtool_nwayreset(struct net_device *dev)
1655 {
1656 struct smc_local *lp = netdev_priv(dev);
1657 int ret = -EINVAL;
1658
1659 if (lp->phy_type != 0) {
1660 spin_lock_irq(&lp->lock);
1661 ret = mii_nway_restart(&lp->mii);
1662 spin_unlock_irq(&lp->lock);
1663 }
1664
1665 return ret;
1666 }
1667
1668 static u32 smc_ethtool_getmsglevel(struct net_device *dev)
1669 {
1670 struct smc_local *lp = netdev_priv(dev);
1671 return lp->msg_enable;
1672 }
1673
1674 static void smc_ethtool_setmsglevel(struct net_device *dev, u32 level)
1675 {
1676 struct smc_local *lp = netdev_priv(dev);
1677 lp->msg_enable = level;
1678 }
1679
1680 static const struct ethtool_ops smc_ethtool_ops = {
1681 .get_settings = smc_ethtool_getsettings,
1682 .set_settings = smc_ethtool_setsettings,
1683 .get_drvinfo = smc_ethtool_getdrvinfo,
1684
1685 .get_msglevel = smc_ethtool_getmsglevel,
1686 .set_msglevel = smc_ethtool_setmsglevel,
1687 .nway_reset = smc_ethtool_nwayreset,
1688 .get_link = ethtool_op_get_link,
1689 // .get_eeprom = smc_ethtool_geteeprom,
1690 // .set_eeprom = smc_ethtool_seteeprom,
1691 };
1692
1693 /*
1694 * smc_findirq
1695 *
1696 * This routine has a simple purpose -- make the SMC chip generate an
1697 * interrupt, so an auto-detect routine can detect it, and find the IRQ,
1698 */
1699 /*
1700 * does this still work?
1701 *
1702 * I just deleted auto_irq.c, since it was never built...
1703 * --jgarzik
1704 */
1705 static int __init smc_findirq(void __iomem *ioaddr)
1706 {
1707 int timeout = 20;
1708 unsigned long cookie;
1709
1710 DBG(2, "%s: %s\n", CARDNAME, __FUNCTION__);
1711
1712 cookie = probe_irq_on();
1713
1714 /*
1715 * What I try to do here is trigger an ALLOC_INT. This is done
1716 * by allocating a small chunk of memory, which will give an interrupt
1717 * when done.
1718 */
1719 /* enable ALLOCation interrupts ONLY */
1720 SMC_SELECT_BANK(2);
1721 SMC_SET_INT_MASK(IM_ALLOC_INT);
1722
1723 /*
1724 * Allocate 512 bytes of memory. Note that the chip was just
1725 * reset so all the memory is available
1726 */
1727 SMC_SET_MMU_CMD(MC_ALLOC | 1);
1728
1729 /*
1730 * Wait until positive that the interrupt has been generated
1731 */
1732 do {
1733 int int_status;
1734 udelay(10);
1735 int_status = SMC_GET_INT();
1736 if (int_status & IM_ALLOC_INT)
1737 break; /* got the interrupt */
1738 } while (--timeout);
1739
1740 /*
1741 * there is really nothing that I can do here if timeout fails,
1742 * as autoirq_report will return a 0 anyway, which is what I
1743 * want in this case. Plus, the clean up is needed in both
1744 * cases.
1745 */
1746
1747 /* and disable all interrupts again */
1748 SMC_SET_INT_MASK(0);
1749
1750 /* and return what I found */
1751 return probe_irq_off(cookie);
1752 }
1753
1754 /*
1755 * Function: smc_probe(unsigned long ioaddr)
1756 *
1757 * Purpose:
1758 * Tests to see if a given ioaddr points to an SMC91x chip.
1759 * Returns a 0 on success
1760 *
1761 * Algorithm:
1762 * (1) see if the high byte of BANK_SELECT is 0x33
1763 * (2) compare the ioaddr with the base register's address
1764 * (3) see if I recognize the chip ID in the appropriate register
1765 *
1766 * Here I do typical initialization tasks.
1767 *
1768 * o Initialize the structure if needed
1769 * o print out my vanity message if not done so already
1770 * o print out what type of hardware is detected
1771 * o print out the ethernet address
1772 * o find the IRQ
1773 * o set up my private data
1774 * o configure the dev structure with my subroutines
1775 * o actually GRAB the irq.
1776 * o GRAB the region
1777 */
1778 static int __init smc_probe(struct net_device *dev, void __iomem *ioaddr,
1779 unsigned long irq_flags)
1780 {
1781 struct smc_local *lp = netdev_priv(dev);
1782 static int version_printed = 0;
1783 int retval;
1784 unsigned int val, revision_register;
1785 const char *version_string;
1786 DECLARE_MAC_BUF(mac);
1787
1788 DBG(2, "%s: %s\n", CARDNAME, __FUNCTION__);
1789
1790 /* First, see if the high byte is 0x33 */
1791 val = SMC_CURRENT_BANK();
1792 DBG(2, "%s: bank signature probe returned 0x%04x\n", CARDNAME, val);
1793 if ((val & 0xFF00) != 0x3300) {
1794 if ((val & 0xFF) == 0x33) {
1795 printk(KERN_WARNING
1796 "%s: Detected possible byte-swapped interface"
1797 " at IOADDR %p\n", CARDNAME, ioaddr);
1798 }
1799 retval = -ENODEV;
1800 goto err_out;
1801 }
1802
1803 /*
1804 * The above MIGHT indicate a device, but I need to write to
1805 * further test this.
1806 */
1807 SMC_SELECT_BANK(0);
1808 val = SMC_CURRENT_BANK();
1809 if ((val & 0xFF00) != 0x3300) {
1810 retval = -ENODEV;
1811 goto err_out;
1812 }
1813
1814 /*
1815 * well, we've already written once, so hopefully another
1816 * time won't hurt. This time, I need to switch the bank
1817 * register to bank 1, so I can access the base address
1818 * register
1819 */
1820 SMC_SELECT_BANK(1);
1821 val = SMC_GET_BASE();
1822 val = ((val & 0x1F00) >> 3) << SMC_IO_SHIFT;
1823 if (((unsigned int)ioaddr & (0x3e0 << SMC_IO_SHIFT)) != val) {
1824 printk("%s: IOADDR %p doesn't match configuration (%x).\n",
1825 CARDNAME, ioaddr, val);
1826 }
1827
1828 /*
1829 * check if the revision register is something that I
1830 * recognize. These might need to be added to later,
1831 * as future revisions could be added.
1832 */
1833 SMC_SELECT_BANK(3);
1834 revision_register = SMC_GET_REV();
1835 DBG(2, "%s: revision = 0x%04x\n", CARDNAME, revision_register);
1836 version_string = chip_ids[ (revision_register >> 4) & 0xF];
1837 if (!version_string || (revision_register & 0xff00) != 0x3300) {
1838 /* I don't recognize this chip, so... */
1839 printk("%s: IO %p: Unrecognized revision register 0x%04x"
1840 ", Contact author.\n", CARDNAME,
1841 ioaddr, revision_register);
1842
1843 retval = -ENODEV;
1844 goto err_out;
1845 }
1846
1847 /* At this point I'll assume that the chip is an SMC91x. */
1848 if (version_printed++ == 0)
1849 printk("%s", version);
1850
1851 /* fill in some of the fields */
1852 dev->base_addr = (unsigned long)ioaddr;
1853 lp->base = ioaddr;
1854 lp->version = revision_register & 0xff;
1855 spin_lock_init(&lp->lock);
1856
1857 /* Get the MAC address */
1858 SMC_SELECT_BANK(1);
1859 SMC_GET_MAC_ADDR(dev->dev_addr);
1860
1861 /* now, reset the chip, and put it into a known state */
1862 smc_reset(dev);
1863
1864 /*
1865 * If dev->irq is 0, then the device has to be banged on to see
1866 * what the IRQ is.
1867 *
1868 * This banging doesn't always detect the IRQ, for unknown reasons.
1869 * a workaround is to reset the chip and try again.
1870 *
1871 * Interestingly, the DOS packet driver *SETS* the IRQ on the card to
1872 * be what is requested on the command line. I don't do that, mostly
1873 * because the card that I have uses a non-standard method of accessing
1874 * the IRQs, and because this _should_ work in most configurations.
1875 *
1876 * Specifying an IRQ is done with the assumption that the user knows
1877 * what (s)he is doing. No checking is done!!!!
1878 */
1879 if (dev->irq < 1) {
1880 int trials;
1881
1882 trials = 3;
1883 while (trials--) {
1884 dev->irq = smc_findirq(ioaddr);
1885 if (dev->irq)
1886 break;
1887 /* kick the card and try again */
1888 smc_reset(dev);
1889 }
1890 }
1891 if (dev->irq == 0) {
1892 printk("%s: Couldn't autodetect your IRQ. Use irq=xx.\n",
1893 dev->name);
1894 retval = -ENODEV;
1895 goto err_out;
1896 }
1897 dev->irq = irq_canonicalize(dev->irq);
1898
1899 /* Fill in the fields of the device structure with ethernet values. */
1900 ether_setup(dev);
1901
1902 dev->open = smc_open;
1903 dev->stop = smc_close;
1904 dev->hard_start_xmit = smc_hard_start_xmit;
1905 dev->tx_timeout = smc_timeout;
1906 dev->watchdog_timeo = msecs_to_jiffies(watchdog);
1907 dev->set_multicast_list = smc_set_multicast_list;
1908 dev->ethtool_ops = &smc_ethtool_ops;
1909 #ifdef CONFIG_NET_POLL_CONTROLLER
1910 dev->poll_controller = smc_poll_controller;
1911 #endif
1912
1913 tasklet_init(&lp->tx_task, smc_hardware_send_pkt, (unsigned long)dev);
1914 INIT_WORK(&lp->phy_configure, smc_phy_configure);
1915 lp->dev = dev;
1916 lp->mii.phy_id_mask = 0x1f;
1917 lp->mii.reg_num_mask = 0x1f;
1918 lp->mii.force_media = 0;
1919 lp->mii.full_duplex = 0;
1920 lp->mii.dev = dev;
1921 lp->mii.mdio_read = smc_phy_read;
1922 lp->mii.mdio_write = smc_phy_write;
1923
1924 /*
1925 * Locate the phy, if any.
1926 */
1927 if (lp->version >= (CHIP_91100 << 4))
1928 smc_phy_detect(dev);
1929
1930 /* then shut everything down to save power */
1931 smc_shutdown(dev);
1932 smc_phy_powerdown(dev);
1933
1934 /* Set default parameters */
1935 lp->msg_enable = NETIF_MSG_LINK;
1936 lp->ctl_rfduplx = 0;
1937 lp->ctl_rspeed = 10;
1938
1939 if (lp->version >= (CHIP_91100 << 4)) {
1940 lp->ctl_rfduplx = 1;
1941 lp->ctl_rspeed = 100;
1942 }
1943
1944 /* Grab the IRQ */
1945 retval = request_irq(dev->irq, &smc_interrupt, irq_flags, dev->name, dev);
1946 if (retval)
1947 goto err_out;
1948
1949 #ifdef SMC_USE_PXA_DMA
1950 {
1951 int dma = pxa_request_dma(dev->name, DMA_PRIO_LOW,
1952 smc_pxa_dma_irq, NULL);
1953 if (dma >= 0)
1954 dev->dma = dma;
1955 }
1956 #endif
1957
1958 retval = register_netdev(dev);
1959 if (retval == 0) {
1960 /* now, print out the card info, in a short format.. */
1961 printk("%s: %s (rev %d) at %p IRQ %d",
1962 dev->name, version_string, revision_register & 0x0f,
1963 lp->base, dev->irq);
1964
1965 if (dev->dma != (unsigned char)-1)
1966 printk(" DMA %d", dev->dma);
1967
1968 printk("%s%s\n", nowait ? " [nowait]" : "",
1969 THROTTLE_TX_PKTS ? " [throttle_tx]" : "");
1970
1971 if (!is_valid_ether_addr(dev->dev_addr)) {
1972 printk("%s: Invalid ethernet MAC address. Please "
1973 "set using ifconfig\n", dev->name);
1974 } else {
1975 /* Print the Ethernet address */
1976 printk("%s: Ethernet addr: %s\n",
1977 dev->name, print_mac(mac, dev->dev_addr));
1978 }
1979
1980 if (lp->phy_type == 0) {
1981 PRINTK("%s: No PHY found\n", dev->name);
1982 } else if ((lp->phy_type & 0xfffffff0) == 0x0016f840) {
1983 PRINTK("%s: PHY LAN83C183 (LAN91C111 Internal)\n", dev->name);
1984 } else if ((lp->phy_type & 0xfffffff0) == 0x02821c50) {
1985 PRINTK("%s: PHY LAN83C180\n", dev->name);
1986 }
1987 }
1988
1989 err_out:
1990 #ifdef SMC_USE_PXA_DMA
1991 if (retval && dev->dma != (unsigned char)-1)
1992 pxa_free_dma(dev->dma);
1993 #endif
1994 return retval;
1995 }
1996
1997 static int smc_enable_device(struct platform_device *pdev)
1998 {
1999 unsigned long flags;
2000 unsigned char ecor, ecsr;
2001 void __iomem *addr;
2002 struct resource * res;
2003
2004 res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "smc91x-attrib");
2005 if (!res)
2006 return 0;
2007
2008 /*
2009 * Map the attribute space. This is overkill, but clean.
2010 */
2011 addr = ioremap(res->start, ATTRIB_SIZE);
2012 if (!addr)
2013 return -ENOMEM;
2014
2015 /*
2016 * Reset the device. We must disable IRQs around this
2017 * since a reset causes the IRQ line become active.
2018 */
2019 local_irq_save(flags);
2020 ecor = readb(addr + (ECOR << SMC_IO_SHIFT)) & ~ECOR_RESET;
2021 writeb(ecor | ECOR_RESET, addr + (ECOR << SMC_IO_SHIFT));
2022 readb(addr + (ECOR << SMC_IO_SHIFT));
2023
2024 /*
2025 * Wait 100us for the chip to reset.
2026 */
2027 udelay(100);
2028
2029 /*
2030 * The device will ignore all writes to the enable bit while
2031 * reset is asserted, even if the reset bit is cleared in the
2032 * same write. Must clear reset first, then enable the device.
2033 */
2034 writeb(ecor, addr + (ECOR << SMC_IO_SHIFT));
2035 writeb(ecor | ECOR_ENABLE, addr + (ECOR << SMC_IO_SHIFT));
2036
2037 /*
2038 * Set the appropriate byte/word mode.
2039 */
2040 ecsr = readb(addr + (ECSR << SMC_IO_SHIFT)) & ~ECSR_IOIS8;
2041 if (!SMC_CAN_USE_16BIT)
2042 ecsr |= ECSR_IOIS8;
2043 writeb(ecsr, addr + (ECSR << SMC_IO_SHIFT));
2044 local_irq_restore(flags);
2045
2046 iounmap(addr);
2047
2048 /*
2049 * Wait for the chip to wake up. We could poll the control
2050 * register in the main register space, but that isn't mapped
2051 * yet. We know this is going to take 750us.
2052 */
2053 msleep(1);
2054
2055 return 0;
2056 }
2057
2058 static int smc_request_attrib(struct platform_device *pdev)
2059 {
2060 struct resource * res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "smc91x-attrib");
2061
2062 if (!res)
2063 return 0;
2064
2065 if (!request_mem_region(res->start, ATTRIB_SIZE, CARDNAME))
2066 return -EBUSY;
2067
2068 return 0;
2069 }
2070
2071 static void smc_release_attrib(struct platform_device *pdev)
2072 {
2073 struct resource * res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "smc91x-attrib");
2074
2075 if (res)
2076 release_mem_region(res->start, ATTRIB_SIZE);
2077 }
2078
2079 static inline void smc_request_datacs(struct platform_device *pdev, struct net_device *ndev)
2080 {
2081 if (SMC_CAN_USE_DATACS) {
2082 struct resource * res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "smc91x-data32");
2083 struct smc_local *lp = netdev_priv(ndev);
2084
2085 if (!res)
2086 return;
2087
2088 if(!request_mem_region(res->start, SMC_DATA_EXTENT, CARDNAME)) {
2089 printk(KERN_INFO "%s: failed to request datacs memory region.\n", CARDNAME);
2090 return;
2091 }
2092
2093 lp->datacs = ioremap(res->start, SMC_DATA_EXTENT);
2094 }
2095 }
2096
2097 static void smc_release_datacs(struct platform_device *pdev, struct net_device *ndev)
2098 {
2099 if (SMC_CAN_USE_DATACS) {
2100 struct smc_local *lp = netdev_priv(ndev);
2101 struct resource * res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "smc91x-data32");
2102
2103 if (lp->datacs)
2104 iounmap(lp->datacs);
2105
2106 lp->datacs = NULL;
2107
2108 if (res)
2109 release_mem_region(res->start, SMC_DATA_EXTENT);
2110 }
2111 }
2112
2113 /*
2114 * smc_init(void)
2115 * Input parameters:
2116 * dev->base_addr == 0, try to find all possible locations
2117 * dev->base_addr > 0x1ff, this is the address to check
2118 * dev->base_addr == <anything else>, return failure code
2119 *
2120 * Output:
2121 * 0 --> there is a device
2122 * anything else, error
2123 */
2124 static int smc_drv_probe(struct platform_device *pdev)
2125 {
2126 struct net_device *ndev;
2127 struct resource *res, *ires;
2128 unsigned int __iomem *addr;
2129 unsigned long irq_flags = SMC_IRQ_FLAGS;
2130 int ret;
2131
2132 res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "smc91x-regs");
2133 if (!res)
2134 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
2135 if (!res) {
2136 ret = -ENODEV;
2137 goto out;
2138 }
2139
2140
2141 if (!request_mem_region(res->start, SMC_IO_EXTENT, CARDNAME)) {
2142 ret = -EBUSY;
2143 goto out;
2144 }
2145
2146 ndev = alloc_etherdev(sizeof(struct smc_local));
2147 if (!ndev) {
2148 printk("%s: could not allocate device.\n", CARDNAME);
2149 ret = -ENOMEM;
2150 goto out_release_io;
2151 }
2152 SET_NETDEV_DEV(ndev, &pdev->dev);
2153
2154 ndev->dma = (unsigned char)-1;
2155
2156 ires = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
2157 if (!ires) {
2158 ret = -ENODEV;
2159 goto out_free_netdev;
2160 }
2161
2162 ndev->irq = ires->start;
2163 if (SMC_IRQ_FLAGS == -1)
2164 irq_flags = ires->flags & IRQF_TRIGGER_MASK;
2165
2166 ret = smc_request_attrib(pdev);
2167 if (ret)
2168 goto out_free_netdev;
2169 #if defined(CONFIG_SA1100_ASSABET)
2170 NCR_0 |= NCR_ENET_OSC_EN;
2171 #endif
2172 ret = smc_enable_device(pdev);
2173 if (ret)
2174 goto out_release_attrib;
2175
2176 addr = ioremap(res->start, SMC_IO_EXTENT);
2177 if (!addr) {
2178 ret = -ENOMEM;
2179 goto out_release_attrib;
2180 }
2181
2182 #ifdef SMC_USE_PXA_DMA
2183 {
2184 struct smc_local *lp = netdev_priv(ndev);
2185 lp->device = &pdev->dev;
2186 lp->physaddr = res->start;
2187 }
2188 #endif
2189
2190 platform_set_drvdata(pdev, ndev);
2191 ret = smc_probe(ndev, addr, irq_flags);
2192 if (ret != 0)
2193 goto out_iounmap;
2194
2195 smc_request_datacs(pdev, ndev);
2196
2197 return 0;
2198
2199 out_iounmap:
2200 platform_set_drvdata(pdev, NULL);
2201 iounmap(addr);
2202 out_release_attrib:
2203 smc_release_attrib(pdev);
2204 out_free_netdev:
2205 free_netdev(ndev);
2206 out_release_io:
2207 release_mem_region(res->start, SMC_IO_EXTENT);
2208 out:
2209 printk("%s: not found (%d).\n", CARDNAME, ret);
2210
2211 return ret;
2212 }
2213
2214 static int smc_drv_remove(struct platform_device *pdev)
2215 {
2216 struct net_device *ndev = platform_get_drvdata(pdev);
2217 struct smc_local *lp = netdev_priv(ndev);
2218 struct resource *res;
2219
2220 platform_set_drvdata(pdev, NULL);
2221
2222 unregister_netdev(ndev);
2223
2224 free_irq(ndev->irq, ndev);
2225
2226 #ifdef SMC_USE_PXA_DMA
2227 if (ndev->dma != (unsigned char)-1)
2228 pxa_free_dma(ndev->dma);
2229 #endif
2230 iounmap(lp->base);
2231
2232 smc_release_datacs(pdev,ndev);
2233 smc_release_attrib(pdev);
2234
2235 res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "smc91x-regs");
2236 if (!res)
2237 platform_get_resource(pdev, IORESOURCE_MEM, 0);
2238 release_mem_region(res->start, SMC_IO_EXTENT);
2239
2240 free_netdev(ndev);
2241
2242 return 0;
2243 }
2244
2245 static int smc_drv_suspend(struct platform_device *dev, pm_message_t state)
2246 {
2247 struct net_device *ndev = platform_get_drvdata(dev);
2248
2249 if (ndev) {
2250 if (netif_running(ndev)) {
2251 netif_device_detach(ndev);
2252 smc_shutdown(ndev);
2253 smc_phy_powerdown(ndev);
2254 }
2255 }
2256 return 0;
2257 }
2258
2259 static int smc_drv_resume(struct platform_device *dev)
2260 {
2261 struct net_device *ndev = platform_get_drvdata(dev);
2262
2263 if (ndev) {
2264 struct smc_local *lp = netdev_priv(ndev);
2265 smc_enable_device(dev);
2266 if (netif_running(ndev)) {
2267 smc_reset(ndev);
2268 smc_enable(ndev);
2269 if (lp->phy_type != 0)
2270 smc_phy_configure(&lp->phy_configure);
2271 netif_device_attach(ndev);
2272 }
2273 }
2274 return 0;
2275 }
2276
2277 static struct platform_driver smc_driver = {
2278 .probe = smc_drv_probe,
2279 .remove = smc_drv_remove,
2280 .suspend = smc_drv_suspend,
2281 .resume = smc_drv_resume,
2282 .driver = {
2283 .name = CARDNAME,
2284 },
2285 };
2286
2287 static int __init smc_init(void)
2288 {
2289 #ifdef MODULE
2290 #ifdef CONFIG_ISA
2291 if (io == -1)
2292 printk(KERN_WARNING
2293 "%s: You shouldn't use auto-probing with insmod!\n",
2294 CARDNAME);
2295 #endif
2296 #endif
2297
2298 return platform_driver_register(&smc_driver);
2299 }
2300
2301 static void __exit smc_cleanup(void)
2302 {
2303 platform_driver_unregister(&smc_driver);
2304 }
2305
2306 module_init(smc_init);
2307 module_exit(smc_cleanup);