]> git.proxmox.com Git - mirror_ubuntu-artful-kernel.git/blob - drivers/net/smc91x.c
Linux-2.6.12-rc2
[mirror_ubuntu-artful-kernel.git] / drivers / net / smc91x.c
1 /*
2 * smc91x.c
3 * This is a driver for SMSC's 91C9x/91C1xx single-chip Ethernet devices.
4 *
5 * Copyright (C) 1996 by Erik Stahlman
6 * Copyright (C) 2001 Standard Microsystems Corporation
7 * Developed by Simple Network Magic Corporation
8 * Copyright (C) 2003 Monta Vista Software, Inc.
9 * Unified SMC91x driver by Nicolas Pitre
10 *
11 * This program is free software; you can redistribute it and/or modify
12 * it under the terms of the GNU General Public License as published by
13 * the Free Software Foundation; either version 2 of the License, or
14 * (at your option) any later version.
15 *
16 * This program is distributed in the hope that it will be useful,
17 * but WITHOUT ANY WARRANTY; without even the implied warranty of
18 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
19 * GNU General Public License for more details.
20 *
21 * You should have received a copy of the GNU General Public License
22 * along with this program; if not, write to the Free Software
23 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
24 *
25 * Arguments:
26 * io = for the base address
27 * irq = for the IRQ
28 * nowait = 0 for normal wait states, 1 eliminates additional wait states
29 *
30 * original author:
31 * Erik Stahlman <erik@vt.edu>
32 *
33 * hardware multicast code:
34 * Peter Cammaert <pc@denkart.be>
35 *
36 * contributors:
37 * Daris A Nevil <dnevil@snmc.com>
38 * Nicolas Pitre <nico@cam.org>
39 * Russell King <rmk@arm.linux.org.uk>
40 *
41 * History:
42 * 08/20/00 Arnaldo Melo fix kfree(skb) in smc_hardware_send_packet
43 * 12/15/00 Christian Jullien fix "Warning: kfree_skb on hard IRQ"
44 * 03/16/01 Daris A Nevil modified smc9194.c for use with LAN91C111
45 * 08/22/01 Scott Anderson merge changes from smc9194 to smc91111
46 * 08/21/01 Pramod B Bhardwaj added support for RevB of LAN91C111
47 * 12/20/01 Jeff Sutherland initial port to Xscale PXA with DMA support
48 * 04/07/03 Nicolas Pitre unified SMC91x driver, killed irq races,
49 * more bus abstraction, big cleanup, etc.
50 * 29/09/03 Russell King - add driver model support
51 * - ethtool support
52 * - convert to use generic MII interface
53 * - add link up/down notification
54 * - don't try to handle full negotiation in
55 * smc_phy_configure
56 * - clean up (and fix stack overrun) in PHY
57 * MII read/write functions
58 * 22/09/04 Nicolas Pitre big update (see commit log for details)
59 */
60 static const char version[] =
61 "smc91x.c: v1.1, sep 22 2004 by Nicolas Pitre <nico@cam.org>\n";
62
63 /* Debugging level */
64 #ifndef SMC_DEBUG
65 #define SMC_DEBUG 0
66 #endif
67
68
69 #include <linux/config.h>
70 #include <linux/init.h>
71 #include <linux/module.h>
72 #include <linux/kernel.h>
73 #include <linux/sched.h>
74 #include <linux/slab.h>
75 #include <linux/delay.h>
76 #include <linux/interrupt.h>
77 #include <linux/errno.h>
78 #include <linux/ioport.h>
79 #include <linux/crc32.h>
80 #include <linux/device.h>
81 #include <linux/spinlock.h>
82 #include <linux/ethtool.h>
83 #include <linux/mii.h>
84 #include <linux/workqueue.h>
85
86 #include <linux/netdevice.h>
87 #include <linux/etherdevice.h>
88 #include <linux/skbuff.h>
89
90 #include <asm/io.h>
91 #include <asm/irq.h>
92
93 #include "smc91x.h"
94
95 #ifdef CONFIG_ISA
96 /*
97 * the LAN91C111 can be at any of the following port addresses. To change,
98 * for a slightly different card, you can add it to the array. Keep in
99 * mind that the array must end in zero.
100 */
101 static unsigned int smc_portlist[] __initdata = {
102 0x200, 0x220, 0x240, 0x260, 0x280, 0x2A0, 0x2C0, 0x2E0,
103 0x300, 0x320, 0x340, 0x360, 0x380, 0x3A0, 0x3C0, 0x3E0, 0
104 };
105
106 #ifndef SMC_IOADDR
107 # define SMC_IOADDR -1
108 #endif
109 static unsigned long io = SMC_IOADDR;
110 module_param(io, ulong, 0400);
111 MODULE_PARM_DESC(io, "I/O base address");
112
113 #ifndef SMC_IRQ
114 # define SMC_IRQ -1
115 #endif
116 static int irq = SMC_IRQ;
117 module_param(irq, int, 0400);
118 MODULE_PARM_DESC(irq, "IRQ number");
119
120 #endif /* CONFIG_ISA */
121
122 #ifndef SMC_NOWAIT
123 # define SMC_NOWAIT 0
124 #endif
125 static int nowait = SMC_NOWAIT;
126 module_param(nowait, int, 0400);
127 MODULE_PARM_DESC(nowait, "set to 1 for no wait state");
128
129 /*
130 * Transmit timeout, default 5 seconds.
131 */
132 static int watchdog = 5000;
133 module_param(watchdog, int, 0400);
134 MODULE_PARM_DESC(watchdog, "transmit timeout in milliseconds");
135
136 MODULE_LICENSE("GPL");
137
138 /*
139 * The internal workings of the driver. If you are changing anything
140 * here with the SMC stuff, you should have the datasheet and know
141 * what you are doing.
142 */
143 #define CARDNAME "smc91x"
144
145 /*
146 * Use power-down feature of the chip
147 */
148 #define POWER_DOWN 1
149
150 /*
151 * Wait time for memory to be free. This probably shouldn't be
152 * tuned that much, as waiting for this means nothing else happens
153 * in the system
154 */
155 #define MEMORY_WAIT_TIME 16
156
157 /*
158 * This selects whether TX packets are sent one by one to the SMC91x internal
159 * memory and throttled until transmission completes. This may prevent
160 * RX overruns a litle by keeping much of the memory free for RX packets
161 * but to the expense of reduced TX throughput and increased IRQ overhead.
162 * Note this is not a cure for a too slow data bus or too high IRQ latency.
163 */
164 #define THROTTLE_TX_PKTS 0
165
166 /*
167 * The MII clock high/low times. 2x this number gives the MII clock period
168 * in microseconds. (was 50, but this gives 6.4ms for each MII transaction!)
169 */
170 #define MII_DELAY 1
171
172 /* store this information for the driver.. */
173 struct smc_local {
174 /*
175 * If I have to wait until memory is available to send a
176 * packet, I will store the skbuff here, until I get the
177 * desired memory. Then, I'll send it out and free it.
178 */
179 struct sk_buff *pending_tx_skb;
180 struct tasklet_struct tx_task;
181
182 /*
183 * these are things that the kernel wants me to keep, so users
184 * can find out semi-useless statistics of how well the card is
185 * performing
186 */
187 struct net_device_stats stats;
188
189 /* version/revision of the SMC91x chip */
190 int version;
191
192 /* Contains the current active transmission mode */
193 int tcr_cur_mode;
194
195 /* Contains the current active receive mode */
196 int rcr_cur_mode;
197
198 /* Contains the current active receive/phy mode */
199 int rpc_cur_mode;
200 int ctl_rfduplx;
201 int ctl_rspeed;
202
203 u32 msg_enable;
204 u32 phy_type;
205 struct mii_if_info mii;
206
207 /* work queue */
208 struct work_struct phy_configure;
209 int work_pending;
210
211 spinlock_t lock;
212
213 #ifdef SMC_CAN_USE_DATACS
214 u32 __iomem *datacs;
215 #endif
216
217 #ifdef SMC_USE_PXA_DMA
218 /* DMA needs the physical address of the chip */
219 u_long physaddr;
220 #endif
221 void __iomem *base;
222 };
223
224 #if SMC_DEBUG > 0
225 #define DBG(n, args...) \
226 do { \
227 if (SMC_DEBUG >= (n)) \
228 printk(args); \
229 } while (0)
230
231 #define PRINTK(args...) printk(args)
232 #else
233 #define DBG(n, args...) do { } while(0)
234 #define PRINTK(args...) printk(KERN_DEBUG args)
235 #endif
236
237 #if SMC_DEBUG > 3
238 static void PRINT_PKT(u_char *buf, int length)
239 {
240 int i;
241 int remainder;
242 int lines;
243
244 lines = length / 16;
245 remainder = length % 16;
246
247 for (i = 0; i < lines ; i ++) {
248 int cur;
249 for (cur = 0; cur < 8; cur++) {
250 u_char a, b;
251 a = *buf++;
252 b = *buf++;
253 printk("%02x%02x ", a, b);
254 }
255 printk("\n");
256 }
257 for (i = 0; i < remainder/2 ; i++) {
258 u_char a, b;
259 a = *buf++;
260 b = *buf++;
261 printk("%02x%02x ", a, b);
262 }
263 printk("\n");
264 }
265 #else
266 #define PRINT_PKT(x...) do { } while(0)
267 #endif
268
269
270 /* this enables an interrupt in the interrupt mask register */
271 #define SMC_ENABLE_INT(x) do { \
272 unsigned char mask; \
273 spin_lock_irq(&lp->lock); \
274 mask = SMC_GET_INT_MASK(); \
275 mask |= (x); \
276 SMC_SET_INT_MASK(mask); \
277 spin_unlock_irq(&lp->lock); \
278 } while (0)
279
280 /* this disables an interrupt from the interrupt mask register */
281 #define SMC_DISABLE_INT(x) do { \
282 unsigned char mask; \
283 spin_lock_irq(&lp->lock); \
284 mask = SMC_GET_INT_MASK(); \
285 mask &= ~(x); \
286 SMC_SET_INT_MASK(mask); \
287 spin_unlock_irq(&lp->lock); \
288 } while (0)
289
290 /*
291 * Wait while MMU is busy. This is usually in the order of a few nanosecs
292 * if at all, but let's avoid deadlocking the system if the hardware
293 * decides to go south.
294 */
295 #define SMC_WAIT_MMU_BUSY() do { \
296 if (unlikely(SMC_GET_MMU_CMD() & MC_BUSY)) { \
297 unsigned long timeout = jiffies + 2; \
298 while (SMC_GET_MMU_CMD() & MC_BUSY) { \
299 if (time_after(jiffies, timeout)) { \
300 printk("%s: timeout %s line %d\n", \
301 dev->name, __FILE__, __LINE__); \
302 break; \
303 } \
304 cpu_relax(); \
305 } \
306 } \
307 } while (0)
308
309
310 /*
311 * this does a soft reset on the device
312 */
313 static void smc_reset(struct net_device *dev)
314 {
315 struct smc_local *lp = netdev_priv(dev);
316 void __iomem *ioaddr = lp->base;
317 unsigned int ctl, cfg;
318
319 DBG(2, "%s: %s\n", dev->name, __FUNCTION__);
320
321 /* Disable all interrupts */
322 spin_lock(&lp->lock);
323 SMC_SELECT_BANK(2);
324 SMC_SET_INT_MASK(0);
325 spin_unlock(&lp->lock);
326
327 /*
328 * This resets the registers mostly to defaults, but doesn't
329 * affect EEPROM. That seems unnecessary
330 */
331 SMC_SELECT_BANK(0);
332 SMC_SET_RCR(RCR_SOFTRST);
333
334 /*
335 * Setup the Configuration Register
336 * This is necessary because the CONFIG_REG is not affected
337 * by a soft reset
338 */
339 SMC_SELECT_BANK(1);
340
341 cfg = CONFIG_DEFAULT;
342
343 /*
344 * Setup for fast accesses if requested. If the card/system
345 * can't handle it then there will be no recovery except for
346 * a hard reset or power cycle
347 */
348 if (nowait)
349 cfg |= CONFIG_NO_WAIT;
350
351 /*
352 * Release from possible power-down state
353 * Configuration register is not affected by Soft Reset
354 */
355 cfg |= CONFIG_EPH_POWER_EN;
356
357 SMC_SET_CONFIG(cfg);
358
359 /* this should pause enough for the chip to be happy */
360 /*
361 * elaborate? What does the chip _need_? --jgarzik
362 *
363 * This seems to be undocumented, but something the original
364 * driver(s) have always done. Suspect undocumented timing
365 * info/determined empirically. --rmk
366 */
367 udelay(1);
368
369 /* Disable transmit and receive functionality */
370 SMC_SELECT_BANK(0);
371 SMC_SET_RCR(RCR_CLEAR);
372 SMC_SET_TCR(TCR_CLEAR);
373
374 SMC_SELECT_BANK(1);
375 ctl = SMC_GET_CTL() | CTL_LE_ENABLE;
376
377 /*
378 * Set the control register to automatically release successfully
379 * transmitted packets, to make the best use out of our limited
380 * memory
381 */
382 if(!THROTTLE_TX_PKTS)
383 ctl |= CTL_AUTO_RELEASE;
384 else
385 ctl &= ~CTL_AUTO_RELEASE;
386 SMC_SET_CTL(ctl);
387
388 /* Reset the MMU */
389 SMC_SELECT_BANK(2);
390 SMC_SET_MMU_CMD(MC_RESET);
391 SMC_WAIT_MMU_BUSY();
392
393 /* clear anything saved */
394 if (lp->pending_tx_skb != NULL) {
395 dev_kfree_skb (lp->pending_tx_skb);
396 lp->pending_tx_skb = NULL;
397 lp->stats.tx_errors++;
398 lp->stats.tx_aborted_errors++;
399 }
400 }
401
402 /*
403 * Enable Interrupts, Receive, and Transmit
404 */
405 static void smc_enable(struct net_device *dev)
406 {
407 struct smc_local *lp = netdev_priv(dev);
408 void __iomem *ioaddr = lp->base;
409 int mask;
410
411 DBG(2, "%s: %s\n", dev->name, __FUNCTION__);
412
413 /* see the header file for options in TCR/RCR DEFAULT */
414 SMC_SELECT_BANK(0);
415 SMC_SET_TCR(lp->tcr_cur_mode);
416 SMC_SET_RCR(lp->rcr_cur_mode);
417
418 SMC_SELECT_BANK(1);
419 SMC_SET_MAC_ADDR(dev->dev_addr);
420
421 /* now, enable interrupts */
422 mask = IM_EPH_INT|IM_RX_OVRN_INT|IM_RCV_INT;
423 if (lp->version >= (CHIP_91100 << 4))
424 mask |= IM_MDINT;
425 SMC_SELECT_BANK(2);
426 SMC_SET_INT_MASK(mask);
427
428 /*
429 * From this point the register bank must _NOT_ be switched away
430 * to something else than bank 2 without proper locking against
431 * races with any tasklet or interrupt handlers until smc_shutdown()
432 * or smc_reset() is called.
433 */
434 }
435
436 /*
437 * this puts the device in an inactive state
438 */
439 static void smc_shutdown(struct net_device *dev)
440 {
441 struct smc_local *lp = netdev_priv(dev);
442 void __iomem *ioaddr = lp->base;
443
444 DBG(2, "%s: %s\n", CARDNAME, __FUNCTION__);
445
446 /* no more interrupts for me */
447 spin_lock(&lp->lock);
448 SMC_SELECT_BANK(2);
449 SMC_SET_INT_MASK(0);
450 spin_unlock(&lp->lock);
451
452 /* and tell the card to stay away from that nasty outside world */
453 SMC_SELECT_BANK(0);
454 SMC_SET_RCR(RCR_CLEAR);
455 SMC_SET_TCR(TCR_CLEAR);
456
457 #ifdef POWER_DOWN
458 /* finally, shut the chip down */
459 SMC_SELECT_BANK(1);
460 SMC_SET_CONFIG(SMC_GET_CONFIG() & ~CONFIG_EPH_POWER_EN);
461 #endif
462 }
463
464 /*
465 * This is the procedure to handle the receipt of a packet.
466 */
467 static inline void smc_rcv(struct net_device *dev)
468 {
469 struct smc_local *lp = netdev_priv(dev);
470 void __iomem *ioaddr = lp->base;
471 unsigned int packet_number, status, packet_len;
472
473 DBG(3, "%s: %s\n", dev->name, __FUNCTION__);
474
475 packet_number = SMC_GET_RXFIFO();
476 if (unlikely(packet_number & RXFIFO_REMPTY)) {
477 PRINTK("%s: smc_rcv with nothing on FIFO.\n", dev->name);
478 return;
479 }
480
481 /* read from start of packet */
482 SMC_SET_PTR(PTR_READ | PTR_RCV | PTR_AUTOINC);
483
484 /* First two words are status and packet length */
485 SMC_GET_PKT_HDR(status, packet_len);
486 packet_len &= 0x07ff; /* mask off top bits */
487 DBG(2, "%s: RX PNR 0x%x STATUS 0x%04x LENGTH 0x%04x (%d)\n",
488 dev->name, packet_number, status,
489 packet_len, packet_len);
490
491 back:
492 if (unlikely(packet_len < 6 || status & RS_ERRORS)) {
493 if (status & RS_TOOLONG && packet_len <= (1514 + 4 + 6)) {
494 /* accept VLAN packets */
495 status &= ~RS_TOOLONG;
496 goto back;
497 }
498 if (packet_len < 6) {
499 /* bloody hardware */
500 printk(KERN_ERR "%s: fubar (rxlen %u status %x\n",
501 dev->name, packet_len, status);
502 status |= RS_TOOSHORT;
503 }
504 SMC_WAIT_MMU_BUSY();
505 SMC_SET_MMU_CMD(MC_RELEASE);
506 lp->stats.rx_errors++;
507 if (status & RS_ALGNERR)
508 lp->stats.rx_frame_errors++;
509 if (status & (RS_TOOSHORT | RS_TOOLONG))
510 lp->stats.rx_length_errors++;
511 if (status & RS_BADCRC)
512 lp->stats.rx_crc_errors++;
513 } else {
514 struct sk_buff *skb;
515 unsigned char *data;
516 unsigned int data_len;
517
518 /* set multicast stats */
519 if (status & RS_MULTICAST)
520 lp->stats.multicast++;
521
522 /*
523 * Actual payload is packet_len - 6 (or 5 if odd byte).
524 * We want skb_reserve(2) and the final ctrl word
525 * (2 bytes, possibly containing the payload odd byte).
526 * Furthermore, we add 2 bytes to allow rounding up to
527 * multiple of 4 bytes on 32 bit buses.
528 * Hence packet_len - 6 + 2 + 2 + 2.
529 */
530 skb = dev_alloc_skb(packet_len);
531 if (unlikely(skb == NULL)) {
532 printk(KERN_NOTICE "%s: Low memory, packet dropped.\n",
533 dev->name);
534 SMC_WAIT_MMU_BUSY();
535 SMC_SET_MMU_CMD(MC_RELEASE);
536 lp->stats.rx_dropped++;
537 return;
538 }
539
540 /* Align IP header to 32 bits */
541 skb_reserve(skb, 2);
542
543 /* BUG: the LAN91C111 rev A never sets this bit. Force it. */
544 if (lp->version == 0x90)
545 status |= RS_ODDFRAME;
546
547 /*
548 * If odd length: packet_len - 5,
549 * otherwise packet_len - 6.
550 * With the trailing ctrl byte it's packet_len - 4.
551 */
552 data_len = packet_len - ((status & RS_ODDFRAME) ? 5 : 6);
553 data = skb_put(skb, data_len);
554 SMC_PULL_DATA(data, packet_len - 4);
555
556 SMC_WAIT_MMU_BUSY();
557 SMC_SET_MMU_CMD(MC_RELEASE);
558
559 PRINT_PKT(data, packet_len - 4);
560
561 dev->last_rx = jiffies;
562 skb->dev = dev;
563 skb->protocol = eth_type_trans(skb, dev);
564 netif_rx(skb);
565 lp->stats.rx_packets++;
566 lp->stats.rx_bytes += data_len;
567 }
568 }
569
570 #ifdef CONFIG_SMP
571 /*
572 * On SMP we have the following problem:
573 *
574 * A = smc_hardware_send_pkt()
575 * B = smc_hard_start_xmit()
576 * C = smc_interrupt()
577 *
578 * A and B can never be executed simultaneously. However, at least on UP,
579 * it is possible (and even desirable) for C to interrupt execution of
580 * A or B in order to have better RX reliability and avoid overruns.
581 * C, just like A and B, must have exclusive access to the chip and
582 * each of them must lock against any other concurrent access.
583 * Unfortunately this is not possible to have C suspend execution of A or
584 * B taking place on another CPU. On UP this is no an issue since A and B
585 * are run from softirq context and C from hard IRQ context, and there is
586 * no other CPU where concurrent access can happen.
587 * If ever there is a way to force at least B and C to always be executed
588 * on the same CPU then we could use read/write locks to protect against
589 * any other concurrent access and C would always interrupt B. But life
590 * isn't that easy in a SMP world...
591 */
592 #define smc_special_trylock(lock) \
593 ({ \
594 int __ret; \
595 local_irq_disable(); \
596 __ret = spin_trylock(lock); \
597 if (!__ret) \
598 local_irq_enable(); \
599 __ret; \
600 })
601 #define smc_special_lock(lock) spin_lock_irq(lock)
602 #define smc_special_unlock(lock) spin_unlock_irq(lock)
603 #else
604 #define smc_special_trylock(lock) (1)
605 #define smc_special_lock(lock) do { } while (0)
606 #define smc_special_unlock(lock) do { } while (0)
607 #endif
608
609 /*
610 * This is called to actually send a packet to the chip.
611 */
612 static void smc_hardware_send_pkt(unsigned long data)
613 {
614 struct net_device *dev = (struct net_device *)data;
615 struct smc_local *lp = netdev_priv(dev);
616 void __iomem *ioaddr = lp->base;
617 struct sk_buff *skb;
618 unsigned int packet_no, len;
619 unsigned char *buf;
620
621 DBG(3, "%s: %s\n", dev->name, __FUNCTION__);
622
623 if (!smc_special_trylock(&lp->lock)) {
624 netif_stop_queue(dev);
625 tasklet_schedule(&lp->tx_task);
626 return;
627 }
628
629 skb = lp->pending_tx_skb;
630 lp->pending_tx_skb = NULL;
631 packet_no = SMC_GET_AR();
632 if (unlikely(packet_no & AR_FAILED)) {
633 printk("%s: Memory allocation failed.\n", dev->name);
634 lp->stats.tx_errors++;
635 lp->stats.tx_fifo_errors++;
636 smc_special_unlock(&lp->lock);
637 goto done;
638 }
639
640 /* point to the beginning of the packet */
641 SMC_SET_PN(packet_no);
642 SMC_SET_PTR(PTR_AUTOINC);
643
644 buf = skb->data;
645 len = skb->len;
646 DBG(2, "%s: TX PNR 0x%x LENGTH 0x%04x (%d) BUF 0x%p\n",
647 dev->name, packet_no, len, len, buf);
648 PRINT_PKT(buf, len);
649
650 /*
651 * Send the packet length (+6 for status words, length, and ctl.
652 * The card will pad to 64 bytes with zeroes if packet is too small.
653 */
654 SMC_PUT_PKT_HDR(0, len + 6);
655
656 /* send the actual data */
657 SMC_PUSH_DATA(buf, len & ~1);
658
659 /* Send final ctl word with the last byte if there is one */
660 SMC_outw(((len & 1) ? (0x2000 | buf[len-1]) : 0), ioaddr, DATA_REG);
661
662 /*
663 * If THROTTLE_TX_PKTS is set, we look at the TX_EMPTY flag
664 * before queueing this packet for TX, and if it's clear then
665 * we stop the queue here. This will have the effect of
666 * having at most 2 packets queued for TX in the chip's memory
667 * at all time. If THROTTLE_TX_PKTS is not set then the queue
668 * is stopped only when memory allocation (MC_ALLOC) does not
669 * succeed right away.
670 */
671 if (THROTTLE_TX_PKTS && !(SMC_GET_INT() & IM_TX_EMPTY_INT))
672 netif_stop_queue(dev);
673
674 /* queue the packet for TX */
675 SMC_SET_MMU_CMD(MC_ENQUEUE);
676 SMC_ACK_INT(IM_TX_EMPTY_INT);
677 smc_special_unlock(&lp->lock);
678
679 dev->trans_start = jiffies;
680 lp->stats.tx_packets++;
681 lp->stats.tx_bytes += len;
682
683 SMC_ENABLE_INT(IM_TX_INT | IM_TX_EMPTY_INT);
684
685 done: if (!THROTTLE_TX_PKTS)
686 netif_wake_queue(dev);
687
688 dev_kfree_skb(skb);
689 }
690
691 /*
692 * Since I am not sure if I will have enough room in the chip's ram
693 * to store the packet, I call this routine which either sends it
694 * now, or set the card to generates an interrupt when ready
695 * for the packet.
696 */
697 static int smc_hard_start_xmit(struct sk_buff *skb, struct net_device *dev)
698 {
699 struct smc_local *lp = netdev_priv(dev);
700 void __iomem *ioaddr = lp->base;
701 unsigned int numPages, poll_count, status;
702
703 DBG(3, "%s: %s\n", dev->name, __FUNCTION__);
704
705 BUG_ON(lp->pending_tx_skb != NULL);
706 lp->pending_tx_skb = skb;
707
708 /*
709 * The MMU wants the number of pages to be the number of 256 bytes
710 * 'pages', minus 1 (since a packet can't ever have 0 pages :))
711 *
712 * The 91C111 ignores the size bits, but earlier models don't.
713 *
714 * Pkt size for allocating is data length +6 (for additional status
715 * words, length and ctl)
716 *
717 * If odd size then last byte is included in ctl word.
718 */
719 numPages = ((skb->len & ~1) + (6 - 1)) >> 8;
720 if (unlikely(numPages > 7)) {
721 printk("%s: Far too big packet error.\n", dev->name);
722 lp->pending_tx_skb = NULL;
723 lp->stats.tx_errors++;
724 lp->stats.tx_dropped++;
725 dev_kfree_skb(skb);
726 return 0;
727 }
728
729 smc_special_lock(&lp->lock);
730
731 /* now, try to allocate the memory */
732 SMC_SET_MMU_CMD(MC_ALLOC | numPages);
733
734 /*
735 * Poll the chip for a short amount of time in case the
736 * allocation succeeds quickly.
737 */
738 poll_count = MEMORY_WAIT_TIME;
739 do {
740 status = SMC_GET_INT();
741 if (status & IM_ALLOC_INT) {
742 SMC_ACK_INT(IM_ALLOC_INT);
743 break;
744 }
745 } while (--poll_count);
746
747 smc_special_unlock(&lp->lock);
748
749 if (!poll_count) {
750 /* oh well, wait until the chip finds memory later */
751 netif_stop_queue(dev);
752 DBG(2, "%s: TX memory allocation deferred.\n", dev->name);
753 SMC_ENABLE_INT(IM_ALLOC_INT);
754 } else {
755 /*
756 * Allocation succeeded: push packet to the chip's own memory
757 * immediately.
758 */
759 smc_hardware_send_pkt((unsigned long)dev);
760 }
761
762 return 0;
763 }
764
765 /*
766 * This handles a TX interrupt, which is only called when:
767 * - a TX error occurred, or
768 * - CTL_AUTO_RELEASE is not set and TX of a packet completed.
769 */
770 static void smc_tx(struct net_device *dev)
771 {
772 struct smc_local *lp = netdev_priv(dev);
773 void __iomem *ioaddr = lp->base;
774 unsigned int saved_packet, packet_no, tx_status, pkt_len;
775
776 DBG(3, "%s: %s\n", dev->name, __FUNCTION__);
777
778 /* If the TX FIFO is empty then nothing to do */
779 packet_no = SMC_GET_TXFIFO();
780 if (unlikely(packet_no & TXFIFO_TEMPTY)) {
781 PRINTK("%s: smc_tx with nothing on FIFO.\n", dev->name);
782 return;
783 }
784
785 /* select packet to read from */
786 saved_packet = SMC_GET_PN();
787 SMC_SET_PN(packet_no);
788
789 /* read the first word (status word) from this packet */
790 SMC_SET_PTR(PTR_AUTOINC | PTR_READ);
791 SMC_GET_PKT_HDR(tx_status, pkt_len);
792 DBG(2, "%s: TX STATUS 0x%04x PNR 0x%02x\n",
793 dev->name, tx_status, packet_no);
794
795 if (!(tx_status & TS_SUCCESS))
796 lp->stats.tx_errors++;
797 if (tx_status & TS_LOSTCAR)
798 lp->stats.tx_carrier_errors++;
799
800 if (tx_status & TS_LATCOL) {
801 PRINTK("%s: late collision occurred on last xmit\n", dev->name);
802 lp->stats.tx_window_errors++;
803 if (!(lp->stats.tx_window_errors & 63) && net_ratelimit()) {
804 printk(KERN_INFO "%s: unexpectedly large numbers of "
805 "late collisions. Please check duplex "
806 "setting.\n", dev->name);
807 }
808 }
809
810 /* kill the packet */
811 SMC_WAIT_MMU_BUSY();
812 SMC_SET_MMU_CMD(MC_FREEPKT);
813
814 /* Don't restore Packet Number Reg until busy bit is cleared */
815 SMC_WAIT_MMU_BUSY();
816 SMC_SET_PN(saved_packet);
817
818 /* re-enable transmit */
819 SMC_SELECT_BANK(0);
820 SMC_SET_TCR(lp->tcr_cur_mode);
821 SMC_SELECT_BANK(2);
822 }
823
824
825 /*---PHY CONTROL AND CONFIGURATION-----------------------------------------*/
826
827 static void smc_mii_out(struct net_device *dev, unsigned int val, int bits)
828 {
829 struct smc_local *lp = netdev_priv(dev);
830 void __iomem *ioaddr = lp->base;
831 unsigned int mii_reg, mask;
832
833 mii_reg = SMC_GET_MII() & ~(MII_MCLK | MII_MDOE | MII_MDO);
834 mii_reg |= MII_MDOE;
835
836 for (mask = 1 << (bits - 1); mask; mask >>= 1) {
837 if (val & mask)
838 mii_reg |= MII_MDO;
839 else
840 mii_reg &= ~MII_MDO;
841
842 SMC_SET_MII(mii_reg);
843 udelay(MII_DELAY);
844 SMC_SET_MII(mii_reg | MII_MCLK);
845 udelay(MII_DELAY);
846 }
847 }
848
849 static unsigned int smc_mii_in(struct net_device *dev, int bits)
850 {
851 struct smc_local *lp = netdev_priv(dev);
852 void __iomem *ioaddr = lp->base;
853 unsigned int mii_reg, mask, val;
854
855 mii_reg = SMC_GET_MII() & ~(MII_MCLK | MII_MDOE | MII_MDO);
856 SMC_SET_MII(mii_reg);
857
858 for (mask = 1 << (bits - 1), val = 0; mask; mask >>= 1) {
859 if (SMC_GET_MII() & MII_MDI)
860 val |= mask;
861
862 SMC_SET_MII(mii_reg);
863 udelay(MII_DELAY);
864 SMC_SET_MII(mii_reg | MII_MCLK);
865 udelay(MII_DELAY);
866 }
867
868 return val;
869 }
870
871 /*
872 * Reads a register from the MII Management serial interface
873 */
874 static int smc_phy_read(struct net_device *dev, int phyaddr, int phyreg)
875 {
876 struct smc_local *lp = netdev_priv(dev);
877 void __iomem *ioaddr = lp->base;
878 unsigned int phydata;
879
880 SMC_SELECT_BANK(3);
881
882 /* Idle - 32 ones */
883 smc_mii_out(dev, 0xffffffff, 32);
884
885 /* Start code (01) + read (10) + phyaddr + phyreg */
886 smc_mii_out(dev, 6 << 10 | phyaddr << 5 | phyreg, 14);
887
888 /* Turnaround (2bits) + phydata */
889 phydata = smc_mii_in(dev, 18);
890
891 /* Return to idle state */
892 SMC_SET_MII(SMC_GET_MII() & ~(MII_MCLK|MII_MDOE|MII_MDO));
893
894 DBG(3, "%s: phyaddr=0x%x, phyreg=0x%x, phydata=0x%x\n",
895 __FUNCTION__, phyaddr, phyreg, phydata);
896
897 SMC_SELECT_BANK(2);
898 return phydata;
899 }
900
901 /*
902 * Writes a register to the MII Management serial interface
903 */
904 static void smc_phy_write(struct net_device *dev, int phyaddr, int phyreg,
905 int phydata)
906 {
907 struct smc_local *lp = netdev_priv(dev);
908 void __iomem *ioaddr = lp->base;
909
910 SMC_SELECT_BANK(3);
911
912 /* Idle - 32 ones */
913 smc_mii_out(dev, 0xffffffff, 32);
914
915 /* Start code (01) + write (01) + phyaddr + phyreg + turnaround + phydata */
916 smc_mii_out(dev, 5 << 28 | phyaddr << 23 | phyreg << 18 | 2 << 16 | phydata, 32);
917
918 /* Return to idle state */
919 SMC_SET_MII(SMC_GET_MII() & ~(MII_MCLK|MII_MDOE|MII_MDO));
920
921 DBG(3, "%s: phyaddr=0x%x, phyreg=0x%x, phydata=0x%x\n",
922 __FUNCTION__, phyaddr, phyreg, phydata);
923
924 SMC_SELECT_BANK(2);
925 }
926
927 /*
928 * Finds and reports the PHY address
929 */
930 static void smc_phy_detect(struct net_device *dev)
931 {
932 struct smc_local *lp = netdev_priv(dev);
933 int phyaddr;
934
935 DBG(2, "%s: %s\n", dev->name, __FUNCTION__);
936
937 lp->phy_type = 0;
938
939 /*
940 * Scan all 32 PHY addresses if necessary, starting at
941 * PHY#1 to PHY#31, and then PHY#0 last.
942 */
943 for (phyaddr = 1; phyaddr < 33; ++phyaddr) {
944 unsigned int id1, id2;
945
946 /* Read the PHY identifiers */
947 id1 = smc_phy_read(dev, phyaddr & 31, MII_PHYSID1);
948 id2 = smc_phy_read(dev, phyaddr & 31, MII_PHYSID2);
949
950 DBG(3, "%s: phy_id1=0x%x, phy_id2=0x%x\n",
951 dev->name, id1, id2);
952
953 /* Make sure it is a valid identifier */
954 if (id1 != 0x0000 && id1 != 0xffff && id1 != 0x8000 &&
955 id2 != 0x0000 && id2 != 0xffff && id2 != 0x8000) {
956 /* Save the PHY's address */
957 lp->mii.phy_id = phyaddr & 31;
958 lp->phy_type = id1 << 16 | id2;
959 break;
960 }
961 }
962 }
963
964 /*
965 * Sets the PHY to a configuration as determined by the user
966 */
967 static int smc_phy_fixed(struct net_device *dev)
968 {
969 struct smc_local *lp = netdev_priv(dev);
970 void __iomem *ioaddr = lp->base;
971 int phyaddr = lp->mii.phy_id;
972 int bmcr, cfg1;
973
974 DBG(3, "%s: %s\n", dev->name, __FUNCTION__);
975
976 /* Enter Link Disable state */
977 cfg1 = smc_phy_read(dev, phyaddr, PHY_CFG1_REG);
978 cfg1 |= PHY_CFG1_LNKDIS;
979 smc_phy_write(dev, phyaddr, PHY_CFG1_REG, cfg1);
980
981 /*
982 * Set our fixed capabilities
983 * Disable auto-negotiation
984 */
985 bmcr = 0;
986
987 if (lp->ctl_rfduplx)
988 bmcr |= BMCR_FULLDPLX;
989
990 if (lp->ctl_rspeed == 100)
991 bmcr |= BMCR_SPEED100;
992
993 /* Write our capabilities to the phy control register */
994 smc_phy_write(dev, phyaddr, MII_BMCR, bmcr);
995
996 /* Re-Configure the Receive/Phy Control register */
997 SMC_SELECT_BANK(0);
998 SMC_SET_RPC(lp->rpc_cur_mode);
999 SMC_SELECT_BANK(2);
1000
1001 return 1;
1002 }
1003
1004 /*
1005 * smc_phy_reset - reset the phy
1006 * @dev: net device
1007 * @phy: phy address
1008 *
1009 * Issue a software reset for the specified PHY and
1010 * wait up to 100ms for the reset to complete. We should
1011 * not access the PHY for 50ms after issuing the reset.
1012 *
1013 * The time to wait appears to be dependent on the PHY.
1014 *
1015 * Must be called with lp->lock locked.
1016 */
1017 static int smc_phy_reset(struct net_device *dev, int phy)
1018 {
1019 struct smc_local *lp = netdev_priv(dev);
1020 unsigned int bmcr;
1021 int timeout;
1022
1023 smc_phy_write(dev, phy, MII_BMCR, BMCR_RESET);
1024
1025 for (timeout = 2; timeout; timeout--) {
1026 spin_unlock_irq(&lp->lock);
1027 msleep(50);
1028 spin_lock_irq(&lp->lock);
1029
1030 bmcr = smc_phy_read(dev, phy, MII_BMCR);
1031 if (!(bmcr & BMCR_RESET))
1032 break;
1033 }
1034
1035 return bmcr & BMCR_RESET;
1036 }
1037
1038 /*
1039 * smc_phy_powerdown - powerdown phy
1040 * @dev: net device
1041 *
1042 * Power down the specified PHY
1043 */
1044 static void smc_phy_powerdown(struct net_device *dev)
1045 {
1046 struct smc_local *lp = netdev_priv(dev);
1047 unsigned int bmcr;
1048 int phy = lp->mii.phy_id;
1049
1050 if (lp->phy_type == 0)
1051 return;
1052
1053 /* We need to ensure that no calls to smc_phy_configure are
1054 pending.
1055
1056 flush_scheduled_work() cannot be called because we are
1057 running with the netlink semaphore held (from
1058 devinet_ioctl()) and the pending work queue contains
1059 linkwatch_event() (scheduled by netif_carrier_off()
1060 above). linkwatch_event() also wants the netlink semaphore.
1061 */
1062 while(lp->work_pending)
1063 schedule();
1064
1065 bmcr = smc_phy_read(dev, phy, MII_BMCR);
1066 smc_phy_write(dev, phy, MII_BMCR, bmcr | BMCR_PDOWN);
1067 }
1068
1069 /*
1070 * smc_phy_check_media - check the media status and adjust TCR
1071 * @dev: net device
1072 * @init: set true for initialisation
1073 *
1074 * Select duplex mode depending on negotiation state. This
1075 * also updates our carrier state.
1076 */
1077 static void smc_phy_check_media(struct net_device *dev, int init)
1078 {
1079 struct smc_local *lp = netdev_priv(dev);
1080 void __iomem *ioaddr = lp->base;
1081
1082 if (mii_check_media(&lp->mii, netif_msg_link(lp), init)) {
1083 /* duplex state has changed */
1084 if (lp->mii.full_duplex) {
1085 lp->tcr_cur_mode |= TCR_SWFDUP;
1086 } else {
1087 lp->tcr_cur_mode &= ~TCR_SWFDUP;
1088 }
1089
1090 SMC_SELECT_BANK(0);
1091 SMC_SET_TCR(lp->tcr_cur_mode);
1092 }
1093 }
1094
1095 /*
1096 * Configures the specified PHY through the MII management interface
1097 * using Autonegotiation.
1098 * Calls smc_phy_fixed() if the user has requested a certain config.
1099 * If RPC ANEG bit is set, the media selection is dependent purely on
1100 * the selection by the MII (either in the MII BMCR reg or the result
1101 * of autonegotiation.) If the RPC ANEG bit is cleared, the selection
1102 * is controlled by the RPC SPEED and RPC DPLX bits.
1103 */
1104 static void smc_phy_configure(void *data)
1105 {
1106 struct net_device *dev = data;
1107 struct smc_local *lp = netdev_priv(dev);
1108 void __iomem *ioaddr = lp->base;
1109 int phyaddr = lp->mii.phy_id;
1110 int my_phy_caps; /* My PHY capabilities */
1111 int my_ad_caps; /* My Advertised capabilities */
1112 int status;
1113
1114 DBG(3, "%s:smc_program_phy()\n", dev->name);
1115
1116 spin_lock_irq(&lp->lock);
1117
1118 /*
1119 * We should not be called if phy_type is zero.
1120 */
1121 if (lp->phy_type == 0)
1122 goto smc_phy_configure_exit;
1123
1124 if (smc_phy_reset(dev, phyaddr)) {
1125 printk("%s: PHY reset timed out\n", dev->name);
1126 goto smc_phy_configure_exit;
1127 }
1128
1129 /*
1130 * Enable PHY Interrupts (for register 18)
1131 * Interrupts listed here are disabled
1132 */
1133 smc_phy_write(dev, phyaddr, PHY_MASK_REG,
1134 PHY_INT_LOSSSYNC | PHY_INT_CWRD | PHY_INT_SSD |
1135 PHY_INT_ESD | PHY_INT_RPOL | PHY_INT_JAB |
1136 PHY_INT_SPDDET | PHY_INT_DPLXDET);
1137
1138 /* Configure the Receive/Phy Control register */
1139 SMC_SELECT_BANK(0);
1140 SMC_SET_RPC(lp->rpc_cur_mode);
1141
1142 /* If the user requested no auto neg, then go set his request */
1143 if (lp->mii.force_media) {
1144 smc_phy_fixed(dev);
1145 goto smc_phy_configure_exit;
1146 }
1147
1148 /* Copy our capabilities from MII_BMSR to MII_ADVERTISE */
1149 my_phy_caps = smc_phy_read(dev, phyaddr, MII_BMSR);
1150
1151 if (!(my_phy_caps & BMSR_ANEGCAPABLE)) {
1152 printk(KERN_INFO "Auto negotiation NOT supported\n");
1153 smc_phy_fixed(dev);
1154 goto smc_phy_configure_exit;
1155 }
1156
1157 my_ad_caps = ADVERTISE_CSMA; /* I am CSMA capable */
1158
1159 if (my_phy_caps & BMSR_100BASE4)
1160 my_ad_caps |= ADVERTISE_100BASE4;
1161 if (my_phy_caps & BMSR_100FULL)
1162 my_ad_caps |= ADVERTISE_100FULL;
1163 if (my_phy_caps & BMSR_100HALF)
1164 my_ad_caps |= ADVERTISE_100HALF;
1165 if (my_phy_caps & BMSR_10FULL)
1166 my_ad_caps |= ADVERTISE_10FULL;
1167 if (my_phy_caps & BMSR_10HALF)
1168 my_ad_caps |= ADVERTISE_10HALF;
1169
1170 /* Disable capabilities not selected by our user */
1171 if (lp->ctl_rspeed != 100)
1172 my_ad_caps &= ~(ADVERTISE_100BASE4|ADVERTISE_100FULL|ADVERTISE_100HALF);
1173
1174 if (!lp->ctl_rfduplx)
1175 my_ad_caps &= ~(ADVERTISE_100FULL|ADVERTISE_10FULL);
1176
1177 /* Update our Auto-Neg Advertisement Register */
1178 smc_phy_write(dev, phyaddr, MII_ADVERTISE, my_ad_caps);
1179 lp->mii.advertising = my_ad_caps;
1180
1181 /*
1182 * Read the register back. Without this, it appears that when
1183 * auto-negotiation is restarted, sometimes it isn't ready and
1184 * the link does not come up.
1185 */
1186 status = smc_phy_read(dev, phyaddr, MII_ADVERTISE);
1187
1188 DBG(2, "%s: phy caps=%x\n", dev->name, my_phy_caps);
1189 DBG(2, "%s: phy advertised caps=%x\n", dev->name, my_ad_caps);
1190
1191 /* Restart auto-negotiation process in order to advertise my caps */
1192 smc_phy_write(dev, phyaddr, MII_BMCR, BMCR_ANENABLE | BMCR_ANRESTART);
1193
1194 smc_phy_check_media(dev, 1);
1195
1196 smc_phy_configure_exit:
1197 spin_unlock_irq(&lp->lock);
1198 lp->work_pending = 0;
1199 }
1200
1201 /*
1202 * smc_phy_interrupt
1203 *
1204 * Purpose: Handle interrupts relating to PHY register 18. This is
1205 * called from the "hard" interrupt handler under our private spinlock.
1206 */
1207 static void smc_phy_interrupt(struct net_device *dev)
1208 {
1209 struct smc_local *lp = netdev_priv(dev);
1210 int phyaddr = lp->mii.phy_id;
1211 int phy18;
1212
1213 DBG(2, "%s: %s\n", dev->name, __FUNCTION__);
1214
1215 if (lp->phy_type == 0)
1216 return;
1217
1218 for(;;) {
1219 smc_phy_check_media(dev, 0);
1220
1221 /* Read PHY Register 18, Status Output */
1222 phy18 = smc_phy_read(dev, phyaddr, PHY_INT_REG);
1223 if ((phy18 & PHY_INT_INT) == 0)
1224 break;
1225 }
1226 }
1227
1228 /*--- END PHY CONTROL AND CONFIGURATION-------------------------------------*/
1229
1230 static void smc_10bt_check_media(struct net_device *dev, int init)
1231 {
1232 struct smc_local *lp = netdev_priv(dev);
1233 void __iomem *ioaddr = lp->base;
1234 unsigned int old_carrier, new_carrier;
1235
1236 old_carrier = netif_carrier_ok(dev) ? 1 : 0;
1237
1238 SMC_SELECT_BANK(0);
1239 new_carrier = SMC_inw(ioaddr, EPH_STATUS_REG) & ES_LINK_OK ? 1 : 0;
1240 SMC_SELECT_BANK(2);
1241
1242 if (init || (old_carrier != new_carrier)) {
1243 if (!new_carrier) {
1244 netif_carrier_off(dev);
1245 } else {
1246 netif_carrier_on(dev);
1247 }
1248 if (netif_msg_link(lp))
1249 printk(KERN_INFO "%s: link %s\n", dev->name,
1250 new_carrier ? "up" : "down");
1251 }
1252 }
1253
1254 static void smc_eph_interrupt(struct net_device *dev)
1255 {
1256 struct smc_local *lp = netdev_priv(dev);
1257 void __iomem *ioaddr = lp->base;
1258 unsigned int ctl;
1259
1260 smc_10bt_check_media(dev, 0);
1261
1262 SMC_SELECT_BANK(1);
1263 ctl = SMC_GET_CTL();
1264 SMC_SET_CTL(ctl & ~CTL_LE_ENABLE);
1265 SMC_SET_CTL(ctl);
1266 SMC_SELECT_BANK(2);
1267 }
1268
1269 /*
1270 * This is the main routine of the driver, to handle the device when
1271 * it needs some attention.
1272 */
1273 static irqreturn_t smc_interrupt(int irq, void *dev_id, struct pt_regs *regs)
1274 {
1275 struct net_device *dev = dev_id;
1276 struct smc_local *lp = netdev_priv(dev);
1277 void __iomem *ioaddr = lp->base;
1278 int status, mask, timeout, card_stats;
1279 int saved_pointer;
1280
1281 DBG(3, "%s: %s\n", dev->name, __FUNCTION__);
1282
1283 spin_lock(&lp->lock);
1284
1285 /* A preamble may be used when there is a potential race
1286 * between the interruptible transmit functions and this
1287 * ISR. */
1288 SMC_INTERRUPT_PREAMBLE;
1289
1290 saved_pointer = SMC_GET_PTR();
1291 mask = SMC_GET_INT_MASK();
1292 SMC_SET_INT_MASK(0);
1293
1294 /* set a timeout value, so I don't stay here forever */
1295 timeout = 8;
1296
1297 do {
1298 status = SMC_GET_INT();
1299
1300 DBG(2, "%s: INT 0x%02x MASK 0x%02x MEM 0x%04x FIFO 0x%04x\n",
1301 dev->name, status, mask,
1302 ({ int meminfo; SMC_SELECT_BANK(0);
1303 meminfo = SMC_GET_MIR();
1304 SMC_SELECT_BANK(2); meminfo; }),
1305 SMC_GET_FIFO());
1306
1307 status &= mask;
1308 if (!status)
1309 break;
1310
1311 if (status & IM_RCV_INT) {
1312 DBG(3, "%s: RX irq\n", dev->name);
1313 smc_rcv(dev);
1314 } else if (status & IM_TX_INT) {
1315 DBG(3, "%s: TX int\n", dev->name);
1316 smc_tx(dev);
1317 SMC_ACK_INT(IM_TX_INT);
1318 if (THROTTLE_TX_PKTS)
1319 netif_wake_queue(dev);
1320 } else if (status & IM_ALLOC_INT) {
1321 DBG(3, "%s: Allocation irq\n", dev->name);
1322 tasklet_hi_schedule(&lp->tx_task);
1323 mask &= ~IM_ALLOC_INT;
1324 } else if (status & IM_TX_EMPTY_INT) {
1325 DBG(3, "%s: TX empty\n", dev->name);
1326 mask &= ~IM_TX_EMPTY_INT;
1327
1328 /* update stats */
1329 SMC_SELECT_BANK(0);
1330 card_stats = SMC_GET_COUNTER();
1331 SMC_SELECT_BANK(2);
1332
1333 /* single collisions */
1334 lp->stats.collisions += card_stats & 0xF;
1335 card_stats >>= 4;
1336
1337 /* multiple collisions */
1338 lp->stats.collisions += card_stats & 0xF;
1339 } else if (status & IM_RX_OVRN_INT) {
1340 DBG(1, "%s: RX overrun\n", dev->name);
1341 SMC_ACK_INT(IM_RX_OVRN_INT);
1342 lp->stats.rx_errors++;
1343 lp->stats.rx_fifo_errors++;
1344 } else if (status & IM_EPH_INT) {
1345 smc_eph_interrupt(dev);
1346 } else if (status & IM_MDINT) {
1347 SMC_ACK_INT(IM_MDINT);
1348 smc_phy_interrupt(dev);
1349 } else if (status & IM_ERCV_INT) {
1350 SMC_ACK_INT(IM_ERCV_INT);
1351 PRINTK("%s: UNSUPPORTED: ERCV INTERRUPT \n", dev->name);
1352 }
1353 } while (--timeout);
1354
1355 /* restore register states */
1356 SMC_SET_PTR(saved_pointer);
1357 SMC_SET_INT_MASK(mask);
1358
1359 spin_unlock(&lp->lock);
1360
1361 DBG(3, "%s: Interrupt done (%d loops)\n", dev->name, 8-timeout);
1362
1363 /*
1364 * We return IRQ_HANDLED unconditionally here even if there was
1365 * nothing to do. There is a possibility that a packet might
1366 * get enqueued into the chip right after TX_EMPTY_INT is raised
1367 * but just before the CPU acknowledges the IRQ.
1368 * Better take an unneeded IRQ in some occasions than complexifying
1369 * the code for all cases.
1370 */
1371 return IRQ_HANDLED;
1372 }
1373
1374 #ifdef CONFIG_NET_POLL_CONTROLLER
1375 /*
1376 * Polling receive - used by netconsole and other diagnostic tools
1377 * to allow network i/o with interrupts disabled.
1378 */
1379 static void smc_poll_controller(struct net_device *dev)
1380 {
1381 disable_irq(dev->irq);
1382 smc_interrupt(dev->irq, dev, NULL);
1383 enable_irq(dev->irq);
1384 }
1385 #endif
1386
1387 /* Our watchdog timed out. Called by the networking layer */
1388 static void smc_timeout(struct net_device *dev)
1389 {
1390 struct smc_local *lp = netdev_priv(dev);
1391 void __iomem *ioaddr = lp->base;
1392 int status, mask, meminfo, fifo;
1393
1394 DBG(2, "%s: %s\n", dev->name, __FUNCTION__);
1395
1396 spin_lock_irq(&lp->lock);
1397 status = SMC_GET_INT();
1398 mask = SMC_GET_INT_MASK();
1399 fifo = SMC_GET_FIFO();
1400 SMC_SELECT_BANK(0);
1401 meminfo = SMC_GET_MIR();
1402 SMC_SELECT_BANK(2);
1403 spin_unlock_irq(&lp->lock);
1404 PRINTK( "%s: INT 0x%02x MASK 0x%02x MEM 0x%04x FIFO 0x%04x\n",
1405 dev->name, status, mask, meminfo, fifo );
1406
1407 smc_reset(dev);
1408 smc_enable(dev);
1409
1410 /*
1411 * Reconfiguring the PHY doesn't seem like a bad idea here, but
1412 * smc_phy_configure() calls msleep() which calls schedule_timeout()
1413 * which calls schedule(). Hence we use a work queue.
1414 */
1415 if (lp->phy_type != 0) {
1416 if (schedule_work(&lp->phy_configure)) {
1417 lp->work_pending = 1;
1418 }
1419 }
1420
1421 /* We can accept TX packets again */
1422 dev->trans_start = jiffies;
1423 netif_wake_queue(dev);
1424 }
1425
1426 /*
1427 * This routine will, depending on the values passed to it,
1428 * either make it accept multicast packets, go into
1429 * promiscuous mode (for TCPDUMP and cousins) or accept
1430 * a select set of multicast packets
1431 */
1432 static void smc_set_multicast_list(struct net_device *dev)
1433 {
1434 struct smc_local *lp = netdev_priv(dev);
1435 void __iomem *ioaddr = lp->base;
1436 unsigned char multicast_table[8];
1437 int update_multicast = 0;
1438
1439 DBG(2, "%s: %s\n", dev->name, __FUNCTION__);
1440
1441 if (dev->flags & IFF_PROMISC) {
1442 DBG(2, "%s: RCR_PRMS\n", dev->name);
1443 lp->rcr_cur_mode |= RCR_PRMS;
1444 }
1445
1446 /* BUG? I never disable promiscuous mode if multicasting was turned on.
1447 Now, I turn off promiscuous mode, but I don't do anything to multicasting
1448 when promiscuous mode is turned on.
1449 */
1450
1451 /*
1452 * Here, I am setting this to accept all multicast packets.
1453 * I don't need to zero the multicast table, because the flag is
1454 * checked before the table is
1455 */
1456 else if (dev->flags & IFF_ALLMULTI || dev->mc_count > 16) {
1457 DBG(2, "%s: RCR_ALMUL\n", dev->name);
1458 lp->rcr_cur_mode |= RCR_ALMUL;
1459 }
1460
1461 /*
1462 * This sets the internal hardware table to filter out unwanted
1463 * multicast packets before they take up memory.
1464 *
1465 * The SMC chip uses a hash table where the high 6 bits of the CRC of
1466 * address are the offset into the table. If that bit is 1, then the
1467 * multicast packet is accepted. Otherwise, it's dropped silently.
1468 *
1469 * To use the 6 bits as an offset into the table, the high 3 bits are
1470 * the number of the 8 bit register, while the low 3 bits are the bit
1471 * within that register.
1472 */
1473 else if (dev->mc_count) {
1474 int i;
1475 struct dev_mc_list *cur_addr;
1476
1477 /* table for flipping the order of 3 bits */
1478 static const unsigned char invert3[] = {0, 4, 2, 6, 1, 5, 3, 7};
1479
1480 /* start with a table of all zeros: reject all */
1481 memset(multicast_table, 0, sizeof(multicast_table));
1482
1483 cur_addr = dev->mc_list;
1484 for (i = 0; i < dev->mc_count; i++, cur_addr = cur_addr->next) {
1485 int position;
1486
1487 /* do we have a pointer here? */
1488 if (!cur_addr)
1489 break;
1490 /* make sure this is a multicast address -
1491 shouldn't this be a given if we have it here ? */
1492 if (!(*cur_addr->dmi_addr & 1))
1493 continue;
1494
1495 /* only use the low order bits */
1496 position = crc32_le(~0, cur_addr->dmi_addr, 6) & 0x3f;
1497
1498 /* do some messy swapping to put the bit in the right spot */
1499 multicast_table[invert3[position&7]] |=
1500 (1<<invert3[(position>>3)&7]);
1501 }
1502
1503 /* be sure I get rid of flags I might have set */
1504 lp->rcr_cur_mode &= ~(RCR_PRMS | RCR_ALMUL);
1505
1506 /* now, the table can be loaded into the chipset */
1507 update_multicast = 1;
1508 } else {
1509 DBG(2, "%s: ~(RCR_PRMS|RCR_ALMUL)\n", dev->name);
1510 lp->rcr_cur_mode &= ~(RCR_PRMS | RCR_ALMUL);
1511
1512 /*
1513 * since I'm disabling all multicast entirely, I need to
1514 * clear the multicast list
1515 */
1516 memset(multicast_table, 0, sizeof(multicast_table));
1517 update_multicast = 1;
1518 }
1519
1520 spin_lock_irq(&lp->lock);
1521 SMC_SELECT_BANK(0);
1522 SMC_SET_RCR(lp->rcr_cur_mode);
1523 if (update_multicast) {
1524 SMC_SELECT_BANK(3);
1525 SMC_SET_MCAST(multicast_table);
1526 }
1527 SMC_SELECT_BANK(2);
1528 spin_unlock_irq(&lp->lock);
1529 }
1530
1531
1532 /*
1533 * Open and Initialize the board
1534 *
1535 * Set up everything, reset the card, etc..
1536 */
1537 static int
1538 smc_open(struct net_device *dev)
1539 {
1540 struct smc_local *lp = netdev_priv(dev);
1541
1542 DBG(2, "%s: %s\n", dev->name, __FUNCTION__);
1543
1544 /*
1545 * Check that the address is valid. If its not, refuse
1546 * to bring the device up. The user must specify an
1547 * address using ifconfig eth0 hw ether xx:xx:xx:xx:xx:xx
1548 */
1549 if (!is_valid_ether_addr(dev->dev_addr)) {
1550 PRINTK("%s: no valid ethernet hw addr\n", __FUNCTION__);
1551 return -EINVAL;
1552 }
1553
1554 /* Setup the default Register Modes */
1555 lp->tcr_cur_mode = TCR_DEFAULT;
1556 lp->rcr_cur_mode = RCR_DEFAULT;
1557 lp->rpc_cur_mode = RPC_DEFAULT;
1558
1559 /*
1560 * If we are not using a MII interface, we need to
1561 * monitor our own carrier signal to detect faults.
1562 */
1563 if (lp->phy_type == 0)
1564 lp->tcr_cur_mode |= TCR_MON_CSN;
1565
1566 /* reset the hardware */
1567 smc_reset(dev);
1568 smc_enable(dev);
1569
1570 /* Configure the PHY, initialize the link state */
1571 if (lp->phy_type != 0)
1572 smc_phy_configure(dev);
1573 else {
1574 spin_lock_irq(&lp->lock);
1575 smc_10bt_check_media(dev, 1);
1576 spin_unlock_irq(&lp->lock);
1577 }
1578
1579 netif_start_queue(dev);
1580 return 0;
1581 }
1582
1583 /*
1584 * smc_close
1585 *
1586 * this makes the board clean up everything that it can
1587 * and not talk to the outside world. Caused by
1588 * an 'ifconfig ethX down'
1589 */
1590 static int smc_close(struct net_device *dev)
1591 {
1592 struct smc_local *lp = netdev_priv(dev);
1593
1594 DBG(2, "%s: %s\n", dev->name, __FUNCTION__);
1595
1596 netif_stop_queue(dev);
1597 netif_carrier_off(dev);
1598
1599 /* clear everything */
1600 smc_shutdown(dev);
1601
1602 smc_phy_powerdown(dev);
1603
1604 if (lp->pending_tx_skb) {
1605 dev_kfree_skb(lp->pending_tx_skb);
1606 lp->pending_tx_skb = NULL;
1607 }
1608
1609 return 0;
1610 }
1611
1612 /*
1613 * Get the current statistics.
1614 * This may be called with the card open or closed.
1615 */
1616 static struct net_device_stats *smc_query_statistics(struct net_device *dev)
1617 {
1618 struct smc_local *lp = netdev_priv(dev);
1619
1620 DBG(2, "%s: %s\n", dev->name, __FUNCTION__);
1621
1622 return &lp->stats;
1623 }
1624
1625 /*
1626 * Ethtool support
1627 */
1628 static int
1629 smc_ethtool_getsettings(struct net_device *dev, struct ethtool_cmd *cmd)
1630 {
1631 struct smc_local *lp = netdev_priv(dev);
1632 int ret;
1633
1634 cmd->maxtxpkt = 1;
1635 cmd->maxrxpkt = 1;
1636
1637 if (lp->phy_type != 0) {
1638 spin_lock_irq(&lp->lock);
1639 ret = mii_ethtool_gset(&lp->mii, cmd);
1640 spin_unlock_irq(&lp->lock);
1641 } else {
1642 cmd->supported = SUPPORTED_10baseT_Half |
1643 SUPPORTED_10baseT_Full |
1644 SUPPORTED_TP | SUPPORTED_AUI;
1645
1646 if (lp->ctl_rspeed == 10)
1647 cmd->speed = SPEED_10;
1648 else if (lp->ctl_rspeed == 100)
1649 cmd->speed = SPEED_100;
1650
1651 cmd->autoneg = AUTONEG_DISABLE;
1652 cmd->transceiver = XCVR_INTERNAL;
1653 cmd->port = 0;
1654 cmd->duplex = lp->tcr_cur_mode & TCR_SWFDUP ? DUPLEX_FULL : DUPLEX_HALF;
1655
1656 ret = 0;
1657 }
1658
1659 return ret;
1660 }
1661
1662 static int
1663 smc_ethtool_setsettings(struct net_device *dev, struct ethtool_cmd *cmd)
1664 {
1665 struct smc_local *lp = netdev_priv(dev);
1666 int ret;
1667
1668 if (lp->phy_type != 0) {
1669 spin_lock_irq(&lp->lock);
1670 ret = mii_ethtool_sset(&lp->mii, cmd);
1671 spin_unlock_irq(&lp->lock);
1672 } else {
1673 if (cmd->autoneg != AUTONEG_DISABLE ||
1674 cmd->speed != SPEED_10 ||
1675 (cmd->duplex != DUPLEX_HALF && cmd->duplex != DUPLEX_FULL) ||
1676 (cmd->port != PORT_TP && cmd->port != PORT_AUI))
1677 return -EINVAL;
1678
1679 // lp->port = cmd->port;
1680 lp->ctl_rfduplx = cmd->duplex == DUPLEX_FULL;
1681
1682 // if (netif_running(dev))
1683 // smc_set_port(dev);
1684
1685 ret = 0;
1686 }
1687
1688 return ret;
1689 }
1690
1691 static void
1692 smc_ethtool_getdrvinfo(struct net_device *dev, struct ethtool_drvinfo *info)
1693 {
1694 strncpy(info->driver, CARDNAME, sizeof(info->driver));
1695 strncpy(info->version, version, sizeof(info->version));
1696 strncpy(info->bus_info, dev->class_dev.dev->bus_id, sizeof(info->bus_info));
1697 }
1698
1699 static int smc_ethtool_nwayreset(struct net_device *dev)
1700 {
1701 struct smc_local *lp = netdev_priv(dev);
1702 int ret = -EINVAL;
1703
1704 if (lp->phy_type != 0) {
1705 spin_lock_irq(&lp->lock);
1706 ret = mii_nway_restart(&lp->mii);
1707 spin_unlock_irq(&lp->lock);
1708 }
1709
1710 return ret;
1711 }
1712
1713 static u32 smc_ethtool_getmsglevel(struct net_device *dev)
1714 {
1715 struct smc_local *lp = netdev_priv(dev);
1716 return lp->msg_enable;
1717 }
1718
1719 static void smc_ethtool_setmsglevel(struct net_device *dev, u32 level)
1720 {
1721 struct smc_local *lp = netdev_priv(dev);
1722 lp->msg_enable = level;
1723 }
1724
1725 static struct ethtool_ops smc_ethtool_ops = {
1726 .get_settings = smc_ethtool_getsettings,
1727 .set_settings = smc_ethtool_setsettings,
1728 .get_drvinfo = smc_ethtool_getdrvinfo,
1729
1730 .get_msglevel = smc_ethtool_getmsglevel,
1731 .set_msglevel = smc_ethtool_setmsglevel,
1732 .nway_reset = smc_ethtool_nwayreset,
1733 .get_link = ethtool_op_get_link,
1734 // .get_eeprom = smc_ethtool_geteeprom,
1735 // .set_eeprom = smc_ethtool_seteeprom,
1736 };
1737
1738 /*
1739 * smc_findirq
1740 *
1741 * This routine has a simple purpose -- make the SMC chip generate an
1742 * interrupt, so an auto-detect routine can detect it, and find the IRQ,
1743 */
1744 /*
1745 * does this still work?
1746 *
1747 * I just deleted auto_irq.c, since it was never built...
1748 * --jgarzik
1749 */
1750 static int __init smc_findirq(void __iomem *ioaddr)
1751 {
1752 int timeout = 20;
1753 unsigned long cookie;
1754
1755 DBG(2, "%s: %s\n", CARDNAME, __FUNCTION__);
1756
1757 cookie = probe_irq_on();
1758
1759 /*
1760 * What I try to do here is trigger an ALLOC_INT. This is done
1761 * by allocating a small chunk of memory, which will give an interrupt
1762 * when done.
1763 */
1764 /* enable ALLOCation interrupts ONLY */
1765 SMC_SELECT_BANK(2);
1766 SMC_SET_INT_MASK(IM_ALLOC_INT);
1767
1768 /*
1769 * Allocate 512 bytes of memory. Note that the chip was just
1770 * reset so all the memory is available
1771 */
1772 SMC_SET_MMU_CMD(MC_ALLOC | 1);
1773
1774 /*
1775 * Wait until positive that the interrupt has been generated
1776 */
1777 do {
1778 int int_status;
1779 udelay(10);
1780 int_status = SMC_GET_INT();
1781 if (int_status & IM_ALLOC_INT)
1782 break; /* got the interrupt */
1783 } while (--timeout);
1784
1785 /*
1786 * there is really nothing that I can do here if timeout fails,
1787 * as autoirq_report will return a 0 anyway, which is what I
1788 * want in this case. Plus, the clean up is needed in both
1789 * cases.
1790 */
1791
1792 /* and disable all interrupts again */
1793 SMC_SET_INT_MASK(0);
1794
1795 /* and return what I found */
1796 return probe_irq_off(cookie);
1797 }
1798
1799 /*
1800 * Function: smc_probe(unsigned long ioaddr)
1801 *
1802 * Purpose:
1803 * Tests to see if a given ioaddr points to an SMC91x chip.
1804 * Returns a 0 on success
1805 *
1806 * Algorithm:
1807 * (1) see if the high byte of BANK_SELECT is 0x33
1808 * (2) compare the ioaddr with the base register's address
1809 * (3) see if I recognize the chip ID in the appropriate register
1810 *
1811 * Here I do typical initialization tasks.
1812 *
1813 * o Initialize the structure if needed
1814 * o print out my vanity message if not done so already
1815 * o print out what type of hardware is detected
1816 * o print out the ethernet address
1817 * o find the IRQ
1818 * o set up my private data
1819 * o configure the dev structure with my subroutines
1820 * o actually GRAB the irq.
1821 * o GRAB the region
1822 */
1823 static int __init smc_probe(struct net_device *dev, void __iomem *ioaddr)
1824 {
1825 struct smc_local *lp = netdev_priv(dev);
1826 static int version_printed = 0;
1827 int i, retval;
1828 unsigned int val, revision_register;
1829 const char *version_string;
1830
1831 DBG(2, "%s: %s\n", CARDNAME, __FUNCTION__);
1832
1833 /* First, see if the high byte is 0x33 */
1834 val = SMC_CURRENT_BANK();
1835 DBG(2, "%s: bank signature probe returned 0x%04x\n", CARDNAME, val);
1836 if ((val & 0xFF00) != 0x3300) {
1837 if ((val & 0xFF) == 0x33) {
1838 printk(KERN_WARNING
1839 "%s: Detected possible byte-swapped interface"
1840 " at IOADDR %p\n", CARDNAME, ioaddr);
1841 }
1842 retval = -ENODEV;
1843 goto err_out;
1844 }
1845
1846 /*
1847 * The above MIGHT indicate a device, but I need to write to
1848 * further test this.
1849 */
1850 SMC_SELECT_BANK(0);
1851 val = SMC_CURRENT_BANK();
1852 if ((val & 0xFF00) != 0x3300) {
1853 retval = -ENODEV;
1854 goto err_out;
1855 }
1856
1857 /*
1858 * well, we've already written once, so hopefully another
1859 * time won't hurt. This time, I need to switch the bank
1860 * register to bank 1, so I can access the base address
1861 * register
1862 */
1863 SMC_SELECT_BANK(1);
1864 val = SMC_GET_BASE();
1865 val = ((val & 0x1F00) >> 3) << SMC_IO_SHIFT;
1866 if (((unsigned long)ioaddr & ((PAGE_SIZE-1)<<SMC_IO_SHIFT)) != val) { /*XXX: WTF? */
1867 printk("%s: IOADDR %p doesn't match configuration (%x).\n",
1868 CARDNAME, ioaddr, val);
1869 }
1870
1871 /*
1872 * check if the revision register is something that I
1873 * recognize. These might need to be added to later,
1874 * as future revisions could be added.
1875 */
1876 SMC_SELECT_BANK(3);
1877 revision_register = SMC_GET_REV();
1878 DBG(2, "%s: revision = 0x%04x\n", CARDNAME, revision_register);
1879 version_string = chip_ids[ (revision_register >> 4) & 0xF];
1880 if (!version_string || (revision_register & 0xff00) != 0x3300) {
1881 /* I don't recognize this chip, so... */
1882 printk("%s: IO %p: Unrecognized revision register 0x%04x"
1883 ", Contact author.\n", CARDNAME,
1884 ioaddr, revision_register);
1885
1886 retval = -ENODEV;
1887 goto err_out;
1888 }
1889
1890 /* At this point I'll assume that the chip is an SMC91x. */
1891 if (version_printed++ == 0)
1892 printk("%s", version);
1893
1894 /* fill in some of the fields */
1895 dev->base_addr = (unsigned long)ioaddr;
1896 lp->base = ioaddr;
1897 lp->version = revision_register & 0xff;
1898 spin_lock_init(&lp->lock);
1899
1900 /* Get the MAC address */
1901 SMC_SELECT_BANK(1);
1902 SMC_GET_MAC_ADDR(dev->dev_addr);
1903
1904 /* now, reset the chip, and put it into a known state */
1905 smc_reset(dev);
1906
1907 /*
1908 * If dev->irq is 0, then the device has to be banged on to see
1909 * what the IRQ is.
1910 *
1911 * This banging doesn't always detect the IRQ, for unknown reasons.
1912 * a workaround is to reset the chip and try again.
1913 *
1914 * Interestingly, the DOS packet driver *SETS* the IRQ on the card to
1915 * be what is requested on the command line. I don't do that, mostly
1916 * because the card that I have uses a non-standard method of accessing
1917 * the IRQs, and because this _should_ work in most configurations.
1918 *
1919 * Specifying an IRQ is done with the assumption that the user knows
1920 * what (s)he is doing. No checking is done!!!!
1921 */
1922 if (dev->irq < 1) {
1923 int trials;
1924
1925 trials = 3;
1926 while (trials--) {
1927 dev->irq = smc_findirq(ioaddr);
1928 if (dev->irq)
1929 break;
1930 /* kick the card and try again */
1931 smc_reset(dev);
1932 }
1933 }
1934 if (dev->irq == 0) {
1935 printk("%s: Couldn't autodetect your IRQ. Use irq=xx.\n",
1936 dev->name);
1937 retval = -ENODEV;
1938 goto err_out;
1939 }
1940 dev->irq = irq_canonicalize(dev->irq);
1941
1942 /* Fill in the fields of the device structure with ethernet values. */
1943 ether_setup(dev);
1944
1945 dev->open = smc_open;
1946 dev->stop = smc_close;
1947 dev->hard_start_xmit = smc_hard_start_xmit;
1948 dev->tx_timeout = smc_timeout;
1949 dev->watchdog_timeo = msecs_to_jiffies(watchdog);
1950 dev->get_stats = smc_query_statistics;
1951 dev->set_multicast_list = smc_set_multicast_list;
1952 dev->ethtool_ops = &smc_ethtool_ops;
1953 #ifdef CONFIG_NET_POLL_CONTROLLER
1954 dev->poll_controller = smc_poll_controller;
1955 #endif
1956
1957 tasklet_init(&lp->tx_task, smc_hardware_send_pkt, (unsigned long)dev);
1958 INIT_WORK(&lp->phy_configure, smc_phy_configure, dev);
1959 lp->mii.phy_id_mask = 0x1f;
1960 lp->mii.reg_num_mask = 0x1f;
1961 lp->mii.force_media = 0;
1962 lp->mii.full_duplex = 0;
1963 lp->mii.dev = dev;
1964 lp->mii.mdio_read = smc_phy_read;
1965 lp->mii.mdio_write = smc_phy_write;
1966
1967 /*
1968 * Locate the phy, if any.
1969 */
1970 if (lp->version >= (CHIP_91100 << 4))
1971 smc_phy_detect(dev);
1972
1973 /* Set default parameters */
1974 lp->msg_enable = NETIF_MSG_LINK;
1975 lp->ctl_rfduplx = 0;
1976 lp->ctl_rspeed = 10;
1977
1978 if (lp->version >= (CHIP_91100 << 4)) {
1979 lp->ctl_rfduplx = 1;
1980 lp->ctl_rspeed = 100;
1981 }
1982
1983 /* Grab the IRQ */
1984 retval = request_irq(dev->irq, &smc_interrupt, 0, dev->name, dev);
1985 if (retval)
1986 goto err_out;
1987
1988 set_irq_type(dev->irq, IRQT_RISING);
1989
1990 #ifdef SMC_USE_PXA_DMA
1991 {
1992 int dma = pxa_request_dma(dev->name, DMA_PRIO_LOW,
1993 smc_pxa_dma_irq, NULL);
1994 if (dma >= 0)
1995 dev->dma = dma;
1996 }
1997 #endif
1998
1999 retval = register_netdev(dev);
2000 if (retval == 0) {
2001 /* now, print out the card info, in a short format.. */
2002 printk("%s: %s (rev %d) at %p IRQ %d",
2003 dev->name, version_string, revision_register & 0x0f,
2004 lp->base, dev->irq);
2005
2006 if (dev->dma != (unsigned char)-1)
2007 printk(" DMA %d", dev->dma);
2008
2009 printk("%s%s\n", nowait ? " [nowait]" : "",
2010 THROTTLE_TX_PKTS ? " [throttle_tx]" : "");
2011
2012 if (!is_valid_ether_addr(dev->dev_addr)) {
2013 printk("%s: Invalid ethernet MAC address. Please "
2014 "set using ifconfig\n", dev->name);
2015 } else {
2016 /* Print the Ethernet address */
2017 printk("%s: Ethernet addr: ", dev->name);
2018 for (i = 0; i < 5; i++)
2019 printk("%2.2x:", dev->dev_addr[i]);
2020 printk("%2.2x\n", dev->dev_addr[5]);
2021 }
2022
2023 if (lp->phy_type == 0) {
2024 PRINTK("%s: No PHY found\n", dev->name);
2025 } else if ((lp->phy_type & 0xfffffff0) == 0x0016f840) {
2026 PRINTK("%s: PHY LAN83C183 (LAN91C111 Internal)\n", dev->name);
2027 } else if ((lp->phy_type & 0xfffffff0) == 0x02821c50) {
2028 PRINTK("%s: PHY LAN83C180\n", dev->name);
2029 }
2030 }
2031
2032 err_out:
2033 #ifdef SMC_USE_PXA_DMA
2034 if (retval && dev->dma != (unsigned char)-1)
2035 pxa_free_dma(dev->dma);
2036 #endif
2037 return retval;
2038 }
2039
2040 static int smc_enable_device(struct platform_device *pdev)
2041 {
2042 unsigned long flags;
2043 unsigned char ecor, ecsr;
2044 void __iomem *addr;
2045 struct resource * res;
2046
2047 res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "smc91x-attrib");
2048 if (!res)
2049 return 0;
2050
2051 /*
2052 * Map the attribute space. This is overkill, but clean.
2053 */
2054 addr = ioremap(res->start, ATTRIB_SIZE);
2055 if (!addr)
2056 return -ENOMEM;
2057
2058 /*
2059 * Reset the device. We must disable IRQs around this
2060 * since a reset causes the IRQ line become active.
2061 */
2062 local_irq_save(flags);
2063 ecor = readb(addr + (ECOR << SMC_IO_SHIFT)) & ~ECOR_RESET;
2064 writeb(ecor | ECOR_RESET, addr + (ECOR << SMC_IO_SHIFT));
2065 readb(addr + (ECOR << SMC_IO_SHIFT));
2066
2067 /*
2068 * Wait 100us for the chip to reset.
2069 */
2070 udelay(100);
2071
2072 /*
2073 * The device will ignore all writes to the enable bit while
2074 * reset is asserted, even if the reset bit is cleared in the
2075 * same write. Must clear reset first, then enable the device.
2076 */
2077 writeb(ecor, addr + (ECOR << SMC_IO_SHIFT));
2078 writeb(ecor | ECOR_ENABLE, addr + (ECOR << SMC_IO_SHIFT));
2079
2080 /*
2081 * Set the appropriate byte/word mode.
2082 */
2083 ecsr = readb(addr + (ECSR << SMC_IO_SHIFT)) & ~ECSR_IOIS8;
2084 #ifndef SMC_CAN_USE_16BIT
2085 ecsr |= ECSR_IOIS8;
2086 #endif
2087 writeb(ecsr, addr + (ECSR << SMC_IO_SHIFT));
2088 local_irq_restore(flags);
2089
2090 iounmap(addr);
2091
2092 /*
2093 * Wait for the chip to wake up. We could poll the control
2094 * register in the main register space, but that isn't mapped
2095 * yet. We know this is going to take 750us.
2096 */
2097 msleep(1);
2098
2099 return 0;
2100 }
2101
2102 static int smc_request_attrib(struct platform_device *pdev)
2103 {
2104 struct resource * res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "smc91x-attrib");
2105
2106 if (!res)
2107 return 0;
2108
2109 if (!request_mem_region(res->start, ATTRIB_SIZE, CARDNAME))
2110 return -EBUSY;
2111
2112 return 0;
2113 }
2114
2115 static void smc_release_attrib(struct platform_device *pdev)
2116 {
2117 struct resource * res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "smc91x-attrib");
2118
2119 if (res)
2120 release_mem_region(res->start, ATTRIB_SIZE);
2121 }
2122
2123 #ifdef SMC_CAN_USE_DATACS
2124 static void smc_request_datacs(struct platform_device *pdev, struct net_device *ndev)
2125 {
2126 struct resource * res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "smc91x-data32");
2127 struct smc_local *lp = netdev_priv(ndev);
2128
2129 if (!res)
2130 return;
2131
2132 if(!request_mem_region(res->start, SMC_DATA_EXTENT, CARDNAME)) {
2133 printk(KERN_INFO "%s: failed to request datacs memory region.\n", CARDNAME);
2134 return;
2135 }
2136
2137 lp->datacs = ioremap(res->start, SMC_DATA_EXTENT);
2138 }
2139
2140 static void smc_release_datacs(struct platform_device *pdev, struct net_device *ndev)
2141 {
2142 struct smc_local *lp = netdev_priv(ndev);
2143 struct resource * res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "smc91x-data32");
2144
2145 if (lp->datacs)
2146 iounmap(lp->datacs);
2147
2148 lp->datacs = NULL;
2149
2150 if (res)
2151 release_mem_region(res->start, SMC_DATA_EXTENT);
2152 }
2153 #else
2154 static void smc_request_datacs(struct platform_device *pdev, struct net_device *ndev) {}
2155 static void smc_release_datacs(struct platform_device *pdev, struct net_device *ndev) {}
2156 #endif
2157
2158 /*
2159 * smc_init(void)
2160 * Input parameters:
2161 * dev->base_addr == 0, try to find all possible locations
2162 * dev->base_addr > 0x1ff, this is the address to check
2163 * dev->base_addr == <anything else>, return failure code
2164 *
2165 * Output:
2166 * 0 --> there is a device
2167 * anything else, error
2168 */
2169 static int smc_drv_probe(struct device *dev)
2170 {
2171 struct platform_device *pdev = to_platform_device(dev);
2172 struct net_device *ndev;
2173 struct resource *res;
2174 unsigned int __iomem *addr;
2175 int ret;
2176
2177 res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "smc91x-regs");
2178 if (!res)
2179 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
2180 if (!res) {
2181 ret = -ENODEV;
2182 goto out;
2183 }
2184
2185
2186 if (!request_mem_region(res->start, SMC_IO_EXTENT, CARDNAME)) {
2187 ret = -EBUSY;
2188 goto out;
2189 }
2190
2191 ndev = alloc_etherdev(sizeof(struct smc_local));
2192 if (!ndev) {
2193 printk("%s: could not allocate device.\n", CARDNAME);
2194 ret = -ENOMEM;
2195 goto out_release_io;
2196 }
2197 SET_MODULE_OWNER(ndev);
2198 SET_NETDEV_DEV(ndev, dev);
2199
2200 ndev->dma = (unsigned char)-1;
2201 ndev->irq = platform_get_irq(pdev, 0);
2202
2203 ret = smc_request_attrib(pdev);
2204 if (ret)
2205 goto out_free_netdev;
2206 #if defined(CONFIG_SA1100_ASSABET)
2207 NCR_0 |= NCR_ENET_OSC_EN;
2208 #endif
2209 ret = smc_enable_device(pdev);
2210 if (ret)
2211 goto out_release_attrib;
2212
2213 addr = ioremap(res->start, SMC_IO_EXTENT);
2214 if (!addr) {
2215 ret = -ENOMEM;
2216 goto out_release_attrib;
2217 }
2218
2219 dev_set_drvdata(dev, ndev);
2220 ret = smc_probe(ndev, addr);
2221 if (ret != 0)
2222 goto out_iounmap;
2223 #ifdef SMC_USE_PXA_DMA
2224 else {
2225 struct smc_local *lp = netdev_priv(ndev);
2226 lp->physaddr = res->start;
2227 }
2228 #endif
2229
2230 smc_request_datacs(pdev, ndev);
2231
2232 return 0;
2233
2234 out_iounmap:
2235 dev_set_drvdata(dev, NULL);
2236 iounmap(addr);
2237 out_release_attrib:
2238 smc_release_attrib(pdev);
2239 out_free_netdev:
2240 free_netdev(ndev);
2241 out_release_io:
2242 release_mem_region(res->start, SMC_IO_EXTENT);
2243 out:
2244 printk("%s: not found (%d).\n", CARDNAME, ret);
2245
2246 return ret;
2247 }
2248
2249 static int smc_drv_remove(struct device *dev)
2250 {
2251 struct platform_device *pdev = to_platform_device(dev);
2252 struct net_device *ndev = dev_get_drvdata(dev);
2253 struct smc_local *lp = netdev_priv(ndev);
2254 struct resource *res;
2255
2256 dev_set_drvdata(dev, NULL);
2257
2258 unregister_netdev(ndev);
2259
2260 free_irq(ndev->irq, ndev);
2261
2262 #ifdef SMC_USE_PXA_DMA
2263 if (ndev->dma != (unsigned char)-1)
2264 pxa_free_dma(ndev->dma);
2265 #endif
2266 iounmap(lp->base);
2267
2268 smc_release_datacs(pdev,ndev);
2269 smc_release_attrib(pdev);
2270
2271 res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "smc91x-regs");
2272 if (!res)
2273 platform_get_resource(pdev, IORESOURCE_MEM, 0);
2274 release_mem_region(res->start, SMC_IO_EXTENT);
2275
2276 free_netdev(ndev);
2277
2278 return 0;
2279 }
2280
2281 static int smc_drv_suspend(struct device *dev, u32 state, u32 level)
2282 {
2283 struct net_device *ndev = dev_get_drvdata(dev);
2284
2285 if (ndev && level == SUSPEND_DISABLE) {
2286 if (netif_running(ndev)) {
2287 netif_device_detach(ndev);
2288 smc_shutdown(ndev);
2289 smc_phy_powerdown(ndev);
2290 }
2291 }
2292 return 0;
2293 }
2294
2295 static int smc_drv_resume(struct device *dev, u32 level)
2296 {
2297 struct platform_device *pdev = to_platform_device(dev);
2298 struct net_device *ndev = dev_get_drvdata(dev);
2299
2300 if (ndev && level == RESUME_ENABLE) {
2301 struct smc_local *lp = netdev_priv(ndev);
2302 smc_enable_device(pdev);
2303 if (netif_running(ndev)) {
2304 smc_reset(ndev);
2305 smc_enable(ndev);
2306 if (lp->phy_type != 0)
2307 smc_phy_configure(ndev);
2308 netif_device_attach(ndev);
2309 }
2310 }
2311 return 0;
2312 }
2313
2314 static struct device_driver smc_driver = {
2315 .name = CARDNAME,
2316 .bus = &platform_bus_type,
2317 .probe = smc_drv_probe,
2318 .remove = smc_drv_remove,
2319 .suspend = smc_drv_suspend,
2320 .resume = smc_drv_resume,
2321 };
2322
2323 static int __init smc_init(void)
2324 {
2325 #ifdef MODULE
2326 #ifdef CONFIG_ISA
2327 if (io == -1)
2328 printk(KERN_WARNING
2329 "%s: You shouldn't use auto-probing with insmod!\n",
2330 CARDNAME);
2331 #endif
2332 #endif
2333
2334 return driver_register(&smc_driver);
2335 }
2336
2337 static void __exit smc_cleanup(void)
2338 {
2339 driver_unregister(&smc_driver);
2340 }
2341
2342 module_init(smc_init);
2343 module_exit(smc_cleanup);