1 /* sunhme.c: Sparc HME/BigMac 10/100baseT half/full duplex auto switching,
2 * auto carrier detecting ethernet driver. Also known as the
3 * "Happy Meal Ethernet" found on SunSwift SBUS cards.
5 * Copyright (C) 1996, 1998, 1999, 2002, 2003,
6 2006 David S. Miller (davem@davemloft.net)
9 * 2000/11/11 Willy Tarreau <willy AT meta-x.org>
10 * - port to non-sparc architectures. Tested only on x86 and
11 * only currently works with QFE PCI cards.
12 * - ability to specify the MAC address at module load time by passing this
13 * argument : macaddr=0x00,0x10,0x20,0x30,0x40,0x50
16 #include <linux/config.h>
17 #include <linux/module.h>
18 #include <linux/kernel.h>
19 #include <linux/types.h>
20 #include <linux/fcntl.h>
21 #include <linux/interrupt.h>
22 #include <linux/ioport.h>
24 #include <linux/slab.h>
25 #include <linux/string.h>
26 #include <linux/delay.h>
27 #include <linux/init.h>
28 #include <linux/ethtool.h>
29 #include <linux/mii.h>
30 #include <linux/crc32.h>
31 #include <linux/random.h>
32 #include <linux/errno.h>
33 #include <linux/netdevice.h>
34 #include <linux/etherdevice.h>
35 #include <linux/skbuff.h>
36 #include <linux/bitops.h>
38 #include <asm/system.h>
41 #include <asm/byteorder.h>
44 #include <asm/idprom.h>
46 #include <asm/openprom.h>
47 #include <asm/oplib.h>
49 #include <asm/auxio.h>
51 #include <asm/uaccess.h>
53 #include <asm/pgtable.h>
57 #include <linux/pci.h>
65 #define DRV_NAME "sunhme"
66 #define DRV_VERSION "3.00"
67 #define DRV_RELDATE "June 23, 2006"
68 #define DRV_AUTHOR "David S. Miller (davem@davemloft.net)"
70 static char version
[] =
71 DRV_NAME
".c:v" DRV_VERSION
" " DRV_RELDATE
" " DRV_AUTHOR
"\n";
73 MODULE_VERSION(DRV_VERSION
);
74 MODULE_AUTHOR(DRV_AUTHOR
);
75 MODULE_DESCRIPTION("Sun HappyMealEthernet(HME) 10/100baseT ethernet driver");
76 MODULE_LICENSE("GPL");
78 static int macaddr
[6];
80 /* accept MAC address of the form macaddr=0x08,0x00,0x20,0x30,0x40,0x50 */
81 module_param_array(macaddr
, int, NULL
, 0);
82 MODULE_PARM_DESC(macaddr
, "Happy Meal MAC address to set");
85 static struct quattro
*qfe_sbus_list
;
89 static struct quattro
*qfe_pci_list
;
99 struct hme_tx_logent
{
103 #define TXLOG_ACTION_IRQ 0x01
104 #define TXLOG_ACTION_TXMIT 0x02
105 #define TXLOG_ACTION_TBUSY 0x04
106 #define TXLOG_ACTION_NBUFS 0x08
109 #define TX_LOG_LEN 128
110 static struct hme_tx_logent tx_log
[TX_LOG_LEN
];
111 static int txlog_cur_entry
;
112 static __inline__
void tx_add_log(struct happy_meal
*hp
, unsigned int a
, unsigned int s
)
114 struct hme_tx_logent
*tlp
;
118 tlp
= &tx_log
[txlog_cur_entry
];
119 tlp
->tstamp
= (unsigned int)jiffies
;
120 tlp
->tx_new
= hp
->tx_new
;
121 tlp
->tx_old
= hp
->tx_old
;
124 txlog_cur_entry
= (txlog_cur_entry
+ 1) & (TX_LOG_LEN
- 1);
125 restore_flags(flags
);
127 static __inline__
void tx_dump_log(void)
131 this = txlog_cur_entry
;
132 for (i
= 0; i
< TX_LOG_LEN
; i
++) {
133 printk("TXLOG[%d]: j[%08x] tx[N(%d)O(%d)] action[%08x] stat[%08x]\n", i
,
135 tx_log
[this].tx_new
, tx_log
[this].tx_old
,
136 tx_log
[this].action
, tx_log
[this].status
);
137 this = (this + 1) & (TX_LOG_LEN
- 1);
140 static __inline__
void tx_dump_ring(struct happy_meal
*hp
)
142 struct hmeal_init_block
*hb
= hp
->happy_block
;
143 struct happy_meal_txd
*tp
= &hb
->happy_meal_txd
[0];
146 for (i
= 0; i
< TX_RING_SIZE
; i
+=4) {
147 printk("TXD[%d..%d]: [%08x:%08x] [%08x:%08x] [%08x:%08x] [%08x:%08x]\n",
149 le32_to_cpu(tp
[i
].tx_flags
), le32_to_cpu(tp
[i
].tx_addr
),
150 le32_to_cpu(tp
[i
+ 1].tx_flags
), le32_to_cpu(tp
[i
+ 1].tx_addr
),
151 le32_to_cpu(tp
[i
+ 2].tx_flags
), le32_to_cpu(tp
[i
+ 2].tx_addr
),
152 le32_to_cpu(tp
[i
+ 3].tx_flags
), le32_to_cpu(tp
[i
+ 3].tx_addr
));
156 #define tx_add_log(hp, a, s) do { } while(0)
157 #define tx_dump_log() do { } while(0)
158 #define tx_dump_ring(hp) do { } while(0)
162 #define HMD(x) printk x
167 /* #define AUTO_SWITCH_DEBUG */
169 #ifdef AUTO_SWITCH_DEBUG
170 #define ASD(x) printk x
175 #define DEFAULT_IPG0 16 /* For lance-mode only */
176 #define DEFAULT_IPG1 8 /* For all modes */
177 #define DEFAULT_IPG2 4 /* For all modes */
178 #define DEFAULT_JAMSIZE 4 /* Toe jam */
180 /* NOTE: In the descriptor writes one _must_ write the address
181 * member _first_. The card must not be allowed to see
182 * the updated descriptor flags until the address is
183 * correct. I've added a write memory barrier between
184 * the two stores so that I can sleep well at night... -DaveM
187 #if defined(CONFIG_SBUS) && defined(CONFIG_PCI)
188 static void sbus_hme_write32(void __iomem
*reg
, u32 val
)
190 sbus_writel(val
, reg
);
193 static u32
sbus_hme_read32(void __iomem
*reg
)
195 return sbus_readl(reg
);
198 static void sbus_hme_write_rxd(struct happy_meal_rxd
*rxd
, u32 flags
, u32 addr
)
202 rxd
->rx_flags
= flags
;
205 static void sbus_hme_write_txd(struct happy_meal_txd
*txd
, u32 flags
, u32 addr
)
209 txd
->tx_flags
= flags
;
212 static u32
sbus_hme_read_desc32(u32
*p
)
217 static void pci_hme_write32(void __iomem
*reg
, u32 val
)
222 static u32
pci_hme_read32(void __iomem
*reg
)
227 static void pci_hme_write_rxd(struct happy_meal_rxd
*rxd
, u32 flags
, u32 addr
)
229 rxd
->rx_addr
= cpu_to_le32(addr
);
231 rxd
->rx_flags
= cpu_to_le32(flags
);
234 static void pci_hme_write_txd(struct happy_meal_txd
*txd
, u32 flags
, u32 addr
)
236 txd
->tx_addr
= cpu_to_le32(addr
);
238 txd
->tx_flags
= cpu_to_le32(flags
);
241 static u32
pci_hme_read_desc32(u32
*p
)
243 return cpu_to_le32p(p
);
246 #define hme_write32(__hp, __reg, __val) \
247 ((__hp)->write32((__reg), (__val)))
248 #define hme_read32(__hp, __reg) \
249 ((__hp)->read32(__reg))
250 #define hme_write_rxd(__hp, __rxd, __flags, __addr) \
251 ((__hp)->write_rxd((__rxd), (__flags), (__addr)))
252 #define hme_write_txd(__hp, __txd, __flags, __addr) \
253 ((__hp)->write_txd((__txd), (__flags), (__addr)))
254 #define hme_read_desc32(__hp, __p) \
255 ((__hp)->read_desc32(__p))
256 #define hme_dma_map(__hp, __ptr, __size, __dir) \
257 ((__hp)->dma_map((__hp)->happy_dev, (__ptr), (__size), (__dir)))
258 #define hme_dma_unmap(__hp, __addr, __size, __dir) \
259 ((__hp)->dma_unmap((__hp)->happy_dev, (__addr), (__size), (__dir)))
260 #define hme_dma_sync_for_cpu(__hp, __addr, __size, __dir) \
261 ((__hp)->dma_sync_for_cpu((__hp)->happy_dev, (__addr), (__size), (__dir)))
262 #define hme_dma_sync_for_device(__hp, __addr, __size, __dir) \
263 ((__hp)->dma_sync_for_device((__hp)->happy_dev, (__addr), (__size), (__dir)))
266 /* SBUS only compilation */
267 #define hme_write32(__hp, __reg, __val) \
268 sbus_writel((__val), (__reg))
269 #define hme_read32(__hp, __reg) \
271 #define hme_write_rxd(__hp, __rxd, __flags, __addr) \
272 do { (__rxd)->rx_addr = (__addr); \
274 (__rxd)->rx_flags = (__flags); \
276 #define hme_write_txd(__hp, __txd, __flags, __addr) \
277 do { (__txd)->tx_addr = (__addr); \
279 (__txd)->tx_flags = (__flags); \
281 #define hme_read_desc32(__hp, __p) (*(__p))
282 #define hme_dma_map(__hp, __ptr, __size, __dir) \
283 sbus_map_single((__hp)->happy_dev, (__ptr), (__size), (__dir))
284 #define hme_dma_unmap(__hp, __addr, __size, __dir) \
285 sbus_unmap_single((__hp)->happy_dev, (__addr), (__size), (__dir))
286 #define hme_dma_sync_for_cpu(__hp, __addr, __size, __dir) \
287 sbus_dma_sync_single_for_cpu((__hp)->happy_dev, (__addr), (__size), (__dir))
288 #define hme_dma_sync_for_device(__hp, __addr, __size, __dir) \
289 sbus_dma_sync_single_for_device((__hp)->happy_dev, (__addr), (__size), (__dir))
291 /* PCI only compilation */
292 #define hme_write32(__hp, __reg, __val) \
293 writel((__val), (__reg))
294 #define hme_read32(__hp, __reg) \
296 #define hme_write_rxd(__hp, __rxd, __flags, __addr) \
297 do { (__rxd)->rx_addr = cpu_to_le32(__addr); \
299 (__rxd)->rx_flags = cpu_to_le32(__flags); \
301 #define hme_write_txd(__hp, __txd, __flags, __addr) \
302 do { (__txd)->tx_addr = cpu_to_le32(__addr); \
304 (__txd)->tx_flags = cpu_to_le32(__flags); \
306 #define hme_read_desc32(__hp, __p) cpu_to_le32p(__p)
307 #define hme_dma_map(__hp, __ptr, __size, __dir) \
308 pci_map_single((__hp)->happy_dev, (__ptr), (__size), (__dir))
309 #define hme_dma_unmap(__hp, __addr, __size, __dir) \
310 pci_unmap_single((__hp)->happy_dev, (__addr), (__size), (__dir))
311 #define hme_dma_sync_for_cpu(__hp, __addr, __size, __dir) \
312 pci_dma_sync_single_for_cpu((__hp)->happy_dev, (__addr), (__size), (__dir))
313 #define hme_dma_sync_for_device(__hp, __addr, __size, __dir) \
314 pci_dma_sync_single_for_device((__hp)->happy_dev, (__addr), (__size), (__dir))
319 #ifdef SBUS_DMA_BIDIRECTIONAL
320 # define DMA_BIDIRECTIONAL SBUS_DMA_BIDIRECTIONAL
322 # define DMA_BIDIRECTIONAL 0
325 #ifdef SBUS_DMA_FROMDEVICE
326 # define DMA_FROMDEVICE SBUS_DMA_FROMDEVICE
328 # define DMA_TODEVICE 1
331 #ifdef SBUS_DMA_TODEVICE
332 # define DMA_TODEVICE SBUS_DMA_TODEVICE
334 # define DMA_FROMDEVICE 2
338 /* Oh yes, the MIF BitBang is mighty fun to program. BitBucket is more like it. */
339 static void BB_PUT_BIT(struct happy_meal
*hp
, void __iomem
*tregs
, int bit
)
341 hme_write32(hp
, tregs
+ TCVR_BBDATA
, bit
);
342 hme_write32(hp
, tregs
+ TCVR_BBCLOCK
, 0);
343 hme_write32(hp
, tregs
+ TCVR_BBCLOCK
, 1);
347 static u32
BB_GET_BIT(struct happy_meal
*hp
, void __iomem
*tregs
, int internal
)
351 hme_write32(hp
, tregs
+ TCVR_BBCLOCK
, 0);
352 hme_write32(hp
, tregs
+ TCVR_BBCLOCK
, 1);
353 ret
= hme_read32(hp
, tregs
+ TCVR_CFG
);
355 ret
&= TCV_CFG_MDIO0
;
357 ret
&= TCV_CFG_MDIO1
;
363 static u32
BB_GET_BIT2(struct happy_meal
*hp
, void __iomem
*tregs
, int internal
)
367 hme_write32(hp
, tregs
+ TCVR_BBCLOCK
, 0);
369 retval
= hme_read32(hp
, tregs
+ TCVR_CFG
);
371 retval
&= TCV_CFG_MDIO0
;
373 retval
&= TCV_CFG_MDIO1
;
374 hme_write32(hp
, tregs
+ TCVR_BBCLOCK
, 1);
379 #define TCVR_FAILURE 0x80000000 /* Impossible MIF read value */
381 static int happy_meal_bb_read(struct happy_meal
*hp
,
382 void __iomem
*tregs
, int reg
)
388 ASD(("happy_meal_bb_read: reg=%d ", reg
));
390 /* Enable the MIF BitBang outputs. */
391 hme_write32(hp
, tregs
+ TCVR_BBOENAB
, 1);
393 /* Force BitBang into the idle state. */
394 for (i
= 0; i
< 32; i
++)
395 BB_PUT_BIT(hp
, tregs
, 1);
397 /* Give it the read sequence. */
398 BB_PUT_BIT(hp
, tregs
, 0);
399 BB_PUT_BIT(hp
, tregs
, 1);
400 BB_PUT_BIT(hp
, tregs
, 1);
401 BB_PUT_BIT(hp
, tregs
, 0);
403 /* Give it the PHY address. */
404 tmp
= hp
->paddr
& 0xff;
405 for (i
= 4; i
>= 0; i
--)
406 BB_PUT_BIT(hp
, tregs
, ((tmp
>> i
) & 1));
408 /* Tell it what register we want to read. */
410 for (i
= 4; i
>= 0; i
--)
411 BB_PUT_BIT(hp
, tregs
, ((tmp
>> i
) & 1));
413 /* Close down the MIF BitBang outputs. */
414 hme_write32(hp
, tregs
+ TCVR_BBOENAB
, 0);
416 /* Now read in the value. */
417 (void) BB_GET_BIT2(hp
, tregs
, (hp
->tcvr_type
== internal
));
418 for (i
= 15; i
>= 0; i
--)
419 retval
|= BB_GET_BIT2(hp
, tregs
, (hp
->tcvr_type
== internal
));
420 (void) BB_GET_BIT2(hp
, tregs
, (hp
->tcvr_type
== internal
));
421 (void) BB_GET_BIT2(hp
, tregs
, (hp
->tcvr_type
== internal
));
422 (void) BB_GET_BIT2(hp
, tregs
, (hp
->tcvr_type
== internal
));
423 ASD(("value=%x\n", retval
));
427 static void happy_meal_bb_write(struct happy_meal
*hp
,
428 void __iomem
*tregs
, int reg
,
429 unsigned short value
)
434 ASD(("happy_meal_bb_write: reg=%d value=%x\n", reg
, value
));
436 /* Enable the MIF BitBang outputs. */
437 hme_write32(hp
, tregs
+ TCVR_BBOENAB
, 1);
439 /* Force BitBang into the idle state. */
440 for (i
= 0; i
< 32; i
++)
441 BB_PUT_BIT(hp
, tregs
, 1);
443 /* Give it write sequence. */
444 BB_PUT_BIT(hp
, tregs
, 0);
445 BB_PUT_BIT(hp
, tregs
, 1);
446 BB_PUT_BIT(hp
, tregs
, 0);
447 BB_PUT_BIT(hp
, tregs
, 1);
449 /* Give it the PHY address. */
450 tmp
= (hp
->paddr
& 0xff);
451 for (i
= 4; i
>= 0; i
--)
452 BB_PUT_BIT(hp
, tregs
, ((tmp
>> i
) & 1));
454 /* Tell it what register we will be writing. */
456 for (i
= 4; i
>= 0; i
--)
457 BB_PUT_BIT(hp
, tregs
, ((tmp
>> i
) & 1));
459 /* Tell it to become ready for the bits. */
460 BB_PUT_BIT(hp
, tregs
, 1);
461 BB_PUT_BIT(hp
, tregs
, 0);
463 for (i
= 15; i
>= 0; i
--)
464 BB_PUT_BIT(hp
, tregs
, ((value
>> i
) & 1));
466 /* Close down the MIF BitBang outputs. */
467 hme_write32(hp
, tregs
+ TCVR_BBOENAB
, 0);
470 #define TCVR_READ_TRIES 16
472 static int happy_meal_tcvr_read(struct happy_meal
*hp
,
473 void __iomem
*tregs
, int reg
)
475 int tries
= TCVR_READ_TRIES
;
478 ASD(("happy_meal_tcvr_read: reg=0x%02x ", reg
));
479 if (hp
->tcvr_type
== none
) {
480 ASD(("no transceiver, value=TCVR_FAILURE\n"));
484 if (!(hp
->happy_flags
& HFLAG_FENABLE
)) {
485 ASD(("doing bit bang\n"));
486 return happy_meal_bb_read(hp
, tregs
, reg
);
489 hme_write32(hp
, tregs
+ TCVR_FRAME
,
490 (FRAME_READ
| (hp
->paddr
<< 23) | ((reg
& 0xff) << 18)));
491 while (!(hme_read32(hp
, tregs
+ TCVR_FRAME
) & 0x10000) && --tries
)
494 printk(KERN_ERR
"happy meal: Aieee, transceiver MIF read bolixed\n");
497 retval
= hme_read32(hp
, tregs
+ TCVR_FRAME
) & 0xffff;
498 ASD(("value=%04x\n", retval
));
502 #define TCVR_WRITE_TRIES 16
504 static void happy_meal_tcvr_write(struct happy_meal
*hp
,
505 void __iomem
*tregs
, int reg
,
506 unsigned short value
)
508 int tries
= TCVR_WRITE_TRIES
;
510 ASD(("happy_meal_tcvr_write: reg=0x%02x value=%04x\n", reg
, value
));
512 /* Welcome to Sun Microsystems, can I take your order please? */
513 if (!(hp
->happy_flags
& HFLAG_FENABLE
)) {
514 happy_meal_bb_write(hp
, tregs
, reg
, value
);
518 /* Would you like fries with that? */
519 hme_write32(hp
, tregs
+ TCVR_FRAME
,
520 (FRAME_WRITE
| (hp
->paddr
<< 23) |
521 ((reg
& 0xff) << 18) | (value
& 0xffff)));
522 while (!(hme_read32(hp
, tregs
+ TCVR_FRAME
) & 0x10000) && --tries
)
527 printk(KERN_ERR
"happy meal: Aieee, transceiver MIF write bolixed\n");
529 /* Fifty-two cents is your change, have a nice day. */
532 /* Auto negotiation. The scheme is very simple. We have a timer routine
533 * that keeps watching the auto negotiation process as it progresses.
534 * The DP83840 is first told to start doing it's thing, we set up the time
535 * and place the timer state machine in it's initial state.
537 * Here the timer peeks at the DP83840 status registers at each click to see
538 * if the auto negotiation has completed, we assume here that the DP83840 PHY
539 * will time out at some point and just tell us what (didn't) happen. For
540 * complete coverage we only allow so many of the ticks at this level to run,
541 * when this has expired we print a warning message and try another strategy.
542 * This "other" strategy is to force the interface into various speed/duplex
543 * configurations and we stop when we see a link-up condition before the
544 * maximum number of "peek" ticks have occurred.
546 * Once a valid link status has been detected we configure the BigMAC and
547 * the rest of the Happy Meal to speak the most efficient protocol we could
548 * get a clean link for. The priority for link configurations, highest first
550 * 100 Base-T Full Duplex
551 * 100 Base-T Half Duplex
552 * 10 Base-T Full Duplex
553 * 10 Base-T Half Duplex
555 * We start a new timer now, after a successful auto negotiation status has
556 * been detected. This timer just waits for the link-up bit to get set in
557 * the BMCR of the DP83840. When this occurs we print a kernel log message
558 * describing the link type in use and the fact that it is up.
560 * If a fatal error of some sort is signalled and detected in the interrupt
561 * service routine, and the chip is reset, or the link is ifconfig'd down
562 * and then back up, this entire process repeats itself all over again.
564 static int try_next_permutation(struct happy_meal
*hp
, void __iomem
*tregs
)
566 hp
->sw_bmcr
= happy_meal_tcvr_read(hp
, tregs
, MII_BMCR
);
568 /* Downgrade from full to half duplex. Only possible
571 if (hp
->sw_bmcr
& BMCR_FULLDPLX
) {
572 hp
->sw_bmcr
&= ~(BMCR_FULLDPLX
);
573 happy_meal_tcvr_write(hp
, tregs
, MII_BMCR
, hp
->sw_bmcr
);
577 /* Downgrade from 100 to 10. */
578 if (hp
->sw_bmcr
& BMCR_SPEED100
) {
579 hp
->sw_bmcr
&= ~(BMCR_SPEED100
);
580 happy_meal_tcvr_write(hp
, tregs
, MII_BMCR
, hp
->sw_bmcr
);
584 /* We've tried everything. */
588 static void display_link_mode(struct happy_meal
*hp
, void __iomem
*tregs
)
590 printk(KERN_INFO
"%s: Link is up using ", hp
->dev
->name
);
591 if (hp
->tcvr_type
== external
)
595 printk("transceiver at ");
596 hp
->sw_lpa
= happy_meal_tcvr_read(hp
, tregs
, MII_LPA
);
597 if (hp
->sw_lpa
& (LPA_100HALF
| LPA_100FULL
)) {
598 if (hp
->sw_lpa
& LPA_100FULL
)
599 printk("100Mb/s, Full Duplex.\n");
601 printk("100Mb/s, Half Duplex.\n");
603 if (hp
->sw_lpa
& LPA_10FULL
)
604 printk("10Mb/s, Full Duplex.\n");
606 printk("10Mb/s, Half Duplex.\n");
610 static void display_forced_link_mode(struct happy_meal
*hp
, void __iomem
*tregs
)
612 printk(KERN_INFO
"%s: Link has been forced up using ", hp
->dev
->name
);
613 if (hp
->tcvr_type
== external
)
617 printk("transceiver at ");
618 hp
->sw_bmcr
= happy_meal_tcvr_read(hp
, tregs
, MII_BMCR
);
619 if (hp
->sw_bmcr
& BMCR_SPEED100
)
623 if (hp
->sw_bmcr
& BMCR_FULLDPLX
)
624 printk("Full Duplex.\n");
626 printk("Half Duplex.\n");
629 static int set_happy_link_modes(struct happy_meal
*hp
, void __iomem
*tregs
)
633 /* All we care about is making sure the bigmac tx_cfg has a
634 * proper duplex setting.
636 if (hp
->timer_state
== arbwait
) {
637 hp
->sw_lpa
= happy_meal_tcvr_read(hp
, tregs
, MII_LPA
);
638 if (!(hp
->sw_lpa
& (LPA_10HALF
| LPA_10FULL
| LPA_100HALF
| LPA_100FULL
)))
640 if (hp
->sw_lpa
& LPA_100FULL
)
642 else if (hp
->sw_lpa
& LPA_100HALF
)
644 else if (hp
->sw_lpa
& LPA_10FULL
)
649 /* Forcing a link mode. */
650 hp
->sw_bmcr
= happy_meal_tcvr_read(hp
, tregs
, MII_BMCR
);
651 if (hp
->sw_bmcr
& BMCR_FULLDPLX
)
657 /* Before changing other bits in the tx_cfg register, and in
658 * general any of other the TX config registers too, you
661 * 2) Poll with reads until that bit reads back as zero
662 * 3) Make TX configuration changes
663 * 4) Set Enable once more
665 hme_write32(hp
, hp
->bigmacregs
+ BMAC_TXCFG
,
666 hme_read32(hp
, hp
->bigmacregs
+ BMAC_TXCFG
) &
667 ~(BIGMAC_TXCFG_ENABLE
));
668 while (hme_read32(hp
, hp
->bigmacregs
+ BMAC_TXCFG
) & BIGMAC_TXCFG_ENABLE
)
671 hp
->happy_flags
|= HFLAG_FULL
;
672 hme_write32(hp
, hp
->bigmacregs
+ BMAC_TXCFG
,
673 hme_read32(hp
, hp
->bigmacregs
+ BMAC_TXCFG
) |
674 BIGMAC_TXCFG_FULLDPLX
);
676 hp
->happy_flags
&= ~(HFLAG_FULL
);
677 hme_write32(hp
, hp
->bigmacregs
+ BMAC_TXCFG
,
678 hme_read32(hp
, hp
->bigmacregs
+ BMAC_TXCFG
) &
679 ~(BIGMAC_TXCFG_FULLDPLX
));
681 hme_write32(hp
, hp
->bigmacregs
+ BMAC_TXCFG
,
682 hme_read32(hp
, hp
->bigmacregs
+ BMAC_TXCFG
) |
683 BIGMAC_TXCFG_ENABLE
);
689 static int happy_meal_init(struct happy_meal
*hp
);
691 static int is_lucent_phy(struct happy_meal
*hp
)
693 void __iomem
*tregs
= hp
->tcvregs
;
694 unsigned short mr2
, mr3
;
697 mr2
= happy_meal_tcvr_read(hp
, tregs
, 2);
698 mr3
= happy_meal_tcvr_read(hp
, tregs
, 3);
699 if ((mr2
& 0xffff) == 0x0180 &&
700 ((mr3
& 0xffff) >> 10) == 0x1d)
706 static void happy_meal_timer(unsigned long data
)
708 struct happy_meal
*hp
= (struct happy_meal
*) data
;
709 void __iomem
*tregs
= hp
->tcvregs
;
710 int restart_timer
= 0;
712 spin_lock_irq(&hp
->happy_lock
);
715 switch(hp
->timer_state
) {
717 /* Only allow for 5 ticks, thats 10 seconds and much too
718 * long to wait for arbitration to complete.
720 if (hp
->timer_ticks
>= 10) {
721 /* Enter force mode. */
723 hp
->sw_bmcr
= happy_meal_tcvr_read(hp
, tregs
, MII_BMCR
);
724 printk(KERN_NOTICE
"%s: Auto-Negotiation unsuccessful, trying force link mode\n",
726 hp
->sw_bmcr
= BMCR_SPEED100
;
727 happy_meal_tcvr_write(hp
, tregs
, MII_BMCR
, hp
->sw_bmcr
);
729 if (!is_lucent_phy(hp
)) {
730 /* OK, seems we need do disable the transceiver for the first
731 * tick to make sure we get an accurate link state at the
734 hp
->sw_csconfig
= happy_meal_tcvr_read(hp
, tregs
, DP83840_CSCONFIG
);
735 hp
->sw_csconfig
&= ~(CSCONFIG_TCVDISAB
);
736 happy_meal_tcvr_write(hp
, tregs
, DP83840_CSCONFIG
, hp
->sw_csconfig
);
738 hp
->timer_state
= ltrywait
;
742 /* Anything interesting happen? */
743 hp
->sw_bmsr
= happy_meal_tcvr_read(hp
, tregs
, MII_BMSR
);
744 if (hp
->sw_bmsr
& BMSR_ANEGCOMPLETE
) {
747 /* Just what we've been waiting for... */
748 ret
= set_happy_link_modes(hp
, tregs
);
750 /* Ooops, something bad happened, go to force
753 * XXX Broken hubs which don't support 802.3u
754 * XXX auto-negotiation make this happen as well.
759 /* Success, at least so far, advance our state engine. */
760 hp
->timer_state
= lupwait
;
769 /* Auto negotiation was successful and we are awaiting a
770 * link up status. I have decided to let this timer run
771 * forever until some sort of error is signalled, reporting
772 * a message to the user at 10 second intervals.
774 hp
->sw_bmsr
= happy_meal_tcvr_read(hp
, tregs
, MII_BMSR
);
775 if (hp
->sw_bmsr
& BMSR_LSTATUS
) {
776 /* Wheee, it's up, display the link mode in use and put
777 * the timer to sleep.
779 display_link_mode(hp
, tregs
);
780 hp
->timer_state
= asleep
;
783 if (hp
->timer_ticks
>= 10) {
784 printk(KERN_NOTICE
"%s: Auto negotiation successful, link still "
785 "not completely up.\n", hp
->dev
->name
);
795 /* Making the timeout here too long can make it take
796 * annoyingly long to attempt all of the link mode
797 * permutations, but then again this is essentially
798 * error recovery code for the most part.
800 hp
->sw_bmsr
= happy_meal_tcvr_read(hp
, tregs
, MII_BMSR
);
801 hp
->sw_csconfig
= happy_meal_tcvr_read(hp
, tregs
, DP83840_CSCONFIG
);
802 if (hp
->timer_ticks
== 1) {
803 if (!is_lucent_phy(hp
)) {
804 /* Re-enable transceiver, we'll re-enable the transceiver next
805 * tick, then check link state on the following tick.
807 hp
->sw_csconfig
|= CSCONFIG_TCVDISAB
;
808 happy_meal_tcvr_write(hp
, tregs
,
809 DP83840_CSCONFIG
, hp
->sw_csconfig
);
814 if (hp
->timer_ticks
== 2) {
815 if (!is_lucent_phy(hp
)) {
816 hp
->sw_csconfig
&= ~(CSCONFIG_TCVDISAB
);
817 happy_meal_tcvr_write(hp
, tregs
,
818 DP83840_CSCONFIG
, hp
->sw_csconfig
);
823 if (hp
->sw_bmsr
& BMSR_LSTATUS
) {
824 /* Force mode selection success. */
825 display_forced_link_mode(hp
, tregs
);
826 set_happy_link_modes(hp
, tregs
); /* XXX error? then what? */
827 hp
->timer_state
= asleep
;
830 if (hp
->timer_ticks
>= 4) { /* 6 seconds or so... */
833 ret
= try_next_permutation(hp
, tregs
);
835 /* Aieee, tried them all, reset the
836 * chip and try all over again.
839 /* Let the user know... */
840 printk(KERN_NOTICE
"%s: Link down, cable problem?\n",
843 ret
= happy_meal_init(hp
);
846 printk(KERN_ERR
"%s: Error, cannot re-init the "
847 "Happy Meal.\n", hp
->dev
->name
);
851 if (!is_lucent_phy(hp
)) {
852 hp
->sw_csconfig
= happy_meal_tcvr_read(hp
, tregs
,
854 hp
->sw_csconfig
|= CSCONFIG_TCVDISAB
;
855 happy_meal_tcvr_write(hp
, tregs
,
856 DP83840_CSCONFIG
, hp
->sw_csconfig
);
868 /* Can't happens.... */
869 printk(KERN_ERR
"%s: Aieee, link timer is asleep but we got one anyways!\n",
873 hp
->timer_state
= asleep
; /* foo on you */
878 hp
->happy_timer
.expires
= jiffies
+ ((12 * HZ
)/10); /* 1.2 sec. */
879 add_timer(&hp
->happy_timer
);
883 spin_unlock_irq(&hp
->happy_lock
);
886 #define TX_RESET_TRIES 32
887 #define RX_RESET_TRIES 32
889 /* hp->happy_lock must be held */
890 static void happy_meal_tx_reset(struct happy_meal
*hp
, void __iomem
*bregs
)
892 int tries
= TX_RESET_TRIES
;
894 HMD(("happy_meal_tx_reset: reset, "));
896 /* Would you like to try our SMCC Delux? */
897 hme_write32(hp
, bregs
+ BMAC_TXSWRESET
, 0);
898 while ((hme_read32(hp
, bregs
+ BMAC_TXSWRESET
) & 1) && --tries
)
901 /* Lettuce, tomato, buggy hardware (no extra charge)? */
903 printk(KERN_ERR
"happy meal: Transceiver BigMac ATTACK!");
909 /* hp->happy_lock must be held */
910 static void happy_meal_rx_reset(struct happy_meal
*hp
, void __iomem
*bregs
)
912 int tries
= RX_RESET_TRIES
;
914 HMD(("happy_meal_rx_reset: reset, "));
916 /* We have a special on GNU/Viking hardware bugs today. */
917 hme_write32(hp
, bregs
+ BMAC_RXSWRESET
, 0);
918 while ((hme_read32(hp
, bregs
+ BMAC_RXSWRESET
) & 1) && --tries
)
921 /* Will that be all? */
923 printk(KERN_ERR
"happy meal: Receiver BigMac ATTACK!");
925 /* Don't forget your vik_1137125_wa. Have a nice day. */
929 #define STOP_TRIES 16
931 /* hp->happy_lock must be held */
932 static void happy_meal_stop(struct happy_meal
*hp
, void __iomem
*gregs
)
934 int tries
= STOP_TRIES
;
936 HMD(("happy_meal_stop: reset, "));
938 /* We're consolidating our STB products, it's your lucky day. */
939 hme_write32(hp
, gregs
+ GREG_SWRESET
, GREG_RESET_ALL
);
940 while (hme_read32(hp
, gregs
+ GREG_SWRESET
) && --tries
)
943 /* Come back next week when we are "Sun Microelectronics". */
945 printk(KERN_ERR
"happy meal: Fry guys.");
947 /* Remember: "Different name, same old buggy as shit hardware." */
951 /* hp->happy_lock must be held */
952 static void happy_meal_get_counters(struct happy_meal
*hp
, void __iomem
*bregs
)
954 struct net_device_stats
*stats
= &hp
->net_stats
;
956 stats
->rx_crc_errors
+= hme_read32(hp
, bregs
+ BMAC_RCRCECTR
);
957 hme_write32(hp
, bregs
+ BMAC_RCRCECTR
, 0);
959 stats
->rx_frame_errors
+= hme_read32(hp
, bregs
+ BMAC_UNALECTR
);
960 hme_write32(hp
, bregs
+ BMAC_UNALECTR
, 0);
962 stats
->rx_length_errors
+= hme_read32(hp
, bregs
+ BMAC_GLECTR
);
963 hme_write32(hp
, bregs
+ BMAC_GLECTR
, 0);
965 stats
->tx_aborted_errors
+= hme_read32(hp
, bregs
+ BMAC_EXCTR
);
968 (hme_read32(hp
, bregs
+ BMAC_EXCTR
) +
969 hme_read32(hp
, bregs
+ BMAC_LTCTR
));
970 hme_write32(hp
, bregs
+ BMAC_EXCTR
, 0);
971 hme_write32(hp
, bregs
+ BMAC_LTCTR
, 0);
974 /* hp->happy_lock must be held */
975 static void happy_meal_poll_stop(struct happy_meal
*hp
, void __iomem
*tregs
)
977 ASD(("happy_meal_poll_stop: "));
979 /* If polling disabled or not polling already, nothing to do. */
980 if ((hp
->happy_flags
& (HFLAG_POLLENABLE
| HFLAG_POLL
)) !=
981 (HFLAG_POLLENABLE
| HFLAG_POLL
)) {
982 HMD(("not polling, return\n"));
986 /* Shut up the MIF. */
987 ASD(("were polling, mif ints off, "));
988 hme_write32(hp
, tregs
+ TCVR_IMASK
, 0xffff);
990 /* Turn off polling. */
991 ASD(("polling off, "));
992 hme_write32(hp
, tregs
+ TCVR_CFG
,
993 hme_read32(hp
, tregs
+ TCVR_CFG
) & ~(TCV_CFG_PENABLE
));
995 /* We are no longer polling. */
996 hp
->happy_flags
&= ~(HFLAG_POLL
);
998 /* Let the bits set. */
1003 /* Only Sun can take such nice parts and fuck up the programming interface
1004 * like this. Good job guys...
1006 #define TCVR_RESET_TRIES 16 /* It should reset quickly */
1007 #define TCVR_UNISOLATE_TRIES 32 /* Dis-isolation can take longer. */
1009 /* hp->happy_lock must be held */
1010 static int happy_meal_tcvr_reset(struct happy_meal
*hp
, void __iomem
*tregs
)
1013 int result
, tries
= TCVR_RESET_TRIES
;
1015 tconfig
= hme_read32(hp
, tregs
+ TCVR_CFG
);
1016 ASD(("happy_meal_tcvr_reset: tcfg<%08lx> ", tconfig
));
1017 if (hp
->tcvr_type
== external
) {
1019 hme_write32(hp
, tregs
+ TCVR_CFG
, tconfig
& ~(TCV_CFG_PSELECT
));
1020 hp
->tcvr_type
= internal
;
1021 hp
->paddr
= TCV_PADDR_ITX
;
1023 happy_meal_tcvr_write(hp
, tregs
, MII_BMCR
,
1024 (BMCR_LOOPBACK
|BMCR_PDOWN
|BMCR_ISOLATE
));
1025 result
= happy_meal_tcvr_read(hp
, tregs
, MII_BMCR
);
1026 if (result
== TCVR_FAILURE
) {
1027 ASD(("phyread_fail>\n"));
1030 ASD(("phyread_ok,PSELECT>"));
1031 hme_write32(hp
, tregs
+ TCVR_CFG
, tconfig
| TCV_CFG_PSELECT
);
1032 hp
->tcvr_type
= external
;
1033 hp
->paddr
= TCV_PADDR_ETX
;
1035 if (tconfig
& TCV_CFG_MDIO1
) {
1036 ASD(("internal<PSELECT,"));
1037 hme_write32(hp
, tregs
+ TCVR_CFG
, (tconfig
| TCV_CFG_PSELECT
));
1039 happy_meal_tcvr_write(hp
, tregs
, MII_BMCR
,
1040 (BMCR_LOOPBACK
|BMCR_PDOWN
|BMCR_ISOLATE
));
1041 result
= happy_meal_tcvr_read(hp
, tregs
, MII_BMCR
);
1042 if (result
== TCVR_FAILURE
) {
1043 ASD(("phyread_fail>\n"));
1046 ASD(("phyread_ok,~PSELECT>"));
1047 hme_write32(hp
, tregs
+ TCVR_CFG
, (tconfig
& ~(TCV_CFG_PSELECT
)));
1048 hp
->tcvr_type
= internal
;
1049 hp
->paddr
= TCV_PADDR_ITX
;
1053 ASD(("BMCR_RESET "));
1054 happy_meal_tcvr_write(hp
, tregs
, MII_BMCR
, BMCR_RESET
);
1057 result
= happy_meal_tcvr_read(hp
, tregs
, MII_BMCR
);
1058 if (result
== TCVR_FAILURE
)
1060 hp
->sw_bmcr
= result
;
1061 if (!(result
& BMCR_RESET
))
1066 ASD(("BMCR RESET FAILED!\n"));
1069 ASD(("RESET_OK\n"));
1071 /* Get fresh copies of the PHY registers. */
1072 hp
->sw_bmsr
= happy_meal_tcvr_read(hp
, tregs
, MII_BMSR
);
1073 hp
->sw_physid1
= happy_meal_tcvr_read(hp
, tregs
, MII_PHYSID1
);
1074 hp
->sw_physid2
= happy_meal_tcvr_read(hp
, tregs
, MII_PHYSID2
);
1075 hp
->sw_advertise
= happy_meal_tcvr_read(hp
, tregs
, MII_ADVERTISE
);
1078 hp
->sw_bmcr
&= ~(BMCR_ISOLATE
);
1079 happy_meal_tcvr_write(hp
, tregs
, MII_BMCR
, hp
->sw_bmcr
);
1081 tries
= TCVR_UNISOLATE_TRIES
;
1083 result
= happy_meal_tcvr_read(hp
, tregs
, MII_BMCR
);
1084 if (result
== TCVR_FAILURE
)
1086 if (!(result
& BMCR_ISOLATE
))
1091 ASD((" FAILED!\n"));
1094 ASD((" SUCCESS and CSCONFIG_DFBYPASS\n"));
1095 if (!is_lucent_phy(hp
)) {
1096 result
= happy_meal_tcvr_read(hp
, tregs
,
1098 happy_meal_tcvr_write(hp
, tregs
,
1099 DP83840_CSCONFIG
, (result
| CSCONFIG_DFBYPASS
));
1104 /* Figure out whether we have an internal or external transceiver.
1106 * hp->happy_lock must be held
1108 static void happy_meal_transceiver_check(struct happy_meal
*hp
, void __iomem
*tregs
)
1110 unsigned long tconfig
= hme_read32(hp
, tregs
+ TCVR_CFG
);
1112 ASD(("happy_meal_transceiver_check: tcfg=%08lx ", tconfig
));
1113 if (hp
->happy_flags
& HFLAG_POLL
) {
1114 /* If we are polling, we must stop to get the transceiver type. */
1115 ASD(("<polling> "));
1116 if (hp
->tcvr_type
== internal
) {
1117 if (tconfig
& TCV_CFG_MDIO1
) {
1118 ASD(("<internal> <poll stop> "));
1119 happy_meal_poll_stop(hp
, tregs
);
1120 hp
->paddr
= TCV_PADDR_ETX
;
1121 hp
->tcvr_type
= external
;
1122 ASD(("<external>\n"));
1123 tconfig
&= ~(TCV_CFG_PENABLE
);
1124 tconfig
|= TCV_CFG_PSELECT
;
1125 hme_write32(hp
, tregs
+ TCVR_CFG
, tconfig
);
1128 if (hp
->tcvr_type
== external
) {
1129 ASD(("<external> "));
1130 if (!(hme_read32(hp
, tregs
+ TCVR_STATUS
) >> 16)) {
1131 ASD(("<poll stop> "));
1132 happy_meal_poll_stop(hp
, tregs
);
1133 hp
->paddr
= TCV_PADDR_ITX
;
1134 hp
->tcvr_type
= internal
;
1135 ASD(("<internal>\n"));
1136 hme_write32(hp
, tregs
+ TCVR_CFG
,
1137 hme_read32(hp
, tregs
+ TCVR_CFG
) &
1138 ~(TCV_CFG_PSELECT
));
1146 u32 reread
= hme_read32(hp
, tregs
+ TCVR_CFG
);
1148 /* Else we can just work off of the MDIO bits. */
1149 ASD(("<not polling> "));
1150 if (reread
& TCV_CFG_MDIO1
) {
1151 hme_write32(hp
, tregs
+ TCVR_CFG
, tconfig
| TCV_CFG_PSELECT
);
1152 hp
->paddr
= TCV_PADDR_ETX
;
1153 hp
->tcvr_type
= external
;
1154 ASD(("<external>\n"));
1156 if (reread
& TCV_CFG_MDIO0
) {
1157 hme_write32(hp
, tregs
+ TCVR_CFG
,
1158 tconfig
& ~(TCV_CFG_PSELECT
));
1159 hp
->paddr
= TCV_PADDR_ITX
;
1160 hp
->tcvr_type
= internal
;
1161 ASD(("<internal>\n"));
1163 printk(KERN_ERR
"happy meal: Transceiver and a coke please.");
1164 hp
->tcvr_type
= none
; /* Grrr... */
1171 /* The receive ring buffers are a bit tricky to get right. Here goes...
1173 * The buffers we dma into must be 64 byte aligned. So we use a special
1174 * alloc_skb() routine for the happy meal to allocate 64 bytes more than
1177 * We use skb_reserve() to align the data block we get in the skb. We
1178 * also program the etxregs->cfg register to use an offset of 2. This
1179 * imperical constant plus the ethernet header size will always leave
1180 * us with a nicely aligned ip header once we pass things up to the
1183 * The numbers work out to:
1185 * Max ethernet frame size 1518
1186 * Ethernet header size 14
1187 * Happy Meal base offset 2
1189 * Say a skb data area is at 0xf001b010, and its size alloced is
1190 * (ETH_FRAME_LEN + 64 + 2) = (1514 + 64 + 2) = 1580 bytes.
1192 * First our alloc_skb() routine aligns the data base to a 64 byte
1193 * boundary. We now have 0xf001b040 as our skb data address. We
1194 * plug this into the receive descriptor address.
1196 * Next, we skb_reserve() 2 bytes to account for the Happy Meal offset.
1197 * So now the data we will end up looking at starts at 0xf001b042. When
1198 * the packet arrives, we will check out the size received and subtract
1199 * this from the skb->length. Then we just pass the packet up to the
1200 * protocols as is, and allocate a new skb to replace this slot we have
1201 * just received from.
1203 * The ethernet layer will strip the ether header from the front of the
1204 * skb we just sent to it, this leaves us with the ip header sitting
1205 * nicely aligned at 0xf001b050. Also, for tcp and udp packets the
1206 * Happy Meal has even checksummed the tcp/udp data for us. The 16
1207 * bit checksum is obtained from the low bits of the receive descriptor
1210 * skb->csum = rxd->rx_flags & 0xffff;
1211 * skb->ip_summed = CHECKSUM_HW;
1213 * before sending off the skb to the protocols, and we are good as gold.
1215 static void happy_meal_clean_rings(struct happy_meal
*hp
)
1219 for (i
= 0; i
< RX_RING_SIZE
; i
++) {
1220 if (hp
->rx_skbs
[i
] != NULL
) {
1221 struct sk_buff
*skb
= hp
->rx_skbs
[i
];
1222 struct happy_meal_rxd
*rxd
;
1225 rxd
= &hp
->happy_block
->happy_meal_rxd
[i
];
1226 dma_addr
= hme_read_desc32(hp
, &rxd
->rx_addr
);
1227 hme_dma_unmap(hp
, dma_addr
, RX_BUF_ALLOC_SIZE
, DMA_FROMDEVICE
);
1228 dev_kfree_skb_any(skb
);
1229 hp
->rx_skbs
[i
] = NULL
;
1233 for (i
= 0; i
< TX_RING_SIZE
; i
++) {
1234 if (hp
->tx_skbs
[i
] != NULL
) {
1235 struct sk_buff
*skb
= hp
->tx_skbs
[i
];
1236 struct happy_meal_txd
*txd
;
1240 hp
->tx_skbs
[i
] = NULL
;
1242 for (frag
= 0; frag
<= skb_shinfo(skb
)->nr_frags
; frag
++) {
1243 txd
= &hp
->happy_block
->happy_meal_txd
[i
];
1244 dma_addr
= hme_read_desc32(hp
, &txd
->tx_addr
);
1245 hme_dma_unmap(hp
, dma_addr
,
1246 (hme_read_desc32(hp
, &txd
->tx_flags
)
1250 if (frag
!= skb_shinfo(skb
)->nr_frags
)
1254 dev_kfree_skb_any(skb
);
1259 /* hp->happy_lock must be held */
1260 static void happy_meal_init_rings(struct happy_meal
*hp
)
1262 struct hmeal_init_block
*hb
= hp
->happy_block
;
1263 struct net_device
*dev
= hp
->dev
;
1266 HMD(("happy_meal_init_rings: counters to zero, "));
1267 hp
->rx_new
= hp
->rx_old
= hp
->tx_new
= hp
->tx_old
= 0;
1269 /* Free any skippy bufs left around in the rings. */
1271 happy_meal_clean_rings(hp
);
1273 /* Now get new skippy bufs for the receive ring. */
1274 HMD(("init rxring, "));
1275 for (i
= 0; i
< RX_RING_SIZE
; i
++) {
1276 struct sk_buff
*skb
;
1278 skb
= happy_meal_alloc_skb(RX_BUF_ALLOC_SIZE
, GFP_ATOMIC
);
1280 hme_write_rxd(hp
, &hb
->happy_meal_rxd
[i
], 0, 0);
1283 hp
->rx_skbs
[i
] = skb
;
1286 /* Because we reserve afterwards. */
1287 skb_put(skb
, (ETH_FRAME_LEN
+ RX_OFFSET
));
1288 hme_write_rxd(hp
, &hb
->happy_meal_rxd
[i
],
1289 (RXFLAG_OWN
| ((RX_BUF_ALLOC_SIZE
- RX_OFFSET
) << 16)),
1290 hme_dma_map(hp
, skb
->data
, RX_BUF_ALLOC_SIZE
, DMA_FROMDEVICE
));
1291 skb_reserve(skb
, RX_OFFSET
);
1294 HMD(("init txring, "));
1295 for (i
= 0; i
< TX_RING_SIZE
; i
++)
1296 hme_write_txd(hp
, &hb
->happy_meal_txd
[i
], 0, 0);
1301 /* hp->happy_lock must be held */
1302 static void happy_meal_begin_auto_negotiation(struct happy_meal
*hp
,
1303 void __iomem
*tregs
,
1304 struct ethtool_cmd
*ep
)
1308 /* Read all of the registers we are interested in now. */
1309 hp
->sw_bmsr
= happy_meal_tcvr_read(hp
, tregs
, MII_BMSR
);
1310 hp
->sw_bmcr
= happy_meal_tcvr_read(hp
, tregs
, MII_BMCR
);
1311 hp
->sw_physid1
= happy_meal_tcvr_read(hp
, tregs
, MII_PHYSID1
);
1312 hp
->sw_physid2
= happy_meal_tcvr_read(hp
, tregs
, MII_PHYSID2
);
1314 /* XXX Check BMSR_ANEGCAPABLE, should not be necessary though. */
1316 hp
->sw_advertise
= happy_meal_tcvr_read(hp
, tregs
, MII_ADVERTISE
);
1317 if (ep
== NULL
|| ep
->autoneg
== AUTONEG_ENABLE
) {
1318 /* Advertise everything we can support. */
1319 if (hp
->sw_bmsr
& BMSR_10HALF
)
1320 hp
->sw_advertise
|= (ADVERTISE_10HALF
);
1322 hp
->sw_advertise
&= ~(ADVERTISE_10HALF
);
1324 if (hp
->sw_bmsr
& BMSR_10FULL
)
1325 hp
->sw_advertise
|= (ADVERTISE_10FULL
);
1327 hp
->sw_advertise
&= ~(ADVERTISE_10FULL
);
1328 if (hp
->sw_bmsr
& BMSR_100HALF
)
1329 hp
->sw_advertise
|= (ADVERTISE_100HALF
);
1331 hp
->sw_advertise
&= ~(ADVERTISE_100HALF
);
1332 if (hp
->sw_bmsr
& BMSR_100FULL
)
1333 hp
->sw_advertise
|= (ADVERTISE_100FULL
);
1335 hp
->sw_advertise
&= ~(ADVERTISE_100FULL
);
1336 happy_meal_tcvr_write(hp
, tregs
, MII_ADVERTISE
, hp
->sw_advertise
);
1338 /* XXX Currently no Happy Meal cards I know off support 100BaseT4,
1339 * XXX and this is because the DP83840 does not support it, changes
1340 * XXX would need to be made to the tx/rx logic in the driver as well
1341 * XXX so I completely skip checking for it in the BMSR for now.
1344 #ifdef AUTO_SWITCH_DEBUG
1345 ASD(("%s: Advertising [ ", hp
->dev
->name
));
1346 if (hp
->sw_advertise
& ADVERTISE_10HALF
)
1348 if (hp
->sw_advertise
& ADVERTISE_10FULL
)
1350 if (hp
->sw_advertise
& ADVERTISE_100HALF
)
1352 if (hp
->sw_advertise
& ADVERTISE_100FULL
)
1356 /* Enable Auto-Negotiation, this is usually on already... */
1357 hp
->sw_bmcr
|= BMCR_ANENABLE
;
1358 happy_meal_tcvr_write(hp
, tregs
, MII_BMCR
, hp
->sw_bmcr
);
1360 /* Restart it to make sure it is going. */
1361 hp
->sw_bmcr
|= BMCR_ANRESTART
;
1362 happy_meal_tcvr_write(hp
, tregs
, MII_BMCR
, hp
->sw_bmcr
);
1364 /* BMCR_ANRESTART self clears when the process has begun. */
1366 timeout
= 64; /* More than enough. */
1368 hp
->sw_bmcr
= happy_meal_tcvr_read(hp
, tregs
, MII_BMCR
);
1369 if (!(hp
->sw_bmcr
& BMCR_ANRESTART
))
1370 break; /* got it. */
1374 printk(KERN_ERR
"%s: Happy Meal would not start auto negotiation "
1375 "BMCR=0x%04x\n", hp
->dev
->name
, hp
->sw_bmcr
);
1376 printk(KERN_NOTICE
"%s: Performing force link detection.\n",
1380 hp
->timer_state
= arbwait
;
1384 /* Force the link up, trying first a particular mode.
1385 * Either we are here at the request of ethtool or
1386 * because the Happy Meal would not start to autoneg.
1389 /* Disable auto-negotiation in BMCR, enable the duplex and
1390 * speed setting, init the timer state machine, and fire it off.
1392 if (ep
== NULL
|| ep
->autoneg
== AUTONEG_ENABLE
) {
1393 hp
->sw_bmcr
= BMCR_SPEED100
;
1395 if (ep
->speed
== SPEED_100
)
1396 hp
->sw_bmcr
= BMCR_SPEED100
;
1399 if (ep
->duplex
== DUPLEX_FULL
)
1400 hp
->sw_bmcr
|= BMCR_FULLDPLX
;
1402 happy_meal_tcvr_write(hp
, tregs
, MII_BMCR
, hp
->sw_bmcr
);
1404 if (!is_lucent_phy(hp
)) {
1405 /* OK, seems we need do disable the transceiver for the first
1406 * tick to make sure we get an accurate link state at the
1409 hp
->sw_csconfig
= happy_meal_tcvr_read(hp
, tregs
,
1411 hp
->sw_csconfig
&= ~(CSCONFIG_TCVDISAB
);
1412 happy_meal_tcvr_write(hp
, tregs
, DP83840_CSCONFIG
,
1415 hp
->timer_state
= ltrywait
;
1418 hp
->timer_ticks
= 0;
1419 hp
->happy_timer
.expires
= jiffies
+ (12 * HZ
)/10; /* 1.2 sec. */
1420 hp
->happy_timer
.data
= (unsigned long) hp
;
1421 hp
->happy_timer
.function
= &happy_meal_timer
;
1422 add_timer(&hp
->happy_timer
);
1425 /* hp->happy_lock must be held */
1426 static int happy_meal_init(struct happy_meal
*hp
)
1428 void __iomem
*gregs
= hp
->gregs
;
1429 void __iomem
*etxregs
= hp
->etxregs
;
1430 void __iomem
*erxregs
= hp
->erxregs
;
1431 void __iomem
*bregs
= hp
->bigmacregs
;
1432 void __iomem
*tregs
= hp
->tcvregs
;
1434 unsigned char *e
= &hp
->dev
->dev_addr
[0];
1436 /* If auto-negotiation timer is running, kill it. */
1437 del_timer(&hp
->happy_timer
);
1439 HMD(("happy_meal_init: happy_flags[%08x] ",
1441 if (!(hp
->happy_flags
& HFLAG_INIT
)) {
1442 HMD(("set HFLAG_INIT, "));
1443 hp
->happy_flags
|= HFLAG_INIT
;
1444 happy_meal_get_counters(hp
, bregs
);
1448 HMD(("to happy_meal_poll_stop\n"));
1449 happy_meal_poll_stop(hp
, tregs
);
1451 /* Stop transmitter and receiver. */
1452 HMD(("happy_meal_init: to happy_meal_stop\n"));
1453 happy_meal_stop(hp
, gregs
);
1455 /* Alloc and reset the tx/rx descriptor chains. */
1456 HMD(("happy_meal_init: to happy_meal_init_rings\n"));
1457 happy_meal_init_rings(hp
);
1459 /* Shut up the MIF. */
1460 HMD(("happy_meal_init: Disable all MIF irqs (old[%08x]), ",
1461 hme_read32(hp
, tregs
+ TCVR_IMASK
)));
1462 hme_write32(hp
, tregs
+ TCVR_IMASK
, 0xffff);
1464 /* See if we can enable the MIF frame on this card to speak to the DP83840. */
1465 if (hp
->happy_flags
& HFLAG_FENABLE
) {
1466 HMD(("use frame old[%08x], ",
1467 hme_read32(hp
, tregs
+ TCVR_CFG
)));
1468 hme_write32(hp
, tregs
+ TCVR_CFG
,
1469 hme_read32(hp
, tregs
+ TCVR_CFG
) & ~(TCV_CFG_BENABLE
));
1471 HMD(("use bitbang old[%08x], ",
1472 hme_read32(hp
, tregs
+ TCVR_CFG
)));
1473 hme_write32(hp
, tregs
+ TCVR_CFG
,
1474 hme_read32(hp
, tregs
+ TCVR_CFG
) | TCV_CFG_BENABLE
);
1477 /* Check the state of the transceiver. */
1478 HMD(("to happy_meal_transceiver_check\n"));
1479 happy_meal_transceiver_check(hp
, tregs
);
1481 /* Put the Big Mac into a sane state. */
1482 HMD(("happy_meal_init: "));
1483 switch(hp
->tcvr_type
) {
1485 /* Cannot operate if we don't know the transceiver type! */
1486 HMD(("AAIEEE no transceiver type, EAGAIN"));
1490 /* Using the MII buffers. */
1491 HMD(("internal, using MII, "));
1492 hme_write32(hp
, bregs
+ BMAC_XIFCFG
, 0);
1496 /* Not using the MII, disable it. */
1497 HMD(("external, disable MII, "));
1498 hme_write32(hp
, bregs
+ BMAC_XIFCFG
, BIGMAC_XCFG_MIIDISAB
);
1502 if (happy_meal_tcvr_reset(hp
, tregs
))
1505 /* Reset the Happy Meal Big Mac transceiver and the receiver. */
1506 HMD(("tx/rx reset, "));
1507 happy_meal_tx_reset(hp
, bregs
);
1508 happy_meal_rx_reset(hp
, bregs
);
1510 /* Set jam size and inter-packet gaps to reasonable defaults. */
1511 HMD(("jsize/ipg1/ipg2, "));
1512 hme_write32(hp
, bregs
+ BMAC_JSIZE
, DEFAULT_JAMSIZE
);
1513 hme_write32(hp
, bregs
+ BMAC_IGAP1
, DEFAULT_IPG1
);
1514 hme_write32(hp
, bregs
+ BMAC_IGAP2
, DEFAULT_IPG2
);
1516 /* Load up the MAC address and random seed. */
1517 HMD(("rseed/macaddr, "));
1519 /* The docs recommend to use the 10LSB of our MAC here. */
1520 hme_write32(hp
, bregs
+ BMAC_RSEED
, ((e
[5] | e
[4]<<8)&0x3ff));
1522 hme_write32(hp
, bregs
+ BMAC_MACADDR2
, ((e
[4] << 8) | e
[5]));
1523 hme_write32(hp
, bregs
+ BMAC_MACADDR1
, ((e
[2] << 8) | e
[3]));
1524 hme_write32(hp
, bregs
+ BMAC_MACADDR0
, ((e
[0] << 8) | e
[1]));
1527 if ((hp
->dev
->flags
& IFF_ALLMULTI
) ||
1528 (hp
->dev
->mc_count
> 64)) {
1529 hme_write32(hp
, bregs
+ BMAC_HTABLE0
, 0xffff);
1530 hme_write32(hp
, bregs
+ BMAC_HTABLE1
, 0xffff);
1531 hme_write32(hp
, bregs
+ BMAC_HTABLE2
, 0xffff);
1532 hme_write32(hp
, bregs
+ BMAC_HTABLE3
, 0xffff);
1533 } else if ((hp
->dev
->flags
& IFF_PROMISC
) == 0) {
1535 struct dev_mc_list
*dmi
= hp
->dev
->mc_list
;
1540 for (i
= 0; i
< 4; i
++)
1543 for (i
= 0; i
< hp
->dev
->mc_count
; i
++) {
1544 addrs
= dmi
->dmi_addr
;
1550 crc
= ether_crc_le(6, addrs
);
1552 hash_table
[crc
>> 4] |= 1 << (crc
& 0xf);
1554 hme_write32(hp
, bregs
+ BMAC_HTABLE0
, hash_table
[0]);
1555 hme_write32(hp
, bregs
+ BMAC_HTABLE1
, hash_table
[1]);
1556 hme_write32(hp
, bregs
+ BMAC_HTABLE2
, hash_table
[2]);
1557 hme_write32(hp
, bregs
+ BMAC_HTABLE3
, hash_table
[3]);
1559 hme_write32(hp
, bregs
+ BMAC_HTABLE3
, 0);
1560 hme_write32(hp
, bregs
+ BMAC_HTABLE2
, 0);
1561 hme_write32(hp
, bregs
+ BMAC_HTABLE1
, 0);
1562 hme_write32(hp
, bregs
+ BMAC_HTABLE0
, 0);
1565 /* Set the RX and TX ring ptrs. */
1566 HMD(("ring ptrs rxr[%08x] txr[%08x]\n",
1567 ((__u32
)hp
->hblock_dvma
+ hblock_offset(happy_meal_rxd
, 0)),
1568 ((__u32
)hp
->hblock_dvma
+ hblock_offset(happy_meal_txd
, 0))));
1569 hme_write32(hp
, erxregs
+ ERX_RING
,
1570 ((__u32
)hp
->hblock_dvma
+ hblock_offset(happy_meal_rxd
, 0)));
1571 hme_write32(hp
, etxregs
+ ETX_RING
,
1572 ((__u32
)hp
->hblock_dvma
+ hblock_offset(happy_meal_txd
, 0)));
1574 /* Parity issues in the ERX unit of some HME revisions can cause some
1575 * registers to not be written unless their parity is even. Detect such
1576 * lost writes and simply rewrite with a low bit set (which will be ignored
1577 * since the rxring needs to be 2K aligned).
1579 if (hme_read32(hp
, erxregs
+ ERX_RING
) !=
1580 ((__u32
)hp
->hblock_dvma
+ hblock_offset(happy_meal_rxd
, 0)))
1581 hme_write32(hp
, erxregs
+ ERX_RING
,
1582 ((__u32
)hp
->hblock_dvma
+ hblock_offset(happy_meal_rxd
, 0))
1585 /* Set the supported burst sizes. */
1586 HMD(("happy_meal_init: old[%08x] bursts<",
1587 hme_read32(hp
, gregs
+ GREG_CFG
)));
1589 #ifndef CONFIG_SPARC
1590 /* It is always PCI and can handle 64byte bursts. */
1591 hme_write32(hp
, gregs
+ GREG_CFG
, GREG_CFG_BURST64
);
1593 if ((hp
->happy_bursts
& DMA_BURST64
) &&
1594 ((hp
->happy_flags
& HFLAG_PCI
) != 0
1596 || sbus_can_burst64(hp
->happy_dev
)
1599 u32 gcfg
= GREG_CFG_BURST64
;
1601 /* I have no idea if I should set the extended
1602 * transfer mode bit for Cheerio, so for now I
1606 if ((hp
->happy_flags
& HFLAG_PCI
) == 0 &&
1607 sbus_can_dma_64bit(hp
->happy_dev
)) {
1608 sbus_set_sbus64(hp
->happy_dev
,
1610 gcfg
|= GREG_CFG_64BIT
;
1615 hme_write32(hp
, gregs
+ GREG_CFG
, gcfg
);
1616 } else if (hp
->happy_bursts
& DMA_BURST32
) {
1618 hme_write32(hp
, gregs
+ GREG_CFG
, GREG_CFG_BURST32
);
1619 } else if (hp
->happy_bursts
& DMA_BURST16
) {
1621 hme_write32(hp
, gregs
+ GREG_CFG
, GREG_CFG_BURST16
);
1624 hme_write32(hp
, gregs
+ GREG_CFG
, 0);
1626 #endif /* CONFIG_SPARC */
1628 /* Turn off interrupts we do not want to hear. */
1629 HMD((", enable global interrupts, "));
1630 hme_write32(hp
, gregs
+ GREG_IMASK
,
1631 (GREG_IMASK_GOTFRAME
| GREG_IMASK_RCNTEXP
|
1632 GREG_IMASK_SENTFRAME
| GREG_IMASK_TXPERR
));
1634 /* Set the transmit ring buffer size. */
1635 HMD(("tx rsize=%d oreg[%08x], ", (int)TX_RING_SIZE
,
1636 hme_read32(hp
, etxregs
+ ETX_RSIZE
)));
1637 hme_write32(hp
, etxregs
+ ETX_RSIZE
, (TX_RING_SIZE
>> ETX_RSIZE_SHIFT
) - 1);
1639 /* Enable transmitter DVMA. */
1640 HMD(("tx dma enable old[%08x], ",
1641 hme_read32(hp
, etxregs
+ ETX_CFG
)));
1642 hme_write32(hp
, etxregs
+ ETX_CFG
,
1643 hme_read32(hp
, etxregs
+ ETX_CFG
) | ETX_CFG_DMAENABLE
);
1645 /* This chip really rots, for the receiver sometimes when you
1646 * write to its control registers not all the bits get there
1647 * properly. I cannot think of a sane way to provide complete
1648 * coverage for this hardware bug yet.
1650 HMD(("erx regs bug old[%08x]\n",
1651 hme_read32(hp
, erxregs
+ ERX_CFG
)));
1652 hme_write32(hp
, erxregs
+ ERX_CFG
, ERX_CFG_DEFAULT(RX_OFFSET
));
1653 regtmp
= hme_read32(hp
, erxregs
+ ERX_CFG
);
1654 hme_write32(hp
, erxregs
+ ERX_CFG
, ERX_CFG_DEFAULT(RX_OFFSET
));
1655 if (hme_read32(hp
, erxregs
+ ERX_CFG
) != ERX_CFG_DEFAULT(RX_OFFSET
)) {
1656 printk(KERN_ERR
"happy meal: Eieee, rx config register gets greasy fries.\n");
1657 printk(KERN_ERR
"happy meal: Trying to set %08x, reread gives %08x\n",
1658 ERX_CFG_DEFAULT(RX_OFFSET
), regtmp
);
1659 /* XXX Should return failure here... */
1662 /* Enable Big Mac hash table filter. */
1663 HMD(("happy_meal_init: enable hash rx_cfg_old[%08x], ",
1664 hme_read32(hp
, bregs
+ BMAC_RXCFG
)));
1665 rxcfg
= BIGMAC_RXCFG_HENABLE
| BIGMAC_RXCFG_REJME
;
1666 if (hp
->dev
->flags
& IFF_PROMISC
)
1667 rxcfg
|= BIGMAC_RXCFG_PMISC
;
1668 hme_write32(hp
, bregs
+ BMAC_RXCFG
, rxcfg
);
1670 /* Let the bits settle in the chip. */
1673 /* Ok, configure the Big Mac transmitter. */
1674 HMD(("BIGMAC init, "));
1676 if (hp
->happy_flags
& HFLAG_FULL
)
1677 regtmp
|= BIGMAC_TXCFG_FULLDPLX
;
1679 /* Don't turn on the "don't give up" bit for now. It could cause hme
1680 * to deadlock with the PHY if a Jabber occurs.
1682 hme_write32(hp
, bregs
+ BMAC_TXCFG
, regtmp
/*| BIGMAC_TXCFG_DGIVEUP*/);
1684 /* Give up after 16 TX attempts. */
1685 hme_write32(hp
, bregs
+ BMAC_ALIMIT
, 16);
1687 /* Enable the output drivers no matter what. */
1688 regtmp
= BIGMAC_XCFG_ODENABLE
;
1690 /* If card can do lance mode, enable it. */
1691 if (hp
->happy_flags
& HFLAG_LANCE
)
1692 regtmp
|= (DEFAULT_IPG0
<< 5) | BIGMAC_XCFG_LANCE
;
1694 /* Disable the MII buffers if using external transceiver. */
1695 if (hp
->tcvr_type
== external
)
1696 regtmp
|= BIGMAC_XCFG_MIIDISAB
;
1698 HMD(("XIF config old[%08x], ",
1699 hme_read32(hp
, bregs
+ BMAC_XIFCFG
)));
1700 hme_write32(hp
, bregs
+ BMAC_XIFCFG
, regtmp
);
1702 /* Start things up. */
1703 HMD(("tx old[%08x] and rx [%08x] ON!\n",
1704 hme_read32(hp
, bregs
+ BMAC_TXCFG
),
1705 hme_read32(hp
, bregs
+ BMAC_RXCFG
)));
1706 hme_write32(hp
, bregs
+ BMAC_TXCFG
,
1707 hme_read32(hp
, bregs
+ BMAC_TXCFG
) | BIGMAC_TXCFG_ENABLE
);
1708 hme_write32(hp
, bregs
+ BMAC_RXCFG
,
1709 hme_read32(hp
, bregs
+ BMAC_RXCFG
) | BIGMAC_RXCFG_ENABLE
);
1711 /* Get the autonegotiation started, and the watch timer ticking. */
1712 happy_meal_begin_auto_negotiation(hp
, tregs
, NULL
);
1718 /* hp->happy_lock must be held */
1719 static void happy_meal_set_initial_advertisement(struct happy_meal
*hp
)
1721 void __iomem
*tregs
= hp
->tcvregs
;
1722 void __iomem
*bregs
= hp
->bigmacregs
;
1723 void __iomem
*gregs
= hp
->gregs
;
1725 happy_meal_stop(hp
, gregs
);
1726 hme_write32(hp
, tregs
+ TCVR_IMASK
, 0xffff);
1727 if (hp
->happy_flags
& HFLAG_FENABLE
)
1728 hme_write32(hp
, tregs
+ TCVR_CFG
,
1729 hme_read32(hp
, tregs
+ TCVR_CFG
) & ~(TCV_CFG_BENABLE
));
1731 hme_write32(hp
, tregs
+ TCVR_CFG
,
1732 hme_read32(hp
, tregs
+ TCVR_CFG
) | TCV_CFG_BENABLE
);
1733 happy_meal_transceiver_check(hp
, tregs
);
1734 switch(hp
->tcvr_type
) {
1738 hme_write32(hp
, bregs
+ BMAC_XIFCFG
, 0);
1741 hme_write32(hp
, bregs
+ BMAC_XIFCFG
, BIGMAC_XCFG_MIIDISAB
);
1744 if (happy_meal_tcvr_reset(hp
, tregs
))
1747 /* Latch PHY registers as of now. */
1748 hp
->sw_bmsr
= happy_meal_tcvr_read(hp
, tregs
, MII_BMSR
);
1749 hp
->sw_advertise
= happy_meal_tcvr_read(hp
, tregs
, MII_ADVERTISE
);
1751 /* Advertise everything we can support. */
1752 if (hp
->sw_bmsr
& BMSR_10HALF
)
1753 hp
->sw_advertise
|= (ADVERTISE_10HALF
);
1755 hp
->sw_advertise
&= ~(ADVERTISE_10HALF
);
1757 if (hp
->sw_bmsr
& BMSR_10FULL
)
1758 hp
->sw_advertise
|= (ADVERTISE_10FULL
);
1760 hp
->sw_advertise
&= ~(ADVERTISE_10FULL
);
1761 if (hp
->sw_bmsr
& BMSR_100HALF
)
1762 hp
->sw_advertise
|= (ADVERTISE_100HALF
);
1764 hp
->sw_advertise
&= ~(ADVERTISE_100HALF
);
1765 if (hp
->sw_bmsr
& BMSR_100FULL
)
1766 hp
->sw_advertise
|= (ADVERTISE_100FULL
);
1768 hp
->sw_advertise
&= ~(ADVERTISE_100FULL
);
1770 /* Update the PHY advertisement register. */
1771 happy_meal_tcvr_write(hp
, tregs
, MII_ADVERTISE
, hp
->sw_advertise
);
1774 /* Once status is latched (by happy_meal_interrupt) it is cleared by
1775 * the hardware, so we cannot re-read it and get a correct value.
1777 * hp->happy_lock must be held
1779 static int happy_meal_is_not_so_happy(struct happy_meal
*hp
, u32 status
)
1783 /* Only print messages for non-counter related interrupts. */
1784 if (status
& (GREG_STAT_STSTERR
| GREG_STAT_TFIFO_UND
|
1785 GREG_STAT_MAXPKTERR
| GREG_STAT_RXERR
|
1786 GREG_STAT_RXPERR
| GREG_STAT_RXTERR
| GREG_STAT_EOPERR
|
1787 GREG_STAT_MIFIRQ
| GREG_STAT_TXEACK
| GREG_STAT_TXLERR
|
1788 GREG_STAT_TXPERR
| GREG_STAT_TXTERR
| GREG_STAT_SLVERR
|
1790 printk(KERN_ERR
"%s: Error interrupt for happy meal, status = %08x\n",
1791 hp
->dev
->name
, status
);
1793 if (status
& GREG_STAT_RFIFOVF
) {
1794 /* Receive FIFO overflow is harmless and the hardware will take
1795 care of it, just some packets are lost. Who cares. */
1796 printk(KERN_DEBUG
"%s: Happy Meal receive FIFO overflow.\n", hp
->dev
->name
);
1799 if (status
& GREG_STAT_STSTERR
) {
1800 /* BigMAC SQE link test failed. */
1801 printk(KERN_ERR
"%s: Happy Meal BigMAC SQE test failed.\n", hp
->dev
->name
);
1805 if (status
& GREG_STAT_TFIFO_UND
) {
1806 /* Transmit FIFO underrun, again DMA error likely. */
1807 printk(KERN_ERR
"%s: Happy Meal transmitter FIFO underrun, DMA error.\n",
1812 if (status
& GREG_STAT_MAXPKTERR
) {
1813 /* Driver error, tried to transmit something larger
1814 * than ethernet max mtu.
1816 printk(KERN_ERR
"%s: Happy Meal MAX Packet size error.\n", hp
->dev
->name
);
1820 if (status
& GREG_STAT_NORXD
) {
1821 /* This is harmless, it just means the system is
1822 * quite loaded and the incoming packet rate was
1823 * faster than the interrupt handler could keep up
1826 printk(KERN_INFO
"%s: Happy Meal out of receive "
1827 "descriptors, packet dropped.\n",
1831 if (status
& (GREG_STAT_RXERR
|GREG_STAT_RXPERR
|GREG_STAT_RXTERR
)) {
1832 /* All sorts of DMA receive errors. */
1833 printk(KERN_ERR
"%s: Happy Meal rx DMA errors [ ", hp
->dev
->name
);
1834 if (status
& GREG_STAT_RXERR
)
1835 printk("GenericError ");
1836 if (status
& GREG_STAT_RXPERR
)
1837 printk("ParityError ");
1838 if (status
& GREG_STAT_RXTERR
)
1839 printk("RxTagBotch ");
1844 if (status
& GREG_STAT_EOPERR
) {
1845 /* Driver bug, didn't set EOP bit in tx descriptor given
1846 * to the happy meal.
1848 printk(KERN_ERR
"%s: EOP not set in happy meal transmit descriptor!\n",
1853 if (status
& GREG_STAT_MIFIRQ
) {
1854 /* MIF signalled an interrupt, were we polling it? */
1855 printk(KERN_ERR
"%s: Happy Meal MIF interrupt.\n", hp
->dev
->name
);
1859 (GREG_STAT_TXEACK
|GREG_STAT_TXLERR
|GREG_STAT_TXPERR
|GREG_STAT_TXTERR
)) {
1860 /* All sorts of transmit DMA errors. */
1861 printk(KERN_ERR
"%s: Happy Meal tx DMA errors [ ", hp
->dev
->name
);
1862 if (status
& GREG_STAT_TXEACK
)
1863 printk("GenericError ");
1864 if (status
& GREG_STAT_TXLERR
)
1865 printk("LateError ");
1866 if (status
& GREG_STAT_TXPERR
)
1867 printk("ParityErro ");
1868 if (status
& GREG_STAT_TXTERR
)
1869 printk("TagBotch ");
1874 if (status
& (GREG_STAT_SLVERR
|GREG_STAT_SLVPERR
)) {
1875 /* Bus or parity error when cpu accessed happy meal registers
1876 * or it's internal FIFO's. Should never see this.
1878 printk(KERN_ERR
"%s: Happy Meal register access SBUS slave (%s) error.\n",
1880 (status
& GREG_STAT_SLVPERR
) ? "parity" : "generic");
1885 printk(KERN_NOTICE
"%s: Resetting...\n", hp
->dev
->name
);
1886 happy_meal_init(hp
);
1892 /* hp->happy_lock must be held */
1893 static void happy_meal_mif_interrupt(struct happy_meal
*hp
)
1895 void __iomem
*tregs
= hp
->tcvregs
;
1897 printk(KERN_INFO
"%s: Link status change.\n", hp
->dev
->name
);
1898 hp
->sw_bmcr
= happy_meal_tcvr_read(hp
, tregs
, MII_BMCR
);
1899 hp
->sw_lpa
= happy_meal_tcvr_read(hp
, tregs
, MII_LPA
);
1901 /* Use the fastest transmission protocol possible. */
1902 if (hp
->sw_lpa
& LPA_100FULL
) {
1903 printk(KERN_INFO
"%s: Switching to 100Mbps at full duplex.", hp
->dev
->name
);
1904 hp
->sw_bmcr
|= (BMCR_FULLDPLX
| BMCR_SPEED100
);
1905 } else if (hp
->sw_lpa
& LPA_100HALF
) {
1906 printk(KERN_INFO
"%s: Switching to 100MBps at half duplex.", hp
->dev
->name
);
1907 hp
->sw_bmcr
|= BMCR_SPEED100
;
1908 } else if (hp
->sw_lpa
& LPA_10FULL
) {
1909 printk(KERN_INFO
"%s: Switching to 10MBps at full duplex.", hp
->dev
->name
);
1910 hp
->sw_bmcr
|= BMCR_FULLDPLX
;
1912 printk(KERN_INFO
"%s: Using 10Mbps at half duplex.", hp
->dev
->name
);
1914 happy_meal_tcvr_write(hp
, tregs
, MII_BMCR
, hp
->sw_bmcr
);
1916 /* Finally stop polling and shut up the MIF. */
1917 happy_meal_poll_stop(hp
, tregs
);
1921 #define TXD(x) printk x
1926 /* hp->happy_lock must be held */
1927 static void happy_meal_tx(struct happy_meal
*hp
)
1929 struct happy_meal_txd
*txbase
= &hp
->happy_block
->happy_meal_txd
[0];
1930 struct happy_meal_txd
*this;
1931 struct net_device
*dev
= hp
->dev
;
1936 while (elem
!= hp
->tx_new
) {
1937 struct sk_buff
*skb
;
1938 u32 flags
, dma_addr
, dma_len
;
1941 TXD(("[%d]", elem
));
1942 this = &txbase
[elem
];
1943 flags
= hme_read_desc32(hp
, &this->tx_flags
);
1944 if (flags
& TXFLAG_OWN
)
1946 skb
= hp
->tx_skbs
[elem
];
1947 if (skb_shinfo(skb
)->nr_frags
) {
1950 last
= elem
+ skb_shinfo(skb
)->nr_frags
;
1951 last
&= (TX_RING_SIZE
- 1);
1952 flags
= hme_read_desc32(hp
, &txbase
[last
].tx_flags
);
1953 if (flags
& TXFLAG_OWN
)
1956 hp
->tx_skbs
[elem
] = NULL
;
1957 hp
->net_stats
.tx_bytes
+= skb
->len
;
1959 for (frag
= 0; frag
<= skb_shinfo(skb
)->nr_frags
; frag
++) {
1960 dma_addr
= hme_read_desc32(hp
, &this->tx_addr
);
1961 dma_len
= hme_read_desc32(hp
, &this->tx_flags
);
1963 dma_len
&= TXFLAG_SIZE
;
1964 hme_dma_unmap(hp
, dma_addr
, dma_len
, DMA_TODEVICE
);
1966 elem
= NEXT_TX(elem
);
1967 this = &txbase
[elem
];
1970 dev_kfree_skb_irq(skb
);
1971 hp
->net_stats
.tx_packets
++;
1976 if (netif_queue_stopped(dev
) &&
1977 TX_BUFFS_AVAIL(hp
) > (MAX_SKB_FRAGS
+ 1))
1978 netif_wake_queue(dev
);
1982 #define RXD(x) printk x
1987 /* Originally I used to handle the allocation failure by just giving back just
1988 * that one ring buffer to the happy meal. Problem is that usually when that
1989 * condition is triggered, the happy meal expects you to do something reasonable
1990 * with all of the packets it has DMA'd in. So now I just drop the entire
1991 * ring when we cannot get a new skb and give them all back to the happy meal,
1992 * maybe things will be "happier" now.
1994 * hp->happy_lock must be held
1996 static void happy_meal_rx(struct happy_meal
*hp
, struct net_device
*dev
)
1998 struct happy_meal_rxd
*rxbase
= &hp
->happy_block
->happy_meal_rxd
[0];
1999 struct happy_meal_rxd
*this;
2000 int elem
= hp
->rx_new
, drops
= 0;
2004 this = &rxbase
[elem
];
2005 while (!((flags
= hme_read_desc32(hp
, &this->rx_flags
)) & RXFLAG_OWN
)) {
2006 struct sk_buff
*skb
;
2007 int len
= flags
>> 16;
2008 u16 csum
= flags
& RXFLAG_CSUM
;
2009 u32 dma_addr
= hme_read_desc32(hp
, &this->rx_addr
);
2011 RXD(("[%d ", elem
));
2013 /* Check for errors. */
2014 if ((len
< ETH_ZLEN
) || (flags
& RXFLAG_OVERFLOW
)) {
2015 RXD(("ERR(%08x)]", flags
));
2016 hp
->net_stats
.rx_errors
++;
2018 hp
->net_stats
.rx_length_errors
++;
2019 if (len
& (RXFLAG_OVERFLOW
>> 16)) {
2020 hp
->net_stats
.rx_over_errors
++;
2021 hp
->net_stats
.rx_fifo_errors
++;
2024 /* Return it to the Happy meal. */
2026 hp
->net_stats
.rx_dropped
++;
2027 hme_write_rxd(hp
, this,
2028 (RXFLAG_OWN
|((RX_BUF_ALLOC_SIZE
-RX_OFFSET
)<<16)),
2032 skb
= hp
->rx_skbs
[elem
];
2033 if (len
> RX_COPY_THRESHOLD
) {
2034 struct sk_buff
*new_skb
;
2036 /* Now refill the entry, if we can. */
2037 new_skb
= happy_meal_alloc_skb(RX_BUF_ALLOC_SIZE
, GFP_ATOMIC
);
2038 if (new_skb
== NULL
) {
2042 hme_dma_unmap(hp
, dma_addr
, RX_BUF_ALLOC_SIZE
, DMA_FROMDEVICE
);
2043 hp
->rx_skbs
[elem
] = new_skb
;
2045 skb_put(new_skb
, (ETH_FRAME_LEN
+ RX_OFFSET
));
2046 hme_write_rxd(hp
, this,
2047 (RXFLAG_OWN
|((RX_BUF_ALLOC_SIZE
-RX_OFFSET
)<<16)),
2048 hme_dma_map(hp
, new_skb
->data
, RX_BUF_ALLOC_SIZE
, DMA_FROMDEVICE
));
2049 skb_reserve(new_skb
, RX_OFFSET
);
2051 /* Trim the original skb for the netif. */
2054 struct sk_buff
*copy_skb
= dev_alloc_skb(len
+ 2);
2056 if (copy_skb
== NULL
) {
2061 copy_skb
->dev
= dev
;
2062 skb_reserve(copy_skb
, 2);
2063 skb_put(copy_skb
, len
);
2064 hme_dma_sync_for_cpu(hp
, dma_addr
, len
, DMA_FROMDEVICE
);
2065 memcpy(copy_skb
->data
, skb
->data
, len
);
2066 hme_dma_sync_for_device(hp
, dma_addr
, len
, DMA_FROMDEVICE
);
2068 /* Reuse original ring buffer. */
2069 hme_write_rxd(hp
, this,
2070 (RXFLAG_OWN
|((RX_BUF_ALLOC_SIZE
-RX_OFFSET
)<<16)),
2076 /* This card is _fucking_ hot... */
2077 skb
->csum
= ntohs(csum
^ 0xffff);
2078 skb
->ip_summed
= CHECKSUM_HW
;
2080 RXD(("len=%d csum=%4x]", len
, csum
));
2081 skb
->protocol
= eth_type_trans(skb
, dev
);
2084 dev
->last_rx
= jiffies
;
2085 hp
->net_stats
.rx_packets
++;
2086 hp
->net_stats
.rx_bytes
+= len
;
2088 elem
= NEXT_RX(elem
);
2089 this = &rxbase
[elem
];
2093 printk(KERN_INFO
"%s: Memory squeeze, deferring packet.\n", hp
->dev
->name
);
2097 static irqreturn_t
happy_meal_interrupt(int irq
, void *dev_id
, struct pt_regs
*regs
)
2099 struct net_device
*dev
= (struct net_device
*) dev_id
;
2100 struct happy_meal
*hp
= dev
->priv
;
2101 u32 happy_status
= hme_read32(hp
, hp
->gregs
+ GREG_STAT
);
2103 HMD(("happy_meal_interrupt: status=%08x ", happy_status
));
2105 spin_lock(&hp
->happy_lock
);
2107 if (happy_status
& GREG_STAT_ERRORS
) {
2109 if (happy_meal_is_not_so_happy(hp
, /* un- */ happy_status
))
2113 if (happy_status
& GREG_STAT_MIFIRQ
) {
2115 happy_meal_mif_interrupt(hp
);
2118 if (happy_status
& GREG_STAT_TXALL
) {
2123 if (happy_status
& GREG_STAT_RXTOHOST
) {
2125 happy_meal_rx(hp
, dev
);
2130 spin_unlock(&hp
->happy_lock
);
2136 static irqreturn_t
quattro_sbus_interrupt(int irq
, void *cookie
, struct pt_regs
*ptregs
)
2138 struct quattro
*qp
= (struct quattro
*) cookie
;
2141 for (i
= 0; i
< 4; i
++) {
2142 struct net_device
*dev
= qp
->happy_meals
[i
];
2143 struct happy_meal
*hp
= dev
->priv
;
2144 u32 happy_status
= hme_read32(hp
, hp
->gregs
+ GREG_STAT
);
2146 HMD(("quattro_interrupt: status=%08x ", happy_status
));
2148 if (!(happy_status
& (GREG_STAT_ERRORS
|
2151 GREG_STAT_RXTOHOST
)))
2154 spin_lock(&hp
->happy_lock
);
2156 if (happy_status
& GREG_STAT_ERRORS
) {
2158 if (happy_meal_is_not_so_happy(hp
, happy_status
))
2162 if (happy_status
& GREG_STAT_MIFIRQ
) {
2164 happy_meal_mif_interrupt(hp
);
2167 if (happy_status
& GREG_STAT_TXALL
) {
2172 if (happy_status
& GREG_STAT_RXTOHOST
) {
2174 happy_meal_rx(hp
, dev
);
2178 spin_unlock(&hp
->happy_lock
);
2186 static int happy_meal_open(struct net_device
*dev
)
2188 struct happy_meal
*hp
= dev
->priv
;
2191 HMD(("happy_meal_open: "));
2193 /* On SBUS Quattro QFE cards, all hme interrupts are concentrated
2194 * into a single source which we register handling at probe time.
2196 if ((hp
->happy_flags
& (HFLAG_QUATTRO
|HFLAG_PCI
)) != HFLAG_QUATTRO
) {
2197 if (request_irq(dev
->irq
, &happy_meal_interrupt
,
2198 SA_SHIRQ
, dev
->name
, (void *)dev
)) {
2200 printk(KERN_ERR
"happy_meal(SBUS): Can't order irq %d to go.\n",
2207 HMD(("to happy_meal_init\n"));
2209 spin_lock_irq(&hp
->happy_lock
);
2210 res
= happy_meal_init(hp
);
2211 spin_unlock_irq(&hp
->happy_lock
);
2213 if (res
&& ((hp
->happy_flags
& (HFLAG_QUATTRO
|HFLAG_PCI
)) != HFLAG_QUATTRO
))
2214 free_irq(dev
->irq
, dev
);
2218 static int happy_meal_close(struct net_device
*dev
)
2220 struct happy_meal
*hp
= dev
->priv
;
2222 spin_lock_irq(&hp
->happy_lock
);
2223 happy_meal_stop(hp
, hp
->gregs
);
2224 happy_meal_clean_rings(hp
);
2226 /* If auto-negotiation timer is running, kill it. */
2227 del_timer(&hp
->happy_timer
);
2229 spin_unlock_irq(&hp
->happy_lock
);
2231 /* On Quattro QFE cards, all hme interrupts are concentrated
2232 * into a single source which we register handling at probe
2233 * time and never unregister.
2235 if ((hp
->happy_flags
& (HFLAG_QUATTRO
|HFLAG_PCI
)) != HFLAG_QUATTRO
)
2236 free_irq(dev
->irq
, dev
);
2242 #define SXD(x) printk x
2247 static void happy_meal_tx_timeout(struct net_device
*dev
)
2249 struct happy_meal
*hp
= dev
->priv
;
2251 printk (KERN_ERR
"%s: transmit timed out, resetting\n", dev
->name
);
2253 printk (KERN_ERR
"%s: Happy Status %08x TX[%08x:%08x]\n", dev
->name
,
2254 hme_read32(hp
, hp
->gregs
+ GREG_STAT
),
2255 hme_read32(hp
, hp
->etxregs
+ ETX_CFG
),
2256 hme_read32(hp
, hp
->bigmacregs
+ BMAC_TXCFG
));
2258 spin_lock_irq(&hp
->happy_lock
);
2259 happy_meal_init(hp
);
2260 spin_unlock_irq(&hp
->happy_lock
);
2262 netif_wake_queue(dev
);
2265 static int happy_meal_start_xmit(struct sk_buff
*skb
, struct net_device
*dev
)
2267 struct happy_meal
*hp
= dev
->priv
;
2271 tx_flags
= TXFLAG_OWN
;
2272 if (skb
->ip_summed
== CHECKSUM_HW
) {
2273 u32 csum_start_off
, csum_stuff_off
;
2275 csum_start_off
= (u32
) (skb
->h
.raw
- skb
->data
);
2276 csum_stuff_off
= (u32
) ((skb
->h
.raw
+ skb
->csum
) - skb
->data
);
2278 tx_flags
= (TXFLAG_OWN
| TXFLAG_CSENABLE
|
2279 ((csum_start_off
<< 14) & TXFLAG_CSBUFBEGIN
) |
2280 ((csum_stuff_off
<< 20) & TXFLAG_CSLOCATION
));
2283 spin_lock_irq(&hp
->happy_lock
);
2285 if (TX_BUFFS_AVAIL(hp
) <= (skb_shinfo(skb
)->nr_frags
+ 1)) {
2286 netif_stop_queue(dev
);
2287 spin_unlock_irq(&hp
->happy_lock
);
2288 printk(KERN_ERR
"%s: BUG! Tx Ring full when queue awake!\n",
2294 SXD(("SX<l[%d]e[%d]>", len
, entry
));
2295 hp
->tx_skbs
[entry
] = skb
;
2297 if (skb_shinfo(skb
)->nr_frags
== 0) {
2301 mapping
= hme_dma_map(hp
, skb
->data
, len
, DMA_TODEVICE
);
2302 tx_flags
|= (TXFLAG_SOP
| TXFLAG_EOP
);
2303 hme_write_txd(hp
, &hp
->happy_block
->happy_meal_txd
[entry
],
2304 (tx_flags
| (len
& TXFLAG_SIZE
)),
2306 entry
= NEXT_TX(entry
);
2308 u32 first_len
, first_mapping
;
2309 int frag
, first_entry
= entry
;
2311 /* We must give this initial chunk to the device last.
2312 * Otherwise we could race with the device.
2314 first_len
= skb_headlen(skb
);
2315 first_mapping
= hme_dma_map(hp
, skb
->data
, first_len
, DMA_TODEVICE
);
2316 entry
= NEXT_TX(entry
);
2318 for (frag
= 0; frag
< skb_shinfo(skb
)->nr_frags
; frag
++) {
2319 skb_frag_t
*this_frag
= &skb_shinfo(skb
)->frags
[frag
];
2320 u32 len
, mapping
, this_txflags
;
2322 len
= this_frag
->size
;
2323 mapping
= hme_dma_map(hp
,
2324 ((void *) page_address(this_frag
->page
) +
2325 this_frag
->page_offset
),
2327 this_txflags
= tx_flags
;
2328 if (frag
== skb_shinfo(skb
)->nr_frags
- 1)
2329 this_txflags
|= TXFLAG_EOP
;
2330 hme_write_txd(hp
, &hp
->happy_block
->happy_meal_txd
[entry
],
2331 (this_txflags
| (len
& TXFLAG_SIZE
)),
2333 entry
= NEXT_TX(entry
);
2335 hme_write_txd(hp
, &hp
->happy_block
->happy_meal_txd
[first_entry
],
2336 (tx_flags
| TXFLAG_SOP
| (first_len
& TXFLAG_SIZE
)),
2342 if (TX_BUFFS_AVAIL(hp
) <= (MAX_SKB_FRAGS
+ 1))
2343 netif_stop_queue(dev
);
2346 hme_write32(hp
, hp
->etxregs
+ ETX_PENDING
, ETX_TP_DMAWAKEUP
);
2348 spin_unlock_irq(&hp
->happy_lock
);
2350 dev
->trans_start
= jiffies
;
2352 tx_add_log(hp
, TXLOG_ACTION_TXMIT
, 0);
2356 static struct net_device_stats
*happy_meal_get_stats(struct net_device
*dev
)
2358 struct happy_meal
*hp
= dev
->priv
;
2360 spin_lock_irq(&hp
->happy_lock
);
2361 happy_meal_get_counters(hp
, hp
->bigmacregs
);
2362 spin_unlock_irq(&hp
->happy_lock
);
2364 return &hp
->net_stats
;
2367 static void happy_meal_set_multicast(struct net_device
*dev
)
2369 struct happy_meal
*hp
= dev
->priv
;
2370 void __iomem
*bregs
= hp
->bigmacregs
;
2371 struct dev_mc_list
*dmi
= dev
->mc_list
;
2376 spin_lock_irq(&hp
->happy_lock
);
2378 netif_stop_queue(dev
);
2380 if ((dev
->flags
& IFF_ALLMULTI
) || (dev
->mc_count
> 64)) {
2381 hme_write32(hp
, bregs
+ BMAC_HTABLE0
, 0xffff);
2382 hme_write32(hp
, bregs
+ BMAC_HTABLE1
, 0xffff);
2383 hme_write32(hp
, bregs
+ BMAC_HTABLE2
, 0xffff);
2384 hme_write32(hp
, bregs
+ BMAC_HTABLE3
, 0xffff);
2385 } else if (dev
->flags
& IFF_PROMISC
) {
2386 hme_write32(hp
, bregs
+ BMAC_RXCFG
,
2387 hme_read32(hp
, bregs
+ BMAC_RXCFG
) | BIGMAC_RXCFG_PMISC
);
2391 for (i
= 0; i
< 4; i
++)
2394 for (i
= 0; i
< dev
->mc_count
; i
++) {
2395 addrs
= dmi
->dmi_addr
;
2401 crc
= ether_crc_le(6, addrs
);
2403 hash_table
[crc
>> 4] |= 1 << (crc
& 0xf);
2405 hme_write32(hp
, bregs
+ BMAC_HTABLE0
, hash_table
[0]);
2406 hme_write32(hp
, bregs
+ BMAC_HTABLE1
, hash_table
[1]);
2407 hme_write32(hp
, bregs
+ BMAC_HTABLE2
, hash_table
[2]);
2408 hme_write32(hp
, bregs
+ BMAC_HTABLE3
, hash_table
[3]);
2411 netif_wake_queue(dev
);
2413 spin_unlock_irq(&hp
->happy_lock
);
2416 /* Ethtool support... */
2417 static int hme_get_settings(struct net_device
*dev
, struct ethtool_cmd
*cmd
)
2419 struct happy_meal
*hp
= dev
->priv
;
2422 (SUPPORTED_10baseT_Half
| SUPPORTED_10baseT_Full
|
2423 SUPPORTED_100baseT_Half
| SUPPORTED_100baseT_Full
|
2424 SUPPORTED_Autoneg
| SUPPORTED_TP
| SUPPORTED_MII
);
2426 /* XXX hardcoded stuff for now */
2427 cmd
->port
= PORT_TP
; /* XXX no MII support */
2428 cmd
->transceiver
= XCVR_INTERNAL
; /* XXX no external xcvr support */
2429 cmd
->phy_address
= 0; /* XXX fixed PHYAD */
2431 /* Record PHY settings. */
2432 spin_lock_irq(&hp
->happy_lock
);
2433 hp
->sw_bmcr
= happy_meal_tcvr_read(hp
, hp
->tcvregs
, MII_BMCR
);
2434 hp
->sw_lpa
= happy_meal_tcvr_read(hp
, hp
->tcvregs
, MII_LPA
);
2435 spin_unlock_irq(&hp
->happy_lock
);
2437 if (hp
->sw_bmcr
& BMCR_ANENABLE
) {
2438 cmd
->autoneg
= AUTONEG_ENABLE
;
2440 (hp
->sw_lpa
& (LPA_100HALF
| LPA_100FULL
)) ?
2441 SPEED_100
: SPEED_10
;
2442 if (cmd
->speed
== SPEED_100
)
2444 (hp
->sw_lpa
& (LPA_100FULL
)) ?
2445 DUPLEX_FULL
: DUPLEX_HALF
;
2448 (hp
->sw_lpa
& (LPA_10FULL
)) ?
2449 DUPLEX_FULL
: DUPLEX_HALF
;
2451 cmd
->autoneg
= AUTONEG_DISABLE
;
2453 (hp
->sw_bmcr
& BMCR_SPEED100
) ?
2454 SPEED_100
: SPEED_10
;
2456 (hp
->sw_bmcr
& BMCR_FULLDPLX
) ?
2457 DUPLEX_FULL
: DUPLEX_HALF
;
2462 static int hme_set_settings(struct net_device
*dev
, struct ethtool_cmd
*cmd
)
2464 struct happy_meal
*hp
= dev
->priv
;
2466 /* Verify the settings we care about. */
2467 if (cmd
->autoneg
!= AUTONEG_ENABLE
&&
2468 cmd
->autoneg
!= AUTONEG_DISABLE
)
2470 if (cmd
->autoneg
== AUTONEG_DISABLE
&&
2471 ((cmd
->speed
!= SPEED_100
&&
2472 cmd
->speed
!= SPEED_10
) ||
2473 (cmd
->duplex
!= DUPLEX_HALF
&&
2474 cmd
->duplex
!= DUPLEX_FULL
)))
2477 /* Ok, do it to it. */
2478 spin_lock_irq(&hp
->happy_lock
);
2479 del_timer(&hp
->happy_timer
);
2480 happy_meal_begin_auto_negotiation(hp
, hp
->tcvregs
, cmd
);
2481 spin_unlock_irq(&hp
->happy_lock
);
2486 static void hme_get_drvinfo(struct net_device
*dev
, struct ethtool_drvinfo
*info
)
2488 struct happy_meal
*hp
= dev
->priv
;
2490 strcpy(info
->driver
, "sunhme");
2491 strcpy(info
->version
, "2.02");
2492 if (hp
->happy_flags
& HFLAG_PCI
) {
2493 struct pci_dev
*pdev
= hp
->happy_dev
;
2494 strcpy(info
->bus_info
, pci_name(pdev
));
2498 struct sbus_dev
*sdev
= hp
->happy_dev
;
2499 sprintf(info
->bus_info
, "SBUS:%d",
2505 static u32
hme_get_link(struct net_device
*dev
)
2507 struct happy_meal
*hp
= dev
->priv
;
2509 spin_lock_irq(&hp
->happy_lock
);
2510 hp
->sw_bmcr
= happy_meal_tcvr_read(hp
, hp
->tcvregs
, MII_BMCR
);
2511 spin_unlock_irq(&hp
->happy_lock
);
2513 return (hp
->sw_bmsr
& BMSR_LSTATUS
);
2516 static struct ethtool_ops hme_ethtool_ops
= {
2517 .get_settings
= hme_get_settings
,
2518 .set_settings
= hme_set_settings
,
2519 .get_drvinfo
= hme_get_drvinfo
,
2520 .get_link
= hme_get_link
,
2523 static int hme_version_printed
;
2526 void __devinit
quattro_get_ranges(struct quattro
*qp
)
2528 struct sbus_dev
*sdev
= qp
->quattro_dev
;
2531 err
= prom_getproperty(sdev
->prom_node
,
2533 (char *)&qp
->ranges
[0],
2534 sizeof(qp
->ranges
));
2535 if (err
== 0 || err
== -1) {
2539 qp
->nranges
= (err
/ sizeof(struct linux_prom_ranges
));
2542 static void __devinit
quattro_apply_ranges(struct quattro
*qp
, struct happy_meal
*hp
)
2544 struct sbus_dev
*sdev
= hp
->happy_dev
;
2547 for (rng
= 0; rng
< qp
->nranges
; rng
++) {
2548 struct linux_prom_ranges
*rngp
= &qp
->ranges
[rng
];
2551 for (reg
= 0; reg
< 5; reg
++) {
2552 if (sdev
->reg_addrs
[reg
].which_io
==
2553 rngp
->ot_child_space
)
2559 sdev
->reg_addrs
[reg
].which_io
= rngp
->ot_parent_space
;
2560 sdev
->reg_addrs
[reg
].phys_addr
+= rngp
->ot_parent_base
;
2564 /* Given a happy meal sbus device, find it's quattro parent.
2565 * If none exist, allocate and return a new one.
2567 * Return NULL on failure.
2569 static struct quattro
* __devinit
quattro_sbus_find(struct sbus_dev
*goal_sdev
)
2571 struct sbus_dev
*sdev
;
2575 for (qp
= qfe_sbus_list
; qp
!= NULL
; qp
= qp
->next
) {
2576 for (i
= 0, sdev
= qp
->quattro_dev
;
2577 (sdev
!= NULL
) && (i
< 4);
2578 sdev
= sdev
->next
, i
++) {
2579 if (sdev
== goal_sdev
)
2584 qp
= kmalloc(sizeof(struct quattro
), GFP_KERNEL
);
2588 for (i
= 0; i
< 4; i
++)
2589 qp
->happy_meals
[i
] = NULL
;
2591 qp
->quattro_dev
= goal_sdev
;
2592 qp
->next
= qfe_sbus_list
;
2594 quattro_get_ranges(qp
);
2599 /* After all quattro cards have been probed, we call these functions
2600 * to register the IRQ handlers.
2602 static void __init
quattro_sbus_register_irqs(void)
2606 for (qp
= qfe_sbus_list
; qp
!= NULL
; qp
= qp
->next
) {
2607 struct sbus_dev
*sdev
= qp
->quattro_dev
;
2610 err
= request_irq(sdev
->irqs
[0],
2611 quattro_sbus_interrupt
,
2612 SA_SHIRQ
, "Quattro",
2615 printk(KERN_ERR
"Quattro: Fatal IRQ registery error %d.\n", err
);
2616 panic("QFE request irq");
2621 static void quattro_sbus_free_irqs(void)
2625 for (qp
= qfe_sbus_list
; qp
!= NULL
; qp
= qp
->next
) {
2626 struct sbus_dev
*sdev
= qp
->quattro_dev
;
2628 free_irq(sdev
->irqs
[0], qp
);
2631 #endif /* CONFIG_SBUS */
2634 static struct quattro
* __init
quattro_pci_find(struct pci_dev
*pdev
)
2636 struct pci_dev
*bdev
= pdev
->bus
->self
;
2639 if (!bdev
) return NULL
;
2640 for (qp
= qfe_pci_list
; qp
!= NULL
; qp
= qp
->next
) {
2641 struct pci_dev
*qpdev
= qp
->quattro_dev
;
2646 qp
= kmalloc(sizeof(struct quattro
), GFP_KERNEL
);
2650 for (i
= 0; i
< 4; i
++)
2651 qp
->happy_meals
[i
] = NULL
;
2653 qp
->quattro_dev
= bdev
;
2654 qp
->next
= qfe_pci_list
;
2657 /* No range tricks necessary on PCI. */
2662 #endif /* CONFIG_PCI */
2665 static int __devinit
happy_meal_sbus_probe_one(struct sbus_dev
*sdev
, int is_qfe
)
2667 struct device_node
*dp
= sdev
->ofdev
.node
;
2668 struct quattro
*qp
= NULL
;
2669 struct happy_meal
*hp
;
2670 struct net_device
*dev
;
2671 int i
, qfe_slot
= -1;
2675 qp
= quattro_sbus_find(sdev
);
2678 for (qfe_slot
= 0; qfe_slot
< 4; qfe_slot
++)
2679 if (qp
->happy_meals
[qfe_slot
] == NULL
)
2686 dev
= alloc_etherdev(sizeof(struct happy_meal
));
2689 SET_MODULE_OWNER(dev
);
2690 SET_NETDEV_DEV(dev
, &sdev
->ofdev
.dev
);
2692 if (hme_version_printed
++ == 0)
2693 printk(KERN_INFO
"%s", version
);
2695 /* If user did not specify a MAC address specifically, use
2696 * the Quattro local-mac-address property...
2698 for (i
= 0; i
< 6; i
++) {
2699 if (macaddr
[i
] != 0)
2702 if (i
< 6) { /* a mac address was given */
2703 for (i
= 0; i
< 6; i
++)
2704 dev
->dev_addr
[i
] = macaddr
[i
];
2707 unsigned char *addr
;
2710 addr
= of_get_property(dp
, "local-mac-address", &len
);
2712 if (qfe_slot
!= -1 && addr
&& len
== 6)
2713 memcpy(dev
->dev_addr
, addr
, 6);
2715 memcpy(dev
->dev_addr
, idprom
->id_ethaddr
, 6);
2720 hp
->happy_dev
= sdev
;
2722 spin_lock_init(&hp
->happy_lock
);
2725 if (sdev
->num_registers
!= 5) {
2726 printk(KERN_ERR
"happymeal: Device needs 5 regs, has %d.\n",
2727 sdev
->num_registers
);
2728 goto err_out_free_netdev
;
2732 hp
->qfe_parent
= qp
;
2733 hp
->qfe_ent
= qfe_slot
;
2734 qp
->happy_meals
[qfe_slot
] = dev
;
2735 quattro_apply_ranges(qp
, hp
);
2738 hp
->gregs
= sbus_ioremap(&sdev
->resource
[0], 0,
2739 GREG_REG_SIZE
, "HME Global Regs");
2741 printk(KERN_ERR
"happymeal: Cannot map global registers.\n");
2742 goto err_out_free_netdev
;
2745 hp
->etxregs
= sbus_ioremap(&sdev
->resource
[1], 0,
2746 ETX_REG_SIZE
, "HME TX Regs");
2748 printk(KERN_ERR
"happymeal: Cannot map MAC TX registers.\n");
2749 goto err_out_iounmap
;
2752 hp
->erxregs
= sbus_ioremap(&sdev
->resource
[2], 0,
2753 ERX_REG_SIZE
, "HME RX Regs");
2755 printk(KERN_ERR
"happymeal: Cannot map MAC RX registers.\n");
2756 goto err_out_iounmap
;
2759 hp
->bigmacregs
= sbus_ioremap(&sdev
->resource
[3], 0,
2760 BMAC_REG_SIZE
, "HME BIGMAC Regs");
2761 if (!hp
->bigmacregs
) {
2762 printk(KERN_ERR
"happymeal: Cannot map BIGMAC registers.\n");
2763 goto err_out_iounmap
;
2766 hp
->tcvregs
= sbus_ioremap(&sdev
->resource
[4], 0,
2767 TCVR_REG_SIZE
, "HME Tranceiver Regs");
2769 printk(KERN_ERR
"happymeal: Cannot map TCVR registers.\n");
2770 goto err_out_iounmap
;
2773 hp
->hm_revision
= of_getintprop_default(dp
, "hm-rev", 0xff);
2774 if (hp
->hm_revision
== 0xff)
2775 hp
->hm_revision
= 0xa0;
2777 /* Now enable the feature flags we can. */
2778 if (hp
->hm_revision
== 0x20 || hp
->hm_revision
== 0x21)
2779 hp
->happy_flags
= HFLAG_20_21
;
2780 else if (hp
->hm_revision
!= 0xa0)
2781 hp
->happy_flags
= HFLAG_NOT_A0
;
2784 hp
->happy_flags
|= HFLAG_QUATTRO
;
2786 /* Get the supported DVMA burst sizes from our Happy SBUS. */
2787 hp
->happy_bursts
= of_getintprop_default(sdev
->bus
->ofdev
.node
,
2788 "burst-sizes", 0x00);
2790 hp
->happy_block
= sbus_alloc_consistent(hp
->happy_dev
,
2794 if (!hp
->happy_block
) {
2795 printk(KERN_ERR
"happymeal: Cannot allocate descriptors.\n");
2796 goto err_out_iounmap
;
2799 /* Force check of the link first time we are brought up. */
2802 /* Force timer state to 'asleep' with count of zero. */
2803 hp
->timer_state
= asleep
;
2804 hp
->timer_ticks
= 0;
2806 init_timer(&hp
->happy_timer
);
2809 dev
->open
= &happy_meal_open
;
2810 dev
->stop
= &happy_meal_close
;
2811 dev
->hard_start_xmit
= &happy_meal_start_xmit
;
2812 dev
->get_stats
= &happy_meal_get_stats
;
2813 dev
->set_multicast_list
= &happy_meal_set_multicast
;
2814 dev
->tx_timeout
= &happy_meal_tx_timeout
;
2815 dev
->watchdog_timeo
= 5*HZ
;
2816 dev
->ethtool_ops
= &hme_ethtool_ops
;
2818 /* Happy Meal can do it all... except VLAN. */
2819 dev
->features
|= NETIF_F_SG
| NETIF_F_HW_CSUM
| NETIF_F_VLAN_CHALLENGED
;
2821 dev
->irq
= sdev
->irqs
[0];
2823 #if defined(CONFIG_SBUS) && defined(CONFIG_PCI)
2824 /* Hook up PCI register/dma accessors. */
2825 hp
->read_desc32
= sbus_hme_read_desc32
;
2826 hp
->write_txd
= sbus_hme_write_txd
;
2827 hp
->write_rxd
= sbus_hme_write_rxd
;
2828 hp
->dma_map
= (u32 (*)(void *, void *, long, int))sbus_map_single
;
2829 hp
->dma_unmap
= (void (*)(void *, u32
, long, int))sbus_unmap_single
;
2830 hp
->dma_sync_for_cpu
= (void (*)(void *, u32
, long, int))
2831 sbus_dma_sync_single_for_cpu
;
2832 hp
->dma_sync_for_device
= (void (*)(void *, u32
, long, int))
2833 sbus_dma_sync_single_for_device
;
2834 hp
->read32
= sbus_hme_read32
;
2835 hp
->write32
= sbus_hme_write32
;
2838 /* Grrr, Happy Meal comes up by default not advertising
2839 * full duplex 100baseT capabilities, fix this.
2841 spin_lock_irq(&hp
->happy_lock
);
2842 happy_meal_set_initial_advertisement(hp
);
2843 spin_unlock_irq(&hp
->happy_lock
);
2845 if (register_netdev(hp
->dev
)) {
2846 printk(KERN_ERR
"happymeal: Cannot register net device, "
2848 goto err_out_free_consistent
;
2851 dev_set_drvdata(&sdev
->ofdev
.dev
, hp
);
2854 printk(KERN_INFO
"%s: Quattro HME slot %d (SBUS) 10/100baseT Ethernet ",
2855 dev
->name
, qfe_slot
);
2857 printk(KERN_INFO
"%s: HAPPY MEAL (SBUS) 10/100baseT Ethernet ",
2860 for (i
= 0; i
< 6; i
++)
2862 dev
->dev_addr
[i
], i
== 5 ? ' ' : ':');
2867 err_out_free_consistent
:
2868 sbus_free_consistent(hp
->happy_dev
,
2875 sbus_iounmap(hp
->gregs
, GREG_REG_SIZE
);
2877 sbus_iounmap(hp
->etxregs
, ETX_REG_SIZE
);
2879 sbus_iounmap(hp
->erxregs
, ERX_REG_SIZE
);
2881 sbus_iounmap(hp
->bigmacregs
, BMAC_REG_SIZE
);
2883 sbus_iounmap(hp
->tcvregs
, TCVR_REG_SIZE
);
2885 err_out_free_netdev
:
2894 #ifndef CONFIG_SPARC
2895 static int is_quattro_p(struct pci_dev
*pdev
)
2897 struct pci_dev
*busdev
= pdev
->bus
->self
;
2898 struct list_head
*tmp
;
2901 if (busdev
== NULL
||
2902 busdev
->vendor
!= PCI_VENDOR_ID_DEC
||
2903 busdev
->device
!= PCI_DEVICE_ID_DEC_21153
)
2907 tmp
= pdev
->bus
->devices
.next
;
2908 while (tmp
!= &pdev
->bus
->devices
) {
2909 struct pci_dev
*this_pdev
= pci_dev_b(tmp
);
2911 if (this_pdev
->vendor
== PCI_VENDOR_ID_SUN
&&
2912 this_pdev
->device
== PCI_DEVICE_ID_SUN_HAPPYMEAL
)
2924 /* Fetch MAC address from vital product data of PCI ROM. */
2925 static int find_eth_addr_in_vpd(void __iomem
*rom_base
, int len
, int index
, unsigned char *dev_addr
)
2929 for (this_offset
= 0x20; this_offset
< len
; this_offset
++) {
2930 void __iomem
*p
= rom_base
+ this_offset
;
2932 if (readb(p
+ 0) != 0x90 ||
2933 readb(p
+ 1) != 0x00 ||
2934 readb(p
+ 2) != 0x09 ||
2935 readb(p
+ 3) != 0x4e ||
2936 readb(p
+ 4) != 0x41 ||
2937 readb(p
+ 5) != 0x06)
2946 for (i
= 0; i
< 6; i
++)
2947 dev_addr
[i
] = readb(p
+ i
);
2955 static void get_hme_mac_nonsparc(struct pci_dev
*pdev
, unsigned char *dev_addr
)
2958 void __iomem
*p
= pci_map_rom(pdev
, &size
);
2964 if (is_quattro_p(pdev
))
2965 index
= PCI_SLOT(pdev
->devfn
);
2967 found
= readb(p
) == 0x55 &&
2968 readb(p
+ 1) == 0xaa &&
2969 find_eth_addr_in_vpd(p
, (64 * 1024), index
, dev_addr
);
2970 pci_unmap_rom(pdev
, p
);
2975 /* Sun MAC prefix then 3 random bytes. */
2979 get_random_bytes(&dev_addr
[3], 3);
2982 #endif /* !(CONFIG_SPARC) */
2984 static int __devinit
happy_meal_pci_probe(struct pci_dev
*pdev
,
2985 const struct pci_device_id
*ent
)
2987 struct quattro
*qp
= NULL
;
2989 struct pcidev_cookie
*pcp
;
2991 struct happy_meal
*hp
;
2992 struct net_device
*dev
;
2993 void __iomem
*hpreg_base
;
2994 unsigned long hpreg_res
;
2995 int i
, qfe_slot
= -1;
2999 /* Now make sure pci_dev cookie is there. */
3001 pcp
= pdev
->sysdata
;
3003 printk(KERN_ERR
"happymeal(PCI): Some PCI device info missing\n");
3007 strcpy(prom_name
, pcp
->prom_node
->name
);
3009 if (is_quattro_p(pdev
))
3010 strcpy(prom_name
, "SUNW,qfe");
3012 strcpy(prom_name
, "SUNW,hme");
3016 if (!strcmp(prom_name
, "SUNW,qfe") || !strcmp(prom_name
, "qfe")) {
3017 qp
= quattro_pci_find(pdev
);
3020 for (qfe_slot
= 0; qfe_slot
< 4; qfe_slot
++)
3021 if (qp
->happy_meals
[qfe_slot
] == NULL
)
3027 dev
= alloc_etherdev(sizeof(struct happy_meal
));
3031 SET_MODULE_OWNER(dev
);
3032 SET_NETDEV_DEV(dev
, &pdev
->dev
);
3034 if (hme_version_printed
++ == 0)
3035 printk(KERN_INFO
"%s", version
);
3037 dev
->base_addr
= (long) pdev
;
3039 hp
= (struct happy_meal
*)dev
->priv
;
3040 memset(hp
, 0, sizeof(*hp
));
3042 hp
->happy_dev
= pdev
;
3044 spin_lock_init(&hp
->happy_lock
);
3047 hp
->qfe_parent
= qp
;
3048 hp
->qfe_ent
= qfe_slot
;
3049 qp
->happy_meals
[qfe_slot
] = dev
;
3052 hpreg_res
= pci_resource_start(pdev
, 0);
3054 if ((pci_resource_flags(pdev
, 0) & IORESOURCE_IO
) != 0) {
3055 printk(KERN_ERR
"happymeal(PCI): Cannot find proper PCI device base address.\n");
3056 goto err_out_clear_quattro
;
3058 if (pci_request_regions(pdev
, DRV_NAME
)) {
3059 printk(KERN_ERR
"happymeal(PCI): Cannot obtain PCI resources, "
3061 goto err_out_clear_quattro
;
3064 if ((hpreg_base
= ioremap(hpreg_res
, 0x8000)) == 0) {
3065 printk(KERN_ERR
"happymeal(PCI): Unable to remap card memory.\n");
3066 goto err_out_free_res
;
3069 for (i
= 0; i
< 6; i
++) {
3070 if (macaddr
[i
] != 0)
3073 if (i
< 6) { /* a mac address was given */
3074 for (i
= 0; i
< 6; i
++)
3075 dev
->dev_addr
[i
] = macaddr
[i
];
3079 unsigned char *addr
;
3082 if (qfe_slot
!= -1 &&
3083 (addr
= of_get_property(pcp
->prom_node
,
3084 "local-mac-address", &len
)) != NULL
3086 memcpy(dev
->dev_addr
, addr
, 6);
3088 memcpy(dev
->dev_addr
, idprom
->id_ethaddr
, 6);
3091 get_hme_mac_nonsparc(pdev
, &dev
->dev_addr
[0]);
3095 /* Layout registers. */
3096 hp
->gregs
= (hpreg_base
+ 0x0000UL
);
3097 hp
->etxregs
= (hpreg_base
+ 0x2000UL
);
3098 hp
->erxregs
= (hpreg_base
+ 0x4000UL
);
3099 hp
->bigmacregs
= (hpreg_base
+ 0x6000UL
);
3100 hp
->tcvregs
= (hpreg_base
+ 0x7000UL
);
3103 hp
->hm_revision
= of_getintprop_default(pcp
->prom_node
, "hm-rev", 0xff);
3104 if (hp
->hm_revision
== 0xff) {
3107 pci_read_config_byte(pdev
, PCI_REVISION_ID
, &prev
);
3108 hp
->hm_revision
= 0xc0 | (prev
& 0x0f);
3111 /* works with this on non-sparc hosts */
3112 hp
->hm_revision
= 0x20;
3115 /* Now enable the feature flags we can. */
3116 if (hp
->hm_revision
== 0x20 || hp
->hm_revision
== 0x21)
3117 hp
->happy_flags
= HFLAG_20_21
;
3118 else if (hp
->hm_revision
!= 0xa0 && hp
->hm_revision
!= 0xc0)
3119 hp
->happy_flags
= HFLAG_NOT_A0
;
3122 hp
->happy_flags
|= HFLAG_QUATTRO
;
3124 /* And of course, indicate this is PCI. */
3125 hp
->happy_flags
|= HFLAG_PCI
;
3128 /* Assume PCI happy meals can handle all burst sizes. */
3129 hp
->happy_bursts
= DMA_BURSTBITS
;
3132 hp
->happy_block
= (struct hmeal_init_block
*)
3133 pci_alloc_consistent(pdev
, PAGE_SIZE
, &hp
->hblock_dvma
);
3136 if (!hp
->happy_block
) {
3137 printk(KERN_ERR
"happymeal(PCI): Cannot get hme init block.\n");
3138 goto err_out_iounmap
;
3142 hp
->timer_state
= asleep
;
3143 hp
->timer_ticks
= 0;
3145 init_timer(&hp
->happy_timer
);
3148 dev
->open
= &happy_meal_open
;
3149 dev
->stop
= &happy_meal_close
;
3150 dev
->hard_start_xmit
= &happy_meal_start_xmit
;
3151 dev
->get_stats
= &happy_meal_get_stats
;
3152 dev
->set_multicast_list
= &happy_meal_set_multicast
;
3153 dev
->tx_timeout
= &happy_meal_tx_timeout
;
3154 dev
->watchdog_timeo
= 5*HZ
;
3155 dev
->ethtool_ops
= &hme_ethtool_ops
;
3156 dev
->irq
= pdev
->irq
;
3159 /* Happy Meal can do it all... */
3160 dev
->features
|= NETIF_F_SG
| NETIF_F_HW_CSUM
;
3162 #if defined(CONFIG_SBUS) && defined(CONFIG_PCI)
3163 /* Hook up PCI register/dma accessors. */
3164 hp
->read_desc32
= pci_hme_read_desc32
;
3165 hp
->write_txd
= pci_hme_write_txd
;
3166 hp
->write_rxd
= pci_hme_write_rxd
;
3167 hp
->dma_map
= (u32 (*)(void *, void *, long, int))pci_map_single
;
3168 hp
->dma_unmap
= (void (*)(void *, u32
, long, int))pci_unmap_single
;
3169 hp
->dma_sync_for_cpu
= (void (*)(void *, u32
, long, int))
3170 pci_dma_sync_single_for_cpu
;
3171 hp
->dma_sync_for_device
= (void (*)(void *, u32
, long, int))
3172 pci_dma_sync_single_for_device
;
3173 hp
->read32
= pci_hme_read32
;
3174 hp
->write32
= pci_hme_write32
;
3177 /* Grrr, Happy Meal comes up by default not advertising
3178 * full duplex 100baseT capabilities, fix this.
3180 spin_lock_irq(&hp
->happy_lock
);
3181 happy_meal_set_initial_advertisement(hp
);
3182 spin_unlock_irq(&hp
->happy_lock
);
3184 if (register_netdev(hp
->dev
)) {
3185 printk(KERN_ERR
"happymeal(PCI): Cannot register net device, "
3187 goto err_out_iounmap
;
3190 dev_set_drvdata(&pdev
->dev
, hp
);
3193 struct pci_dev
*qpdev
= qp
->quattro_dev
;
3196 if (!strncmp(dev
->name
, "eth", 3)) {
3197 int i
= simple_strtoul(dev
->name
+ 3, NULL
, 10);
3198 sprintf(prom_name
, "-%d", i
+ 3);
3200 printk(KERN_INFO
"%s%s: Quattro HME (PCI/CheerIO) 10/100baseT Ethernet ", dev
->name
, prom_name
);
3201 if (qpdev
->vendor
== PCI_VENDOR_ID_DEC
&&
3202 qpdev
->device
== PCI_DEVICE_ID_DEC_21153
)
3203 printk("DEC 21153 PCI Bridge\n");
3205 printk("unknown bridge %04x.%04x\n",
3206 qpdev
->vendor
, qpdev
->device
);
3210 printk(KERN_INFO
"%s: Quattro HME slot %d (PCI/CheerIO) 10/100baseT Ethernet ",
3211 dev
->name
, qfe_slot
);
3213 printk(KERN_INFO
"%s: HAPPY MEAL (PCI/CheerIO) 10/100BaseT Ethernet ",
3216 for (i
= 0; i
< 6; i
++)
3217 printk("%2.2x%c", dev
->dev_addr
[i
], i
== 5 ? ' ' : ':');
3227 pci_release_regions(pdev
);
3229 err_out_clear_quattro
:
3231 qp
->happy_meals
[qfe_slot
] = NULL
;
3239 static void __devexit
happy_meal_pci_remove(struct pci_dev
*pdev
)
3241 struct happy_meal
*hp
= dev_get_drvdata(&pdev
->dev
);
3242 struct net_device
*net_dev
= hp
->dev
;
3244 unregister_netdev(net_dev
);
3246 pci_free_consistent(hp
->happy_dev
,
3251 pci_release_regions(hp
->happy_dev
);
3253 free_netdev(net_dev
);
3255 dev_set_drvdata(&pdev
->dev
, NULL
);
3258 static struct pci_device_id happymeal_pci_ids
[] = {
3260 .vendor
= PCI_VENDOR_ID_SUN
,
3261 .device
= PCI_DEVICE_ID_SUN_HAPPYMEAL
,
3262 .subvendor
= PCI_ANY_ID
,
3263 .subdevice
= PCI_ANY_ID
,
3265 { } /* Terminating entry */
3268 MODULE_DEVICE_TABLE(pci
, happymeal_pci_ids
);
3270 static struct pci_driver hme_pci_driver
= {
3272 .id_table
= happymeal_pci_ids
,
3273 .probe
= happy_meal_pci_probe
,
3274 .remove
= __devexit_p(happy_meal_pci_remove
),
3277 static int __init
happy_meal_pci_init(void)
3279 return pci_module_init(&hme_pci_driver
);
3282 static void happy_meal_pci_exit(void)
3284 pci_unregister_driver(&hme_pci_driver
);
3286 while (qfe_pci_list
) {
3287 struct quattro
*qfe
= qfe_pci_list
;
3288 struct quattro
*next
= qfe
->next
;
3292 qfe_pci_list
= next
;
3299 static int __devinit
hme_sbus_probe(struct of_device
*dev
, const struct of_device_id
*match
)
3301 struct sbus_dev
*sdev
= to_sbus_device(&dev
->dev
);
3302 struct device_node
*dp
= dev
->node
;
3303 char *model
= of_get_property(dp
, "model", NULL
);
3304 int is_qfe
= (match
->data
!= NULL
);
3306 if (!is_qfe
&& model
&& !strcmp(model
, "SUNW,sbus-qfe"))
3309 return happy_meal_sbus_probe_one(sdev
, is_qfe
);
3312 static int __devexit
hme_sbus_remove(struct of_device
*dev
)
3314 struct happy_meal
*hp
= dev_get_drvdata(&dev
->dev
);
3315 struct net_device
*net_dev
= hp
->dev
;
3317 unregister_netdevice(net_dev
);
3319 /* XXX qfe parent interrupt... */
3321 sbus_iounmap(hp
->gregs
, GREG_REG_SIZE
);
3322 sbus_iounmap(hp
->etxregs
, ETX_REG_SIZE
);
3323 sbus_iounmap(hp
->erxregs
, ERX_REG_SIZE
);
3324 sbus_iounmap(hp
->bigmacregs
, BMAC_REG_SIZE
);
3325 sbus_iounmap(hp
->tcvregs
, TCVR_REG_SIZE
);
3326 sbus_free_consistent(hp
->happy_dev
,
3331 free_netdev(net_dev
);
3333 dev_set_drvdata(&dev
->dev
, NULL
);
3338 static struct of_device_id hme_sbus_match
[] = {
3353 MODULE_DEVICE_TABLE(of
, hme_sbus_match
);
3355 static struct of_platform_driver hme_sbus_driver
= {
3357 .match_table
= hme_sbus_match
,
3358 .probe
= hme_sbus_probe
,
3359 .remove
= __devexit_p(hme_sbus_remove
),
3362 static int __init
happy_meal_sbus_init(void)
3366 err
= of_register_driver(&hme_sbus_driver
, &sbus_bus_type
);
3368 quattro_sbus_register_irqs();
3373 static void happy_meal_sbus_exit(void)
3375 of_unregister_driver(&hme_sbus_driver
);
3376 quattro_sbus_free_irqs();
3378 while (qfe_sbus_list
) {
3379 struct quattro
*qfe
= qfe_sbus_list
;
3380 struct quattro
*next
= qfe
->next
;
3384 qfe_sbus_list
= next
;
3389 static int __init
happy_meal_probe(void)
3394 err
= happy_meal_sbus_init();
3398 err
= happy_meal_pci_init();
3401 happy_meal_sbus_exit();
3410 static void __exit
happy_meal_exit(void)
3413 happy_meal_sbus_exit();
3416 happy_meal_pci_exit();
3420 module_init(happy_meal_probe
);
3421 module_exit(happy_meal_exit
);