]> git.proxmox.com Git - mirror_ubuntu-artful-kernel.git/blob - drivers/net/usb/asix.c
projects / mirror_ubuntu-artful-kernel.git / blob
? search:
summary | shortlog | log | commit | commitdiff | tree
blame | history | raw | HEAD
Merge branch 'upstream-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/jgarzi...
[mirror_ubuntu-artful-kernel.git] / drivers / net / usb / asix.c
1 /*
2 * ASIX AX8817X based USB 2.0 Ethernet Devices
3 * Copyright (C) 2003-2006 David Hollis <dhollis@davehollis.com>
4 * Copyright (C) 2005 Phil Chang <pchang23@sbcglobal.net>
5 * Copyright (C) 2006 James Painter <jamie.painter@iname.com>
6 * Copyright (c) 2002-2003 TiVo Inc.
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; either version 2 of the License, or
11 * (at your option) any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
21 */
22
23 // #define DEBUG // error path messages, extra info
24 // #define VERBOSE // more; success messages
25
26 #include <linux/module.h>
27 #include <linux/kmod.h>
28 #include <linux/init.h>
29 #include <linux/netdevice.h>
30 #include <linux/etherdevice.h>
31 #include <linux/ethtool.h>
32 #include <linux/workqueue.h>
33 #include <linux/mii.h>
34 #include <linux/usb.h>
35 #include <linux/crc32.h>
36
37 #include "usbnet.h"
38
39 #define DRIVER_VERSION "14-Jun-2006"
40 static const char driver_name [] = "asix";
41
42 /* ASIX AX8817X based USB 2.0 Ethernet Devices */
43
44 #define AX_CMD_SET_SW_MII 0x06
45 #define AX_CMD_READ_MII_REG 0x07
46 #define AX_CMD_WRITE_MII_REG 0x08
47 #define AX_CMD_SET_HW_MII 0x0a
48 #define AX_CMD_READ_EEPROM 0x0b
49 #define AX_CMD_WRITE_EEPROM 0x0c
50 #define AX_CMD_WRITE_ENABLE 0x0d
51 #define AX_CMD_WRITE_DISABLE 0x0e
52 #define AX_CMD_READ_RX_CTL 0x0f
53 #define AX_CMD_WRITE_RX_CTL 0x10
54 #define AX_CMD_READ_IPG012 0x11
55 #define AX_CMD_WRITE_IPG0 0x12
56 #define AX_CMD_WRITE_IPG1 0x13
57 #define AX_CMD_READ_NODE_ID 0x13
58 #define AX_CMD_WRITE_IPG2 0x14
59 #define AX_CMD_WRITE_MULTI_FILTER 0x16
60 #define AX88172_CMD_READ_NODE_ID 0x17
61 #define AX_CMD_READ_PHY_ID 0x19
62 #define AX_CMD_READ_MEDIUM_STATUS 0x1a
63 #define AX_CMD_WRITE_MEDIUM_MODE 0x1b
64 #define AX_CMD_READ_MONITOR_MODE 0x1c
65 #define AX_CMD_WRITE_MONITOR_MODE 0x1d
66 #define AX_CMD_READ_GPIOS 0x1e
67 #define AX_CMD_WRITE_GPIOS 0x1f
68 #define AX_CMD_SW_RESET 0x20
69 #define AX_CMD_SW_PHY_STATUS 0x21
70 #define AX_CMD_SW_PHY_SELECT 0x22
71
72 #define AX_MONITOR_MODE 0x01
73 #define AX_MONITOR_LINK 0x02
74 #define AX_MONITOR_MAGIC 0x04
75 #define AX_MONITOR_HSFS 0x10
76
77 /* AX88172 Medium Status Register values */
78 #define AX88172_MEDIUM_FD 0x02
79 #define AX88172_MEDIUM_TX 0x04
80 #define AX88172_MEDIUM_FC 0x10
81 #define AX88172_MEDIUM_DEFAULT \
82 ( AX88172_MEDIUM_FD | AX88172_MEDIUM_TX | AX88172_MEDIUM_FC )
83
84 #define AX_MCAST_FILTER_SIZE 8
85 #define AX_MAX_MCAST 64
86
87 #define AX_SWRESET_CLEAR 0x00
88 #define AX_SWRESET_RR 0x01
89 #define AX_SWRESET_RT 0x02
90 #define AX_SWRESET_PRTE 0x04
91 #define AX_SWRESET_PRL 0x08
92 #define AX_SWRESET_BZ 0x10
93 #define AX_SWRESET_IPRL 0x20
94 #define AX_SWRESET_IPPD 0x40
95
96 #define AX88772_IPG0_DEFAULT 0x15
97 #define AX88772_IPG1_DEFAULT 0x0c
98 #define AX88772_IPG2_DEFAULT 0x12
99
100 /* AX88772 & AX88178 Medium Mode Register */
101 #define AX_MEDIUM_PF 0x0080
102 #define AX_MEDIUM_JFE 0x0040
103 #define AX_MEDIUM_TFC 0x0020
104 #define AX_MEDIUM_RFC 0x0010
105 #define AX_MEDIUM_ENCK 0x0008
106 #define AX_MEDIUM_AC 0x0004
107 #define AX_MEDIUM_FD 0x0002
108 #define AX_MEDIUM_GM 0x0001
109 #define AX_MEDIUM_SM 0x1000
110 #define AX_MEDIUM_SBP 0x0800
111 #define AX_MEDIUM_PS 0x0200
112 #define AX_MEDIUM_RE 0x0100
113
114 #define AX88178_MEDIUM_DEFAULT \
115 (AX_MEDIUM_PS | AX_MEDIUM_FD | AX_MEDIUM_AC | \
116 AX_MEDIUM_RFC | AX_MEDIUM_TFC | AX_MEDIUM_JFE | \
117 AX_MEDIUM_RE )
118
119 #define AX88772_MEDIUM_DEFAULT \
120 (AX_MEDIUM_FD | AX_MEDIUM_RFC | \
121 AX_MEDIUM_TFC | AX_MEDIUM_PS | \
122 AX_MEDIUM_AC | AX_MEDIUM_RE )
123
124 /* AX88772 & AX88178 RX_CTL values */
125 #define AX_RX_CTL_SO 0x0080
126 #define AX_RX_CTL_AP 0x0020
127 #define AX_RX_CTL_AM 0x0010
128 #define AX_RX_CTL_AB 0x0008
129 #define AX_RX_CTL_SEP 0x0004
130 #define AX_RX_CTL_AMALL 0x0002
131 #define AX_RX_CTL_PRO 0x0001
132 #define AX_RX_CTL_MFB_2048 0x0000
133 #define AX_RX_CTL_MFB_4096 0x0100
134 #define AX_RX_CTL_MFB_8192 0x0200
135 #define AX_RX_CTL_MFB_16384 0x0300
136
137 #define AX_DEFAULT_RX_CTL \
138 (AX_RX_CTL_SO | AX_RX_CTL_AB )
139
140 /* GPIO 0 .. 2 toggles */
141 #define AX_GPIO_GPO0EN 0x01 /* GPIO0 Output enable */
142 #define AX_GPIO_GPO_0 0x02 /* GPIO0 Output value */
143 #define AX_GPIO_GPO1EN 0x04 /* GPIO1 Output enable */
144 #define AX_GPIO_GPO_1 0x08 /* GPIO1 Output value */
145 #define AX_GPIO_GPO2EN 0x10 /* GPIO2 Output enable */
146 #define AX_GPIO_GPO_2 0x20 /* GPIO2 Output value */
147 #define AX_GPIO_RESERVED 0x40 /* Reserved */
148 #define AX_GPIO_RSE 0x80 /* Reload serial EEPROM */
149
150 #define AX_EEPROM_MAGIC 0xdeadbeef
151 #define AX88172_EEPROM_LEN 0x40
152 #define AX88772_EEPROM_LEN 0xff
153
154 #define PHY_MODE_MARVELL 0x0000
155 #define MII_MARVELL_LED_CTRL 0x0018
156 #define MII_MARVELL_STATUS 0x001b
157 #define MII_MARVELL_CTRL 0x0014
158
159 #define MARVELL_LED_MANUAL 0x0019
160
161 #define MARVELL_STATUS_HWCFG 0x0004
162
163 #define MARVELL_CTRL_TXDELAY 0x0002
164 #define MARVELL_CTRL_RXDELAY 0x0080
165
166 /* This structure cannot exceed sizeof(unsigned long [5]) AKA 20 bytes */
167 struct asix_data {
168 u8 multi_filter[AX_MCAST_FILTER_SIZE];
169 u8 phymode;
170 u8 ledmode;
171 u8 eeprom_len;
172 };
173
174 struct ax88172_int_data {
175 __le16 res1;
176 u8 link;
177 __le16 res2;
178 u8 status;
179 __le16 res3;
180 } __attribute__ ((packed));
181
182 static int asix_read_cmd(struct usbnet *dev, u8 cmd, u16 value, u16 index,
183 u16 size, void *data)
184 {
185 void *buf;
186 int err = -ENOMEM;
187
188 devdbg(dev,"asix_read_cmd() cmd=0x%02x value=0x%04x index=0x%04x size=%d",
189 cmd, value, index, size);
190
191 buf = kmalloc(size, GFP_KERNEL);
192 if (!buf)
193 goto out;
194
195 err = usb_control_msg(
196 dev->udev,
197 usb_rcvctrlpipe(dev->udev, 0),
198 cmd,
199 USB_DIR_IN | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
200 value,
201 index,
202 buf,
203 size,
204 USB_CTRL_GET_TIMEOUT);
205 if (err == size)
206 memcpy(data, buf, size);
207 else if (err >= 0)
208 err = -EINVAL;
209 kfree(buf);
210
211 out:
212 return err;
213 }
214
215 static int asix_write_cmd(struct usbnet *dev, u8 cmd, u16 value, u16 index,
216 u16 size, void *data)
217 {
218 void *buf = NULL;
219 int err = -ENOMEM;
220
221 devdbg(dev,"asix_write_cmd() cmd=0x%02x value=0x%04x index=0x%04x size=%d",
222 cmd, value, index, size);
223
224 if (data) {
225 buf = kmalloc(size, GFP_KERNEL);
226 if (!buf)
227 goto out;
228 memcpy(buf, data, size);
229 }
230
231 err = usb_control_msg(
232 dev->udev,
233 usb_sndctrlpipe(dev->udev, 0),
234 cmd,
235 USB_DIR_OUT | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
236 value,
237 index,
238 buf,
239 size,
240 USB_CTRL_SET_TIMEOUT);
241 kfree(buf);
242
243 out:
244 return err;
245 }
246
247 static void asix_async_cmd_callback(struct urb *urb)
248 {
249 struct usb_ctrlrequest *req = (struct usb_ctrlrequest *)urb->context;
250
251 if (urb->status < 0)
252 printk(KERN_DEBUG "asix_async_cmd_callback() failed with %d",
253 urb->status);
254
255 kfree(req);
256 usb_free_urb(urb);
257 }
258
259 static void
260 asix_write_cmd_async(struct usbnet *dev, u8 cmd, u16 value, u16 index,
261 u16 size, void *data)
262 {
263 struct usb_ctrlrequest *req;
264 int status;
265 struct urb *urb;
266
267 devdbg(dev,"asix_write_cmd_async() cmd=0x%02x value=0x%04x index=0x%04x size=%d",
268 cmd, value, index, size);
269 if ((urb = usb_alloc_urb(0, GFP_ATOMIC)) == NULL) {
270 deverr(dev, "Error allocating URB in write_cmd_async!");
271 return;
272 }
273
274 if ((req = kmalloc(sizeof(struct usb_ctrlrequest), GFP_ATOMIC)) == NULL) {
275 deverr(dev, "Failed to allocate memory for control request");
276 usb_free_urb(urb);
277 return;
278 }
279
280 req->bRequestType = USB_DIR_OUT | USB_TYPE_VENDOR | USB_RECIP_DEVICE;
281 req->bRequest = cmd;
282 req->wValue = cpu_to_le16(value);
283 req->wIndex = cpu_to_le16(index);
284 req->wLength = cpu_to_le16(size);
285
286 usb_fill_control_urb(urb, dev->udev,
287 usb_sndctrlpipe(dev->udev, 0),
288 (void *)req, data, size,
289 asix_async_cmd_callback, req);
290
291 if((status = usb_submit_urb(urb, GFP_ATOMIC)) < 0) {
292 deverr(dev, "Error submitting the control message: status=%d",
293 status);
294 kfree(req);
295 usb_free_urb(urb);
296 }
297 }
298
299 static int asix_rx_fixup(struct usbnet *dev, struct sk_buff *skb)
300 {
301 u8 *head;
302 u32 header;
303 char *packet;
304 struct sk_buff *ax_skb;
305 u16 size;
306
307 head = (u8 *) skb->data;
308 memcpy(&header, head, sizeof(header));
309 le32_to_cpus(&header);
310 packet = head + sizeof(header);
311
312 skb_pull(skb, 4);
313
314 while (skb->len > 0) {
315 if ((short)(header & 0x0000ffff) !=
316 ~((short)((header & 0xffff0000) >> 16))) {
317 deverr(dev,"asix_rx_fixup() Bad Header Length");
318 }
319 /* get the packet length */
320 size = (u16) (header & 0x0000ffff);
321
322 if ((skb->len) - ((size + 1) & 0xfffe) == 0)
323 return 2;
324 if (size > ETH_FRAME_LEN) {
325 deverr(dev,"asix_rx_fixup() Bad RX Length %d", size);
326 return 0;
327 }
328 ax_skb = skb_clone(skb, GFP_ATOMIC);
329 if (ax_skb) {
330 ax_skb->len = size;
331 ax_skb->data = packet;
332 skb_set_tail_pointer(ax_skb, size);
333 usbnet_skb_return(dev, ax_skb);
334 } else {
335 return 0;
336 }
337
338 skb_pull(skb, (size + 1) & 0xfffe);
339
340 if (skb->len == 0)
341 break;
342
343 head = (u8 *) skb->data;
344 memcpy(&header, head, sizeof(header));
345 le32_to_cpus(&header);
346 packet = head + sizeof(header);
347 skb_pull(skb, 4);
348 }
349
350 if (skb->len < 0) {
351 deverr(dev,"asix_rx_fixup() Bad SKB Length %d", skb->len);
352 return 0;
353 }
354 return 1;
355 }
356
357 static struct sk_buff *asix_tx_fixup(struct usbnet *dev, struct sk_buff *skb,
358 gfp_t flags)
359 {
360 int padlen;
361 int headroom = skb_headroom(skb);
362 int tailroom = skb_tailroom(skb);
363 u32 packet_len;
364 u32 padbytes = 0xffff0000;
365
366 padlen = ((skb->len + 4) % 512) ? 0 : 4;
367
368 if ((!skb_cloned(skb))
369 && ((headroom + tailroom) >= (4 + padlen))) {
370 if ((headroom < 4) || (tailroom < padlen)) {
371 skb->data = memmove(skb->head + 4, skb->data, skb->len);
372 skb_set_tail_pointer(skb, skb->len);
373 }
374 } else {
375 struct sk_buff *skb2;
376 skb2 = skb_copy_expand(skb, 4, padlen, flags);
377 dev_kfree_skb_any(skb);
378 skb = skb2;
379 if (!skb)
380 return NULL;
381 }
382
383 skb_push(skb, 4);
384 packet_len = (((skb->len - 4) ^ 0x0000ffff) << 16) + (skb->len - 4);
385 cpu_to_le32s(&packet_len);
386 skb_copy_to_linear_data(skb, &packet_len, sizeof(packet_len));
387
388 if ((skb->len % 512) == 0) {
389 cpu_to_le32s(&padbytes);
390 memcpy(skb_tail_pointer(skb), &padbytes, sizeof(padbytes));
391 skb_put(skb, sizeof(padbytes));
392 }
393 return skb;
394 }
395
396 static void asix_status(struct usbnet *dev, struct urb *urb)
397 {
398 struct ax88172_int_data *event;
399 int link;
400
401 if (urb->actual_length < 8)
402 return;
403
404 event = urb->transfer_buffer;
405 link = event->link & 0x01;
406 if (netif_carrier_ok(dev->net) != link) {
407 if (link) {
408 netif_carrier_on(dev->net);
409 usbnet_defer_kevent (dev, EVENT_LINK_RESET );
410 } else
411 netif_carrier_off(dev->net);
412 devdbg(dev, "Link Status is: %d", link);
413 }
414 }
415
416 static inline int asix_set_sw_mii(struct usbnet *dev)
417 {
418 int ret;
419 ret = asix_write_cmd(dev, AX_CMD_SET_SW_MII, 0x0000, 0, 0, NULL);
420 if (ret < 0)
421 deverr(dev, "Failed to enable software MII access");
422 return ret;
423 }
424
425 static inline int asix_set_hw_mii(struct usbnet *dev)
426 {
427 int ret;
428 ret = asix_write_cmd(dev, AX_CMD_SET_HW_MII, 0x0000, 0, 0, NULL);
429 if (ret < 0)
430 deverr(dev, "Failed to enable hardware MII access");
431 return ret;
432 }
433
434 static inline int asix_get_phy_addr(struct usbnet *dev)
435 {
436 u8 buf[2];
437 int ret = asix_read_cmd(dev, AX_CMD_READ_PHY_ID, 0, 0, 2, buf);
438
439 devdbg(dev, "asix_get_phy_addr()");
440
441 if (ret < 0) {
442 deverr(dev, "Error reading PHYID register: %02x", ret);
443 goto out;
444 }
445 devdbg(dev, "asix_get_phy_addr() returning 0x%04x", *((__le16 *)buf));
446 ret = buf[1];
447
448 out:
449 return ret;
450 }
451
452 static int asix_sw_reset(struct usbnet *dev, u8 flags)
453 {
454 int ret;
455
456 ret = asix_write_cmd(dev, AX_CMD_SW_RESET, flags, 0, 0, NULL);
457 if (ret < 0)
458 deverr(dev,"Failed to send software reset: %02x", ret);
459
460 return ret;
461 }
462
463 static u16 asix_read_rx_ctl(struct usbnet *dev)
464 {
465 __le16 v;
466 int ret = asix_read_cmd(dev, AX_CMD_READ_RX_CTL, 0, 0, 2, &v);
467
468 if (ret < 0) {
469 deverr(dev, "Error reading RX_CTL register: %02x", ret);
470 goto out;
471 }
472 ret = le16_to_cpu(v);
473 out:
474 return ret;
475 }
476
477 static int asix_write_rx_ctl(struct usbnet *dev, u16 mode)
478 {
479 int ret;
480
481 devdbg(dev,"asix_write_rx_ctl() - mode = 0x%04x", mode);
482 ret = asix_write_cmd(dev, AX_CMD_WRITE_RX_CTL, mode, 0, 0, NULL);
483 if (ret < 0)
484 deverr(dev, "Failed to write RX_CTL mode to 0x%04x: %02x",
485 mode, ret);
486
487 return ret;
488 }
489
490 static u16 asix_read_medium_status(struct usbnet *dev)
491 {
492 __le16 v;
493 int ret = asix_read_cmd(dev, AX_CMD_READ_MEDIUM_STATUS, 0, 0, 2, &v);
494
495 if (ret < 0) {
496 deverr(dev, "Error reading Medium Status register: %02x", ret);
497 goto out;
498 }
499 ret = le16_to_cpu(v);
500 out:
501 return ret;
502 }
503
504 static int asix_write_medium_mode(struct usbnet *dev, u16 mode)
505 {
506 int ret;
507
508 devdbg(dev,"asix_write_medium_mode() - mode = 0x%04x", mode);
509 ret = asix_write_cmd(dev, AX_CMD_WRITE_MEDIUM_MODE, mode, 0, 0, NULL);
510 if (ret < 0)
511 deverr(dev, "Failed to write Medium Mode mode to 0x%04x: %02x",
512 mode, ret);
513
514 return ret;
515 }
516
517 static int asix_write_gpio(struct usbnet *dev, u16 value, int sleep)
518 {
519 int ret;
520
521 devdbg(dev,"asix_write_gpio() - value = 0x%04x", value);
522 ret = asix_write_cmd(dev, AX_CMD_WRITE_GPIOS, value, 0, 0, NULL);
523 if (ret < 0)
524 deverr(dev, "Failed to write GPIO value 0x%04x: %02x",
525 value, ret);
526
527 if (sleep)
528 msleep(sleep);
529
530 return ret;
531 }
532
533 /*
534 * AX88772 & AX88178 have a 16-bit RX_CTL value
535 */
536 static void asix_set_multicast(struct net_device *net)
537 {
538 struct usbnet *dev = netdev_priv(net);
539 struct asix_data *data = (struct asix_data *)&dev->data;
540 u16 rx_ctl = AX_DEFAULT_RX_CTL;
541
542 if (net->flags & IFF_PROMISC) {
543 rx_ctl |= AX_RX_CTL_PRO;
544 } else if (net->flags & IFF_ALLMULTI
545 || net->mc_count > AX_MAX_MCAST) {
546 rx_ctl |= AX_RX_CTL_AMALL;
547 } else if (net->mc_count == 0) {
548 /* just broadcast and directed */
549 } else {
550 /* We use the 20 byte dev->data
551 * for our 8 byte filter buffer
552 * to avoid allocating memory that
553 * is tricky to free later */
554 struct dev_mc_list *mc_list = net->mc_list;
555 u32 crc_bits;
556 int i;
557
558 memset(data->multi_filter, 0, AX_MCAST_FILTER_SIZE);
559
560 /* Build the multicast hash filter. */
561 for (i = 0; i < net->mc_count; i++) {
562 crc_bits =
563 ether_crc(ETH_ALEN,
564 mc_list->dmi_addr) >> 26;
565 data->multi_filter[crc_bits >> 3] |=
566 1 << (crc_bits & 7);
567 mc_list = mc_list->next;
568 }
569
570 asix_write_cmd_async(dev, AX_CMD_WRITE_MULTI_FILTER, 0, 0,
571 AX_MCAST_FILTER_SIZE, data->multi_filter);
572
573 rx_ctl |= AX_RX_CTL_AM;
574 }
575
576 asix_write_cmd_async(dev, AX_CMD_WRITE_RX_CTL, rx_ctl, 0, 0, NULL);
577 }
578
579 static int asix_mdio_read(struct net_device *netdev, int phy_id, int loc)
580 {
581 struct usbnet *dev = netdev_priv(netdev);
582 __le16 res;
583
584 mutex_lock(&dev->phy_mutex);
585 asix_set_sw_mii(dev);
586 asix_read_cmd(dev, AX_CMD_READ_MII_REG, phy_id,
587 (__u16)loc, 2, &res);
588 asix_set_hw_mii(dev);
589 mutex_unlock(&dev->phy_mutex);
590
591 devdbg(dev, "asix_mdio_read() phy_id=0x%02x, loc=0x%02x, returns=0x%04x", phy_id, loc, le16_to_cpu(res));
592
593 return le16_to_cpu(res);
594 }
595
596 static void
597 asix_mdio_write(struct net_device *netdev, int phy_id, int loc, int val)
598 {
599 struct usbnet *dev = netdev_priv(netdev);
600 __le16 res = cpu_to_le16(val);
601
602 devdbg(dev, "asix_mdio_write() phy_id=0x%02x, loc=0x%02x, val=0x%04x", phy_id, loc, val);
603 mutex_lock(&dev->phy_mutex);
604 asix_set_sw_mii(dev);
605 asix_write_cmd(dev, AX_CMD_WRITE_MII_REG, phy_id, (__u16)loc, 2, &res);
606 asix_set_hw_mii(dev);
607 mutex_unlock(&dev->phy_mutex);
608 }
609
610 /* Get the PHY Identifier from the PHYSID1 & PHYSID2 MII registers */
611 static u32 asix_get_phyid(struct usbnet *dev)
612 {
613 int phy_reg;
614 u32 phy_id;
615
616 phy_reg = asix_mdio_read(dev->net, dev->mii.phy_id, MII_PHYSID1);
617 if (phy_reg < 0)
618 return 0;
619
620 phy_id = (phy_reg & 0xffff) << 16;
621
622 phy_reg = asix_mdio_read(dev->net, dev->mii.phy_id, MII_PHYSID2);
623 if (phy_reg < 0)
624 return 0;
625
626 phy_id |= (phy_reg & 0xffff);
627
628 return phy_id;
629 }
630
631 static void
632 asix_get_wol(struct net_device *net, struct ethtool_wolinfo *wolinfo)
633 {
634 struct usbnet *dev = netdev_priv(net);
635 u8 opt;
636
637 if (asix_read_cmd(dev, AX_CMD_READ_MONITOR_MODE, 0, 0, 1, &opt) < 0) {
638 wolinfo->supported = 0;
639 wolinfo->wolopts = 0;
640 return;
641 }
642 wolinfo->supported = WAKE_PHY | WAKE_MAGIC;
643 wolinfo->wolopts = 0;
644 if (opt & AX_MONITOR_MODE) {
645 if (opt & AX_MONITOR_LINK)
646 wolinfo->wolopts |= WAKE_PHY;
647 if (opt & AX_MONITOR_MAGIC)
648 wolinfo->wolopts |= WAKE_MAGIC;
649 }
650 }
651
652 static int
653 asix_set_wol(struct net_device *net, struct ethtool_wolinfo *wolinfo)
654 {
655 struct usbnet *dev = netdev_priv(net);
656 u8 opt = 0;
657
658 if (wolinfo->wolopts & WAKE_PHY)
659 opt |= AX_MONITOR_LINK;
660 if (wolinfo->wolopts & WAKE_MAGIC)
661 opt |= AX_MONITOR_MAGIC;
662 if (opt != 0)
663 opt |= AX_MONITOR_MODE;
664
665 if (asix_write_cmd(dev, AX_CMD_WRITE_MONITOR_MODE,
666 opt, 0, 0, NULL) < 0)
667 return -EINVAL;
668
669 return 0;
670 }
671
672 static int asix_get_eeprom_len(struct net_device *net)
673 {
674 struct usbnet *dev = netdev_priv(net);
675 struct asix_data *data = (struct asix_data *)&dev->data;
676
677 return data->eeprom_len;
678 }
679
680 static int asix_get_eeprom(struct net_device *net,
681 struct ethtool_eeprom *eeprom, u8 *data)
682 {
683 struct usbnet *dev = netdev_priv(net);
684 __le16 *ebuf = (__le16 *)data;
685 int i;
686
687 /* Crude hack to ensure that we don't overwrite memory
688 * if an odd length is supplied
689 */
690 if (eeprom->len % 2)
691 return -EINVAL;
692
693 eeprom->magic = AX_EEPROM_MAGIC;
694
695 /* ax8817x returns 2 bytes from eeprom on read */
696 for (i=0; i < eeprom->len / 2; i++) {
697 if (asix_read_cmd(dev, AX_CMD_READ_EEPROM,
698 eeprom->offset + i, 0, 2, &ebuf[i]) < 0)
699 return -EINVAL;
700 }
701 return 0;
702 }
703
704 static void asix_get_drvinfo (struct net_device *net,
705 struct ethtool_drvinfo *info)
706 {
707 struct usbnet *dev = netdev_priv(net);
708 struct asix_data *data = (struct asix_data *)&dev->data;
709
710 /* Inherit standard device info */
711 usbnet_get_drvinfo(net, info);
712 strncpy (info->driver, driver_name, sizeof info->driver);
713 strncpy (info->version, DRIVER_VERSION, sizeof info->version);
714 info->eedump_len = data->eeprom_len;
715 }
716
717 static u32 asix_get_link(struct net_device *net)
718 {
719 struct usbnet *dev = netdev_priv(net);
720
721 return mii_link_ok(&dev->mii);
722 }
723
724 static int asix_ioctl (struct net_device *net, struct ifreq *rq, int cmd)
725 {
726 struct usbnet *dev = netdev_priv(net);
727
728 return generic_mii_ioctl(&dev->mii, if_mii(rq), cmd, NULL);
729 }
730
731 /* We need to override some ethtool_ops so we require our
732 own structure so we don't interfere with other usbnet
733 devices that may be connected at the same time. */
734 static struct ethtool_ops ax88172_ethtool_ops = {
735 .get_drvinfo = asix_get_drvinfo,
736 .get_link = asix_get_link,
737 .get_msglevel = usbnet_get_msglevel,
738 .set_msglevel = usbnet_set_msglevel,
739 .get_wol = asix_get_wol,
740 .set_wol = asix_set_wol,
741 .get_eeprom_len = asix_get_eeprom_len,
742 .get_eeprom = asix_get_eeprom,
743 .get_settings = usbnet_get_settings,
744 .set_settings = usbnet_set_settings,
745 .nway_reset = usbnet_nway_reset,
746 };
747
748 static void ax88172_set_multicast(struct net_device *net)
749 {
750 struct usbnet *dev = netdev_priv(net);
751 struct asix_data *data = (struct asix_data *)&dev->data;
752 u8 rx_ctl = 0x8c;
753
754 if (net->flags & IFF_PROMISC) {
755 rx_ctl |= 0x01;
756 } else if (net->flags & IFF_ALLMULTI
757 || net->mc_count > AX_MAX_MCAST) {
758 rx_ctl |= 0x02;
759 } else if (net->mc_count == 0) {
760 /* just broadcast and directed */
761 } else {
762 /* We use the 20 byte dev->data
763 * for our 8 byte filter buffer
764 * to avoid allocating memory that
765 * is tricky to free later */
766 struct dev_mc_list *mc_list = net->mc_list;
767 u32 crc_bits;
768 int i;
769
770 memset(data->multi_filter, 0, AX_MCAST_FILTER_SIZE);
771
772 /* Build the multicast hash filter. */
773 for (i = 0; i < net->mc_count; i++) {
774 crc_bits =
775 ether_crc(ETH_ALEN,
776 mc_list->dmi_addr) >> 26;
777 data->multi_filter[crc_bits >> 3] |=
778 1 << (crc_bits & 7);
779 mc_list = mc_list->next;
780 }
781
782 asix_write_cmd_async(dev, AX_CMD_WRITE_MULTI_FILTER, 0, 0,
783 AX_MCAST_FILTER_SIZE, data->multi_filter);
784
785 rx_ctl |= 0x10;
786 }
787
788 asix_write_cmd_async(dev, AX_CMD_WRITE_RX_CTL, rx_ctl, 0, 0, NULL);
789 }
790
791 static int ax88172_link_reset(struct usbnet *dev)
792 {
793 u8 mode;
794 struct ethtool_cmd ecmd;
795
796 mii_check_media(&dev->mii, 1, 1);
797 mii_ethtool_gset(&dev->mii, &ecmd);
798 mode = AX88172_MEDIUM_DEFAULT;
799
800 if (ecmd.duplex != DUPLEX_FULL)
801 mode |= ~AX88172_MEDIUM_FD;
802
803 devdbg(dev, "ax88172_link_reset() speed: %d duplex: %d setting mode to 0x%04x", ecmd.speed, ecmd.duplex, mode);
804
805 asix_write_medium_mode(dev, mode);
806
807 return 0;
808 }
809
810 static int ax88172_bind(struct usbnet *dev, struct usb_interface *intf)
811 {
812 int ret = 0;
813 u8 buf[ETH_ALEN];
814 int i;
815 unsigned long gpio_bits = dev->driver_info->data;
816 struct asix_data *data = (struct asix_data *)&dev->data;
817
818 data->eeprom_len = AX88172_EEPROM_LEN;
819
820 usbnet_get_endpoints(dev,intf);
821
822 /* Toggle the GPIOs in a manufacturer/model specific way */
823 for (i = 2; i >= 0; i--) {
824 if ((ret = asix_write_cmd(dev, AX_CMD_WRITE_GPIOS,
825 (gpio_bits >> (i * 8)) & 0xff, 0, 0,
826 NULL)) < 0)
827 goto out;
828 msleep(5);
829 }
830
831 if ((ret = asix_write_rx_ctl(dev, 0x80)) < 0)
832 goto out;
833
834 /* Get the MAC address */
835 if ((ret = asix_read_cmd(dev, AX88172_CMD_READ_NODE_ID,
836 0, 0, ETH_ALEN, buf)) < 0) {
837 dbg("read AX_CMD_READ_NODE_ID failed: %d", ret);
838 goto out;
839 }
840 memcpy(dev->net->dev_addr, buf, ETH_ALEN);
841
842 /* Initialize MII structure */
843 dev->mii.dev = dev->net;
844 dev->mii.mdio_read = asix_mdio_read;
845 dev->mii.mdio_write = asix_mdio_write;
846 dev->mii.phy_id_mask = 0x3f;
847 dev->mii.reg_num_mask = 0x1f;
848 dev->mii.phy_id = asix_get_phy_addr(dev);
849 dev->net->do_ioctl = asix_ioctl;
850
851 dev->net->set_multicast_list = ax88172_set_multicast;
852 dev->net->ethtool_ops = &ax88172_ethtool_ops;
853
854 asix_mdio_write(dev->net, dev->mii.phy_id, MII_BMCR, BMCR_RESET);
855 asix_mdio_write(dev->net, dev->mii.phy_id, MII_ADVERTISE,
856 ADVERTISE_ALL | ADVERTISE_CSMA | ADVERTISE_PAUSE_CAP);
857 mii_nway_restart(&dev->mii);
858
859 return 0;
860
861 out:
862 return ret;
863 }
864
865 static struct ethtool_ops ax88772_ethtool_ops = {
866 .get_drvinfo = asix_get_drvinfo,
867 .get_link = asix_get_link,
868 .get_msglevel = usbnet_get_msglevel,
869 .set_msglevel = usbnet_set_msglevel,
870 .get_wol = asix_get_wol,
871 .set_wol = asix_set_wol,
872 .get_eeprom_len = asix_get_eeprom_len,
873 .get_eeprom = asix_get_eeprom,
874 .get_settings = usbnet_get_settings,
875 .set_settings = usbnet_set_settings,
876 .nway_reset = usbnet_nway_reset,
877 };
878
879 static int ax88772_link_reset(struct usbnet *dev)
880 {
881 u16 mode;
882 struct ethtool_cmd ecmd;
883
884 mii_check_media(&dev->mii, 1, 1);
885 mii_ethtool_gset(&dev->mii, &ecmd);
886 mode = AX88772_MEDIUM_DEFAULT;
887
888 if (ecmd.speed != SPEED_100)
889 mode &= ~AX_MEDIUM_PS;
890
891 if (ecmd.duplex != DUPLEX_FULL)
892 mode &= ~AX_MEDIUM_FD;
893
894 devdbg(dev, "ax88772_link_reset() speed: %d duplex: %d setting mode to 0x%04x", ecmd.speed, ecmd.duplex, mode);
895
896 asix_write_medium_mode(dev, mode);
897
898 return 0;
899 }
900
901 static int ax88772_bind(struct usbnet *dev, struct usb_interface *intf)
902 {
903 int ret, embd_phy;
904 u16 rx_ctl;
905 struct asix_data *data = (struct asix_data *)&dev->data;
906 u8 buf[ETH_ALEN];
907 u32 phyid;
908
909 data->eeprom_len = AX88772_EEPROM_LEN;
910
911 usbnet_get_endpoints(dev,intf);
912
913 if ((ret = asix_write_gpio(dev,
914 AX_GPIO_RSE | AX_GPIO_GPO_2 | AX_GPIO_GPO2EN, 5)) < 0)
915 goto out;
916
917 /* 0x10 is the phy id of the embedded 10/100 ethernet phy */
918 embd_phy = ((asix_get_phy_addr(dev) & 0x1f) == 0x10 ? 1 : 0);
919 if ((ret = asix_write_cmd(dev, AX_CMD_SW_PHY_SELECT,
920 embd_phy, 0, 0, NULL)) < 0) {
921 dbg("Select PHY #1 failed: %d", ret);
922 goto out;
923 }
924
925 if ((ret = asix_sw_reset(dev, AX_SWRESET_IPPD | AX_SWRESET_PRL)) < 0)
926 goto out;
927
928 msleep(150);
929 if ((ret = asix_sw_reset(dev, AX_SWRESET_CLEAR)) < 0)
930 goto out;
931
932 msleep(150);
933 if (embd_phy) {
934 if ((ret = asix_sw_reset(dev, AX_SWRESET_IPRL)) < 0)
935 goto out;
936 }
937 else {
938 if ((ret = asix_sw_reset(dev, AX_SWRESET_PRTE)) < 0)
939 goto out;
940 }
941
942 msleep(150);
943 rx_ctl = asix_read_rx_ctl(dev);
944 dbg("RX_CTL is 0x%04x after software reset", rx_ctl);
945 if ((ret = asix_write_rx_ctl(dev, 0x0000)) < 0)
946 goto out;
947
948 rx_ctl = asix_read_rx_ctl(dev);
949 dbg("RX_CTL is 0x%04x setting to 0x0000", rx_ctl);
950
951 /* Get the MAC address */
952 if ((ret = asix_read_cmd(dev, AX_CMD_READ_NODE_ID,
953 0, 0, ETH_ALEN, buf)) < 0) {
954 dbg("Failed to read MAC address: %d", ret);
955 goto out;
956 }
957 memcpy(dev->net->dev_addr, buf, ETH_ALEN);
958
959 /* Initialize MII structure */
960 dev->mii.dev = dev->net;
961 dev->mii.mdio_read = asix_mdio_read;
962 dev->mii.mdio_write = asix_mdio_write;
963 dev->mii.phy_id_mask = 0x1f;
964 dev->mii.reg_num_mask = 0x1f;
965 dev->net->do_ioctl = asix_ioctl;
966 dev->mii.phy_id = asix_get_phy_addr(dev);
967
968 phyid = asix_get_phyid(dev);
969 dbg("PHYID=0x%08x", phyid);
970
971 if ((ret = asix_sw_reset(dev, AX_SWRESET_PRL)) < 0)
972 goto out;
973
974 msleep(150);
975
976 if ((ret = asix_sw_reset(dev, AX_SWRESET_IPRL | AX_SWRESET_PRL)) < 0)
977 goto out;
978
979 msleep(150);
980
981 dev->net->set_multicast_list = asix_set_multicast;
982 dev->net->ethtool_ops = &ax88772_ethtool_ops;
983
984 asix_mdio_write(dev->net, dev->mii.phy_id, MII_BMCR, BMCR_RESET);
985 asix_mdio_write(dev->net, dev->mii.phy_id, MII_ADVERTISE,
986 ADVERTISE_ALL | ADVERTISE_CSMA);
987 mii_nway_restart(&dev->mii);
988
989 if ((ret = asix_write_medium_mode(dev, AX88772_MEDIUM_DEFAULT)) < 0)
990 goto out;
991
992 if ((ret = asix_write_cmd(dev, AX_CMD_WRITE_IPG0,
993 AX88772_IPG0_DEFAULT | AX88772_IPG1_DEFAULT,
994 AX88772_IPG2_DEFAULT, 0, NULL)) < 0) {
995 dbg("Write IPG,IPG1,IPG2 failed: %d", ret);
996 goto out;
997 }
998
999 /* Set RX_CTL to default values with 2k buffer, and enable cactus */
1000 if ((ret = asix_write_rx_ctl(dev, AX_DEFAULT_RX_CTL)) < 0)
1001 goto out;
1002
1003 rx_ctl = asix_read_rx_ctl(dev);
1004 dbg("RX_CTL is 0x%04x after all initializations", rx_ctl);
1005
1006 rx_ctl = asix_read_medium_status(dev);
1007 dbg("Medium Status is 0x%04x after all initializations", rx_ctl);
1008
1009 /* Asix framing packs multiple eth frames into a 2K usb bulk transfer */
1010 if (dev->driver_info->flags & FLAG_FRAMING_AX) {
1011 /* hard_mtu is still the default - the device does not support
1012 jumbo eth frames */
1013 dev->rx_urb_size = 2048;
1014 }
1015 return 0;
1016
1017 out:
1018 return ret;
1019 }
1020
1021 static struct ethtool_ops ax88178_ethtool_ops = {
1022 .get_drvinfo = asix_get_drvinfo,
1023 .get_link = asix_get_link,
1024 .get_msglevel = usbnet_get_msglevel,
1025 .set_msglevel = usbnet_set_msglevel,
1026 .get_wol = asix_get_wol,
1027 .set_wol = asix_set_wol,
1028 .get_eeprom_len = asix_get_eeprom_len,
1029 .get_eeprom = asix_get_eeprom,
1030 .get_settings = usbnet_get_settings,
1031 .set_settings = usbnet_set_settings,
1032 .nway_reset = usbnet_nway_reset,
1033 };
1034
1035 static int marvell_phy_init(struct usbnet *dev)
1036 {
1037 struct asix_data *data = (struct asix_data *)&dev->data;
1038 u16 reg;
1039
1040 devdbg(dev,"marvell_phy_init()");
1041
1042 reg = asix_mdio_read(dev->net, dev->mii.phy_id, MII_MARVELL_STATUS);
1043 devdbg(dev,"MII_MARVELL_STATUS = 0x%04x", reg);
1044
1045 asix_mdio_write(dev->net, dev->mii.phy_id, MII_MARVELL_CTRL,
1046 MARVELL_CTRL_RXDELAY | MARVELL_CTRL_TXDELAY);
1047
1048 if (data->ledmode) {
1049 reg = asix_mdio_read(dev->net, dev->mii.phy_id,
1050 MII_MARVELL_LED_CTRL);
1051 devdbg(dev,"MII_MARVELL_LED_CTRL (1) = 0x%04x", reg);
1052
1053 reg &= 0xf8ff;
1054 reg |= (1 + 0x0100);
1055 asix_mdio_write(dev->net, dev->mii.phy_id,
1056 MII_MARVELL_LED_CTRL, reg);
1057
1058 reg = asix_mdio_read(dev->net, dev->mii.phy_id,
1059 MII_MARVELL_LED_CTRL);
1060 devdbg(dev,"MII_MARVELL_LED_CTRL (2) = 0x%04x", reg);
1061 reg &= 0xfc0f;
1062 }
1063
1064 return 0;
1065 }
1066
1067 static int marvell_led_status(struct usbnet *dev, u16 speed)
1068 {
1069 u16 reg = asix_mdio_read(dev->net, dev->mii.phy_id, MARVELL_LED_MANUAL);
1070
1071 devdbg(dev, "marvell_led_status() read 0x%04x", reg);
1072
1073 /* Clear out the center LED bits - 0x03F0 */
1074 reg &= 0xfc0f;
1075
1076 switch (speed) {
1077 case SPEED_1000:
1078 reg |= 0x03e0;
1079 break;
1080 case SPEED_100:
1081 reg |= 0x03b0;
1082 break;
1083 default:
1084 reg |= 0x02f0;
1085 }
1086
1087 devdbg(dev, "marvell_led_status() writing 0x%04x", reg);
1088 asix_mdio_write(dev->net, dev->mii.phy_id, MARVELL_LED_MANUAL, reg);
1089
1090 return 0;
1091 }
1092
1093 static int ax88178_link_reset(struct usbnet *dev)
1094 {
1095 u16 mode;
1096 struct ethtool_cmd ecmd;
1097 struct asix_data *data = (struct asix_data *)&dev->data;
1098
1099 devdbg(dev,"ax88178_link_reset()");
1100
1101 mii_check_media(&dev->mii, 1, 1);
1102 mii_ethtool_gset(&dev->mii, &ecmd);
1103 mode = AX88178_MEDIUM_DEFAULT;
1104
1105 if (ecmd.speed == SPEED_1000)
1106 mode |= AX_MEDIUM_GM | AX_MEDIUM_ENCK;
1107 else if (ecmd.speed == SPEED_100)
1108 mode |= AX_MEDIUM_PS;
1109 else
1110 mode &= ~(AX_MEDIUM_PS | AX_MEDIUM_GM);
1111
1112 if (ecmd.duplex == DUPLEX_FULL)
1113 mode |= AX_MEDIUM_FD;
1114 else
1115 mode &= ~AX_MEDIUM_FD;
1116
1117 devdbg(dev, "ax88178_link_reset() speed: %d duplex: %d setting mode to 0x%04x", ecmd.speed, ecmd.duplex, mode);
1118
1119 asix_write_medium_mode(dev, mode);
1120
1121 if (data->phymode == PHY_MODE_MARVELL && data->ledmode)
1122 marvell_led_status(dev, ecmd.speed);
1123
1124 return 0;
1125 }
1126
1127 static void ax88178_set_mfb(struct usbnet *dev)
1128 {
1129 u16 mfb = AX_RX_CTL_MFB_16384;
1130 u16 rxctl;
1131 u16 medium;
1132 int old_rx_urb_size = dev->rx_urb_size;
1133
1134 if (dev->hard_mtu < 2048) {
1135 dev->rx_urb_size = 2048;
1136 mfb = AX_RX_CTL_MFB_2048;
1137 } else if (dev->hard_mtu < 4096) {
1138 dev->rx_urb_size = 4096;
1139 mfb = AX_RX_CTL_MFB_4096;
1140 } else if (dev->hard_mtu < 8192) {
1141 dev->rx_urb_size = 8192;
1142 mfb = AX_RX_CTL_MFB_8192;
1143 } else if (dev->hard_mtu < 16384) {
1144 dev->rx_urb_size = 16384;
1145 mfb = AX_RX_CTL_MFB_16384;
1146 }
1147
1148 rxctl = asix_read_rx_ctl(dev);
1149 asix_write_rx_ctl(dev, (rxctl & ~AX_RX_CTL_MFB_16384) | mfb);
1150
1151 medium = asix_read_medium_status(dev);
1152 if (dev->net->mtu > 1500)
1153 medium |= AX_MEDIUM_JFE;
1154 else
1155 medium &= ~AX_MEDIUM_JFE;
1156 asix_write_medium_mode(dev, medium);
1157
1158 if (dev->rx_urb_size > old_rx_urb_size)
1159 usbnet_unlink_rx_urbs(dev);
1160 }
1161
1162 static int ax88178_change_mtu(struct net_device *net, int new_mtu)
1163 {
1164 struct usbnet *dev = netdev_priv(net);
1165 int ll_mtu = new_mtu + net->hard_header_len + 4;
1166
1167 devdbg(dev, "ax88178_change_mtu() new_mtu=%d", new_mtu);
1168
1169 if (new_mtu <= 0 || ll_mtu > 16384)
1170 return -EINVAL;
1171
1172 if ((ll_mtu % dev->maxpacket) == 0)
1173 return -EDOM;
1174
1175 net->mtu = new_mtu;
1176 dev->hard_mtu = net->mtu + net->hard_header_len;
1177 ax88178_set_mfb(dev);
1178
1179 return 0;
1180 }
1181
1182 static int ax88178_bind(struct usbnet *dev, struct usb_interface *intf)
1183 {
1184 struct asix_data *data = (struct asix_data *)&dev->data;
1185 int ret;
1186 u8 buf[ETH_ALEN];
1187 __le16 eeprom;
1188 u8 status;
1189 int gpio0 = 0;
1190 u32 phyid;
1191
1192 usbnet_get_endpoints(dev,intf);
1193
1194 asix_read_cmd(dev, AX_CMD_READ_GPIOS, 0, 0, 1, &status);
1195 dbg("GPIO Status: 0x%04x", status);
1196
1197 asix_write_cmd(dev, AX_CMD_WRITE_ENABLE, 0, 0, 0, NULL);
1198 asix_read_cmd(dev, AX_CMD_READ_EEPROM, 0x0017, 0, 2, &eeprom);
1199 asix_write_cmd(dev, AX_CMD_WRITE_DISABLE, 0, 0, 0, NULL);
1200
1201 dbg("EEPROM index 0x17 is 0x%04x", eeprom);
1202
1203 if (eeprom == cpu_to_le16(0xffff)) {
1204 data->phymode = PHY_MODE_MARVELL;
1205 data->ledmode = 0;
1206 gpio0 = 1;
1207 } else {
1208 data->phymode = le16_to_cpu(eeprom) & 7;
1209 data->ledmode = le16_to_cpu(eeprom) >> 8;
1210 gpio0 = (le16_to_cpu(eeprom) & 0x80) ? 0 : 1;
1211 }
1212 dbg("GPIO0: %d, PhyMode: %d", gpio0, data->phymode);
1213
1214 asix_write_gpio(dev, AX_GPIO_RSE | AX_GPIO_GPO_1 | AX_GPIO_GPO1EN, 40);
1215 if ((le16_to_cpu(eeprom) >> 8) != 1) {
1216 asix_write_gpio(dev, 0x003c, 30);
1217 asix_write_gpio(dev, 0x001c, 300);
1218 asix_write_gpio(dev, 0x003c, 30);
1219 } else {
1220 dbg("gpio phymode == 1 path");
1221 asix_write_gpio(dev, AX_GPIO_GPO1EN, 30);
1222 asix_write_gpio(dev, AX_GPIO_GPO1EN | AX_GPIO_GPO_1, 30);
1223 }
1224
1225 asix_sw_reset(dev, 0);
1226 msleep(150);
1227
1228 asix_sw_reset(dev, AX_SWRESET_PRL | AX_SWRESET_IPPD);
1229 msleep(150);
1230
1231 asix_write_rx_ctl(dev, 0);
1232
1233 /* Get the MAC address */
1234 if ((ret = asix_read_cmd(dev, AX_CMD_READ_NODE_ID,
1235 0, 0, ETH_ALEN, buf)) < 0) {
1236 dbg("Failed to read MAC address: %d", ret);
1237 goto out;
1238 }
1239 memcpy(dev->net->dev_addr, buf, ETH_ALEN);
1240
1241 /* Initialize MII structure */
1242 dev->mii.dev = dev->net;
1243 dev->mii.mdio_read = asix_mdio_read;
1244 dev->mii.mdio_write = asix_mdio_write;
1245 dev->mii.phy_id_mask = 0x1f;
1246 dev->mii.reg_num_mask = 0xff;
1247 dev->mii.supports_gmii = 1;
1248 dev->net->do_ioctl = asix_ioctl;
1249 dev->mii.phy_id = asix_get_phy_addr(dev);
1250 dev->net->set_multicast_list = asix_set_multicast;
1251 dev->net->ethtool_ops = &ax88178_ethtool_ops;
1252 dev->net->change_mtu = &ax88178_change_mtu;
1253
1254 phyid = asix_get_phyid(dev);
1255 dbg("PHYID=0x%08x", phyid);
1256
1257 if (data->phymode == PHY_MODE_MARVELL) {
1258 marvell_phy_init(dev);
1259 msleep(60);
1260 }
1261
1262 asix_mdio_write(dev->net, dev->mii.phy_id, MII_BMCR,
1263 BMCR_RESET | BMCR_ANENABLE);
1264 asix_mdio_write(dev->net, dev->mii.phy_id, MII_ADVERTISE,
1265 ADVERTISE_ALL | ADVERTISE_CSMA | ADVERTISE_PAUSE_CAP);
1266 asix_mdio_write(dev->net, dev->mii.phy_id, MII_CTRL1000,
1267 ADVERTISE_1000FULL);
1268
1269 mii_nway_restart(&dev->mii);
1270
1271 if ((ret = asix_write_medium_mode(dev, AX88178_MEDIUM_DEFAULT)) < 0)
1272 goto out;
1273
1274 if ((ret = asix_write_rx_ctl(dev, AX_DEFAULT_RX_CTL)) < 0)
1275 goto out;
1276
1277 /* Asix framing packs multiple eth frames into a 2K usb bulk transfer */
1278 if (dev->driver_info->flags & FLAG_FRAMING_AX) {
1279 /* hard_mtu is still the default - the device does not support
1280 jumbo eth frames */
1281 dev->rx_urb_size = 2048;
1282 }
1283 return 0;
1284
1285 out:
1286 return ret;
1287 }
1288
1289 static const struct driver_info ax8817x_info = {
1290 .description = "ASIX AX8817x USB 2.0 Ethernet",
1291 .bind = ax88172_bind,
1292 .status = asix_status,
1293 .link_reset = ax88172_link_reset,
1294 .reset = ax88172_link_reset,
1295 .flags = FLAG_ETHER,
1296 .data = 0x00130103,
1297 };
1298
1299 static const struct driver_info dlink_dub_e100_info = {
1300 .description = "DLink DUB-E100 USB Ethernet",
1301 .bind = ax88172_bind,
1302 .status = asix_status,
1303 .link_reset = ax88172_link_reset,
1304 .reset = ax88172_link_reset,
1305 .flags = FLAG_ETHER,
1306 .data = 0x009f9d9f,
1307 };
1308
1309 static const struct driver_info netgear_fa120_info = {
1310 .description = "Netgear FA-120 USB Ethernet",
1311 .bind = ax88172_bind,
1312 .status = asix_status,
1313 .link_reset = ax88172_link_reset,
1314 .reset = ax88172_link_reset,
1315 .flags = FLAG_ETHER,
1316 .data = 0x00130103,
1317 };
1318
1319 static const struct driver_info hawking_uf200_info = {
1320 .description = "Hawking UF200 USB Ethernet",
1321 .bind = ax88172_bind,
1322 .status = asix_status,
1323 .link_reset = ax88172_link_reset,
1324 .reset = ax88172_link_reset,
1325 .flags = FLAG_ETHER,
1326 .data = 0x001f1d1f,
1327 };
1328
1329 static const struct driver_info ax88772_info = {
1330 .description = "ASIX AX88772 USB 2.0 Ethernet",
1331 .bind = ax88772_bind,
1332 .status = asix_status,
1333 .link_reset = ax88772_link_reset,
1334 .reset = ax88772_link_reset,
1335 .flags = FLAG_ETHER | FLAG_FRAMING_AX,
1336 .rx_fixup = asix_rx_fixup,
1337 .tx_fixup = asix_tx_fixup,
1338 };
1339
1340 static const struct driver_info ax88178_info = {
1341 .description = "ASIX AX88178 USB 2.0 Ethernet",
1342 .bind = ax88178_bind,
1343 .status = asix_status,
1344 .link_reset = ax88178_link_reset,
1345 .reset = ax88178_link_reset,
1346 .flags = FLAG_ETHER | FLAG_FRAMING_AX,
1347 .rx_fixup = asix_rx_fixup,
1348 .tx_fixup = asix_tx_fixup,
1349 };
1350
1351 static const struct usb_device_id products [] = {
1352 {
1353 // Linksys USB200M
1354 USB_DEVICE (0x077b, 0x2226),
1355 .driver_info = (unsigned long) &ax8817x_info,
1356 }, {
1357 // Netgear FA120
1358 USB_DEVICE (0x0846, 0x1040),
1359 .driver_info = (unsigned long) &netgear_fa120_info,
1360 }, {
1361 // DLink DUB-E100
1362 USB_DEVICE (0x2001, 0x1a00),
1363 .driver_info = (unsigned long) &dlink_dub_e100_info,
1364 }, {
1365 // Intellinet, ST Lab USB Ethernet
1366 USB_DEVICE (0x0b95, 0x1720),
1367 .driver_info = (unsigned long) &ax8817x_info,
1368 }, {
1369 // Hawking UF200, TrendNet TU2-ET100
1370 USB_DEVICE (0x07b8, 0x420a),
1371 .driver_info = (unsigned long) &hawking_uf200_info,
1372 }, {
1373 // Billionton Systems, USB2AR
1374 USB_DEVICE (0x08dd, 0x90ff),
1375 .driver_info = (unsigned long) &ax8817x_info,
1376 }, {
1377 // ATEN UC210T
1378 USB_DEVICE (0x0557, 0x2009),
1379 .driver_info = (unsigned long) &ax8817x_info,
1380 }, {
1381 // Buffalo LUA-U2-KTX
1382 USB_DEVICE (0x0411, 0x003d),
1383 .driver_info = (unsigned long) &ax8817x_info,
1384 }, {
1385 // Sitecom LN-029 "USB 2.0 10/100 Ethernet adapter"
1386 USB_DEVICE (0x6189, 0x182d),
1387 .driver_info = (unsigned long) &ax8817x_info,
1388 }, {
1389 // corega FEther USB2-TX
1390 USB_DEVICE (0x07aa, 0x0017),
1391 .driver_info = (unsigned long) &ax8817x_info,
1392 }, {
1393 // Surecom EP-1427X-2
1394 USB_DEVICE (0x1189, 0x0893),
1395 .driver_info = (unsigned long) &ax8817x_info,
1396 }, {
1397 // goodway corp usb gwusb2e
1398 USB_DEVICE (0x1631, 0x6200),
1399 .driver_info = (unsigned long) &ax8817x_info,
1400 }, {
1401 // JVC MP-PRX1 Port Replicator
1402 USB_DEVICE (0x04f1, 0x3008),
1403 .driver_info = (unsigned long) &ax8817x_info,
1404 }, {
1405 // ASIX AX88772 10/100
1406 USB_DEVICE (0x0b95, 0x7720),
1407 .driver_info = (unsigned long) &ax88772_info,
1408 }, {
1409 // ASIX AX88178 10/100/1000
1410 USB_DEVICE (0x0b95, 0x1780),
1411 .driver_info = (unsigned long) &ax88178_info,
1412 }, {
1413 // Linksys USB200M Rev 2
1414 USB_DEVICE (0x13b1, 0x0018),
1415 .driver_info = (unsigned long) &ax88772_info,
1416 }, {
1417 // 0Q0 cable ethernet
1418 USB_DEVICE (0x1557, 0x7720),
1419 .driver_info = (unsigned long) &ax88772_info,
1420 }, {
1421 // DLink DUB-E100 H/W Ver B1
1422 USB_DEVICE (0x07d1, 0x3c05),
1423 .driver_info = (unsigned long) &ax88772_info,
1424 }, {
1425 // DLink DUB-E100 H/W Ver B1 Alternate
1426 USB_DEVICE (0x2001, 0x3c05),
1427 .driver_info = (unsigned long) &ax88772_info,
1428 }, {
1429 // Linksys USB1000
1430 USB_DEVICE (0x1737, 0x0039),
1431 .driver_info = (unsigned long) &ax88178_info,
1432 }, {
1433 // IO-DATA ETG-US2
1434 USB_DEVICE (0x04bb, 0x0930),
1435 .driver_info = (unsigned long) &ax88178_info,
1436 }, {
1437 // Belkin F5D5055
1438 USB_DEVICE(0x050d, 0x5055),
1439 .driver_info = (unsigned long) &ax88178_info,
1440 },
1441 { }, // END
1442 };
1443 MODULE_DEVICE_TABLE(usb, products);
1444
1445 static struct usb_driver asix_driver = {
1446 .name = "asix",
1447 .id_table = products,
1448 .probe = usbnet_probe,
1449 .suspend = usbnet_suspend,
1450 .resume = usbnet_resume,
1451 .disconnect = usbnet_disconnect,
1452 .supports_autosuspend = 1,
1453 };
1454
1455 static int __init asix_init(void)
1456 {
1457 return usb_register(&asix_driver);
1458 }
1459 module_init(asix_init);
1460
1461 static void __exit asix_exit(void)
1462 {
1463 usb_deregister(&asix_driver);
1464 }
1465 module_exit(asix_exit);
1466
1467 MODULE_AUTHOR("David Hollis");
1468 MODULE_DESCRIPTION("ASIX AX8817X based USB 2.0 Ethernet Devices");
1469 MODULE_LICENSE("GPL");
1470
Ubuntu Artful kernel mirror