2 * ASIX AX8817X based USB 2.0 Ethernet Devices
3 * Copyright (C) 2003-2006 David Hollis <dhollis@davehollis.com>
4 * Copyright (C) 2005 Phil Chang <pchang23@sbcglobal.net>
5 * Copyright (C) 2006 James Painter <jamie.painter@iname.com>
6 * Copyright (c) 2002-2003 TiVo Inc.
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; either version 2 of the License, or
11 * (at your option) any later version.
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, see <http://www.gnu.org/licenses/>.
24 #define PHY_MODE_MARVELL 0x0000
25 #define MII_MARVELL_LED_CTRL 0x0018
26 #define MII_MARVELL_STATUS 0x001b
27 #define MII_MARVELL_CTRL 0x0014
29 #define MARVELL_LED_MANUAL 0x0019
31 #define MARVELL_STATUS_HWCFG 0x0004
33 #define MARVELL_CTRL_TXDELAY 0x0002
34 #define MARVELL_CTRL_RXDELAY 0x0080
36 #define PHY_MODE_RTL8211CL 0x000C
38 #define AX88772A_PHY14H 0x14
39 #define AX88772A_PHY14H_DEFAULT 0x442C
41 #define AX88772A_PHY15H 0x15
42 #define AX88772A_PHY15H_DEFAULT 0x03C8
44 #define AX88772A_PHY16H 0x16
45 #define AX88772A_PHY16H_DEFAULT 0x4044
47 struct ax88172_int_data
{
55 static void asix_status(struct usbnet
*dev
, struct urb
*urb
)
57 struct ax88172_int_data
*event
;
60 if (urb
->actual_length
< 8)
63 event
= urb
->transfer_buffer
;
64 link
= event
->link
& 0x01;
65 if (netif_carrier_ok(dev
->net
) != link
) {
66 usbnet_link_change(dev
, link
, 1);
67 netdev_dbg(dev
->net
, "Link Status is: %d\n", link
);
71 static void asix_set_netdev_dev_addr(struct usbnet
*dev
, u8
*addr
)
73 if (is_valid_ether_addr(addr
)) {
74 memcpy(dev
->net
->dev_addr
, addr
, ETH_ALEN
);
76 netdev_info(dev
->net
, "invalid hw address, using random\n");
77 eth_hw_addr_random(dev
->net
);
81 /* Get the PHY Identifier from the PHYSID1 & PHYSID2 MII registers */
82 static u32
asix_get_phyid(struct usbnet
*dev
)
88 /* Poll for the rare case the FW or phy isn't ready yet. */
89 for (i
= 0; i
< 100; i
++) {
90 phy_reg
= asix_mdio_read(dev
->net
, dev
->mii
.phy_id
, MII_PHYSID1
);
93 if (phy_reg
!= 0 && phy_reg
!= 0xFFFF)
98 if (phy_reg
<= 0 || phy_reg
== 0xFFFF)
101 phy_id
= (phy_reg
& 0xffff) << 16;
103 phy_reg
= asix_mdio_read(dev
->net
, dev
->mii
.phy_id
, MII_PHYSID2
);
107 phy_id
|= (phy_reg
& 0xffff);
112 static u32
asix_get_link(struct net_device
*net
)
114 struct usbnet
*dev
= netdev_priv(net
);
116 return mii_link_ok(&dev
->mii
);
119 static int asix_ioctl (struct net_device
*net
, struct ifreq
*rq
, int cmd
)
121 struct usbnet
*dev
= netdev_priv(net
);
123 return generic_mii_ioctl(&dev
->mii
, if_mii(rq
), cmd
, NULL
);
126 /* We need to override some ethtool_ops so we require our
127 own structure so we don't interfere with other usbnet
128 devices that may be connected at the same time. */
129 static const struct ethtool_ops ax88172_ethtool_ops
= {
130 .get_drvinfo
= asix_get_drvinfo
,
131 .get_link
= asix_get_link
,
132 .get_msglevel
= usbnet_get_msglevel
,
133 .set_msglevel
= usbnet_set_msglevel
,
134 .get_wol
= asix_get_wol
,
135 .set_wol
= asix_set_wol
,
136 .get_eeprom_len
= asix_get_eeprom_len
,
137 .get_eeprom
= asix_get_eeprom
,
138 .set_eeprom
= asix_set_eeprom
,
139 .get_settings
= usbnet_get_settings
,
140 .set_settings
= usbnet_set_settings
,
141 .nway_reset
= usbnet_nway_reset
,
144 static void ax88172_set_multicast(struct net_device
*net
)
146 struct usbnet
*dev
= netdev_priv(net
);
147 struct asix_data
*data
= (struct asix_data
*)&dev
->data
;
150 if (net
->flags
& IFF_PROMISC
) {
152 } else if (net
->flags
& IFF_ALLMULTI
||
153 netdev_mc_count(net
) > AX_MAX_MCAST
) {
155 } else if (netdev_mc_empty(net
)) {
156 /* just broadcast and directed */
158 /* We use the 20 byte dev->data
159 * for our 8 byte filter buffer
160 * to avoid allocating memory that
161 * is tricky to free later */
162 struct netdev_hw_addr
*ha
;
165 memset(data
->multi_filter
, 0, AX_MCAST_FILTER_SIZE
);
167 /* Build the multicast hash filter. */
168 netdev_for_each_mc_addr(ha
, net
) {
169 crc_bits
= ether_crc(ETH_ALEN
, ha
->addr
) >> 26;
170 data
->multi_filter
[crc_bits
>> 3] |=
174 asix_write_cmd_async(dev
, AX_CMD_WRITE_MULTI_FILTER
, 0, 0,
175 AX_MCAST_FILTER_SIZE
, data
->multi_filter
);
180 asix_write_cmd_async(dev
, AX_CMD_WRITE_RX_CTL
, rx_ctl
, 0, 0, NULL
);
183 static int ax88172_link_reset(struct usbnet
*dev
)
186 struct ethtool_cmd ecmd
= { .cmd
= ETHTOOL_GSET
};
188 mii_check_media(&dev
->mii
, 1, 1);
189 mii_ethtool_gset(&dev
->mii
, &ecmd
);
190 mode
= AX88172_MEDIUM_DEFAULT
;
192 if (ecmd
.duplex
!= DUPLEX_FULL
)
193 mode
|= ~AX88172_MEDIUM_FD
;
195 netdev_dbg(dev
->net
, "ax88172_link_reset() speed: %u duplex: %d setting mode to 0x%04x\n",
196 ethtool_cmd_speed(&ecmd
), ecmd
.duplex
, mode
);
198 asix_write_medium_mode(dev
, mode
, 0);
203 static const struct net_device_ops ax88172_netdev_ops
= {
204 .ndo_open
= usbnet_open
,
205 .ndo_stop
= usbnet_stop
,
206 .ndo_start_xmit
= usbnet_start_xmit
,
207 .ndo_tx_timeout
= usbnet_tx_timeout
,
208 .ndo_change_mtu
= usbnet_change_mtu
,
209 .ndo_set_mac_address
= eth_mac_addr
,
210 .ndo_validate_addr
= eth_validate_addr
,
211 .ndo_do_ioctl
= asix_ioctl
,
212 .ndo_set_rx_mode
= ax88172_set_multicast
,
215 static int ax88172_bind(struct usbnet
*dev
, struct usb_interface
*intf
)
220 unsigned long gpio_bits
= dev
->driver_info
->data
;
222 usbnet_get_endpoints(dev
,intf
);
224 /* Toggle the GPIOs in a manufacturer/model specific way */
225 for (i
= 2; i
>= 0; i
--) {
226 ret
= asix_write_cmd(dev
, AX_CMD_WRITE_GPIOS
,
227 (gpio_bits
>> (i
* 8)) & 0xff, 0, 0, NULL
, 0);
233 ret
= asix_write_rx_ctl(dev
, 0x80, 0);
237 /* Get the MAC address */
238 ret
= asix_read_cmd(dev
, AX88172_CMD_READ_NODE_ID
,
239 0, 0, ETH_ALEN
, buf
, 0);
241 netdev_dbg(dev
->net
, "read AX_CMD_READ_NODE_ID failed: %d\n",
246 asix_set_netdev_dev_addr(dev
, buf
);
248 /* Initialize MII structure */
249 dev
->mii
.dev
= dev
->net
;
250 dev
->mii
.mdio_read
= asix_mdio_read
;
251 dev
->mii
.mdio_write
= asix_mdio_write
;
252 dev
->mii
.phy_id_mask
= 0x3f;
253 dev
->mii
.reg_num_mask
= 0x1f;
254 dev
->mii
.phy_id
= asix_get_phy_addr(dev
);
256 dev
->net
->netdev_ops
= &ax88172_netdev_ops
;
257 dev
->net
->ethtool_ops
= &ax88172_ethtool_ops
;
258 dev
->net
->needed_headroom
= 4; /* cf asix_tx_fixup() */
259 dev
->net
->needed_tailroom
= 4; /* cf asix_tx_fixup() */
261 asix_mdio_write(dev
->net
, dev
->mii
.phy_id
, MII_BMCR
, BMCR_RESET
);
262 asix_mdio_write(dev
->net
, dev
->mii
.phy_id
, MII_ADVERTISE
,
263 ADVERTISE_ALL
| ADVERTISE_CSMA
| ADVERTISE_PAUSE_CAP
);
264 mii_nway_restart(&dev
->mii
);
272 static const struct ethtool_ops ax88772_ethtool_ops
= {
273 .get_drvinfo
= asix_get_drvinfo
,
274 .get_link
= asix_get_link
,
275 .get_msglevel
= usbnet_get_msglevel
,
276 .set_msglevel
= usbnet_set_msglevel
,
277 .get_wol
= asix_get_wol
,
278 .set_wol
= asix_set_wol
,
279 .get_eeprom_len
= asix_get_eeprom_len
,
280 .get_eeprom
= asix_get_eeprom
,
281 .set_eeprom
= asix_set_eeprom
,
282 .get_settings
= usbnet_get_settings
,
283 .set_settings
= usbnet_set_settings
,
284 .nway_reset
= usbnet_nway_reset
,
287 static int ax88772_link_reset(struct usbnet
*dev
)
290 struct ethtool_cmd ecmd
= { .cmd
= ETHTOOL_GSET
};
292 mii_check_media(&dev
->mii
, 1, 1);
293 mii_ethtool_gset(&dev
->mii
, &ecmd
);
294 mode
= AX88772_MEDIUM_DEFAULT
;
296 if (ethtool_cmd_speed(&ecmd
) != SPEED_100
)
297 mode
&= ~AX_MEDIUM_PS
;
299 if (ecmd
.duplex
!= DUPLEX_FULL
)
300 mode
&= ~AX_MEDIUM_FD
;
302 netdev_dbg(dev
->net
, "ax88772_link_reset() speed: %u duplex: %d setting mode to 0x%04x\n",
303 ethtool_cmd_speed(&ecmd
), ecmd
.duplex
, mode
);
305 asix_write_medium_mode(dev
, mode
, 0);
310 static int ax88772_reset(struct usbnet
*dev
)
312 struct asix_data
*data
= (struct asix_data
*)&dev
->data
;
315 /* Rewrite MAC address */
316 ether_addr_copy(data
->mac_addr
, dev
->net
->dev_addr
);
317 ret
= asix_write_cmd(dev
, AX_CMD_WRITE_NODE_ID
, 0, 0,
318 ETH_ALEN
, data
->mac_addr
, 0);
322 /* Set RX_CTL to default values with 2k buffer, and enable cactus */
323 ret
= asix_write_rx_ctl(dev
, AX_DEFAULT_RX_CTL
, 0);
327 asix_write_medium_mode(dev
, AX88772_MEDIUM_DEFAULT
, 0);
337 static int ax88772_hw_reset(struct usbnet
*dev
, int in_pm
)
339 struct asix_data
*data
= (struct asix_data
*)&dev
->data
;
343 ret
= asix_write_gpio(dev
, AX_GPIO_RSE
| AX_GPIO_GPO_2
|
344 AX_GPIO_GPO2EN
, 5, in_pm
);
348 embd_phy
= ((dev
->mii
.phy_id
& 0x1f) == 0x10 ? 1 : 0);
350 ret
= asix_write_cmd(dev
, AX_CMD_SW_PHY_SELECT
, embd_phy
,
353 netdev_dbg(dev
->net
, "Select PHY #1 failed: %d\n", ret
);
358 ret
= asix_sw_reset(dev
, AX_SWRESET_IPPD
, in_pm
);
362 usleep_range(10000, 11000);
364 ret
= asix_sw_reset(dev
, AX_SWRESET_CLEAR
, in_pm
);
370 ret
= asix_sw_reset(dev
, AX_SWRESET_IPRL
| AX_SWRESET_PRL
,
375 ret
= asix_sw_reset(dev
, AX_SWRESET_IPPD
| AX_SWRESET_PRL
,
383 if (in_pm
&& (!asix_mdio_read_nopm(dev
->net
, dev
->mii
.phy_id
,
389 ret
= asix_write_rx_ctl(dev
, AX_DEFAULT_RX_CTL
, in_pm
);
393 ret
= asix_write_medium_mode(dev
, AX88772_MEDIUM_DEFAULT
, in_pm
);
397 ret
= asix_write_cmd(dev
, AX_CMD_WRITE_IPG0
,
398 AX88772_IPG0_DEFAULT
| AX88772_IPG1_DEFAULT
,
399 AX88772_IPG2_DEFAULT
, 0, NULL
, in_pm
);
401 netdev_dbg(dev
->net
, "Write IPG,IPG1,IPG2 failed: %d\n", ret
);
405 /* Rewrite MAC address */
406 ether_addr_copy(data
->mac_addr
, dev
->net
->dev_addr
);
407 ret
= asix_write_cmd(dev
, AX_CMD_WRITE_NODE_ID
, 0, 0,
408 ETH_ALEN
, data
->mac_addr
, in_pm
);
412 /* Set RX_CTL to default values with 2k buffer, and enable cactus */
413 ret
= asix_write_rx_ctl(dev
, AX_DEFAULT_RX_CTL
, in_pm
);
417 rx_ctl
= asix_read_rx_ctl(dev
, in_pm
);
418 netdev_dbg(dev
->net
, "RX_CTL is 0x%04x after all initializations\n",
421 rx_ctl
= asix_read_medium_status(dev
, in_pm
);
423 "Medium Status is 0x%04x after all initializations\n",
432 static int ax88772a_hw_reset(struct usbnet
*dev
, int in_pm
)
434 struct asix_data
*data
= (struct asix_data
*)&dev
->data
;
436 u16 rx_ctl
, phy14h
, phy15h
, phy16h
;
439 ret
= asix_write_gpio(dev
, AX_GPIO_RSE
, 5, in_pm
);
443 embd_phy
= ((dev
->mii
.phy_id
& 0x1f) == 0x10 ? 1 : 0);
445 ret
= asix_write_cmd(dev
, AX_CMD_SW_PHY_SELECT
, embd_phy
|
446 AX_PHYSEL_SSEN
, 0, 0, NULL
, in_pm
);
448 netdev_dbg(dev
->net
, "Select PHY #1 failed: %d\n", ret
);
451 usleep_range(10000, 11000);
453 ret
= asix_sw_reset(dev
, AX_SWRESET_IPPD
| AX_SWRESET_IPRL
, in_pm
);
457 usleep_range(10000, 11000);
459 ret
= asix_sw_reset(dev
, AX_SWRESET_IPRL
, in_pm
);
465 ret
= asix_sw_reset(dev
, AX_SWRESET_CLEAR
, in_pm
);
469 ret
= asix_sw_reset(dev
, AX_SWRESET_IPRL
, in_pm
);
475 if (in_pm
&& (!asix_mdio_read_nopm(dev
->net
, dev
->mii
.phy_id
,
481 ret
= asix_read_cmd(dev
, AX_CMD_STATMNGSTS_REG
, 0,
482 0, 1, &chipcode
, in_pm
);
486 if ((chipcode
& AX_CHIPCODE_MASK
) == AX_AX88772B_CHIPCODE
) {
487 ret
= asix_write_cmd(dev
, AX_QCTCTRL
, 0x8000, 0x8001,
490 netdev_dbg(dev
->net
, "Write BQ setting failed: %d\n",
494 } else if ((chipcode
& AX_CHIPCODE_MASK
) == AX_AX88772A_CHIPCODE
) {
495 /* Check if the PHY registers have default settings */
496 phy14h
= asix_mdio_read_nopm(dev
->net
, dev
->mii
.phy_id
,
498 phy15h
= asix_mdio_read_nopm(dev
->net
, dev
->mii
.phy_id
,
500 phy16h
= asix_mdio_read_nopm(dev
->net
, dev
->mii
.phy_id
,
504 "772a_hw_reset: MR20=0x%x MR21=0x%x MR22=0x%x\n",
505 phy14h
, phy15h
, phy16h
);
507 /* Restore PHY registers default setting if not */
508 if (phy14h
!= AX88772A_PHY14H_DEFAULT
)
509 asix_mdio_write_nopm(dev
->net
, dev
->mii
.phy_id
,
511 AX88772A_PHY14H_DEFAULT
);
512 if (phy15h
!= AX88772A_PHY15H_DEFAULT
)
513 asix_mdio_write_nopm(dev
->net
, dev
->mii
.phy_id
,
515 AX88772A_PHY15H_DEFAULT
);
516 if (phy16h
!= AX88772A_PHY16H_DEFAULT
)
517 asix_mdio_write_nopm(dev
->net
, dev
->mii
.phy_id
,
519 AX88772A_PHY16H_DEFAULT
);
522 ret
= asix_write_cmd(dev
, AX_CMD_WRITE_IPG0
,
523 AX88772_IPG0_DEFAULT
| AX88772_IPG1_DEFAULT
,
524 AX88772_IPG2_DEFAULT
, 0, NULL
, in_pm
);
526 netdev_dbg(dev
->net
, "Write IPG,IPG1,IPG2 failed: %d\n", ret
);
530 /* Rewrite MAC address */
531 memcpy(data
->mac_addr
, dev
->net
->dev_addr
, ETH_ALEN
);
532 ret
= asix_write_cmd(dev
, AX_CMD_WRITE_NODE_ID
, 0, 0, ETH_ALEN
,
533 data
->mac_addr
, in_pm
);
537 /* Set RX_CTL to default values with 2k buffer, and enable cactus */
538 ret
= asix_write_rx_ctl(dev
, AX_DEFAULT_RX_CTL
, in_pm
);
542 ret
= asix_write_medium_mode(dev
, AX88772_MEDIUM_DEFAULT
, in_pm
);
546 /* Set RX_CTL to default values with 2k buffer, and enable cactus */
547 ret
= asix_write_rx_ctl(dev
, AX_DEFAULT_RX_CTL
, in_pm
);
551 rx_ctl
= asix_read_rx_ctl(dev
, in_pm
);
552 netdev_dbg(dev
->net
, "RX_CTL is 0x%04x after all initializations\n",
555 rx_ctl
= asix_read_medium_status(dev
, in_pm
);
557 "Medium Status is 0x%04x after all initializations\n",
566 static const struct net_device_ops ax88772_netdev_ops
= {
567 .ndo_open
= usbnet_open
,
568 .ndo_stop
= usbnet_stop
,
569 .ndo_start_xmit
= usbnet_start_xmit
,
570 .ndo_tx_timeout
= usbnet_tx_timeout
,
571 .ndo_change_mtu
= usbnet_change_mtu
,
572 .ndo_set_mac_address
= asix_set_mac_address
,
573 .ndo_validate_addr
= eth_validate_addr
,
574 .ndo_do_ioctl
= asix_ioctl
,
575 .ndo_set_rx_mode
= asix_set_multicast
,
578 static void ax88772_suspend(struct usbnet
*dev
)
580 struct asix_common_private
*priv
= dev
->driver_priv
;
583 /* Stop MAC operation */
584 medium
= asix_read_medium_status(dev
, 0);
585 medium
&= ~AX_MEDIUM_RE
;
586 asix_write_medium_mode(dev
, medium
, 0);
588 netdev_dbg(dev
->net
, "ax88772_suspend: medium=0x%04x\n",
589 asix_read_medium_status(dev
, 0));
591 /* Preserve BMCR for restoring */
592 priv
->presvd_phy_bmcr
=
593 asix_mdio_read_nopm(dev
->net
, dev
->mii
.phy_id
, MII_BMCR
);
595 /* Preserve ANAR for restoring */
596 priv
->presvd_phy_advertise
=
597 asix_mdio_read_nopm(dev
->net
, dev
->mii
.phy_id
, MII_ADVERTISE
);
600 static int asix_suspend(struct usb_interface
*intf
, pm_message_t message
)
602 struct usbnet
*dev
= usb_get_intfdata(intf
);
603 struct asix_common_private
*priv
= dev
->driver_priv
;
608 return usbnet_suspend(intf
, message
);
611 static void ax88772_restore_phy(struct usbnet
*dev
)
613 struct asix_common_private
*priv
= dev
->driver_priv
;
615 if (priv
->presvd_phy_advertise
) {
616 /* Restore Advertisement control reg */
617 asix_mdio_write_nopm(dev
->net
, dev
->mii
.phy_id
, MII_ADVERTISE
,
618 priv
->presvd_phy_advertise
);
621 asix_mdio_write_nopm(dev
->net
, dev
->mii
.phy_id
, MII_BMCR
,
622 priv
->presvd_phy_bmcr
);
624 mii_nway_restart(&dev
->mii
);
625 priv
->presvd_phy_advertise
= 0;
626 priv
->presvd_phy_bmcr
= 0;
630 static void ax88772_resume(struct usbnet
*dev
)
634 for (i
= 0; i
< 3; i
++)
635 if (!ax88772_hw_reset(dev
, 1))
637 ax88772_restore_phy(dev
);
640 static void ax88772a_resume(struct usbnet
*dev
)
644 for (i
= 0; i
< 3; i
++) {
645 if (!ax88772a_hw_reset(dev
, 1))
649 ax88772_restore_phy(dev
);
652 static int asix_resume(struct usb_interface
*intf
)
654 struct usbnet
*dev
= usb_get_intfdata(intf
);
655 struct asix_common_private
*priv
= dev
->driver_priv
;
660 return usbnet_resume(intf
);
663 static int ax88772_bind(struct usbnet
*dev
, struct usb_interface
*intf
)
666 u8 buf
[ETH_ALEN
], chipcode
= 0;
668 struct asix_common_private
*priv
;
670 usbnet_get_endpoints(dev
,intf
);
672 /* Get the MAC address */
673 if (dev
->driver_info
->data
& FLAG_EEPROM_MAC
) {
674 for (i
= 0; i
< (ETH_ALEN
>> 1); i
++) {
675 ret
= asix_read_cmd(dev
, AX_CMD_READ_EEPROM
, 0x04 + i
,
676 0, 2, buf
+ i
* 2, 0);
681 ret
= asix_read_cmd(dev
, AX_CMD_READ_NODE_ID
,
682 0, 0, ETH_ALEN
, buf
, 0);
686 netdev_dbg(dev
->net
, "Failed to read MAC address: %d\n", ret
);
690 asix_set_netdev_dev_addr(dev
, buf
);
692 /* Initialize MII structure */
693 dev
->mii
.dev
= dev
->net
;
694 dev
->mii
.mdio_read
= asix_mdio_read
;
695 dev
->mii
.mdio_write
= asix_mdio_write
;
696 dev
->mii
.phy_id_mask
= 0x1f;
697 dev
->mii
.reg_num_mask
= 0x1f;
698 dev
->mii
.phy_id
= asix_get_phy_addr(dev
);
700 dev
->net
->netdev_ops
= &ax88772_netdev_ops
;
701 dev
->net
->ethtool_ops
= &ax88772_ethtool_ops
;
702 dev
->net
->needed_headroom
= 4; /* cf asix_tx_fixup() */
703 dev
->net
->needed_tailroom
= 4; /* cf asix_tx_fixup() */
705 asix_read_cmd(dev
, AX_CMD_STATMNGSTS_REG
, 0, 0, 1, &chipcode
, 0);
706 chipcode
&= AX_CHIPCODE_MASK
;
708 (chipcode
== AX_AX88772_CHIPCODE
) ? ax88772_hw_reset(dev
, 0) :
709 ax88772a_hw_reset(dev
, 0);
711 /* Read PHYID register *AFTER* the PHY was reset properly */
712 phyid
= asix_get_phyid(dev
);
713 netdev_dbg(dev
->net
, "PHYID=0x%08x\n", phyid
);
715 /* Asix framing packs multiple eth frames into a 2K usb bulk transfer */
716 if (dev
->driver_info
->flags
& FLAG_FRAMING_AX
) {
717 /* hard_mtu is still the default - the device does not support
719 dev
->rx_urb_size
= 2048;
722 dev
->driver_priv
= kzalloc(sizeof(struct asix_common_private
), GFP_KERNEL
);
723 if (!dev
->driver_priv
)
726 priv
= dev
->driver_priv
;
728 priv
->presvd_phy_bmcr
= 0;
729 priv
->presvd_phy_advertise
= 0;
730 if (chipcode
== AX_AX88772_CHIPCODE
) {
731 priv
->resume
= ax88772_resume
;
732 priv
->suspend
= ax88772_suspend
;
734 priv
->resume
= ax88772a_resume
;
735 priv
->suspend
= ax88772_suspend
;
741 static void ax88772_unbind(struct usbnet
*dev
, struct usb_interface
*intf
)
743 kfree(dev
->driver_priv
);
746 static const struct ethtool_ops ax88178_ethtool_ops
= {
747 .get_drvinfo
= asix_get_drvinfo
,
748 .get_link
= asix_get_link
,
749 .get_msglevel
= usbnet_get_msglevel
,
750 .set_msglevel
= usbnet_set_msglevel
,
751 .get_wol
= asix_get_wol
,
752 .set_wol
= asix_set_wol
,
753 .get_eeprom_len
= asix_get_eeprom_len
,
754 .get_eeprom
= asix_get_eeprom
,
755 .set_eeprom
= asix_set_eeprom
,
756 .get_settings
= usbnet_get_settings
,
757 .set_settings
= usbnet_set_settings
,
758 .nway_reset
= usbnet_nway_reset
,
761 static int marvell_phy_init(struct usbnet
*dev
)
763 struct asix_data
*data
= (struct asix_data
*)&dev
->data
;
766 netdev_dbg(dev
->net
, "marvell_phy_init()\n");
768 reg
= asix_mdio_read(dev
->net
, dev
->mii
.phy_id
, MII_MARVELL_STATUS
);
769 netdev_dbg(dev
->net
, "MII_MARVELL_STATUS = 0x%04x\n", reg
);
771 asix_mdio_write(dev
->net
, dev
->mii
.phy_id
, MII_MARVELL_CTRL
,
772 MARVELL_CTRL_RXDELAY
| MARVELL_CTRL_TXDELAY
);
775 reg
= asix_mdio_read(dev
->net
, dev
->mii
.phy_id
,
776 MII_MARVELL_LED_CTRL
);
777 netdev_dbg(dev
->net
, "MII_MARVELL_LED_CTRL (1) = 0x%04x\n", reg
);
781 asix_mdio_write(dev
->net
, dev
->mii
.phy_id
,
782 MII_MARVELL_LED_CTRL
, reg
);
784 reg
= asix_mdio_read(dev
->net
, dev
->mii
.phy_id
,
785 MII_MARVELL_LED_CTRL
);
786 netdev_dbg(dev
->net
, "MII_MARVELL_LED_CTRL (2) = 0x%04x\n", reg
);
793 static int rtl8211cl_phy_init(struct usbnet
*dev
)
795 struct asix_data
*data
= (struct asix_data
*)&dev
->data
;
797 netdev_dbg(dev
->net
, "rtl8211cl_phy_init()\n");
799 asix_mdio_write (dev
->net
, dev
->mii
.phy_id
, 0x1f, 0x0005);
800 asix_mdio_write (dev
->net
, dev
->mii
.phy_id
, 0x0c, 0);
801 asix_mdio_write (dev
->net
, dev
->mii
.phy_id
, 0x01,
802 asix_mdio_read (dev
->net
, dev
->mii
.phy_id
, 0x01) | 0x0080);
803 asix_mdio_write (dev
->net
, dev
->mii
.phy_id
, 0x1f, 0);
805 if (data
->ledmode
== 12) {
806 asix_mdio_write (dev
->net
, dev
->mii
.phy_id
, 0x1f, 0x0002);
807 asix_mdio_write (dev
->net
, dev
->mii
.phy_id
, 0x1a, 0x00cb);
808 asix_mdio_write (dev
->net
, dev
->mii
.phy_id
, 0x1f, 0);
814 static int marvell_led_status(struct usbnet
*dev
, u16 speed
)
816 u16 reg
= asix_mdio_read(dev
->net
, dev
->mii
.phy_id
, MARVELL_LED_MANUAL
);
818 netdev_dbg(dev
->net
, "marvell_led_status() read 0x%04x\n", reg
);
820 /* Clear out the center LED bits - 0x03F0 */
834 netdev_dbg(dev
->net
, "marvell_led_status() writing 0x%04x\n", reg
);
835 asix_mdio_write(dev
->net
, dev
->mii
.phy_id
, MARVELL_LED_MANUAL
, reg
);
840 static int ax88178_reset(struct usbnet
*dev
)
842 struct asix_data
*data
= (struct asix_data
*)&dev
->data
;
849 asix_read_cmd(dev
, AX_CMD_READ_GPIOS
, 0, 0, 1, &status
, 0);
850 netdev_dbg(dev
->net
, "GPIO Status: 0x%04x\n", status
);
852 asix_write_cmd(dev
, AX_CMD_WRITE_ENABLE
, 0, 0, 0, NULL
, 0);
853 asix_read_cmd(dev
, AX_CMD_READ_EEPROM
, 0x0017, 0, 2, &eeprom
, 0);
854 asix_write_cmd(dev
, AX_CMD_WRITE_DISABLE
, 0, 0, 0, NULL
, 0);
856 netdev_dbg(dev
->net
, "EEPROM index 0x17 is 0x%04x\n", eeprom
);
858 if (eeprom
== cpu_to_le16(0xffff)) {
859 data
->phymode
= PHY_MODE_MARVELL
;
863 data
->phymode
= le16_to_cpu(eeprom
) & 0x7F;
864 data
->ledmode
= le16_to_cpu(eeprom
) >> 8;
865 gpio0
= (le16_to_cpu(eeprom
) & 0x80) ? 0 : 1;
867 netdev_dbg(dev
->net
, "GPIO0: %d, PhyMode: %d\n", gpio0
, data
->phymode
);
869 /* Power up external GigaPHY through AX88178 GPIO pin */
870 asix_write_gpio(dev
, AX_GPIO_RSE
| AX_GPIO_GPO_1
|
871 AX_GPIO_GPO1EN
, 40, 0);
872 if ((le16_to_cpu(eeprom
) >> 8) != 1) {
873 asix_write_gpio(dev
, 0x003c, 30, 0);
874 asix_write_gpio(dev
, 0x001c, 300, 0);
875 asix_write_gpio(dev
, 0x003c, 30, 0);
877 netdev_dbg(dev
->net
, "gpio phymode == 1 path\n");
878 asix_write_gpio(dev
, AX_GPIO_GPO1EN
, 30, 0);
879 asix_write_gpio(dev
, AX_GPIO_GPO1EN
| AX_GPIO_GPO_1
, 30, 0);
882 /* Read PHYID register *AFTER* powering up PHY */
883 phyid
= asix_get_phyid(dev
);
884 netdev_dbg(dev
->net
, "PHYID=0x%08x\n", phyid
);
886 /* Set AX88178 to enable MII/GMII/RGMII interface for external PHY */
887 asix_write_cmd(dev
, AX_CMD_SW_PHY_SELECT
, 0, 0, 0, NULL
, 0);
889 asix_sw_reset(dev
, 0, 0);
892 asix_sw_reset(dev
, AX_SWRESET_PRL
| AX_SWRESET_IPPD
, 0);
895 asix_write_rx_ctl(dev
, 0, 0);
897 if (data
->phymode
== PHY_MODE_MARVELL
) {
898 marvell_phy_init(dev
);
900 } else if (data
->phymode
== PHY_MODE_RTL8211CL
)
901 rtl8211cl_phy_init(dev
);
903 asix_mdio_write(dev
->net
, dev
->mii
.phy_id
, MII_BMCR
,
904 BMCR_RESET
| BMCR_ANENABLE
);
905 asix_mdio_write(dev
->net
, dev
->mii
.phy_id
, MII_ADVERTISE
,
906 ADVERTISE_ALL
| ADVERTISE_CSMA
| ADVERTISE_PAUSE_CAP
);
907 asix_mdio_write(dev
->net
, dev
->mii
.phy_id
, MII_CTRL1000
,
910 mii_nway_restart(&dev
->mii
);
912 ret
= asix_write_medium_mode(dev
, AX88178_MEDIUM_DEFAULT
, 0);
916 /* Rewrite MAC address */
917 memcpy(data
->mac_addr
, dev
->net
->dev_addr
, ETH_ALEN
);
918 ret
= asix_write_cmd(dev
, AX_CMD_WRITE_NODE_ID
, 0, 0, ETH_ALEN
,
923 ret
= asix_write_rx_ctl(dev
, AX_DEFAULT_RX_CTL
, 0);
930 static int ax88178_link_reset(struct usbnet
*dev
)
933 struct ethtool_cmd ecmd
= { .cmd
= ETHTOOL_GSET
};
934 struct asix_data
*data
= (struct asix_data
*)&dev
->data
;
937 netdev_dbg(dev
->net
, "ax88178_link_reset()\n");
939 mii_check_media(&dev
->mii
, 1, 1);
940 mii_ethtool_gset(&dev
->mii
, &ecmd
);
941 mode
= AX88178_MEDIUM_DEFAULT
;
942 speed
= ethtool_cmd_speed(&ecmd
);
944 if (speed
== SPEED_1000
)
945 mode
|= AX_MEDIUM_GM
;
946 else if (speed
== SPEED_100
)
947 mode
|= AX_MEDIUM_PS
;
949 mode
&= ~(AX_MEDIUM_PS
| AX_MEDIUM_GM
);
951 mode
|= AX_MEDIUM_ENCK
;
953 if (ecmd
.duplex
== DUPLEX_FULL
)
954 mode
|= AX_MEDIUM_FD
;
956 mode
&= ~AX_MEDIUM_FD
;
958 netdev_dbg(dev
->net
, "ax88178_link_reset() speed: %u duplex: %d setting mode to 0x%04x\n",
959 speed
, ecmd
.duplex
, mode
);
961 asix_write_medium_mode(dev
, mode
, 0);
963 if (data
->phymode
== PHY_MODE_MARVELL
&& data
->ledmode
)
964 marvell_led_status(dev
, speed
);
969 static void ax88178_set_mfb(struct usbnet
*dev
)
971 u16 mfb
= AX_RX_CTL_MFB_16384
;
974 int old_rx_urb_size
= dev
->rx_urb_size
;
976 if (dev
->hard_mtu
< 2048) {
977 dev
->rx_urb_size
= 2048;
978 mfb
= AX_RX_CTL_MFB_2048
;
979 } else if (dev
->hard_mtu
< 4096) {
980 dev
->rx_urb_size
= 4096;
981 mfb
= AX_RX_CTL_MFB_4096
;
982 } else if (dev
->hard_mtu
< 8192) {
983 dev
->rx_urb_size
= 8192;
984 mfb
= AX_RX_CTL_MFB_8192
;
985 } else if (dev
->hard_mtu
< 16384) {
986 dev
->rx_urb_size
= 16384;
987 mfb
= AX_RX_CTL_MFB_16384
;
990 rxctl
= asix_read_rx_ctl(dev
, 0);
991 asix_write_rx_ctl(dev
, (rxctl
& ~AX_RX_CTL_MFB_16384
) | mfb
, 0);
993 medium
= asix_read_medium_status(dev
, 0);
994 if (dev
->net
->mtu
> 1500)
995 medium
|= AX_MEDIUM_JFE
;
997 medium
&= ~AX_MEDIUM_JFE
;
998 asix_write_medium_mode(dev
, medium
, 0);
1000 if (dev
->rx_urb_size
> old_rx_urb_size
)
1001 usbnet_unlink_rx_urbs(dev
);
1004 static int ax88178_change_mtu(struct net_device
*net
, int new_mtu
)
1006 struct usbnet
*dev
= netdev_priv(net
);
1007 int ll_mtu
= new_mtu
+ net
->hard_header_len
+ 4;
1009 netdev_dbg(dev
->net
, "ax88178_change_mtu() new_mtu=%d\n", new_mtu
);
1011 if (new_mtu
<= 0 || ll_mtu
> 16384)
1014 if ((ll_mtu
% dev
->maxpacket
) == 0)
1018 dev
->hard_mtu
= net
->mtu
+ net
->hard_header_len
;
1019 ax88178_set_mfb(dev
);
1021 /* max qlen depend on hard_mtu and rx_urb_size */
1022 usbnet_update_max_qlen(dev
);
1027 static const struct net_device_ops ax88178_netdev_ops
= {
1028 .ndo_open
= usbnet_open
,
1029 .ndo_stop
= usbnet_stop
,
1030 .ndo_start_xmit
= usbnet_start_xmit
,
1031 .ndo_tx_timeout
= usbnet_tx_timeout
,
1032 .ndo_set_mac_address
= asix_set_mac_address
,
1033 .ndo_validate_addr
= eth_validate_addr
,
1034 .ndo_set_rx_mode
= asix_set_multicast
,
1035 .ndo_do_ioctl
= asix_ioctl
,
1036 .ndo_change_mtu
= ax88178_change_mtu
,
1039 static int ax88178_bind(struct usbnet
*dev
, struct usb_interface
*intf
)
1044 usbnet_get_endpoints(dev
,intf
);
1046 /* Get the MAC address */
1047 ret
= asix_read_cmd(dev
, AX_CMD_READ_NODE_ID
, 0, 0, ETH_ALEN
, buf
, 0);
1049 netdev_dbg(dev
->net
, "Failed to read MAC address: %d\n", ret
);
1053 asix_set_netdev_dev_addr(dev
, buf
);
1055 /* Initialize MII structure */
1056 dev
->mii
.dev
= dev
->net
;
1057 dev
->mii
.mdio_read
= asix_mdio_read
;
1058 dev
->mii
.mdio_write
= asix_mdio_write
;
1059 dev
->mii
.phy_id_mask
= 0x1f;
1060 dev
->mii
.reg_num_mask
= 0xff;
1061 dev
->mii
.supports_gmii
= 1;
1062 dev
->mii
.phy_id
= asix_get_phy_addr(dev
);
1064 dev
->net
->netdev_ops
= &ax88178_netdev_ops
;
1065 dev
->net
->ethtool_ops
= &ax88178_ethtool_ops
;
1067 /* Blink LEDS so users know driver saw dongle */
1068 asix_sw_reset(dev
, 0, 0);
1071 asix_sw_reset(dev
, AX_SWRESET_PRL
| AX_SWRESET_IPPD
, 0);
1074 /* Asix framing packs multiple eth frames into a 2K usb bulk transfer */
1075 if (dev
->driver_info
->flags
& FLAG_FRAMING_AX
) {
1076 /* hard_mtu is still the default - the device does not support
1078 dev
->rx_urb_size
= 2048;
1081 dev
->driver_priv
= kzalloc(sizeof(struct asix_common_private
), GFP_KERNEL
);
1082 if (!dev
->driver_priv
)
1088 static const struct driver_info ax8817x_info
= {
1089 .description
= "ASIX AX8817x USB 2.0 Ethernet",
1090 .bind
= ax88172_bind
,
1091 .status
= asix_status
,
1092 .link_reset
= ax88172_link_reset
,
1093 .reset
= ax88172_link_reset
,
1094 .flags
= FLAG_ETHER
| FLAG_LINK_INTR
,
1098 static const struct driver_info dlink_dub_e100_info
= {
1099 .description
= "DLink DUB-E100 USB Ethernet",
1100 .bind
= ax88172_bind
,
1101 .status
= asix_status
,
1102 .link_reset
= ax88172_link_reset
,
1103 .reset
= ax88172_link_reset
,
1104 .flags
= FLAG_ETHER
| FLAG_LINK_INTR
,
1108 static const struct driver_info netgear_fa120_info
= {
1109 .description
= "Netgear FA-120 USB Ethernet",
1110 .bind
= ax88172_bind
,
1111 .status
= asix_status
,
1112 .link_reset
= ax88172_link_reset
,
1113 .reset
= ax88172_link_reset
,
1114 .flags
= FLAG_ETHER
| FLAG_LINK_INTR
,
1118 static const struct driver_info hawking_uf200_info
= {
1119 .description
= "Hawking UF200 USB Ethernet",
1120 .bind
= ax88172_bind
,
1121 .status
= asix_status
,
1122 .link_reset
= ax88172_link_reset
,
1123 .reset
= ax88172_link_reset
,
1124 .flags
= FLAG_ETHER
| FLAG_LINK_INTR
,
1128 static const struct driver_info ax88772_info
= {
1129 .description
= "ASIX AX88772 USB 2.0 Ethernet",
1130 .bind
= ax88772_bind
,
1131 .unbind
= ax88772_unbind
,
1132 .status
= asix_status
,
1133 .link_reset
= ax88772_link_reset
,
1134 .reset
= ax88772_reset
,
1135 .flags
= FLAG_ETHER
| FLAG_FRAMING_AX
| FLAG_LINK_INTR
| FLAG_MULTI_PACKET
,
1136 .rx_fixup
= asix_rx_fixup_common
,
1137 .tx_fixup
= asix_tx_fixup
,
1140 static const struct driver_info ax88772b_info
= {
1141 .description
= "ASIX AX88772B USB 2.0 Ethernet",
1142 .bind
= ax88772_bind
,
1143 .unbind
= ax88772_unbind
,
1144 .status
= asix_status
,
1145 .link_reset
= ax88772_link_reset
,
1146 .reset
= ax88772_reset
,
1147 .flags
= FLAG_ETHER
| FLAG_FRAMING_AX
| FLAG_LINK_INTR
|
1149 .rx_fixup
= asix_rx_fixup_common
,
1150 .tx_fixup
= asix_tx_fixup
,
1151 .data
= FLAG_EEPROM_MAC
,
1154 static const struct driver_info ax88178_info
= {
1155 .description
= "ASIX AX88178 USB 2.0 Ethernet",
1156 .bind
= ax88178_bind
,
1157 .unbind
= ax88772_unbind
,
1158 .status
= asix_status
,
1159 .link_reset
= ax88178_link_reset
,
1160 .reset
= ax88178_reset
,
1161 .flags
= FLAG_ETHER
| FLAG_FRAMING_AX
| FLAG_LINK_INTR
|
1163 .rx_fixup
= asix_rx_fixup_common
,
1164 .tx_fixup
= asix_tx_fixup
,
1168 * USBLINK 20F9 "USB 2.0 LAN" USB ethernet adapter, typically found in
1169 * no-name packaging.
1170 * USB device strings are:
1171 * 1: Manufacturer: USBLINK
1172 * 2: Product: HG20F9 USB2.0
1174 * Appears to be compatible with Asix 88772B.
1176 static const struct driver_info hg20f9_info
= {
1177 .description
= "HG20F9 USB 2.0 Ethernet",
1178 .bind
= ax88772_bind
,
1179 .unbind
= ax88772_unbind
,
1180 .status
= asix_status
,
1181 .link_reset
= ax88772_link_reset
,
1182 .reset
= ax88772_reset
,
1183 .flags
= FLAG_ETHER
| FLAG_FRAMING_AX
| FLAG_LINK_INTR
|
1185 .rx_fixup
= asix_rx_fixup_common
,
1186 .tx_fixup
= asix_tx_fixup
,
1187 .data
= FLAG_EEPROM_MAC
,
1190 static const struct usb_device_id products
[] = {
1193 USB_DEVICE (0x077b, 0x2226),
1194 .driver_info
= (unsigned long) &ax8817x_info
,
1197 USB_DEVICE (0x0846, 0x1040),
1198 .driver_info
= (unsigned long) &netgear_fa120_info
,
1201 USB_DEVICE (0x2001, 0x1a00),
1202 .driver_info
= (unsigned long) &dlink_dub_e100_info
,
1204 // Intellinet, ST Lab USB Ethernet
1205 USB_DEVICE (0x0b95, 0x1720),
1206 .driver_info
= (unsigned long) &ax8817x_info
,
1208 // Hawking UF200, TrendNet TU2-ET100
1209 USB_DEVICE (0x07b8, 0x420a),
1210 .driver_info
= (unsigned long) &hawking_uf200_info
,
1212 // Billionton Systems, USB2AR
1213 USB_DEVICE (0x08dd, 0x90ff),
1214 .driver_info
= (unsigned long) &ax8817x_info
,
1216 // Billionton Systems, GUSB2AM-1G-B
1217 USB_DEVICE(0x08dd, 0x0114),
1218 .driver_info
= (unsigned long) &ax88178_info
,
1221 USB_DEVICE (0x0557, 0x2009),
1222 .driver_info
= (unsigned long) &ax8817x_info
,
1224 // Buffalo LUA-U2-KTX
1225 USB_DEVICE (0x0411, 0x003d),
1226 .driver_info
= (unsigned long) &ax8817x_info
,
1228 // Buffalo LUA-U2-GT 10/100/1000
1229 USB_DEVICE (0x0411, 0x006e),
1230 .driver_info
= (unsigned long) &ax88178_info
,
1232 // Sitecom LN-029 "USB 2.0 10/100 Ethernet adapter"
1233 USB_DEVICE (0x6189, 0x182d),
1234 .driver_info
= (unsigned long) &ax8817x_info
,
1236 // Sitecom LN-031 "USB 2.0 10/100/1000 Ethernet adapter"
1237 USB_DEVICE (0x0df6, 0x0056),
1238 .driver_info
= (unsigned long) &ax88178_info
,
1240 // Sitecom LN-028 "USB 2.0 10/100/1000 Ethernet adapter"
1241 USB_DEVICE (0x0df6, 0x061c),
1242 .driver_info
= (unsigned long) &ax88178_info
,
1244 // corega FEther USB2-TX
1245 USB_DEVICE (0x07aa, 0x0017),
1246 .driver_info
= (unsigned long) &ax8817x_info
,
1248 // Surecom EP-1427X-2
1249 USB_DEVICE (0x1189, 0x0893),
1250 .driver_info
= (unsigned long) &ax8817x_info
,
1252 // goodway corp usb gwusb2e
1253 USB_DEVICE (0x1631, 0x6200),
1254 .driver_info
= (unsigned long) &ax8817x_info
,
1256 // JVC MP-PRX1 Port Replicator
1257 USB_DEVICE (0x04f1, 0x3008),
1258 .driver_info
= (unsigned long) &ax8817x_info
,
1260 // Lenovo U2L100P 10/100
1261 USB_DEVICE (0x17ef, 0x7203),
1262 .driver_info
= (unsigned long)&ax88772b_info
,
1264 // ASIX AX88772B 10/100
1265 USB_DEVICE (0x0b95, 0x772b),
1266 .driver_info
= (unsigned long) &ax88772b_info
,
1268 // ASIX AX88772 10/100
1269 USB_DEVICE (0x0b95, 0x7720),
1270 .driver_info
= (unsigned long) &ax88772_info
,
1272 // ASIX AX88178 10/100/1000
1273 USB_DEVICE (0x0b95, 0x1780),
1274 .driver_info
= (unsigned long) &ax88178_info
,
1276 // Logitec LAN-GTJ/U2A
1277 USB_DEVICE (0x0789, 0x0160),
1278 .driver_info
= (unsigned long) &ax88178_info
,
1280 // Linksys USB200M Rev 2
1281 USB_DEVICE (0x13b1, 0x0018),
1282 .driver_info
= (unsigned long) &ax88772_info
,
1284 // 0Q0 cable ethernet
1285 USB_DEVICE (0x1557, 0x7720),
1286 .driver_info
= (unsigned long) &ax88772_info
,
1288 // DLink DUB-E100 H/W Ver B1
1289 USB_DEVICE (0x07d1, 0x3c05),
1290 .driver_info
= (unsigned long) &ax88772_info
,
1292 // DLink DUB-E100 H/W Ver B1 Alternate
1293 USB_DEVICE (0x2001, 0x3c05),
1294 .driver_info
= (unsigned long) &ax88772_info
,
1296 // DLink DUB-E100 H/W Ver C1
1297 USB_DEVICE (0x2001, 0x1a02),
1298 .driver_info
= (unsigned long) &ax88772_info
,
1301 USB_DEVICE (0x1737, 0x0039),
1302 .driver_info
= (unsigned long) &ax88178_info
,
1305 USB_DEVICE (0x04bb, 0x0930),
1306 .driver_info
= (unsigned long) &ax88178_info
,
1309 USB_DEVICE(0x050d, 0x5055),
1310 .driver_info
= (unsigned long) &ax88178_info
,
1312 // Apple USB Ethernet Adapter
1313 USB_DEVICE(0x05ac, 0x1402),
1314 .driver_info
= (unsigned long) &ax88772_info
,
1316 // Cables-to-Go USB Ethernet Adapter
1317 USB_DEVICE(0x0b95, 0x772a),
1318 .driver_info
= (unsigned long) &ax88772_info
,
1321 USB_DEVICE(0x14ea, 0xab11),
1322 .driver_info
= (unsigned long) &ax88178_info
,
1325 USB_DEVICE(0x0db0, 0xa877),
1326 .driver_info
= (unsigned long) &ax88772_info
,
1328 // Asus USB Ethernet Adapter
1329 USB_DEVICE (0x0b95, 0x7e2b),
1330 .driver_info
= (unsigned long)&ax88772b_info
,
1332 /* ASIX 88172a demo board */
1333 USB_DEVICE(0x0b95, 0x172a),
1334 .driver_info
= (unsigned long) &ax88172a_info
,
1337 * USBLINK HG20F9 "USB 2.0 LAN"
1338 * Appears to have gazumped Linksys's manufacturer ID but
1339 * doesn't (yet) conflict with any known Linksys product.
1341 USB_DEVICE(0x066b, 0x20f9),
1342 .driver_info
= (unsigned long) &hg20f9_info
,
1346 MODULE_DEVICE_TABLE(usb
, products
);
1348 static struct usb_driver asix_driver
= {
1349 .name
= DRIVER_NAME
,
1350 .id_table
= products
,
1351 .probe
= usbnet_probe
,
1352 .suspend
= asix_suspend
,
1353 .resume
= asix_resume
,
1354 .disconnect
= usbnet_disconnect
,
1355 .supports_autosuspend
= 1,
1356 .disable_hub_initiated_lpm
= 1,
1359 module_usb_driver(asix_driver
);
1361 MODULE_AUTHOR("David Hollis");
1362 MODULE_VERSION(DRIVER_VERSION
);
1363 MODULE_DESCRIPTION("ASIX AX8817X based USB 2.0 Ethernet Devices");
1364 MODULE_LICENSE("GPL");