2 * Copyright (c) 2014 Realtek Semiconductor Corp. All rights reserved.
4 * This program is free software; you can redistribute it and/or
5 * modify it under the terms of the GNU General Public License
6 * version 2 as published by the Free Software Foundation.
10 #include <linux/signal.h>
11 #include <linux/slab.h>
12 #include <linux/module.h>
13 #include <linux/netdevice.h>
14 #include <linux/etherdevice.h>
15 #include <linux/mii.h>
16 #include <linux/ethtool.h>
17 #include <linux/usb.h>
18 #include <linux/crc32.h>
19 #include <linux/if_vlan.h>
20 #include <linux/uaccess.h>
21 #include <linux/list.h>
23 #include <linux/ipv6.h>
24 #include <net/ip6_checksum.h>
25 #include <uapi/linux/mdio.h>
26 #include <linux/mdio.h>
27 #include <linux/usb/cdc.h>
29 /* Version Information */
30 #define DRIVER_VERSION "v1.08.0 (2015/01/13)"
31 #define DRIVER_AUTHOR "Realtek linux nic maintainers <nic_swsd@realtek.com>"
32 #define DRIVER_DESC "Realtek RTL8152/RTL8153 Based USB Ethernet Adapters"
33 #define MODULENAME "r8152"
35 #define R8152_PHY_ID 32
37 #define PLA_IDR 0xc000
38 #define PLA_RCR 0xc010
39 #define PLA_RMS 0xc016
40 #define PLA_RXFIFO_CTRL0 0xc0a0
41 #define PLA_RXFIFO_CTRL1 0xc0a4
42 #define PLA_RXFIFO_CTRL2 0xc0a8
43 #define PLA_DMY_REG0 0xc0b0
44 #define PLA_FMC 0xc0b4
45 #define PLA_CFG_WOL 0xc0b6
46 #define PLA_TEREDO_CFG 0xc0bc
47 #define PLA_MAR 0xcd00
48 #define PLA_BACKUP 0xd000
49 #define PAL_BDC_CR 0xd1a0
50 #define PLA_TEREDO_TIMER 0xd2cc
51 #define PLA_REALWOW_TIMER 0xd2e8
52 #define PLA_LEDSEL 0xdd90
53 #define PLA_LED_FEATURE 0xdd92
54 #define PLA_PHYAR 0xde00
55 #define PLA_BOOT_CTRL 0xe004
56 #define PLA_GPHY_INTR_IMR 0xe022
57 #define PLA_EEE_CR 0xe040
58 #define PLA_EEEP_CR 0xe080
59 #define PLA_MAC_PWR_CTRL 0xe0c0
60 #define PLA_MAC_PWR_CTRL2 0xe0ca
61 #define PLA_MAC_PWR_CTRL3 0xe0cc
62 #define PLA_MAC_PWR_CTRL4 0xe0ce
63 #define PLA_WDT6_CTRL 0xe428
64 #define PLA_TCR0 0xe610
65 #define PLA_TCR1 0xe612
66 #define PLA_MTPS 0xe615
67 #define PLA_TXFIFO_CTRL 0xe618
68 #define PLA_RSTTALLY 0xe800
70 #define PLA_CRWECR 0xe81c
71 #define PLA_CONFIG12 0xe81e /* CONFIG1, CONFIG2 */
72 #define PLA_CONFIG34 0xe820 /* CONFIG3, CONFIG4 */
73 #define PLA_CONFIG5 0xe822
74 #define PLA_PHY_PWR 0xe84c
75 #define PLA_OOB_CTRL 0xe84f
76 #define PLA_CPCR 0xe854
77 #define PLA_MISC_0 0xe858
78 #define PLA_MISC_1 0xe85a
79 #define PLA_OCP_GPHY_BASE 0xe86c
80 #define PLA_TALLYCNT 0xe890
81 #define PLA_SFF_STS_7 0xe8de
82 #define PLA_PHYSTATUS 0xe908
83 #define PLA_BP_BA 0xfc26
84 #define PLA_BP_0 0xfc28
85 #define PLA_BP_1 0xfc2a
86 #define PLA_BP_2 0xfc2c
87 #define PLA_BP_3 0xfc2e
88 #define PLA_BP_4 0xfc30
89 #define PLA_BP_5 0xfc32
90 #define PLA_BP_6 0xfc34
91 #define PLA_BP_7 0xfc36
92 #define PLA_BP_EN 0xfc38
94 #define USB_USB2PHY 0xb41e
95 #define USB_SSPHYLINK2 0xb428
96 #define USB_U2P3_CTRL 0xb460
97 #define USB_CSR_DUMMY1 0xb464
98 #define USB_CSR_DUMMY2 0xb466
99 #define USB_DEV_STAT 0xb808
100 #define USB_CONNECT_TIMER 0xcbf8
101 #define USB_BURST_SIZE 0xcfc0
102 #define USB_USB_CTRL 0xd406
103 #define USB_PHY_CTRL 0xd408
104 #define USB_TX_AGG 0xd40a
105 #define USB_RX_BUF_TH 0xd40c
106 #define USB_USB_TIMER 0xd428
107 #define USB_RX_EARLY_TIMEOUT 0xd42c
108 #define USB_RX_EARLY_SIZE 0xd42e
109 #define USB_PM_CTRL_STATUS 0xd432
110 #define USB_TX_DMA 0xd434
111 #define USB_TOLERANCE 0xd490
112 #define USB_LPM_CTRL 0xd41a
113 #define USB_UPS_CTRL 0xd800
114 #define USB_MISC_0 0xd81a
115 #define USB_POWER_CUT 0xd80a
116 #define USB_AFE_CTRL2 0xd824
117 #define USB_WDT11_CTRL 0xe43c
118 #define USB_BP_BA 0xfc26
119 #define USB_BP_0 0xfc28
120 #define USB_BP_1 0xfc2a
121 #define USB_BP_2 0xfc2c
122 #define USB_BP_3 0xfc2e
123 #define USB_BP_4 0xfc30
124 #define USB_BP_5 0xfc32
125 #define USB_BP_6 0xfc34
126 #define USB_BP_7 0xfc36
127 #define USB_BP_EN 0xfc38
130 #define OCP_ALDPS_CONFIG 0x2010
131 #define OCP_EEE_CONFIG1 0x2080
132 #define OCP_EEE_CONFIG2 0x2092
133 #define OCP_EEE_CONFIG3 0x2094
134 #define OCP_BASE_MII 0xa400
135 #define OCP_EEE_AR 0xa41a
136 #define OCP_EEE_DATA 0xa41c
137 #define OCP_PHY_STATUS 0xa420
138 #define OCP_POWER_CFG 0xa430
139 #define OCP_EEE_CFG 0xa432
140 #define OCP_SRAM_ADDR 0xa436
141 #define OCP_SRAM_DATA 0xa438
142 #define OCP_DOWN_SPEED 0xa442
143 #define OCP_EEE_ABLE 0xa5c4
144 #define OCP_EEE_ADV 0xa5d0
145 #define OCP_EEE_LPABLE 0xa5d2
146 #define OCP_ADC_CFG 0xbc06
149 #define SRAM_LPF_CFG 0x8012
150 #define SRAM_10M_AMP1 0x8080
151 #define SRAM_10M_AMP2 0x8082
152 #define SRAM_IMPEDANCE 0x8084
155 #define RCR_AAP 0x00000001
156 #define RCR_APM 0x00000002
157 #define RCR_AM 0x00000004
158 #define RCR_AB 0x00000008
159 #define RCR_ACPT_ALL (RCR_AAP | RCR_APM | RCR_AM | RCR_AB)
161 /* PLA_RXFIFO_CTRL0 */
162 #define RXFIFO_THR1_NORMAL 0x00080002
163 #define RXFIFO_THR1_OOB 0x01800003
165 /* PLA_RXFIFO_CTRL1 */
166 #define RXFIFO_THR2_FULL 0x00000060
167 #define RXFIFO_THR2_HIGH 0x00000038
168 #define RXFIFO_THR2_OOB 0x0000004a
169 #define RXFIFO_THR2_NORMAL 0x00a0
171 /* PLA_RXFIFO_CTRL2 */
172 #define RXFIFO_THR3_FULL 0x00000078
173 #define RXFIFO_THR3_HIGH 0x00000048
174 #define RXFIFO_THR3_OOB 0x0000005a
175 #define RXFIFO_THR3_NORMAL 0x0110
177 /* PLA_TXFIFO_CTRL */
178 #define TXFIFO_THR_NORMAL 0x00400008
179 #define TXFIFO_THR_NORMAL2 0x01000008
182 #define ECM_ALDPS 0x0002
185 #define FMC_FCR_MCU_EN 0x0001
188 #define EEEP_CR_EEEP_TX 0x0002
191 #define WDT6_SET_MODE 0x0010
194 #define TCR0_TX_EMPTY 0x0800
195 #define TCR0_AUTO_FIFO 0x0080
198 #define VERSION_MASK 0x7cf0
201 #define MTPS_JUMBO (12 * 1024 / 64)
202 #define MTPS_DEFAULT (6 * 1024 / 64)
205 #define TALLY_RESET 0x0001
213 #define CRWECR_NORAML 0x00
214 #define CRWECR_CONFIG 0xc0
217 #define NOW_IS_OOB 0x80
218 #define TXFIFO_EMPTY 0x20
219 #define RXFIFO_EMPTY 0x10
220 #define LINK_LIST_READY 0x02
221 #define DIS_MCU_CLROOB 0x01
222 #define FIFO_EMPTY (TXFIFO_EMPTY | RXFIFO_EMPTY)
225 #define RXDY_GATED_EN 0x0008
228 #define RE_INIT_LL 0x8000
229 #define MCU_BORW_EN 0x4000
232 #define CPCR_RX_VLAN 0x0040
235 #define MAGIC_EN 0x0001
238 #define TEREDO_SEL 0x8000
239 #define TEREDO_WAKE_MASK 0x7f00
240 #define TEREDO_RS_EVENT_MASK 0x00fe
241 #define OOB_TEREDO_EN 0x0001
244 #define ALDPS_PROXY_MODE 0x0001
247 #define LINK_ON_WAKE_EN 0x0010
248 #define LINK_OFF_WAKE_EN 0x0008
251 #define BWF_EN 0x0040
252 #define MWF_EN 0x0020
253 #define UWF_EN 0x0010
254 #define LAN_WAKE_EN 0x0002
256 /* PLA_LED_FEATURE */
257 #define LED_MODE_MASK 0x0700
260 #define TX_10M_IDLE_EN 0x0080
261 #define PFM_PWM_SWITCH 0x0040
263 /* PLA_MAC_PWR_CTRL */
264 #define D3_CLK_GATED_EN 0x00004000
265 #define MCU_CLK_RATIO 0x07010f07
266 #define MCU_CLK_RATIO_MASK 0x0f0f0f0f
267 #define ALDPS_SPDWN_RATIO 0x0f87
269 /* PLA_MAC_PWR_CTRL2 */
270 #define EEE_SPDWN_RATIO 0x8007
272 /* PLA_MAC_PWR_CTRL3 */
273 #define PKT_AVAIL_SPDWN_EN 0x0100
274 #define SUSPEND_SPDWN_EN 0x0004
275 #define U1U2_SPDWN_EN 0x0002
276 #define L1_SPDWN_EN 0x0001
278 /* PLA_MAC_PWR_CTRL4 */
279 #define PWRSAVE_SPDWN_EN 0x1000
280 #define RXDV_SPDWN_EN 0x0800
281 #define TX10MIDLE_EN 0x0100
282 #define TP100_SPDWN_EN 0x0020
283 #define TP500_SPDWN_EN 0x0010
284 #define TP1000_SPDWN_EN 0x0008
285 #define EEE_SPDWN_EN 0x0001
287 /* PLA_GPHY_INTR_IMR */
288 #define GPHY_STS_MSK 0x0001
289 #define SPEED_DOWN_MSK 0x0002
290 #define SPDWN_RXDV_MSK 0x0004
291 #define SPDWN_LINKCHG_MSK 0x0008
294 #define PHYAR_FLAG 0x80000000
297 #define EEE_RX_EN 0x0001
298 #define EEE_TX_EN 0x0002
301 #define AUTOLOAD_DONE 0x0002
304 #define USB2PHY_SUSPEND 0x0001
305 #define USB2PHY_L1 0x0002
308 #define pwd_dn_scale_mask 0x3ffe
309 #define pwd_dn_scale(x) ((x) << 1)
312 #define DYNAMIC_BURST 0x0001
315 #define EP4_FULL_FC 0x0001
318 #define STAT_SPEED_MASK 0x0006
319 #define STAT_SPEED_HIGH 0x0000
320 #define STAT_SPEED_FULL 0x0002
323 #define TX_AGG_MAX_THRESHOLD 0x03
326 #define RX_THR_SUPPER 0x0c350180
327 #define RX_THR_HIGH 0x7a120180
328 #define RX_THR_SLOW 0xffff0180
331 #define TEST_MODE_DISABLE 0x00000001
332 #define TX_SIZE_ADJUST1 0x00000100
335 #define POWER_CUT 0x0100
337 /* USB_PM_CTRL_STATUS */
338 #define RESUME_INDICATE 0x0001
341 #define RX_AGG_DISABLE 0x0010
344 #define U2P3_ENABLE 0x0001
347 #define PWR_EN 0x0001
348 #define PHASE2_EN 0x0008
351 #define PCUT_STATUS 0x0001
353 /* USB_RX_EARLY_TIMEOUT */
354 #define COALESCE_SUPER 85000U
355 #define COALESCE_HIGH 250000U
356 #define COALESCE_SLOW 524280U
359 #define TIMER11_EN 0x0001
362 /* bit 4 ~ 5: fifo empty boundary */
363 #define FIFO_EMPTY_1FB 0x30 /* 0x1fb * 64 = 32448 bytes */
364 /* bit 2 ~ 3: LMP timer */
365 #define LPM_TIMER_MASK 0x0c
366 #define LPM_TIMER_500MS 0x04 /* 500 ms */
367 #define LPM_TIMER_500US 0x0c /* 500 us */
368 #define ROK_EXIT_LPM 0x02
371 #define SEN_VAL_MASK 0xf800
372 #define SEN_VAL_NORMAL 0xa000
373 #define SEL_RXIDLE 0x0100
375 /* OCP_ALDPS_CONFIG */
376 #define ENPWRSAVE 0x8000
377 #define ENPDNPS 0x0200
378 #define LINKENA 0x0100
379 #define DIS_SDSAVE 0x0010
382 #define PHY_STAT_MASK 0x0007
383 #define PHY_STAT_LAN_ON 3
384 #define PHY_STAT_PWRDN 5
387 #define EEE_CLKDIV_EN 0x8000
388 #define EN_ALDPS 0x0004
389 #define EN_10M_PLLOFF 0x0001
391 /* OCP_EEE_CONFIG1 */
392 #define RG_TXLPI_MSK_HFDUP 0x8000
393 #define RG_MATCLR_EN 0x4000
394 #define EEE_10_CAP 0x2000
395 #define EEE_NWAY_EN 0x1000
396 #define TX_QUIET_EN 0x0200
397 #define RX_QUIET_EN 0x0100
398 #define sd_rise_time_mask 0x0070
399 #define sd_rise_time(x) (min(x, 7) << 4) /* bit 4 ~ 6 */
400 #define RG_RXLPI_MSK_HFDUP 0x0008
401 #define SDFALLTIME 0x0007 /* bit 0 ~ 2 */
403 /* OCP_EEE_CONFIG2 */
404 #define RG_LPIHYS_NUM 0x7000 /* bit 12 ~ 15 */
405 #define RG_DACQUIET_EN 0x0400
406 #define RG_LDVQUIET_EN 0x0200
407 #define RG_CKRSEL 0x0020
408 #define RG_EEEPRG_EN 0x0010
410 /* OCP_EEE_CONFIG3 */
411 #define fast_snr_mask 0xff80
412 #define fast_snr(x) (min(x, 0x1ff) << 7) /* bit 7 ~ 15 */
413 #define RG_LFS_SEL 0x0060 /* bit 6 ~ 5 */
414 #define MSK_PH 0x0006 /* bit 0 ~ 3 */
417 /* bit[15:14] function */
418 #define FUN_ADDR 0x0000
419 #define FUN_DATA 0x4000
420 /* bit[4:0] device addr */
423 #define CTAP_SHORT_EN 0x0040
424 #define EEE10_EN 0x0010
427 #define EN_10M_BGOFF 0x0080
430 #define CKADSEL_L 0x0100
431 #define ADC_EN 0x0080
432 #define EN_EMI_L 0x0040
435 #define LPF_AUTO_TUNE 0x8000
438 #define GDAC_IB_UPALL 0x0008
441 #define AMP_DN 0x0200
444 #define RX_DRIVING_MASK 0x6000
446 enum rtl_register_content
{
454 #define RTL8152_MAX_TX 4
455 #define RTL8152_MAX_RX 10
461 #define INTR_LINK 0x0004
463 #define RTL8152_REQT_READ 0xc0
464 #define RTL8152_REQT_WRITE 0x40
465 #define RTL8152_REQ_GET_REGS 0x05
466 #define RTL8152_REQ_SET_REGS 0x05
468 #define BYTE_EN_DWORD 0xff
469 #define BYTE_EN_WORD 0x33
470 #define BYTE_EN_BYTE 0x11
471 #define BYTE_EN_SIX_BYTES 0x3f
472 #define BYTE_EN_START_MASK 0x0f
473 #define BYTE_EN_END_MASK 0xf0
475 #define RTL8153_MAX_PACKET 9216 /* 9K */
476 #define RTL8153_MAX_MTU (RTL8153_MAX_PACKET - VLAN_ETH_HLEN - VLAN_HLEN)
477 #define RTL8152_RMS (VLAN_ETH_FRAME_LEN + VLAN_HLEN)
478 #define RTL8153_RMS RTL8153_MAX_PACKET
479 #define RTL8152_TX_TIMEOUT (5 * HZ)
480 #define RTL8152_NAPI_WEIGHT 64
493 /* Define these values to match your device */
494 #define VENDOR_ID_REALTEK 0x0bda
495 #define VENDOR_ID_SAMSUNG 0x04e8
496 #define VENDOR_ID_LENOVO 0x17ef
497 #define VENDOR_ID_NVIDIA 0x0955
499 #define MCU_TYPE_PLA 0x0100
500 #define MCU_TYPE_USB 0x0000
502 struct tally_counter
{
509 __le32 tx_one_collision
;
510 __le32 tx_multi_collision
;
520 #define RX_LEN_MASK 0x7fff
523 #define RD_UDP_CS BIT(23)
524 #define RD_TCP_CS BIT(22)
525 #define RD_IPV6_CS BIT(20)
526 #define RD_IPV4_CS BIT(19)
529 #define IPF BIT(23) /* IP checksum fail */
530 #define UDPF BIT(22) /* UDP checksum fail */
531 #define TCPF BIT(21) /* TCP checksum fail */
532 #define RX_VLAN_TAG BIT(16)
541 #define TX_FS BIT(31) /* First segment of a packet */
542 #define TX_LS BIT(30) /* Final segment of a packet */
543 #define GTSENDV4 BIT(28)
544 #define GTSENDV6 BIT(27)
545 #define GTTCPHO_SHIFT 18
546 #define GTTCPHO_MAX 0x7fU
547 #define TX_LEN_MAX 0x3ffffU
550 #define UDP_CS BIT(31) /* Calculate UDP/IP checksum */
551 #define TCP_CS BIT(30) /* Calculate TCP/IP checksum */
552 #define IPV4_CS BIT(29) /* Calculate IPv4 checksum */
553 #define IPV6_CS BIT(28) /* Calculate IPv6 checksum */
555 #define MSS_MAX 0x7ffU
556 #define TCPHO_SHIFT 17
557 #define TCPHO_MAX 0x7ffU
558 #define TX_VLAN_TAG BIT(16)
564 struct list_head list
;
566 struct r8152
*context
;
572 struct list_head list
;
574 struct r8152
*context
;
583 struct usb_device
*udev
;
584 struct napi_struct napi
;
585 struct usb_interface
*intf
;
586 struct net_device
*netdev
;
587 struct urb
*intr_urb
;
588 struct tx_agg tx_info
[RTL8152_MAX_TX
];
589 struct rx_agg rx_info
[RTL8152_MAX_RX
];
590 struct list_head rx_done
, tx_free
;
591 struct sk_buff_head tx_queue
, rx_queue
;
592 spinlock_t rx_lock
, tx_lock
;
593 struct delayed_work schedule
;
594 struct mii_if_info mii
;
595 struct mutex control
; /* use for hw setting */
598 void (*init
)(struct r8152
*);
599 int (*enable
)(struct r8152
*);
600 void (*disable
)(struct r8152
*);
601 void (*up
)(struct r8152
*);
602 void (*down
)(struct r8152
*);
603 void (*unload
)(struct r8152
*);
604 int (*eee_get
)(struct r8152
*, struct ethtool_eee
*);
605 int (*eee_set
)(struct r8152
*, struct ethtool_eee
*);
635 /* Maximum number of multicast addresses to filter (vs. Rx-all-multicast).
636 * The RTL chips use a 64 element hash table based on the Ethernet CRC.
638 static const int multicast_filter_limit
= 32;
639 static unsigned int agg_buf_sz
= 16384;
641 #define RTL_LIMITED_TSO_SIZE (agg_buf_sz - sizeof(struct tx_desc) - \
642 VLAN_ETH_HLEN - VLAN_HLEN)
645 int get_registers(struct r8152
*tp
, u16 value
, u16 index
, u16 size
, void *data
)
650 tmp
= kmalloc(size
, GFP_KERNEL
);
654 ret
= usb_control_msg(tp
->udev
, usb_rcvctrlpipe(tp
->udev
, 0),
655 RTL8152_REQ_GET_REGS
, RTL8152_REQT_READ
,
656 value
, index
, tmp
, size
, 500);
658 memcpy(data
, tmp
, size
);
665 int set_registers(struct r8152
*tp
, u16 value
, u16 index
, u16 size
, void *data
)
670 tmp
= kmemdup(data
, size
, GFP_KERNEL
);
674 ret
= usb_control_msg(tp
->udev
, usb_sndctrlpipe(tp
->udev
, 0),
675 RTL8152_REQ_SET_REGS
, RTL8152_REQT_WRITE
,
676 value
, index
, tmp
, size
, 500);
683 static int generic_ocp_read(struct r8152
*tp
, u16 index
, u16 size
,
684 void *data
, u16 type
)
689 if (test_bit(RTL8152_UNPLUG
, &tp
->flags
))
692 /* both size and indix must be 4 bytes align */
693 if ((size
& 3) || !size
|| (index
& 3) || !data
)
696 if ((u32
)index
+ (u32
)size
> 0xffff)
701 ret
= get_registers(tp
, index
, type
, limit
, data
);
709 ret
= get_registers(tp
, index
, type
, size
, data
);
721 set_bit(RTL8152_UNPLUG
, &tp
->flags
);
726 static int generic_ocp_write(struct r8152
*tp
, u16 index
, u16 byteen
,
727 u16 size
, void *data
, u16 type
)
730 u16 byteen_start
, byteen_end
, byen
;
733 if (test_bit(RTL8152_UNPLUG
, &tp
->flags
))
736 /* both size and indix must be 4 bytes align */
737 if ((size
& 3) || !size
|| (index
& 3) || !data
)
740 if ((u32
)index
+ (u32
)size
> 0xffff)
743 byteen_start
= byteen
& BYTE_EN_START_MASK
;
744 byteen_end
= byteen
& BYTE_EN_END_MASK
;
746 byen
= byteen_start
| (byteen_start
<< 4);
747 ret
= set_registers(tp
, index
, type
| byen
, 4, data
);
760 ret
= set_registers(tp
, index
,
761 type
| BYTE_EN_DWORD
,
770 ret
= set_registers(tp
, index
,
771 type
| BYTE_EN_DWORD
,
783 byen
= byteen_end
| (byteen_end
>> 4);
784 ret
= set_registers(tp
, index
, type
| byen
, 4, data
);
791 set_bit(RTL8152_UNPLUG
, &tp
->flags
);
797 int pla_ocp_read(struct r8152
*tp
, u16 index
, u16 size
, void *data
)
799 return generic_ocp_read(tp
, index
, size
, data
, MCU_TYPE_PLA
);
803 int pla_ocp_write(struct r8152
*tp
, u16 index
, u16 byteen
, u16 size
, void *data
)
805 return generic_ocp_write(tp
, index
, byteen
, size
, data
, MCU_TYPE_PLA
);
809 int usb_ocp_read(struct r8152
*tp
, u16 index
, u16 size
, void *data
)
811 return generic_ocp_read(tp
, index
, size
, data
, MCU_TYPE_USB
);
815 int usb_ocp_write(struct r8152
*tp
, u16 index
, u16 byteen
, u16 size
, void *data
)
817 return generic_ocp_write(tp
, index
, byteen
, size
, data
, MCU_TYPE_USB
);
820 static u32
ocp_read_dword(struct r8152
*tp
, u16 type
, u16 index
)
824 generic_ocp_read(tp
, index
, sizeof(data
), &data
, type
);
826 return __le32_to_cpu(data
);
829 static void ocp_write_dword(struct r8152
*tp
, u16 type
, u16 index
, u32 data
)
831 __le32 tmp
= __cpu_to_le32(data
);
833 generic_ocp_write(tp
, index
, BYTE_EN_DWORD
, sizeof(tmp
), &tmp
, type
);
836 static u16
ocp_read_word(struct r8152
*tp
, u16 type
, u16 index
)
840 u8 shift
= index
& 2;
844 generic_ocp_read(tp
, index
, sizeof(tmp
), &tmp
, type
);
846 data
= __le32_to_cpu(tmp
);
847 data
>>= (shift
* 8);
853 static void ocp_write_word(struct r8152
*tp
, u16 type
, u16 index
, u32 data
)
857 u16 byen
= BYTE_EN_WORD
;
858 u8 shift
= index
& 2;
864 mask
<<= (shift
* 8);
865 data
<<= (shift
* 8);
869 tmp
= __cpu_to_le32(data
);
871 generic_ocp_write(tp
, index
, byen
, sizeof(tmp
), &tmp
, type
);
874 static u8
ocp_read_byte(struct r8152
*tp
, u16 type
, u16 index
)
878 u8 shift
= index
& 3;
882 generic_ocp_read(tp
, index
, sizeof(tmp
), &tmp
, type
);
884 data
= __le32_to_cpu(tmp
);
885 data
>>= (shift
* 8);
891 static void ocp_write_byte(struct r8152
*tp
, u16 type
, u16 index
, u32 data
)
895 u16 byen
= BYTE_EN_BYTE
;
896 u8 shift
= index
& 3;
902 mask
<<= (shift
* 8);
903 data
<<= (shift
* 8);
907 tmp
= __cpu_to_le32(data
);
909 generic_ocp_write(tp
, index
, byen
, sizeof(tmp
), &tmp
, type
);
912 static u16
ocp_reg_read(struct r8152
*tp
, u16 addr
)
914 u16 ocp_base
, ocp_index
;
916 ocp_base
= addr
& 0xf000;
917 if (ocp_base
!= tp
->ocp_base
) {
918 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_OCP_GPHY_BASE
, ocp_base
);
919 tp
->ocp_base
= ocp_base
;
922 ocp_index
= (addr
& 0x0fff) | 0xb000;
923 return ocp_read_word(tp
, MCU_TYPE_PLA
, ocp_index
);
926 static void ocp_reg_write(struct r8152
*tp
, u16 addr
, u16 data
)
928 u16 ocp_base
, ocp_index
;
930 ocp_base
= addr
& 0xf000;
931 if (ocp_base
!= tp
->ocp_base
) {
932 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_OCP_GPHY_BASE
, ocp_base
);
933 tp
->ocp_base
= ocp_base
;
936 ocp_index
= (addr
& 0x0fff) | 0xb000;
937 ocp_write_word(tp
, MCU_TYPE_PLA
, ocp_index
, data
);
940 static inline void r8152_mdio_write(struct r8152
*tp
, u32 reg_addr
, u32 value
)
942 ocp_reg_write(tp
, OCP_BASE_MII
+ reg_addr
* 2, value
);
945 static inline int r8152_mdio_read(struct r8152
*tp
, u32 reg_addr
)
947 return ocp_reg_read(tp
, OCP_BASE_MII
+ reg_addr
* 2);
950 static void sram_write(struct r8152
*tp
, u16 addr
, u16 data
)
952 ocp_reg_write(tp
, OCP_SRAM_ADDR
, addr
);
953 ocp_reg_write(tp
, OCP_SRAM_DATA
, data
);
956 static int read_mii_word(struct net_device
*netdev
, int phy_id
, int reg
)
958 struct r8152
*tp
= netdev_priv(netdev
);
961 if (test_bit(RTL8152_UNPLUG
, &tp
->flags
))
964 if (phy_id
!= R8152_PHY_ID
)
967 ret
= r8152_mdio_read(tp
, reg
);
973 void write_mii_word(struct net_device
*netdev
, int phy_id
, int reg
, int val
)
975 struct r8152
*tp
= netdev_priv(netdev
);
977 if (test_bit(RTL8152_UNPLUG
, &tp
->flags
))
980 if (phy_id
!= R8152_PHY_ID
)
983 r8152_mdio_write(tp
, reg
, val
);
987 r8152_submit_rx(struct r8152
*tp
, struct rx_agg
*agg
, gfp_t mem_flags
);
989 static int rtl8152_set_mac_address(struct net_device
*netdev
, void *p
)
991 struct r8152
*tp
= netdev_priv(netdev
);
992 struct sockaddr
*addr
= p
;
993 int ret
= -EADDRNOTAVAIL
;
995 if (!is_valid_ether_addr(addr
->sa_data
))
998 ret
= usb_autopm_get_interface(tp
->intf
);
1002 mutex_lock(&tp
->control
);
1004 memcpy(netdev
->dev_addr
, addr
->sa_data
, netdev
->addr_len
);
1006 ocp_write_byte(tp
, MCU_TYPE_PLA
, PLA_CRWECR
, CRWECR_CONFIG
);
1007 pla_ocp_write(tp
, PLA_IDR
, BYTE_EN_SIX_BYTES
, 8, addr
->sa_data
);
1008 ocp_write_byte(tp
, MCU_TYPE_PLA
, PLA_CRWECR
, CRWECR_NORAML
);
1010 mutex_unlock(&tp
->control
);
1012 usb_autopm_put_interface(tp
->intf
);
1017 static int set_ethernet_addr(struct r8152
*tp
)
1019 struct net_device
*dev
= tp
->netdev
;
1023 if (tp
->version
== RTL_VER_01
)
1024 ret
= pla_ocp_read(tp
, PLA_IDR
, 8, sa
.sa_data
);
1026 ret
= pla_ocp_read(tp
, PLA_BACKUP
, 8, sa
.sa_data
);
1029 netif_err(tp
, probe
, dev
, "Get ether addr fail\n");
1030 } else if (!is_valid_ether_addr(sa
.sa_data
)) {
1031 netif_err(tp
, probe
, dev
, "Invalid ether addr %pM\n",
1033 eth_hw_addr_random(dev
);
1034 ether_addr_copy(sa
.sa_data
, dev
->dev_addr
);
1035 ret
= rtl8152_set_mac_address(dev
, &sa
);
1036 netif_info(tp
, probe
, dev
, "Random ether addr %pM\n",
1039 if (tp
->version
== RTL_VER_01
)
1040 ether_addr_copy(dev
->dev_addr
, sa
.sa_data
);
1042 ret
= rtl8152_set_mac_address(dev
, &sa
);
1048 static void read_bulk_callback(struct urb
*urb
)
1050 struct net_device
*netdev
;
1051 int status
= urb
->status
;
1063 if (test_bit(RTL8152_UNPLUG
, &tp
->flags
))
1066 if (!test_bit(WORK_ENABLE
, &tp
->flags
))
1069 netdev
= tp
->netdev
;
1071 /* When link down, the driver would cancel all bulks. */
1072 /* This avoid the re-submitting bulk */
1073 if (!netif_carrier_ok(netdev
))
1076 usb_mark_last_busy(tp
->udev
);
1080 if (urb
->actual_length
< ETH_ZLEN
)
1083 spin_lock(&tp
->rx_lock
);
1084 list_add_tail(&agg
->list
, &tp
->rx_done
);
1085 spin_unlock(&tp
->rx_lock
);
1086 napi_schedule(&tp
->napi
);
1089 set_bit(RTL8152_UNPLUG
, &tp
->flags
);
1090 netif_device_detach(tp
->netdev
);
1093 return; /* the urb is in unlink state */
1095 if (net_ratelimit())
1096 netdev_warn(netdev
, "maybe reset is needed?\n");
1099 if (net_ratelimit())
1100 netdev_warn(netdev
, "Rx status %d\n", status
);
1104 r8152_submit_rx(tp
, agg
, GFP_ATOMIC
);
1107 static void write_bulk_callback(struct urb
*urb
)
1109 struct net_device_stats
*stats
;
1110 struct net_device
*netdev
;
1113 int status
= urb
->status
;
1123 netdev
= tp
->netdev
;
1124 stats
= &netdev
->stats
;
1126 if (net_ratelimit())
1127 netdev_warn(netdev
, "Tx status %d\n", status
);
1128 stats
->tx_errors
+= agg
->skb_num
;
1130 stats
->tx_packets
+= agg
->skb_num
;
1131 stats
->tx_bytes
+= agg
->skb_len
;
1134 spin_lock(&tp
->tx_lock
);
1135 list_add_tail(&agg
->list
, &tp
->tx_free
);
1136 spin_unlock(&tp
->tx_lock
);
1138 usb_autopm_put_interface_async(tp
->intf
);
1140 if (!netif_carrier_ok(netdev
))
1143 if (!test_bit(WORK_ENABLE
, &tp
->flags
))
1146 if (test_bit(RTL8152_UNPLUG
, &tp
->flags
))
1149 if (!skb_queue_empty(&tp
->tx_queue
))
1150 napi_schedule(&tp
->napi
);
1153 static void intr_callback(struct urb
*urb
)
1157 int status
= urb
->status
;
1164 if (!test_bit(WORK_ENABLE
, &tp
->flags
))
1167 if (test_bit(RTL8152_UNPLUG
, &tp
->flags
))
1171 case 0: /* success */
1173 case -ECONNRESET
: /* unlink */
1175 netif_device_detach(tp
->netdev
);
1178 netif_info(tp
, intr
, tp
->netdev
,
1179 "Stop submitting intr, status %d\n", status
);
1182 netif_info(tp
, intr
, tp
->netdev
, "intr status -EOVERFLOW\n");
1184 /* -EPIPE: should clear the halt */
1186 netif_info(tp
, intr
, tp
->netdev
, "intr status %d\n", status
);
1190 d
= urb
->transfer_buffer
;
1191 if (INTR_LINK
& __le16_to_cpu(d
[0])) {
1192 if (!netif_carrier_ok(tp
->netdev
)) {
1193 set_bit(RTL8152_LINK_CHG
, &tp
->flags
);
1194 schedule_delayed_work(&tp
->schedule
, 0);
1197 if (netif_carrier_ok(tp
->netdev
)) {
1198 set_bit(RTL8152_LINK_CHG
, &tp
->flags
);
1199 schedule_delayed_work(&tp
->schedule
, 0);
1204 res
= usb_submit_urb(urb
, GFP_ATOMIC
);
1205 if (res
== -ENODEV
) {
1206 set_bit(RTL8152_UNPLUG
, &tp
->flags
);
1207 netif_device_detach(tp
->netdev
);
1209 netif_err(tp
, intr
, tp
->netdev
,
1210 "can't resubmit intr, status %d\n", res
);
1214 static inline void *rx_agg_align(void *data
)
1216 return (void *)ALIGN((uintptr_t)data
, RX_ALIGN
);
1219 static inline void *tx_agg_align(void *data
)
1221 return (void *)ALIGN((uintptr_t)data
, TX_ALIGN
);
1224 static void free_all_mem(struct r8152
*tp
)
1228 for (i
= 0; i
< RTL8152_MAX_RX
; i
++) {
1229 usb_free_urb(tp
->rx_info
[i
].urb
);
1230 tp
->rx_info
[i
].urb
= NULL
;
1232 kfree(tp
->rx_info
[i
].buffer
);
1233 tp
->rx_info
[i
].buffer
= NULL
;
1234 tp
->rx_info
[i
].head
= NULL
;
1237 for (i
= 0; i
< RTL8152_MAX_TX
; i
++) {
1238 usb_free_urb(tp
->tx_info
[i
].urb
);
1239 tp
->tx_info
[i
].urb
= NULL
;
1241 kfree(tp
->tx_info
[i
].buffer
);
1242 tp
->tx_info
[i
].buffer
= NULL
;
1243 tp
->tx_info
[i
].head
= NULL
;
1246 usb_free_urb(tp
->intr_urb
);
1247 tp
->intr_urb
= NULL
;
1249 kfree(tp
->intr_buff
);
1250 tp
->intr_buff
= NULL
;
1253 static int alloc_all_mem(struct r8152
*tp
)
1255 struct net_device
*netdev
= tp
->netdev
;
1256 struct usb_interface
*intf
= tp
->intf
;
1257 struct usb_host_interface
*alt
= intf
->cur_altsetting
;
1258 struct usb_host_endpoint
*ep_intr
= alt
->endpoint
+ 2;
1263 node
= netdev
->dev
.parent
? dev_to_node(netdev
->dev
.parent
) : -1;
1265 spin_lock_init(&tp
->rx_lock
);
1266 spin_lock_init(&tp
->tx_lock
);
1267 INIT_LIST_HEAD(&tp
->tx_free
);
1268 skb_queue_head_init(&tp
->tx_queue
);
1269 skb_queue_head_init(&tp
->rx_queue
);
1271 for (i
= 0; i
< RTL8152_MAX_RX
; i
++) {
1272 buf
= kmalloc_node(agg_buf_sz
, GFP_KERNEL
, node
);
1276 if (buf
!= rx_agg_align(buf
)) {
1278 buf
= kmalloc_node(agg_buf_sz
+ RX_ALIGN
, GFP_KERNEL
,
1284 urb
= usb_alloc_urb(0, GFP_KERNEL
);
1290 INIT_LIST_HEAD(&tp
->rx_info
[i
].list
);
1291 tp
->rx_info
[i
].context
= tp
;
1292 tp
->rx_info
[i
].urb
= urb
;
1293 tp
->rx_info
[i
].buffer
= buf
;
1294 tp
->rx_info
[i
].head
= rx_agg_align(buf
);
1297 for (i
= 0; i
< RTL8152_MAX_TX
; i
++) {
1298 buf
= kmalloc_node(agg_buf_sz
, GFP_KERNEL
, node
);
1302 if (buf
!= tx_agg_align(buf
)) {
1304 buf
= kmalloc_node(agg_buf_sz
+ TX_ALIGN
, GFP_KERNEL
,
1310 urb
= usb_alloc_urb(0, GFP_KERNEL
);
1316 INIT_LIST_HEAD(&tp
->tx_info
[i
].list
);
1317 tp
->tx_info
[i
].context
= tp
;
1318 tp
->tx_info
[i
].urb
= urb
;
1319 tp
->tx_info
[i
].buffer
= buf
;
1320 tp
->tx_info
[i
].head
= tx_agg_align(buf
);
1322 list_add_tail(&tp
->tx_info
[i
].list
, &tp
->tx_free
);
1325 tp
->intr_urb
= usb_alloc_urb(0, GFP_KERNEL
);
1329 tp
->intr_buff
= kmalloc(INTBUFSIZE
, GFP_KERNEL
);
1333 tp
->intr_interval
= (int)ep_intr
->desc
.bInterval
;
1334 usb_fill_int_urb(tp
->intr_urb
, tp
->udev
, usb_rcvintpipe(tp
->udev
, 3),
1335 tp
->intr_buff
, INTBUFSIZE
, intr_callback
,
1336 tp
, tp
->intr_interval
);
1345 static struct tx_agg
*r8152_get_tx_agg(struct r8152
*tp
)
1347 struct tx_agg
*agg
= NULL
;
1348 unsigned long flags
;
1350 if (list_empty(&tp
->tx_free
))
1353 spin_lock_irqsave(&tp
->tx_lock
, flags
);
1354 if (!list_empty(&tp
->tx_free
)) {
1355 struct list_head
*cursor
;
1357 cursor
= tp
->tx_free
.next
;
1358 list_del_init(cursor
);
1359 agg
= list_entry(cursor
, struct tx_agg
, list
);
1361 spin_unlock_irqrestore(&tp
->tx_lock
, flags
);
1366 /* r8152_csum_workaround()
1367 * The hw limites the value the transport offset. When the offset is out of the
1368 * range, calculate the checksum by sw.
1370 static void r8152_csum_workaround(struct r8152
*tp
, struct sk_buff
*skb
,
1371 struct sk_buff_head
*list
)
1373 if (skb_shinfo(skb
)->gso_size
) {
1374 netdev_features_t features
= tp
->netdev
->features
;
1375 struct sk_buff_head seg_list
;
1376 struct sk_buff
*segs
, *nskb
;
1378 features
&= ~(NETIF_F_SG
| NETIF_F_IPV6_CSUM
| NETIF_F_TSO6
);
1379 segs
= skb_gso_segment(skb
, features
);
1380 if (IS_ERR(segs
) || !segs
)
1383 __skb_queue_head_init(&seg_list
);
1389 __skb_queue_tail(&seg_list
, nskb
);
1392 skb_queue_splice(&seg_list
, list
);
1394 } else if (skb
->ip_summed
== CHECKSUM_PARTIAL
) {
1395 if (skb_checksum_help(skb
) < 0)
1398 __skb_queue_head(list
, skb
);
1400 struct net_device_stats
*stats
;
1403 stats
= &tp
->netdev
->stats
;
1404 stats
->tx_dropped
++;
1409 /* msdn_giant_send_check()
1410 * According to the document of microsoft, the TCP Pseudo Header excludes the
1411 * packet length for IPv6 TCP large packets.
1413 static int msdn_giant_send_check(struct sk_buff
*skb
)
1415 const struct ipv6hdr
*ipv6h
;
1419 ret
= skb_cow_head(skb
, 0);
1423 ipv6h
= ipv6_hdr(skb
);
1427 th
->check
= ~tcp_v6_check(0, &ipv6h
->saddr
, &ipv6h
->daddr
, 0);
1432 static inline void rtl_tx_vlan_tag(struct tx_desc
*desc
, struct sk_buff
*skb
)
1434 if (skb_vlan_tag_present(skb
)) {
1437 opts2
= TX_VLAN_TAG
| swab16(skb_vlan_tag_get(skb
));
1438 desc
->opts2
|= cpu_to_le32(opts2
);
1442 static inline void rtl_rx_vlan_tag(struct rx_desc
*desc
, struct sk_buff
*skb
)
1444 u32 opts2
= le32_to_cpu(desc
->opts2
);
1446 if (opts2
& RX_VLAN_TAG
)
1447 __vlan_hwaccel_put_tag(skb
, htons(ETH_P_8021Q
),
1448 swab16(opts2
& 0xffff));
1451 static int r8152_tx_csum(struct r8152
*tp
, struct tx_desc
*desc
,
1452 struct sk_buff
*skb
, u32 len
, u32 transport_offset
)
1454 u32 mss
= skb_shinfo(skb
)->gso_size
;
1455 u32 opts1
, opts2
= 0;
1456 int ret
= TX_CSUM_SUCCESS
;
1458 WARN_ON_ONCE(len
> TX_LEN_MAX
);
1460 opts1
= len
| TX_FS
| TX_LS
;
1463 if (transport_offset
> GTTCPHO_MAX
) {
1464 netif_warn(tp
, tx_err
, tp
->netdev
,
1465 "Invalid transport offset 0x%x for TSO\n",
1471 switch (vlan_get_protocol(skb
)) {
1472 case htons(ETH_P_IP
):
1476 case htons(ETH_P_IPV6
):
1477 if (msdn_giant_send_check(skb
)) {
1489 opts1
|= transport_offset
<< GTTCPHO_SHIFT
;
1490 opts2
|= min(mss
, MSS_MAX
) << MSS_SHIFT
;
1491 } else if (skb
->ip_summed
== CHECKSUM_PARTIAL
) {
1494 if (transport_offset
> TCPHO_MAX
) {
1495 netif_warn(tp
, tx_err
, tp
->netdev
,
1496 "Invalid transport offset 0x%x\n",
1502 switch (vlan_get_protocol(skb
)) {
1503 case htons(ETH_P_IP
):
1505 ip_protocol
= ip_hdr(skb
)->protocol
;
1508 case htons(ETH_P_IPV6
):
1510 ip_protocol
= ipv6_hdr(skb
)->nexthdr
;
1514 ip_protocol
= IPPROTO_RAW
;
1518 if (ip_protocol
== IPPROTO_TCP
)
1520 else if (ip_protocol
== IPPROTO_UDP
)
1525 opts2
|= transport_offset
<< TCPHO_SHIFT
;
1528 desc
->opts2
= cpu_to_le32(opts2
);
1529 desc
->opts1
= cpu_to_le32(opts1
);
1535 static int r8152_tx_agg_fill(struct r8152
*tp
, struct tx_agg
*agg
)
1537 struct sk_buff_head skb_head
, *tx_queue
= &tp
->tx_queue
;
1541 __skb_queue_head_init(&skb_head
);
1542 spin_lock(&tx_queue
->lock
);
1543 skb_queue_splice_init(tx_queue
, &skb_head
);
1544 spin_unlock(&tx_queue
->lock
);
1546 tx_data
= agg
->head
;
1549 remain
= agg_buf_sz
;
1551 while (remain
>= ETH_ZLEN
+ sizeof(struct tx_desc
)) {
1552 struct tx_desc
*tx_desc
;
1553 struct sk_buff
*skb
;
1557 skb
= __skb_dequeue(&skb_head
);
1561 len
= skb
->len
+ sizeof(*tx_desc
);
1564 __skb_queue_head(&skb_head
, skb
);
1568 tx_data
= tx_agg_align(tx_data
);
1569 tx_desc
= (struct tx_desc
*)tx_data
;
1571 offset
= (u32
)skb_transport_offset(skb
);
1573 if (r8152_tx_csum(tp
, tx_desc
, skb
, skb
->len
, offset
)) {
1574 r8152_csum_workaround(tp
, skb
, &skb_head
);
1578 rtl_tx_vlan_tag(tx_desc
, skb
);
1580 tx_data
+= sizeof(*tx_desc
);
1583 if (skb_copy_bits(skb
, 0, tx_data
, len
) < 0) {
1584 struct net_device_stats
*stats
= &tp
->netdev
->stats
;
1586 stats
->tx_dropped
++;
1587 dev_kfree_skb_any(skb
);
1588 tx_data
-= sizeof(*tx_desc
);
1593 agg
->skb_len
+= len
;
1596 dev_kfree_skb_any(skb
);
1598 remain
= agg_buf_sz
- (int)(tx_agg_align(tx_data
) - agg
->head
);
1601 if (!skb_queue_empty(&skb_head
)) {
1602 spin_lock(&tx_queue
->lock
);
1603 skb_queue_splice(&skb_head
, tx_queue
);
1604 spin_unlock(&tx_queue
->lock
);
1607 netif_tx_lock(tp
->netdev
);
1609 if (netif_queue_stopped(tp
->netdev
) &&
1610 skb_queue_len(&tp
->tx_queue
) < tp
->tx_qlen
)
1611 netif_wake_queue(tp
->netdev
);
1613 netif_tx_unlock(tp
->netdev
);
1615 ret
= usb_autopm_get_interface_async(tp
->intf
);
1619 usb_fill_bulk_urb(agg
->urb
, tp
->udev
, usb_sndbulkpipe(tp
->udev
, 2),
1620 agg
->head
, (int)(tx_data
- (u8
*)agg
->head
),
1621 (usb_complete_t
)write_bulk_callback
, agg
);
1623 ret
= usb_submit_urb(agg
->urb
, GFP_ATOMIC
);
1625 usb_autopm_put_interface_async(tp
->intf
);
1631 static u8
r8152_rx_csum(struct r8152
*tp
, struct rx_desc
*rx_desc
)
1633 u8 checksum
= CHECKSUM_NONE
;
1636 if (tp
->version
== RTL_VER_01
)
1639 opts2
= le32_to_cpu(rx_desc
->opts2
);
1640 opts3
= le32_to_cpu(rx_desc
->opts3
);
1642 if (opts2
& RD_IPV4_CS
) {
1644 checksum
= CHECKSUM_NONE
;
1645 else if ((opts2
& RD_UDP_CS
) && (opts3
& UDPF
))
1646 checksum
= CHECKSUM_NONE
;
1647 else if ((opts2
& RD_TCP_CS
) && (opts3
& TCPF
))
1648 checksum
= CHECKSUM_NONE
;
1650 checksum
= CHECKSUM_UNNECESSARY
;
1651 } else if (RD_IPV6_CS
) {
1652 if ((opts2
& RD_UDP_CS
) && !(opts3
& UDPF
))
1653 checksum
= CHECKSUM_UNNECESSARY
;
1654 else if ((opts2
& RD_TCP_CS
) && !(opts3
& TCPF
))
1655 checksum
= CHECKSUM_UNNECESSARY
;
1662 static int rx_bottom(struct r8152
*tp
, int budget
)
1664 unsigned long flags
;
1665 struct list_head
*cursor
, *next
, rx_queue
;
1666 int ret
= 0, work_done
= 0;
1668 if (!skb_queue_empty(&tp
->rx_queue
)) {
1669 while (work_done
< budget
) {
1670 struct sk_buff
*skb
= __skb_dequeue(&tp
->rx_queue
);
1671 struct net_device
*netdev
= tp
->netdev
;
1672 struct net_device_stats
*stats
= &netdev
->stats
;
1673 unsigned int pkt_len
;
1679 napi_gro_receive(&tp
->napi
, skb
);
1681 stats
->rx_packets
++;
1682 stats
->rx_bytes
+= pkt_len
;
1686 if (list_empty(&tp
->rx_done
))
1689 INIT_LIST_HEAD(&rx_queue
);
1690 spin_lock_irqsave(&tp
->rx_lock
, flags
);
1691 list_splice_init(&tp
->rx_done
, &rx_queue
);
1692 spin_unlock_irqrestore(&tp
->rx_lock
, flags
);
1694 list_for_each_safe(cursor
, next
, &rx_queue
) {
1695 struct rx_desc
*rx_desc
;
1701 list_del_init(cursor
);
1703 agg
= list_entry(cursor
, struct rx_agg
, list
);
1705 if (urb
->actual_length
< ETH_ZLEN
)
1708 rx_desc
= agg
->head
;
1709 rx_data
= agg
->head
;
1710 len_used
+= sizeof(struct rx_desc
);
1712 while (urb
->actual_length
> len_used
) {
1713 struct net_device
*netdev
= tp
->netdev
;
1714 struct net_device_stats
*stats
= &netdev
->stats
;
1715 unsigned int pkt_len
;
1716 struct sk_buff
*skb
;
1718 pkt_len
= le32_to_cpu(rx_desc
->opts1
) & RX_LEN_MASK
;
1719 if (pkt_len
< ETH_ZLEN
)
1722 len_used
+= pkt_len
;
1723 if (urb
->actual_length
< len_used
)
1726 pkt_len
-= CRC_SIZE
;
1727 rx_data
+= sizeof(struct rx_desc
);
1729 skb
= netdev_alloc_skb_ip_align(netdev
, pkt_len
);
1731 stats
->rx_dropped
++;
1735 skb
->ip_summed
= r8152_rx_csum(tp
, rx_desc
);
1736 memcpy(skb
->data
, rx_data
, pkt_len
);
1737 skb_put(skb
, pkt_len
);
1738 skb
->protocol
= eth_type_trans(skb
, netdev
);
1739 rtl_rx_vlan_tag(rx_desc
, skb
);
1740 if (work_done
< budget
) {
1741 napi_gro_receive(&tp
->napi
, skb
);
1743 stats
->rx_packets
++;
1744 stats
->rx_bytes
+= pkt_len
;
1746 __skb_queue_tail(&tp
->rx_queue
, skb
);
1750 rx_data
= rx_agg_align(rx_data
+ pkt_len
+ CRC_SIZE
);
1751 rx_desc
= (struct rx_desc
*)rx_data
;
1752 len_used
= (int)(rx_data
- (u8
*)agg
->head
);
1753 len_used
+= sizeof(struct rx_desc
);
1758 ret
= r8152_submit_rx(tp
, agg
, GFP_ATOMIC
);
1760 urb
->actual_length
= 0;
1761 list_add_tail(&agg
->list
, next
);
1765 if (!list_empty(&rx_queue
)) {
1766 spin_lock_irqsave(&tp
->rx_lock
, flags
);
1767 list_splice_tail(&rx_queue
, &tp
->rx_done
);
1768 spin_unlock_irqrestore(&tp
->rx_lock
, flags
);
1775 static void tx_bottom(struct r8152
*tp
)
1782 if (skb_queue_empty(&tp
->tx_queue
))
1785 agg
= r8152_get_tx_agg(tp
);
1789 res
= r8152_tx_agg_fill(tp
, agg
);
1791 struct net_device
*netdev
= tp
->netdev
;
1793 if (res
== -ENODEV
) {
1794 set_bit(RTL8152_UNPLUG
, &tp
->flags
);
1795 netif_device_detach(netdev
);
1797 struct net_device_stats
*stats
= &netdev
->stats
;
1798 unsigned long flags
;
1800 netif_warn(tp
, tx_err
, netdev
,
1801 "failed tx_urb %d\n", res
);
1802 stats
->tx_dropped
+= agg
->skb_num
;
1804 spin_lock_irqsave(&tp
->tx_lock
, flags
);
1805 list_add_tail(&agg
->list
, &tp
->tx_free
);
1806 spin_unlock_irqrestore(&tp
->tx_lock
, flags
);
1812 static void bottom_half(struct r8152
*tp
)
1814 if (test_bit(RTL8152_UNPLUG
, &tp
->flags
))
1817 if (!test_bit(WORK_ENABLE
, &tp
->flags
))
1820 /* When link down, the driver would cancel all bulks. */
1821 /* This avoid the re-submitting bulk */
1822 if (!netif_carrier_ok(tp
->netdev
))
1825 clear_bit(SCHEDULE_NAPI
, &tp
->flags
);
1830 static int r8152_poll(struct napi_struct
*napi
, int budget
)
1832 struct r8152
*tp
= container_of(napi
, struct r8152
, napi
);
1835 work_done
= rx_bottom(tp
, budget
);
1838 if (work_done
< budget
) {
1839 napi_complete(napi
);
1840 if (!list_empty(&tp
->rx_done
))
1841 napi_schedule(napi
);
1848 int r8152_submit_rx(struct r8152
*tp
, struct rx_agg
*agg
, gfp_t mem_flags
)
1852 /* The rx would be stopped, so skip submitting */
1853 if (test_bit(RTL8152_UNPLUG
, &tp
->flags
) ||
1854 !test_bit(WORK_ENABLE
, &tp
->flags
) || !netif_carrier_ok(tp
->netdev
))
1857 usb_fill_bulk_urb(agg
->urb
, tp
->udev
, usb_rcvbulkpipe(tp
->udev
, 1),
1858 agg
->head
, agg_buf_sz
,
1859 (usb_complete_t
)read_bulk_callback
, agg
);
1861 ret
= usb_submit_urb(agg
->urb
, mem_flags
);
1862 if (ret
== -ENODEV
) {
1863 set_bit(RTL8152_UNPLUG
, &tp
->flags
);
1864 netif_device_detach(tp
->netdev
);
1866 struct urb
*urb
= agg
->urb
;
1867 unsigned long flags
;
1869 urb
->actual_length
= 0;
1870 spin_lock_irqsave(&tp
->rx_lock
, flags
);
1871 list_add_tail(&agg
->list
, &tp
->rx_done
);
1872 spin_unlock_irqrestore(&tp
->rx_lock
, flags
);
1874 netif_err(tp
, rx_err
, tp
->netdev
,
1875 "Couldn't submit rx[%p], ret = %d\n", agg
, ret
);
1877 napi_schedule(&tp
->napi
);
1883 static void rtl_drop_queued_tx(struct r8152
*tp
)
1885 struct net_device_stats
*stats
= &tp
->netdev
->stats
;
1886 struct sk_buff_head skb_head
, *tx_queue
= &tp
->tx_queue
;
1887 struct sk_buff
*skb
;
1889 if (skb_queue_empty(tx_queue
))
1892 __skb_queue_head_init(&skb_head
);
1893 spin_lock_bh(&tx_queue
->lock
);
1894 skb_queue_splice_init(tx_queue
, &skb_head
);
1895 spin_unlock_bh(&tx_queue
->lock
);
1897 while ((skb
= __skb_dequeue(&skb_head
))) {
1899 stats
->tx_dropped
++;
1903 static void rtl8152_tx_timeout(struct net_device
*netdev
)
1905 struct r8152
*tp
= netdev_priv(netdev
);
1908 netif_warn(tp
, tx_err
, netdev
, "Tx timeout\n");
1909 for (i
= 0; i
< RTL8152_MAX_TX
; i
++)
1910 usb_unlink_urb(tp
->tx_info
[i
].urb
);
1913 static void rtl8152_set_rx_mode(struct net_device
*netdev
)
1915 struct r8152
*tp
= netdev_priv(netdev
);
1917 if (netif_carrier_ok(netdev
)) {
1918 set_bit(RTL8152_SET_RX_MODE
, &tp
->flags
);
1919 schedule_delayed_work(&tp
->schedule
, 0);
1923 static void _rtl8152_set_rx_mode(struct net_device
*netdev
)
1925 struct r8152
*tp
= netdev_priv(netdev
);
1926 u32 mc_filter
[2]; /* Multicast hash filter */
1930 clear_bit(RTL8152_SET_RX_MODE
, &tp
->flags
);
1931 netif_stop_queue(netdev
);
1932 ocp_data
= ocp_read_dword(tp
, MCU_TYPE_PLA
, PLA_RCR
);
1933 ocp_data
&= ~RCR_ACPT_ALL
;
1934 ocp_data
|= RCR_AB
| RCR_APM
;
1936 if (netdev
->flags
& IFF_PROMISC
) {
1937 /* Unconditionally log net taps. */
1938 netif_notice(tp
, link
, netdev
, "Promiscuous mode enabled\n");
1939 ocp_data
|= RCR_AM
| RCR_AAP
;
1940 mc_filter
[1] = 0xffffffff;
1941 mc_filter
[0] = 0xffffffff;
1942 } else if ((netdev_mc_count(netdev
) > multicast_filter_limit
) ||
1943 (netdev
->flags
& IFF_ALLMULTI
)) {
1944 /* Too many to filter perfectly -- accept all multicasts. */
1946 mc_filter
[1] = 0xffffffff;
1947 mc_filter
[0] = 0xffffffff;
1949 struct netdev_hw_addr
*ha
;
1953 netdev_for_each_mc_addr(ha
, netdev
) {
1954 int bit_nr
= ether_crc(ETH_ALEN
, ha
->addr
) >> 26;
1956 mc_filter
[bit_nr
>> 5] |= 1 << (bit_nr
& 31);
1961 tmp
[0] = __cpu_to_le32(swab32(mc_filter
[1]));
1962 tmp
[1] = __cpu_to_le32(swab32(mc_filter
[0]));
1964 pla_ocp_write(tp
, PLA_MAR
, BYTE_EN_DWORD
, sizeof(tmp
), tmp
);
1965 ocp_write_dword(tp
, MCU_TYPE_PLA
, PLA_RCR
, ocp_data
);
1966 netif_wake_queue(netdev
);
1969 static netdev_features_t
1970 rtl8152_features_check(struct sk_buff
*skb
, struct net_device
*dev
,
1971 netdev_features_t features
)
1973 u32 mss
= skb_shinfo(skb
)->gso_size
;
1974 int max_offset
= mss
? GTTCPHO_MAX
: TCPHO_MAX
;
1975 int offset
= skb_transport_offset(skb
);
1977 if ((mss
|| skb
->ip_summed
== CHECKSUM_PARTIAL
) && offset
> max_offset
)
1978 features
&= ~(NETIF_F_ALL_CSUM
| NETIF_F_GSO_MASK
);
1979 else if ((skb
->len
+ sizeof(struct tx_desc
)) > agg_buf_sz
)
1980 features
&= ~NETIF_F_GSO_MASK
;
1985 static netdev_tx_t
rtl8152_start_xmit(struct sk_buff
*skb
,
1986 struct net_device
*netdev
)
1988 struct r8152
*tp
= netdev_priv(netdev
);
1990 skb_tx_timestamp(skb
);
1992 skb_queue_tail(&tp
->tx_queue
, skb
);
1994 if (!list_empty(&tp
->tx_free
)) {
1995 if (test_bit(SELECTIVE_SUSPEND
, &tp
->flags
)) {
1996 set_bit(SCHEDULE_NAPI
, &tp
->flags
);
1997 schedule_delayed_work(&tp
->schedule
, 0);
1999 usb_mark_last_busy(tp
->udev
);
2000 napi_schedule(&tp
->napi
);
2002 } else if (skb_queue_len(&tp
->tx_queue
) > tp
->tx_qlen
) {
2003 netif_stop_queue(netdev
);
2006 return NETDEV_TX_OK
;
2009 static void r8152b_reset_packet_filter(struct r8152
*tp
)
2013 ocp_data
= ocp_read_word(tp
, MCU_TYPE_PLA
, PLA_FMC
);
2014 ocp_data
&= ~FMC_FCR_MCU_EN
;
2015 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_FMC
, ocp_data
);
2016 ocp_data
|= FMC_FCR_MCU_EN
;
2017 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_FMC
, ocp_data
);
2020 static void rtl8152_nic_reset(struct r8152
*tp
)
2024 ocp_write_byte(tp
, MCU_TYPE_PLA
, PLA_CR
, CR_RST
);
2026 for (i
= 0; i
< 1000; i
++) {
2027 if (!(ocp_read_byte(tp
, MCU_TYPE_PLA
, PLA_CR
) & CR_RST
))
2029 usleep_range(100, 400);
2033 static void set_tx_qlen(struct r8152
*tp
)
2035 struct net_device
*netdev
= tp
->netdev
;
2037 tp
->tx_qlen
= agg_buf_sz
/ (netdev
->mtu
+ VLAN_ETH_HLEN
+ VLAN_HLEN
+
2038 sizeof(struct tx_desc
));
2041 static inline u8
rtl8152_get_speed(struct r8152
*tp
)
2043 return ocp_read_byte(tp
, MCU_TYPE_PLA
, PLA_PHYSTATUS
);
2046 static void rtl_set_eee_plus(struct r8152
*tp
)
2051 speed
= rtl8152_get_speed(tp
);
2052 if (speed
& _10bps
) {
2053 ocp_data
= ocp_read_word(tp
, MCU_TYPE_PLA
, PLA_EEEP_CR
);
2054 ocp_data
|= EEEP_CR_EEEP_TX
;
2055 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_EEEP_CR
, ocp_data
);
2057 ocp_data
= ocp_read_word(tp
, MCU_TYPE_PLA
, PLA_EEEP_CR
);
2058 ocp_data
&= ~EEEP_CR_EEEP_TX
;
2059 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_EEEP_CR
, ocp_data
);
2063 static void rxdy_gated_en(struct r8152
*tp
, bool enable
)
2067 ocp_data
= ocp_read_word(tp
, MCU_TYPE_PLA
, PLA_MISC_1
);
2069 ocp_data
|= RXDY_GATED_EN
;
2071 ocp_data
&= ~RXDY_GATED_EN
;
2072 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_MISC_1
, ocp_data
);
2075 static int rtl_start_rx(struct r8152
*tp
)
2079 napi_disable(&tp
->napi
);
2080 INIT_LIST_HEAD(&tp
->rx_done
);
2081 for (i
= 0; i
< RTL8152_MAX_RX
; i
++) {
2082 INIT_LIST_HEAD(&tp
->rx_info
[i
].list
);
2083 ret
= r8152_submit_rx(tp
, &tp
->rx_info
[i
], GFP_KERNEL
);
2087 napi_enable(&tp
->napi
);
2089 if (ret
&& ++i
< RTL8152_MAX_RX
) {
2090 struct list_head rx_queue
;
2091 unsigned long flags
;
2093 INIT_LIST_HEAD(&rx_queue
);
2096 struct rx_agg
*agg
= &tp
->rx_info
[i
++];
2097 struct urb
*urb
= agg
->urb
;
2099 urb
->actual_length
= 0;
2100 list_add_tail(&agg
->list
, &rx_queue
);
2101 } while (i
< RTL8152_MAX_RX
);
2103 spin_lock_irqsave(&tp
->rx_lock
, flags
);
2104 list_splice_tail(&rx_queue
, &tp
->rx_done
);
2105 spin_unlock_irqrestore(&tp
->rx_lock
, flags
);
2111 static int rtl_stop_rx(struct r8152
*tp
)
2115 for (i
= 0; i
< RTL8152_MAX_RX
; i
++)
2116 usb_kill_urb(tp
->rx_info
[i
].urb
);
2118 while (!skb_queue_empty(&tp
->rx_queue
))
2119 dev_kfree_skb(__skb_dequeue(&tp
->rx_queue
));
2124 static int rtl_enable(struct r8152
*tp
)
2128 r8152b_reset_packet_filter(tp
);
2130 ocp_data
= ocp_read_byte(tp
, MCU_TYPE_PLA
, PLA_CR
);
2131 ocp_data
|= CR_RE
| CR_TE
;
2132 ocp_write_byte(tp
, MCU_TYPE_PLA
, PLA_CR
, ocp_data
);
2134 rxdy_gated_en(tp
, false);
2139 static int rtl8152_enable(struct r8152
*tp
)
2141 if (test_bit(RTL8152_UNPLUG
, &tp
->flags
))
2145 rtl_set_eee_plus(tp
);
2147 return rtl_enable(tp
);
2150 static void r8153_set_rx_early_timeout(struct r8152
*tp
)
2152 u32 ocp_data
= tp
->coalesce
/ 8;
2154 ocp_write_word(tp
, MCU_TYPE_USB
, USB_RX_EARLY_TIMEOUT
, ocp_data
);
2157 static void r8153_set_rx_early_size(struct r8152
*tp
)
2159 u32 mtu
= tp
->netdev
->mtu
;
2160 u32 ocp_data
= (agg_buf_sz
- mtu
- VLAN_ETH_HLEN
- VLAN_HLEN
) / 4;
2162 ocp_write_word(tp
, MCU_TYPE_USB
, USB_RX_EARLY_SIZE
, ocp_data
);
2165 static int rtl8153_enable(struct r8152
*tp
)
2167 if (test_bit(RTL8152_UNPLUG
, &tp
->flags
))
2171 rtl_set_eee_plus(tp
);
2172 r8153_set_rx_early_timeout(tp
);
2173 r8153_set_rx_early_size(tp
);
2175 return rtl_enable(tp
);
2178 static void rtl_disable(struct r8152
*tp
)
2183 if (test_bit(RTL8152_UNPLUG
, &tp
->flags
)) {
2184 rtl_drop_queued_tx(tp
);
2188 ocp_data
= ocp_read_dword(tp
, MCU_TYPE_PLA
, PLA_RCR
);
2189 ocp_data
&= ~RCR_ACPT_ALL
;
2190 ocp_write_dword(tp
, MCU_TYPE_PLA
, PLA_RCR
, ocp_data
);
2192 rtl_drop_queued_tx(tp
);
2194 for (i
= 0; i
< RTL8152_MAX_TX
; i
++)
2195 usb_kill_urb(tp
->tx_info
[i
].urb
);
2197 rxdy_gated_en(tp
, true);
2199 for (i
= 0; i
< 1000; i
++) {
2200 ocp_data
= ocp_read_byte(tp
, MCU_TYPE_PLA
, PLA_OOB_CTRL
);
2201 if ((ocp_data
& FIFO_EMPTY
) == FIFO_EMPTY
)
2203 usleep_range(1000, 2000);
2206 for (i
= 0; i
< 1000; i
++) {
2207 if (ocp_read_word(tp
, MCU_TYPE_PLA
, PLA_TCR0
) & TCR0_TX_EMPTY
)
2209 usleep_range(1000, 2000);
2214 rtl8152_nic_reset(tp
);
2217 static void r8152_power_cut_en(struct r8152
*tp
, bool enable
)
2221 ocp_data
= ocp_read_word(tp
, MCU_TYPE_USB
, USB_UPS_CTRL
);
2223 ocp_data
|= POWER_CUT
;
2225 ocp_data
&= ~POWER_CUT
;
2226 ocp_write_word(tp
, MCU_TYPE_USB
, USB_UPS_CTRL
, ocp_data
);
2228 ocp_data
= ocp_read_word(tp
, MCU_TYPE_USB
, USB_PM_CTRL_STATUS
);
2229 ocp_data
&= ~RESUME_INDICATE
;
2230 ocp_write_word(tp
, MCU_TYPE_USB
, USB_PM_CTRL_STATUS
, ocp_data
);
2233 static void rtl_rx_vlan_en(struct r8152
*tp
, bool enable
)
2237 ocp_data
= ocp_read_word(tp
, MCU_TYPE_PLA
, PLA_CPCR
);
2239 ocp_data
|= CPCR_RX_VLAN
;
2241 ocp_data
&= ~CPCR_RX_VLAN
;
2242 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_CPCR
, ocp_data
);
2245 static int rtl8152_set_features(struct net_device
*dev
,
2246 netdev_features_t features
)
2248 netdev_features_t changed
= features
^ dev
->features
;
2249 struct r8152
*tp
= netdev_priv(dev
);
2252 ret
= usb_autopm_get_interface(tp
->intf
);
2256 mutex_lock(&tp
->control
);
2258 if (changed
& NETIF_F_HW_VLAN_CTAG_RX
) {
2259 if (features
& NETIF_F_HW_VLAN_CTAG_RX
)
2260 rtl_rx_vlan_en(tp
, true);
2262 rtl_rx_vlan_en(tp
, false);
2265 mutex_unlock(&tp
->control
);
2267 usb_autopm_put_interface(tp
->intf
);
2273 #define WAKE_ANY (WAKE_PHY | WAKE_MAGIC | WAKE_UCAST | WAKE_BCAST | WAKE_MCAST)
2275 static u32
__rtl_get_wol(struct r8152
*tp
)
2280 ocp_data
= ocp_read_byte(tp
, MCU_TYPE_PLA
, PLA_CONFIG5
);
2281 if (!(ocp_data
& LAN_WAKE_EN
))
2284 ocp_data
= ocp_read_word(tp
, MCU_TYPE_PLA
, PLA_CONFIG34
);
2285 if (ocp_data
& LINK_ON_WAKE_EN
)
2286 wolopts
|= WAKE_PHY
;
2288 ocp_data
= ocp_read_word(tp
, MCU_TYPE_PLA
, PLA_CONFIG5
);
2289 if (ocp_data
& UWF_EN
)
2290 wolopts
|= WAKE_UCAST
;
2291 if (ocp_data
& BWF_EN
)
2292 wolopts
|= WAKE_BCAST
;
2293 if (ocp_data
& MWF_EN
)
2294 wolopts
|= WAKE_MCAST
;
2296 ocp_data
= ocp_read_word(tp
, MCU_TYPE_PLA
, PLA_CFG_WOL
);
2297 if (ocp_data
& MAGIC_EN
)
2298 wolopts
|= WAKE_MAGIC
;
2303 static void __rtl_set_wol(struct r8152
*tp
, u32 wolopts
)
2307 ocp_write_byte(tp
, MCU_TYPE_PLA
, PLA_CRWECR
, CRWECR_CONFIG
);
2309 ocp_data
= ocp_read_word(tp
, MCU_TYPE_PLA
, PLA_CONFIG34
);
2310 ocp_data
&= ~LINK_ON_WAKE_EN
;
2311 if (wolopts
& WAKE_PHY
)
2312 ocp_data
|= LINK_ON_WAKE_EN
;
2313 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_CONFIG34
, ocp_data
);
2315 ocp_data
= ocp_read_word(tp
, MCU_TYPE_PLA
, PLA_CONFIG5
);
2316 ocp_data
&= ~(UWF_EN
| BWF_EN
| MWF_EN
| LAN_WAKE_EN
);
2317 if (wolopts
& WAKE_UCAST
)
2319 if (wolopts
& WAKE_BCAST
)
2321 if (wolopts
& WAKE_MCAST
)
2323 if (wolopts
& WAKE_ANY
)
2324 ocp_data
|= LAN_WAKE_EN
;
2325 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_CONFIG5
, ocp_data
);
2327 ocp_write_byte(tp
, MCU_TYPE_PLA
, PLA_CRWECR
, CRWECR_NORAML
);
2329 ocp_data
= ocp_read_word(tp
, MCU_TYPE_PLA
, PLA_CFG_WOL
);
2330 ocp_data
&= ~MAGIC_EN
;
2331 if (wolopts
& WAKE_MAGIC
)
2332 ocp_data
|= MAGIC_EN
;
2333 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_CFG_WOL
, ocp_data
);
2335 if (wolopts
& WAKE_ANY
)
2336 device_set_wakeup_enable(&tp
->udev
->dev
, true);
2338 device_set_wakeup_enable(&tp
->udev
->dev
, false);
2341 static void rtl_runtime_suspend_enable(struct r8152
*tp
, bool enable
)
2346 __rtl_set_wol(tp
, WAKE_ANY
);
2348 ocp_write_byte(tp
, MCU_TYPE_PLA
, PLA_CRWECR
, CRWECR_CONFIG
);
2350 ocp_data
= ocp_read_word(tp
, MCU_TYPE_PLA
, PLA_CONFIG34
);
2351 ocp_data
|= LINK_OFF_WAKE_EN
;
2352 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_CONFIG34
, ocp_data
);
2354 ocp_write_byte(tp
, MCU_TYPE_PLA
, PLA_CRWECR
, CRWECR_NORAML
);
2356 __rtl_set_wol(tp
, tp
->saved_wolopts
);
2360 static void rtl_phy_reset(struct r8152
*tp
)
2365 clear_bit(PHY_RESET
, &tp
->flags
);
2367 data
= r8152_mdio_read(tp
, MII_BMCR
);
2369 /* don't reset again before the previous one complete */
2370 if (data
& BMCR_RESET
)
2374 r8152_mdio_write(tp
, MII_BMCR
, data
);
2376 for (i
= 0; i
< 50; i
++) {
2378 if ((r8152_mdio_read(tp
, MII_BMCR
) & BMCR_RESET
) == 0)
2383 static void r8153_teredo_off(struct r8152
*tp
)
2387 ocp_data
= ocp_read_word(tp
, MCU_TYPE_PLA
, PLA_TEREDO_CFG
);
2388 ocp_data
&= ~(TEREDO_SEL
| TEREDO_RS_EVENT_MASK
| OOB_TEREDO_EN
);
2389 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_TEREDO_CFG
, ocp_data
);
2391 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_WDT6_CTRL
, WDT6_SET_MODE
);
2392 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_REALWOW_TIMER
, 0);
2393 ocp_write_dword(tp
, MCU_TYPE_PLA
, PLA_TEREDO_TIMER
, 0);
2396 static void r8152b_disable_aldps(struct r8152
*tp
)
2398 ocp_reg_write(tp
, OCP_ALDPS_CONFIG
, ENPDNPS
| LINKENA
| DIS_SDSAVE
);
2402 static inline void r8152b_enable_aldps(struct r8152
*tp
)
2404 ocp_reg_write(tp
, OCP_ALDPS_CONFIG
, ENPWRSAVE
| ENPDNPS
|
2405 LINKENA
| DIS_SDSAVE
);
2408 static void rtl8152_disable(struct r8152
*tp
)
2410 r8152b_disable_aldps(tp
);
2412 r8152b_enable_aldps(tp
);
2415 static void r8152b_hw_phy_cfg(struct r8152
*tp
)
2419 data
= r8152_mdio_read(tp
, MII_BMCR
);
2420 if (data
& BMCR_PDOWN
) {
2421 data
&= ~BMCR_PDOWN
;
2422 r8152_mdio_write(tp
, MII_BMCR
, data
);
2425 set_bit(PHY_RESET
, &tp
->flags
);
2428 static void r8152b_exit_oob(struct r8152
*tp
)
2433 ocp_data
= ocp_read_dword(tp
, MCU_TYPE_PLA
, PLA_RCR
);
2434 ocp_data
&= ~RCR_ACPT_ALL
;
2435 ocp_write_dword(tp
, MCU_TYPE_PLA
, PLA_RCR
, ocp_data
);
2437 rxdy_gated_en(tp
, true);
2438 r8153_teredo_off(tp
);
2439 r8152b_hw_phy_cfg(tp
);
2441 ocp_write_byte(tp
, MCU_TYPE_PLA
, PLA_CRWECR
, CRWECR_NORAML
);
2442 ocp_write_byte(tp
, MCU_TYPE_PLA
, PLA_CR
, 0x00);
2444 ocp_data
= ocp_read_byte(tp
, MCU_TYPE_PLA
, PLA_OOB_CTRL
);
2445 ocp_data
&= ~NOW_IS_OOB
;
2446 ocp_write_byte(tp
, MCU_TYPE_PLA
, PLA_OOB_CTRL
, ocp_data
);
2448 ocp_data
= ocp_read_word(tp
, MCU_TYPE_PLA
, PLA_SFF_STS_7
);
2449 ocp_data
&= ~MCU_BORW_EN
;
2450 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_SFF_STS_7
, ocp_data
);
2452 for (i
= 0; i
< 1000; i
++) {
2453 ocp_data
= ocp_read_byte(tp
, MCU_TYPE_PLA
, PLA_OOB_CTRL
);
2454 if (ocp_data
& LINK_LIST_READY
)
2456 usleep_range(1000, 2000);
2459 ocp_data
= ocp_read_word(tp
, MCU_TYPE_PLA
, PLA_SFF_STS_7
);
2460 ocp_data
|= RE_INIT_LL
;
2461 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_SFF_STS_7
, ocp_data
);
2463 for (i
= 0; i
< 1000; i
++) {
2464 ocp_data
= ocp_read_byte(tp
, MCU_TYPE_PLA
, PLA_OOB_CTRL
);
2465 if (ocp_data
& LINK_LIST_READY
)
2467 usleep_range(1000, 2000);
2470 rtl8152_nic_reset(tp
);
2472 /* rx share fifo credit full threshold */
2473 ocp_write_dword(tp
, MCU_TYPE_PLA
, PLA_RXFIFO_CTRL0
, RXFIFO_THR1_NORMAL
);
2475 if (tp
->udev
->speed
== USB_SPEED_FULL
||
2476 tp
->udev
->speed
== USB_SPEED_LOW
) {
2477 /* rx share fifo credit near full threshold */
2478 ocp_write_dword(tp
, MCU_TYPE_PLA
, PLA_RXFIFO_CTRL1
,
2480 ocp_write_dword(tp
, MCU_TYPE_PLA
, PLA_RXFIFO_CTRL2
,
2483 /* rx share fifo credit near full threshold */
2484 ocp_write_dword(tp
, MCU_TYPE_PLA
, PLA_RXFIFO_CTRL1
,
2486 ocp_write_dword(tp
, MCU_TYPE_PLA
, PLA_RXFIFO_CTRL2
,
2490 /* TX share fifo free credit full threshold */
2491 ocp_write_dword(tp
, MCU_TYPE_PLA
, PLA_TXFIFO_CTRL
, TXFIFO_THR_NORMAL
);
2493 ocp_write_byte(tp
, MCU_TYPE_USB
, USB_TX_AGG
, TX_AGG_MAX_THRESHOLD
);
2494 ocp_write_dword(tp
, MCU_TYPE_USB
, USB_RX_BUF_TH
, RX_THR_HIGH
);
2495 ocp_write_dword(tp
, MCU_TYPE_USB
, USB_TX_DMA
,
2496 TEST_MODE_DISABLE
| TX_SIZE_ADJUST1
);
2498 rtl_rx_vlan_en(tp
, tp
->netdev
->features
& NETIF_F_HW_VLAN_CTAG_RX
);
2500 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_RMS
, RTL8152_RMS
);
2502 ocp_data
= ocp_read_word(tp
, MCU_TYPE_PLA
, PLA_TCR0
);
2503 ocp_data
|= TCR0_AUTO_FIFO
;
2504 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_TCR0
, ocp_data
);
2507 static void r8152b_enter_oob(struct r8152
*tp
)
2512 ocp_data
= ocp_read_byte(tp
, MCU_TYPE_PLA
, PLA_OOB_CTRL
);
2513 ocp_data
&= ~NOW_IS_OOB
;
2514 ocp_write_byte(tp
, MCU_TYPE_PLA
, PLA_OOB_CTRL
, ocp_data
);
2516 ocp_write_dword(tp
, MCU_TYPE_PLA
, PLA_RXFIFO_CTRL0
, RXFIFO_THR1_OOB
);
2517 ocp_write_dword(tp
, MCU_TYPE_PLA
, PLA_RXFIFO_CTRL1
, RXFIFO_THR2_OOB
);
2518 ocp_write_dword(tp
, MCU_TYPE_PLA
, PLA_RXFIFO_CTRL2
, RXFIFO_THR3_OOB
);
2522 for (i
= 0; i
< 1000; i
++) {
2523 ocp_data
= ocp_read_byte(tp
, MCU_TYPE_PLA
, PLA_OOB_CTRL
);
2524 if (ocp_data
& LINK_LIST_READY
)
2526 usleep_range(1000, 2000);
2529 ocp_data
= ocp_read_word(tp
, MCU_TYPE_PLA
, PLA_SFF_STS_7
);
2530 ocp_data
|= RE_INIT_LL
;
2531 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_SFF_STS_7
, ocp_data
);
2533 for (i
= 0; i
< 1000; i
++) {
2534 ocp_data
= ocp_read_byte(tp
, MCU_TYPE_PLA
, PLA_OOB_CTRL
);
2535 if (ocp_data
& LINK_LIST_READY
)
2537 usleep_range(1000, 2000);
2540 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_RMS
, RTL8152_RMS
);
2542 rtl_rx_vlan_en(tp
, true);
2544 ocp_data
= ocp_read_word(tp
, MCU_TYPE_PLA
, PAL_BDC_CR
);
2545 ocp_data
|= ALDPS_PROXY_MODE
;
2546 ocp_write_word(tp
, MCU_TYPE_PLA
, PAL_BDC_CR
, ocp_data
);
2548 ocp_data
= ocp_read_byte(tp
, MCU_TYPE_PLA
, PLA_OOB_CTRL
);
2549 ocp_data
|= NOW_IS_OOB
| DIS_MCU_CLROOB
;
2550 ocp_write_byte(tp
, MCU_TYPE_PLA
, PLA_OOB_CTRL
, ocp_data
);
2552 rxdy_gated_en(tp
, false);
2554 ocp_data
= ocp_read_dword(tp
, MCU_TYPE_PLA
, PLA_RCR
);
2555 ocp_data
|= RCR_APM
| RCR_AM
| RCR_AB
;
2556 ocp_write_dword(tp
, MCU_TYPE_PLA
, PLA_RCR
, ocp_data
);
2559 static void r8153_hw_phy_cfg(struct r8152
*tp
)
2564 if (tp
->version
== RTL_VER_03
|| tp
->version
== RTL_VER_04
||
2565 tp
->version
== RTL_VER_05
)
2566 ocp_reg_write(tp
, OCP_ADC_CFG
, CKADSEL_L
| ADC_EN
| EN_EMI_L
);
2568 data
= r8152_mdio_read(tp
, MII_BMCR
);
2569 if (data
& BMCR_PDOWN
) {
2570 data
&= ~BMCR_PDOWN
;
2571 r8152_mdio_write(tp
, MII_BMCR
, data
);
2574 if (tp
->version
== RTL_VER_03
) {
2575 data
= ocp_reg_read(tp
, OCP_EEE_CFG
);
2576 data
&= ~CTAP_SHORT_EN
;
2577 ocp_reg_write(tp
, OCP_EEE_CFG
, data
);
2580 data
= ocp_reg_read(tp
, OCP_POWER_CFG
);
2581 data
|= EEE_CLKDIV_EN
;
2582 ocp_reg_write(tp
, OCP_POWER_CFG
, data
);
2584 data
= ocp_reg_read(tp
, OCP_DOWN_SPEED
);
2585 data
|= EN_10M_BGOFF
;
2586 ocp_reg_write(tp
, OCP_DOWN_SPEED
, data
);
2587 data
= ocp_reg_read(tp
, OCP_POWER_CFG
);
2588 data
|= EN_10M_PLLOFF
;
2589 ocp_reg_write(tp
, OCP_POWER_CFG
, data
);
2590 sram_write(tp
, SRAM_IMPEDANCE
, 0x0b13);
2592 ocp_data
= ocp_read_word(tp
, MCU_TYPE_PLA
, PLA_PHY_PWR
);
2593 ocp_data
|= PFM_PWM_SWITCH
;
2594 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_PHY_PWR
, ocp_data
);
2596 /* Enable LPF corner auto tune */
2597 sram_write(tp
, SRAM_LPF_CFG
, 0xf70f);
2599 /* Adjust 10M Amplitude */
2600 sram_write(tp
, SRAM_10M_AMP1
, 0x00af);
2601 sram_write(tp
, SRAM_10M_AMP2
, 0x0208);
2603 set_bit(PHY_RESET
, &tp
->flags
);
2606 static void r8153_u1u2en(struct r8152
*tp
, bool enable
)
2611 memset(u1u2
, 0xff, sizeof(u1u2
));
2613 memset(u1u2
, 0x00, sizeof(u1u2
));
2615 usb_ocp_write(tp
, USB_TOLERANCE
, BYTE_EN_SIX_BYTES
, sizeof(u1u2
), u1u2
);
2618 static void r8153_u2p3en(struct r8152
*tp
, bool enable
)
2622 ocp_data
= ocp_read_word(tp
, MCU_TYPE_USB
, USB_U2P3_CTRL
);
2624 ocp_data
|= U2P3_ENABLE
;
2626 ocp_data
&= ~U2P3_ENABLE
;
2627 ocp_write_word(tp
, MCU_TYPE_USB
, USB_U2P3_CTRL
, ocp_data
);
2630 static void r8153_power_cut_en(struct r8152
*tp
, bool enable
)
2634 ocp_data
= ocp_read_word(tp
, MCU_TYPE_USB
, USB_POWER_CUT
);
2636 ocp_data
|= PWR_EN
| PHASE2_EN
;
2638 ocp_data
&= ~(PWR_EN
| PHASE2_EN
);
2639 ocp_write_word(tp
, MCU_TYPE_USB
, USB_POWER_CUT
, ocp_data
);
2641 ocp_data
= ocp_read_word(tp
, MCU_TYPE_USB
, USB_MISC_0
);
2642 ocp_data
&= ~PCUT_STATUS
;
2643 ocp_write_word(tp
, MCU_TYPE_USB
, USB_MISC_0
, ocp_data
);
2646 static void r8153_first_init(struct r8152
*tp
)
2651 rxdy_gated_en(tp
, true);
2652 r8153_teredo_off(tp
);
2654 ocp_data
= ocp_read_dword(tp
, MCU_TYPE_PLA
, PLA_RCR
);
2655 ocp_data
&= ~RCR_ACPT_ALL
;
2656 ocp_write_dword(tp
, MCU_TYPE_PLA
, PLA_RCR
, ocp_data
);
2658 r8153_hw_phy_cfg(tp
);
2660 rtl8152_nic_reset(tp
);
2662 ocp_data
= ocp_read_byte(tp
, MCU_TYPE_PLA
, PLA_OOB_CTRL
);
2663 ocp_data
&= ~NOW_IS_OOB
;
2664 ocp_write_byte(tp
, MCU_TYPE_PLA
, PLA_OOB_CTRL
, ocp_data
);
2666 ocp_data
= ocp_read_word(tp
, MCU_TYPE_PLA
, PLA_SFF_STS_7
);
2667 ocp_data
&= ~MCU_BORW_EN
;
2668 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_SFF_STS_7
, ocp_data
);
2670 for (i
= 0; i
< 1000; i
++) {
2671 ocp_data
= ocp_read_byte(tp
, MCU_TYPE_PLA
, PLA_OOB_CTRL
);
2672 if (ocp_data
& LINK_LIST_READY
)
2674 usleep_range(1000, 2000);
2677 ocp_data
= ocp_read_word(tp
, MCU_TYPE_PLA
, PLA_SFF_STS_7
);
2678 ocp_data
|= RE_INIT_LL
;
2679 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_SFF_STS_7
, ocp_data
);
2681 for (i
= 0; i
< 1000; i
++) {
2682 ocp_data
= ocp_read_byte(tp
, MCU_TYPE_PLA
, PLA_OOB_CTRL
);
2683 if (ocp_data
& LINK_LIST_READY
)
2685 usleep_range(1000, 2000);
2688 rtl_rx_vlan_en(tp
, tp
->netdev
->features
& NETIF_F_HW_VLAN_CTAG_RX
);
2690 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_RMS
, RTL8153_RMS
);
2691 ocp_write_byte(tp
, MCU_TYPE_PLA
, PLA_MTPS
, MTPS_JUMBO
);
2693 ocp_data
= ocp_read_word(tp
, MCU_TYPE_PLA
, PLA_TCR0
);
2694 ocp_data
|= TCR0_AUTO_FIFO
;
2695 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_TCR0
, ocp_data
);
2697 rtl8152_nic_reset(tp
);
2699 /* rx share fifo credit full threshold */
2700 ocp_write_dword(tp
, MCU_TYPE_PLA
, PLA_RXFIFO_CTRL0
, RXFIFO_THR1_NORMAL
);
2701 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_RXFIFO_CTRL1
, RXFIFO_THR2_NORMAL
);
2702 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_RXFIFO_CTRL2
, RXFIFO_THR3_NORMAL
);
2703 /* TX share fifo free credit full threshold */
2704 ocp_write_dword(tp
, MCU_TYPE_PLA
, PLA_TXFIFO_CTRL
, TXFIFO_THR_NORMAL2
);
2706 /* rx aggregation */
2707 ocp_data
= ocp_read_word(tp
, MCU_TYPE_USB
, USB_USB_CTRL
);
2708 ocp_data
&= ~RX_AGG_DISABLE
;
2709 ocp_write_word(tp
, MCU_TYPE_USB
, USB_USB_CTRL
, ocp_data
);
2712 static void r8153_enter_oob(struct r8152
*tp
)
2717 ocp_data
= ocp_read_byte(tp
, MCU_TYPE_PLA
, PLA_OOB_CTRL
);
2718 ocp_data
&= ~NOW_IS_OOB
;
2719 ocp_write_byte(tp
, MCU_TYPE_PLA
, PLA_OOB_CTRL
, ocp_data
);
2723 for (i
= 0; i
< 1000; i
++) {
2724 ocp_data
= ocp_read_byte(tp
, MCU_TYPE_PLA
, PLA_OOB_CTRL
);
2725 if (ocp_data
& LINK_LIST_READY
)
2727 usleep_range(1000, 2000);
2730 ocp_data
= ocp_read_word(tp
, MCU_TYPE_PLA
, PLA_SFF_STS_7
);
2731 ocp_data
|= RE_INIT_LL
;
2732 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_SFF_STS_7
, ocp_data
);
2734 for (i
= 0; i
< 1000; i
++) {
2735 ocp_data
= ocp_read_byte(tp
, MCU_TYPE_PLA
, PLA_OOB_CTRL
);
2736 if (ocp_data
& LINK_LIST_READY
)
2738 usleep_range(1000, 2000);
2741 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_RMS
, RTL8153_RMS
);
2743 ocp_data
= ocp_read_word(tp
, MCU_TYPE_PLA
, PLA_TEREDO_CFG
);
2744 ocp_data
&= ~TEREDO_WAKE_MASK
;
2745 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_TEREDO_CFG
, ocp_data
);
2747 rtl_rx_vlan_en(tp
, true);
2749 ocp_data
= ocp_read_word(tp
, MCU_TYPE_PLA
, PAL_BDC_CR
);
2750 ocp_data
|= ALDPS_PROXY_MODE
;
2751 ocp_write_word(tp
, MCU_TYPE_PLA
, PAL_BDC_CR
, ocp_data
);
2753 ocp_data
= ocp_read_byte(tp
, MCU_TYPE_PLA
, PLA_OOB_CTRL
);
2754 ocp_data
|= NOW_IS_OOB
| DIS_MCU_CLROOB
;
2755 ocp_write_byte(tp
, MCU_TYPE_PLA
, PLA_OOB_CTRL
, ocp_data
);
2757 rxdy_gated_en(tp
, false);
2759 ocp_data
= ocp_read_dword(tp
, MCU_TYPE_PLA
, PLA_RCR
);
2760 ocp_data
|= RCR_APM
| RCR_AM
| RCR_AB
;
2761 ocp_write_dword(tp
, MCU_TYPE_PLA
, PLA_RCR
, ocp_data
);
2764 static void r8153_disable_aldps(struct r8152
*tp
)
2768 data
= ocp_reg_read(tp
, OCP_POWER_CFG
);
2770 ocp_reg_write(tp
, OCP_POWER_CFG
, data
);
2774 static void r8153_enable_aldps(struct r8152
*tp
)
2778 data
= ocp_reg_read(tp
, OCP_POWER_CFG
);
2780 ocp_reg_write(tp
, OCP_POWER_CFG
, data
);
2783 static void rtl8153_disable(struct r8152
*tp
)
2785 r8153_disable_aldps(tp
);
2787 r8153_enable_aldps(tp
);
2790 static int rtl8152_set_speed(struct r8152
*tp
, u8 autoneg
, u16 speed
, u8 duplex
)
2792 u16 bmcr
, anar
, gbcr
;
2795 cancel_delayed_work_sync(&tp
->schedule
);
2796 anar
= r8152_mdio_read(tp
, MII_ADVERTISE
);
2797 anar
&= ~(ADVERTISE_10HALF
| ADVERTISE_10FULL
|
2798 ADVERTISE_100HALF
| ADVERTISE_100FULL
);
2799 if (tp
->mii
.supports_gmii
) {
2800 gbcr
= r8152_mdio_read(tp
, MII_CTRL1000
);
2801 gbcr
&= ~(ADVERTISE_1000FULL
| ADVERTISE_1000HALF
);
2806 if (autoneg
== AUTONEG_DISABLE
) {
2807 if (speed
== SPEED_10
) {
2809 anar
|= ADVERTISE_10HALF
| ADVERTISE_10FULL
;
2810 } else if (speed
== SPEED_100
) {
2811 bmcr
= BMCR_SPEED100
;
2812 anar
|= ADVERTISE_100HALF
| ADVERTISE_100FULL
;
2813 } else if (speed
== SPEED_1000
&& tp
->mii
.supports_gmii
) {
2814 bmcr
= BMCR_SPEED1000
;
2815 gbcr
|= ADVERTISE_1000FULL
| ADVERTISE_1000HALF
;
2821 if (duplex
== DUPLEX_FULL
)
2822 bmcr
|= BMCR_FULLDPLX
;
2824 if (speed
== SPEED_10
) {
2825 if (duplex
== DUPLEX_FULL
)
2826 anar
|= ADVERTISE_10HALF
| ADVERTISE_10FULL
;
2828 anar
|= ADVERTISE_10HALF
;
2829 } else if (speed
== SPEED_100
) {
2830 if (duplex
== DUPLEX_FULL
) {
2831 anar
|= ADVERTISE_10HALF
| ADVERTISE_10FULL
;
2832 anar
|= ADVERTISE_100HALF
| ADVERTISE_100FULL
;
2834 anar
|= ADVERTISE_10HALF
;
2835 anar
|= ADVERTISE_100HALF
;
2837 } else if (speed
== SPEED_1000
&& tp
->mii
.supports_gmii
) {
2838 if (duplex
== DUPLEX_FULL
) {
2839 anar
|= ADVERTISE_10HALF
| ADVERTISE_10FULL
;
2840 anar
|= ADVERTISE_100HALF
| ADVERTISE_100FULL
;
2841 gbcr
|= ADVERTISE_1000FULL
| ADVERTISE_1000HALF
;
2843 anar
|= ADVERTISE_10HALF
;
2844 anar
|= ADVERTISE_100HALF
;
2845 gbcr
|= ADVERTISE_1000HALF
;
2852 bmcr
= BMCR_ANENABLE
| BMCR_ANRESTART
;
2855 if (test_bit(PHY_RESET
, &tp
->flags
))
2858 if (tp
->mii
.supports_gmii
)
2859 r8152_mdio_write(tp
, MII_CTRL1000
, gbcr
);
2861 r8152_mdio_write(tp
, MII_ADVERTISE
, anar
);
2862 r8152_mdio_write(tp
, MII_BMCR
, bmcr
);
2864 if (test_bit(PHY_RESET
, &tp
->flags
)) {
2867 clear_bit(PHY_RESET
, &tp
->flags
);
2868 for (i
= 0; i
< 50; i
++) {
2870 if ((r8152_mdio_read(tp
, MII_BMCR
) & BMCR_RESET
) == 0)
2880 static void rtl8152_up(struct r8152
*tp
)
2882 if (test_bit(RTL8152_UNPLUG
, &tp
->flags
))
2885 r8152b_disable_aldps(tp
);
2886 r8152b_exit_oob(tp
);
2887 r8152b_enable_aldps(tp
);
2890 static void rtl8152_down(struct r8152
*tp
)
2892 if (test_bit(RTL8152_UNPLUG
, &tp
->flags
)) {
2893 rtl_drop_queued_tx(tp
);
2897 r8152_power_cut_en(tp
, false);
2898 r8152b_disable_aldps(tp
);
2899 r8152b_enter_oob(tp
);
2900 r8152b_enable_aldps(tp
);
2903 static void rtl8153_up(struct r8152
*tp
)
2905 if (test_bit(RTL8152_UNPLUG
, &tp
->flags
))
2908 r8153_disable_aldps(tp
);
2909 r8153_first_init(tp
);
2910 r8153_enable_aldps(tp
);
2913 static void rtl8153_down(struct r8152
*tp
)
2915 if (test_bit(RTL8152_UNPLUG
, &tp
->flags
)) {
2916 rtl_drop_queued_tx(tp
);
2920 r8153_u1u2en(tp
, false);
2921 r8153_power_cut_en(tp
, false);
2922 r8153_disable_aldps(tp
);
2923 r8153_enter_oob(tp
);
2924 r8153_enable_aldps(tp
);
2927 static void set_carrier(struct r8152
*tp
)
2929 struct net_device
*netdev
= tp
->netdev
;
2932 clear_bit(RTL8152_LINK_CHG
, &tp
->flags
);
2933 speed
= rtl8152_get_speed(tp
);
2935 if (speed
& LINK_STATUS
) {
2936 if (!netif_carrier_ok(netdev
)) {
2937 tp
->rtl_ops
.enable(tp
);
2938 set_bit(RTL8152_SET_RX_MODE
, &tp
->flags
);
2939 netif_carrier_on(netdev
);
2943 if (netif_carrier_ok(netdev
)) {
2944 netif_carrier_off(netdev
);
2945 napi_disable(&tp
->napi
);
2946 tp
->rtl_ops
.disable(tp
);
2947 napi_enable(&tp
->napi
);
2952 static void rtl_work_func_t(struct work_struct
*work
)
2954 struct r8152
*tp
= container_of(work
, struct r8152
, schedule
.work
);
2956 /* If the device is unplugged or !netif_running(), the workqueue
2957 * doesn't need to wake the device, and could return directly.
2959 if (test_bit(RTL8152_UNPLUG
, &tp
->flags
) || !netif_running(tp
->netdev
))
2962 if (usb_autopm_get_interface(tp
->intf
) < 0)
2965 if (!test_bit(WORK_ENABLE
, &tp
->flags
))
2968 if (!mutex_trylock(&tp
->control
)) {
2969 schedule_delayed_work(&tp
->schedule
, 0);
2973 if (test_bit(RTL8152_LINK_CHG
, &tp
->flags
))
2976 if (test_bit(RTL8152_SET_RX_MODE
, &tp
->flags
))
2977 _rtl8152_set_rx_mode(tp
->netdev
);
2979 /* don't schedule napi before linking */
2980 if (test_bit(SCHEDULE_NAPI
, &tp
->flags
) &&
2981 netif_carrier_ok(tp
->netdev
)) {
2982 clear_bit(SCHEDULE_NAPI
, &tp
->flags
);
2983 napi_schedule(&tp
->napi
);
2986 if (test_bit(PHY_RESET
, &tp
->flags
))
2989 mutex_unlock(&tp
->control
);
2992 usb_autopm_put_interface(tp
->intf
);
2995 static int rtl8152_open(struct net_device
*netdev
)
2997 struct r8152
*tp
= netdev_priv(netdev
);
3000 res
= alloc_all_mem(tp
);
3004 netif_carrier_off(netdev
);
3006 res
= usb_autopm_get_interface(tp
->intf
);
3012 mutex_lock(&tp
->control
);
3014 /* The WORK_ENABLE may be set when autoresume occurs */
3015 if (test_bit(WORK_ENABLE
, &tp
->flags
)) {
3016 clear_bit(WORK_ENABLE
, &tp
->flags
);
3017 usb_kill_urb(tp
->intr_urb
);
3018 cancel_delayed_work_sync(&tp
->schedule
);
3020 /* disable the tx/rx, if the workqueue has enabled them. */
3021 if (netif_carrier_ok(netdev
))
3022 tp
->rtl_ops
.disable(tp
);
3027 rtl8152_set_speed(tp
, AUTONEG_ENABLE
,
3028 tp
->mii
.supports_gmii
? SPEED_1000
: SPEED_100
,
3030 netif_carrier_off(netdev
);
3031 netif_start_queue(netdev
);
3032 set_bit(WORK_ENABLE
, &tp
->flags
);
3034 res
= usb_submit_urb(tp
->intr_urb
, GFP_KERNEL
);
3037 netif_device_detach(tp
->netdev
);
3038 netif_warn(tp
, ifup
, netdev
, "intr_urb submit failed: %d\n",
3042 napi_enable(&tp
->napi
);
3045 mutex_unlock(&tp
->control
);
3047 usb_autopm_put_interface(tp
->intf
);
3053 static int rtl8152_close(struct net_device
*netdev
)
3055 struct r8152
*tp
= netdev_priv(netdev
);
3058 napi_disable(&tp
->napi
);
3059 clear_bit(WORK_ENABLE
, &tp
->flags
);
3060 usb_kill_urb(tp
->intr_urb
);
3061 cancel_delayed_work_sync(&tp
->schedule
);
3062 netif_stop_queue(netdev
);
3064 res
= usb_autopm_get_interface(tp
->intf
);
3065 if (res
< 0 || test_bit(RTL8152_UNPLUG
, &tp
->flags
)) {
3066 rtl_drop_queued_tx(tp
);
3069 mutex_lock(&tp
->control
);
3071 /* The autosuspend may have been enabled and wouldn't
3072 * be disable when autoresume occurs, because the
3073 * netif_running() would be false.
3075 rtl_runtime_suspend_enable(tp
, false);
3077 tp
->rtl_ops
.down(tp
);
3079 mutex_unlock(&tp
->control
);
3081 usb_autopm_put_interface(tp
->intf
);
3089 static inline void r8152_mmd_indirect(struct r8152
*tp
, u16 dev
, u16 reg
)
3091 ocp_reg_write(tp
, OCP_EEE_AR
, FUN_ADDR
| dev
);
3092 ocp_reg_write(tp
, OCP_EEE_DATA
, reg
);
3093 ocp_reg_write(tp
, OCP_EEE_AR
, FUN_DATA
| dev
);
3096 static u16
r8152_mmd_read(struct r8152
*tp
, u16 dev
, u16 reg
)
3100 r8152_mmd_indirect(tp
, dev
, reg
);
3101 data
= ocp_reg_read(tp
, OCP_EEE_DATA
);
3102 ocp_reg_write(tp
, OCP_EEE_AR
, 0x0000);
3107 static void r8152_mmd_write(struct r8152
*tp
, u16 dev
, u16 reg
, u16 data
)
3109 r8152_mmd_indirect(tp
, dev
, reg
);
3110 ocp_reg_write(tp
, OCP_EEE_DATA
, data
);
3111 ocp_reg_write(tp
, OCP_EEE_AR
, 0x0000);
3114 static void r8152_eee_en(struct r8152
*tp
, bool enable
)
3116 u16 config1
, config2
, config3
;
3119 ocp_data
= ocp_read_word(tp
, MCU_TYPE_PLA
, PLA_EEE_CR
);
3120 config1
= ocp_reg_read(tp
, OCP_EEE_CONFIG1
) & ~sd_rise_time_mask
;
3121 config2
= ocp_reg_read(tp
, OCP_EEE_CONFIG2
);
3122 config3
= ocp_reg_read(tp
, OCP_EEE_CONFIG3
) & ~fast_snr_mask
;
3125 ocp_data
|= EEE_RX_EN
| EEE_TX_EN
;
3126 config1
|= EEE_10_CAP
| EEE_NWAY_EN
| TX_QUIET_EN
| RX_QUIET_EN
;
3127 config1
|= sd_rise_time(1);
3128 config2
|= RG_DACQUIET_EN
| RG_LDVQUIET_EN
;
3129 config3
|= fast_snr(42);
3131 ocp_data
&= ~(EEE_RX_EN
| EEE_TX_EN
);
3132 config1
&= ~(EEE_10_CAP
| EEE_NWAY_EN
| TX_QUIET_EN
|
3134 config1
|= sd_rise_time(7);
3135 config2
&= ~(RG_DACQUIET_EN
| RG_LDVQUIET_EN
);
3136 config3
|= fast_snr(511);
3139 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_EEE_CR
, ocp_data
);
3140 ocp_reg_write(tp
, OCP_EEE_CONFIG1
, config1
);
3141 ocp_reg_write(tp
, OCP_EEE_CONFIG2
, config2
);
3142 ocp_reg_write(tp
, OCP_EEE_CONFIG3
, config3
);
3145 static void r8152b_enable_eee(struct r8152
*tp
)
3147 r8152_eee_en(tp
, true);
3148 r8152_mmd_write(tp
, MDIO_MMD_AN
, MDIO_AN_EEE_ADV
, MDIO_EEE_100TX
);
3151 static void r8153_eee_en(struct r8152
*tp
, bool enable
)
3156 ocp_data
= ocp_read_word(tp
, MCU_TYPE_PLA
, PLA_EEE_CR
);
3157 config
= ocp_reg_read(tp
, OCP_EEE_CFG
);
3160 ocp_data
|= EEE_RX_EN
| EEE_TX_EN
;
3163 ocp_data
&= ~(EEE_RX_EN
| EEE_TX_EN
);
3164 config
&= ~EEE10_EN
;
3167 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_EEE_CR
, ocp_data
);
3168 ocp_reg_write(tp
, OCP_EEE_CFG
, config
);
3171 static void r8153_enable_eee(struct r8152
*tp
)
3173 r8153_eee_en(tp
, true);
3174 ocp_reg_write(tp
, OCP_EEE_ADV
, MDIO_EEE_1000T
| MDIO_EEE_100TX
);
3177 static void r8152b_enable_fc(struct r8152
*tp
)
3181 anar
= r8152_mdio_read(tp
, MII_ADVERTISE
);
3182 anar
|= ADVERTISE_PAUSE_CAP
| ADVERTISE_PAUSE_ASYM
;
3183 r8152_mdio_write(tp
, MII_ADVERTISE
, anar
);
3186 static void rtl_tally_reset(struct r8152
*tp
)
3190 ocp_data
= ocp_read_word(tp
, MCU_TYPE_PLA
, PLA_RSTTALLY
);
3191 ocp_data
|= TALLY_RESET
;
3192 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_RSTTALLY
, ocp_data
);
3195 static void r8152b_init(struct r8152
*tp
)
3199 if (test_bit(RTL8152_UNPLUG
, &tp
->flags
))
3202 r8152b_disable_aldps(tp
);
3204 if (tp
->version
== RTL_VER_01
) {
3205 ocp_data
= ocp_read_word(tp
, MCU_TYPE_PLA
, PLA_LED_FEATURE
);
3206 ocp_data
&= ~LED_MODE_MASK
;
3207 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_LED_FEATURE
, ocp_data
);
3210 r8152_power_cut_en(tp
, false);
3212 ocp_data
= ocp_read_word(tp
, MCU_TYPE_PLA
, PLA_PHY_PWR
);
3213 ocp_data
|= TX_10M_IDLE_EN
| PFM_PWM_SWITCH
;
3214 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_PHY_PWR
, ocp_data
);
3215 ocp_data
= ocp_read_dword(tp
, MCU_TYPE_PLA
, PLA_MAC_PWR_CTRL
);
3216 ocp_data
&= ~MCU_CLK_RATIO_MASK
;
3217 ocp_data
|= MCU_CLK_RATIO
| D3_CLK_GATED_EN
;
3218 ocp_write_dword(tp
, MCU_TYPE_PLA
, PLA_MAC_PWR_CTRL
, ocp_data
);
3219 ocp_data
= GPHY_STS_MSK
| SPEED_DOWN_MSK
|
3220 SPDWN_RXDV_MSK
| SPDWN_LINKCHG_MSK
;
3221 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_GPHY_INTR_IMR
, ocp_data
);
3223 r8152b_enable_eee(tp
);
3224 r8152b_enable_aldps(tp
);
3225 r8152b_enable_fc(tp
);
3226 rtl_tally_reset(tp
);
3228 /* enable rx aggregation */
3229 ocp_data
= ocp_read_word(tp
, MCU_TYPE_USB
, USB_USB_CTRL
);
3230 ocp_data
&= ~RX_AGG_DISABLE
;
3231 ocp_write_word(tp
, MCU_TYPE_USB
, USB_USB_CTRL
, ocp_data
);
3234 static void r8153_init(struct r8152
*tp
)
3239 if (test_bit(RTL8152_UNPLUG
, &tp
->flags
))
3242 r8153_disable_aldps(tp
);
3243 r8153_u1u2en(tp
, false);
3245 for (i
= 0; i
< 500; i
++) {
3246 if (ocp_read_word(tp
, MCU_TYPE_PLA
, PLA_BOOT_CTRL
) &
3252 for (i
= 0; i
< 500; i
++) {
3253 ocp_data
= ocp_reg_read(tp
, OCP_PHY_STATUS
) & PHY_STAT_MASK
;
3254 if (ocp_data
== PHY_STAT_LAN_ON
|| ocp_data
== PHY_STAT_PWRDN
)
3259 r8153_u2p3en(tp
, false);
3261 if (tp
->version
== RTL_VER_04
) {
3262 ocp_data
= ocp_read_word(tp
, MCU_TYPE_USB
, USB_SSPHYLINK2
);
3263 ocp_data
&= ~pwd_dn_scale_mask
;
3264 ocp_data
|= pwd_dn_scale(96);
3265 ocp_write_word(tp
, MCU_TYPE_USB
, USB_SSPHYLINK2
, ocp_data
);
3267 ocp_data
= ocp_read_byte(tp
, MCU_TYPE_USB
, USB_USB2PHY
);
3268 ocp_data
|= USB2PHY_L1
| USB2PHY_SUSPEND
;
3269 ocp_write_byte(tp
, MCU_TYPE_USB
, USB_USB2PHY
, ocp_data
);
3270 } else if (tp
->version
== RTL_VER_05
) {
3271 ocp_data
= ocp_read_byte(tp
, MCU_TYPE_PLA
, PLA_DMY_REG0
);
3272 ocp_data
&= ~ECM_ALDPS
;
3273 ocp_write_byte(tp
, MCU_TYPE_PLA
, PLA_DMY_REG0
, ocp_data
);
3275 ocp_data
= ocp_read_byte(tp
, MCU_TYPE_USB
, USB_CSR_DUMMY1
);
3276 if (ocp_read_word(tp
, MCU_TYPE_USB
, USB_BURST_SIZE
) == 0)
3277 ocp_data
&= ~DYNAMIC_BURST
;
3279 ocp_data
|= DYNAMIC_BURST
;
3280 ocp_write_byte(tp
, MCU_TYPE_USB
, USB_CSR_DUMMY1
, ocp_data
);
3281 } else if (tp
->version
== RTL_VER_06
) {
3282 ocp_data
= ocp_read_byte(tp
, MCU_TYPE_USB
, USB_CSR_DUMMY1
);
3283 if (ocp_read_word(tp
, MCU_TYPE_USB
, USB_BURST_SIZE
) == 0)
3284 ocp_data
&= ~DYNAMIC_BURST
;
3286 ocp_data
|= DYNAMIC_BURST
;
3287 ocp_write_byte(tp
, MCU_TYPE_USB
, USB_CSR_DUMMY1
, ocp_data
);
3290 ocp_data
= ocp_read_byte(tp
, MCU_TYPE_USB
, USB_CSR_DUMMY2
);
3291 ocp_data
|= EP4_FULL_FC
;
3292 ocp_write_byte(tp
, MCU_TYPE_USB
, USB_CSR_DUMMY2
, ocp_data
);
3294 ocp_data
= ocp_read_word(tp
, MCU_TYPE_USB
, USB_WDT11_CTRL
);
3295 ocp_data
&= ~TIMER11_EN
;
3296 ocp_write_word(tp
, MCU_TYPE_USB
, USB_WDT11_CTRL
, ocp_data
);
3298 ocp_data
= ocp_read_word(tp
, MCU_TYPE_PLA
, PLA_LED_FEATURE
);
3299 ocp_data
&= ~LED_MODE_MASK
;
3300 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_LED_FEATURE
, ocp_data
);
3302 ocp_data
= FIFO_EMPTY_1FB
| ROK_EXIT_LPM
;
3303 if (tp
->version
== RTL_VER_04
&& tp
->udev
->speed
!= USB_SPEED_SUPER
)
3304 ocp_data
|= LPM_TIMER_500MS
;
3306 ocp_data
|= LPM_TIMER_500US
;
3307 ocp_write_byte(tp
, MCU_TYPE_USB
, USB_LPM_CTRL
, ocp_data
);
3309 ocp_data
= ocp_read_word(tp
, MCU_TYPE_USB
, USB_AFE_CTRL2
);
3310 ocp_data
&= ~SEN_VAL_MASK
;
3311 ocp_data
|= SEN_VAL_NORMAL
| SEL_RXIDLE
;
3312 ocp_write_word(tp
, MCU_TYPE_USB
, USB_AFE_CTRL2
, ocp_data
);
3314 ocp_write_word(tp
, MCU_TYPE_USB
, USB_CONNECT_TIMER
, 0x0001);
3316 r8153_power_cut_en(tp
, false);
3317 r8153_u1u2en(tp
, true);
3319 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_MAC_PWR_CTRL
, ALDPS_SPDWN_RATIO
);
3320 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_MAC_PWR_CTRL2
, EEE_SPDWN_RATIO
);
3321 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_MAC_PWR_CTRL3
,
3322 PKT_AVAIL_SPDWN_EN
| SUSPEND_SPDWN_EN
|
3323 U1U2_SPDWN_EN
| L1_SPDWN_EN
);
3324 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_MAC_PWR_CTRL4
,
3325 PWRSAVE_SPDWN_EN
| RXDV_SPDWN_EN
| TX10MIDLE_EN
|
3326 TP100_SPDWN_EN
| TP500_SPDWN_EN
| TP1000_SPDWN_EN
|
3329 r8153_enable_eee(tp
);
3330 r8153_enable_aldps(tp
);
3331 r8152b_enable_fc(tp
);
3332 rtl_tally_reset(tp
);
3335 static int rtl8152_suspend(struct usb_interface
*intf
, pm_message_t message
)
3337 struct r8152
*tp
= usb_get_intfdata(intf
);
3338 struct net_device
*netdev
= tp
->netdev
;
3341 mutex_lock(&tp
->control
);
3343 if (PMSG_IS_AUTO(message
)) {
3344 if (netif_running(netdev
) && work_busy(&tp
->schedule
.work
)) {
3349 set_bit(SELECTIVE_SUSPEND
, &tp
->flags
);
3351 netif_device_detach(netdev
);
3354 if (netif_running(netdev
) && test_bit(WORK_ENABLE
, &tp
->flags
)) {
3355 clear_bit(WORK_ENABLE
, &tp
->flags
);
3356 usb_kill_urb(tp
->intr_urb
);
3357 napi_disable(&tp
->napi
);
3358 if (test_bit(SELECTIVE_SUSPEND
, &tp
->flags
)) {
3360 rtl_runtime_suspend_enable(tp
, true);
3362 cancel_delayed_work_sync(&tp
->schedule
);
3363 tp
->rtl_ops
.down(tp
);
3365 napi_enable(&tp
->napi
);
3368 mutex_unlock(&tp
->control
);
3373 static int rtl8152_resume(struct usb_interface
*intf
)
3375 struct r8152
*tp
= usb_get_intfdata(intf
);
3377 mutex_lock(&tp
->control
);
3379 if (!test_bit(SELECTIVE_SUSPEND
, &tp
->flags
)) {
3380 tp
->rtl_ops
.init(tp
);
3381 netif_device_attach(tp
->netdev
);
3384 if (netif_running(tp
->netdev
)) {
3385 if (test_bit(SELECTIVE_SUSPEND
, &tp
->flags
)) {
3386 rtl_runtime_suspend_enable(tp
, false);
3387 clear_bit(SELECTIVE_SUSPEND
, &tp
->flags
);
3388 set_bit(WORK_ENABLE
, &tp
->flags
);
3389 if (netif_carrier_ok(tp
->netdev
))
3393 rtl8152_set_speed(tp
, AUTONEG_ENABLE
,
3394 tp
->mii
.supports_gmii
?
3395 SPEED_1000
: SPEED_100
,
3397 netif_carrier_off(tp
->netdev
);
3398 set_bit(WORK_ENABLE
, &tp
->flags
);
3400 usb_submit_urb(tp
->intr_urb
, GFP_KERNEL
);
3401 } else if (test_bit(SELECTIVE_SUSPEND
, &tp
->flags
)) {
3402 clear_bit(SELECTIVE_SUSPEND
, &tp
->flags
);
3405 mutex_unlock(&tp
->control
);
3410 static void rtl8152_get_wol(struct net_device
*dev
, struct ethtool_wolinfo
*wol
)
3412 struct r8152
*tp
= netdev_priv(dev
);
3414 if (usb_autopm_get_interface(tp
->intf
) < 0)
3417 mutex_lock(&tp
->control
);
3419 wol
->supported
= WAKE_ANY
;
3420 wol
->wolopts
= __rtl_get_wol(tp
);
3422 mutex_unlock(&tp
->control
);
3424 usb_autopm_put_interface(tp
->intf
);
3427 static int rtl8152_set_wol(struct net_device
*dev
, struct ethtool_wolinfo
*wol
)
3429 struct r8152
*tp
= netdev_priv(dev
);
3432 ret
= usb_autopm_get_interface(tp
->intf
);
3436 mutex_lock(&tp
->control
);
3438 __rtl_set_wol(tp
, wol
->wolopts
);
3439 tp
->saved_wolopts
= wol
->wolopts
& WAKE_ANY
;
3441 mutex_unlock(&tp
->control
);
3443 usb_autopm_put_interface(tp
->intf
);
3449 static u32
rtl8152_get_msglevel(struct net_device
*dev
)
3451 struct r8152
*tp
= netdev_priv(dev
);
3453 return tp
->msg_enable
;
3456 static void rtl8152_set_msglevel(struct net_device
*dev
, u32 value
)
3458 struct r8152
*tp
= netdev_priv(dev
);
3460 tp
->msg_enable
= value
;
3463 static void rtl8152_get_drvinfo(struct net_device
*netdev
,
3464 struct ethtool_drvinfo
*info
)
3466 struct r8152
*tp
= netdev_priv(netdev
);
3468 strlcpy(info
->driver
, MODULENAME
, sizeof(info
->driver
));
3469 strlcpy(info
->version
, DRIVER_VERSION
, sizeof(info
->version
));
3470 usb_make_path(tp
->udev
, info
->bus_info
, sizeof(info
->bus_info
));
3474 int rtl8152_get_settings(struct net_device
*netdev
, struct ethtool_cmd
*cmd
)
3476 struct r8152
*tp
= netdev_priv(netdev
);
3479 if (!tp
->mii
.mdio_read
)
3482 ret
= usb_autopm_get_interface(tp
->intf
);
3486 mutex_lock(&tp
->control
);
3488 ret
= mii_ethtool_gset(&tp
->mii
, cmd
);
3490 mutex_unlock(&tp
->control
);
3492 usb_autopm_put_interface(tp
->intf
);
3498 static int rtl8152_set_settings(struct net_device
*dev
, struct ethtool_cmd
*cmd
)
3500 struct r8152
*tp
= netdev_priv(dev
);
3503 ret
= usb_autopm_get_interface(tp
->intf
);
3507 mutex_lock(&tp
->control
);
3509 ret
= rtl8152_set_speed(tp
, cmd
->autoneg
, cmd
->speed
, cmd
->duplex
);
3511 mutex_unlock(&tp
->control
);
3513 usb_autopm_put_interface(tp
->intf
);
3519 static const char rtl8152_gstrings
[][ETH_GSTRING_LEN
] = {
3526 "tx_single_collisions",
3527 "tx_multi_collisions",
3535 static int rtl8152_get_sset_count(struct net_device
*dev
, int sset
)
3539 return ARRAY_SIZE(rtl8152_gstrings
);
3545 static void rtl8152_get_ethtool_stats(struct net_device
*dev
,
3546 struct ethtool_stats
*stats
, u64
*data
)
3548 struct r8152
*tp
= netdev_priv(dev
);
3549 struct tally_counter tally
;
3551 if (usb_autopm_get_interface(tp
->intf
) < 0)
3554 generic_ocp_read(tp
, PLA_TALLYCNT
, sizeof(tally
), &tally
, MCU_TYPE_PLA
);
3556 usb_autopm_put_interface(tp
->intf
);
3558 data
[0] = le64_to_cpu(tally
.tx_packets
);
3559 data
[1] = le64_to_cpu(tally
.rx_packets
);
3560 data
[2] = le64_to_cpu(tally
.tx_errors
);
3561 data
[3] = le32_to_cpu(tally
.rx_errors
);
3562 data
[4] = le16_to_cpu(tally
.rx_missed
);
3563 data
[5] = le16_to_cpu(tally
.align_errors
);
3564 data
[6] = le32_to_cpu(tally
.tx_one_collision
);
3565 data
[7] = le32_to_cpu(tally
.tx_multi_collision
);
3566 data
[8] = le64_to_cpu(tally
.rx_unicast
);
3567 data
[9] = le64_to_cpu(tally
.rx_broadcast
);
3568 data
[10] = le32_to_cpu(tally
.rx_multicast
);
3569 data
[11] = le16_to_cpu(tally
.tx_aborted
);
3570 data
[12] = le16_to_cpu(tally
.tx_underrun
);
3573 static void rtl8152_get_strings(struct net_device
*dev
, u32 stringset
, u8
*data
)
3575 switch (stringset
) {
3577 memcpy(data
, *rtl8152_gstrings
, sizeof(rtl8152_gstrings
));
3582 static int r8152_get_eee(struct r8152
*tp
, struct ethtool_eee
*eee
)
3584 u32 ocp_data
, lp
, adv
, supported
= 0;
3587 val
= r8152_mmd_read(tp
, MDIO_MMD_PCS
, MDIO_PCS_EEE_ABLE
);
3588 supported
= mmd_eee_cap_to_ethtool_sup_t(val
);
3590 val
= r8152_mmd_read(tp
, MDIO_MMD_AN
, MDIO_AN_EEE_ADV
);
3591 adv
= mmd_eee_adv_to_ethtool_adv_t(val
);
3593 val
= r8152_mmd_read(tp
, MDIO_MMD_AN
, MDIO_AN_EEE_LPABLE
);
3594 lp
= mmd_eee_adv_to_ethtool_adv_t(val
);
3596 ocp_data
= ocp_read_word(tp
, MCU_TYPE_PLA
, PLA_EEE_CR
);
3597 ocp_data
&= EEE_RX_EN
| EEE_TX_EN
;
3599 eee
->eee_enabled
= !!ocp_data
;
3600 eee
->eee_active
= !!(supported
& adv
& lp
);
3601 eee
->supported
= supported
;
3602 eee
->advertised
= adv
;
3603 eee
->lp_advertised
= lp
;
3608 static int r8152_set_eee(struct r8152
*tp
, struct ethtool_eee
*eee
)
3610 u16 val
= ethtool_adv_to_mmd_eee_adv_t(eee
->advertised
);
3612 r8152_eee_en(tp
, eee
->eee_enabled
);
3614 if (!eee
->eee_enabled
)
3617 r8152_mmd_write(tp
, MDIO_MMD_AN
, MDIO_AN_EEE_ADV
, val
);
3622 static int r8153_get_eee(struct r8152
*tp
, struct ethtool_eee
*eee
)
3624 u32 ocp_data
, lp
, adv
, supported
= 0;
3627 val
= ocp_reg_read(tp
, OCP_EEE_ABLE
);
3628 supported
= mmd_eee_cap_to_ethtool_sup_t(val
);
3630 val
= ocp_reg_read(tp
, OCP_EEE_ADV
);
3631 adv
= mmd_eee_adv_to_ethtool_adv_t(val
);
3633 val
= ocp_reg_read(tp
, OCP_EEE_LPABLE
);
3634 lp
= mmd_eee_adv_to_ethtool_adv_t(val
);
3636 ocp_data
= ocp_read_word(tp
, MCU_TYPE_PLA
, PLA_EEE_CR
);
3637 ocp_data
&= EEE_RX_EN
| EEE_TX_EN
;
3639 eee
->eee_enabled
= !!ocp_data
;
3640 eee
->eee_active
= !!(supported
& adv
& lp
);
3641 eee
->supported
= supported
;
3642 eee
->advertised
= adv
;
3643 eee
->lp_advertised
= lp
;
3648 static int r8153_set_eee(struct r8152
*tp
, struct ethtool_eee
*eee
)
3650 u16 val
= ethtool_adv_to_mmd_eee_adv_t(eee
->advertised
);
3652 r8153_eee_en(tp
, eee
->eee_enabled
);
3654 if (!eee
->eee_enabled
)
3657 ocp_reg_write(tp
, OCP_EEE_ADV
, val
);
3663 rtl_ethtool_get_eee(struct net_device
*net
, struct ethtool_eee
*edata
)
3665 struct r8152
*tp
= netdev_priv(net
);
3668 ret
= usb_autopm_get_interface(tp
->intf
);
3672 mutex_lock(&tp
->control
);
3674 ret
= tp
->rtl_ops
.eee_get(tp
, edata
);
3676 mutex_unlock(&tp
->control
);
3678 usb_autopm_put_interface(tp
->intf
);
3685 rtl_ethtool_set_eee(struct net_device
*net
, struct ethtool_eee
*edata
)
3687 struct r8152
*tp
= netdev_priv(net
);
3690 ret
= usb_autopm_get_interface(tp
->intf
);
3694 mutex_lock(&tp
->control
);
3696 ret
= tp
->rtl_ops
.eee_set(tp
, edata
);
3698 ret
= mii_nway_restart(&tp
->mii
);
3700 mutex_unlock(&tp
->control
);
3702 usb_autopm_put_interface(tp
->intf
);
3708 static int rtl8152_nway_reset(struct net_device
*dev
)
3710 struct r8152
*tp
= netdev_priv(dev
);
3713 ret
= usb_autopm_get_interface(tp
->intf
);
3717 mutex_lock(&tp
->control
);
3719 ret
= mii_nway_restart(&tp
->mii
);
3721 mutex_unlock(&tp
->control
);
3723 usb_autopm_put_interface(tp
->intf
);
3729 static int rtl8152_get_coalesce(struct net_device
*netdev
,
3730 struct ethtool_coalesce
*coalesce
)
3732 struct r8152
*tp
= netdev_priv(netdev
);
3734 switch (tp
->version
) {
3742 coalesce
->rx_coalesce_usecs
= tp
->coalesce
;
3747 static int rtl8152_set_coalesce(struct net_device
*netdev
,
3748 struct ethtool_coalesce
*coalesce
)
3750 struct r8152
*tp
= netdev_priv(netdev
);
3753 switch (tp
->version
) {
3761 if (coalesce
->rx_coalesce_usecs
> COALESCE_SLOW
)
3764 ret
= usb_autopm_get_interface(tp
->intf
);
3768 mutex_lock(&tp
->control
);
3770 if (tp
->coalesce
!= coalesce
->rx_coalesce_usecs
) {
3771 tp
->coalesce
= coalesce
->rx_coalesce_usecs
;
3773 if (netif_running(tp
->netdev
) && netif_carrier_ok(netdev
))
3774 r8153_set_rx_early_timeout(tp
);
3777 mutex_unlock(&tp
->control
);
3779 usb_autopm_put_interface(tp
->intf
);
3784 static struct ethtool_ops ops
= {
3785 .get_drvinfo
= rtl8152_get_drvinfo
,
3786 .get_settings
= rtl8152_get_settings
,
3787 .set_settings
= rtl8152_set_settings
,
3788 .get_link
= ethtool_op_get_link
,
3789 .nway_reset
= rtl8152_nway_reset
,
3790 .get_msglevel
= rtl8152_get_msglevel
,
3791 .set_msglevel
= rtl8152_set_msglevel
,
3792 .get_wol
= rtl8152_get_wol
,
3793 .set_wol
= rtl8152_set_wol
,
3794 .get_strings
= rtl8152_get_strings
,
3795 .get_sset_count
= rtl8152_get_sset_count
,
3796 .get_ethtool_stats
= rtl8152_get_ethtool_stats
,
3797 .get_coalesce
= rtl8152_get_coalesce
,
3798 .set_coalesce
= rtl8152_set_coalesce
,
3799 .get_eee
= rtl_ethtool_get_eee
,
3800 .set_eee
= rtl_ethtool_set_eee
,
3803 static int rtl8152_ioctl(struct net_device
*netdev
, struct ifreq
*rq
, int cmd
)
3805 struct r8152
*tp
= netdev_priv(netdev
);
3806 struct mii_ioctl_data
*data
= if_mii(rq
);
3809 if (test_bit(RTL8152_UNPLUG
, &tp
->flags
))
3812 res
= usb_autopm_get_interface(tp
->intf
);
3818 data
->phy_id
= R8152_PHY_ID
; /* Internal PHY */
3822 mutex_lock(&tp
->control
);
3823 data
->val_out
= r8152_mdio_read(tp
, data
->reg_num
);
3824 mutex_unlock(&tp
->control
);
3828 if (!capable(CAP_NET_ADMIN
)) {
3832 mutex_lock(&tp
->control
);
3833 r8152_mdio_write(tp
, data
->reg_num
, data
->val_in
);
3834 mutex_unlock(&tp
->control
);
3841 usb_autopm_put_interface(tp
->intf
);
3847 static int rtl8152_change_mtu(struct net_device
*dev
, int new_mtu
)
3849 struct r8152
*tp
= netdev_priv(dev
);
3852 switch (tp
->version
) {
3855 return eth_change_mtu(dev
, new_mtu
);
3860 if (new_mtu
< 68 || new_mtu
> RTL8153_MAX_MTU
)
3863 ret
= usb_autopm_get_interface(tp
->intf
);
3867 mutex_lock(&tp
->control
);
3871 if (netif_running(dev
) && netif_carrier_ok(dev
))
3872 r8153_set_rx_early_size(tp
);
3874 mutex_unlock(&tp
->control
);
3876 usb_autopm_put_interface(tp
->intf
);
3881 static const struct net_device_ops rtl8152_netdev_ops
= {
3882 .ndo_open
= rtl8152_open
,
3883 .ndo_stop
= rtl8152_close
,
3884 .ndo_do_ioctl
= rtl8152_ioctl
,
3885 .ndo_start_xmit
= rtl8152_start_xmit
,
3886 .ndo_tx_timeout
= rtl8152_tx_timeout
,
3887 .ndo_set_features
= rtl8152_set_features
,
3888 .ndo_set_rx_mode
= rtl8152_set_rx_mode
,
3889 .ndo_set_mac_address
= rtl8152_set_mac_address
,
3890 .ndo_change_mtu
= rtl8152_change_mtu
,
3891 .ndo_validate_addr
= eth_validate_addr
,
3892 .ndo_features_check
= rtl8152_features_check
,
3895 static void r8152b_get_version(struct r8152
*tp
)
3900 ocp_data
= ocp_read_word(tp
, MCU_TYPE_PLA
, PLA_TCR1
);
3901 version
= (u16
)(ocp_data
& VERSION_MASK
);
3905 tp
->version
= RTL_VER_01
;
3908 tp
->version
= RTL_VER_02
;
3911 tp
->version
= RTL_VER_03
;
3912 tp
->mii
.supports_gmii
= 1;
3915 tp
->version
= RTL_VER_04
;
3916 tp
->mii
.supports_gmii
= 1;
3919 tp
->version
= RTL_VER_05
;
3920 tp
->mii
.supports_gmii
= 1;
3923 tp
->version
= RTL_VER_06
;
3924 tp
->mii
.supports_gmii
= 1;
3927 netif_info(tp
, probe
, tp
->netdev
,
3928 "Unknown version 0x%04x\n", version
);
3933 static void rtl8152_unload(struct r8152
*tp
)
3935 if (test_bit(RTL8152_UNPLUG
, &tp
->flags
))
3938 if (tp
->version
!= RTL_VER_01
)
3939 r8152_power_cut_en(tp
, true);
3942 static void rtl8153_unload(struct r8152
*tp
)
3944 if (test_bit(RTL8152_UNPLUG
, &tp
->flags
))
3947 r8153_power_cut_en(tp
, false);
3950 static int rtl_ops_init(struct r8152
*tp
)
3952 struct rtl_ops
*ops
= &tp
->rtl_ops
;
3955 switch (tp
->version
) {
3958 ops
->init
= r8152b_init
;
3959 ops
->enable
= rtl8152_enable
;
3960 ops
->disable
= rtl8152_disable
;
3961 ops
->up
= rtl8152_up
;
3962 ops
->down
= rtl8152_down
;
3963 ops
->unload
= rtl8152_unload
;
3964 ops
->eee_get
= r8152_get_eee
;
3965 ops
->eee_set
= r8152_set_eee
;
3972 ops
->init
= r8153_init
;
3973 ops
->enable
= rtl8153_enable
;
3974 ops
->disable
= rtl8153_disable
;
3975 ops
->up
= rtl8153_up
;
3976 ops
->down
= rtl8153_down
;
3977 ops
->unload
= rtl8153_unload
;
3978 ops
->eee_get
= r8153_get_eee
;
3979 ops
->eee_set
= r8153_set_eee
;
3984 netif_err(tp
, probe
, tp
->netdev
, "Unknown Device\n");
3991 static int rtl8152_probe(struct usb_interface
*intf
,
3992 const struct usb_device_id
*id
)
3994 struct usb_device
*udev
= interface_to_usbdev(intf
);
3996 struct net_device
*netdev
;
3999 if (udev
->actconfig
->desc
.bConfigurationValue
!= 1) {
4000 usb_driver_set_configuration(udev
, 1);
4004 usb_reset_device(udev
);
4005 netdev
= alloc_etherdev(sizeof(struct r8152
));
4007 dev_err(&intf
->dev
, "Out of memory\n");
4011 SET_NETDEV_DEV(netdev
, &intf
->dev
);
4012 tp
= netdev_priv(netdev
);
4013 tp
->msg_enable
= 0x7FFF;
4016 tp
->netdev
= netdev
;
4019 r8152b_get_version(tp
);
4020 ret
= rtl_ops_init(tp
);
4024 mutex_init(&tp
->control
);
4025 INIT_DELAYED_WORK(&tp
->schedule
, rtl_work_func_t
);
4027 netdev
->netdev_ops
= &rtl8152_netdev_ops
;
4028 netdev
->watchdog_timeo
= RTL8152_TX_TIMEOUT
;
4030 netdev
->features
|= NETIF_F_RXCSUM
| NETIF_F_IP_CSUM
| NETIF_F_SG
|
4031 NETIF_F_TSO
| NETIF_F_FRAGLIST
| NETIF_F_IPV6_CSUM
|
4032 NETIF_F_TSO6
| NETIF_F_HW_VLAN_CTAG_RX
|
4033 NETIF_F_HW_VLAN_CTAG_TX
;
4034 netdev
->hw_features
= NETIF_F_RXCSUM
| NETIF_F_IP_CSUM
| NETIF_F_SG
|
4035 NETIF_F_TSO
| NETIF_F_FRAGLIST
|
4036 NETIF_F_IPV6_CSUM
| NETIF_F_TSO6
|
4037 NETIF_F_HW_VLAN_CTAG_RX
| NETIF_F_HW_VLAN_CTAG_TX
;
4038 netdev
->vlan_features
= NETIF_F_SG
| NETIF_F_IP_CSUM
| NETIF_F_TSO
|
4039 NETIF_F_HIGHDMA
| NETIF_F_FRAGLIST
|
4040 NETIF_F_IPV6_CSUM
| NETIF_F_TSO6
;
4042 netdev
->ethtool_ops
= &ops
;
4043 netif_set_gso_max_size(netdev
, RTL_LIMITED_TSO_SIZE
);
4045 tp
->mii
.dev
= netdev
;
4046 tp
->mii
.mdio_read
= read_mii_word
;
4047 tp
->mii
.mdio_write
= write_mii_word
;
4048 tp
->mii
.phy_id_mask
= 0x3f;
4049 tp
->mii
.reg_num_mask
= 0x1f;
4050 tp
->mii
.phy_id
= R8152_PHY_ID
;
4052 switch (udev
->speed
) {
4053 case USB_SPEED_SUPER
:
4054 tp
->coalesce
= COALESCE_SUPER
;
4056 case USB_SPEED_HIGH
:
4057 tp
->coalesce
= COALESCE_HIGH
;
4060 tp
->coalesce
= COALESCE_SLOW
;
4064 intf
->needs_remote_wakeup
= 1;
4066 tp
->rtl_ops
.init(tp
);
4067 set_ethernet_addr(tp
);
4069 usb_set_intfdata(intf
, tp
);
4070 netif_napi_add(netdev
, &tp
->napi
, r8152_poll
, RTL8152_NAPI_WEIGHT
);
4072 ret
= register_netdev(netdev
);
4074 netif_err(tp
, probe
, netdev
, "couldn't register the device\n");
4078 tp
->saved_wolopts
= __rtl_get_wol(tp
);
4079 if (tp
->saved_wolopts
)
4080 device_set_wakeup_enable(&udev
->dev
, true);
4082 device_set_wakeup_enable(&udev
->dev
, false);
4084 netif_info(tp
, probe
, netdev
, "%s\n", DRIVER_VERSION
);
4089 netif_napi_del(&tp
->napi
);
4090 usb_set_intfdata(intf
, NULL
);
4092 free_netdev(netdev
);
4096 static void rtl8152_disconnect(struct usb_interface
*intf
)
4098 struct r8152
*tp
= usb_get_intfdata(intf
);
4100 usb_set_intfdata(intf
, NULL
);
4102 struct usb_device
*udev
= tp
->udev
;
4104 if (udev
->state
== USB_STATE_NOTATTACHED
)
4105 set_bit(RTL8152_UNPLUG
, &tp
->flags
);
4107 netif_napi_del(&tp
->napi
);
4108 unregister_netdev(tp
->netdev
);
4109 tp
->rtl_ops
.unload(tp
);
4110 free_netdev(tp
->netdev
);
4114 #define REALTEK_USB_DEVICE(vend, prod) \
4115 .match_flags = USB_DEVICE_ID_MATCH_DEVICE | \
4116 USB_DEVICE_ID_MATCH_INT_CLASS, \
4117 .idVendor = (vend), \
4118 .idProduct = (prod), \
4119 .bInterfaceClass = USB_CLASS_VENDOR_SPEC \
4122 .match_flags = USB_DEVICE_ID_MATCH_INT_INFO | \
4123 USB_DEVICE_ID_MATCH_DEVICE, \
4124 .idVendor = (vend), \
4125 .idProduct = (prod), \
4126 .bInterfaceClass = USB_CLASS_COMM, \
4127 .bInterfaceSubClass = USB_CDC_SUBCLASS_ETHERNET, \
4128 .bInterfaceProtocol = USB_CDC_PROTO_NONE
4130 /* table of devices that work with this driver */
4131 static struct usb_device_id rtl8152_table
[] = {
4132 {REALTEK_USB_DEVICE(VENDOR_ID_REALTEK
, 0x8152)},
4133 {REALTEK_USB_DEVICE(VENDOR_ID_REALTEK
, 0x8153)},
4134 {REALTEK_USB_DEVICE(VENDOR_ID_SAMSUNG
, 0xa101)},
4135 {REALTEK_USB_DEVICE(VENDOR_ID_LENOVO
, 0x7205)},
4136 {REALTEK_USB_DEVICE(VENDOR_ID_LENOVO
, 0x304f)},
4137 {REALTEK_USB_DEVICE(VENDOR_ID_NVIDIA
, 0x09ff)},
4141 MODULE_DEVICE_TABLE(usb
, rtl8152_table
);
4143 static struct usb_driver rtl8152_driver
= {
4145 .id_table
= rtl8152_table
,
4146 .probe
= rtl8152_probe
,
4147 .disconnect
= rtl8152_disconnect
,
4148 .suspend
= rtl8152_suspend
,
4149 .resume
= rtl8152_resume
,
4150 .reset_resume
= rtl8152_resume
,
4151 .supports_autosuspend
= 1,
4152 .disable_hub_initiated_lpm
= 1,
4155 module_usb_driver(rtl8152_driver
);
4157 MODULE_AUTHOR(DRIVER_AUTHOR
);
4158 MODULE_DESCRIPTION(DRIVER_DESC
);
4159 MODULE_LICENSE("GPL");