2 * Copyright (c) 2014 Realtek Semiconductor Corp. All rights reserved.
4 * This program is free software; you can redistribute it and/or
5 * modify it under the terms of the GNU General Public License
6 * version 2 as published by the Free Software Foundation.
10 #include <linux/signal.h>
11 #include <linux/slab.h>
12 #include <linux/module.h>
13 #include <linux/netdevice.h>
14 #include <linux/etherdevice.h>
15 #include <linux/mii.h>
16 #include <linux/ethtool.h>
17 #include <linux/usb.h>
18 #include <linux/crc32.h>
19 #include <linux/if_vlan.h>
20 #include <linux/uaccess.h>
21 #include <linux/list.h>
23 #include <linux/ipv6.h>
24 #include <net/ip6_checksum.h>
25 #include <uapi/linux/mdio.h>
26 #include <linux/mdio.h>
27 #include <linux/usb/cdc.h>
28 #include <linux/suspend.h>
29 #include <linux/acpi.h>
31 /* Information for net-next */
32 #define NETNEXT_VERSION "09"
34 /* Information for net */
35 #define NET_VERSION "9"
37 #define DRIVER_VERSION "v1." NETNEXT_VERSION "." NET_VERSION
38 #define DRIVER_AUTHOR "Realtek linux nic maintainers <nic_swsd@realtek.com>"
39 #define DRIVER_DESC "Realtek RTL8152/RTL8153 Based USB Ethernet Adapters"
40 #define MODULENAME "r8152"
42 #define R8152_PHY_ID 32
44 #define PLA_IDR 0xc000
45 #define PLA_RCR 0xc010
46 #define PLA_RMS 0xc016
47 #define PLA_RXFIFO_CTRL0 0xc0a0
48 #define PLA_RXFIFO_CTRL1 0xc0a4
49 #define PLA_RXFIFO_CTRL2 0xc0a8
50 #define PLA_DMY_REG0 0xc0b0
51 #define PLA_FMC 0xc0b4
52 #define PLA_CFG_WOL 0xc0b6
53 #define PLA_TEREDO_CFG 0xc0bc
54 #define PLA_TEREDO_WAKE_BASE 0xc0c4
55 #define PLA_MAR 0xcd00
56 #define PLA_BACKUP 0xd000
57 #define PAL_BDC_CR 0xd1a0
58 #define PLA_TEREDO_TIMER 0xd2cc
59 #define PLA_REALWOW_TIMER 0xd2e8
60 #define PLA_EFUSE_DATA 0xdd00
61 #define PLA_EFUSE_CMD 0xdd02
62 #define PLA_LEDSEL 0xdd90
63 #define PLA_LED_FEATURE 0xdd92
64 #define PLA_PHYAR 0xde00
65 #define PLA_BOOT_CTRL 0xe004
66 #define PLA_GPHY_INTR_IMR 0xe022
67 #define PLA_EEE_CR 0xe040
68 #define PLA_EEEP_CR 0xe080
69 #define PLA_MAC_PWR_CTRL 0xe0c0
70 #define PLA_MAC_PWR_CTRL2 0xe0ca
71 #define PLA_MAC_PWR_CTRL3 0xe0cc
72 #define PLA_MAC_PWR_CTRL4 0xe0ce
73 #define PLA_WDT6_CTRL 0xe428
74 #define PLA_TCR0 0xe610
75 #define PLA_TCR1 0xe612
76 #define PLA_MTPS 0xe615
77 #define PLA_TXFIFO_CTRL 0xe618
78 #define PLA_RSTTALLY 0xe800
80 #define PLA_CRWECR 0xe81c
81 #define PLA_CONFIG12 0xe81e /* CONFIG1, CONFIG2 */
82 #define PLA_CONFIG34 0xe820 /* CONFIG3, CONFIG4 */
83 #define PLA_CONFIG5 0xe822
84 #define PLA_PHY_PWR 0xe84c
85 #define PLA_OOB_CTRL 0xe84f
86 #define PLA_CPCR 0xe854
87 #define PLA_MISC_0 0xe858
88 #define PLA_MISC_1 0xe85a
89 #define PLA_OCP_GPHY_BASE 0xe86c
90 #define PLA_TALLYCNT 0xe890
91 #define PLA_SFF_STS_7 0xe8de
92 #define PLA_PHYSTATUS 0xe908
93 #define PLA_BP_BA 0xfc26
94 #define PLA_BP_0 0xfc28
95 #define PLA_BP_1 0xfc2a
96 #define PLA_BP_2 0xfc2c
97 #define PLA_BP_3 0xfc2e
98 #define PLA_BP_4 0xfc30
99 #define PLA_BP_5 0xfc32
100 #define PLA_BP_6 0xfc34
101 #define PLA_BP_7 0xfc36
102 #define PLA_BP_EN 0xfc38
104 #define USB_USB2PHY 0xb41e
105 #define USB_SSPHYLINK2 0xb428
106 #define USB_U2P3_CTRL 0xb460
107 #define USB_CSR_DUMMY1 0xb464
108 #define USB_CSR_DUMMY2 0xb466
109 #define USB_DEV_STAT 0xb808
110 #define USB_CONNECT_TIMER 0xcbf8
111 #define USB_MSC_TIMER 0xcbfc
112 #define USB_BURST_SIZE 0xcfc0
113 #define USB_LPM_CONFIG 0xcfd8
114 #define USB_USB_CTRL 0xd406
115 #define USB_PHY_CTRL 0xd408
116 #define USB_TX_AGG 0xd40a
117 #define USB_RX_BUF_TH 0xd40c
118 #define USB_USB_TIMER 0xd428
119 #define USB_RX_EARLY_TIMEOUT 0xd42c
120 #define USB_RX_EARLY_SIZE 0xd42e
121 #define USB_PM_CTRL_STATUS 0xd432 /* RTL8153A */
122 #define USB_RX_EXTRA_AGGR_TMR 0xd432 /* RTL8153B */
123 #define USB_TX_DMA 0xd434
124 #define USB_UPT_RXDMA_OWN 0xd437
125 #define USB_TOLERANCE 0xd490
126 #define USB_LPM_CTRL 0xd41a
127 #define USB_BMU_RESET 0xd4b0
128 #define USB_U1U2_TIMER 0xd4da
129 #define USB_UPS_CTRL 0xd800
130 #define USB_POWER_CUT 0xd80a
131 #define USB_MISC_0 0xd81a
132 #define USB_AFE_CTRL2 0xd824
133 #define USB_UPS_CFG 0xd842
134 #define USB_UPS_FLAGS 0xd848
135 #define USB_WDT11_CTRL 0xe43c
136 #define USB_BP_BA 0xfc26
137 #define USB_BP_0 0xfc28
138 #define USB_BP_1 0xfc2a
139 #define USB_BP_2 0xfc2c
140 #define USB_BP_3 0xfc2e
141 #define USB_BP_4 0xfc30
142 #define USB_BP_5 0xfc32
143 #define USB_BP_6 0xfc34
144 #define USB_BP_7 0xfc36
145 #define USB_BP_EN 0xfc38
146 #define USB_BP_8 0xfc38
147 #define USB_BP_9 0xfc3a
148 #define USB_BP_10 0xfc3c
149 #define USB_BP_11 0xfc3e
150 #define USB_BP_12 0xfc40
151 #define USB_BP_13 0xfc42
152 #define USB_BP_14 0xfc44
153 #define USB_BP_15 0xfc46
154 #define USB_BP2_EN 0xfc48
157 #define OCP_ALDPS_CONFIG 0x2010
158 #define OCP_EEE_CONFIG1 0x2080
159 #define OCP_EEE_CONFIG2 0x2092
160 #define OCP_EEE_CONFIG3 0x2094
161 #define OCP_BASE_MII 0xa400
162 #define OCP_EEE_AR 0xa41a
163 #define OCP_EEE_DATA 0xa41c
164 #define OCP_PHY_STATUS 0xa420
165 #define OCP_NCTL_CFG 0xa42c
166 #define OCP_POWER_CFG 0xa430
167 #define OCP_EEE_CFG 0xa432
168 #define OCP_SRAM_ADDR 0xa436
169 #define OCP_SRAM_DATA 0xa438
170 #define OCP_DOWN_SPEED 0xa442
171 #define OCP_EEE_ABLE 0xa5c4
172 #define OCP_EEE_ADV 0xa5d0
173 #define OCP_EEE_LPABLE 0xa5d2
174 #define OCP_PHY_STATE 0xa708 /* nway state for 8153 */
175 #define OCP_PHY_PATCH_STAT 0xb800
176 #define OCP_PHY_PATCH_CMD 0xb820
177 #define OCP_ADC_IOFFSET 0xbcfc
178 #define OCP_ADC_CFG 0xbc06
179 #define OCP_SYSCLK_CFG 0xc416
182 #define SRAM_GREEN_CFG 0x8011
183 #define SRAM_LPF_CFG 0x8012
184 #define SRAM_10M_AMP1 0x8080
185 #define SRAM_10M_AMP2 0x8082
186 #define SRAM_IMPEDANCE 0x8084
189 #define RCR_AAP 0x00000001
190 #define RCR_APM 0x00000002
191 #define RCR_AM 0x00000004
192 #define RCR_AB 0x00000008
193 #define RCR_ACPT_ALL (RCR_AAP | RCR_APM | RCR_AM | RCR_AB)
195 /* PLA_RXFIFO_CTRL0 */
196 #define RXFIFO_THR1_NORMAL 0x00080002
197 #define RXFIFO_THR1_OOB 0x01800003
199 /* PLA_RXFIFO_CTRL1 */
200 #define RXFIFO_THR2_FULL 0x00000060
201 #define RXFIFO_THR2_HIGH 0x00000038
202 #define RXFIFO_THR2_OOB 0x0000004a
203 #define RXFIFO_THR2_NORMAL 0x00a0
205 /* PLA_RXFIFO_CTRL2 */
206 #define RXFIFO_THR3_FULL 0x00000078
207 #define RXFIFO_THR3_HIGH 0x00000048
208 #define RXFIFO_THR3_OOB 0x0000005a
209 #define RXFIFO_THR3_NORMAL 0x0110
211 /* PLA_TXFIFO_CTRL */
212 #define TXFIFO_THR_NORMAL 0x00400008
213 #define TXFIFO_THR_NORMAL2 0x01000008
216 #define ECM_ALDPS 0x0002
219 #define FMC_FCR_MCU_EN 0x0001
222 #define EEEP_CR_EEEP_TX 0x0002
225 #define WDT6_SET_MODE 0x0010
228 #define TCR0_TX_EMPTY 0x0800
229 #define TCR0_AUTO_FIFO 0x0080
232 #define VERSION_MASK 0x7cf0
235 #define MTPS_JUMBO (12 * 1024 / 64)
236 #define MTPS_DEFAULT (6 * 1024 / 64)
239 #define TALLY_RESET 0x0001
247 #define CRWECR_NORAML 0x00
248 #define CRWECR_CONFIG 0xc0
251 #define NOW_IS_OOB 0x80
252 #define TXFIFO_EMPTY 0x20
253 #define RXFIFO_EMPTY 0x10
254 #define LINK_LIST_READY 0x02
255 #define DIS_MCU_CLROOB 0x01
256 #define FIFO_EMPTY (TXFIFO_EMPTY | RXFIFO_EMPTY)
259 #define RXDY_GATED_EN 0x0008
262 #define RE_INIT_LL 0x8000
263 #define MCU_BORW_EN 0x4000
266 #define CPCR_RX_VLAN 0x0040
269 #define MAGIC_EN 0x0001
272 #define TEREDO_SEL 0x8000
273 #define TEREDO_WAKE_MASK 0x7f00
274 #define TEREDO_RS_EVENT_MASK 0x00fe
275 #define OOB_TEREDO_EN 0x0001
278 #define ALDPS_PROXY_MODE 0x0001
281 #define EFUSE_READ_CMD BIT(15)
282 #define EFUSE_DATA_BIT16 BIT(7)
285 #define LINK_ON_WAKE_EN 0x0010
286 #define LINK_OFF_WAKE_EN 0x0008
289 #define BWF_EN 0x0040
290 #define MWF_EN 0x0020
291 #define UWF_EN 0x0010
292 #define LAN_WAKE_EN 0x0002
294 /* PLA_LED_FEATURE */
295 #define LED_MODE_MASK 0x0700
298 #define TX_10M_IDLE_EN 0x0080
299 #define PFM_PWM_SWITCH 0x0040
301 /* PLA_MAC_PWR_CTRL */
302 #define D3_CLK_GATED_EN 0x00004000
303 #define MCU_CLK_RATIO 0x07010f07
304 #define MCU_CLK_RATIO_MASK 0x0f0f0f0f
305 #define ALDPS_SPDWN_RATIO 0x0f87
307 /* PLA_MAC_PWR_CTRL2 */
308 #define EEE_SPDWN_RATIO 0x8007
309 #define MAC_CLK_SPDWN_EN BIT(15)
311 /* PLA_MAC_PWR_CTRL3 */
312 #define PKT_AVAIL_SPDWN_EN 0x0100
313 #define SUSPEND_SPDWN_EN 0x0004
314 #define U1U2_SPDWN_EN 0x0002
315 #define L1_SPDWN_EN 0x0001
317 /* PLA_MAC_PWR_CTRL4 */
318 #define PWRSAVE_SPDWN_EN 0x1000
319 #define RXDV_SPDWN_EN 0x0800
320 #define TX10MIDLE_EN 0x0100
321 #define TP100_SPDWN_EN 0x0020
322 #define TP500_SPDWN_EN 0x0010
323 #define TP1000_SPDWN_EN 0x0008
324 #define EEE_SPDWN_EN 0x0001
326 /* PLA_GPHY_INTR_IMR */
327 #define GPHY_STS_MSK 0x0001
328 #define SPEED_DOWN_MSK 0x0002
329 #define SPDWN_RXDV_MSK 0x0004
330 #define SPDWN_LINKCHG_MSK 0x0008
333 #define PHYAR_FLAG 0x80000000
336 #define EEE_RX_EN 0x0001
337 #define EEE_TX_EN 0x0002
340 #define AUTOLOAD_DONE 0x0002
343 #define USB2PHY_SUSPEND 0x0001
344 #define USB2PHY_L1 0x0002
347 #define pwd_dn_scale_mask 0x3ffe
348 #define pwd_dn_scale(x) ((x) << 1)
351 #define DYNAMIC_BURST 0x0001
354 #define EP4_FULL_FC 0x0001
357 #define STAT_SPEED_MASK 0x0006
358 #define STAT_SPEED_HIGH 0x0000
359 #define STAT_SPEED_FULL 0x0002
362 #define LPM_U1U2_EN BIT(0)
365 #define TX_AGG_MAX_THRESHOLD 0x03
368 #define RX_THR_SUPPER 0x0c350180
369 #define RX_THR_HIGH 0x7a120180
370 #define RX_THR_SLOW 0xffff0180
371 #define RX_THR_B 0x00010001
374 #define TEST_MODE_DISABLE 0x00000001
375 #define TX_SIZE_ADJUST1 0x00000100
378 #define BMU_RESET_EP_IN 0x01
379 #define BMU_RESET_EP_OUT 0x02
381 /* USB_UPT_RXDMA_OWN */
382 #define OWN_UPDATE BIT(0)
383 #define OWN_CLEAR BIT(1)
386 #define POWER_CUT 0x0100
388 /* USB_PM_CTRL_STATUS */
389 #define RESUME_INDICATE 0x0001
392 #define RX_AGG_DISABLE 0x0010
393 #define RX_ZERO_EN 0x0080
396 #define U2P3_ENABLE 0x0001
399 #define PWR_EN 0x0001
400 #define PHASE2_EN 0x0008
401 #define UPS_EN BIT(4)
402 #define USP_PREWAKE BIT(5)
405 #define PCUT_STATUS 0x0001
407 /* USB_RX_EARLY_TIMEOUT */
408 #define COALESCE_SUPER 85000U
409 #define COALESCE_HIGH 250000U
410 #define COALESCE_SLOW 524280U
413 #define TIMER11_EN 0x0001
416 /* bit 4 ~ 5: fifo empty boundary */
417 #define FIFO_EMPTY_1FB 0x30 /* 0x1fb * 64 = 32448 bytes */
418 /* bit 2 ~ 3: LMP timer */
419 #define LPM_TIMER_MASK 0x0c
420 #define LPM_TIMER_500MS 0x04 /* 500 ms */
421 #define LPM_TIMER_500US 0x0c /* 500 us */
422 #define ROK_EXIT_LPM 0x02
425 #define SEN_VAL_MASK 0xf800
426 #define SEN_VAL_NORMAL 0xa000
427 #define SEL_RXIDLE 0x0100
430 #define SAW_CNT_1MS_MASK 0x0fff
433 #define UPS_FLAGS_R_TUNE BIT(0)
434 #define UPS_FLAGS_EN_10M_CKDIV BIT(1)
435 #define UPS_FLAGS_250M_CKDIV BIT(2)
436 #define UPS_FLAGS_EN_ALDPS BIT(3)
437 #define UPS_FLAGS_CTAP_SHORT_DIS BIT(4)
438 #define UPS_FLAGS_SPEED_MASK (0xf << 16)
439 #define ups_flags_speed(x) ((x) << 16)
440 #define UPS_FLAGS_EN_EEE BIT(20)
441 #define UPS_FLAGS_EN_500M_EEE BIT(21)
442 #define UPS_FLAGS_EN_EEE_CKDIV BIT(22)
443 #define UPS_FLAGS_EEE_PLLOFF_GIGA BIT(24)
444 #define UPS_FLAGS_EEE_CMOD_LV_EN BIT(25)
445 #define UPS_FLAGS_EN_GREEN BIT(26)
446 #define UPS_FLAGS_EN_FLOW_CTR BIT(27)
460 /* OCP_ALDPS_CONFIG */
461 #define ENPWRSAVE 0x8000
462 #define ENPDNPS 0x0200
463 #define LINKENA 0x0100
464 #define DIS_SDSAVE 0x0010
467 #define PHY_STAT_MASK 0x0007
468 #define PHY_STAT_EXT_INIT 2
469 #define PHY_STAT_LAN_ON 3
470 #define PHY_STAT_PWRDN 5
473 #define PGA_RETURN_EN BIT(1)
476 #define EEE_CLKDIV_EN 0x8000
477 #define EN_ALDPS 0x0004
478 #define EN_10M_PLLOFF 0x0001
480 /* OCP_EEE_CONFIG1 */
481 #define RG_TXLPI_MSK_HFDUP 0x8000
482 #define RG_MATCLR_EN 0x4000
483 #define EEE_10_CAP 0x2000
484 #define EEE_NWAY_EN 0x1000
485 #define TX_QUIET_EN 0x0200
486 #define RX_QUIET_EN 0x0100
487 #define sd_rise_time_mask 0x0070
488 #define sd_rise_time(x) (min(x, 7) << 4) /* bit 4 ~ 6 */
489 #define RG_RXLPI_MSK_HFDUP 0x0008
490 #define SDFALLTIME 0x0007 /* bit 0 ~ 2 */
492 /* OCP_EEE_CONFIG2 */
493 #define RG_LPIHYS_NUM 0x7000 /* bit 12 ~ 15 */
494 #define RG_DACQUIET_EN 0x0400
495 #define RG_LDVQUIET_EN 0x0200
496 #define RG_CKRSEL 0x0020
497 #define RG_EEEPRG_EN 0x0010
499 /* OCP_EEE_CONFIG3 */
500 #define fast_snr_mask 0xff80
501 #define fast_snr(x) (min(x, 0x1ff) << 7) /* bit 7 ~ 15 */
502 #define RG_LFS_SEL 0x0060 /* bit 6 ~ 5 */
503 #define MSK_PH 0x0006 /* bit 0 ~ 3 */
506 /* bit[15:14] function */
507 #define FUN_ADDR 0x0000
508 #define FUN_DATA 0x4000
509 /* bit[4:0] device addr */
512 #define CTAP_SHORT_EN 0x0040
513 #define EEE10_EN 0x0010
516 #define EN_EEE_CMODE BIT(14)
517 #define EN_EEE_1000 BIT(13)
518 #define EN_EEE_100 BIT(12)
519 #define EN_10M_CLKDIV BIT(11)
520 #define EN_10M_BGOFF 0x0080
523 #define TXDIS_STATE 0x01
524 #define ABD_STATE 0x02
526 /* OCP_PHY_PATCH_STAT */
527 #define PATCH_READY BIT(6)
529 /* OCP_PHY_PATCH_CMD */
530 #define PATCH_REQUEST BIT(4)
533 #define CKADSEL_L 0x0100
534 #define ADC_EN 0x0080
535 #define EN_EMI_L 0x0040
538 #define clk_div_expo(x) (min(x, 5) << 8)
541 #define GREEN_ETH_EN BIT(15)
542 #define R_TUNE_EN BIT(11)
545 #define LPF_AUTO_TUNE 0x8000
548 #define GDAC_IB_UPALL 0x0008
551 #define AMP_DN 0x0200
554 #define RX_DRIVING_MASK 0x6000
557 #define AD_MASK 0xfee0
559 #define PASS_THRU_MASK 0x1
561 enum rtl_register_content
{
569 #define RTL8152_MAX_TX 4
570 #define RTL8152_MAX_RX 10
575 #define INTR_LINK 0x0004
577 #define RTL8152_REQT_READ 0xc0
578 #define RTL8152_REQT_WRITE 0x40
579 #define RTL8152_REQ_GET_REGS 0x05
580 #define RTL8152_REQ_SET_REGS 0x05
582 #define BYTE_EN_DWORD 0xff
583 #define BYTE_EN_WORD 0x33
584 #define BYTE_EN_BYTE 0x11
585 #define BYTE_EN_SIX_BYTES 0x3f
586 #define BYTE_EN_START_MASK 0x0f
587 #define BYTE_EN_END_MASK 0xf0
589 #define RTL8153_MAX_PACKET 9216 /* 9K */
590 #define RTL8153_MAX_MTU (RTL8153_MAX_PACKET - VLAN_ETH_HLEN - \
592 #define RTL8152_RMS (VLAN_ETH_FRAME_LEN + ETH_FCS_LEN)
593 #define RTL8153_RMS RTL8153_MAX_PACKET
594 #define RTL8152_TX_TIMEOUT (5 * HZ)
595 #define RTL8152_NAPI_WEIGHT 64
596 #define rx_reserved_size(x) ((x) + VLAN_ETH_HLEN + ETH_FCS_LEN + \
597 sizeof(struct rx_desc) + RX_ALIGN)
611 /* Define these values to match your device */
612 #define VENDOR_ID_REALTEK 0x0bda
613 #define VENDOR_ID_MICROSOFT 0x045e
614 #define VENDOR_ID_SAMSUNG 0x04e8
615 #define VENDOR_ID_LENOVO 0x17ef
616 #define VENDOR_ID_NVIDIA 0x0955
618 #define MCU_TYPE_PLA 0x0100
619 #define MCU_TYPE_USB 0x0000
621 struct tally_counter
{
628 __le32 tx_one_collision
;
629 __le32 tx_multi_collision
;
639 #define RX_LEN_MASK 0x7fff
642 #define RD_UDP_CS BIT(23)
643 #define RD_TCP_CS BIT(22)
644 #define RD_IPV6_CS BIT(20)
645 #define RD_IPV4_CS BIT(19)
648 #define IPF BIT(23) /* IP checksum fail */
649 #define UDPF BIT(22) /* UDP checksum fail */
650 #define TCPF BIT(21) /* TCP checksum fail */
651 #define RX_VLAN_TAG BIT(16)
660 #define TX_FS BIT(31) /* First segment of a packet */
661 #define TX_LS BIT(30) /* Final segment of a packet */
662 #define GTSENDV4 BIT(28)
663 #define GTSENDV6 BIT(27)
664 #define GTTCPHO_SHIFT 18
665 #define GTTCPHO_MAX 0x7fU
666 #define TX_LEN_MAX 0x3ffffU
669 #define UDP_CS BIT(31) /* Calculate UDP/IP checksum */
670 #define TCP_CS BIT(30) /* Calculate TCP/IP checksum */
671 #define IPV4_CS BIT(29) /* Calculate IPv4 checksum */
672 #define IPV6_CS BIT(28) /* Calculate IPv6 checksum */
674 #define MSS_MAX 0x7ffU
675 #define TCPHO_SHIFT 17
676 #define TCPHO_MAX 0x7ffU
677 #define TX_VLAN_TAG BIT(16)
683 struct list_head list
;
685 struct r8152
*context
;
691 struct list_head list
;
693 struct r8152
*context
;
702 struct usb_device
*udev
;
703 struct napi_struct napi
;
704 struct usb_interface
*intf
;
705 struct net_device
*netdev
;
706 struct urb
*intr_urb
;
707 struct tx_agg tx_info
[RTL8152_MAX_TX
];
708 struct rx_agg rx_info
[RTL8152_MAX_RX
];
709 struct list_head rx_done
, tx_free
;
710 struct sk_buff_head tx_queue
, rx_queue
;
711 spinlock_t rx_lock
, tx_lock
;
712 struct delayed_work schedule
, hw_phy_work
;
713 struct mii_if_info mii
;
714 struct mutex control
; /* use for hw setting */
715 #ifdef CONFIG_PM_SLEEP
716 struct notifier_block pm_notifier
;
720 void (*init
)(struct r8152
*);
721 int (*enable
)(struct r8152
*);
722 void (*disable
)(struct r8152
*);
723 void (*up
)(struct r8152
*);
724 void (*down
)(struct r8152
*);
725 void (*unload
)(struct r8152
*);
726 int (*eee_get
)(struct r8152
*, struct ethtool_eee
*);
727 int (*eee_set
)(struct r8152
*, struct ethtool_eee
*);
728 bool (*in_nway
)(struct r8152
*);
729 void (*hw_phy_cfg
)(struct r8152
*);
730 void (*autosuspend_en
)(struct r8152
*tp
, bool enable
);
766 /* Maximum number of multicast addresses to filter (vs. Rx-all-multicast).
767 * The RTL chips use a 64 element hash table based on the Ethernet CRC.
769 static const int multicast_filter_limit
= 32;
770 static unsigned int agg_buf_sz
= 16384;
772 #define RTL_LIMITED_TSO_SIZE (agg_buf_sz - sizeof(struct tx_desc) - \
773 VLAN_ETH_HLEN - ETH_FCS_LEN)
776 int get_registers(struct r8152
*tp
, u16 value
, u16 index
, u16 size
, void *data
)
781 tmp
= kmalloc(size
, GFP_KERNEL
);
785 ret
= usb_control_msg(tp
->udev
, usb_rcvctrlpipe(tp
->udev
, 0),
786 RTL8152_REQ_GET_REGS
, RTL8152_REQT_READ
,
787 value
, index
, tmp
, size
, 500);
789 memcpy(data
, tmp
, size
);
796 int set_registers(struct r8152
*tp
, u16 value
, u16 index
, u16 size
, void *data
)
801 tmp
= kmemdup(data
, size
, GFP_KERNEL
);
805 ret
= usb_control_msg(tp
->udev
, usb_sndctrlpipe(tp
->udev
, 0),
806 RTL8152_REQ_SET_REGS
, RTL8152_REQT_WRITE
,
807 value
, index
, tmp
, size
, 500);
814 static int generic_ocp_read(struct r8152
*tp
, u16 index
, u16 size
,
815 void *data
, u16 type
)
820 if (test_bit(RTL8152_UNPLUG
, &tp
->flags
))
823 /* both size and indix must be 4 bytes align */
824 if ((size
& 3) || !size
|| (index
& 3) || !data
)
827 if ((u32
)index
+ (u32
)size
> 0xffff)
832 ret
= get_registers(tp
, index
, type
, limit
, data
);
840 ret
= get_registers(tp
, index
, type
, size
, data
);
852 set_bit(RTL8152_UNPLUG
, &tp
->flags
);
857 static int generic_ocp_write(struct r8152
*tp
, u16 index
, u16 byteen
,
858 u16 size
, void *data
, u16 type
)
861 u16 byteen_start
, byteen_end
, byen
;
864 if (test_bit(RTL8152_UNPLUG
, &tp
->flags
))
867 /* both size and indix must be 4 bytes align */
868 if ((size
& 3) || !size
|| (index
& 3) || !data
)
871 if ((u32
)index
+ (u32
)size
> 0xffff)
874 byteen_start
= byteen
& BYTE_EN_START_MASK
;
875 byteen_end
= byteen
& BYTE_EN_END_MASK
;
877 byen
= byteen_start
| (byteen_start
<< 4);
878 ret
= set_registers(tp
, index
, type
| byen
, 4, data
);
891 ret
= set_registers(tp
, index
,
892 type
| BYTE_EN_DWORD
,
901 ret
= set_registers(tp
, index
,
902 type
| BYTE_EN_DWORD
,
914 byen
= byteen_end
| (byteen_end
>> 4);
915 ret
= set_registers(tp
, index
, type
| byen
, 4, data
);
922 set_bit(RTL8152_UNPLUG
, &tp
->flags
);
928 int pla_ocp_read(struct r8152
*tp
, u16 index
, u16 size
, void *data
)
930 return generic_ocp_read(tp
, index
, size
, data
, MCU_TYPE_PLA
);
934 int pla_ocp_write(struct r8152
*tp
, u16 index
, u16 byteen
, u16 size
, void *data
)
936 return generic_ocp_write(tp
, index
, byteen
, size
, data
, MCU_TYPE_PLA
);
940 int usb_ocp_write(struct r8152
*tp
, u16 index
, u16 byteen
, u16 size
, void *data
)
942 return generic_ocp_write(tp
, index
, byteen
, size
, data
, MCU_TYPE_USB
);
945 static u32
ocp_read_dword(struct r8152
*tp
, u16 type
, u16 index
)
949 generic_ocp_read(tp
, index
, sizeof(data
), &data
, type
);
951 return __le32_to_cpu(data
);
954 static void ocp_write_dword(struct r8152
*tp
, u16 type
, u16 index
, u32 data
)
956 __le32 tmp
= __cpu_to_le32(data
);
958 generic_ocp_write(tp
, index
, BYTE_EN_DWORD
, sizeof(tmp
), &tmp
, type
);
961 static u16
ocp_read_word(struct r8152
*tp
, u16 type
, u16 index
)
965 u16 byen
= BYTE_EN_WORD
;
966 u8 shift
= index
& 2;
971 generic_ocp_read(tp
, index
, sizeof(tmp
), &tmp
, type
| byen
);
973 data
= __le32_to_cpu(tmp
);
974 data
>>= (shift
* 8);
980 static void ocp_write_word(struct r8152
*tp
, u16 type
, u16 index
, u32 data
)
984 u16 byen
= BYTE_EN_WORD
;
985 u8 shift
= index
& 2;
991 mask
<<= (shift
* 8);
992 data
<<= (shift
* 8);
996 tmp
= __cpu_to_le32(data
);
998 generic_ocp_write(tp
, index
, byen
, sizeof(tmp
), &tmp
, type
);
1001 static u8
ocp_read_byte(struct r8152
*tp
, u16 type
, u16 index
)
1005 u8 shift
= index
& 3;
1009 generic_ocp_read(tp
, index
, sizeof(tmp
), &tmp
, type
);
1011 data
= __le32_to_cpu(tmp
);
1012 data
>>= (shift
* 8);
1018 static void ocp_write_byte(struct r8152
*tp
, u16 type
, u16 index
, u32 data
)
1022 u16 byen
= BYTE_EN_BYTE
;
1023 u8 shift
= index
& 3;
1029 mask
<<= (shift
* 8);
1030 data
<<= (shift
* 8);
1034 tmp
= __cpu_to_le32(data
);
1036 generic_ocp_write(tp
, index
, byen
, sizeof(tmp
), &tmp
, type
);
1039 static u16
ocp_reg_read(struct r8152
*tp
, u16 addr
)
1041 u16 ocp_base
, ocp_index
;
1043 ocp_base
= addr
& 0xf000;
1044 if (ocp_base
!= tp
->ocp_base
) {
1045 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_OCP_GPHY_BASE
, ocp_base
);
1046 tp
->ocp_base
= ocp_base
;
1049 ocp_index
= (addr
& 0x0fff) | 0xb000;
1050 return ocp_read_word(tp
, MCU_TYPE_PLA
, ocp_index
);
1053 static void ocp_reg_write(struct r8152
*tp
, u16 addr
, u16 data
)
1055 u16 ocp_base
, ocp_index
;
1057 ocp_base
= addr
& 0xf000;
1058 if (ocp_base
!= tp
->ocp_base
) {
1059 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_OCP_GPHY_BASE
, ocp_base
);
1060 tp
->ocp_base
= ocp_base
;
1063 ocp_index
= (addr
& 0x0fff) | 0xb000;
1064 ocp_write_word(tp
, MCU_TYPE_PLA
, ocp_index
, data
);
1067 static inline void r8152_mdio_write(struct r8152
*tp
, u32 reg_addr
, u32 value
)
1069 ocp_reg_write(tp
, OCP_BASE_MII
+ reg_addr
* 2, value
);
1072 static inline int r8152_mdio_read(struct r8152
*tp
, u32 reg_addr
)
1074 return ocp_reg_read(tp
, OCP_BASE_MII
+ reg_addr
* 2);
1077 static void sram_write(struct r8152
*tp
, u16 addr
, u16 data
)
1079 ocp_reg_write(tp
, OCP_SRAM_ADDR
, addr
);
1080 ocp_reg_write(tp
, OCP_SRAM_DATA
, data
);
1083 static u16
sram_read(struct r8152
*tp
, u16 addr
)
1085 ocp_reg_write(tp
, OCP_SRAM_ADDR
, addr
);
1086 return ocp_reg_read(tp
, OCP_SRAM_DATA
);
1089 static int read_mii_word(struct net_device
*netdev
, int phy_id
, int reg
)
1091 struct r8152
*tp
= netdev_priv(netdev
);
1094 if (test_bit(RTL8152_UNPLUG
, &tp
->flags
))
1097 if (phy_id
!= R8152_PHY_ID
)
1100 ret
= r8152_mdio_read(tp
, reg
);
1106 void write_mii_word(struct net_device
*netdev
, int phy_id
, int reg
, int val
)
1108 struct r8152
*tp
= netdev_priv(netdev
);
1110 if (test_bit(RTL8152_UNPLUG
, &tp
->flags
))
1113 if (phy_id
!= R8152_PHY_ID
)
1116 r8152_mdio_write(tp
, reg
, val
);
1120 r8152_submit_rx(struct r8152
*tp
, struct rx_agg
*agg
, gfp_t mem_flags
);
1122 static int rtl8152_set_mac_address(struct net_device
*netdev
, void *p
)
1124 struct r8152
*tp
= netdev_priv(netdev
);
1125 struct sockaddr
*addr
= p
;
1126 int ret
= -EADDRNOTAVAIL
;
1128 if (!is_valid_ether_addr(addr
->sa_data
))
1131 ret
= usb_autopm_get_interface(tp
->intf
);
1135 mutex_lock(&tp
->control
);
1137 memcpy(netdev
->dev_addr
, addr
->sa_data
, netdev
->addr_len
);
1139 ocp_write_byte(tp
, MCU_TYPE_PLA
, PLA_CRWECR
, CRWECR_CONFIG
);
1140 pla_ocp_write(tp
, PLA_IDR
, BYTE_EN_SIX_BYTES
, 8, addr
->sa_data
);
1141 ocp_write_byte(tp
, MCU_TYPE_PLA
, PLA_CRWECR
, CRWECR_NORAML
);
1143 mutex_unlock(&tp
->control
);
1145 usb_autopm_put_interface(tp
->intf
);
1150 /* Devices containing RTL8153-AD can support a persistent
1151 * host system provided MAC address.
1152 * Examples of this are Dell TB15 and Dell WD15 docks
1154 static int vendor_mac_passthru_addr_read(struct r8152
*tp
, struct sockaddr
*sa
)
1157 struct acpi_buffer buffer
= { ACPI_ALLOCATE_BUFFER
, NULL
};
1158 union acpi_object
*obj
;
1161 unsigned char buf
[6];
1163 /* test for -AD variant of RTL8153 */
1164 ocp_data
= ocp_read_word(tp
, MCU_TYPE_USB
, USB_MISC_0
);
1165 if ((ocp_data
& AD_MASK
) != 0x1000)
1168 /* test for MAC address pass-through bit */
1169 ocp_data
= ocp_read_byte(tp
, MCU_TYPE_USB
, EFUSE
);
1170 if ((ocp_data
& PASS_THRU_MASK
) != 1)
1173 /* returns _AUXMAC_#AABBCCDDEEFF# */
1174 status
= acpi_evaluate_object(NULL
, "\\_SB.AMAC", NULL
, &buffer
);
1175 obj
= (union acpi_object
*)buffer
.pointer
;
1176 if (!ACPI_SUCCESS(status
))
1178 if (obj
->type
!= ACPI_TYPE_BUFFER
|| obj
->string
.length
!= 0x17) {
1179 netif_warn(tp
, probe
, tp
->netdev
,
1180 "Invalid buffer for pass-thru MAC addr: (%d, %d)\n",
1181 obj
->type
, obj
->string
.length
);
1184 if (strncmp(obj
->string
.pointer
, "_AUXMAC_#", 9) != 0 ||
1185 strncmp(obj
->string
.pointer
+ 0x15, "#", 1) != 0) {
1186 netif_warn(tp
, probe
, tp
->netdev
,
1187 "Invalid header when reading pass-thru MAC addr\n");
1190 ret
= hex2bin(buf
, obj
->string
.pointer
+ 9, 6);
1191 if (!(ret
== 0 && is_valid_ether_addr(buf
))) {
1192 netif_warn(tp
, probe
, tp
->netdev
,
1193 "Invalid MAC for pass-thru MAC addr: %d, %pM\n",
1198 memcpy(sa
->sa_data
, buf
, 6);
1199 ether_addr_copy(tp
->netdev
->dev_addr
, sa
->sa_data
);
1200 netif_info(tp
, probe
, tp
->netdev
,
1201 "Using pass-thru MAC addr %pM\n", sa
->sa_data
);
1208 static int set_ethernet_addr(struct r8152
*tp
)
1210 struct net_device
*dev
= tp
->netdev
;
1214 if (tp
->version
== RTL_VER_01
) {
1215 ret
= pla_ocp_read(tp
, PLA_IDR
, 8, sa
.sa_data
);
1217 /* if this is not an RTL8153-AD, no eFuse mac pass thru set,
1218 * or system doesn't provide valid _SB.AMAC this will be
1219 * be expected to non-zero
1221 ret
= vendor_mac_passthru_addr_read(tp
, &sa
);
1223 ret
= pla_ocp_read(tp
, PLA_BACKUP
, 8, sa
.sa_data
);
1227 netif_err(tp
, probe
, dev
, "Get ether addr fail\n");
1228 } else if (!is_valid_ether_addr(sa
.sa_data
)) {
1229 netif_err(tp
, probe
, dev
, "Invalid ether addr %pM\n",
1231 eth_hw_addr_random(dev
);
1232 ether_addr_copy(sa
.sa_data
, dev
->dev_addr
);
1233 ret
= rtl8152_set_mac_address(dev
, &sa
);
1234 netif_info(tp
, probe
, dev
, "Random ether addr %pM\n",
1237 if (tp
->version
== RTL_VER_01
)
1238 ether_addr_copy(dev
->dev_addr
, sa
.sa_data
);
1240 ret
= rtl8152_set_mac_address(dev
, &sa
);
1246 static void read_bulk_callback(struct urb
*urb
)
1248 struct net_device
*netdev
;
1249 int status
= urb
->status
;
1261 if (test_bit(RTL8152_UNPLUG
, &tp
->flags
))
1264 if (!test_bit(WORK_ENABLE
, &tp
->flags
))
1267 netdev
= tp
->netdev
;
1269 /* When link down, the driver would cancel all bulks. */
1270 /* This avoid the re-submitting bulk */
1271 if (!netif_carrier_ok(netdev
))
1274 usb_mark_last_busy(tp
->udev
);
1278 if (urb
->actual_length
< ETH_ZLEN
)
1281 spin_lock(&tp
->rx_lock
);
1282 list_add_tail(&agg
->list
, &tp
->rx_done
);
1283 spin_unlock(&tp
->rx_lock
);
1284 napi_schedule(&tp
->napi
);
1287 set_bit(RTL8152_UNPLUG
, &tp
->flags
);
1288 netif_device_detach(tp
->netdev
);
1291 return; /* the urb is in unlink state */
1293 if (net_ratelimit())
1294 netdev_warn(netdev
, "maybe reset is needed?\n");
1297 if (net_ratelimit())
1298 netdev_warn(netdev
, "Rx status %d\n", status
);
1302 r8152_submit_rx(tp
, agg
, GFP_ATOMIC
);
1305 static void write_bulk_callback(struct urb
*urb
)
1307 struct net_device_stats
*stats
;
1308 struct net_device
*netdev
;
1311 int status
= urb
->status
;
1321 netdev
= tp
->netdev
;
1322 stats
= &netdev
->stats
;
1324 if (net_ratelimit())
1325 netdev_warn(netdev
, "Tx status %d\n", status
);
1326 stats
->tx_errors
+= agg
->skb_num
;
1328 stats
->tx_packets
+= agg
->skb_num
;
1329 stats
->tx_bytes
+= agg
->skb_len
;
1332 spin_lock(&tp
->tx_lock
);
1333 list_add_tail(&agg
->list
, &tp
->tx_free
);
1334 spin_unlock(&tp
->tx_lock
);
1336 usb_autopm_put_interface_async(tp
->intf
);
1338 if (!netif_carrier_ok(netdev
))
1341 if (!test_bit(WORK_ENABLE
, &tp
->flags
))
1344 if (test_bit(RTL8152_UNPLUG
, &tp
->flags
))
1347 if (!skb_queue_empty(&tp
->tx_queue
))
1348 napi_schedule(&tp
->napi
);
1351 static void intr_callback(struct urb
*urb
)
1355 int status
= urb
->status
;
1362 if (!test_bit(WORK_ENABLE
, &tp
->flags
))
1365 if (test_bit(RTL8152_UNPLUG
, &tp
->flags
))
1369 case 0: /* success */
1371 case -ECONNRESET
: /* unlink */
1373 netif_device_detach(tp
->netdev
);
1376 netif_info(tp
, intr
, tp
->netdev
,
1377 "Stop submitting intr, status %d\n", status
);
1380 netif_info(tp
, intr
, tp
->netdev
, "intr status -EOVERFLOW\n");
1382 /* -EPIPE: should clear the halt */
1384 netif_info(tp
, intr
, tp
->netdev
, "intr status %d\n", status
);
1388 d
= urb
->transfer_buffer
;
1389 if (INTR_LINK
& __le16_to_cpu(d
[0])) {
1390 if (!netif_carrier_ok(tp
->netdev
)) {
1391 set_bit(RTL8152_LINK_CHG
, &tp
->flags
);
1392 schedule_delayed_work(&tp
->schedule
, 0);
1395 if (netif_carrier_ok(tp
->netdev
)) {
1396 netif_stop_queue(tp
->netdev
);
1397 set_bit(RTL8152_LINK_CHG
, &tp
->flags
);
1398 schedule_delayed_work(&tp
->schedule
, 0);
1403 res
= usb_submit_urb(urb
, GFP_ATOMIC
);
1404 if (res
== -ENODEV
) {
1405 set_bit(RTL8152_UNPLUG
, &tp
->flags
);
1406 netif_device_detach(tp
->netdev
);
1408 netif_err(tp
, intr
, tp
->netdev
,
1409 "can't resubmit intr, status %d\n", res
);
1413 static inline void *rx_agg_align(void *data
)
1415 return (void *)ALIGN((uintptr_t)data
, RX_ALIGN
);
1418 static inline void *tx_agg_align(void *data
)
1420 return (void *)ALIGN((uintptr_t)data
, TX_ALIGN
);
1423 static void free_all_mem(struct r8152
*tp
)
1427 for (i
= 0; i
< RTL8152_MAX_RX
; i
++) {
1428 usb_free_urb(tp
->rx_info
[i
].urb
);
1429 tp
->rx_info
[i
].urb
= NULL
;
1431 kfree(tp
->rx_info
[i
].buffer
);
1432 tp
->rx_info
[i
].buffer
= NULL
;
1433 tp
->rx_info
[i
].head
= NULL
;
1436 for (i
= 0; i
< RTL8152_MAX_TX
; i
++) {
1437 usb_free_urb(tp
->tx_info
[i
].urb
);
1438 tp
->tx_info
[i
].urb
= NULL
;
1440 kfree(tp
->tx_info
[i
].buffer
);
1441 tp
->tx_info
[i
].buffer
= NULL
;
1442 tp
->tx_info
[i
].head
= NULL
;
1445 usb_free_urb(tp
->intr_urb
);
1446 tp
->intr_urb
= NULL
;
1448 kfree(tp
->intr_buff
);
1449 tp
->intr_buff
= NULL
;
1452 static int alloc_all_mem(struct r8152
*tp
)
1454 struct net_device
*netdev
= tp
->netdev
;
1455 struct usb_interface
*intf
= tp
->intf
;
1456 struct usb_host_interface
*alt
= intf
->cur_altsetting
;
1457 struct usb_host_endpoint
*ep_intr
= alt
->endpoint
+ 2;
1462 node
= netdev
->dev
.parent
? dev_to_node(netdev
->dev
.parent
) : -1;
1464 spin_lock_init(&tp
->rx_lock
);
1465 spin_lock_init(&tp
->tx_lock
);
1466 INIT_LIST_HEAD(&tp
->tx_free
);
1467 INIT_LIST_HEAD(&tp
->rx_done
);
1468 skb_queue_head_init(&tp
->tx_queue
);
1469 skb_queue_head_init(&tp
->rx_queue
);
1471 for (i
= 0; i
< RTL8152_MAX_RX
; i
++) {
1472 buf
= kmalloc_node(agg_buf_sz
, GFP_KERNEL
, node
);
1476 if (buf
!= rx_agg_align(buf
)) {
1478 buf
= kmalloc_node(agg_buf_sz
+ RX_ALIGN
, GFP_KERNEL
,
1484 urb
= usb_alloc_urb(0, GFP_KERNEL
);
1490 INIT_LIST_HEAD(&tp
->rx_info
[i
].list
);
1491 tp
->rx_info
[i
].context
= tp
;
1492 tp
->rx_info
[i
].urb
= urb
;
1493 tp
->rx_info
[i
].buffer
= buf
;
1494 tp
->rx_info
[i
].head
= rx_agg_align(buf
);
1497 for (i
= 0; i
< RTL8152_MAX_TX
; i
++) {
1498 buf
= kmalloc_node(agg_buf_sz
, GFP_KERNEL
, node
);
1502 if (buf
!= tx_agg_align(buf
)) {
1504 buf
= kmalloc_node(agg_buf_sz
+ TX_ALIGN
, GFP_KERNEL
,
1510 urb
= usb_alloc_urb(0, GFP_KERNEL
);
1516 INIT_LIST_HEAD(&tp
->tx_info
[i
].list
);
1517 tp
->tx_info
[i
].context
= tp
;
1518 tp
->tx_info
[i
].urb
= urb
;
1519 tp
->tx_info
[i
].buffer
= buf
;
1520 tp
->tx_info
[i
].head
= tx_agg_align(buf
);
1522 list_add_tail(&tp
->tx_info
[i
].list
, &tp
->tx_free
);
1525 tp
->intr_urb
= usb_alloc_urb(0, GFP_KERNEL
);
1529 tp
->intr_buff
= kmalloc(INTBUFSIZE
, GFP_KERNEL
);
1533 tp
->intr_interval
= (int)ep_intr
->desc
.bInterval
;
1534 usb_fill_int_urb(tp
->intr_urb
, tp
->udev
, usb_rcvintpipe(tp
->udev
, 3),
1535 tp
->intr_buff
, INTBUFSIZE
, intr_callback
,
1536 tp
, tp
->intr_interval
);
1545 static struct tx_agg
*r8152_get_tx_agg(struct r8152
*tp
)
1547 struct tx_agg
*agg
= NULL
;
1548 unsigned long flags
;
1550 if (list_empty(&tp
->tx_free
))
1553 spin_lock_irqsave(&tp
->tx_lock
, flags
);
1554 if (!list_empty(&tp
->tx_free
)) {
1555 struct list_head
*cursor
;
1557 cursor
= tp
->tx_free
.next
;
1558 list_del_init(cursor
);
1559 agg
= list_entry(cursor
, struct tx_agg
, list
);
1561 spin_unlock_irqrestore(&tp
->tx_lock
, flags
);
1566 /* r8152_csum_workaround()
1567 * The hw limites the value the transport offset. When the offset is out of the
1568 * range, calculate the checksum by sw.
1570 static void r8152_csum_workaround(struct r8152
*tp
, struct sk_buff
*skb
,
1571 struct sk_buff_head
*list
)
1573 if (skb_shinfo(skb
)->gso_size
) {
1574 netdev_features_t features
= tp
->netdev
->features
;
1575 struct sk_buff_head seg_list
;
1576 struct sk_buff
*segs
, *nskb
;
1578 features
&= ~(NETIF_F_SG
| NETIF_F_IPV6_CSUM
| NETIF_F_TSO6
);
1579 segs
= skb_gso_segment(skb
, features
);
1580 if (IS_ERR(segs
) || !segs
)
1583 __skb_queue_head_init(&seg_list
);
1589 __skb_queue_tail(&seg_list
, nskb
);
1592 skb_queue_splice(&seg_list
, list
);
1594 } else if (skb
->ip_summed
== CHECKSUM_PARTIAL
) {
1595 if (skb_checksum_help(skb
) < 0)
1598 __skb_queue_head(list
, skb
);
1600 struct net_device_stats
*stats
;
1603 stats
= &tp
->netdev
->stats
;
1604 stats
->tx_dropped
++;
1609 /* msdn_giant_send_check()
1610 * According to the document of microsoft, the TCP Pseudo Header excludes the
1611 * packet length for IPv6 TCP large packets.
1613 static int msdn_giant_send_check(struct sk_buff
*skb
)
1615 const struct ipv6hdr
*ipv6h
;
1619 ret
= skb_cow_head(skb
, 0);
1623 ipv6h
= ipv6_hdr(skb
);
1627 th
->check
= ~tcp_v6_check(0, &ipv6h
->saddr
, &ipv6h
->daddr
, 0);
1632 static inline void rtl_tx_vlan_tag(struct tx_desc
*desc
, struct sk_buff
*skb
)
1634 if (skb_vlan_tag_present(skb
)) {
1637 opts2
= TX_VLAN_TAG
| swab16(skb_vlan_tag_get(skb
));
1638 desc
->opts2
|= cpu_to_le32(opts2
);
1642 static inline void rtl_rx_vlan_tag(struct rx_desc
*desc
, struct sk_buff
*skb
)
1644 u32 opts2
= le32_to_cpu(desc
->opts2
);
1646 if (opts2
& RX_VLAN_TAG
)
1647 __vlan_hwaccel_put_tag(skb
, htons(ETH_P_8021Q
),
1648 swab16(opts2
& 0xffff));
1651 static int r8152_tx_csum(struct r8152
*tp
, struct tx_desc
*desc
,
1652 struct sk_buff
*skb
, u32 len
, u32 transport_offset
)
1654 u32 mss
= skb_shinfo(skb
)->gso_size
;
1655 u32 opts1
, opts2
= 0;
1656 int ret
= TX_CSUM_SUCCESS
;
1658 WARN_ON_ONCE(len
> TX_LEN_MAX
);
1660 opts1
= len
| TX_FS
| TX_LS
;
1663 if (transport_offset
> GTTCPHO_MAX
) {
1664 netif_warn(tp
, tx_err
, tp
->netdev
,
1665 "Invalid transport offset 0x%x for TSO\n",
1671 switch (vlan_get_protocol(skb
)) {
1672 case htons(ETH_P_IP
):
1676 case htons(ETH_P_IPV6
):
1677 if (msdn_giant_send_check(skb
)) {
1689 opts1
|= transport_offset
<< GTTCPHO_SHIFT
;
1690 opts2
|= min(mss
, MSS_MAX
) << MSS_SHIFT
;
1691 } else if (skb
->ip_summed
== CHECKSUM_PARTIAL
) {
1694 if (transport_offset
> TCPHO_MAX
) {
1695 netif_warn(tp
, tx_err
, tp
->netdev
,
1696 "Invalid transport offset 0x%x\n",
1702 switch (vlan_get_protocol(skb
)) {
1703 case htons(ETH_P_IP
):
1705 ip_protocol
= ip_hdr(skb
)->protocol
;
1708 case htons(ETH_P_IPV6
):
1710 ip_protocol
= ipv6_hdr(skb
)->nexthdr
;
1714 ip_protocol
= IPPROTO_RAW
;
1718 if (ip_protocol
== IPPROTO_TCP
)
1720 else if (ip_protocol
== IPPROTO_UDP
)
1725 opts2
|= transport_offset
<< TCPHO_SHIFT
;
1728 desc
->opts2
= cpu_to_le32(opts2
);
1729 desc
->opts1
= cpu_to_le32(opts1
);
1735 static int r8152_tx_agg_fill(struct r8152
*tp
, struct tx_agg
*agg
)
1737 struct sk_buff_head skb_head
, *tx_queue
= &tp
->tx_queue
;
1741 __skb_queue_head_init(&skb_head
);
1742 spin_lock(&tx_queue
->lock
);
1743 skb_queue_splice_init(tx_queue
, &skb_head
);
1744 spin_unlock(&tx_queue
->lock
);
1746 tx_data
= agg
->head
;
1749 remain
= agg_buf_sz
;
1751 while (remain
>= ETH_ZLEN
+ sizeof(struct tx_desc
)) {
1752 struct tx_desc
*tx_desc
;
1753 struct sk_buff
*skb
;
1757 skb
= __skb_dequeue(&skb_head
);
1761 len
= skb
->len
+ sizeof(*tx_desc
);
1764 __skb_queue_head(&skb_head
, skb
);
1768 tx_data
= tx_agg_align(tx_data
);
1769 tx_desc
= (struct tx_desc
*)tx_data
;
1771 offset
= (u32
)skb_transport_offset(skb
);
1773 if (r8152_tx_csum(tp
, tx_desc
, skb
, skb
->len
, offset
)) {
1774 r8152_csum_workaround(tp
, skb
, &skb_head
);
1778 rtl_tx_vlan_tag(tx_desc
, skb
);
1780 tx_data
+= sizeof(*tx_desc
);
1783 if (skb_copy_bits(skb
, 0, tx_data
, len
) < 0) {
1784 struct net_device_stats
*stats
= &tp
->netdev
->stats
;
1786 stats
->tx_dropped
++;
1787 dev_kfree_skb_any(skb
);
1788 tx_data
-= sizeof(*tx_desc
);
1793 agg
->skb_len
+= len
;
1796 dev_kfree_skb_any(skb
);
1798 remain
= agg_buf_sz
- (int)(tx_agg_align(tx_data
) - agg
->head
);
1801 if (!skb_queue_empty(&skb_head
)) {
1802 spin_lock(&tx_queue
->lock
);
1803 skb_queue_splice(&skb_head
, tx_queue
);
1804 spin_unlock(&tx_queue
->lock
);
1807 netif_tx_lock(tp
->netdev
);
1809 if (netif_queue_stopped(tp
->netdev
) &&
1810 skb_queue_len(&tp
->tx_queue
) < tp
->tx_qlen
)
1811 netif_wake_queue(tp
->netdev
);
1813 netif_tx_unlock(tp
->netdev
);
1815 ret
= usb_autopm_get_interface_async(tp
->intf
);
1819 usb_fill_bulk_urb(agg
->urb
, tp
->udev
, usb_sndbulkpipe(tp
->udev
, 2),
1820 agg
->head
, (int)(tx_data
- (u8
*)agg
->head
),
1821 (usb_complete_t
)write_bulk_callback
, agg
);
1823 ret
= usb_submit_urb(agg
->urb
, GFP_ATOMIC
);
1825 usb_autopm_put_interface_async(tp
->intf
);
1831 static u8
r8152_rx_csum(struct r8152
*tp
, struct rx_desc
*rx_desc
)
1833 u8 checksum
= CHECKSUM_NONE
;
1836 if (!(tp
->netdev
->features
& NETIF_F_RXCSUM
))
1839 opts2
= le32_to_cpu(rx_desc
->opts2
);
1840 opts3
= le32_to_cpu(rx_desc
->opts3
);
1842 if (opts2
& RD_IPV4_CS
) {
1844 checksum
= CHECKSUM_NONE
;
1845 else if ((opts2
& RD_UDP_CS
) && (opts3
& UDPF
))
1846 checksum
= CHECKSUM_NONE
;
1847 else if ((opts2
& RD_TCP_CS
) && (opts3
& TCPF
))
1848 checksum
= CHECKSUM_NONE
;
1850 checksum
= CHECKSUM_UNNECESSARY
;
1851 } else if (opts2
& RD_IPV6_CS
) {
1852 if ((opts2
& RD_UDP_CS
) && !(opts3
& UDPF
))
1853 checksum
= CHECKSUM_UNNECESSARY
;
1854 else if ((opts2
& RD_TCP_CS
) && !(opts3
& TCPF
))
1855 checksum
= CHECKSUM_UNNECESSARY
;
1862 static int rx_bottom(struct r8152
*tp
, int budget
)
1864 unsigned long flags
;
1865 struct list_head
*cursor
, *next
, rx_queue
;
1866 int ret
= 0, work_done
= 0;
1867 struct napi_struct
*napi
= &tp
->napi
;
1869 if (!skb_queue_empty(&tp
->rx_queue
)) {
1870 while (work_done
< budget
) {
1871 struct sk_buff
*skb
= __skb_dequeue(&tp
->rx_queue
);
1872 struct net_device
*netdev
= tp
->netdev
;
1873 struct net_device_stats
*stats
= &netdev
->stats
;
1874 unsigned int pkt_len
;
1880 napi_gro_receive(napi
, skb
);
1882 stats
->rx_packets
++;
1883 stats
->rx_bytes
+= pkt_len
;
1887 if (list_empty(&tp
->rx_done
))
1890 INIT_LIST_HEAD(&rx_queue
);
1891 spin_lock_irqsave(&tp
->rx_lock
, flags
);
1892 list_splice_init(&tp
->rx_done
, &rx_queue
);
1893 spin_unlock_irqrestore(&tp
->rx_lock
, flags
);
1895 list_for_each_safe(cursor
, next
, &rx_queue
) {
1896 struct rx_desc
*rx_desc
;
1902 list_del_init(cursor
);
1904 agg
= list_entry(cursor
, struct rx_agg
, list
);
1906 if (urb
->actual_length
< ETH_ZLEN
)
1909 rx_desc
= agg
->head
;
1910 rx_data
= agg
->head
;
1911 len_used
+= sizeof(struct rx_desc
);
1913 while (urb
->actual_length
> len_used
) {
1914 struct net_device
*netdev
= tp
->netdev
;
1915 struct net_device_stats
*stats
= &netdev
->stats
;
1916 unsigned int pkt_len
;
1917 struct sk_buff
*skb
;
1919 /* limite the skb numbers for rx_queue */
1920 if (unlikely(skb_queue_len(&tp
->rx_queue
) >= 1000))
1923 pkt_len
= le32_to_cpu(rx_desc
->opts1
) & RX_LEN_MASK
;
1924 if (pkt_len
< ETH_ZLEN
)
1927 len_used
+= pkt_len
;
1928 if (urb
->actual_length
< len_used
)
1931 pkt_len
-= ETH_FCS_LEN
;
1932 rx_data
+= sizeof(struct rx_desc
);
1934 skb
= napi_alloc_skb(napi
, pkt_len
);
1936 stats
->rx_dropped
++;
1940 skb
->ip_summed
= r8152_rx_csum(tp
, rx_desc
);
1941 memcpy(skb
->data
, rx_data
, pkt_len
);
1942 skb_put(skb
, pkt_len
);
1943 skb
->protocol
= eth_type_trans(skb
, netdev
);
1944 rtl_rx_vlan_tag(rx_desc
, skb
);
1945 if (work_done
< budget
) {
1946 napi_gro_receive(napi
, skb
);
1948 stats
->rx_packets
++;
1949 stats
->rx_bytes
+= pkt_len
;
1951 __skb_queue_tail(&tp
->rx_queue
, skb
);
1955 rx_data
= rx_agg_align(rx_data
+ pkt_len
+ ETH_FCS_LEN
);
1956 rx_desc
= (struct rx_desc
*)rx_data
;
1957 len_used
= (int)(rx_data
- (u8
*)agg
->head
);
1958 len_used
+= sizeof(struct rx_desc
);
1963 ret
= r8152_submit_rx(tp
, agg
, GFP_ATOMIC
);
1965 urb
->actual_length
= 0;
1966 list_add_tail(&agg
->list
, next
);
1970 if (!list_empty(&rx_queue
)) {
1971 spin_lock_irqsave(&tp
->rx_lock
, flags
);
1972 list_splice_tail(&rx_queue
, &tp
->rx_done
);
1973 spin_unlock_irqrestore(&tp
->rx_lock
, flags
);
1980 static void tx_bottom(struct r8152
*tp
)
1987 if (skb_queue_empty(&tp
->tx_queue
))
1990 agg
= r8152_get_tx_agg(tp
);
1994 res
= r8152_tx_agg_fill(tp
, agg
);
1996 struct net_device
*netdev
= tp
->netdev
;
1998 if (res
== -ENODEV
) {
1999 set_bit(RTL8152_UNPLUG
, &tp
->flags
);
2000 netif_device_detach(netdev
);
2002 struct net_device_stats
*stats
= &netdev
->stats
;
2003 unsigned long flags
;
2005 netif_warn(tp
, tx_err
, netdev
,
2006 "failed tx_urb %d\n", res
);
2007 stats
->tx_dropped
+= agg
->skb_num
;
2009 spin_lock_irqsave(&tp
->tx_lock
, flags
);
2010 list_add_tail(&agg
->list
, &tp
->tx_free
);
2011 spin_unlock_irqrestore(&tp
->tx_lock
, flags
);
2017 static void bottom_half(struct r8152
*tp
)
2019 if (test_bit(RTL8152_UNPLUG
, &tp
->flags
))
2022 if (!test_bit(WORK_ENABLE
, &tp
->flags
))
2025 /* When link down, the driver would cancel all bulks. */
2026 /* This avoid the re-submitting bulk */
2027 if (!netif_carrier_ok(tp
->netdev
))
2030 clear_bit(SCHEDULE_NAPI
, &tp
->flags
);
2035 static int r8152_poll(struct napi_struct
*napi
, int budget
)
2037 struct r8152
*tp
= container_of(napi
, struct r8152
, napi
);
2040 work_done
= rx_bottom(tp
, budget
);
2043 if (work_done
< budget
) {
2044 if (!napi_complete_done(napi
, work_done
))
2046 if (!list_empty(&tp
->rx_done
))
2047 napi_schedule(napi
);
2048 else if (!skb_queue_empty(&tp
->tx_queue
) &&
2049 !list_empty(&tp
->tx_free
))
2050 napi_schedule(napi
);
2058 int r8152_submit_rx(struct r8152
*tp
, struct rx_agg
*agg
, gfp_t mem_flags
)
2062 /* The rx would be stopped, so skip submitting */
2063 if (test_bit(RTL8152_UNPLUG
, &tp
->flags
) ||
2064 !test_bit(WORK_ENABLE
, &tp
->flags
) || !netif_carrier_ok(tp
->netdev
))
2067 usb_fill_bulk_urb(agg
->urb
, tp
->udev
, usb_rcvbulkpipe(tp
->udev
, 1),
2068 agg
->head
, agg_buf_sz
,
2069 (usb_complete_t
)read_bulk_callback
, agg
);
2071 ret
= usb_submit_urb(agg
->urb
, mem_flags
);
2072 if (ret
== -ENODEV
) {
2073 set_bit(RTL8152_UNPLUG
, &tp
->flags
);
2074 netif_device_detach(tp
->netdev
);
2076 struct urb
*urb
= agg
->urb
;
2077 unsigned long flags
;
2079 urb
->actual_length
= 0;
2080 spin_lock_irqsave(&tp
->rx_lock
, flags
);
2081 list_add_tail(&agg
->list
, &tp
->rx_done
);
2082 spin_unlock_irqrestore(&tp
->rx_lock
, flags
);
2084 netif_err(tp
, rx_err
, tp
->netdev
,
2085 "Couldn't submit rx[%p], ret = %d\n", agg
, ret
);
2087 napi_schedule(&tp
->napi
);
2093 static void rtl_drop_queued_tx(struct r8152
*tp
)
2095 struct net_device_stats
*stats
= &tp
->netdev
->stats
;
2096 struct sk_buff_head skb_head
, *tx_queue
= &tp
->tx_queue
;
2097 struct sk_buff
*skb
;
2099 if (skb_queue_empty(tx_queue
))
2102 __skb_queue_head_init(&skb_head
);
2103 spin_lock_bh(&tx_queue
->lock
);
2104 skb_queue_splice_init(tx_queue
, &skb_head
);
2105 spin_unlock_bh(&tx_queue
->lock
);
2107 while ((skb
= __skb_dequeue(&skb_head
))) {
2109 stats
->tx_dropped
++;
2113 static void rtl8152_tx_timeout(struct net_device
*netdev
)
2115 struct r8152
*tp
= netdev_priv(netdev
);
2117 netif_warn(tp
, tx_err
, netdev
, "Tx timeout\n");
2119 usb_queue_reset_device(tp
->intf
);
2122 static void rtl8152_set_rx_mode(struct net_device
*netdev
)
2124 struct r8152
*tp
= netdev_priv(netdev
);
2126 if (netif_carrier_ok(netdev
)) {
2127 set_bit(RTL8152_SET_RX_MODE
, &tp
->flags
);
2128 schedule_delayed_work(&tp
->schedule
, 0);
2132 static void _rtl8152_set_rx_mode(struct net_device
*netdev
)
2134 struct r8152
*tp
= netdev_priv(netdev
);
2135 u32 mc_filter
[2]; /* Multicast hash filter */
2139 netif_stop_queue(netdev
);
2140 ocp_data
= ocp_read_dword(tp
, MCU_TYPE_PLA
, PLA_RCR
);
2141 ocp_data
&= ~RCR_ACPT_ALL
;
2142 ocp_data
|= RCR_AB
| RCR_APM
;
2144 if (netdev
->flags
& IFF_PROMISC
) {
2145 /* Unconditionally log net taps. */
2146 netif_notice(tp
, link
, netdev
, "Promiscuous mode enabled\n");
2147 ocp_data
|= RCR_AM
| RCR_AAP
;
2148 mc_filter
[1] = 0xffffffff;
2149 mc_filter
[0] = 0xffffffff;
2150 } else if ((netdev_mc_count(netdev
) > multicast_filter_limit
) ||
2151 (netdev
->flags
& IFF_ALLMULTI
)) {
2152 /* Too many to filter perfectly -- accept all multicasts. */
2154 mc_filter
[1] = 0xffffffff;
2155 mc_filter
[0] = 0xffffffff;
2157 struct netdev_hw_addr
*ha
;
2161 netdev_for_each_mc_addr(ha
, netdev
) {
2162 int bit_nr
= ether_crc(ETH_ALEN
, ha
->addr
) >> 26;
2164 mc_filter
[bit_nr
>> 5] |= 1 << (bit_nr
& 31);
2169 tmp
[0] = __cpu_to_le32(swab32(mc_filter
[1]));
2170 tmp
[1] = __cpu_to_le32(swab32(mc_filter
[0]));
2172 pla_ocp_write(tp
, PLA_MAR
, BYTE_EN_DWORD
, sizeof(tmp
), tmp
);
2173 ocp_write_dword(tp
, MCU_TYPE_PLA
, PLA_RCR
, ocp_data
);
2174 netif_wake_queue(netdev
);
2177 static netdev_features_t
2178 rtl8152_features_check(struct sk_buff
*skb
, struct net_device
*dev
,
2179 netdev_features_t features
)
2181 u32 mss
= skb_shinfo(skb
)->gso_size
;
2182 int max_offset
= mss
? GTTCPHO_MAX
: TCPHO_MAX
;
2183 int offset
= skb_transport_offset(skb
);
2185 if ((mss
|| skb
->ip_summed
== CHECKSUM_PARTIAL
) && offset
> max_offset
)
2186 features
&= ~(NETIF_F_CSUM_MASK
| NETIF_F_GSO_MASK
);
2187 else if ((skb
->len
+ sizeof(struct tx_desc
)) > agg_buf_sz
)
2188 features
&= ~NETIF_F_GSO_MASK
;
2193 static netdev_tx_t
rtl8152_start_xmit(struct sk_buff
*skb
,
2194 struct net_device
*netdev
)
2196 struct r8152
*tp
= netdev_priv(netdev
);
2198 skb_tx_timestamp(skb
);
2200 skb_queue_tail(&tp
->tx_queue
, skb
);
2202 if (!list_empty(&tp
->tx_free
)) {
2203 if (test_bit(SELECTIVE_SUSPEND
, &tp
->flags
)) {
2204 set_bit(SCHEDULE_NAPI
, &tp
->flags
);
2205 schedule_delayed_work(&tp
->schedule
, 0);
2207 usb_mark_last_busy(tp
->udev
);
2208 napi_schedule(&tp
->napi
);
2210 } else if (skb_queue_len(&tp
->tx_queue
) > tp
->tx_qlen
) {
2211 netif_stop_queue(netdev
);
2214 return NETDEV_TX_OK
;
2217 static void r8152b_reset_packet_filter(struct r8152
*tp
)
2221 ocp_data
= ocp_read_word(tp
, MCU_TYPE_PLA
, PLA_FMC
);
2222 ocp_data
&= ~FMC_FCR_MCU_EN
;
2223 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_FMC
, ocp_data
);
2224 ocp_data
|= FMC_FCR_MCU_EN
;
2225 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_FMC
, ocp_data
);
2228 static void rtl8152_nic_reset(struct r8152
*tp
)
2232 ocp_write_byte(tp
, MCU_TYPE_PLA
, PLA_CR
, CR_RST
);
2234 for (i
= 0; i
< 1000; i
++) {
2235 if (!(ocp_read_byte(tp
, MCU_TYPE_PLA
, PLA_CR
) & CR_RST
))
2237 usleep_range(100, 400);
2241 static void set_tx_qlen(struct r8152
*tp
)
2243 struct net_device
*netdev
= tp
->netdev
;
2245 tp
->tx_qlen
= agg_buf_sz
/ (netdev
->mtu
+ VLAN_ETH_HLEN
+ ETH_FCS_LEN
+
2246 sizeof(struct tx_desc
));
2249 static inline u8
rtl8152_get_speed(struct r8152
*tp
)
2251 return ocp_read_byte(tp
, MCU_TYPE_PLA
, PLA_PHYSTATUS
);
2254 static void rtl_set_eee_plus(struct r8152
*tp
)
2259 speed
= rtl8152_get_speed(tp
);
2260 if (speed
& _10bps
) {
2261 ocp_data
= ocp_read_word(tp
, MCU_TYPE_PLA
, PLA_EEEP_CR
);
2262 ocp_data
|= EEEP_CR_EEEP_TX
;
2263 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_EEEP_CR
, ocp_data
);
2265 ocp_data
= ocp_read_word(tp
, MCU_TYPE_PLA
, PLA_EEEP_CR
);
2266 ocp_data
&= ~EEEP_CR_EEEP_TX
;
2267 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_EEEP_CR
, ocp_data
);
2271 static void rxdy_gated_en(struct r8152
*tp
, bool enable
)
2275 ocp_data
= ocp_read_word(tp
, MCU_TYPE_PLA
, PLA_MISC_1
);
2277 ocp_data
|= RXDY_GATED_EN
;
2279 ocp_data
&= ~RXDY_GATED_EN
;
2280 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_MISC_1
, ocp_data
);
2283 static int rtl_start_rx(struct r8152
*tp
)
2287 INIT_LIST_HEAD(&tp
->rx_done
);
2288 for (i
= 0; i
< RTL8152_MAX_RX
; i
++) {
2289 INIT_LIST_HEAD(&tp
->rx_info
[i
].list
);
2290 ret
= r8152_submit_rx(tp
, &tp
->rx_info
[i
], GFP_KERNEL
);
2295 if (ret
&& ++i
< RTL8152_MAX_RX
) {
2296 struct list_head rx_queue
;
2297 unsigned long flags
;
2299 INIT_LIST_HEAD(&rx_queue
);
2302 struct rx_agg
*agg
= &tp
->rx_info
[i
++];
2303 struct urb
*urb
= agg
->urb
;
2305 urb
->actual_length
= 0;
2306 list_add_tail(&agg
->list
, &rx_queue
);
2307 } while (i
< RTL8152_MAX_RX
);
2309 spin_lock_irqsave(&tp
->rx_lock
, flags
);
2310 list_splice_tail(&rx_queue
, &tp
->rx_done
);
2311 spin_unlock_irqrestore(&tp
->rx_lock
, flags
);
2317 static int rtl_stop_rx(struct r8152
*tp
)
2321 for (i
= 0; i
< RTL8152_MAX_RX
; i
++)
2322 usb_kill_urb(tp
->rx_info
[i
].urb
);
2324 while (!skb_queue_empty(&tp
->rx_queue
))
2325 dev_kfree_skb(__skb_dequeue(&tp
->rx_queue
));
2330 static int rtl_enable(struct r8152
*tp
)
2334 r8152b_reset_packet_filter(tp
);
2336 ocp_data
= ocp_read_byte(tp
, MCU_TYPE_PLA
, PLA_CR
);
2337 ocp_data
|= CR_RE
| CR_TE
;
2338 ocp_write_byte(tp
, MCU_TYPE_PLA
, PLA_CR
, ocp_data
);
2340 rxdy_gated_en(tp
, false);
2345 static int rtl8152_enable(struct r8152
*tp
)
2347 if (test_bit(RTL8152_UNPLUG
, &tp
->flags
))
2351 rtl_set_eee_plus(tp
);
2353 return rtl_enable(tp
);
2356 static inline void r8153b_rx_agg_chg_indicate(struct r8152
*tp
)
2358 ocp_write_byte(tp
, MCU_TYPE_USB
, USB_UPT_RXDMA_OWN
,
2359 OWN_UPDATE
| OWN_CLEAR
);
2362 static void r8153_set_rx_early_timeout(struct r8152
*tp
)
2364 u32 ocp_data
= tp
->coalesce
/ 8;
2366 switch (tp
->version
) {
2371 ocp_write_word(tp
, MCU_TYPE_USB
, USB_RX_EARLY_TIMEOUT
,
2377 /* The RTL8153B uses USB_RX_EXTRA_AGGR_TMR for rx timeout
2378 * primarily. For USB_RX_EARLY_TIMEOUT, we fix it to 128ns.
2380 ocp_write_word(tp
, MCU_TYPE_USB
, USB_RX_EARLY_TIMEOUT
,
2382 ocp_write_word(tp
, MCU_TYPE_USB
, USB_RX_EXTRA_AGGR_TMR
,
2384 r8153b_rx_agg_chg_indicate(tp
);
2392 static void r8153_set_rx_early_size(struct r8152
*tp
)
2394 u32 ocp_data
= agg_buf_sz
- rx_reserved_size(tp
->netdev
->mtu
);
2396 switch (tp
->version
) {
2401 ocp_write_word(tp
, MCU_TYPE_USB
, USB_RX_EARLY_SIZE
,
2406 ocp_write_word(tp
, MCU_TYPE_USB
, USB_RX_EARLY_SIZE
,
2408 r8153b_rx_agg_chg_indicate(tp
);
2416 static int rtl8153_enable(struct r8152
*tp
)
2418 if (test_bit(RTL8152_UNPLUG
, &tp
->flags
))
2422 rtl_set_eee_plus(tp
);
2423 r8153_set_rx_early_timeout(tp
);
2424 r8153_set_rx_early_size(tp
);
2426 return rtl_enable(tp
);
2429 static void rtl_disable(struct r8152
*tp
)
2434 if (test_bit(RTL8152_UNPLUG
, &tp
->flags
)) {
2435 rtl_drop_queued_tx(tp
);
2439 ocp_data
= ocp_read_dword(tp
, MCU_TYPE_PLA
, PLA_RCR
);
2440 ocp_data
&= ~RCR_ACPT_ALL
;
2441 ocp_write_dword(tp
, MCU_TYPE_PLA
, PLA_RCR
, ocp_data
);
2443 rtl_drop_queued_tx(tp
);
2445 for (i
= 0; i
< RTL8152_MAX_TX
; i
++)
2446 usb_kill_urb(tp
->tx_info
[i
].urb
);
2448 rxdy_gated_en(tp
, true);
2450 for (i
= 0; i
< 1000; i
++) {
2451 ocp_data
= ocp_read_byte(tp
, MCU_TYPE_PLA
, PLA_OOB_CTRL
);
2452 if ((ocp_data
& FIFO_EMPTY
) == FIFO_EMPTY
)
2454 usleep_range(1000, 2000);
2457 for (i
= 0; i
< 1000; i
++) {
2458 if (ocp_read_word(tp
, MCU_TYPE_PLA
, PLA_TCR0
) & TCR0_TX_EMPTY
)
2460 usleep_range(1000, 2000);
2465 rtl8152_nic_reset(tp
);
2468 static void r8152_power_cut_en(struct r8152
*tp
, bool enable
)
2472 ocp_data
= ocp_read_word(tp
, MCU_TYPE_USB
, USB_UPS_CTRL
);
2474 ocp_data
|= POWER_CUT
;
2476 ocp_data
&= ~POWER_CUT
;
2477 ocp_write_word(tp
, MCU_TYPE_USB
, USB_UPS_CTRL
, ocp_data
);
2479 ocp_data
= ocp_read_word(tp
, MCU_TYPE_USB
, USB_PM_CTRL_STATUS
);
2480 ocp_data
&= ~RESUME_INDICATE
;
2481 ocp_write_word(tp
, MCU_TYPE_USB
, USB_PM_CTRL_STATUS
, ocp_data
);
2484 static void rtl_rx_vlan_en(struct r8152
*tp
, bool enable
)
2488 ocp_data
= ocp_read_word(tp
, MCU_TYPE_PLA
, PLA_CPCR
);
2490 ocp_data
|= CPCR_RX_VLAN
;
2492 ocp_data
&= ~CPCR_RX_VLAN
;
2493 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_CPCR
, ocp_data
);
2496 static int rtl8152_set_features(struct net_device
*dev
,
2497 netdev_features_t features
)
2499 netdev_features_t changed
= features
^ dev
->features
;
2500 struct r8152
*tp
= netdev_priv(dev
);
2503 ret
= usb_autopm_get_interface(tp
->intf
);
2507 mutex_lock(&tp
->control
);
2509 if (changed
& NETIF_F_HW_VLAN_CTAG_RX
) {
2510 if (features
& NETIF_F_HW_VLAN_CTAG_RX
)
2511 rtl_rx_vlan_en(tp
, true);
2513 rtl_rx_vlan_en(tp
, false);
2516 mutex_unlock(&tp
->control
);
2518 usb_autopm_put_interface(tp
->intf
);
2524 #define WAKE_ANY (WAKE_PHY | WAKE_MAGIC | WAKE_UCAST | WAKE_BCAST | WAKE_MCAST)
2526 static u32
__rtl_get_wol(struct r8152
*tp
)
2531 ocp_data
= ocp_read_word(tp
, MCU_TYPE_PLA
, PLA_CONFIG34
);
2532 if (ocp_data
& LINK_ON_WAKE_EN
)
2533 wolopts
|= WAKE_PHY
;
2535 ocp_data
= ocp_read_word(tp
, MCU_TYPE_PLA
, PLA_CONFIG5
);
2536 if (ocp_data
& UWF_EN
)
2537 wolopts
|= WAKE_UCAST
;
2538 if (ocp_data
& BWF_EN
)
2539 wolopts
|= WAKE_BCAST
;
2540 if (ocp_data
& MWF_EN
)
2541 wolopts
|= WAKE_MCAST
;
2543 ocp_data
= ocp_read_word(tp
, MCU_TYPE_PLA
, PLA_CFG_WOL
);
2544 if (ocp_data
& MAGIC_EN
)
2545 wolopts
|= WAKE_MAGIC
;
2550 static void __rtl_set_wol(struct r8152
*tp
, u32 wolopts
)
2554 ocp_write_byte(tp
, MCU_TYPE_PLA
, PLA_CRWECR
, CRWECR_CONFIG
);
2556 ocp_data
= ocp_read_word(tp
, MCU_TYPE_PLA
, PLA_CONFIG34
);
2557 ocp_data
&= ~LINK_ON_WAKE_EN
;
2558 if (wolopts
& WAKE_PHY
)
2559 ocp_data
|= LINK_ON_WAKE_EN
;
2560 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_CONFIG34
, ocp_data
);
2562 ocp_data
= ocp_read_word(tp
, MCU_TYPE_PLA
, PLA_CONFIG5
);
2563 ocp_data
&= ~(UWF_EN
| BWF_EN
| MWF_EN
);
2564 if (wolopts
& WAKE_UCAST
)
2566 if (wolopts
& WAKE_BCAST
)
2568 if (wolopts
& WAKE_MCAST
)
2570 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_CONFIG5
, ocp_data
);
2572 ocp_write_byte(tp
, MCU_TYPE_PLA
, PLA_CRWECR
, CRWECR_NORAML
);
2574 ocp_data
= ocp_read_word(tp
, MCU_TYPE_PLA
, PLA_CFG_WOL
);
2575 ocp_data
&= ~MAGIC_EN
;
2576 if (wolopts
& WAKE_MAGIC
)
2577 ocp_data
|= MAGIC_EN
;
2578 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_CFG_WOL
, ocp_data
);
2580 if (wolopts
& WAKE_ANY
)
2581 device_set_wakeup_enable(&tp
->udev
->dev
, true);
2583 device_set_wakeup_enable(&tp
->udev
->dev
, false);
2586 static void r8153_mac_clk_spd(struct r8152
*tp
, bool enable
)
2588 /* MAC clock speed down */
2590 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_MAC_PWR_CTRL
,
2592 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_MAC_PWR_CTRL2
,
2594 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_MAC_PWR_CTRL3
,
2595 PKT_AVAIL_SPDWN_EN
| SUSPEND_SPDWN_EN
|
2596 U1U2_SPDWN_EN
| L1_SPDWN_EN
);
2597 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_MAC_PWR_CTRL4
,
2598 PWRSAVE_SPDWN_EN
| RXDV_SPDWN_EN
| TX10MIDLE_EN
|
2599 TP100_SPDWN_EN
| TP500_SPDWN_EN
| EEE_SPDWN_EN
|
2602 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_MAC_PWR_CTRL
, 0);
2603 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_MAC_PWR_CTRL2
, 0);
2604 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_MAC_PWR_CTRL3
, 0);
2605 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_MAC_PWR_CTRL4
, 0);
2609 static void r8153_u1u2en(struct r8152
*tp
, bool enable
)
2614 memset(u1u2
, 0xff, sizeof(u1u2
));
2616 memset(u1u2
, 0x00, sizeof(u1u2
));
2618 usb_ocp_write(tp
, USB_TOLERANCE
, BYTE_EN_SIX_BYTES
, sizeof(u1u2
), u1u2
);
2621 static void r8153b_u1u2en(struct r8152
*tp
, bool enable
)
2625 ocp_data
= ocp_read_word(tp
, MCU_TYPE_USB
, USB_LPM_CONFIG
);
2627 ocp_data
|= LPM_U1U2_EN
;
2629 ocp_data
&= ~LPM_U1U2_EN
;
2631 ocp_write_word(tp
, MCU_TYPE_USB
, USB_LPM_CONFIG
, ocp_data
);
2634 static void r8153_u2p3en(struct r8152
*tp
, bool enable
)
2638 ocp_data
= ocp_read_word(tp
, MCU_TYPE_USB
, USB_U2P3_CTRL
);
2640 ocp_data
|= U2P3_ENABLE
;
2642 ocp_data
&= ~U2P3_ENABLE
;
2643 ocp_write_word(tp
, MCU_TYPE_USB
, USB_U2P3_CTRL
, ocp_data
);
2646 static void r8153b_ups_flags_w1w0(struct r8152
*tp
, u32 set
, u32 clear
)
2650 ocp_data
= ocp_read_dword(tp
, MCU_TYPE_USB
, USB_UPS_FLAGS
);
2653 ocp_write_dword(tp
, MCU_TYPE_USB
, USB_UPS_FLAGS
, ocp_data
);
2656 static void r8153b_green_en(struct r8152
*tp
, bool enable
)
2661 sram_write(tp
, 0x8045, 0); /* 10M abiq&ldvbias */
2662 sram_write(tp
, 0x804d, 0x1222); /* 100M short abiq&ldvbias */
2663 sram_write(tp
, 0x805d, 0x0022); /* 1000M short abiq&ldvbias */
2665 sram_write(tp
, 0x8045, 0x2444); /* 10M abiq&ldvbias */
2666 sram_write(tp
, 0x804d, 0x2444); /* 100M short abiq&ldvbias */
2667 sram_write(tp
, 0x805d, 0x2444); /* 1000M short abiq&ldvbias */
2670 data
= sram_read(tp
, SRAM_GREEN_CFG
);
2671 data
|= GREEN_ETH_EN
;
2672 sram_write(tp
, SRAM_GREEN_CFG
, data
);
2674 r8153b_ups_flags_w1w0(tp
, UPS_FLAGS_EN_GREEN
, 0);
2677 static u16
r8153_phy_status(struct r8152
*tp
, u16 desired
)
2682 for (i
= 0; i
< 500; i
++) {
2683 data
= ocp_reg_read(tp
, OCP_PHY_STATUS
);
2684 data
&= PHY_STAT_MASK
;
2686 if (data
== desired
)
2688 } else if (data
== PHY_STAT_LAN_ON
|| data
== PHY_STAT_PWRDN
||
2689 data
== PHY_STAT_EXT_INIT
) {
2699 static void r8153b_ups_en(struct r8152
*tp
, bool enable
)
2701 u32 ocp_data
= ocp_read_byte(tp
, MCU_TYPE_USB
, USB_POWER_CUT
);
2704 ocp_data
|= UPS_EN
| USP_PREWAKE
| PHASE2_EN
;
2705 ocp_write_byte(tp
, MCU_TYPE_USB
, USB_POWER_CUT
, ocp_data
);
2707 ocp_data
= ocp_read_byte(tp
, MCU_TYPE_USB
, 0xcfff);
2709 ocp_write_byte(tp
, MCU_TYPE_USB
, 0xcfff, ocp_data
);
2713 ocp_data
&= ~(UPS_EN
| USP_PREWAKE
);
2714 ocp_write_byte(tp
, MCU_TYPE_USB
, USB_POWER_CUT
, ocp_data
);
2716 ocp_data
= ocp_read_byte(tp
, MCU_TYPE_USB
, 0xcfff);
2717 ocp_data
&= ~BIT(0);
2718 ocp_write_byte(tp
, MCU_TYPE_USB
, 0xcfff, ocp_data
);
2720 ocp_data
= ocp_read_word(tp
, MCU_TYPE_USB
, USB_MISC_0
);
2721 ocp_data
&= ~PCUT_STATUS
;
2722 ocp_write_word(tp
, MCU_TYPE_USB
, USB_MISC_0
, ocp_data
);
2724 data
= r8153_phy_status(tp
, 0);
2727 case PHY_STAT_PWRDN
:
2728 case PHY_STAT_EXT_INIT
:
2730 test_bit(GREEN_ETHERNET
, &tp
->flags
));
2732 data
= r8152_mdio_read(tp
, MII_BMCR
);
2733 data
&= ~BMCR_PDOWN
;
2735 r8152_mdio_write(tp
, MII_BMCR
, data
);
2737 data
= r8153_phy_status(tp
, PHY_STAT_LAN_ON
);
2740 if (data
!= PHY_STAT_LAN_ON
)
2741 netif_warn(tp
, link
, tp
->netdev
,
2748 static void r8153_power_cut_en(struct r8152
*tp
, bool enable
)
2752 ocp_data
= ocp_read_word(tp
, MCU_TYPE_USB
, USB_POWER_CUT
);
2754 ocp_data
|= PWR_EN
| PHASE2_EN
;
2756 ocp_data
&= ~(PWR_EN
| PHASE2_EN
);
2757 ocp_write_word(tp
, MCU_TYPE_USB
, USB_POWER_CUT
, ocp_data
);
2759 ocp_data
= ocp_read_word(tp
, MCU_TYPE_USB
, USB_MISC_0
);
2760 ocp_data
&= ~PCUT_STATUS
;
2761 ocp_write_word(tp
, MCU_TYPE_USB
, USB_MISC_0
, ocp_data
);
2764 static void r8153b_power_cut_en(struct r8152
*tp
, bool enable
)
2768 ocp_data
= ocp_read_word(tp
, MCU_TYPE_USB
, USB_POWER_CUT
);
2770 ocp_data
|= PWR_EN
| PHASE2_EN
;
2772 ocp_data
&= ~PWR_EN
;
2773 ocp_write_word(tp
, MCU_TYPE_USB
, USB_POWER_CUT
, ocp_data
);
2775 ocp_data
= ocp_read_word(tp
, MCU_TYPE_USB
, USB_MISC_0
);
2776 ocp_data
&= ~PCUT_STATUS
;
2777 ocp_write_word(tp
, MCU_TYPE_USB
, USB_MISC_0
, ocp_data
);
2780 static void r8153b_queue_wake(struct r8152
*tp
, bool enable
)
2784 ocp_data
= ocp_read_byte(tp
, MCU_TYPE_PLA
, 0xd38a);
2788 ocp_data
&= ~BIT(0);
2789 ocp_write_byte(tp
, MCU_TYPE_PLA
, 0xd38a, ocp_data
);
2791 ocp_data
= ocp_read_byte(tp
, MCU_TYPE_PLA
, 0xd38c);
2792 ocp_data
&= ~BIT(0);
2793 ocp_write_byte(tp
, MCU_TYPE_PLA
, 0xd38c, ocp_data
);
2796 static bool rtl_can_wakeup(struct r8152
*tp
)
2798 struct usb_device
*udev
= tp
->udev
;
2800 return (udev
->actconfig
->desc
.bmAttributes
& USB_CONFIG_ATT_WAKEUP
);
2803 static void rtl_runtime_suspend_enable(struct r8152
*tp
, bool enable
)
2808 __rtl_set_wol(tp
, WAKE_ANY
);
2810 ocp_write_byte(tp
, MCU_TYPE_PLA
, PLA_CRWECR
, CRWECR_CONFIG
);
2812 ocp_data
= ocp_read_word(tp
, MCU_TYPE_PLA
, PLA_CONFIG34
);
2813 ocp_data
|= LINK_OFF_WAKE_EN
;
2814 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_CONFIG34
, ocp_data
);
2816 ocp_write_byte(tp
, MCU_TYPE_PLA
, PLA_CRWECR
, CRWECR_NORAML
);
2820 __rtl_set_wol(tp
, tp
->saved_wolopts
);
2822 ocp_write_byte(tp
, MCU_TYPE_PLA
, PLA_CRWECR
, CRWECR_CONFIG
);
2824 ocp_data
= ocp_read_word(tp
, MCU_TYPE_PLA
, PLA_CONFIG34
);
2825 ocp_data
&= ~LINK_OFF_WAKE_EN
;
2826 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_CONFIG34
, ocp_data
);
2828 ocp_write_byte(tp
, MCU_TYPE_PLA
, PLA_CRWECR
, CRWECR_NORAML
);
2832 static void rtl8153_runtime_enable(struct r8152
*tp
, bool enable
)
2835 r8153_u1u2en(tp
, false);
2836 r8153_u2p3en(tp
, false);
2837 r8153_mac_clk_spd(tp
, true);
2838 rtl_runtime_suspend_enable(tp
, true);
2840 rtl_runtime_suspend_enable(tp
, false);
2841 r8153_mac_clk_spd(tp
, false);
2843 switch (tp
->version
) {
2850 r8153_u2p3en(tp
, true);
2854 r8153_u1u2en(tp
, true);
2858 static void rtl8153b_runtime_enable(struct r8152
*tp
, bool enable
)
2861 r8153b_queue_wake(tp
, true);
2862 r8153b_u1u2en(tp
, false);
2863 r8153_u2p3en(tp
, false);
2864 rtl_runtime_suspend_enable(tp
, true);
2865 r8153b_ups_en(tp
, true);
2867 r8153b_ups_en(tp
, false);
2868 r8153b_queue_wake(tp
, false);
2869 rtl_runtime_suspend_enable(tp
, false);
2870 r8153_u2p3en(tp
, true);
2871 r8153b_u1u2en(tp
, true);
2875 static void r8153_teredo_off(struct r8152
*tp
)
2879 switch (tp
->version
) {
2887 ocp_data
= ocp_read_word(tp
, MCU_TYPE_PLA
, PLA_TEREDO_CFG
);
2888 ocp_data
&= ~(TEREDO_SEL
| TEREDO_RS_EVENT_MASK
|
2890 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_TEREDO_CFG
, ocp_data
);
2895 /* The bit 0 ~ 7 are relative with teredo settings. They are
2896 * W1C (write 1 to clear), so set all 1 to disable it.
2898 ocp_write_byte(tp
, MCU_TYPE_PLA
, PLA_TEREDO_CFG
, 0xff);
2905 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_WDT6_CTRL
, WDT6_SET_MODE
);
2906 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_REALWOW_TIMER
, 0);
2907 ocp_write_dword(tp
, MCU_TYPE_PLA
, PLA_TEREDO_TIMER
, 0);
2910 static void rtl_reset_bmu(struct r8152
*tp
)
2914 ocp_data
= ocp_read_byte(tp
, MCU_TYPE_USB
, USB_BMU_RESET
);
2915 ocp_data
&= ~(BMU_RESET_EP_IN
| BMU_RESET_EP_OUT
);
2916 ocp_write_byte(tp
, MCU_TYPE_USB
, USB_BMU_RESET
, ocp_data
);
2917 ocp_data
|= BMU_RESET_EP_IN
| BMU_RESET_EP_OUT
;
2918 ocp_write_byte(tp
, MCU_TYPE_USB
, USB_BMU_RESET
, ocp_data
);
2921 static void r8152_aldps_en(struct r8152
*tp
, bool enable
)
2924 ocp_reg_write(tp
, OCP_ALDPS_CONFIG
, ENPWRSAVE
| ENPDNPS
|
2925 LINKENA
| DIS_SDSAVE
);
2927 ocp_reg_write(tp
, OCP_ALDPS_CONFIG
, ENPDNPS
| LINKENA
|
2933 static inline void r8152_mmd_indirect(struct r8152
*tp
, u16 dev
, u16 reg
)
2935 ocp_reg_write(tp
, OCP_EEE_AR
, FUN_ADDR
| dev
);
2936 ocp_reg_write(tp
, OCP_EEE_DATA
, reg
);
2937 ocp_reg_write(tp
, OCP_EEE_AR
, FUN_DATA
| dev
);
2940 static u16
r8152_mmd_read(struct r8152
*tp
, u16 dev
, u16 reg
)
2944 r8152_mmd_indirect(tp
, dev
, reg
);
2945 data
= ocp_reg_read(tp
, OCP_EEE_DATA
);
2946 ocp_reg_write(tp
, OCP_EEE_AR
, 0x0000);
2951 static void r8152_mmd_write(struct r8152
*tp
, u16 dev
, u16 reg
, u16 data
)
2953 r8152_mmd_indirect(tp
, dev
, reg
);
2954 ocp_reg_write(tp
, OCP_EEE_DATA
, data
);
2955 ocp_reg_write(tp
, OCP_EEE_AR
, 0x0000);
2958 static void r8152_eee_en(struct r8152
*tp
, bool enable
)
2960 u16 config1
, config2
, config3
;
2963 ocp_data
= ocp_read_word(tp
, MCU_TYPE_PLA
, PLA_EEE_CR
);
2964 config1
= ocp_reg_read(tp
, OCP_EEE_CONFIG1
) & ~sd_rise_time_mask
;
2965 config2
= ocp_reg_read(tp
, OCP_EEE_CONFIG2
);
2966 config3
= ocp_reg_read(tp
, OCP_EEE_CONFIG3
) & ~fast_snr_mask
;
2969 ocp_data
|= EEE_RX_EN
| EEE_TX_EN
;
2970 config1
|= EEE_10_CAP
| EEE_NWAY_EN
| TX_QUIET_EN
| RX_QUIET_EN
;
2971 config1
|= sd_rise_time(1);
2972 config2
|= RG_DACQUIET_EN
| RG_LDVQUIET_EN
;
2973 config3
|= fast_snr(42);
2975 ocp_data
&= ~(EEE_RX_EN
| EEE_TX_EN
);
2976 config1
&= ~(EEE_10_CAP
| EEE_NWAY_EN
| TX_QUIET_EN
|
2978 config1
|= sd_rise_time(7);
2979 config2
&= ~(RG_DACQUIET_EN
| RG_LDVQUIET_EN
);
2980 config3
|= fast_snr(511);
2983 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_EEE_CR
, ocp_data
);
2984 ocp_reg_write(tp
, OCP_EEE_CONFIG1
, config1
);
2985 ocp_reg_write(tp
, OCP_EEE_CONFIG2
, config2
);
2986 ocp_reg_write(tp
, OCP_EEE_CONFIG3
, config3
);
2989 static void r8152b_enable_eee(struct r8152
*tp
)
2991 r8152_eee_en(tp
, true);
2992 r8152_mmd_write(tp
, MDIO_MMD_AN
, MDIO_AN_EEE_ADV
, MDIO_EEE_100TX
);
2995 static void r8152b_enable_fc(struct r8152
*tp
)
2999 anar
= r8152_mdio_read(tp
, MII_ADVERTISE
);
3000 anar
|= ADVERTISE_PAUSE_CAP
| ADVERTISE_PAUSE_ASYM
;
3001 r8152_mdio_write(tp
, MII_ADVERTISE
, anar
);
3004 static void rtl8152_disable(struct r8152
*tp
)
3006 r8152_aldps_en(tp
, false);
3008 r8152_aldps_en(tp
, true);
3011 static void r8152b_hw_phy_cfg(struct r8152
*tp
)
3013 r8152b_enable_eee(tp
);
3014 r8152_aldps_en(tp
, true);
3015 r8152b_enable_fc(tp
);
3017 set_bit(PHY_RESET
, &tp
->flags
);
3020 static void r8152b_exit_oob(struct r8152
*tp
)
3025 ocp_data
= ocp_read_dword(tp
, MCU_TYPE_PLA
, PLA_RCR
);
3026 ocp_data
&= ~RCR_ACPT_ALL
;
3027 ocp_write_dword(tp
, MCU_TYPE_PLA
, PLA_RCR
, ocp_data
);
3029 rxdy_gated_en(tp
, true);
3030 r8153_teredo_off(tp
);
3031 ocp_write_byte(tp
, MCU_TYPE_PLA
, PLA_CRWECR
, CRWECR_NORAML
);
3032 ocp_write_byte(tp
, MCU_TYPE_PLA
, PLA_CR
, 0x00);
3034 ocp_data
= ocp_read_byte(tp
, MCU_TYPE_PLA
, PLA_OOB_CTRL
);
3035 ocp_data
&= ~NOW_IS_OOB
;
3036 ocp_write_byte(tp
, MCU_TYPE_PLA
, PLA_OOB_CTRL
, ocp_data
);
3038 ocp_data
= ocp_read_word(tp
, MCU_TYPE_PLA
, PLA_SFF_STS_7
);
3039 ocp_data
&= ~MCU_BORW_EN
;
3040 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_SFF_STS_7
, ocp_data
);
3042 for (i
= 0; i
< 1000; i
++) {
3043 ocp_data
= ocp_read_byte(tp
, MCU_TYPE_PLA
, PLA_OOB_CTRL
);
3044 if (ocp_data
& LINK_LIST_READY
)
3046 usleep_range(1000, 2000);
3049 ocp_data
= ocp_read_word(tp
, MCU_TYPE_PLA
, PLA_SFF_STS_7
);
3050 ocp_data
|= RE_INIT_LL
;
3051 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_SFF_STS_7
, ocp_data
);
3053 for (i
= 0; i
< 1000; i
++) {
3054 ocp_data
= ocp_read_byte(tp
, MCU_TYPE_PLA
, PLA_OOB_CTRL
);
3055 if (ocp_data
& LINK_LIST_READY
)
3057 usleep_range(1000, 2000);
3060 rtl8152_nic_reset(tp
);
3062 /* rx share fifo credit full threshold */
3063 ocp_write_dword(tp
, MCU_TYPE_PLA
, PLA_RXFIFO_CTRL0
, RXFIFO_THR1_NORMAL
);
3065 if (tp
->udev
->speed
== USB_SPEED_FULL
||
3066 tp
->udev
->speed
== USB_SPEED_LOW
) {
3067 /* rx share fifo credit near full threshold */
3068 ocp_write_dword(tp
, MCU_TYPE_PLA
, PLA_RXFIFO_CTRL1
,
3070 ocp_write_dword(tp
, MCU_TYPE_PLA
, PLA_RXFIFO_CTRL2
,
3073 /* rx share fifo credit near full threshold */
3074 ocp_write_dword(tp
, MCU_TYPE_PLA
, PLA_RXFIFO_CTRL1
,
3076 ocp_write_dword(tp
, MCU_TYPE_PLA
, PLA_RXFIFO_CTRL2
,
3080 /* TX share fifo free credit full threshold */
3081 ocp_write_dword(tp
, MCU_TYPE_PLA
, PLA_TXFIFO_CTRL
, TXFIFO_THR_NORMAL
);
3083 ocp_write_byte(tp
, MCU_TYPE_USB
, USB_TX_AGG
, TX_AGG_MAX_THRESHOLD
);
3084 ocp_write_dword(tp
, MCU_TYPE_USB
, USB_RX_BUF_TH
, RX_THR_HIGH
);
3085 ocp_write_dword(tp
, MCU_TYPE_USB
, USB_TX_DMA
,
3086 TEST_MODE_DISABLE
| TX_SIZE_ADJUST1
);
3088 rtl_rx_vlan_en(tp
, tp
->netdev
->features
& NETIF_F_HW_VLAN_CTAG_RX
);
3090 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_RMS
, RTL8152_RMS
);
3092 ocp_data
= ocp_read_word(tp
, MCU_TYPE_PLA
, PLA_TCR0
);
3093 ocp_data
|= TCR0_AUTO_FIFO
;
3094 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_TCR0
, ocp_data
);
3097 static void r8152b_enter_oob(struct r8152
*tp
)
3102 ocp_data
= ocp_read_byte(tp
, MCU_TYPE_PLA
, PLA_OOB_CTRL
);
3103 ocp_data
&= ~NOW_IS_OOB
;
3104 ocp_write_byte(tp
, MCU_TYPE_PLA
, PLA_OOB_CTRL
, ocp_data
);
3106 ocp_write_dword(tp
, MCU_TYPE_PLA
, PLA_RXFIFO_CTRL0
, RXFIFO_THR1_OOB
);
3107 ocp_write_dword(tp
, MCU_TYPE_PLA
, PLA_RXFIFO_CTRL1
, RXFIFO_THR2_OOB
);
3108 ocp_write_dword(tp
, MCU_TYPE_PLA
, PLA_RXFIFO_CTRL2
, RXFIFO_THR3_OOB
);
3112 for (i
= 0; i
< 1000; i
++) {
3113 ocp_data
= ocp_read_byte(tp
, MCU_TYPE_PLA
, PLA_OOB_CTRL
);
3114 if (ocp_data
& LINK_LIST_READY
)
3116 usleep_range(1000, 2000);
3119 ocp_data
= ocp_read_word(tp
, MCU_TYPE_PLA
, PLA_SFF_STS_7
);
3120 ocp_data
|= RE_INIT_LL
;
3121 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_SFF_STS_7
, ocp_data
);
3123 for (i
= 0; i
< 1000; i
++) {
3124 ocp_data
= ocp_read_byte(tp
, MCU_TYPE_PLA
, PLA_OOB_CTRL
);
3125 if (ocp_data
& LINK_LIST_READY
)
3127 usleep_range(1000, 2000);
3130 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_RMS
, RTL8152_RMS
);
3132 rtl_rx_vlan_en(tp
, true);
3134 ocp_data
= ocp_read_word(tp
, MCU_TYPE_PLA
, PAL_BDC_CR
);
3135 ocp_data
|= ALDPS_PROXY_MODE
;
3136 ocp_write_word(tp
, MCU_TYPE_PLA
, PAL_BDC_CR
, ocp_data
);
3138 ocp_data
= ocp_read_byte(tp
, MCU_TYPE_PLA
, PLA_OOB_CTRL
);
3139 ocp_data
|= NOW_IS_OOB
| DIS_MCU_CLROOB
;
3140 ocp_write_byte(tp
, MCU_TYPE_PLA
, PLA_OOB_CTRL
, ocp_data
);
3142 rxdy_gated_en(tp
, false);
3144 ocp_data
= ocp_read_dword(tp
, MCU_TYPE_PLA
, PLA_RCR
);
3145 ocp_data
|= RCR_APM
| RCR_AM
| RCR_AB
;
3146 ocp_write_dword(tp
, MCU_TYPE_PLA
, PLA_RCR
, ocp_data
);
3149 static int r8153_patch_request(struct r8152
*tp
, bool request
)
3154 data
= ocp_reg_read(tp
, OCP_PHY_PATCH_CMD
);
3156 data
|= PATCH_REQUEST
;
3158 data
&= ~PATCH_REQUEST
;
3159 ocp_reg_write(tp
, OCP_PHY_PATCH_CMD
, data
);
3161 for (i
= 0; request
&& i
< 5000; i
++) {
3162 usleep_range(1000, 2000);
3163 if (ocp_reg_read(tp
, OCP_PHY_PATCH_STAT
) & PATCH_READY
)
3167 if (request
&& !(ocp_reg_read(tp
, OCP_PHY_PATCH_STAT
) & PATCH_READY
)) {
3168 netif_err(tp
, drv
, tp
->netdev
, "patch request fail\n");
3169 r8153_patch_request(tp
, false);
3176 static void r8153_aldps_en(struct r8152
*tp
, bool enable
)
3180 data
= ocp_reg_read(tp
, OCP_POWER_CFG
);
3183 ocp_reg_write(tp
, OCP_POWER_CFG
, data
);
3188 ocp_reg_write(tp
, OCP_POWER_CFG
, data
);
3189 for (i
= 0; i
< 20; i
++) {
3190 usleep_range(1000, 2000);
3191 if (ocp_read_word(tp
, MCU_TYPE_PLA
, 0xe000) & 0x0100)
3197 static void r8153b_aldps_en(struct r8152
*tp
, bool enable
)
3199 r8153_aldps_en(tp
, enable
);
3202 r8153b_ups_flags_w1w0(tp
, UPS_FLAGS_EN_ALDPS
, 0);
3204 r8153b_ups_flags_w1w0(tp
, 0, UPS_FLAGS_EN_ALDPS
);
3207 static void r8153_eee_en(struct r8152
*tp
, bool enable
)
3212 ocp_data
= ocp_read_word(tp
, MCU_TYPE_PLA
, PLA_EEE_CR
);
3213 config
= ocp_reg_read(tp
, OCP_EEE_CFG
);
3216 ocp_data
|= EEE_RX_EN
| EEE_TX_EN
;
3219 ocp_data
&= ~(EEE_RX_EN
| EEE_TX_EN
);
3220 config
&= ~EEE10_EN
;
3223 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_EEE_CR
, ocp_data
);
3224 ocp_reg_write(tp
, OCP_EEE_CFG
, config
);
3227 static void r8153b_eee_en(struct r8152
*tp
, bool enable
)
3229 r8153_eee_en(tp
, enable
);
3232 r8153b_ups_flags_w1w0(tp
, UPS_FLAGS_EN_EEE
, 0);
3234 r8153b_ups_flags_w1w0(tp
, 0, UPS_FLAGS_EN_EEE
);
3237 static void r8153b_enable_fc(struct r8152
*tp
)
3239 r8152b_enable_fc(tp
);
3240 r8153b_ups_flags_w1w0(tp
, UPS_FLAGS_EN_FLOW_CTR
, 0);
3243 static void r8153_hw_phy_cfg(struct r8152
*tp
)
3248 /* disable ALDPS before updating the PHY parameters */
3249 r8153_aldps_en(tp
, false);
3251 /* disable EEE before updating the PHY parameters */
3252 r8153_eee_en(tp
, false);
3253 ocp_reg_write(tp
, OCP_EEE_ADV
, 0);
3255 if (tp
->version
== RTL_VER_03
) {
3256 data
= ocp_reg_read(tp
, OCP_EEE_CFG
);
3257 data
&= ~CTAP_SHORT_EN
;
3258 ocp_reg_write(tp
, OCP_EEE_CFG
, data
);
3261 data
= ocp_reg_read(tp
, OCP_POWER_CFG
);
3262 data
|= EEE_CLKDIV_EN
;
3263 ocp_reg_write(tp
, OCP_POWER_CFG
, data
);
3265 data
= ocp_reg_read(tp
, OCP_DOWN_SPEED
);
3266 data
|= EN_10M_BGOFF
;
3267 ocp_reg_write(tp
, OCP_DOWN_SPEED
, data
);
3268 data
= ocp_reg_read(tp
, OCP_POWER_CFG
);
3269 data
|= EN_10M_PLLOFF
;
3270 ocp_reg_write(tp
, OCP_POWER_CFG
, data
);
3271 sram_write(tp
, SRAM_IMPEDANCE
, 0x0b13);
3273 ocp_data
= ocp_read_word(tp
, MCU_TYPE_PLA
, PLA_PHY_PWR
);
3274 ocp_data
|= PFM_PWM_SWITCH
;
3275 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_PHY_PWR
, ocp_data
);
3277 /* Enable LPF corner auto tune */
3278 sram_write(tp
, SRAM_LPF_CFG
, 0xf70f);
3280 /* Adjust 10M Amplitude */
3281 sram_write(tp
, SRAM_10M_AMP1
, 0x00af);
3282 sram_write(tp
, SRAM_10M_AMP2
, 0x0208);
3284 r8153_eee_en(tp
, true);
3285 ocp_reg_write(tp
, OCP_EEE_ADV
, MDIO_EEE_1000T
| MDIO_EEE_100TX
);
3287 r8153_aldps_en(tp
, true);
3288 r8152b_enable_fc(tp
);
3290 switch (tp
->version
) {
3297 r8153_u2p3en(tp
, true);
3301 set_bit(PHY_RESET
, &tp
->flags
);
3304 static u32
r8152_efuse_read(struct r8152
*tp
, u8 addr
)
3308 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_EFUSE_CMD
, EFUSE_READ_CMD
| addr
);
3309 ocp_data
= ocp_read_word(tp
, MCU_TYPE_PLA
, PLA_EFUSE_CMD
);
3310 ocp_data
= (ocp_data
& EFUSE_DATA_BIT16
) << 9; /* data of bit16 */
3311 ocp_data
|= ocp_read_word(tp
, MCU_TYPE_PLA
, PLA_EFUSE_DATA
);
3316 static void r8153b_hw_phy_cfg(struct r8152
*tp
)
3318 u32 ocp_data
, ups_flags
= 0;
3321 /* disable ALDPS before updating the PHY parameters */
3322 r8153b_aldps_en(tp
, false);
3324 /* disable EEE before updating the PHY parameters */
3325 r8153b_eee_en(tp
, false);
3326 ocp_reg_write(tp
, OCP_EEE_ADV
, 0);
3328 r8153b_green_en(tp
, test_bit(GREEN_ETHERNET
, &tp
->flags
));
3330 data
= sram_read(tp
, SRAM_GREEN_CFG
);
3332 sram_write(tp
, SRAM_GREEN_CFG
, data
);
3333 data
= ocp_reg_read(tp
, OCP_NCTL_CFG
);
3334 data
|= PGA_RETURN_EN
;
3335 ocp_reg_write(tp
, OCP_NCTL_CFG
, data
);
3337 /* ADC Bias Calibration:
3338 * read efuse offset 0x7d to get a 17-bit data. Remove the dummy/fake
3339 * bit (bit3) to rebuild the real 16-bit data. Write the data to the
3342 ocp_data
= r8152_efuse_read(tp
, 0x7d);
3343 data
= (u16
)(((ocp_data
& 0x1fff0) >> 1) | (ocp_data
& 0x7));
3345 ocp_reg_write(tp
, OCP_ADC_IOFFSET
, data
);
3347 /* ups mode tx-link-pulse timing adjustment:
3348 * rg_saw_cnt = OCP reg 0xC426 Bit[13:0]
3349 * swr_cnt_1ms_ini = 16000000 / rg_saw_cnt
3351 ocp_data
= ocp_reg_read(tp
, 0xc426);
3354 u32 swr_cnt_1ms_ini
;
3356 swr_cnt_1ms_ini
= (16000000 / ocp_data
) & SAW_CNT_1MS_MASK
;
3357 ocp_data
= ocp_read_word(tp
, MCU_TYPE_USB
, USB_UPS_CFG
);
3358 ocp_data
= (ocp_data
& ~SAW_CNT_1MS_MASK
) | swr_cnt_1ms_ini
;
3359 ocp_write_word(tp
, MCU_TYPE_USB
, USB_UPS_CFG
, ocp_data
);
3362 ocp_data
= ocp_read_word(tp
, MCU_TYPE_PLA
, PLA_PHY_PWR
);
3363 ocp_data
|= PFM_PWM_SWITCH
;
3364 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_PHY_PWR
, ocp_data
);
3367 if (!r8153_patch_request(tp
, true)) {
3368 data
= ocp_reg_read(tp
, OCP_POWER_CFG
);
3369 data
|= EEE_CLKDIV_EN
;
3370 ocp_reg_write(tp
, OCP_POWER_CFG
, data
);
3372 data
= ocp_reg_read(tp
, OCP_DOWN_SPEED
);
3373 data
|= EN_EEE_CMODE
| EN_EEE_1000
| EN_10M_CLKDIV
;
3374 ocp_reg_write(tp
, OCP_DOWN_SPEED
, data
);
3376 ocp_reg_write(tp
, OCP_SYSCLK_CFG
, 0);
3377 ocp_reg_write(tp
, OCP_SYSCLK_CFG
, clk_div_expo(5));
3379 ups_flags
|= UPS_FLAGS_EN_10M_CKDIV
| UPS_FLAGS_250M_CKDIV
|
3380 UPS_FLAGS_EN_EEE_CKDIV
| UPS_FLAGS_EEE_CMOD_LV_EN
|
3381 UPS_FLAGS_EEE_PLLOFF_GIGA
;
3383 r8153_patch_request(tp
, false);
3386 r8153b_ups_flags_w1w0(tp
, ups_flags
, 0);
3388 r8153b_eee_en(tp
, true);
3389 ocp_reg_write(tp
, OCP_EEE_ADV
, MDIO_EEE_1000T
| MDIO_EEE_100TX
);
3391 r8153b_aldps_en(tp
, true);
3392 r8153b_enable_fc(tp
);
3393 r8153_u2p3en(tp
, true);
3395 set_bit(PHY_RESET
, &tp
->flags
);
3398 static void r8153_first_init(struct r8152
*tp
)
3403 r8153_mac_clk_spd(tp
, false);
3404 rxdy_gated_en(tp
, true);
3405 r8153_teredo_off(tp
);
3407 ocp_data
= ocp_read_dword(tp
, MCU_TYPE_PLA
, PLA_RCR
);
3408 ocp_data
&= ~RCR_ACPT_ALL
;
3409 ocp_write_dword(tp
, MCU_TYPE_PLA
, PLA_RCR
, ocp_data
);
3411 rtl8152_nic_reset(tp
);
3414 ocp_data
= ocp_read_byte(tp
, MCU_TYPE_PLA
, PLA_OOB_CTRL
);
3415 ocp_data
&= ~NOW_IS_OOB
;
3416 ocp_write_byte(tp
, MCU_TYPE_PLA
, PLA_OOB_CTRL
, ocp_data
);
3418 ocp_data
= ocp_read_word(tp
, MCU_TYPE_PLA
, PLA_SFF_STS_7
);
3419 ocp_data
&= ~MCU_BORW_EN
;
3420 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_SFF_STS_7
, ocp_data
);
3422 for (i
= 0; i
< 1000; i
++) {
3423 ocp_data
= ocp_read_byte(tp
, MCU_TYPE_PLA
, PLA_OOB_CTRL
);
3424 if (ocp_data
& LINK_LIST_READY
)
3426 usleep_range(1000, 2000);
3429 ocp_data
= ocp_read_word(tp
, MCU_TYPE_PLA
, PLA_SFF_STS_7
);
3430 ocp_data
|= RE_INIT_LL
;
3431 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_SFF_STS_7
, ocp_data
);
3433 for (i
= 0; i
< 1000; i
++) {
3434 ocp_data
= ocp_read_byte(tp
, MCU_TYPE_PLA
, PLA_OOB_CTRL
);
3435 if (ocp_data
& LINK_LIST_READY
)
3437 usleep_range(1000, 2000);
3440 rtl_rx_vlan_en(tp
, tp
->netdev
->features
& NETIF_F_HW_VLAN_CTAG_RX
);
3442 ocp_data
= tp
->netdev
->mtu
+ VLAN_ETH_HLEN
+ ETH_FCS_LEN
;
3443 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_RMS
, ocp_data
);
3444 ocp_write_byte(tp
, MCU_TYPE_PLA
, PLA_MTPS
, MTPS_JUMBO
);
3446 ocp_data
= ocp_read_word(tp
, MCU_TYPE_PLA
, PLA_TCR0
);
3447 ocp_data
|= TCR0_AUTO_FIFO
;
3448 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_TCR0
, ocp_data
);
3450 rtl8152_nic_reset(tp
);
3452 /* rx share fifo credit full threshold */
3453 ocp_write_dword(tp
, MCU_TYPE_PLA
, PLA_RXFIFO_CTRL0
, RXFIFO_THR1_NORMAL
);
3454 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_RXFIFO_CTRL1
, RXFIFO_THR2_NORMAL
);
3455 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_RXFIFO_CTRL2
, RXFIFO_THR3_NORMAL
);
3456 /* TX share fifo free credit full threshold */
3457 ocp_write_dword(tp
, MCU_TYPE_PLA
, PLA_TXFIFO_CTRL
, TXFIFO_THR_NORMAL2
);
3460 static void r8153_enter_oob(struct r8152
*tp
)
3465 r8153_mac_clk_spd(tp
, true);
3467 ocp_data
= ocp_read_byte(tp
, MCU_TYPE_PLA
, PLA_OOB_CTRL
);
3468 ocp_data
&= ~NOW_IS_OOB
;
3469 ocp_write_byte(tp
, MCU_TYPE_PLA
, PLA_OOB_CTRL
, ocp_data
);
3474 for (i
= 0; i
< 1000; i
++) {
3475 ocp_data
= ocp_read_byte(tp
, MCU_TYPE_PLA
, PLA_OOB_CTRL
);
3476 if (ocp_data
& LINK_LIST_READY
)
3478 usleep_range(1000, 2000);
3481 ocp_data
= ocp_read_word(tp
, MCU_TYPE_PLA
, PLA_SFF_STS_7
);
3482 ocp_data
|= RE_INIT_LL
;
3483 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_SFF_STS_7
, ocp_data
);
3485 for (i
= 0; i
< 1000; i
++) {
3486 ocp_data
= ocp_read_byte(tp
, MCU_TYPE_PLA
, PLA_OOB_CTRL
);
3487 if (ocp_data
& LINK_LIST_READY
)
3489 usleep_range(1000, 2000);
3492 ocp_data
= tp
->netdev
->mtu
+ VLAN_ETH_HLEN
+ ETH_FCS_LEN
;
3493 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_RMS
, ocp_data
);
3495 switch (tp
->version
) {
3500 ocp_data
= ocp_read_word(tp
, MCU_TYPE_PLA
, PLA_TEREDO_CFG
);
3501 ocp_data
&= ~TEREDO_WAKE_MASK
;
3502 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_TEREDO_CFG
, ocp_data
);
3507 /* Clear teredo wake event. bit[15:8] is the teredo wakeup
3508 * type. Set it to zero. bits[7:0] are the W1C bits about
3509 * the events. Set them to all 1 to clear them.
3511 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_TEREDO_WAKE_BASE
, 0x00ff);
3518 rtl_rx_vlan_en(tp
, true);
3520 ocp_data
= ocp_read_word(tp
, MCU_TYPE_PLA
, PAL_BDC_CR
);
3521 ocp_data
|= ALDPS_PROXY_MODE
;
3522 ocp_write_word(tp
, MCU_TYPE_PLA
, PAL_BDC_CR
, ocp_data
);
3524 ocp_data
= ocp_read_byte(tp
, MCU_TYPE_PLA
, PLA_OOB_CTRL
);
3525 ocp_data
|= NOW_IS_OOB
| DIS_MCU_CLROOB
;
3526 ocp_write_byte(tp
, MCU_TYPE_PLA
, PLA_OOB_CTRL
, ocp_data
);
3528 rxdy_gated_en(tp
, false);
3530 ocp_data
= ocp_read_dword(tp
, MCU_TYPE_PLA
, PLA_RCR
);
3531 ocp_data
|= RCR_APM
| RCR_AM
| RCR_AB
;
3532 ocp_write_dword(tp
, MCU_TYPE_PLA
, PLA_RCR
, ocp_data
);
3535 static void rtl8153_disable(struct r8152
*tp
)
3537 r8153_aldps_en(tp
, false);
3540 r8153_aldps_en(tp
, true);
3543 static void rtl8153b_disable(struct r8152
*tp
)
3545 r8153b_aldps_en(tp
, false);
3548 r8153b_aldps_en(tp
, true);
3551 static int rtl8152_set_speed(struct r8152
*tp
, u8 autoneg
, u16 speed
, u8 duplex
)
3553 u16 bmcr
, anar
, gbcr
;
3554 enum spd_duplex speed_duplex
;
3557 anar
= r8152_mdio_read(tp
, MII_ADVERTISE
);
3558 anar
&= ~(ADVERTISE_10HALF
| ADVERTISE_10FULL
|
3559 ADVERTISE_100HALF
| ADVERTISE_100FULL
);
3560 if (tp
->mii
.supports_gmii
) {
3561 gbcr
= r8152_mdio_read(tp
, MII_CTRL1000
);
3562 gbcr
&= ~(ADVERTISE_1000FULL
| ADVERTISE_1000HALF
);
3567 if (autoneg
== AUTONEG_DISABLE
) {
3568 if (speed
== SPEED_10
) {
3570 anar
|= ADVERTISE_10HALF
| ADVERTISE_10FULL
;
3571 speed_duplex
= FORCE_10M_HALF
;
3572 } else if (speed
== SPEED_100
) {
3573 bmcr
= BMCR_SPEED100
;
3574 anar
|= ADVERTISE_100HALF
| ADVERTISE_100FULL
;
3575 speed_duplex
= FORCE_100M_HALF
;
3576 } else if (speed
== SPEED_1000
&& tp
->mii
.supports_gmii
) {
3577 bmcr
= BMCR_SPEED1000
;
3578 gbcr
|= ADVERTISE_1000FULL
| ADVERTISE_1000HALF
;
3579 speed_duplex
= NWAY_1000M_FULL
;
3585 if (duplex
== DUPLEX_FULL
) {
3586 bmcr
|= BMCR_FULLDPLX
;
3587 if (speed
!= SPEED_1000
)
3591 if (speed
== SPEED_10
) {
3592 if (duplex
== DUPLEX_FULL
) {
3593 anar
|= ADVERTISE_10HALF
| ADVERTISE_10FULL
;
3594 speed_duplex
= NWAY_10M_FULL
;
3596 anar
|= ADVERTISE_10HALF
;
3597 speed_duplex
= NWAY_10M_HALF
;
3599 } else if (speed
== SPEED_100
) {
3600 if (duplex
== DUPLEX_FULL
) {
3601 anar
|= ADVERTISE_10HALF
| ADVERTISE_10FULL
;
3602 anar
|= ADVERTISE_100HALF
| ADVERTISE_100FULL
;
3603 speed_duplex
= NWAY_100M_FULL
;
3605 anar
|= ADVERTISE_10HALF
;
3606 anar
|= ADVERTISE_100HALF
;
3607 speed_duplex
= NWAY_100M_HALF
;
3609 } else if (speed
== SPEED_1000
&& tp
->mii
.supports_gmii
) {
3610 if (duplex
== DUPLEX_FULL
) {
3611 anar
|= ADVERTISE_10HALF
| ADVERTISE_10FULL
;
3612 anar
|= ADVERTISE_100HALF
| ADVERTISE_100FULL
;
3613 gbcr
|= ADVERTISE_1000FULL
| ADVERTISE_1000HALF
;
3615 anar
|= ADVERTISE_10HALF
;
3616 anar
|= ADVERTISE_100HALF
;
3617 gbcr
|= ADVERTISE_1000HALF
;
3619 speed_duplex
= NWAY_1000M_FULL
;
3625 bmcr
= BMCR_ANENABLE
| BMCR_ANRESTART
;
3628 if (test_and_clear_bit(PHY_RESET
, &tp
->flags
))
3631 if (tp
->mii
.supports_gmii
)
3632 r8152_mdio_write(tp
, MII_CTRL1000
, gbcr
);
3634 r8152_mdio_write(tp
, MII_ADVERTISE
, anar
);
3635 r8152_mdio_write(tp
, MII_BMCR
, bmcr
);
3637 switch (tp
->version
) {
3640 r8153b_ups_flags_w1w0(tp
, ups_flags_speed(speed_duplex
),
3641 UPS_FLAGS_SPEED_MASK
);
3648 if (bmcr
& BMCR_RESET
) {
3651 for (i
= 0; i
< 50; i
++) {
3653 if ((r8152_mdio_read(tp
, MII_BMCR
) & BMCR_RESET
) == 0)
3662 static void rtl8152_up(struct r8152
*tp
)
3664 if (test_bit(RTL8152_UNPLUG
, &tp
->flags
))
3667 r8152_aldps_en(tp
, false);
3668 r8152b_exit_oob(tp
);
3669 r8152_aldps_en(tp
, true);
3672 static void rtl8152_down(struct r8152
*tp
)
3674 if (test_bit(RTL8152_UNPLUG
, &tp
->flags
)) {
3675 rtl_drop_queued_tx(tp
);
3679 r8152_power_cut_en(tp
, false);
3680 r8152_aldps_en(tp
, false);
3681 r8152b_enter_oob(tp
);
3682 r8152_aldps_en(tp
, true);
3685 static void rtl8153_up(struct r8152
*tp
)
3687 if (test_bit(RTL8152_UNPLUG
, &tp
->flags
))
3690 r8153_u1u2en(tp
, false);
3691 r8153_u2p3en(tp
, false);
3692 r8153_aldps_en(tp
, false);
3693 r8153_first_init(tp
);
3694 r8153_aldps_en(tp
, true);
3696 switch (tp
->version
) {
3703 r8153_u2p3en(tp
, true);
3707 r8153_u1u2en(tp
, true);
3710 static void rtl8153_down(struct r8152
*tp
)
3712 if (test_bit(RTL8152_UNPLUG
, &tp
->flags
)) {
3713 rtl_drop_queued_tx(tp
);
3717 r8153_u1u2en(tp
, false);
3718 r8153_u2p3en(tp
, false);
3719 r8153_power_cut_en(tp
, false);
3720 r8153_aldps_en(tp
, false);
3721 r8153_enter_oob(tp
);
3722 r8153_aldps_en(tp
, true);
3725 static void rtl8153b_up(struct r8152
*tp
)
3727 if (test_bit(RTL8152_UNPLUG
, &tp
->flags
))
3730 r8153b_u1u2en(tp
, false);
3731 r8153_u2p3en(tp
, false);
3732 r8153b_aldps_en(tp
, false);
3734 r8153_first_init(tp
);
3735 ocp_write_dword(tp
, MCU_TYPE_USB
, USB_RX_BUF_TH
, RX_THR_B
);
3737 r8153b_aldps_en(tp
, true);
3738 r8153_u2p3en(tp
, true);
3739 r8153b_u1u2en(tp
, true);
3742 static void rtl8153b_down(struct r8152
*tp
)
3744 if (test_bit(RTL8152_UNPLUG
, &tp
->flags
)) {
3745 rtl_drop_queued_tx(tp
);
3749 r8153b_u1u2en(tp
, false);
3750 r8153_u2p3en(tp
, false);
3751 r8153b_power_cut_en(tp
, false);
3752 r8153b_aldps_en(tp
, false);
3753 r8153_enter_oob(tp
);
3754 r8153b_aldps_en(tp
, true);
3757 static bool rtl8152_in_nway(struct r8152
*tp
)
3761 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_OCP_GPHY_BASE
, 0x2000);
3762 tp
->ocp_base
= 0x2000;
3763 ocp_write_byte(tp
, MCU_TYPE_PLA
, 0xb014, 0x4c); /* phy state */
3764 nway_state
= ocp_read_word(tp
, MCU_TYPE_PLA
, 0xb01a);
3766 /* bit 15: TXDIS_STATE, bit 14: ABD_STATE */
3767 if (nway_state
& 0xc000)
3773 static bool rtl8153_in_nway(struct r8152
*tp
)
3775 u16 phy_state
= ocp_reg_read(tp
, OCP_PHY_STATE
) & 0xff;
3777 if (phy_state
== TXDIS_STATE
|| phy_state
== ABD_STATE
)
3783 static void set_carrier(struct r8152
*tp
)
3785 struct net_device
*netdev
= tp
->netdev
;
3786 struct napi_struct
*napi
= &tp
->napi
;
3789 speed
= rtl8152_get_speed(tp
);
3791 if (speed
& LINK_STATUS
) {
3792 if (!netif_carrier_ok(netdev
)) {
3793 tp
->rtl_ops
.enable(tp
);
3794 set_bit(RTL8152_SET_RX_MODE
, &tp
->flags
);
3795 netif_stop_queue(netdev
);
3797 netif_carrier_on(netdev
);
3799 napi_enable(&tp
->napi
);
3800 netif_wake_queue(netdev
);
3801 netif_info(tp
, link
, netdev
, "carrier on\n");
3802 } else if (netif_queue_stopped(netdev
) &&
3803 skb_queue_len(&tp
->tx_queue
) < tp
->tx_qlen
) {
3804 netif_wake_queue(netdev
);
3807 if (netif_carrier_ok(netdev
)) {
3808 netif_carrier_off(netdev
);
3810 tp
->rtl_ops
.disable(tp
);
3812 netif_info(tp
, link
, netdev
, "carrier off\n");
3817 static void rtl_work_func_t(struct work_struct
*work
)
3819 struct r8152
*tp
= container_of(work
, struct r8152
, schedule
.work
);
3821 /* If the device is unplugged or !netif_running(), the workqueue
3822 * doesn't need to wake the device, and could return directly.
3824 if (test_bit(RTL8152_UNPLUG
, &tp
->flags
) || !netif_running(tp
->netdev
))
3827 if (usb_autopm_get_interface(tp
->intf
) < 0)
3830 if (!test_bit(WORK_ENABLE
, &tp
->flags
))
3833 if (!mutex_trylock(&tp
->control
)) {
3834 schedule_delayed_work(&tp
->schedule
, 0);
3838 if (test_and_clear_bit(RTL8152_LINK_CHG
, &tp
->flags
))
3841 if (test_and_clear_bit(RTL8152_SET_RX_MODE
, &tp
->flags
))
3842 _rtl8152_set_rx_mode(tp
->netdev
);
3844 /* don't schedule napi before linking */
3845 if (test_and_clear_bit(SCHEDULE_NAPI
, &tp
->flags
) &&
3846 netif_carrier_ok(tp
->netdev
))
3847 napi_schedule(&tp
->napi
);
3849 mutex_unlock(&tp
->control
);
3852 usb_autopm_put_interface(tp
->intf
);
3855 static void rtl_hw_phy_work_func_t(struct work_struct
*work
)
3857 struct r8152
*tp
= container_of(work
, struct r8152
, hw_phy_work
.work
);
3859 if (test_bit(RTL8152_UNPLUG
, &tp
->flags
))
3862 if (usb_autopm_get_interface(tp
->intf
) < 0)
3865 mutex_lock(&tp
->control
);
3867 tp
->rtl_ops
.hw_phy_cfg(tp
);
3869 rtl8152_set_speed(tp
, tp
->autoneg
, tp
->speed
, tp
->duplex
);
3871 mutex_unlock(&tp
->control
);
3873 usb_autopm_put_interface(tp
->intf
);
3876 #ifdef CONFIG_PM_SLEEP
3877 static int rtl_notifier(struct notifier_block
*nb
, unsigned long action
,
3880 struct r8152
*tp
= container_of(nb
, struct r8152
, pm_notifier
);
3883 case PM_HIBERNATION_PREPARE
:
3884 case PM_SUSPEND_PREPARE
:
3885 usb_autopm_get_interface(tp
->intf
);
3888 case PM_POST_HIBERNATION
:
3889 case PM_POST_SUSPEND
:
3890 usb_autopm_put_interface(tp
->intf
);
3893 case PM_POST_RESTORE
:
3894 case PM_RESTORE_PREPARE
:
3903 static int rtl8152_open(struct net_device
*netdev
)
3905 struct r8152
*tp
= netdev_priv(netdev
);
3908 res
= alloc_all_mem(tp
);
3912 res
= usb_autopm_get_interface(tp
->intf
);
3916 mutex_lock(&tp
->control
);
3920 netif_carrier_off(netdev
);
3921 netif_start_queue(netdev
);
3922 set_bit(WORK_ENABLE
, &tp
->flags
);
3924 res
= usb_submit_urb(tp
->intr_urb
, GFP_KERNEL
);
3927 netif_device_detach(tp
->netdev
);
3928 netif_warn(tp
, ifup
, netdev
, "intr_urb submit failed: %d\n",
3932 napi_enable(&tp
->napi
);
3934 mutex_unlock(&tp
->control
);
3936 usb_autopm_put_interface(tp
->intf
);
3937 #ifdef CONFIG_PM_SLEEP
3938 tp
->pm_notifier
.notifier_call
= rtl_notifier
;
3939 register_pm_notifier(&tp
->pm_notifier
);
3944 mutex_unlock(&tp
->control
);
3945 usb_autopm_put_interface(tp
->intf
);
3952 static int rtl8152_close(struct net_device
*netdev
)
3954 struct r8152
*tp
= netdev_priv(netdev
);
3957 #ifdef CONFIG_PM_SLEEP
3958 unregister_pm_notifier(&tp
->pm_notifier
);
3960 napi_disable(&tp
->napi
);
3961 clear_bit(WORK_ENABLE
, &tp
->flags
);
3962 usb_kill_urb(tp
->intr_urb
);
3963 cancel_delayed_work_sync(&tp
->schedule
);
3964 netif_stop_queue(netdev
);
3966 res
= usb_autopm_get_interface(tp
->intf
);
3967 if (res
< 0 || test_bit(RTL8152_UNPLUG
, &tp
->flags
)) {
3968 rtl_drop_queued_tx(tp
);
3971 mutex_lock(&tp
->control
);
3973 tp
->rtl_ops
.down(tp
);
3975 mutex_unlock(&tp
->control
);
3977 usb_autopm_put_interface(tp
->intf
);
3985 static void rtl_tally_reset(struct r8152
*tp
)
3989 ocp_data
= ocp_read_word(tp
, MCU_TYPE_PLA
, PLA_RSTTALLY
);
3990 ocp_data
|= TALLY_RESET
;
3991 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_RSTTALLY
, ocp_data
);
3994 static void r8152b_init(struct r8152
*tp
)
3999 if (test_bit(RTL8152_UNPLUG
, &tp
->flags
))
4002 data
= r8152_mdio_read(tp
, MII_BMCR
);
4003 if (data
& BMCR_PDOWN
) {
4004 data
&= ~BMCR_PDOWN
;
4005 r8152_mdio_write(tp
, MII_BMCR
, data
);
4008 r8152_aldps_en(tp
, false);
4010 if (tp
->version
== RTL_VER_01
) {
4011 ocp_data
= ocp_read_word(tp
, MCU_TYPE_PLA
, PLA_LED_FEATURE
);
4012 ocp_data
&= ~LED_MODE_MASK
;
4013 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_LED_FEATURE
, ocp_data
);
4016 r8152_power_cut_en(tp
, false);
4018 ocp_data
= ocp_read_word(tp
, MCU_TYPE_PLA
, PLA_PHY_PWR
);
4019 ocp_data
|= TX_10M_IDLE_EN
| PFM_PWM_SWITCH
;
4020 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_PHY_PWR
, ocp_data
);
4021 ocp_data
= ocp_read_dword(tp
, MCU_TYPE_PLA
, PLA_MAC_PWR_CTRL
);
4022 ocp_data
&= ~MCU_CLK_RATIO_MASK
;
4023 ocp_data
|= MCU_CLK_RATIO
| D3_CLK_GATED_EN
;
4024 ocp_write_dword(tp
, MCU_TYPE_PLA
, PLA_MAC_PWR_CTRL
, ocp_data
);
4025 ocp_data
= GPHY_STS_MSK
| SPEED_DOWN_MSK
|
4026 SPDWN_RXDV_MSK
| SPDWN_LINKCHG_MSK
;
4027 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_GPHY_INTR_IMR
, ocp_data
);
4029 rtl_tally_reset(tp
);
4031 /* enable rx aggregation */
4032 ocp_data
= ocp_read_word(tp
, MCU_TYPE_USB
, USB_USB_CTRL
);
4033 ocp_data
&= ~(RX_AGG_DISABLE
| RX_ZERO_EN
);
4034 ocp_write_word(tp
, MCU_TYPE_USB
, USB_USB_CTRL
, ocp_data
);
4037 static void r8153_init(struct r8152
*tp
)
4043 if (test_bit(RTL8152_UNPLUG
, &tp
->flags
))
4046 r8153_u1u2en(tp
, false);
4048 for (i
= 0; i
< 500; i
++) {
4049 if (ocp_read_word(tp
, MCU_TYPE_PLA
, PLA_BOOT_CTRL
) &
4055 data
= r8153_phy_status(tp
, 0);
4057 if (tp
->version
== RTL_VER_03
|| tp
->version
== RTL_VER_04
||
4058 tp
->version
== RTL_VER_05
)
4059 ocp_reg_write(tp
, OCP_ADC_CFG
, CKADSEL_L
| ADC_EN
| EN_EMI_L
);
4061 data
= r8152_mdio_read(tp
, MII_BMCR
);
4062 if (data
& BMCR_PDOWN
) {
4063 data
&= ~BMCR_PDOWN
;
4064 r8152_mdio_write(tp
, MII_BMCR
, data
);
4067 data
= r8153_phy_status(tp
, PHY_STAT_LAN_ON
);
4069 r8153_u2p3en(tp
, false);
4071 if (tp
->version
== RTL_VER_04
) {
4072 ocp_data
= ocp_read_word(tp
, MCU_TYPE_USB
, USB_SSPHYLINK2
);
4073 ocp_data
&= ~pwd_dn_scale_mask
;
4074 ocp_data
|= pwd_dn_scale(96);
4075 ocp_write_word(tp
, MCU_TYPE_USB
, USB_SSPHYLINK2
, ocp_data
);
4077 ocp_data
= ocp_read_byte(tp
, MCU_TYPE_USB
, USB_USB2PHY
);
4078 ocp_data
|= USB2PHY_L1
| USB2PHY_SUSPEND
;
4079 ocp_write_byte(tp
, MCU_TYPE_USB
, USB_USB2PHY
, ocp_data
);
4080 } else if (tp
->version
== RTL_VER_05
) {
4081 ocp_data
= ocp_read_byte(tp
, MCU_TYPE_PLA
, PLA_DMY_REG0
);
4082 ocp_data
&= ~ECM_ALDPS
;
4083 ocp_write_byte(tp
, MCU_TYPE_PLA
, PLA_DMY_REG0
, ocp_data
);
4085 ocp_data
= ocp_read_byte(tp
, MCU_TYPE_USB
, USB_CSR_DUMMY1
);
4086 if (ocp_read_word(tp
, MCU_TYPE_USB
, USB_BURST_SIZE
) == 0)
4087 ocp_data
&= ~DYNAMIC_BURST
;
4089 ocp_data
|= DYNAMIC_BURST
;
4090 ocp_write_byte(tp
, MCU_TYPE_USB
, USB_CSR_DUMMY1
, ocp_data
);
4091 } else if (tp
->version
== RTL_VER_06
) {
4092 ocp_data
= ocp_read_byte(tp
, MCU_TYPE_USB
, USB_CSR_DUMMY1
);
4093 if (ocp_read_word(tp
, MCU_TYPE_USB
, USB_BURST_SIZE
) == 0)
4094 ocp_data
&= ~DYNAMIC_BURST
;
4096 ocp_data
|= DYNAMIC_BURST
;
4097 ocp_write_byte(tp
, MCU_TYPE_USB
, USB_CSR_DUMMY1
, ocp_data
);
4100 ocp_data
= ocp_read_byte(tp
, MCU_TYPE_USB
, USB_CSR_DUMMY2
);
4101 ocp_data
|= EP4_FULL_FC
;
4102 ocp_write_byte(tp
, MCU_TYPE_USB
, USB_CSR_DUMMY2
, ocp_data
);
4104 ocp_data
= ocp_read_word(tp
, MCU_TYPE_USB
, USB_WDT11_CTRL
);
4105 ocp_data
&= ~TIMER11_EN
;
4106 ocp_write_word(tp
, MCU_TYPE_USB
, USB_WDT11_CTRL
, ocp_data
);
4108 ocp_data
= ocp_read_word(tp
, MCU_TYPE_PLA
, PLA_LED_FEATURE
);
4109 ocp_data
&= ~LED_MODE_MASK
;
4110 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_LED_FEATURE
, ocp_data
);
4112 ocp_data
= FIFO_EMPTY_1FB
| ROK_EXIT_LPM
;
4113 if (tp
->version
== RTL_VER_04
&& tp
->udev
->speed
< USB_SPEED_SUPER
)
4114 ocp_data
|= LPM_TIMER_500MS
;
4116 ocp_data
|= LPM_TIMER_500US
;
4117 ocp_write_byte(tp
, MCU_TYPE_USB
, USB_LPM_CTRL
, ocp_data
);
4119 ocp_data
= ocp_read_word(tp
, MCU_TYPE_USB
, USB_AFE_CTRL2
);
4120 ocp_data
&= ~SEN_VAL_MASK
;
4121 ocp_data
|= SEN_VAL_NORMAL
| SEL_RXIDLE
;
4122 ocp_write_word(tp
, MCU_TYPE_USB
, USB_AFE_CTRL2
, ocp_data
);
4124 ocp_write_word(tp
, MCU_TYPE_USB
, USB_CONNECT_TIMER
, 0x0001);
4126 r8153_power_cut_en(tp
, false);
4127 r8153_u1u2en(tp
, true);
4128 r8153_mac_clk_spd(tp
, false);
4129 usb_enable_lpm(tp
->udev
);
4131 /* rx aggregation */
4132 ocp_data
= ocp_read_word(tp
, MCU_TYPE_USB
, USB_USB_CTRL
);
4133 ocp_data
&= ~(RX_AGG_DISABLE
| RX_ZERO_EN
);
4134 ocp_write_word(tp
, MCU_TYPE_USB
, USB_USB_CTRL
, ocp_data
);
4136 rtl_tally_reset(tp
);
4138 switch (tp
->udev
->speed
) {
4139 case USB_SPEED_SUPER
:
4140 case USB_SPEED_SUPER_PLUS
:
4141 tp
->coalesce
= COALESCE_SUPER
;
4143 case USB_SPEED_HIGH
:
4144 tp
->coalesce
= COALESCE_HIGH
;
4147 tp
->coalesce
= COALESCE_SLOW
;
4152 static void r8153b_init(struct r8152
*tp
)
4158 if (test_bit(RTL8152_UNPLUG
, &tp
->flags
))
4161 r8153b_u1u2en(tp
, false);
4163 for (i
= 0; i
< 500; i
++) {
4164 if (ocp_read_word(tp
, MCU_TYPE_PLA
, PLA_BOOT_CTRL
) &
4170 data
= r8153_phy_status(tp
, 0);
4172 data
= r8152_mdio_read(tp
, MII_BMCR
);
4173 if (data
& BMCR_PDOWN
) {
4174 data
&= ~BMCR_PDOWN
;
4175 r8152_mdio_write(tp
, MII_BMCR
, data
);
4178 data
= r8153_phy_status(tp
, PHY_STAT_LAN_ON
);
4180 r8153_u2p3en(tp
, false);
4182 /* MSC timer = 0xfff * 8ms = 32760 ms */
4183 ocp_write_word(tp
, MCU_TYPE_USB
, USB_MSC_TIMER
, 0x0fff);
4185 /* U1/U2/L1 idle timer. 500 us */
4186 ocp_write_word(tp
, MCU_TYPE_USB
, USB_U1U2_TIMER
, 500);
4188 r8153b_power_cut_en(tp
, false);
4189 r8153b_ups_en(tp
, false);
4190 r8153b_queue_wake(tp
, false);
4191 rtl_runtime_suspend_enable(tp
, false);
4192 r8153b_u1u2en(tp
, true);
4193 usb_enable_lpm(tp
->udev
);
4195 /* MAC clock speed down */
4196 ocp_data
= ocp_read_word(tp
, MCU_TYPE_PLA
, PLA_MAC_PWR_CTRL2
);
4197 ocp_data
|= MAC_CLK_SPDWN_EN
;
4198 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_MAC_PWR_CTRL2
, ocp_data
);
4200 set_bit(GREEN_ETHERNET
, &tp
->flags
);
4202 /* rx aggregation */
4203 ocp_data
= ocp_read_word(tp
, MCU_TYPE_USB
, USB_USB_CTRL
);
4204 ocp_data
&= ~(RX_AGG_DISABLE
| RX_ZERO_EN
);
4205 ocp_write_word(tp
, MCU_TYPE_USB
, USB_USB_CTRL
, ocp_data
);
4207 rtl_tally_reset(tp
);
4209 tp
->coalesce
= 15000; /* 15 us */
4212 static int rtl8152_pre_reset(struct usb_interface
*intf
)
4214 struct r8152
*tp
= usb_get_intfdata(intf
);
4215 struct net_device
*netdev
;
4220 netdev
= tp
->netdev
;
4221 if (!netif_running(netdev
))
4224 netif_stop_queue(netdev
);
4225 napi_disable(&tp
->napi
);
4226 clear_bit(WORK_ENABLE
, &tp
->flags
);
4227 usb_kill_urb(tp
->intr_urb
);
4228 cancel_delayed_work_sync(&tp
->schedule
);
4229 if (netif_carrier_ok(netdev
)) {
4230 mutex_lock(&tp
->control
);
4231 tp
->rtl_ops
.disable(tp
);
4232 mutex_unlock(&tp
->control
);
4238 static int rtl8152_post_reset(struct usb_interface
*intf
)
4240 struct r8152
*tp
= usb_get_intfdata(intf
);
4241 struct net_device
*netdev
;
4246 netdev
= tp
->netdev
;
4247 if (!netif_running(netdev
))
4250 set_bit(WORK_ENABLE
, &tp
->flags
);
4251 if (netif_carrier_ok(netdev
)) {
4252 mutex_lock(&tp
->control
);
4253 tp
->rtl_ops
.enable(tp
);
4255 rtl8152_set_rx_mode(netdev
);
4256 mutex_unlock(&tp
->control
);
4259 napi_enable(&tp
->napi
);
4260 netif_wake_queue(netdev
);
4261 usb_submit_urb(tp
->intr_urb
, GFP_KERNEL
);
4263 if (!list_empty(&tp
->rx_done
))
4264 napi_schedule(&tp
->napi
);
4269 static bool delay_autosuspend(struct r8152
*tp
)
4271 bool sw_linking
= !!netif_carrier_ok(tp
->netdev
);
4272 bool hw_linking
= !!(rtl8152_get_speed(tp
) & LINK_STATUS
);
4274 /* This means a linking change occurs and the driver doesn't detect it,
4275 * yet. If the driver has disabled tx/rx and hw is linking on, the
4276 * device wouldn't wake up by receiving any packet.
4278 if (work_busy(&tp
->schedule
.work
) || sw_linking
!= hw_linking
)
4281 /* If the linking down is occurred by nway, the device may miss the
4282 * linking change event. And it wouldn't wake when linking on.
4284 if (!sw_linking
&& tp
->rtl_ops
.in_nway(tp
))
4286 else if (!skb_queue_empty(&tp
->tx_queue
))
4292 static int rtl8152_runtime_resume(struct r8152
*tp
)
4294 struct net_device
*netdev
= tp
->netdev
;
4296 if (netif_running(netdev
) && netdev
->flags
& IFF_UP
) {
4297 struct napi_struct
*napi
= &tp
->napi
;
4299 tp
->rtl_ops
.autosuspend_en(tp
, false);
4301 set_bit(WORK_ENABLE
, &tp
->flags
);
4303 if (netif_carrier_ok(netdev
)) {
4304 if (rtl8152_get_speed(tp
) & LINK_STATUS
) {
4307 netif_carrier_off(netdev
);
4308 tp
->rtl_ops
.disable(tp
);
4309 netif_info(tp
, link
, netdev
, "linking down\n");
4314 clear_bit(SELECTIVE_SUSPEND
, &tp
->flags
);
4315 smp_mb__after_atomic();
4317 if (!list_empty(&tp
->rx_done
))
4318 napi_schedule(&tp
->napi
);
4320 usb_submit_urb(tp
->intr_urb
, GFP_NOIO
);
4322 if (netdev
->flags
& IFF_UP
)
4323 tp
->rtl_ops
.autosuspend_en(tp
, false);
4325 clear_bit(SELECTIVE_SUSPEND
, &tp
->flags
);
4331 static int rtl8152_system_resume(struct r8152
*tp
)
4333 struct net_device
*netdev
= tp
->netdev
;
4335 netif_device_attach(netdev
);
4337 if (netif_running(netdev
) && netdev
->flags
& IFF_UP
) {
4339 netif_carrier_off(netdev
);
4340 set_bit(WORK_ENABLE
, &tp
->flags
);
4341 usb_submit_urb(tp
->intr_urb
, GFP_NOIO
);
4347 static int rtl8152_runtime_suspend(struct r8152
*tp
)
4349 struct net_device
*netdev
= tp
->netdev
;
4352 set_bit(SELECTIVE_SUSPEND
, &tp
->flags
);
4353 smp_mb__after_atomic();
4355 if (netif_running(netdev
) && test_bit(WORK_ENABLE
, &tp
->flags
)) {
4358 if (netif_carrier_ok(netdev
)) {
4361 rcr
= ocp_read_dword(tp
, MCU_TYPE_PLA
, PLA_RCR
);
4362 ocp_data
= rcr
& ~RCR_ACPT_ALL
;
4363 ocp_write_dword(tp
, MCU_TYPE_PLA
, PLA_RCR
, ocp_data
);
4364 rxdy_gated_en(tp
, true);
4365 ocp_data
= ocp_read_byte(tp
, MCU_TYPE_PLA
,
4367 if (!(ocp_data
& RXFIFO_EMPTY
)) {
4368 rxdy_gated_en(tp
, false);
4369 ocp_write_dword(tp
, MCU_TYPE_PLA
, PLA_RCR
, rcr
);
4370 clear_bit(SELECTIVE_SUSPEND
, &tp
->flags
);
4371 smp_mb__after_atomic();
4377 clear_bit(WORK_ENABLE
, &tp
->flags
);
4378 usb_kill_urb(tp
->intr_urb
);
4380 tp
->rtl_ops
.autosuspend_en(tp
, true);
4382 if (netif_carrier_ok(netdev
)) {
4383 struct napi_struct
*napi
= &tp
->napi
;
4387 rxdy_gated_en(tp
, false);
4388 ocp_write_dword(tp
, MCU_TYPE_PLA
, PLA_RCR
, rcr
);
4392 if (delay_autosuspend(tp
)) {
4393 rtl8152_runtime_resume(tp
);
4402 static int rtl8152_system_suspend(struct r8152
*tp
)
4404 struct net_device
*netdev
= tp
->netdev
;
4407 netif_device_detach(netdev
);
4409 if (netif_running(netdev
) && test_bit(WORK_ENABLE
, &tp
->flags
)) {
4410 struct napi_struct
*napi
= &tp
->napi
;
4412 clear_bit(WORK_ENABLE
, &tp
->flags
);
4413 usb_kill_urb(tp
->intr_urb
);
4415 cancel_delayed_work_sync(&tp
->schedule
);
4416 tp
->rtl_ops
.down(tp
);
4423 static int rtl8152_suspend(struct usb_interface
*intf
, pm_message_t message
)
4425 struct r8152
*tp
= usb_get_intfdata(intf
);
4428 mutex_lock(&tp
->control
);
4430 if (PMSG_IS_AUTO(message
))
4431 ret
= rtl8152_runtime_suspend(tp
);
4433 ret
= rtl8152_system_suspend(tp
);
4435 mutex_unlock(&tp
->control
);
4440 static int rtl8152_resume(struct usb_interface
*intf
)
4442 struct r8152
*tp
= usb_get_intfdata(intf
);
4445 mutex_lock(&tp
->control
);
4447 if (test_bit(SELECTIVE_SUSPEND
, &tp
->flags
))
4448 ret
= rtl8152_runtime_resume(tp
);
4450 ret
= rtl8152_system_resume(tp
);
4452 mutex_unlock(&tp
->control
);
4457 static int rtl8152_reset_resume(struct usb_interface
*intf
)
4459 struct r8152
*tp
= usb_get_intfdata(intf
);
4461 clear_bit(SELECTIVE_SUSPEND
, &tp
->flags
);
4462 mutex_lock(&tp
->control
);
4463 tp
->rtl_ops
.init(tp
);
4464 queue_delayed_work(system_long_wq
, &tp
->hw_phy_work
, 0);
4465 mutex_unlock(&tp
->control
);
4466 return rtl8152_resume(intf
);
4469 static void rtl8152_get_wol(struct net_device
*dev
, struct ethtool_wolinfo
*wol
)
4471 struct r8152
*tp
= netdev_priv(dev
);
4473 if (usb_autopm_get_interface(tp
->intf
) < 0)
4476 if (!rtl_can_wakeup(tp
)) {
4480 mutex_lock(&tp
->control
);
4481 wol
->supported
= WAKE_ANY
;
4482 wol
->wolopts
= __rtl_get_wol(tp
);
4483 mutex_unlock(&tp
->control
);
4486 usb_autopm_put_interface(tp
->intf
);
4489 static int rtl8152_set_wol(struct net_device
*dev
, struct ethtool_wolinfo
*wol
)
4491 struct r8152
*tp
= netdev_priv(dev
);
4494 if (!rtl_can_wakeup(tp
))
4497 ret
= usb_autopm_get_interface(tp
->intf
);
4501 mutex_lock(&tp
->control
);
4503 __rtl_set_wol(tp
, wol
->wolopts
);
4504 tp
->saved_wolopts
= wol
->wolopts
& WAKE_ANY
;
4506 mutex_unlock(&tp
->control
);
4508 usb_autopm_put_interface(tp
->intf
);
4514 static u32
rtl8152_get_msglevel(struct net_device
*dev
)
4516 struct r8152
*tp
= netdev_priv(dev
);
4518 return tp
->msg_enable
;
4521 static void rtl8152_set_msglevel(struct net_device
*dev
, u32 value
)
4523 struct r8152
*tp
= netdev_priv(dev
);
4525 tp
->msg_enable
= value
;
4528 static void rtl8152_get_drvinfo(struct net_device
*netdev
,
4529 struct ethtool_drvinfo
*info
)
4531 struct r8152
*tp
= netdev_priv(netdev
);
4533 strlcpy(info
->driver
, MODULENAME
, sizeof(info
->driver
));
4534 strlcpy(info
->version
, DRIVER_VERSION
, sizeof(info
->version
));
4535 usb_make_path(tp
->udev
, info
->bus_info
, sizeof(info
->bus_info
));
4539 int rtl8152_get_link_ksettings(struct net_device
*netdev
,
4540 struct ethtool_link_ksettings
*cmd
)
4542 struct r8152
*tp
= netdev_priv(netdev
);
4545 if (!tp
->mii
.mdio_read
)
4548 ret
= usb_autopm_get_interface(tp
->intf
);
4552 mutex_lock(&tp
->control
);
4554 mii_ethtool_get_link_ksettings(&tp
->mii
, cmd
);
4556 mutex_unlock(&tp
->control
);
4558 usb_autopm_put_interface(tp
->intf
);
4564 static int rtl8152_set_link_ksettings(struct net_device
*dev
,
4565 const struct ethtool_link_ksettings
*cmd
)
4567 struct r8152
*tp
= netdev_priv(dev
);
4570 ret
= usb_autopm_get_interface(tp
->intf
);
4574 mutex_lock(&tp
->control
);
4576 ret
= rtl8152_set_speed(tp
, cmd
->base
.autoneg
, cmd
->base
.speed
,
4579 tp
->autoneg
= cmd
->base
.autoneg
;
4580 tp
->speed
= cmd
->base
.speed
;
4581 tp
->duplex
= cmd
->base
.duplex
;
4584 mutex_unlock(&tp
->control
);
4586 usb_autopm_put_interface(tp
->intf
);
4592 static const char rtl8152_gstrings
[][ETH_GSTRING_LEN
] = {
4599 "tx_single_collisions",
4600 "tx_multi_collisions",
4608 static int rtl8152_get_sset_count(struct net_device
*dev
, int sset
)
4612 return ARRAY_SIZE(rtl8152_gstrings
);
4618 static void rtl8152_get_ethtool_stats(struct net_device
*dev
,
4619 struct ethtool_stats
*stats
, u64
*data
)
4621 struct r8152
*tp
= netdev_priv(dev
);
4622 struct tally_counter tally
;
4624 if (usb_autopm_get_interface(tp
->intf
) < 0)
4627 generic_ocp_read(tp
, PLA_TALLYCNT
, sizeof(tally
), &tally
, MCU_TYPE_PLA
);
4629 usb_autopm_put_interface(tp
->intf
);
4631 data
[0] = le64_to_cpu(tally
.tx_packets
);
4632 data
[1] = le64_to_cpu(tally
.rx_packets
);
4633 data
[2] = le64_to_cpu(tally
.tx_errors
);
4634 data
[3] = le32_to_cpu(tally
.rx_errors
);
4635 data
[4] = le16_to_cpu(tally
.rx_missed
);
4636 data
[5] = le16_to_cpu(tally
.align_errors
);
4637 data
[6] = le32_to_cpu(tally
.tx_one_collision
);
4638 data
[7] = le32_to_cpu(tally
.tx_multi_collision
);
4639 data
[8] = le64_to_cpu(tally
.rx_unicast
);
4640 data
[9] = le64_to_cpu(tally
.rx_broadcast
);
4641 data
[10] = le32_to_cpu(tally
.rx_multicast
);
4642 data
[11] = le16_to_cpu(tally
.tx_aborted
);
4643 data
[12] = le16_to_cpu(tally
.tx_underrun
);
4646 static void rtl8152_get_strings(struct net_device
*dev
, u32 stringset
, u8
*data
)
4648 switch (stringset
) {
4650 memcpy(data
, *rtl8152_gstrings
, sizeof(rtl8152_gstrings
));
4655 static int r8152_get_eee(struct r8152
*tp
, struct ethtool_eee
*eee
)
4657 u32 ocp_data
, lp
, adv
, supported
= 0;
4660 val
= r8152_mmd_read(tp
, MDIO_MMD_PCS
, MDIO_PCS_EEE_ABLE
);
4661 supported
= mmd_eee_cap_to_ethtool_sup_t(val
);
4663 val
= r8152_mmd_read(tp
, MDIO_MMD_AN
, MDIO_AN_EEE_ADV
);
4664 adv
= mmd_eee_adv_to_ethtool_adv_t(val
);
4666 val
= r8152_mmd_read(tp
, MDIO_MMD_AN
, MDIO_AN_EEE_LPABLE
);
4667 lp
= mmd_eee_adv_to_ethtool_adv_t(val
);
4669 ocp_data
= ocp_read_word(tp
, MCU_TYPE_PLA
, PLA_EEE_CR
);
4670 ocp_data
&= EEE_RX_EN
| EEE_TX_EN
;
4672 eee
->eee_enabled
= !!ocp_data
;
4673 eee
->eee_active
= !!(supported
& adv
& lp
);
4674 eee
->supported
= supported
;
4675 eee
->advertised
= adv
;
4676 eee
->lp_advertised
= lp
;
4681 static int r8152_set_eee(struct r8152
*tp
, struct ethtool_eee
*eee
)
4683 u16 val
= ethtool_adv_to_mmd_eee_adv_t(eee
->advertised
);
4685 r8152_eee_en(tp
, eee
->eee_enabled
);
4687 if (!eee
->eee_enabled
)
4690 r8152_mmd_write(tp
, MDIO_MMD_AN
, MDIO_AN_EEE_ADV
, val
);
4695 static int r8153_get_eee(struct r8152
*tp
, struct ethtool_eee
*eee
)
4697 u32 ocp_data
, lp
, adv
, supported
= 0;
4700 val
= ocp_reg_read(tp
, OCP_EEE_ABLE
);
4701 supported
= mmd_eee_cap_to_ethtool_sup_t(val
);
4703 val
= ocp_reg_read(tp
, OCP_EEE_ADV
);
4704 adv
= mmd_eee_adv_to_ethtool_adv_t(val
);
4706 val
= ocp_reg_read(tp
, OCP_EEE_LPABLE
);
4707 lp
= mmd_eee_adv_to_ethtool_adv_t(val
);
4709 ocp_data
= ocp_read_word(tp
, MCU_TYPE_PLA
, PLA_EEE_CR
);
4710 ocp_data
&= EEE_RX_EN
| EEE_TX_EN
;
4712 eee
->eee_enabled
= !!ocp_data
;
4713 eee
->eee_active
= !!(supported
& adv
& lp
);
4714 eee
->supported
= supported
;
4715 eee
->advertised
= adv
;
4716 eee
->lp_advertised
= lp
;
4721 static int r8153_set_eee(struct r8152
*tp
, struct ethtool_eee
*eee
)
4723 u16 val
= ethtool_adv_to_mmd_eee_adv_t(eee
->advertised
);
4725 r8153_eee_en(tp
, eee
->eee_enabled
);
4727 if (!eee
->eee_enabled
)
4730 ocp_reg_write(tp
, OCP_EEE_ADV
, val
);
4735 static int r8153b_set_eee(struct r8152
*tp
, struct ethtool_eee
*eee
)
4737 u16 val
= ethtool_adv_to_mmd_eee_adv_t(eee
->advertised
);
4739 r8153b_eee_en(tp
, eee
->eee_enabled
);
4741 if (!eee
->eee_enabled
)
4744 ocp_reg_write(tp
, OCP_EEE_ADV
, val
);
4750 rtl_ethtool_get_eee(struct net_device
*net
, struct ethtool_eee
*edata
)
4752 struct r8152
*tp
= netdev_priv(net
);
4755 ret
= usb_autopm_get_interface(tp
->intf
);
4759 mutex_lock(&tp
->control
);
4761 ret
= tp
->rtl_ops
.eee_get(tp
, edata
);
4763 mutex_unlock(&tp
->control
);
4765 usb_autopm_put_interface(tp
->intf
);
4772 rtl_ethtool_set_eee(struct net_device
*net
, struct ethtool_eee
*edata
)
4774 struct r8152
*tp
= netdev_priv(net
);
4777 ret
= usb_autopm_get_interface(tp
->intf
);
4781 mutex_lock(&tp
->control
);
4783 ret
= tp
->rtl_ops
.eee_set(tp
, edata
);
4785 ret
= mii_nway_restart(&tp
->mii
);
4787 mutex_unlock(&tp
->control
);
4789 usb_autopm_put_interface(tp
->intf
);
4795 static int rtl8152_nway_reset(struct net_device
*dev
)
4797 struct r8152
*tp
= netdev_priv(dev
);
4800 ret
= usb_autopm_get_interface(tp
->intf
);
4804 mutex_lock(&tp
->control
);
4806 ret
= mii_nway_restart(&tp
->mii
);
4808 mutex_unlock(&tp
->control
);
4810 usb_autopm_put_interface(tp
->intf
);
4816 static int rtl8152_get_coalesce(struct net_device
*netdev
,
4817 struct ethtool_coalesce
*coalesce
)
4819 struct r8152
*tp
= netdev_priv(netdev
);
4821 switch (tp
->version
) {
4830 coalesce
->rx_coalesce_usecs
= tp
->coalesce
;
4835 static int rtl8152_set_coalesce(struct net_device
*netdev
,
4836 struct ethtool_coalesce
*coalesce
)
4838 struct r8152
*tp
= netdev_priv(netdev
);
4841 switch (tp
->version
) {
4850 if (coalesce
->rx_coalesce_usecs
> COALESCE_SLOW
)
4853 ret
= usb_autopm_get_interface(tp
->intf
);
4857 mutex_lock(&tp
->control
);
4859 if (tp
->coalesce
!= coalesce
->rx_coalesce_usecs
) {
4860 tp
->coalesce
= coalesce
->rx_coalesce_usecs
;
4862 if (netif_running(tp
->netdev
) && netif_carrier_ok(netdev
))
4863 r8153_set_rx_early_timeout(tp
);
4866 mutex_unlock(&tp
->control
);
4868 usb_autopm_put_interface(tp
->intf
);
4873 static const struct ethtool_ops ops
= {
4874 .get_drvinfo
= rtl8152_get_drvinfo
,
4875 .get_link
= ethtool_op_get_link
,
4876 .nway_reset
= rtl8152_nway_reset
,
4877 .get_msglevel
= rtl8152_get_msglevel
,
4878 .set_msglevel
= rtl8152_set_msglevel
,
4879 .get_wol
= rtl8152_get_wol
,
4880 .set_wol
= rtl8152_set_wol
,
4881 .get_strings
= rtl8152_get_strings
,
4882 .get_sset_count
= rtl8152_get_sset_count
,
4883 .get_ethtool_stats
= rtl8152_get_ethtool_stats
,
4884 .get_coalesce
= rtl8152_get_coalesce
,
4885 .set_coalesce
= rtl8152_set_coalesce
,
4886 .get_eee
= rtl_ethtool_get_eee
,
4887 .set_eee
= rtl_ethtool_set_eee
,
4888 .get_link_ksettings
= rtl8152_get_link_ksettings
,
4889 .set_link_ksettings
= rtl8152_set_link_ksettings
,
4892 static int rtl8152_ioctl(struct net_device
*netdev
, struct ifreq
*rq
, int cmd
)
4894 struct r8152
*tp
= netdev_priv(netdev
);
4895 struct mii_ioctl_data
*data
= if_mii(rq
);
4898 if (test_bit(RTL8152_UNPLUG
, &tp
->flags
))
4901 res
= usb_autopm_get_interface(tp
->intf
);
4907 data
->phy_id
= R8152_PHY_ID
; /* Internal PHY */
4911 mutex_lock(&tp
->control
);
4912 data
->val_out
= r8152_mdio_read(tp
, data
->reg_num
);
4913 mutex_unlock(&tp
->control
);
4917 if (!capable(CAP_NET_ADMIN
)) {
4921 mutex_lock(&tp
->control
);
4922 r8152_mdio_write(tp
, data
->reg_num
, data
->val_in
);
4923 mutex_unlock(&tp
->control
);
4930 usb_autopm_put_interface(tp
->intf
);
4936 static int rtl8152_change_mtu(struct net_device
*dev
, int new_mtu
)
4938 struct r8152
*tp
= netdev_priv(dev
);
4941 switch (tp
->version
) {
4951 ret
= usb_autopm_get_interface(tp
->intf
);
4955 mutex_lock(&tp
->control
);
4959 if (netif_running(dev
)) {
4960 u32 rms
= new_mtu
+ VLAN_ETH_HLEN
+ ETH_FCS_LEN
;
4962 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_RMS
, rms
);
4964 if (netif_carrier_ok(dev
))
4965 r8153_set_rx_early_size(tp
);
4968 mutex_unlock(&tp
->control
);
4970 usb_autopm_put_interface(tp
->intf
);
4975 static const struct net_device_ops rtl8152_netdev_ops
= {
4976 .ndo_open
= rtl8152_open
,
4977 .ndo_stop
= rtl8152_close
,
4978 .ndo_do_ioctl
= rtl8152_ioctl
,
4979 .ndo_start_xmit
= rtl8152_start_xmit
,
4980 .ndo_tx_timeout
= rtl8152_tx_timeout
,
4981 .ndo_set_features
= rtl8152_set_features
,
4982 .ndo_set_rx_mode
= rtl8152_set_rx_mode
,
4983 .ndo_set_mac_address
= rtl8152_set_mac_address
,
4984 .ndo_change_mtu
= rtl8152_change_mtu
,
4985 .ndo_validate_addr
= eth_validate_addr
,
4986 .ndo_features_check
= rtl8152_features_check
,
4989 static void rtl8152_unload(struct r8152
*tp
)
4991 if (test_bit(RTL8152_UNPLUG
, &tp
->flags
))
4994 if (tp
->version
!= RTL_VER_01
)
4995 r8152_power_cut_en(tp
, true);
4998 static void rtl8153_unload(struct r8152
*tp
)
5000 if (test_bit(RTL8152_UNPLUG
, &tp
->flags
))
5003 r8153_power_cut_en(tp
, false);
5006 static void rtl8153b_unload(struct r8152
*tp
)
5008 if (test_bit(RTL8152_UNPLUG
, &tp
->flags
))
5011 r8153b_power_cut_en(tp
, false);
5014 static int rtl_ops_init(struct r8152
*tp
)
5016 struct rtl_ops
*ops
= &tp
->rtl_ops
;
5019 switch (tp
->version
) {
5023 ops
->init
= r8152b_init
;
5024 ops
->enable
= rtl8152_enable
;
5025 ops
->disable
= rtl8152_disable
;
5026 ops
->up
= rtl8152_up
;
5027 ops
->down
= rtl8152_down
;
5028 ops
->unload
= rtl8152_unload
;
5029 ops
->eee_get
= r8152_get_eee
;
5030 ops
->eee_set
= r8152_set_eee
;
5031 ops
->in_nway
= rtl8152_in_nway
;
5032 ops
->hw_phy_cfg
= r8152b_hw_phy_cfg
;
5033 ops
->autosuspend_en
= rtl_runtime_suspend_enable
;
5040 ops
->init
= r8153_init
;
5041 ops
->enable
= rtl8153_enable
;
5042 ops
->disable
= rtl8153_disable
;
5043 ops
->up
= rtl8153_up
;
5044 ops
->down
= rtl8153_down
;
5045 ops
->unload
= rtl8153_unload
;
5046 ops
->eee_get
= r8153_get_eee
;
5047 ops
->eee_set
= r8153_set_eee
;
5048 ops
->in_nway
= rtl8153_in_nway
;
5049 ops
->hw_phy_cfg
= r8153_hw_phy_cfg
;
5050 ops
->autosuspend_en
= rtl8153_runtime_enable
;
5055 ops
->init
= r8153b_init
;
5056 ops
->enable
= rtl8153_enable
;
5057 ops
->disable
= rtl8153b_disable
;
5058 ops
->up
= rtl8153b_up
;
5059 ops
->down
= rtl8153b_down
;
5060 ops
->unload
= rtl8153b_unload
;
5061 ops
->eee_get
= r8153_get_eee
;
5062 ops
->eee_set
= r8153b_set_eee
;
5063 ops
->in_nway
= rtl8153_in_nway
;
5064 ops
->hw_phy_cfg
= r8153b_hw_phy_cfg
;
5065 ops
->autosuspend_en
= rtl8153b_runtime_enable
;
5070 netif_err(tp
, probe
, tp
->netdev
, "Unknown Device\n");
5077 static u8
rtl_get_version(struct usb_interface
*intf
)
5079 struct usb_device
*udev
= interface_to_usbdev(intf
);
5085 tmp
= kmalloc(sizeof(*tmp
), GFP_KERNEL
);
5089 ret
= usb_control_msg(udev
, usb_rcvctrlpipe(udev
, 0),
5090 RTL8152_REQ_GET_REGS
, RTL8152_REQT_READ
,
5091 PLA_TCR0
, MCU_TYPE_PLA
, tmp
, sizeof(*tmp
), 500);
5093 ocp_data
= (__le32_to_cpu(*tmp
) >> 16) & VERSION_MASK
;
5099 version
= RTL_VER_01
;
5102 version
= RTL_VER_02
;
5105 version
= RTL_VER_03
;
5108 version
= RTL_VER_04
;
5111 version
= RTL_VER_05
;
5114 version
= RTL_VER_06
;
5117 version
= RTL_VER_07
;
5120 version
= RTL_VER_08
;
5123 version
= RTL_VER_09
;
5126 version
= RTL_VER_UNKNOWN
;
5127 dev_info(&intf
->dev
, "Unknown version 0x%04x\n", ocp_data
);
5131 dev_dbg(&intf
->dev
, "Detected version 0x%04x\n", version
);
5136 static int rtl8152_probe(struct usb_interface
*intf
,
5137 const struct usb_device_id
*id
)
5139 struct usb_device
*udev
= interface_to_usbdev(intf
);
5140 u8 version
= rtl_get_version(intf
);
5142 struct net_device
*netdev
;
5145 if (version
== RTL_VER_UNKNOWN
)
5148 if (udev
->actconfig
->desc
.bConfigurationValue
!= 1) {
5149 usb_driver_set_configuration(udev
, 1);
5153 usb_reset_device(udev
);
5154 netdev
= alloc_etherdev(sizeof(struct r8152
));
5156 dev_err(&intf
->dev
, "Out of memory\n");
5160 SET_NETDEV_DEV(netdev
, &intf
->dev
);
5161 tp
= netdev_priv(netdev
);
5162 tp
->msg_enable
= 0x7FFF;
5165 tp
->netdev
= netdev
;
5167 tp
->version
= version
;
5173 tp
->mii
.supports_gmii
= 0;
5176 tp
->mii
.supports_gmii
= 1;
5180 ret
= rtl_ops_init(tp
);
5184 mutex_init(&tp
->control
);
5185 INIT_DELAYED_WORK(&tp
->schedule
, rtl_work_func_t
);
5186 INIT_DELAYED_WORK(&tp
->hw_phy_work
, rtl_hw_phy_work_func_t
);
5188 netdev
->netdev_ops
= &rtl8152_netdev_ops
;
5189 netdev
->watchdog_timeo
= RTL8152_TX_TIMEOUT
;
5191 netdev
->features
|= NETIF_F_RXCSUM
| NETIF_F_IP_CSUM
| NETIF_F_SG
|
5192 NETIF_F_TSO
| NETIF_F_FRAGLIST
| NETIF_F_IPV6_CSUM
|
5193 NETIF_F_TSO6
| NETIF_F_HW_VLAN_CTAG_RX
|
5194 NETIF_F_HW_VLAN_CTAG_TX
;
5195 netdev
->hw_features
= NETIF_F_RXCSUM
| NETIF_F_IP_CSUM
| NETIF_F_SG
|
5196 NETIF_F_TSO
| NETIF_F_FRAGLIST
|
5197 NETIF_F_IPV6_CSUM
| NETIF_F_TSO6
|
5198 NETIF_F_HW_VLAN_CTAG_RX
| NETIF_F_HW_VLAN_CTAG_TX
;
5199 netdev
->vlan_features
= NETIF_F_SG
| NETIF_F_IP_CSUM
| NETIF_F_TSO
|
5200 NETIF_F_HIGHDMA
| NETIF_F_FRAGLIST
|
5201 NETIF_F_IPV6_CSUM
| NETIF_F_TSO6
;
5203 if (tp
->version
== RTL_VER_01
) {
5204 netdev
->features
&= ~NETIF_F_RXCSUM
;
5205 netdev
->hw_features
&= ~NETIF_F_RXCSUM
;
5208 netdev
->ethtool_ops
= &ops
;
5209 netif_set_gso_max_size(netdev
, RTL_LIMITED_TSO_SIZE
);
5211 /* MTU range: 68 - 1500 or 9194 */
5212 netdev
->min_mtu
= ETH_MIN_MTU
;
5213 switch (tp
->version
) {
5216 netdev
->max_mtu
= ETH_DATA_LEN
;
5219 netdev
->max_mtu
= RTL8153_MAX_MTU
;
5223 tp
->mii
.dev
= netdev
;
5224 tp
->mii
.mdio_read
= read_mii_word
;
5225 tp
->mii
.mdio_write
= write_mii_word
;
5226 tp
->mii
.phy_id_mask
= 0x3f;
5227 tp
->mii
.reg_num_mask
= 0x1f;
5228 tp
->mii
.phy_id
= R8152_PHY_ID
;
5230 tp
->autoneg
= AUTONEG_ENABLE
;
5231 tp
->speed
= tp
->mii
.supports_gmii
? SPEED_1000
: SPEED_100
;
5232 tp
->duplex
= DUPLEX_FULL
;
5234 intf
->needs_remote_wakeup
= 1;
5236 tp
->rtl_ops
.init(tp
);
5237 queue_delayed_work(system_long_wq
, &tp
->hw_phy_work
, 0);
5238 set_ethernet_addr(tp
);
5240 usb_set_intfdata(intf
, tp
);
5241 netif_napi_add(netdev
, &tp
->napi
, r8152_poll
, RTL8152_NAPI_WEIGHT
);
5243 ret
= register_netdev(netdev
);
5245 netif_err(tp
, probe
, netdev
, "couldn't register the device\n");
5249 if (!rtl_can_wakeup(tp
))
5250 __rtl_set_wol(tp
, 0);
5252 tp
->saved_wolopts
= __rtl_get_wol(tp
);
5253 if (tp
->saved_wolopts
)
5254 device_set_wakeup_enable(&udev
->dev
, true);
5256 device_set_wakeup_enable(&udev
->dev
, false);
5258 netif_info(tp
, probe
, netdev
, "%s\n", DRIVER_VERSION
);
5263 netif_napi_del(&tp
->napi
);
5264 usb_set_intfdata(intf
, NULL
);
5266 free_netdev(netdev
);
5270 static void rtl8152_disconnect(struct usb_interface
*intf
)
5272 struct r8152
*tp
= usb_get_intfdata(intf
);
5274 usb_set_intfdata(intf
, NULL
);
5276 struct usb_device
*udev
= tp
->udev
;
5278 if (udev
->state
== USB_STATE_NOTATTACHED
)
5279 set_bit(RTL8152_UNPLUG
, &tp
->flags
);
5281 netif_napi_del(&tp
->napi
);
5282 unregister_netdev(tp
->netdev
);
5283 cancel_delayed_work_sync(&tp
->hw_phy_work
);
5284 tp
->rtl_ops
.unload(tp
);
5285 free_netdev(tp
->netdev
);
5289 #define REALTEK_USB_DEVICE(vend, prod) \
5290 .match_flags = USB_DEVICE_ID_MATCH_DEVICE | \
5291 USB_DEVICE_ID_MATCH_INT_CLASS, \
5292 .idVendor = (vend), \
5293 .idProduct = (prod), \
5294 .bInterfaceClass = USB_CLASS_VENDOR_SPEC \
5297 .match_flags = USB_DEVICE_ID_MATCH_INT_INFO | \
5298 USB_DEVICE_ID_MATCH_DEVICE, \
5299 .idVendor = (vend), \
5300 .idProduct = (prod), \
5301 .bInterfaceClass = USB_CLASS_COMM, \
5302 .bInterfaceSubClass = USB_CDC_SUBCLASS_ETHERNET, \
5303 .bInterfaceProtocol = USB_CDC_PROTO_NONE
5305 /* table of devices that work with this driver */
5306 static struct usb_device_id rtl8152_table
[] = {
5307 {REALTEK_USB_DEVICE(VENDOR_ID_REALTEK
, 0x8050)},
5308 {REALTEK_USB_DEVICE(VENDOR_ID_REALTEK
, 0x8152)},
5309 {REALTEK_USB_DEVICE(VENDOR_ID_REALTEK
, 0x8153)},
5310 {REALTEK_USB_DEVICE(VENDOR_ID_MICROSOFT
, 0x07ab)},
5311 {REALTEK_USB_DEVICE(VENDOR_ID_MICROSOFT
, 0x07c6)},
5312 {REALTEK_USB_DEVICE(VENDOR_ID_SAMSUNG
, 0xa101)},
5313 {REALTEK_USB_DEVICE(VENDOR_ID_LENOVO
, 0x304f)},
5314 {REALTEK_USB_DEVICE(VENDOR_ID_LENOVO
, 0x3062)},
5315 {REALTEK_USB_DEVICE(VENDOR_ID_LENOVO
, 0x3069)},
5316 {REALTEK_USB_DEVICE(VENDOR_ID_LENOVO
, 0x7205)},
5317 {REALTEK_USB_DEVICE(VENDOR_ID_LENOVO
, 0x720c)},
5318 {REALTEK_USB_DEVICE(VENDOR_ID_LENOVO
, 0x7214)},
5319 {REALTEK_USB_DEVICE(VENDOR_ID_NVIDIA
, 0x09ff)},
5323 MODULE_DEVICE_TABLE(usb
, rtl8152_table
);
5325 static struct usb_driver rtl8152_driver
= {
5327 .id_table
= rtl8152_table
,
5328 .probe
= rtl8152_probe
,
5329 .disconnect
= rtl8152_disconnect
,
5330 .suspend
= rtl8152_suspend
,
5331 .resume
= rtl8152_resume
,
5332 .reset_resume
= rtl8152_reset_resume
,
5333 .pre_reset
= rtl8152_pre_reset
,
5334 .post_reset
= rtl8152_post_reset
,
5335 .supports_autosuspend
= 1,
5336 .disable_hub_initiated_lpm
= 1,
5339 module_usb_driver(rtl8152_driver
);
5341 MODULE_AUTHOR(DRIVER_AUTHOR
);
5342 MODULE_DESCRIPTION(DRIVER_DESC
);
5343 MODULE_LICENSE("GPL");
5344 MODULE_VERSION(DRIVER_VERSION
);