1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (c) 2014 Realtek Semiconductor Corp. All rights reserved.
6 #include <linux/signal.h>
7 #include <linux/slab.h>
8 #include <linux/module.h>
9 #include <linux/netdevice.h>
10 #include <linux/etherdevice.h>
11 #include <linux/mii.h>
12 #include <linux/ethtool.h>
13 #include <linux/usb.h>
14 #include <linux/crc32.h>
15 #include <linux/if_vlan.h>
16 #include <linux/uaccess.h>
17 #include <linux/list.h>
19 #include <linux/ipv6.h>
20 #include <net/ip6_checksum.h>
21 #include <uapi/linux/mdio.h>
22 #include <linux/mdio.h>
23 #include <linux/usb/cdc.h>
24 #include <linux/suspend.h>
25 #include <linux/atomic.h>
26 #include <linux/acpi.h>
27 #include <linux/firmware.h>
28 #include <crypto/hash.h>
30 /* Information for net-next */
31 #define NETNEXT_VERSION "11"
33 /* Information for net */
34 #define NET_VERSION "11"
36 #define DRIVER_VERSION "v1." NETNEXT_VERSION "." NET_VERSION
37 #define DRIVER_AUTHOR "Realtek linux nic maintainers <nic_swsd@realtek.com>"
38 #define DRIVER_DESC "Realtek RTL8152/RTL8153 Based USB Ethernet Adapters"
39 #define MODULENAME "r8152"
41 #define R8152_PHY_ID 32
43 #define PLA_IDR 0xc000
44 #define PLA_RCR 0xc010
45 #define PLA_RMS 0xc016
46 #define PLA_RXFIFO_CTRL0 0xc0a0
47 #define PLA_RXFIFO_CTRL1 0xc0a4
48 #define PLA_RXFIFO_CTRL2 0xc0a8
49 #define PLA_DMY_REG0 0xc0b0
50 #define PLA_FMC 0xc0b4
51 #define PLA_CFG_WOL 0xc0b6
52 #define PLA_TEREDO_CFG 0xc0bc
53 #define PLA_TEREDO_WAKE_BASE 0xc0c4
54 #define PLA_MAR 0xcd00
55 #define PLA_BACKUP 0xd000
56 #define PLA_BDC_CR 0xd1a0
57 #define PLA_TEREDO_TIMER 0xd2cc
58 #define PLA_REALWOW_TIMER 0xd2e8
59 #define PLA_UPHY_TIMER 0xd388
60 #define PLA_SUSPEND_FLAG 0xd38a
61 #define PLA_INDICATE_FALG 0xd38c
62 #define PLA_MACDBG_PRE 0xd38c /* RTL_VER_04 only */
63 #define PLA_MACDBG_POST 0xd38e /* RTL_VER_04 only */
64 #define PLA_EXTRA_STATUS 0xd398
65 #define PLA_EFUSE_DATA 0xdd00
66 #define PLA_EFUSE_CMD 0xdd02
67 #define PLA_LEDSEL 0xdd90
68 #define PLA_LED_FEATURE 0xdd92
69 #define PLA_PHYAR 0xde00
70 #define PLA_BOOT_CTRL 0xe004
71 #define PLA_LWAKE_CTRL_REG 0xe007
72 #define PLA_GPHY_INTR_IMR 0xe022
73 #define PLA_EEE_CR 0xe040
74 #define PLA_EEEP_CR 0xe080
75 #define PLA_MAC_PWR_CTRL 0xe0c0
76 #define PLA_MAC_PWR_CTRL2 0xe0ca
77 #define PLA_MAC_PWR_CTRL3 0xe0cc
78 #define PLA_MAC_PWR_CTRL4 0xe0ce
79 #define PLA_WDT6_CTRL 0xe428
80 #define PLA_TCR0 0xe610
81 #define PLA_TCR1 0xe612
82 #define PLA_MTPS 0xe615
83 #define PLA_TXFIFO_CTRL 0xe618
84 #define PLA_RSTTALLY 0xe800
86 #define PLA_CRWECR 0xe81c
87 #define PLA_CONFIG12 0xe81e /* CONFIG1, CONFIG2 */
88 #define PLA_CONFIG34 0xe820 /* CONFIG3, CONFIG4 */
89 #define PLA_CONFIG5 0xe822
90 #define PLA_PHY_PWR 0xe84c
91 #define PLA_OOB_CTRL 0xe84f
92 #define PLA_CPCR 0xe854
93 #define PLA_MISC_0 0xe858
94 #define PLA_MISC_1 0xe85a
95 #define PLA_OCP_GPHY_BASE 0xe86c
96 #define PLA_TALLYCNT 0xe890
97 #define PLA_SFF_STS_7 0xe8de
98 #define PLA_PHYSTATUS 0xe908
99 #define PLA_CONFIG6 0xe90a /* CONFIG6 */
100 #define PLA_BP_BA 0xfc26
101 #define PLA_BP_0 0xfc28
102 #define PLA_BP_1 0xfc2a
103 #define PLA_BP_2 0xfc2c
104 #define PLA_BP_3 0xfc2e
105 #define PLA_BP_4 0xfc30
106 #define PLA_BP_5 0xfc32
107 #define PLA_BP_6 0xfc34
108 #define PLA_BP_7 0xfc36
109 #define PLA_BP_EN 0xfc38
111 #define USB_USB2PHY 0xb41e
112 #define USB_SSPHYLINK1 0xb426
113 #define USB_SSPHYLINK2 0xb428
114 #define USB_U2P3_CTRL 0xb460
115 #define USB_CSR_DUMMY1 0xb464
116 #define USB_CSR_DUMMY2 0xb466
117 #define USB_DEV_STAT 0xb808
118 #define USB_CONNECT_TIMER 0xcbf8
119 #define USB_MSC_TIMER 0xcbfc
120 #define USB_BURST_SIZE 0xcfc0
121 #define USB_FW_FIX_EN0 0xcfca
122 #define USB_FW_FIX_EN1 0xcfcc
123 #define USB_LPM_CONFIG 0xcfd8
124 #define USB_CSTMR 0xcfef /* RTL8153A */
125 #define USB_FW_CTRL 0xd334 /* RTL8153B */
126 #define USB_FC_TIMER 0xd340
127 #define USB_USB_CTRL 0xd406
128 #define USB_PHY_CTRL 0xd408
129 #define USB_TX_AGG 0xd40a
130 #define USB_RX_BUF_TH 0xd40c
131 #define USB_USB_TIMER 0xd428
132 #define USB_RX_EARLY_TIMEOUT 0xd42c
133 #define USB_RX_EARLY_SIZE 0xd42e
134 #define USB_PM_CTRL_STATUS 0xd432 /* RTL8153A */
135 #define USB_RX_EXTRA_AGGR_TMR 0xd432 /* RTL8153B */
136 #define USB_TX_DMA 0xd434
137 #define USB_UPT_RXDMA_OWN 0xd437
138 #define USB_TOLERANCE 0xd490
139 #define USB_LPM_CTRL 0xd41a
140 #define USB_BMU_RESET 0xd4b0
141 #define USB_U1U2_TIMER 0xd4da
142 #define USB_FW_TASK 0xd4e8 /* RTL8153B */
143 #define USB_UPS_CTRL 0xd800
144 #define USB_POWER_CUT 0xd80a
145 #define USB_MISC_0 0xd81a
146 #define USB_MISC_1 0xd81f
147 #define USB_AFE_CTRL2 0xd824
148 #define USB_UPS_CFG 0xd842
149 #define USB_UPS_FLAGS 0xd848
150 #define USB_WDT1_CTRL 0xe404
151 #define USB_WDT11_CTRL 0xe43c
152 #define USB_BP_BA PLA_BP_BA
153 #define USB_BP_0 PLA_BP_0
154 #define USB_BP_1 PLA_BP_1
155 #define USB_BP_2 PLA_BP_2
156 #define USB_BP_3 PLA_BP_3
157 #define USB_BP_4 PLA_BP_4
158 #define USB_BP_5 PLA_BP_5
159 #define USB_BP_6 PLA_BP_6
160 #define USB_BP_7 PLA_BP_7
161 #define USB_BP_EN PLA_BP_EN /* RTL8153A */
162 #define USB_BP_8 0xfc38 /* RTL8153B */
163 #define USB_BP_9 0xfc3a
164 #define USB_BP_10 0xfc3c
165 #define USB_BP_11 0xfc3e
166 #define USB_BP_12 0xfc40
167 #define USB_BP_13 0xfc42
168 #define USB_BP_14 0xfc44
169 #define USB_BP_15 0xfc46
170 #define USB_BP2_EN 0xfc48
173 #define OCP_ALDPS_CONFIG 0x2010
174 #define OCP_EEE_CONFIG1 0x2080
175 #define OCP_EEE_CONFIG2 0x2092
176 #define OCP_EEE_CONFIG3 0x2094
177 #define OCP_BASE_MII 0xa400
178 #define OCP_EEE_AR 0xa41a
179 #define OCP_EEE_DATA 0xa41c
180 #define OCP_PHY_STATUS 0xa420
181 #define OCP_NCTL_CFG 0xa42c
182 #define OCP_POWER_CFG 0xa430
183 #define OCP_EEE_CFG 0xa432
184 #define OCP_SRAM_ADDR 0xa436
185 #define OCP_SRAM_DATA 0xa438
186 #define OCP_DOWN_SPEED 0xa442
187 #define OCP_EEE_ABLE 0xa5c4
188 #define OCP_EEE_ADV 0xa5d0
189 #define OCP_EEE_LPABLE 0xa5d2
190 #define OCP_PHY_STATE 0xa708 /* nway state for 8153 */
191 #define OCP_PHY_PATCH_STAT 0xb800
192 #define OCP_PHY_PATCH_CMD 0xb820
193 #define OCP_PHY_LOCK 0xb82e
194 #define OCP_ADC_IOFFSET 0xbcfc
195 #define OCP_ADC_CFG 0xbc06
196 #define OCP_SYSCLK_CFG 0xc416
199 #define SRAM_GREEN_CFG 0x8011
200 #define SRAM_LPF_CFG 0x8012
201 #define SRAM_10M_AMP1 0x8080
202 #define SRAM_10M_AMP2 0x8082
203 #define SRAM_IMPEDANCE 0x8084
204 #define SRAM_PHY_LOCK 0xb82e
207 #define RCR_AAP 0x00000001
208 #define RCR_APM 0x00000002
209 #define RCR_AM 0x00000004
210 #define RCR_AB 0x00000008
211 #define RCR_ACPT_ALL (RCR_AAP | RCR_APM | RCR_AM | RCR_AB)
213 /* PLA_RXFIFO_CTRL0 */
214 #define RXFIFO_THR1_NORMAL 0x00080002
215 #define RXFIFO_THR1_OOB 0x01800003
217 /* PLA_RXFIFO_CTRL1 */
218 #define RXFIFO_THR2_FULL 0x00000060
219 #define RXFIFO_THR2_HIGH 0x00000038
220 #define RXFIFO_THR2_OOB 0x0000004a
221 #define RXFIFO_THR2_NORMAL 0x00a0
223 /* PLA_RXFIFO_CTRL2 */
224 #define RXFIFO_THR3_FULL 0x00000078
225 #define RXFIFO_THR3_HIGH 0x00000048
226 #define RXFIFO_THR3_OOB 0x0000005a
227 #define RXFIFO_THR3_NORMAL 0x0110
229 /* PLA_TXFIFO_CTRL */
230 #define TXFIFO_THR_NORMAL 0x00400008
231 #define TXFIFO_THR_NORMAL2 0x01000008
234 #define ECM_ALDPS 0x0002
237 #define FMC_FCR_MCU_EN 0x0001
240 #define EEEP_CR_EEEP_TX 0x0002
243 #define WDT6_SET_MODE 0x0010
246 #define TCR0_TX_EMPTY 0x0800
247 #define TCR0_AUTO_FIFO 0x0080
250 #define VERSION_MASK 0x7cf0
253 #define MTPS_JUMBO (12 * 1024 / 64)
254 #define MTPS_DEFAULT (6 * 1024 / 64)
257 #define TALLY_RESET 0x0001
265 #define CRWECR_NORAML 0x00
266 #define CRWECR_CONFIG 0xc0
269 #define NOW_IS_OOB 0x80
270 #define TXFIFO_EMPTY 0x20
271 #define RXFIFO_EMPTY 0x10
272 #define LINK_LIST_READY 0x02
273 #define DIS_MCU_CLROOB 0x01
274 #define FIFO_EMPTY (TXFIFO_EMPTY | RXFIFO_EMPTY)
277 #define RXDY_GATED_EN 0x0008
280 #define RE_INIT_LL 0x8000
281 #define MCU_BORW_EN 0x4000
284 #define CPCR_RX_VLAN 0x0040
287 #define MAGIC_EN 0x0001
290 #define TEREDO_SEL 0x8000
291 #define TEREDO_WAKE_MASK 0x7f00
292 #define TEREDO_RS_EVENT_MASK 0x00fe
293 #define OOB_TEREDO_EN 0x0001
296 #define ALDPS_PROXY_MODE 0x0001
299 #define EFUSE_READ_CMD BIT(15)
300 #define EFUSE_DATA_BIT16 BIT(7)
303 #define LINK_ON_WAKE_EN 0x0010
304 #define LINK_OFF_WAKE_EN 0x0008
307 #define LANWAKE_CLR_EN BIT(0)
310 #define BWF_EN 0x0040
311 #define MWF_EN 0x0020
312 #define UWF_EN 0x0010
313 #define LAN_WAKE_EN 0x0002
315 /* PLA_LED_FEATURE */
316 #define LED_MODE_MASK 0x0700
319 #define TX_10M_IDLE_EN 0x0080
320 #define PFM_PWM_SWITCH 0x0040
321 #define TEST_IO_OFF BIT(4)
323 /* PLA_MAC_PWR_CTRL */
324 #define D3_CLK_GATED_EN 0x00004000
325 #define MCU_CLK_RATIO 0x07010f07
326 #define MCU_CLK_RATIO_MASK 0x0f0f0f0f
327 #define ALDPS_SPDWN_RATIO 0x0f87
329 /* PLA_MAC_PWR_CTRL2 */
330 #define EEE_SPDWN_RATIO 0x8007
331 #define MAC_CLK_SPDWN_EN BIT(15)
333 /* PLA_MAC_PWR_CTRL3 */
334 #define PLA_MCU_SPDWN_EN BIT(14)
335 #define PKT_AVAIL_SPDWN_EN 0x0100
336 #define SUSPEND_SPDWN_EN 0x0004
337 #define U1U2_SPDWN_EN 0x0002
338 #define L1_SPDWN_EN 0x0001
340 /* PLA_MAC_PWR_CTRL4 */
341 #define PWRSAVE_SPDWN_EN 0x1000
342 #define RXDV_SPDWN_EN 0x0800
343 #define TX10MIDLE_EN 0x0100
344 #define TP100_SPDWN_EN 0x0020
345 #define TP500_SPDWN_EN 0x0010
346 #define TP1000_SPDWN_EN 0x0008
347 #define EEE_SPDWN_EN 0x0001
349 /* PLA_GPHY_INTR_IMR */
350 #define GPHY_STS_MSK 0x0001
351 #define SPEED_DOWN_MSK 0x0002
352 #define SPDWN_RXDV_MSK 0x0004
353 #define SPDWN_LINKCHG_MSK 0x0008
356 #define PHYAR_FLAG 0x80000000
359 #define EEE_RX_EN 0x0001
360 #define EEE_TX_EN 0x0002
363 #define AUTOLOAD_DONE 0x0002
365 /* PLA_LWAKE_CTRL_REG */
366 #define LANWAKE_PIN BIT(7)
368 /* PLA_SUSPEND_FLAG */
369 #define LINK_CHG_EVENT BIT(0)
371 /* PLA_INDICATE_FALG */
372 #define UPCOMING_RUNTIME_D3 BIT(0)
374 /* PLA_MACDBG_PRE and PLA_MACDBG_POST */
375 #define DEBUG_OE BIT(0)
376 #define DEBUG_LTSSM 0x0082
378 /* PLA_EXTRA_STATUS */
379 #define CUR_LINK_OK BIT(15)
380 #define U3P3_CHECK_EN BIT(7) /* RTL_VER_05 only */
381 #define LINK_CHANGE_FLAG BIT(8)
382 #define POLL_LINK_CHG BIT(0)
385 #define USB2PHY_SUSPEND 0x0001
386 #define USB2PHY_L1 0x0002
389 #define DELAY_PHY_PWR_CHG BIT(1)
392 #define pwd_dn_scale_mask 0x3ffe
393 #define pwd_dn_scale(x) ((x) << 1)
396 #define DYNAMIC_BURST 0x0001
399 #define EP4_FULL_FC 0x0001
402 #define STAT_SPEED_MASK 0x0006
403 #define STAT_SPEED_HIGH 0x0000
404 #define STAT_SPEED_FULL 0x0002
407 #define FW_FIX_SUSPEND BIT(14)
410 #define FW_IP_RESET_EN BIT(9)
413 #define LPM_U1U2_EN BIT(0)
416 #define TX_AGG_MAX_THRESHOLD 0x03
419 #define RX_THR_SUPPER 0x0c350180
420 #define RX_THR_HIGH 0x7a120180
421 #define RX_THR_SLOW 0xffff0180
422 #define RX_THR_B 0x00010001
425 #define TEST_MODE_DISABLE 0x00000001
426 #define TX_SIZE_ADJUST1 0x00000100
429 #define BMU_RESET_EP_IN 0x01
430 #define BMU_RESET_EP_OUT 0x02
432 /* USB_UPT_RXDMA_OWN */
433 #define OWN_UPDATE BIT(0)
434 #define OWN_CLEAR BIT(1)
437 #define FC_PATCH_TASK BIT(1)
440 #define POWER_CUT 0x0100
442 /* USB_PM_CTRL_STATUS */
443 #define RESUME_INDICATE 0x0001
446 #define FORCE_SUPER BIT(0)
449 #define FLOW_CTRL_PATCH_OPT BIT(1)
452 #define CTRL_TIMER_EN BIT(15)
455 #define RX_AGG_DISABLE 0x0010
456 #define RX_ZERO_EN 0x0080
459 #define U2P3_ENABLE 0x0001
462 #define PWR_EN 0x0001
463 #define PHASE2_EN 0x0008
464 #define UPS_EN BIT(4)
465 #define USP_PREWAKE BIT(5)
468 #define PCUT_STATUS 0x0001
470 /* USB_RX_EARLY_TIMEOUT */
471 #define COALESCE_SUPER 85000U
472 #define COALESCE_HIGH 250000U
473 #define COALESCE_SLOW 524280U
476 #define WTD1_EN BIT(0)
479 #define TIMER11_EN 0x0001
482 /* bit 4 ~ 5: fifo empty boundary */
483 #define FIFO_EMPTY_1FB 0x30 /* 0x1fb * 64 = 32448 bytes */
484 /* bit 2 ~ 3: LMP timer */
485 #define LPM_TIMER_MASK 0x0c
486 #define LPM_TIMER_500MS 0x04 /* 500 ms */
487 #define LPM_TIMER_500US 0x0c /* 500 us */
488 #define ROK_EXIT_LPM 0x02
491 #define SEN_VAL_MASK 0xf800
492 #define SEN_VAL_NORMAL 0xa000
493 #define SEL_RXIDLE 0x0100
496 #define SAW_CNT_1MS_MASK 0x0fff
499 #define UPS_FLAGS_R_TUNE BIT(0)
500 #define UPS_FLAGS_EN_10M_CKDIV BIT(1)
501 #define UPS_FLAGS_250M_CKDIV BIT(2)
502 #define UPS_FLAGS_EN_ALDPS BIT(3)
503 #define UPS_FLAGS_CTAP_SHORT_DIS BIT(4)
504 #define ups_flags_speed(x) ((x) << 16)
505 #define UPS_FLAGS_EN_EEE BIT(20)
506 #define UPS_FLAGS_EN_500M_EEE BIT(21)
507 #define UPS_FLAGS_EN_EEE_CKDIV BIT(22)
508 #define UPS_FLAGS_EEE_PLLOFF_100 BIT(23)
509 #define UPS_FLAGS_EEE_PLLOFF_GIGA BIT(24)
510 #define UPS_FLAGS_EEE_CMOD_LV_EN BIT(25)
511 #define UPS_FLAGS_EN_GREEN BIT(26)
512 #define UPS_FLAGS_EN_FLOW_CTR BIT(27)
526 /* OCP_ALDPS_CONFIG */
527 #define ENPWRSAVE 0x8000
528 #define ENPDNPS 0x0200
529 #define LINKENA 0x0100
530 #define DIS_SDSAVE 0x0010
533 #define PHY_STAT_MASK 0x0007
534 #define PHY_STAT_EXT_INIT 2
535 #define PHY_STAT_LAN_ON 3
536 #define PHY_STAT_PWRDN 5
539 #define PGA_RETURN_EN BIT(1)
542 #define EEE_CLKDIV_EN 0x8000
543 #define EN_ALDPS 0x0004
544 #define EN_10M_PLLOFF 0x0001
546 /* OCP_EEE_CONFIG1 */
547 #define RG_TXLPI_MSK_HFDUP 0x8000
548 #define RG_MATCLR_EN 0x4000
549 #define EEE_10_CAP 0x2000
550 #define EEE_NWAY_EN 0x1000
551 #define TX_QUIET_EN 0x0200
552 #define RX_QUIET_EN 0x0100
553 #define sd_rise_time_mask 0x0070
554 #define sd_rise_time(x) (min(x, 7) << 4) /* bit 4 ~ 6 */
555 #define RG_RXLPI_MSK_HFDUP 0x0008
556 #define SDFALLTIME 0x0007 /* bit 0 ~ 2 */
558 /* OCP_EEE_CONFIG2 */
559 #define RG_LPIHYS_NUM 0x7000 /* bit 12 ~ 15 */
560 #define RG_DACQUIET_EN 0x0400
561 #define RG_LDVQUIET_EN 0x0200
562 #define RG_CKRSEL 0x0020
563 #define RG_EEEPRG_EN 0x0010
565 /* OCP_EEE_CONFIG3 */
566 #define fast_snr_mask 0xff80
567 #define fast_snr(x) (min(x, 0x1ff) << 7) /* bit 7 ~ 15 */
568 #define RG_LFS_SEL 0x0060 /* bit 6 ~ 5 */
569 #define MSK_PH 0x0006 /* bit 0 ~ 3 */
572 /* bit[15:14] function */
573 #define FUN_ADDR 0x0000
574 #define FUN_DATA 0x4000
575 /* bit[4:0] device addr */
578 #define CTAP_SHORT_EN 0x0040
579 #define EEE10_EN 0x0010
582 #define EN_EEE_CMODE BIT(14)
583 #define EN_EEE_1000 BIT(13)
584 #define EN_EEE_100 BIT(12)
585 #define EN_10M_CLKDIV BIT(11)
586 #define EN_10M_BGOFF 0x0080
589 #define TXDIS_STATE 0x01
590 #define ABD_STATE 0x02
592 /* OCP_PHY_PATCH_STAT */
593 #define PATCH_READY BIT(6)
595 /* OCP_PHY_PATCH_CMD */
596 #define PATCH_REQUEST BIT(4)
599 #define PATCH_LOCK BIT(0)
602 #define CKADSEL_L 0x0100
603 #define ADC_EN 0x0080
604 #define EN_EMI_L 0x0040
607 #define clk_div_expo(x) (min(x, 5) << 8)
610 #define GREEN_ETH_EN BIT(15)
611 #define R_TUNE_EN BIT(11)
614 #define LPF_AUTO_TUNE 0x8000
617 #define GDAC_IB_UPALL 0x0008
620 #define AMP_DN 0x0200
623 #define RX_DRIVING_MASK 0x6000
626 #define PHY_PATCH_LOCK 0x0001
629 #define AD_MASK 0xfee0
630 #define BND_MASK 0x0004
631 #define BD_MASK 0x0001
633 #define PASS_THRU_MASK 0x1
635 #define BP4_SUPER_ONLY 0x1578 /* RTL_VER_04 only */
637 enum rtl_register_content
{
645 #define RTL8152_MAX_TX 4
646 #define RTL8152_MAX_RX 10
651 #define RTL8152_RX_MAX_PENDING 4096
652 #define RTL8152_RXFG_HEADSZ 256
654 #define INTR_LINK 0x0004
656 #define RTL8152_REQT_READ 0xc0
657 #define RTL8152_REQT_WRITE 0x40
658 #define RTL8152_REQ_GET_REGS 0x05
659 #define RTL8152_REQ_SET_REGS 0x05
661 #define BYTE_EN_DWORD 0xff
662 #define BYTE_EN_WORD 0x33
663 #define BYTE_EN_BYTE 0x11
664 #define BYTE_EN_SIX_BYTES 0x3f
665 #define BYTE_EN_START_MASK 0x0f
666 #define BYTE_EN_END_MASK 0xf0
668 #define RTL8153_MAX_PACKET 9216 /* 9K */
669 #define RTL8153_MAX_MTU (RTL8153_MAX_PACKET - VLAN_ETH_HLEN - \
671 #define RTL8152_RMS (VLAN_ETH_FRAME_LEN + ETH_FCS_LEN)
672 #define RTL8153_RMS RTL8153_MAX_PACKET
673 #define RTL8152_TX_TIMEOUT (5 * HZ)
674 #define RTL8152_NAPI_WEIGHT 64
675 #define rx_reserved_size(x) ((x) + VLAN_ETH_HLEN + ETH_FCS_LEN + \
676 sizeof(struct rx_desc) + RX_ALIGN)
692 /* Define these values to match your device */
693 #define VENDOR_ID_REALTEK 0x0bda
694 #define VENDOR_ID_MICROSOFT 0x045e
695 #define VENDOR_ID_SAMSUNG 0x04e8
696 #define VENDOR_ID_LENOVO 0x17ef
697 #define VENDOR_ID_LINKSYS 0x13b1
698 #define VENDOR_ID_NVIDIA 0x0955
699 #define VENDOR_ID_TPLINK 0x2357
701 #define DEVICE_ID_THINKPAD_THUNDERBOLT3_DOCK_GEN2 0x3082
702 #define DEVICE_ID_THINKPAD_USB_C_DOCK_GEN2 0xa387
704 #define MCU_TYPE_PLA 0x0100
705 #define MCU_TYPE_USB 0x0000
707 struct tally_counter
{
714 __le32 tx_one_collision
;
715 __le32 tx_multi_collision
;
725 #define RX_LEN_MASK 0x7fff
728 #define RD_UDP_CS BIT(23)
729 #define RD_TCP_CS BIT(22)
730 #define RD_IPV6_CS BIT(20)
731 #define RD_IPV4_CS BIT(19)
734 #define IPF BIT(23) /* IP checksum fail */
735 #define UDPF BIT(22) /* UDP checksum fail */
736 #define TCPF BIT(21) /* TCP checksum fail */
737 #define RX_VLAN_TAG BIT(16)
746 #define TX_FS BIT(31) /* First segment of a packet */
747 #define TX_LS BIT(30) /* Final segment of a packet */
748 #define GTSENDV4 BIT(28)
749 #define GTSENDV6 BIT(27)
750 #define GTTCPHO_SHIFT 18
751 #define GTTCPHO_MAX 0x7fU
752 #define TX_LEN_MAX 0x3ffffU
755 #define UDP_CS BIT(31) /* Calculate UDP/IP checksum */
756 #define TCP_CS BIT(30) /* Calculate TCP/IP checksum */
757 #define IPV4_CS BIT(29) /* Calculate IPv4 checksum */
758 #define IPV6_CS BIT(28) /* Calculate IPv6 checksum */
760 #define MSS_MAX 0x7ffU
761 #define TCPHO_SHIFT 17
762 #define TCPHO_MAX 0x7ffU
763 #define TX_VLAN_TAG BIT(16)
769 struct list_head list
, info_list
;
771 struct r8152
*context
;
777 struct list_head list
;
779 struct r8152
*context
;
788 struct usb_device
*udev
;
789 struct napi_struct napi
;
790 struct usb_interface
*intf
;
791 struct net_device
*netdev
;
792 struct urb
*intr_urb
;
793 struct tx_agg tx_info
[RTL8152_MAX_TX
];
794 struct list_head rx_info
, rx_used
;
795 struct list_head rx_done
, tx_free
;
796 struct sk_buff_head tx_queue
, rx_queue
;
797 spinlock_t rx_lock
, tx_lock
;
798 struct delayed_work schedule
, hw_phy_work
;
799 struct mii_if_info mii
;
800 struct mutex control
; /* use for hw setting */
801 #ifdef CONFIG_PM_SLEEP
802 struct notifier_block pm_notifier
;
804 struct tasklet_struct tx_tl
;
807 void (*init
)(struct r8152
*tp
);
808 int (*enable
)(struct r8152
*tp
);
809 void (*disable
)(struct r8152
*tp
);
810 void (*up
)(struct r8152
*tp
);
811 void (*down
)(struct r8152
*tp
);
812 void (*unload
)(struct r8152
*tp
);
813 int (*eee_get
)(struct r8152
*tp
, struct ethtool_eee
*eee
);
814 int (*eee_set
)(struct r8152
*tp
, struct ethtool_eee
*eee
);
815 bool (*in_nway
)(struct r8152
*tp
);
816 void (*hw_phy_cfg
)(struct r8152
*tp
);
817 void (*autosuspend_en
)(struct r8152
*tp
, bool enable
);
829 u32 eee_plloff_100
:1;
830 u32 eee_plloff_giga
:1;
834 u32 ctap_short_off
:1;
837 #define RTL_VER_SIZE 32
841 const struct firmware
*fw
;
843 char version
[RTL_VER_SIZE
];
844 int (*pre_fw
)(struct r8152
*tp
);
845 int (*post_fw
)(struct r8152
*tp
);
873 * struct fw_block - block type and total length
874 * @type: type of the current block, such as RTL_FW_END, RTL_FW_PLA,
875 * RTL_FW_USB and so on.
876 * @length: total length of the current block.
884 * struct fw_header - header of the firmware file
885 * @checksum: checksum of sha256 which is calculated from the whole file
886 * except the checksum field of the file. That is, calculate sha256
887 * from the version field to the end of the file.
888 * @version: version of this firmware.
889 * @blocks: the first firmware block of the file
893 char version
[RTL_VER_SIZE
];
894 struct fw_block blocks
[0];
898 * struct fw_mac - a firmware block used by RTL_FW_PLA and RTL_FW_USB.
899 * The layout of the firmware block is:
900 * <struct fw_mac> + <info> + <firmware data>.
901 * @fw_offset: offset of the firmware binary data. The start address of
902 * the data would be the address of struct fw_mac + @fw_offset.
903 * @fw_reg: the register to load the firmware. Depends on chip.
904 * @bp_ba_addr: the register to write break point base address. Depends on
906 * @bp_ba_value: break point base address. Depends on chip.
907 * @bp_en_addr: the register to write break point enabled mask. Depends
909 * @bp_en_value: break point enabled mask. Depends on the firmware.
910 * @bp_start: the start register of break points. Depends on chip.
911 * @bp_num: the break point number which needs to be set for this firmware.
912 * Depends on the firmware.
913 * @bp: break points. Depends on firmware.
914 * @fw_ver_reg: the register to store the fw version.
915 * @fw_ver_data: the firmware version of the current type.
916 * @info: additional information for debugging, and is followed by the
917 * binary data of firmware.
920 struct fw_block blk_hdr
;
929 __le16 bp
[16]; /* any value determined by firmware */
937 * struct fw_phy_patch_key - a firmware block used by RTL_FW_PHY_START.
938 * This is used to set patch key when loading the firmware of PHY.
939 * @key_reg: the register to write the patch key.
940 * @key_data: patch key.
942 struct fw_phy_patch_key
{
943 struct fw_block blk_hdr
;
950 * struct fw_phy_nc - a firmware block used by RTL_FW_PHY_NC.
951 * The layout of the firmware block is:
952 * <struct fw_phy_nc> + <info> + <firmware data>.
953 * @fw_offset: offset of the firmware binary data. The start address of
954 * the data would be the address of struct fw_phy_nc + @fw_offset.
955 * @fw_reg: the register to load the firmware. Depends on chip.
956 * @ba_reg: the register to write the base address. Depends on chip.
957 * @ba_data: base address. Depends on chip.
958 * @patch_en_addr: the register of enabling patch mode. Depends on chip.
959 * @patch_en_value: patch mode enabled mask. Depends on the firmware.
960 * @mode_reg: the regitster of switching the mode.
961 * @mod_pre: the mode needing to be set before loading the firmware.
962 * @mod_post: the mode to be set when finishing to load the firmware.
963 * @bp_start: the start register of break points. Depends on chip.
964 * @bp_num: the break point number which needs to be set for this firmware.
965 * Depends on the firmware.
966 * @bp: break points. Depends on firmware.
967 * @info: additional information for debugging, and is followed by the
968 * binary data of firmware.
971 struct fw_block blk_hdr
;
976 __le16 patch_en_addr
;
977 __le16 patch_en_value
;
1012 TX_CSUM_SUCCESS
= 0,
1017 #define RTL_ADVERTISED_10_HALF BIT(0)
1018 #define RTL_ADVERTISED_10_FULL BIT(1)
1019 #define RTL_ADVERTISED_100_HALF BIT(2)
1020 #define RTL_ADVERTISED_100_FULL BIT(3)
1021 #define RTL_ADVERTISED_1000_HALF BIT(4)
1022 #define RTL_ADVERTISED_1000_FULL BIT(5)
1024 /* Maximum number of multicast addresses to filter (vs. Rx-all-multicast).
1025 * The RTL chips use a 64 element hash table based on the Ethernet CRC.
1027 static const int multicast_filter_limit
= 32;
1028 static unsigned int agg_buf_sz
= 16384;
1030 #define RTL_LIMITED_TSO_SIZE (agg_buf_sz - sizeof(struct tx_desc) - \
1031 VLAN_ETH_HLEN - ETH_FCS_LEN)
1034 int get_registers(struct r8152
*tp
, u16 value
, u16 index
, u16 size
, void *data
)
1039 tmp
= kmalloc(size
, GFP_KERNEL
);
1043 ret
= usb_control_msg(tp
->udev
, usb_rcvctrlpipe(tp
->udev
, 0),
1044 RTL8152_REQ_GET_REGS
, RTL8152_REQT_READ
,
1045 value
, index
, tmp
, size
, 500);
1047 memset(data
, 0xff, size
);
1049 memcpy(data
, tmp
, size
);
1057 int set_registers(struct r8152
*tp
, u16 value
, u16 index
, u16 size
, void *data
)
1062 tmp
= kmemdup(data
, size
, GFP_KERNEL
);
1066 ret
= usb_control_msg(tp
->udev
, usb_sndctrlpipe(tp
->udev
, 0),
1067 RTL8152_REQ_SET_REGS
, RTL8152_REQT_WRITE
,
1068 value
, index
, tmp
, size
, 500);
1075 static void rtl_set_unplug(struct r8152
*tp
)
1077 if (tp
->udev
->state
== USB_STATE_NOTATTACHED
) {
1078 set_bit(RTL8152_UNPLUG
, &tp
->flags
);
1079 smp_mb__after_atomic();
1083 static int generic_ocp_read(struct r8152
*tp
, u16 index
, u16 size
,
1084 void *data
, u16 type
)
1089 if (test_bit(RTL8152_UNPLUG
, &tp
->flags
))
1092 /* both size and indix must be 4 bytes align */
1093 if ((size
& 3) || !size
|| (index
& 3) || !data
)
1096 if ((u32
)index
+ (u32
)size
> 0xffff)
1101 ret
= get_registers(tp
, index
, type
, limit
, data
);
1109 ret
= get_registers(tp
, index
, type
, size
, data
);
1126 static int generic_ocp_write(struct r8152
*tp
, u16 index
, u16 byteen
,
1127 u16 size
, void *data
, u16 type
)
1130 u16 byteen_start
, byteen_end
, byen
;
1133 if (test_bit(RTL8152_UNPLUG
, &tp
->flags
))
1136 /* both size and indix must be 4 bytes align */
1137 if ((size
& 3) || !size
|| (index
& 3) || !data
)
1140 if ((u32
)index
+ (u32
)size
> 0xffff)
1143 byteen_start
= byteen
& BYTE_EN_START_MASK
;
1144 byteen_end
= byteen
& BYTE_EN_END_MASK
;
1146 byen
= byteen_start
| (byteen_start
<< 4);
1147 ret
= set_registers(tp
, index
, type
| byen
, 4, data
);
1160 ret
= set_registers(tp
, index
,
1161 type
| BYTE_EN_DWORD
,
1170 ret
= set_registers(tp
, index
,
1171 type
| BYTE_EN_DWORD
,
1183 byen
= byteen_end
| (byteen_end
>> 4);
1184 ret
= set_registers(tp
, index
, type
| byen
, 4, data
);
1197 int pla_ocp_read(struct r8152
*tp
, u16 index
, u16 size
, void *data
)
1199 return generic_ocp_read(tp
, index
, size
, data
, MCU_TYPE_PLA
);
1203 int pla_ocp_write(struct r8152
*tp
, u16 index
, u16 byteen
, u16 size
, void *data
)
1205 return generic_ocp_write(tp
, index
, byteen
, size
, data
, MCU_TYPE_PLA
);
1209 int usb_ocp_write(struct r8152
*tp
, u16 index
, u16 byteen
, u16 size
, void *data
)
1211 return generic_ocp_write(tp
, index
, byteen
, size
, data
, MCU_TYPE_USB
);
1214 static u32
ocp_read_dword(struct r8152
*tp
, u16 type
, u16 index
)
1218 generic_ocp_read(tp
, index
, sizeof(data
), &data
, type
);
1220 return __le32_to_cpu(data
);
1223 static void ocp_write_dword(struct r8152
*tp
, u16 type
, u16 index
, u32 data
)
1225 __le32 tmp
= __cpu_to_le32(data
);
1227 generic_ocp_write(tp
, index
, BYTE_EN_DWORD
, sizeof(tmp
), &tmp
, type
);
1230 static u16
ocp_read_word(struct r8152
*tp
, u16 type
, u16 index
)
1234 u16 byen
= BYTE_EN_WORD
;
1235 u8 shift
= index
& 2;
1240 generic_ocp_read(tp
, index
, sizeof(tmp
), &tmp
, type
| byen
);
1242 data
= __le32_to_cpu(tmp
);
1243 data
>>= (shift
* 8);
1249 static void ocp_write_word(struct r8152
*tp
, u16 type
, u16 index
, u32 data
)
1253 u16 byen
= BYTE_EN_WORD
;
1254 u8 shift
= index
& 2;
1260 mask
<<= (shift
* 8);
1261 data
<<= (shift
* 8);
1265 tmp
= __cpu_to_le32(data
);
1267 generic_ocp_write(tp
, index
, byen
, sizeof(tmp
), &tmp
, type
);
1270 static u8
ocp_read_byte(struct r8152
*tp
, u16 type
, u16 index
)
1274 u8 shift
= index
& 3;
1278 generic_ocp_read(tp
, index
, sizeof(tmp
), &tmp
, type
);
1280 data
= __le32_to_cpu(tmp
);
1281 data
>>= (shift
* 8);
1287 static void ocp_write_byte(struct r8152
*tp
, u16 type
, u16 index
, u32 data
)
1291 u16 byen
= BYTE_EN_BYTE
;
1292 u8 shift
= index
& 3;
1298 mask
<<= (shift
* 8);
1299 data
<<= (shift
* 8);
1303 tmp
= __cpu_to_le32(data
);
1305 generic_ocp_write(tp
, index
, byen
, sizeof(tmp
), &tmp
, type
);
1308 static u16
ocp_reg_read(struct r8152
*tp
, u16 addr
)
1310 u16 ocp_base
, ocp_index
;
1312 ocp_base
= addr
& 0xf000;
1313 if (ocp_base
!= tp
->ocp_base
) {
1314 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_OCP_GPHY_BASE
, ocp_base
);
1315 tp
->ocp_base
= ocp_base
;
1318 ocp_index
= (addr
& 0x0fff) | 0xb000;
1319 return ocp_read_word(tp
, MCU_TYPE_PLA
, ocp_index
);
1322 static void ocp_reg_write(struct r8152
*tp
, u16 addr
, u16 data
)
1324 u16 ocp_base
, ocp_index
;
1326 ocp_base
= addr
& 0xf000;
1327 if (ocp_base
!= tp
->ocp_base
) {
1328 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_OCP_GPHY_BASE
, ocp_base
);
1329 tp
->ocp_base
= ocp_base
;
1332 ocp_index
= (addr
& 0x0fff) | 0xb000;
1333 ocp_write_word(tp
, MCU_TYPE_PLA
, ocp_index
, data
);
1336 static inline void r8152_mdio_write(struct r8152
*tp
, u32 reg_addr
, u32 value
)
1338 ocp_reg_write(tp
, OCP_BASE_MII
+ reg_addr
* 2, value
);
1341 static inline int r8152_mdio_read(struct r8152
*tp
, u32 reg_addr
)
1343 return ocp_reg_read(tp
, OCP_BASE_MII
+ reg_addr
* 2);
1346 static void sram_write(struct r8152
*tp
, u16 addr
, u16 data
)
1348 ocp_reg_write(tp
, OCP_SRAM_ADDR
, addr
);
1349 ocp_reg_write(tp
, OCP_SRAM_DATA
, data
);
1352 static u16
sram_read(struct r8152
*tp
, u16 addr
)
1354 ocp_reg_write(tp
, OCP_SRAM_ADDR
, addr
);
1355 return ocp_reg_read(tp
, OCP_SRAM_DATA
);
1358 static int read_mii_word(struct net_device
*netdev
, int phy_id
, int reg
)
1360 struct r8152
*tp
= netdev_priv(netdev
);
1363 if (test_bit(RTL8152_UNPLUG
, &tp
->flags
))
1366 if (phy_id
!= R8152_PHY_ID
)
1369 ret
= r8152_mdio_read(tp
, reg
);
1375 void write_mii_word(struct net_device
*netdev
, int phy_id
, int reg
, int val
)
1377 struct r8152
*tp
= netdev_priv(netdev
);
1379 if (test_bit(RTL8152_UNPLUG
, &tp
->flags
))
1382 if (phy_id
!= R8152_PHY_ID
)
1385 r8152_mdio_write(tp
, reg
, val
);
1389 r8152_submit_rx(struct r8152
*tp
, struct rx_agg
*agg
, gfp_t mem_flags
);
1391 static int rtl8152_set_mac_address(struct net_device
*netdev
, void *p
)
1393 struct r8152
*tp
= netdev_priv(netdev
);
1394 struct sockaddr
*addr
= p
;
1395 int ret
= -EADDRNOTAVAIL
;
1397 if (!is_valid_ether_addr(addr
->sa_data
))
1400 ret
= usb_autopm_get_interface(tp
->intf
);
1404 mutex_lock(&tp
->control
);
1406 memcpy(netdev
->dev_addr
, addr
->sa_data
, netdev
->addr_len
);
1408 ocp_write_byte(tp
, MCU_TYPE_PLA
, PLA_CRWECR
, CRWECR_CONFIG
);
1409 pla_ocp_write(tp
, PLA_IDR
, BYTE_EN_SIX_BYTES
, 8, addr
->sa_data
);
1410 ocp_write_byte(tp
, MCU_TYPE_PLA
, PLA_CRWECR
, CRWECR_NORAML
);
1412 mutex_unlock(&tp
->control
);
1414 usb_autopm_put_interface(tp
->intf
);
1419 /* Devices containing proper chips can support a persistent
1420 * host system provided MAC address.
1421 * Examples of this are Dell TB15 and Dell WD15 docks
1423 static int vendor_mac_passthru_addr_read(struct r8152
*tp
, struct sockaddr
*sa
)
1426 struct acpi_buffer buffer
= { ACPI_ALLOCATE_BUFFER
, NULL
};
1427 union acpi_object
*obj
;
1430 unsigned char buf
[6];
1432 acpi_object_type mac_obj_type
;
1435 if (test_bit(LENOVO_MACPASSTHRU
, &tp
->flags
)) {
1436 mac_obj_name
= "\\MACA";
1437 mac_obj_type
= ACPI_TYPE_STRING
;
1440 /* test for -AD variant of RTL8153 */
1441 ocp_data
= ocp_read_word(tp
, MCU_TYPE_USB
, USB_MISC_0
);
1442 if ((ocp_data
& AD_MASK
) == 0x1000) {
1443 /* test for MAC address pass-through bit */
1444 ocp_data
= ocp_read_byte(tp
, MCU_TYPE_USB
, EFUSE
);
1445 if ((ocp_data
& PASS_THRU_MASK
) != 1) {
1446 netif_dbg(tp
, probe
, tp
->netdev
,
1447 "No efuse for RTL8153-AD MAC pass through\n");
1451 /* test for RTL8153-BND and RTL8153-BD */
1452 ocp_data
= ocp_read_byte(tp
, MCU_TYPE_USB
, USB_MISC_1
);
1453 if ((ocp_data
& BND_MASK
) == 0 && (ocp_data
& BD_MASK
) == 0) {
1454 netif_dbg(tp
, probe
, tp
->netdev
,
1455 "Invalid variant for MAC pass through\n");
1460 mac_obj_name
= "\\_SB.AMAC";
1461 mac_obj_type
= ACPI_TYPE_BUFFER
;
1465 /* returns _AUXMAC_#AABBCCDDEEFF# */
1466 status
= acpi_evaluate_object(NULL
, mac_obj_name
, NULL
, &buffer
);
1467 obj
= (union acpi_object
*)buffer
.pointer
;
1468 if (!ACPI_SUCCESS(status
))
1470 if (obj
->type
!= mac_obj_type
|| obj
->string
.length
!= mac_strlen
) {
1471 netif_warn(tp
, probe
, tp
->netdev
,
1472 "Invalid buffer for pass-thru MAC addr: (%d, %d)\n",
1473 obj
->type
, obj
->string
.length
);
1477 if (strncmp(obj
->string
.pointer
, "_AUXMAC_#", 9) != 0 ||
1478 strncmp(obj
->string
.pointer
+ 0x15, "#", 1) != 0) {
1479 netif_warn(tp
, probe
, tp
->netdev
,
1480 "Invalid header when reading pass-thru MAC addr\n");
1483 ret
= hex2bin(buf
, obj
->string
.pointer
+ 9, 6);
1484 if (!(ret
== 0 && is_valid_ether_addr(buf
))) {
1485 netif_warn(tp
, probe
, tp
->netdev
,
1486 "Invalid MAC for pass-thru MAC addr: %d, %pM\n",
1491 memcpy(sa
->sa_data
, buf
, 6);
1492 netif_info(tp
, probe
, tp
->netdev
,
1493 "Using pass-thru MAC addr %pM\n", sa
->sa_data
);
1500 static int determine_ethernet_addr(struct r8152
*tp
, struct sockaddr
*sa
)
1502 struct net_device
*dev
= tp
->netdev
;
1505 sa
->sa_family
= dev
->type
;
1507 if (tp
->version
== RTL_VER_01
) {
1508 ret
= pla_ocp_read(tp
, PLA_IDR
, 8, sa
->sa_data
);
1510 /* if device doesn't support MAC pass through this will
1511 * be expected to be non-zero
1513 ret
= vendor_mac_passthru_addr_read(tp
, sa
);
1515 ret
= pla_ocp_read(tp
, PLA_BACKUP
, 8, sa
->sa_data
);
1519 netif_err(tp
, probe
, dev
, "Get ether addr fail\n");
1520 } else if (!is_valid_ether_addr(sa
->sa_data
)) {
1521 netif_err(tp
, probe
, dev
, "Invalid ether addr %pM\n",
1523 eth_hw_addr_random(dev
);
1524 ether_addr_copy(sa
->sa_data
, dev
->dev_addr
);
1525 netif_info(tp
, probe
, dev
, "Random ether addr %pM\n",
1533 static int set_ethernet_addr(struct r8152
*tp
)
1535 struct net_device
*dev
= tp
->netdev
;
1539 ret
= determine_ethernet_addr(tp
, &sa
);
1543 if (tp
->version
== RTL_VER_01
)
1544 ether_addr_copy(dev
->dev_addr
, sa
.sa_data
);
1546 ret
= rtl8152_set_mac_address(dev
, &sa
);
1551 static void read_bulk_callback(struct urb
*urb
)
1553 struct net_device
*netdev
;
1554 int status
= urb
->status
;
1557 unsigned long flags
;
1567 if (test_bit(RTL8152_UNPLUG
, &tp
->flags
))
1570 if (!test_bit(WORK_ENABLE
, &tp
->flags
))
1573 netdev
= tp
->netdev
;
1575 /* When link down, the driver would cancel all bulks. */
1576 /* This avoid the re-submitting bulk */
1577 if (!netif_carrier_ok(netdev
))
1580 usb_mark_last_busy(tp
->udev
);
1584 if (urb
->actual_length
< ETH_ZLEN
)
1587 spin_lock_irqsave(&tp
->rx_lock
, flags
);
1588 list_add_tail(&agg
->list
, &tp
->rx_done
);
1589 spin_unlock_irqrestore(&tp
->rx_lock
, flags
);
1590 napi_schedule(&tp
->napi
);
1594 netif_device_detach(tp
->netdev
);
1597 return; /* the urb is in unlink state */
1599 if (net_ratelimit())
1600 netdev_warn(netdev
, "maybe reset is needed?\n");
1603 if (net_ratelimit())
1604 netdev_warn(netdev
, "Rx status %d\n", status
);
1608 r8152_submit_rx(tp
, agg
, GFP_ATOMIC
);
1611 static void write_bulk_callback(struct urb
*urb
)
1613 struct net_device_stats
*stats
;
1614 struct net_device
*netdev
;
1617 unsigned long flags
;
1618 int status
= urb
->status
;
1628 netdev
= tp
->netdev
;
1629 stats
= &netdev
->stats
;
1631 if (net_ratelimit())
1632 netdev_warn(netdev
, "Tx status %d\n", status
);
1633 stats
->tx_errors
+= agg
->skb_num
;
1635 stats
->tx_packets
+= agg
->skb_num
;
1636 stats
->tx_bytes
+= agg
->skb_len
;
1639 spin_lock_irqsave(&tp
->tx_lock
, flags
);
1640 list_add_tail(&agg
->list
, &tp
->tx_free
);
1641 spin_unlock_irqrestore(&tp
->tx_lock
, flags
);
1643 usb_autopm_put_interface_async(tp
->intf
);
1645 if (!netif_carrier_ok(netdev
))
1648 if (!test_bit(WORK_ENABLE
, &tp
->flags
))
1651 if (test_bit(RTL8152_UNPLUG
, &tp
->flags
))
1654 if (!skb_queue_empty(&tp
->tx_queue
))
1655 tasklet_schedule(&tp
->tx_tl
);
1658 static void intr_callback(struct urb
*urb
)
1662 int status
= urb
->status
;
1669 if (!test_bit(WORK_ENABLE
, &tp
->flags
))
1672 if (test_bit(RTL8152_UNPLUG
, &tp
->flags
))
1676 case 0: /* success */
1678 case -ECONNRESET
: /* unlink */
1680 netif_device_detach(tp
->netdev
);
1684 netif_info(tp
, intr
, tp
->netdev
,
1685 "Stop submitting intr, status %d\n", status
);
1688 netif_info(tp
, intr
, tp
->netdev
, "intr status -EOVERFLOW\n");
1690 /* -EPIPE: should clear the halt */
1692 netif_info(tp
, intr
, tp
->netdev
, "intr status %d\n", status
);
1696 d
= urb
->transfer_buffer
;
1697 if (INTR_LINK
& __le16_to_cpu(d
[0])) {
1698 if (!netif_carrier_ok(tp
->netdev
)) {
1699 set_bit(RTL8152_LINK_CHG
, &tp
->flags
);
1700 schedule_delayed_work(&tp
->schedule
, 0);
1703 if (netif_carrier_ok(tp
->netdev
)) {
1704 netif_stop_queue(tp
->netdev
);
1705 set_bit(RTL8152_LINK_CHG
, &tp
->flags
);
1706 schedule_delayed_work(&tp
->schedule
, 0);
1711 res
= usb_submit_urb(urb
, GFP_ATOMIC
);
1712 if (res
== -ENODEV
) {
1714 netif_device_detach(tp
->netdev
);
1716 netif_err(tp
, intr
, tp
->netdev
,
1717 "can't resubmit intr, status %d\n", res
);
1721 static inline void *rx_agg_align(void *data
)
1723 return (void *)ALIGN((uintptr_t)data
, RX_ALIGN
);
1726 static inline void *tx_agg_align(void *data
)
1728 return (void *)ALIGN((uintptr_t)data
, TX_ALIGN
);
1731 static void free_rx_agg(struct r8152
*tp
, struct rx_agg
*agg
)
1733 list_del(&agg
->info_list
);
1735 usb_free_urb(agg
->urb
);
1736 put_page(agg
->page
);
1739 atomic_dec(&tp
->rx_count
);
1742 static struct rx_agg
*alloc_rx_agg(struct r8152
*tp
, gfp_t mflags
)
1744 struct net_device
*netdev
= tp
->netdev
;
1745 int node
= netdev
->dev
.parent
? dev_to_node(netdev
->dev
.parent
) : -1;
1746 unsigned int order
= get_order(tp
->rx_buf_sz
);
1747 struct rx_agg
*rx_agg
;
1748 unsigned long flags
;
1750 rx_agg
= kmalloc_node(sizeof(*rx_agg
), mflags
, node
);
1754 rx_agg
->page
= alloc_pages(mflags
| __GFP_COMP
, order
);
1758 rx_agg
->buffer
= page_address(rx_agg
->page
);
1760 rx_agg
->urb
= usb_alloc_urb(0, mflags
);
1764 rx_agg
->context
= tp
;
1766 INIT_LIST_HEAD(&rx_agg
->list
);
1767 INIT_LIST_HEAD(&rx_agg
->info_list
);
1768 spin_lock_irqsave(&tp
->rx_lock
, flags
);
1769 list_add_tail(&rx_agg
->info_list
, &tp
->rx_info
);
1770 spin_unlock_irqrestore(&tp
->rx_lock
, flags
);
1772 atomic_inc(&tp
->rx_count
);
1777 __free_pages(rx_agg
->page
, order
);
1783 static void free_all_mem(struct r8152
*tp
)
1785 struct rx_agg
*agg
, *agg_next
;
1786 unsigned long flags
;
1789 spin_lock_irqsave(&tp
->rx_lock
, flags
);
1791 list_for_each_entry_safe(agg
, agg_next
, &tp
->rx_info
, info_list
)
1792 free_rx_agg(tp
, agg
);
1794 spin_unlock_irqrestore(&tp
->rx_lock
, flags
);
1796 WARN_ON(atomic_read(&tp
->rx_count
));
1798 for (i
= 0; i
< RTL8152_MAX_TX
; i
++) {
1799 usb_free_urb(tp
->tx_info
[i
].urb
);
1800 tp
->tx_info
[i
].urb
= NULL
;
1802 kfree(tp
->tx_info
[i
].buffer
);
1803 tp
->tx_info
[i
].buffer
= NULL
;
1804 tp
->tx_info
[i
].head
= NULL
;
1807 usb_free_urb(tp
->intr_urb
);
1808 tp
->intr_urb
= NULL
;
1810 kfree(tp
->intr_buff
);
1811 tp
->intr_buff
= NULL
;
1814 static int alloc_all_mem(struct r8152
*tp
)
1816 struct net_device
*netdev
= tp
->netdev
;
1817 struct usb_interface
*intf
= tp
->intf
;
1818 struct usb_host_interface
*alt
= intf
->cur_altsetting
;
1819 struct usb_host_endpoint
*ep_intr
= alt
->endpoint
+ 2;
1822 node
= netdev
->dev
.parent
? dev_to_node(netdev
->dev
.parent
) : -1;
1824 spin_lock_init(&tp
->rx_lock
);
1825 spin_lock_init(&tp
->tx_lock
);
1826 INIT_LIST_HEAD(&tp
->rx_info
);
1827 INIT_LIST_HEAD(&tp
->tx_free
);
1828 INIT_LIST_HEAD(&tp
->rx_done
);
1829 skb_queue_head_init(&tp
->tx_queue
);
1830 skb_queue_head_init(&tp
->rx_queue
);
1831 atomic_set(&tp
->rx_count
, 0);
1833 for (i
= 0; i
< RTL8152_MAX_RX
; i
++) {
1834 if (!alloc_rx_agg(tp
, GFP_KERNEL
))
1838 for (i
= 0; i
< RTL8152_MAX_TX
; i
++) {
1842 buf
= kmalloc_node(agg_buf_sz
, GFP_KERNEL
, node
);
1846 if (buf
!= tx_agg_align(buf
)) {
1848 buf
= kmalloc_node(agg_buf_sz
+ TX_ALIGN
, GFP_KERNEL
,
1854 urb
= usb_alloc_urb(0, GFP_KERNEL
);
1860 INIT_LIST_HEAD(&tp
->tx_info
[i
].list
);
1861 tp
->tx_info
[i
].context
= tp
;
1862 tp
->tx_info
[i
].urb
= urb
;
1863 tp
->tx_info
[i
].buffer
= buf
;
1864 tp
->tx_info
[i
].head
= tx_agg_align(buf
);
1866 list_add_tail(&tp
->tx_info
[i
].list
, &tp
->tx_free
);
1869 tp
->intr_urb
= usb_alloc_urb(0, GFP_KERNEL
);
1873 tp
->intr_buff
= kmalloc(INTBUFSIZE
, GFP_KERNEL
);
1877 tp
->intr_interval
= (int)ep_intr
->desc
.bInterval
;
1878 usb_fill_int_urb(tp
->intr_urb
, tp
->udev
, usb_rcvintpipe(tp
->udev
, 3),
1879 tp
->intr_buff
, INTBUFSIZE
, intr_callback
,
1880 tp
, tp
->intr_interval
);
1889 static struct tx_agg
*r8152_get_tx_agg(struct r8152
*tp
)
1891 struct tx_agg
*agg
= NULL
;
1892 unsigned long flags
;
1894 if (list_empty(&tp
->tx_free
))
1897 spin_lock_irqsave(&tp
->tx_lock
, flags
);
1898 if (!list_empty(&tp
->tx_free
)) {
1899 struct list_head
*cursor
;
1901 cursor
= tp
->tx_free
.next
;
1902 list_del_init(cursor
);
1903 agg
= list_entry(cursor
, struct tx_agg
, list
);
1905 spin_unlock_irqrestore(&tp
->tx_lock
, flags
);
1910 /* r8152_csum_workaround()
1911 * The hw limits the value of the transport offset. When the offset is out of
1912 * range, calculate the checksum by sw.
1914 static void r8152_csum_workaround(struct r8152
*tp
, struct sk_buff
*skb
,
1915 struct sk_buff_head
*list
)
1917 if (skb_shinfo(skb
)->gso_size
) {
1918 netdev_features_t features
= tp
->netdev
->features
;
1919 struct sk_buff
*segs
, *seg
, *next
;
1920 struct sk_buff_head seg_list
;
1922 features
&= ~(NETIF_F_SG
| NETIF_F_IPV6_CSUM
| NETIF_F_TSO6
);
1923 segs
= skb_gso_segment(skb
, features
);
1924 if (IS_ERR(segs
) || !segs
)
1927 __skb_queue_head_init(&seg_list
);
1929 skb_list_walk_safe(segs
, seg
, next
) {
1930 skb_mark_not_on_list(seg
);
1931 __skb_queue_tail(&seg_list
, seg
);
1934 skb_queue_splice(&seg_list
, list
);
1936 } else if (skb
->ip_summed
== CHECKSUM_PARTIAL
) {
1937 if (skb_checksum_help(skb
) < 0)
1940 __skb_queue_head(list
, skb
);
1942 struct net_device_stats
*stats
;
1945 stats
= &tp
->netdev
->stats
;
1946 stats
->tx_dropped
++;
1951 /* msdn_giant_send_check()
1952 * According to the document of microsoft, the TCP Pseudo Header excludes the
1953 * packet length for IPv6 TCP large packets.
1955 static int msdn_giant_send_check(struct sk_buff
*skb
)
1957 const struct ipv6hdr
*ipv6h
;
1961 ret
= skb_cow_head(skb
, 0);
1965 ipv6h
= ipv6_hdr(skb
);
1969 th
->check
= ~tcp_v6_check(0, &ipv6h
->saddr
, &ipv6h
->daddr
, 0);
1974 static inline void rtl_tx_vlan_tag(struct tx_desc
*desc
, struct sk_buff
*skb
)
1976 if (skb_vlan_tag_present(skb
)) {
1979 opts2
= TX_VLAN_TAG
| swab16(skb_vlan_tag_get(skb
));
1980 desc
->opts2
|= cpu_to_le32(opts2
);
1984 static inline void rtl_rx_vlan_tag(struct rx_desc
*desc
, struct sk_buff
*skb
)
1986 u32 opts2
= le32_to_cpu(desc
->opts2
);
1988 if (opts2
& RX_VLAN_TAG
)
1989 __vlan_hwaccel_put_tag(skb
, htons(ETH_P_8021Q
),
1990 swab16(opts2
& 0xffff));
1993 static int r8152_tx_csum(struct r8152
*tp
, struct tx_desc
*desc
,
1994 struct sk_buff
*skb
, u32 len
, u32 transport_offset
)
1996 u32 mss
= skb_shinfo(skb
)->gso_size
;
1997 u32 opts1
, opts2
= 0;
1998 int ret
= TX_CSUM_SUCCESS
;
2000 WARN_ON_ONCE(len
> TX_LEN_MAX
);
2002 opts1
= len
| TX_FS
| TX_LS
;
2005 if (transport_offset
> GTTCPHO_MAX
) {
2006 netif_warn(tp
, tx_err
, tp
->netdev
,
2007 "Invalid transport offset 0x%x for TSO\n",
2013 switch (vlan_get_protocol(skb
)) {
2014 case htons(ETH_P_IP
):
2018 case htons(ETH_P_IPV6
):
2019 if (msdn_giant_send_check(skb
)) {
2031 opts1
|= transport_offset
<< GTTCPHO_SHIFT
;
2032 opts2
|= min(mss
, MSS_MAX
) << MSS_SHIFT
;
2033 } else if (skb
->ip_summed
== CHECKSUM_PARTIAL
) {
2036 if (transport_offset
> TCPHO_MAX
) {
2037 netif_warn(tp
, tx_err
, tp
->netdev
,
2038 "Invalid transport offset 0x%x\n",
2044 switch (vlan_get_protocol(skb
)) {
2045 case htons(ETH_P_IP
):
2047 ip_protocol
= ip_hdr(skb
)->protocol
;
2050 case htons(ETH_P_IPV6
):
2052 ip_protocol
= ipv6_hdr(skb
)->nexthdr
;
2056 ip_protocol
= IPPROTO_RAW
;
2060 if (ip_protocol
== IPPROTO_TCP
)
2062 else if (ip_protocol
== IPPROTO_UDP
)
2067 opts2
|= transport_offset
<< TCPHO_SHIFT
;
2070 desc
->opts2
= cpu_to_le32(opts2
);
2071 desc
->opts1
= cpu_to_le32(opts1
);
2077 static int r8152_tx_agg_fill(struct r8152
*tp
, struct tx_agg
*agg
)
2079 struct sk_buff_head skb_head
, *tx_queue
= &tp
->tx_queue
;
2083 __skb_queue_head_init(&skb_head
);
2084 spin_lock(&tx_queue
->lock
);
2085 skb_queue_splice_init(tx_queue
, &skb_head
);
2086 spin_unlock(&tx_queue
->lock
);
2088 tx_data
= agg
->head
;
2091 remain
= agg_buf_sz
;
2093 while (remain
>= ETH_ZLEN
+ sizeof(struct tx_desc
)) {
2094 struct tx_desc
*tx_desc
;
2095 struct sk_buff
*skb
;
2099 skb
= __skb_dequeue(&skb_head
);
2103 len
= skb
->len
+ sizeof(*tx_desc
);
2106 __skb_queue_head(&skb_head
, skb
);
2110 tx_data
= tx_agg_align(tx_data
);
2111 tx_desc
= (struct tx_desc
*)tx_data
;
2113 offset
= (u32
)skb_transport_offset(skb
);
2115 if (r8152_tx_csum(tp
, tx_desc
, skb
, skb
->len
, offset
)) {
2116 r8152_csum_workaround(tp
, skb
, &skb_head
);
2120 rtl_tx_vlan_tag(tx_desc
, skb
);
2122 tx_data
+= sizeof(*tx_desc
);
2125 if (skb_copy_bits(skb
, 0, tx_data
, len
) < 0) {
2126 struct net_device_stats
*stats
= &tp
->netdev
->stats
;
2128 stats
->tx_dropped
++;
2129 dev_kfree_skb_any(skb
);
2130 tx_data
-= sizeof(*tx_desc
);
2135 agg
->skb_len
+= len
;
2136 agg
->skb_num
+= skb_shinfo(skb
)->gso_segs
?: 1;
2138 dev_kfree_skb_any(skb
);
2140 remain
= agg_buf_sz
- (int)(tx_agg_align(tx_data
) - agg
->head
);
2142 if (test_bit(DELL_TB_RX_AGG_BUG
, &tp
->flags
))
2146 if (!skb_queue_empty(&skb_head
)) {
2147 spin_lock(&tx_queue
->lock
);
2148 skb_queue_splice(&skb_head
, tx_queue
);
2149 spin_unlock(&tx_queue
->lock
);
2152 netif_tx_lock(tp
->netdev
);
2154 if (netif_queue_stopped(tp
->netdev
) &&
2155 skb_queue_len(&tp
->tx_queue
) < tp
->tx_qlen
)
2156 netif_wake_queue(tp
->netdev
);
2158 netif_tx_unlock(tp
->netdev
);
2160 ret
= usb_autopm_get_interface_async(tp
->intf
);
2164 usb_fill_bulk_urb(agg
->urb
, tp
->udev
, usb_sndbulkpipe(tp
->udev
, 2),
2165 agg
->head
, (int)(tx_data
- (u8
*)agg
->head
),
2166 (usb_complete_t
)write_bulk_callback
, agg
);
2168 ret
= usb_submit_urb(agg
->urb
, GFP_ATOMIC
);
2170 usb_autopm_put_interface_async(tp
->intf
);
2176 static u8
r8152_rx_csum(struct r8152
*tp
, struct rx_desc
*rx_desc
)
2178 u8 checksum
= CHECKSUM_NONE
;
2181 if (!(tp
->netdev
->features
& NETIF_F_RXCSUM
))
2184 opts2
= le32_to_cpu(rx_desc
->opts2
);
2185 opts3
= le32_to_cpu(rx_desc
->opts3
);
2187 if (opts2
& RD_IPV4_CS
) {
2189 checksum
= CHECKSUM_NONE
;
2190 else if ((opts2
& RD_UDP_CS
) && !(opts3
& UDPF
))
2191 checksum
= CHECKSUM_UNNECESSARY
;
2192 else if ((opts2
& RD_TCP_CS
) && !(opts3
& TCPF
))
2193 checksum
= CHECKSUM_UNNECESSARY
;
2194 } else if (opts2
& RD_IPV6_CS
) {
2195 if ((opts2
& RD_UDP_CS
) && !(opts3
& UDPF
))
2196 checksum
= CHECKSUM_UNNECESSARY
;
2197 else if ((opts2
& RD_TCP_CS
) && !(opts3
& TCPF
))
2198 checksum
= CHECKSUM_UNNECESSARY
;
2205 static inline bool rx_count_exceed(struct r8152
*tp
)
2207 return atomic_read(&tp
->rx_count
) > RTL8152_MAX_RX
;
2210 static inline int agg_offset(struct rx_agg
*agg
, void *addr
)
2212 return (int)(addr
- agg
->buffer
);
2215 static struct rx_agg
*rtl_get_free_rx(struct r8152
*tp
, gfp_t mflags
)
2217 struct rx_agg
*agg
, *agg_next
, *agg_free
= NULL
;
2218 unsigned long flags
;
2220 spin_lock_irqsave(&tp
->rx_lock
, flags
);
2222 list_for_each_entry_safe(agg
, agg_next
, &tp
->rx_used
, list
) {
2223 if (page_count(agg
->page
) == 1) {
2225 list_del_init(&agg
->list
);
2229 if (rx_count_exceed(tp
)) {
2230 list_del_init(&agg
->list
);
2231 free_rx_agg(tp
, agg
);
2237 spin_unlock_irqrestore(&tp
->rx_lock
, flags
);
2239 if (!agg_free
&& atomic_read(&tp
->rx_count
) < tp
->rx_pending
)
2240 agg_free
= alloc_rx_agg(tp
, mflags
);
2245 static int rx_bottom(struct r8152
*tp
, int budget
)
2247 unsigned long flags
;
2248 struct list_head
*cursor
, *next
, rx_queue
;
2249 int ret
= 0, work_done
= 0;
2250 struct napi_struct
*napi
= &tp
->napi
;
2252 if (!skb_queue_empty(&tp
->rx_queue
)) {
2253 while (work_done
< budget
) {
2254 struct sk_buff
*skb
= __skb_dequeue(&tp
->rx_queue
);
2255 struct net_device
*netdev
= tp
->netdev
;
2256 struct net_device_stats
*stats
= &netdev
->stats
;
2257 unsigned int pkt_len
;
2263 napi_gro_receive(napi
, skb
);
2265 stats
->rx_packets
++;
2266 stats
->rx_bytes
+= pkt_len
;
2270 if (list_empty(&tp
->rx_done
))
2273 INIT_LIST_HEAD(&rx_queue
);
2274 spin_lock_irqsave(&tp
->rx_lock
, flags
);
2275 list_splice_init(&tp
->rx_done
, &rx_queue
);
2276 spin_unlock_irqrestore(&tp
->rx_lock
, flags
);
2278 list_for_each_safe(cursor
, next
, &rx_queue
) {
2279 struct rx_desc
*rx_desc
;
2280 struct rx_agg
*agg
, *agg_free
;
2285 list_del_init(cursor
);
2287 agg
= list_entry(cursor
, struct rx_agg
, list
);
2289 if (urb
->actual_length
< ETH_ZLEN
)
2292 agg_free
= rtl_get_free_rx(tp
, GFP_ATOMIC
);
2294 rx_desc
= agg
->buffer
;
2295 rx_data
= agg
->buffer
;
2296 len_used
+= sizeof(struct rx_desc
);
2298 while (urb
->actual_length
> len_used
) {
2299 struct net_device
*netdev
= tp
->netdev
;
2300 struct net_device_stats
*stats
= &netdev
->stats
;
2301 unsigned int pkt_len
, rx_frag_head_sz
;
2302 struct sk_buff
*skb
;
2304 /* limite the skb numbers for rx_queue */
2305 if (unlikely(skb_queue_len(&tp
->rx_queue
) >= 1000))
2308 pkt_len
= le32_to_cpu(rx_desc
->opts1
) & RX_LEN_MASK
;
2309 if (pkt_len
< ETH_ZLEN
)
2312 len_used
+= pkt_len
;
2313 if (urb
->actual_length
< len_used
)
2316 pkt_len
-= ETH_FCS_LEN
;
2317 rx_data
+= sizeof(struct rx_desc
);
2319 if (!agg_free
|| tp
->rx_copybreak
> pkt_len
)
2320 rx_frag_head_sz
= pkt_len
;
2322 rx_frag_head_sz
= tp
->rx_copybreak
;
2324 skb
= napi_alloc_skb(napi
, rx_frag_head_sz
);
2326 stats
->rx_dropped
++;
2330 skb
->ip_summed
= r8152_rx_csum(tp
, rx_desc
);
2331 memcpy(skb
->data
, rx_data
, rx_frag_head_sz
);
2332 skb_put(skb
, rx_frag_head_sz
);
2333 pkt_len
-= rx_frag_head_sz
;
2334 rx_data
+= rx_frag_head_sz
;
2336 skb_add_rx_frag(skb
, 0, agg
->page
,
2337 agg_offset(agg
, rx_data
),
2339 SKB_DATA_ALIGN(pkt_len
));
2340 get_page(agg
->page
);
2343 skb
->protocol
= eth_type_trans(skb
, netdev
);
2344 rtl_rx_vlan_tag(rx_desc
, skb
);
2345 if (work_done
< budget
) {
2347 stats
->rx_packets
++;
2348 stats
->rx_bytes
+= skb
->len
;
2349 napi_gro_receive(napi
, skb
);
2351 __skb_queue_tail(&tp
->rx_queue
, skb
);
2355 rx_data
= rx_agg_align(rx_data
+ pkt_len
+ ETH_FCS_LEN
);
2356 rx_desc
= (struct rx_desc
*)rx_data
;
2357 len_used
= agg_offset(agg
, rx_data
);
2358 len_used
+= sizeof(struct rx_desc
);
2361 WARN_ON(!agg_free
&& page_count(agg
->page
) > 1);
2364 spin_lock_irqsave(&tp
->rx_lock
, flags
);
2365 if (page_count(agg
->page
) == 1) {
2366 list_add(&agg_free
->list
, &tp
->rx_used
);
2368 list_add_tail(&agg
->list
, &tp
->rx_used
);
2372 spin_unlock_irqrestore(&tp
->rx_lock
, flags
);
2377 ret
= r8152_submit_rx(tp
, agg
, GFP_ATOMIC
);
2379 urb
->actual_length
= 0;
2380 list_add_tail(&agg
->list
, next
);
2384 if (!list_empty(&rx_queue
)) {
2385 spin_lock_irqsave(&tp
->rx_lock
, flags
);
2386 list_splice_tail(&rx_queue
, &tp
->rx_done
);
2387 spin_unlock_irqrestore(&tp
->rx_lock
, flags
);
2394 static void tx_bottom(struct r8152
*tp
)
2399 struct net_device
*netdev
= tp
->netdev
;
2402 if (skb_queue_empty(&tp
->tx_queue
))
2405 agg
= r8152_get_tx_agg(tp
);
2409 res
= r8152_tx_agg_fill(tp
, agg
);
2413 if (res
== -ENODEV
) {
2415 netif_device_detach(netdev
);
2417 struct net_device_stats
*stats
= &netdev
->stats
;
2418 unsigned long flags
;
2420 netif_warn(tp
, tx_err
, netdev
,
2421 "failed tx_urb %d\n", res
);
2422 stats
->tx_dropped
+= agg
->skb_num
;
2424 spin_lock_irqsave(&tp
->tx_lock
, flags
);
2425 list_add_tail(&agg
->list
, &tp
->tx_free
);
2426 spin_unlock_irqrestore(&tp
->tx_lock
, flags
);
2431 static void bottom_half(unsigned long data
)
2435 tp
= (struct r8152
*)data
;
2437 if (test_bit(RTL8152_UNPLUG
, &tp
->flags
))
2440 if (!test_bit(WORK_ENABLE
, &tp
->flags
))
2443 /* When link down, the driver would cancel all bulks. */
2444 /* This avoid the re-submitting bulk */
2445 if (!netif_carrier_ok(tp
->netdev
))
2448 clear_bit(SCHEDULE_TASKLET
, &tp
->flags
);
2453 static int r8152_poll(struct napi_struct
*napi
, int budget
)
2455 struct r8152
*tp
= container_of(napi
, struct r8152
, napi
);
2458 work_done
= rx_bottom(tp
, budget
);
2460 if (work_done
< budget
) {
2461 if (!napi_complete_done(napi
, work_done
))
2463 if (!list_empty(&tp
->rx_done
))
2464 napi_schedule(napi
);
2472 int r8152_submit_rx(struct r8152
*tp
, struct rx_agg
*agg
, gfp_t mem_flags
)
2476 /* The rx would be stopped, so skip submitting */
2477 if (test_bit(RTL8152_UNPLUG
, &tp
->flags
) ||
2478 !test_bit(WORK_ENABLE
, &tp
->flags
) || !netif_carrier_ok(tp
->netdev
))
2481 usb_fill_bulk_urb(agg
->urb
, tp
->udev
, usb_rcvbulkpipe(tp
->udev
, 1),
2482 agg
->buffer
, tp
->rx_buf_sz
,
2483 (usb_complete_t
)read_bulk_callback
, agg
);
2485 ret
= usb_submit_urb(agg
->urb
, mem_flags
);
2486 if (ret
== -ENODEV
) {
2488 netif_device_detach(tp
->netdev
);
2490 struct urb
*urb
= agg
->urb
;
2491 unsigned long flags
;
2493 urb
->actual_length
= 0;
2494 spin_lock_irqsave(&tp
->rx_lock
, flags
);
2495 list_add_tail(&agg
->list
, &tp
->rx_done
);
2496 spin_unlock_irqrestore(&tp
->rx_lock
, flags
);
2498 netif_err(tp
, rx_err
, tp
->netdev
,
2499 "Couldn't submit rx[%p], ret = %d\n", agg
, ret
);
2501 napi_schedule(&tp
->napi
);
2507 static void rtl_drop_queued_tx(struct r8152
*tp
)
2509 struct net_device_stats
*stats
= &tp
->netdev
->stats
;
2510 struct sk_buff_head skb_head
, *tx_queue
= &tp
->tx_queue
;
2511 struct sk_buff
*skb
;
2513 if (skb_queue_empty(tx_queue
))
2516 __skb_queue_head_init(&skb_head
);
2517 spin_lock_bh(&tx_queue
->lock
);
2518 skb_queue_splice_init(tx_queue
, &skb_head
);
2519 spin_unlock_bh(&tx_queue
->lock
);
2521 while ((skb
= __skb_dequeue(&skb_head
))) {
2523 stats
->tx_dropped
++;
2527 static void rtl8152_tx_timeout(struct net_device
*netdev
, unsigned int txqueue
)
2529 struct r8152
*tp
= netdev_priv(netdev
);
2531 netif_warn(tp
, tx_err
, netdev
, "Tx timeout\n");
2533 usb_queue_reset_device(tp
->intf
);
2536 static void rtl8152_set_rx_mode(struct net_device
*netdev
)
2538 struct r8152
*tp
= netdev_priv(netdev
);
2540 if (netif_carrier_ok(netdev
)) {
2541 set_bit(RTL8152_SET_RX_MODE
, &tp
->flags
);
2542 schedule_delayed_work(&tp
->schedule
, 0);
2546 static void _rtl8152_set_rx_mode(struct net_device
*netdev
)
2548 struct r8152
*tp
= netdev_priv(netdev
);
2549 u32 mc_filter
[2]; /* Multicast hash filter */
2553 netif_stop_queue(netdev
);
2554 ocp_data
= ocp_read_dword(tp
, MCU_TYPE_PLA
, PLA_RCR
);
2555 ocp_data
&= ~RCR_ACPT_ALL
;
2556 ocp_data
|= RCR_AB
| RCR_APM
;
2558 if (netdev
->flags
& IFF_PROMISC
) {
2559 /* Unconditionally log net taps. */
2560 netif_notice(tp
, link
, netdev
, "Promiscuous mode enabled\n");
2561 ocp_data
|= RCR_AM
| RCR_AAP
;
2562 mc_filter
[1] = 0xffffffff;
2563 mc_filter
[0] = 0xffffffff;
2564 } else if ((netdev_mc_count(netdev
) > multicast_filter_limit
) ||
2565 (netdev
->flags
& IFF_ALLMULTI
)) {
2566 /* Too many to filter perfectly -- accept all multicasts. */
2568 mc_filter
[1] = 0xffffffff;
2569 mc_filter
[0] = 0xffffffff;
2571 struct netdev_hw_addr
*ha
;
2575 netdev_for_each_mc_addr(ha
, netdev
) {
2576 int bit_nr
= ether_crc(ETH_ALEN
, ha
->addr
) >> 26;
2578 mc_filter
[bit_nr
>> 5] |= 1 << (bit_nr
& 31);
2583 tmp
[0] = __cpu_to_le32(swab32(mc_filter
[1]));
2584 tmp
[1] = __cpu_to_le32(swab32(mc_filter
[0]));
2586 pla_ocp_write(tp
, PLA_MAR
, BYTE_EN_DWORD
, sizeof(tmp
), tmp
);
2587 ocp_write_dword(tp
, MCU_TYPE_PLA
, PLA_RCR
, ocp_data
);
2588 netif_wake_queue(netdev
);
2591 static netdev_features_t
2592 rtl8152_features_check(struct sk_buff
*skb
, struct net_device
*dev
,
2593 netdev_features_t features
)
2595 u32 mss
= skb_shinfo(skb
)->gso_size
;
2596 int max_offset
= mss
? GTTCPHO_MAX
: TCPHO_MAX
;
2597 int offset
= skb_transport_offset(skb
);
2599 if ((mss
|| skb
->ip_summed
== CHECKSUM_PARTIAL
) && offset
> max_offset
)
2600 features
&= ~(NETIF_F_CSUM_MASK
| NETIF_F_GSO_MASK
);
2601 else if ((skb
->len
+ sizeof(struct tx_desc
)) > agg_buf_sz
)
2602 features
&= ~NETIF_F_GSO_MASK
;
2607 static netdev_tx_t
rtl8152_start_xmit(struct sk_buff
*skb
,
2608 struct net_device
*netdev
)
2610 struct r8152
*tp
= netdev_priv(netdev
);
2612 skb_tx_timestamp(skb
);
2614 skb_queue_tail(&tp
->tx_queue
, skb
);
2616 if (!list_empty(&tp
->tx_free
)) {
2617 if (test_bit(SELECTIVE_SUSPEND
, &tp
->flags
)) {
2618 set_bit(SCHEDULE_TASKLET
, &tp
->flags
);
2619 schedule_delayed_work(&tp
->schedule
, 0);
2621 usb_mark_last_busy(tp
->udev
);
2622 tasklet_schedule(&tp
->tx_tl
);
2624 } else if (skb_queue_len(&tp
->tx_queue
) > tp
->tx_qlen
) {
2625 netif_stop_queue(netdev
);
2628 return NETDEV_TX_OK
;
2631 static void r8152b_reset_packet_filter(struct r8152
*tp
)
2635 ocp_data
= ocp_read_word(tp
, MCU_TYPE_PLA
, PLA_FMC
);
2636 ocp_data
&= ~FMC_FCR_MCU_EN
;
2637 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_FMC
, ocp_data
);
2638 ocp_data
|= FMC_FCR_MCU_EN
;
2639 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_FMC
, ocp_data
);
2642 static void rtl8152_nic_reset(struct r8152
*tp
)
2646 ocp_write_byte(tp
, MCU_TYPE_PLA
, PLA_CR
, CR_RST
);
2648 for (i
= 0; i
< 1000; i
++) {
2649 if (!(ocp_read_byte(tp
, MCU_TYPE_PLA
, PLA_CR
) & CR_RST
))
2651 usleep_range(100, 400);
2655 static void set_tx_qlen(struct r8152
*tp
)
2657 struct net_device
*netdev
= tp
->netdev
;
2659 tp
->tx_qlen
= agg_buf_sz
/ (netdev
->mtu
+ VLAN_ETH_HLEN
+ ETH_FCS_LEN
+
2660 sizeof(struct tx_desc
));
2663 static inline u8
rtl8152_get_speed(struct r8152
*tp
)
2665 return ocp_read_byte(tp
, MCU_TYPE_PLA
, PLA_PHYSTATUS
);
2668 static void rtl_set_eee_plus(struct r8152
*tp
)
2673 speed
= rtl8152_get_speed(tp
);
2674 if (speed
& _10bps
) {
2675 ocp_data
= ocp_read_word(tp
, MCU_TYPE_PLA
, PLA_EEEP_CR
);
2676 ocp_data
|= EEEP_CR_EEEP_TX
;
2677 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_EEEP_CR
, ocp_data
);
2679 ocp_data
= ocp_read_word(tp
, MCU_TYPE_PLA
, PLA_EEEP_CR
);
2680 ocp_data
&= ~EEEP_CR_EEEP_TX
;
2681 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_EEEP_CR
, ocp_data
);
2685 static void rxdy_gated_en(struct r8152
*tp
, bool enable
)
2689 ocp_data
= ocp_read_word(tp
, MCU_TYPE_PLA
, PLA_MISC_1
);
2691 ocp_data
|= RXDY_GATED_EN
;
2693 ocp_data
&= ~RXDY_GATED_EN
;
2694 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_MISC_1
, ocp_data
);
2697 static int rtl_start_rx(struct r8152
*tp
)
2699 struct rx_agg
*agg
, *agg_next
;
2700 struct list_head tmp_list
;
2701 unsigned long flags
;
2704 INIT_LIST_HEAD(&tmp_list
);
2706 spin_lock_irqsave(&tp
->rx_lock
, flags
);
2708 INIT_LIST_HEAD(&tp
->rx_done
);
2709 INIT_LIST_HEAD(&tp
->rx_used
);
2711 list_splice_init(&tp
->rx_info
, &tmp_list
);
2713 spin_unlock_irqrestore(&tp
->rx_lock
, flags
);
2715 list_for_each_entry_safe(agg
, agg_next
, &tmp_list
, info_list
) {
2716 INIT_LIST_HEAD(&agg
->list
);
2718 /* Only RTL8152_MAX_RX rx_agg need to be submitted. */
2719 if (++i
> RTL8152_MAX_RX
) {
2720 spin_lock_irqsave(&tp
->rx_lock
, flags
);
2721 list_add_tail(&agg
->list
, &tp
->rx_used
);
2722 spin_unlock_irqrestore(&tp
->rx_lock
, flags
);
2723 } else if (unlikely(ret
< 0)) {
2724 spin_lock_irqsave(&tp
->rx_lock
, flags
);
2725 list_add_tail(&agg
->list
, &tp
->rx_done
);
2726 spin_unlock_irqrestore(&tp
->rx_lock
, flags
);
2728 ret
= r8152_submit_rx(tp
, agg
, GFP_KERNEL
);
2732 spin_lock_irqsave(&tp
->rx_lock
, flags
);
2733 WARN_ON(!list_empty(&tp
->rx_info
));
2734 list_splice(&tmp_list
, &tp
->rx_info
);
2735 spin_unlock_irqrestore(&tp
->rx_lock
, flags
);
2740 static int rtl_stop_rx(struct r8152
*tp
)
2742 struct rx_agg
*agg
, *agg_next
;
2743 struct list_head tmp_list
;
2744 unsigned long flags
;
2746 INIT_LIST_HEAD(&tmp_list
);
2748 /* The usb_kill_urb() couldn't be used in atomic.
2749 * Therefore, move the list of rx_info to a tmp one.
2750 * Then, list_for_each_entry_safe could be used without
2754 spin_lock_irqsave(&tp
->rx_lock
, flags
);
2755 list_splice_init(&tp
->rx_info
, &tmp_list
);
2756 spin_unlock_irqrestore(&tp
->rx_lock
, flags
);
2758 list_for_each_entry_safe(agg
, agg_next
, &tmp_list
, info_list
) {
2759 /* At least RTL8152_MAX_RX rx_agg have the page_count being
2760 * equal to 1, so the other ones could be freed safely.
2762 if (page_count(agg
->page
) > 1)
2763 free_rx_agg(tp
, agg
);
2765 usb_kill_urb(agg
->urb
);
2768 /* Move back the list of temp to the rx_info */
2769 spin_lock_irqsave(&tp
->rx_lock
, flags
);
2770 WARN_ON(!list_empty(&tp
->rx_info
));
2771 list_splice(&tmp_list
, &tp
->rx_info
);
2772 spin_unlock_irqrestore(&tp
->rx_lock
, flags
);
2774 while (!skb_queue_empty(&tp
->rx_queue
))
2775 dev_kfree_skb(__skb_dequeue(&tp
->rx_queue
));
2780 static inline void r8153b_rx_agg_chg_indicate(struct r8152
*tp
)
2782 ocp_write_byte(tp
, MCU_TYPE_USB
, USB_UPT_RXDMA_OWN
,
2783 OWN_UPDATE
| OWN_CLEAR
);
2786 static int rtl_enable(struct r8152
*tp
)
2790 r8152b_reset_packet_filter(tp
);
2792 ocp_data
= ocp_read_byte(tp
, MCU_TYPE_PLA
, PLA_CR
);
2793 ocp_data
|= CR_RE
| CR_TE
;
2794 ocp_write_byte(tp
, MCU_TYPE_PLA
, PLA_CR
, ocp_data
);
2796 switch (tp
->version
) {
2799 r8153b_rx_agg_chg_indicate(tp
);
2805 rxdy_gated_en(tp
, false);
2810 static int rtl8152_enable(struct r8152
*tp
)
2812 if (test_bit(RTL8152_UNPLUG
, &tp
->flags
))
2816 rtl_set_eee_plus(tp
);
2818 return rtl_enable(tp
);
2821 static void r8153_set_rx_early_timeout(struct r8152
*tp
)
2823 u32 ocp_data
= tp
->coalesce
/ 8;
2825 switch (tp
->version
) {
2830 ocp_write_word(tp
, MCU_TYPE_USB
, USB_RX_EARLY_TIMEOUT
,
2836 /* The RTL8153B uses USB_RX_EXTRA_AGGR_TMR for rx timeout
2837 * primarily. For USB_RX_EARLY_TIMEOUT, we fix it to 128ns.
2839 ocp_write_word(tp
, MCU_TYPE_USB
, USB_RX_EARLY_TIMEOUT
,
2841 ocp_write_word(tp
, MCU_TYPE_USB
, USB_RX_EXTRA_AGGR_TMR
,
2850 static void r8153_set_rx_early_size(struct r8152
*tp
)
2852 u32 ocp_data
= tp
->rx_buf_sz
- rx_reserved_size(tp
->netdev
->mtu
);
2854 switch (tp
->version
) {
2859 ocp_write_word(tp
, MCU_TYPE_USB
, USB_RX_EARLY_SIZE
,
2864 ocp_write_word(tp
, MCU_TYPE_USB
, USB_RX_EARLY_SIZE
,
2873 static int rtl8153_enable(struct r8152
*tp
)
2875 if (test_bit(RTL8152_UNPLUG
, &tp
->flags
))
2879 rtl_set_eee_plus(tp
);
2880 r8153_set_rx_early_timeout(tp
);
2881 r8153_set_rx_early_size(tp
);
2883 if (tp
->version
== RTL_VER_09
) {
2886 ocp_data
= ocp_read_word(tp
, MCU_TYPE_USB
, USB_FW_TASK
);
2887 ocp_data
&= ~FC_PATCH_TASK
;
2888 ocp_write_word(tp
, MCU_TYPE_USB
, USB_FW_TASK
, ocp_data
);
2889 usleep_range(1000, 2000);
2890 ocp_data
|= FC_PATCH_TASK
;
2891 ocp_write_word(tp
, MCU_TYPE_USB
, USB_FW_TASK
, ocp_data
);
2894 return rtl_enable(tp
);
2897 static void rtl_disable(struct r8152
*tp
)
2902 if (test_bit(RTL8152_UNPLUG
, &tp
->flags
)) {
2903 rtl_drop_queued_tx(tp
);
2907 ocp_data
= ocp_read_dword(tp
, MCU_TYPE_PLA
, PLA_RCR
);
2908 ocp_data
&= ~RCR_ACPT_ALL
;
2909 ocp_write_dword(tp
, MCU_TYPE_PLA
, PLA_RCR
, ocp_data
);
2911 rtl_drop_queued_tx(tp
);
2913 for (i
= 0; i
< RTL8152_MAX_TX
; i
++)
2914 usb_kill_urb(tp
->tx_info
[i
].urb
);
2916 rxdy_gated_en(tp
, true);
2918 for (i
= 0; i
< 1000; i
++) {
2919 ocp_data
= ocp_read_byte(tp
, MCU_TYPE_PLA
, PLA_OOB_CTRL
);
2920 if ((ocp_data
& FIFO_EMPTY
) == FIFO_EMPTY
)
2922 usleep_range(1000, 2000);
2925 for (i
= 0; i
< 1000; i
++) {
2926 if (ocp_read_word(tp
, MCU_TYPE_PLA
, PLA_TCR0
) & TCR0_TX_EMPTY
)
2928 usleep_range(1000, 2000);
2933 rtl8152_nic_reset(tp
);
2936 static void r8152_power_cut_en(struct r8152
*tp
, bool enable
)
2940 ocp_data
= ocp_read_word(tp
, MCU_TYPE_USB
, USB_UPS_CTRL
);
2942 ocp_data
|= POWER_CUT
;
2944 ocp_data
&= ~POWER_CUT
;
2945 ocp_write_word(tp
, MCU_TYPE_USB
, USB_UPS_CTRL
, ocp_data
);
2947 ocp_data
= ocp_read_word(tp
, MCU_TYPE_USB
, USB_PM_CTRL_STATUS
);
2948 ocp_data
&= ~RESUME_INDICATE
;
2949 ocp_write_word(tp
, MCU_TYPE_USB
, USB_PM_CTRL_STATUS
, ocp_data
);
2952 static void rtl_rx_vlan_en(struct r8152
*tp
, bool enable
)
2956 ocp_data
= ocp_read_word(tp
, MCU_TYPE_PLA
, PLA_CPCR
);
2958 ocp_data
|= CPCR_RX_VLAN
;
2960 ocp_data
&= ~CPCR_RX_VLAN
;
2961 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_CPCR
, ocp_data
);
2964 static int rtl8152_set_features(struct net_device
*dev
,
2965 netdev_features_t features
)
2967 netdev_features_t changed
= features
^ dev
->features
;
2968 struct r8152
*tp
= netdev_priv(dev
);
2971 ret
= usb_autopm_get_interface(tp
->intf
);
2975 mutex_lock(&tp
->control
);
2977 if (changed
& NETIF_F_HW_VLAN_CTAG_RX
) {
2978 if (features
& NETIF_F_HW_VLAN_CTAG_RX
)
2979 rtl_rx_vlan_en(tp
, true);
2981 rtl_rx_vlan_en(tp
, false);
2984 mutex_unlock(&tp
->control
);
2986 usb_autopm_put_interface(tp
->intf
);
2992 #define WAKE_ANY (WAKE_PHY | WAKE_MAGIC | WAKE_UCAST | WAKE_BCAST | WAKE_MCAST)
2994 static u32
__rtl_get_wol(struct r8152
*tp
)
2999 ocp_data
= ocp_read_word(tp
, MCU_TYPE_PLA
, PLA_CONFIG34
);
3000 if (ocp_data
& LINK_ON_WAKE_EN
)
3001 wolopts
|= WAKE_PHY
;
3003 ocp_data
= ocp_read_word(tp
, MCU_TYPE_PLA
, PLA_CONFIG5
);
3004 if (ocp_data
& UWF_EN
)
3005 wolopts
|= WAKE_UCAST
;
3006 if (ocp_data
& BWF_EN
)
3007 wolopts
|= WAKE_BCAST
;
3008 if (ocp_data
& MWF_EN
)
3009 wolopts
|= WAKE_MCAST
;
3011 ocp_data
= ocp_read_word(tp
, MCU_TYPE_PLA
, PLA_CFG_WOL
);
3012 if (ocp_data
& MAGIC_EN
)
3013 wolopts
|= WAKE_MAGIC
;
3018 static void __rtl_set_wol(struct r8152
*tp
, u32 wolopts
)
3022 ocp_write_byte(tp
, MCU_TYPE_PLA
, PLA_CRWECR
, CRWECR_CONFIG
);
3024 ocp_data
= ocp_read_word(tp
, MCU_TYPE_PLA
, PLA_CONFIG34
);
3025 ocp_data
&= ~LINK_ON_WAKE_EN
;
3026 if (wolopts
& WAKE_PHY
)
3027 ocp_data
|= LINK_ON_WAKE_EN
;
3028 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_CONFIG34
, ocp_data
);
3030 ocp_data
= ocp_read_word(tp
, MCU_TYPE_PLA
, PLA_CONFIG5
);
3031 ocp_data
&= ~(UWF_EN
| BWF_EN
| MWF_EN
);
3032 if (wolopts
& WAKE_UCAST
)
3034 if (wolopts
& WAKE_BCAST
)
3036 if (wolopts
& WAKE_MCAST
)
3038 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_CONFIG5
, ocp_data
);
3040 ocp_write_byte(tp
, MCU_TYPE_PLA
, PLA_CRWECR
, CRWECR_NORAML
);
3042 ocp_data
= ocp_read_word(tp
, MCU_TYPE_PLA
, PLA_CFG_WOL
);
3043 ocp_data
&= ~MAGIC_EN
;
3044 if (wolopts
& WAKE_MAGIC
)
3045 ocp_data
|= MAGIC_EN
;
3046 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_CFG_WOL
, ocp_data
);
3048 if (wolopts
& WAKE_ANY
)
3049 device_set_wakeup_enable(&tp
->udev
->dev
, true);
3051 device_set_wakeup_enable(&tp
->udev
->dev
, false);
3054 static void r8153_mac_clk_spd(struct r8152
*tp
, bool enable
)
3056 /* MAC clock speed down */
3058 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_MAC_PWR_CTRL
,
3060 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_MAC_PWR_CTRL2
,
3062 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_MAC_PWR_CTRL3
,
3063 PKT_AVAIL_SPDWN_EN
| SUSPEND_SPDWN_EN
|
3064 U1U2_SPDWN_EN
| L1_SPDWN_EN
);
3065 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_MAC_PWR_CTRL4
,
3066 PWRSAVE_SPDWN_EN
| RXDV_SPDWN_EN
| TX10MIDLE_EN
|
3067 TP100_SPDWN_EN
| TP500_SPDWN_EN
| EEE_SPDWN_EN
|
3070 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_MAC_PWR_CTRL
, 0);
3071 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_MAC_PWR_CTRL2
, 0);
3072 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_MAC_PWR_CTRL3
, 0);
3073 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_MAC_PWR_CTRL4
, 0);
3077 static void r8153_u1u2en(struct r8152
*tp
, bool enable
)
3082 memset(u1u2
, 0xff, sizeof(u1u2
));
3084 memset(u1u2
, 0x00, sizeof(u1u2
));
3086 usb_ocp_write(tp
, USB_TOLERANCE
, BYTE_EN_SIX_BYTES
, sizeof(u1u2
), u1u2
);
3089 static void r8153b_u1u2en(struct r8152
*tp
, bool enable
)
3093 ocp_data
= ocp_read_word(tp
, MCU_TYPE_USB
, USB_LPM_CONFIG
);
3095 ocp_data
|= LPM_U1U2_EN
;
3097 ocp_data
&= ~LPM_U1U2_EN
;
3099 ocp_write_word(tp
, MCU_TYPE_USB
, USB_LPM_CONFIG
, ocp_data
);
3102 static void r8153_u2p3en(struct r8152
*tp
, bool enable
)
3106 ocp_data
= ocp_read_word(tp
, MCU_TYPE_USB
, USB_U2P3_CTRL
);
3108 ocp_data
|= U2P3_ENABLE
;
3110 ocp_data
&= ~U2P3_ENABLE
;
3111 ocp_write_word(tp
, MCU_TYPE_USB
, USB_U2P3_CTRL
, ocp_data
);
3114 static void r8153b_ups_flags(struct r8152
*tp
)
3118 if (tp
->ups_info
.green
)
3119 ups_flags
|= UPS_FLAGS_EN_GREEN
;
3121 if (tp
->ups_info
.aldps
)
3122 ups_flags
|= UPS_FLAGS_EN_ALDPS
;
3124 if (tp
->ups_info
.eee
)
3125 ups_flags
|= UPS_FLAGS_EN_EEE
;
3127 if (tp
->ups_info
.flow_control
)
3128 ups_flags
|= UPS_FLAGS_EN_FLOW_CTR
;
3130 if (tp
->ups_info
.eee_ckdiv
)
3131 ups_flags
|= UPS_FLAGS_EN_EEE_CKDIV
;
3133 if (tp
->ups_info
.eee_cmod_lv
)
3134 ups_flags
|= UPS_FLAGS_EEE_CMOD_LV_EN
;
3136 if (tp
->ups_info
._10m_ckdiv
)
3137 ups_flags
|= UPS_FLAGS_EN_10M_CKDIV
;
3139 if (tp
->ups_info
.eee_plloff_100
)
3140 ups_flags
|= UPS_FLAGS_EEE_PLLOFF_100
;
3142 if (tp
->ups_info
.eee_plloff_giga
)
3143 ups_flags
|= UPS_FLAGS_EEE_PLLOFF_GIGA
;
3145 if (tp
->ups_info
._250m_ckdiv
)
3146 ups_flags
|= UPS_FLAGS_250M_CKDIV
;
3148 if (tp
->ups_info
.ctap_short_off
)
3149 ups_flags
|= UPS_FLAGS_CTAP_SHORT_DIS
;
3151 switch (tp
->ups_info
.speed_duplex
) {
3153 ups_flags
|= ups_flags_speed(1);
3156 ups_flags
|= ups_flags_speed(2);
3158 case NWAY_100M_HALF
:
3159 ups_flags
|= ups_flags_speed(3);
3161 case NWAY_100M_FULL
:
3162 ups_flags
|= ups_flags_speed(4);
3164 case NWAY_1000M_FULL
:
3165 ups_flags
|= ups_flags_speed(5);
3167 case FORCE_10M_HALF
:
3168 ups_flags
|= ups_flags_speed(6);
3170 case FORCE_10M_FULL
:
3171 ups_flags
|= ups_flags_speed(7);
3173 case FORCE_100M_HALF
:
3174 ups_flags
|= ups_flags_speed(8);
3176 case FORCE_100M_FULL
:
3177 ups_flags
|= ups_flags_speed(9);
3183 ocp_write_dword(tp
, MCU_TYPE_USB
, USB_UPS_FLAGS
, ups_flags
);
3186 static void r8153b_green_en(struct r8152
*tp
, bool enable
)
3191 sram_write(tp
, 0x8045, 0); /* 10M abiq&ldvbias */
3192 sram_write(tp
, 0x804d, 0x1222); /* 100M short abiq&ldvbias */
3193 sram_write(tp
, 0x805d, 0x0022); /* 1000M short abiq&ldvbias */
3195 sram_write(tp
, 0x8045, 0x2444); /* 10M abiq&ldvbias */
3196 sram_write(tp
, 0x804d, 0x2444); /* 100M short abiq&ldvbias */
3197 sram_write(tp
, 0x805d, 0x2444); /* 1000M short abiq&ldvbias */
3200 data
= sram_read(tp
, SRAM_GREEN_CFG
);
3201 data
|= GREEN_ETH_EN
;
3202 sram_write(tp
, SRAM_GREEN_CFG
, data
);
3204 tp
->ups_info
.green
= enable
;
3207 static u16
r8153_phy_status(struct r8152
*tp
, u16 desired
)
3212 for (i
= 0; i
< 500; i
++) {
3213 data
= ocp_reg_read(tp
, OCP_PHY_STATUS
);
3214 data
&= PHY_STAT_MASK
;
3216 if (data
== desired
)
3218 } else if (data
== PHY_STAT_LAN_ON
|| data
== PHY_STAT_PWRDN
||
3219 data
== PHY_STAT_EXT_INIT
) {
3229 static void r8153b_ups_en(struct r8152
*tp
, bool enable
)
3231 u32 ocp_data
= ocp_read_byte(tp
, MCU_TYPE_USB
, USB_POWER_CUT
);
3234 r8153b_ups_flags(tp
);
3236 ocp_data
|= UPS_EN
| USP_PREWAKE
| PHASE2_EN
;
3237 ocp_write_byte(tp
, MCU_TYPE_USB
, USB_POWER_CUT
, ocp_data
);
3239 ocp_data
= ocp_read_byte(tp
, MCU_TYPE_USB
, 0xcfff);
3241 ocp_write_byte(tp
, MCU_TYPE_USB
, 0xcfff, ocp_data
);
3245 ocp_data
&= ~(UPS_EN
| USP_PREWAKE
);
3246 ocp_write_byte(tp
, MCU_TYPE_USB
, USB_POWER_CUT
, ocp_data
);
3248 ocp_data
= ocp_read_byte(tp
, MCU_TYPE_USB
, 0xcfff);
3249 ocp_data
&= ~BIT(0);
3250 ocp_write_byte(tp
, MCU_TYPE_USB
, 0xcfff, ocp_data
);
3252 ocp_data
= ocp_read_word(tp
, MCU_TYPE_USB
, USB_MISC_0
);
3253 ocp_data
&= ~PCUT_STATUS
;
3254 ocp_write_word(tp
, MCU_TYPE_USB
, USB_MISC_0
, ocp_data
);
3256 data
= r8153_phy_status(tp
, 0);
3259 case PHY_STAT_PWRDN
:
3260 case PHY_STAT_EXT_INIT
:
3262 test_bit(GREEN_ETHERNET
, &tp
->flags
));
3264 data
= r8152_mdio_read(tp
, MII_BMCR
);
3265 data
&= ~BMCR_PDOWN
;
3267 r8152_mdio_write(tp
, MII_BMCR
, data
);
3269 data
= r8153_phy_status(tp
, PHY_STAT_LAN_ON
);
3273 if (data
!= PHY_STAT_LAN_ON
)
3274 netif_warn(tp
, link
, tp
->netdev
,
3281 static void r8153_power_cut_en(struct r8152
*tp
, bool enable
)
3285 ocp_data
= ocp_read_word(tp
, MCU_TYPE_USB
, USB_POWER_CUT
);
3287 ocp_data
|= PWR_EN
| PHASE2_EN
;
3289 ocp_data
&= ~(PWR_EN
| PHASE2_EN
);
3290 ocp_write_word(tp
, MCU_TYPE_USB
, USB_POWER_CUT
, ocp_data
);
3292 ocp_data
= ocp_read_word(tp
, MCU_TYPE_USB
, USB_MISC_0
);
3293 ocp_data
&= ~PCUT_STATUS
;
3294 ocp_write_word(tp
, MCU_TYPE_USB
, USB_MISC_0
, ocp_data
);
3297 static void r8153b_power_cut_en(struct r8152
*tp
, bool enable
)
3301 ocp_data
= ocp_read_word(tp
, MCU_TYPE_USB
, USB_POWER_CUT
);
3303 ocp_data
|= PWR_EN
| PHASE2_EN
;
3305 ocp_data
&= ~PWR_EN
;
3306 ocp_write_word(tp
, MCU_TYPE_USB
, USB_POWER_CUT
, ocp_data
);
3308 ocp_data
= ocp_read_word(tp
, MCU_TYPE_USB
, USB_MISC_0
);
3309 ocp_data
&= ~PCUT_STATUS
;
3310 ocp_write_word(tp
, MCU_TYPE_USB
, USB_MISC_0
, ocp_data
);
3313 static void r8153_queue_wake(struct r8152
*tp
, bool enable
)
3317 ocp_data
= ocp_read_byte(tp
, MCU_TYPE_PLA
, PLA_INDICATE_FALG
);
3319 ocp_data
|= UPCOMING_RUNTIME_D3
;
3321 ocp_data
&= ~UPCOMING_RUNTIME_D3
;
3322 ocp_write_byte(tp
, MCU_TYPE_PLA
, PLA_INDICATE_FALG
, ocp_data
);
3324 ocp_data
= ocp_read_byte(tp
, MCU_TYPE_PLA
, PLA_SUSPEND_FLAG
);
3325 ocp_data
&= ~LINK_CHG_EVENT
;
3326 ocp_write_byte(tp
, MCU_TYPE_PLA
, PLA_SUSPEND_FLAG
, ocp_data
);
3328 ocp_data
= ocp_read_word(tp
, MCU_TYPE_PLA
, PLA_EXTRA_STATUS
);
3329 ocp_data
&= ~LINK_CHANGE_FLAG
;
3330 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_EXTRA_STATUS
, ocp_data
);
3333 static bool rtl_can_wakeup(struct r8152
*tp
)
3335 struct usb_device
*udev
= tp
->udev
;
3337 return (udev
->actconfig
->desc
.bmAttributes
& USB_CONFIG_ATT_WAKEUP
);
3340 static void rtl_runtime_suspend_enable(struct r8152
*tp
, bool enable
)
3345 __rtl_set_wol(tp
, WAKE_ANY
);
3347 ocp_write_byte(tp
, MCU_TYPE_PLA
, PLA_CRWECR
, CRWECR_CONFIG
);
3349 ocp_data
= ocp_read_word(tp
, MCU_TYPE_PLA
, PLA_CONFIG34
);
3350 ocp_data
|= LINK_OFF_WAKE_EN
;
3351 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_CONFIG34
, ocp_data
);
3353 ocp_write_byte(tp
, MCU_TYPE_PLA
, PLA_CRWECR
, CRWECR_NORAML
);
3357 __rtl_set_wol(tp
, tp
->saved_wolopts
);
3359 ocp_write_byte(tp
, MCU_TYPE_PLA
, PLA_CRWECR
, CRWECR_CONFIG
);
3361 ocp_data
= ocp_read_word(tp
, MCU_TYPE_PLA
, PLA_CONFIG34
);
3362 ocp_data
&= ~LINK_OFF_WAKE_EN
;
3363 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_CONFIG34
, ocp_data
);
3365 ocp_write_byte(tp
, MCU_TYPE_PLA
, PLA_CRWECR
, CRWECR_NORAML
);
3369 static void rtl8153_runtime_enable(struct r8152
*tp
, bool enable
)
3372 r8153_u1u2en(tp
, false);
3373 r8153_u2p3en(tp
, false);
3374 r8153_mac_clk_spd(tp
, true);
3375 rtl_runtime_suspend_enable(tp
, true);
3377 rtl_runtime_suspend_enable(tp
, false);
3378 r8153_mac_clk_spd(tp
, false);
3380 switch (tp
->version
) {
3387 r8153_u2p3en(tp
, true);
3391 r8153_u1u2en(tp
, true);
3395 static void rtl8153b_runtime_enable(struct r8152
*tp
, bool enable
)
3398 r8153_queue_wake(tp
, true);
3399 r8153b_u1u2en(tp
, false);
3400 r8153_u2p3en(tp
, false);
3401 rtl_runtime_suspend_enable(tp
, true);
3402 r8153b_ups_en(tp
, true);
3404 r8153b_ups_en(tp
, false);
3405 r8153_queue_wake(tp
, false);
3406 rtl_runtime_suspend_enable(tp
, false);
3407 if (tp
->udev
->speed
!= USB_SPEED_HIGH
)
3408 r8153b_u1u2en(tp
, true);
3412 static void r8153_teredo_off(struct r8152
*tp
)
3416 switch (tp
->version
) {
3424 ocp_data
= ocp_read_word(tp
, MCU_TYPE_PLA
, PLA_TEREDO_CFG
);
3425 ocp_data
&= ~(TEREDO_SEL
| TEREDO_RS_EVENT_MASK
|
3427 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_TEREDO_CFG
, ocp_data
);
3432 /* The bit 0 ~ 7 are relative with teredo settings. They are
3433 * W1C (write 1 to clear), so set all 1 to disable it.
3435 ocp_write_byte(tp
, MCU_TYPE_PLA
, PLA_TEREDO_CFG
, 0xff);
3442 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_WDT6_CTRL
, WDT6_SET_MODE
);
3443 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_REALWOW_TIMER
, 0);
3444 ocp_write_dword(tp
, MCU_TYPE_PLA
, PLA_TEREDO_TIMER
, 0);
3447 static void rtl_reset_bmu(struct r8152
*tp
)
3451 ocp_data
= ocp_read_byte(tp
, MCU_TYPE_USB
, USB_BMU_RESET
);
3452 ocp_data
&= ~(BMU_RESET_EP_IN
| BMU_RESET_EP_OUT
);
3453 ocp_write_byte(tp
, MCU_TYPE_USB
, USB_BMU_RESET
, ocp_data
);
3454 ocp_data
|= BMU_RESET_EP_IN
| BMU_RESET_EP_OUT
;
3455 ocp_write_byte(tp
, MCU_TYPE_USB
, USB_BMU_RESET
, ocp_data
);
3458 /* Clear the bp to stop the firmware before loading a new one */
3459 static void rtl_clear_bp(struct r8152
*tp
, u16 type
)
3461 switch (tp
->version
) {
3470 ocp_write_byte(tp
, type
, PLA_BP_EN
, 0);
3475 if (type
== MCU_TYPE_USB
) {
3476 ocp_write_byte(tp
, MCU_TYPE_USB
, USB_BP2_EN
, 0);
3478 ocp_write_word(tp
, MCU_TYPE_USB
, USB_BP_8
, 0);
3479 ocp_write_word(tp
, MCU_TYPE_USB
, USB_BP_9
, 0);
3480 ocp_write_word(tp
, MCU_TYPE_USB
, USB_BP_10
, 0);
3481 ocp_write_word(tp
, MCU_TYPE_USB
, USB_BP_11
, 0);
3482 ocp_write_word(tp
, MCU_TYPE_USB
, USB_BP_12
, 0);
3483 ocp_write_word(tp
, MCU_TYPE_USB
, USB_BP_13
, 0);
3484 ocp_write_word(tp
, MCU_TYPE_USB
, USB_BP_14
, 0);
3485 ocp_write_word(tp
, MCU_TYPE_USB
, USB_BP_15
, 0);
3487 ocp_write_byte(tp
, MCU_TYPE_PLA
, PLA_BP_EN
, 0);
3492 ocp_write_word(tp
, type
, PLA_BP_0
, 0);
3493 ocp_write_word(tp
, type
, PLA_BP_1
, 0);
3494 ocp_write_word(tp
, type
, PLA_BP_2
, 0);
3495 ocp_write_word(tp
, type
, PLA_BP_3
, 0);
3496 ocp_write_word(tp
, type
, PLA_BP_4
, 0);
3497 ocp_write_word(tp
, type
, PLA_BP_5
, 0);
3498 ocp_write_word(tp
, type
, PLA_BP_6
, 0);
3499 ocp_write_word(tp
, type
, PLA_BP_7
, 0);
3501 /* wait 3 ms to make sure the firmware is stopped */
3502 usleep_range(3000, 6000);
3503 ocp_write_word(tp
, type
, PLA_BP_BA
, 0);
3506 static int r8153_patch_request(struct r8152
*tp
, bool request
)
3511 data
= ocp_reg_read(tp
, OCP_PHY_PATCH_CMD
);
3513 data
|= PATCH_REQUEST
;
3515 data
&= ~PATCH_REQUEST
;
3516 ocp_reg_write(tp
, OCP_PHY_PATCH_CMD
, data
);
3518 for (i
= 0; request
&& i
< 5000; i
++) {
3519 usleep_range(1000, 2000);
3520 if (ocp_reg_read(tp
, OCP_PHY_PATCH_STAT
) & PATCH_READY
)
3524 if (request
&& !(ocp_reg_read(tp
, OCP_PHY_PATCH_STAT
) & PATCH_READY
)) {
3525 netif_err(tp
, drv
, tp
->netdev
, "patch request fail\n");
3526 r8153_patch_request(tp
, false);
3533 static int r8153_pre_ram_code(struct r8152
*tp
, u16 key_addr
, u16 patch_key
)
3535 if (r8153_patch_request(tp
, true)) {
3536 dev_err(&tp
->intf
->dev
, "patch request fail\n");
3540 sram_write(tp
, key_addr
, patch_key
);
3541 sram_write(tp
, SRAM_PHY_LOCK
, PHY_PATCH_LOCK
);
3546 static int r8153_post_ram_code(struct r8152
*tp
, u16 key_addr
)
3550 sram_write(tp
, 0x0000, 0x0000);
3552 data
= ocp_reg_read(tp
, OCP_PHY_LOCK
);
3553 data
&= ~PATCH_LOCK
;
3554 ocp_reg_write(tp
, OCP_PHY_LOCK
, data
);
3556 sram_write(tp
, key_addr
, 0x0000);
3558 r8153_patch_request(tp
, false);
3560 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_OCP_GPHY_BASE
, tp
->ocp_base
);
3565 static bool rtl8152_is_fw_phy_nc_ok(struct r8152
*tp
, struct fw_phy_nc
*phy
)
3568 u16 fw_offset
, fw_reg
, ba_reg
, patch_en_addr
, mode_reg
, bp_start
;
3571 switch (tp
->version
) {
3577 patch_en_addr
= 0xa01a;
3585 fw_offset
= __le16_to_cpu(phy
->fw_offset
);
3586 if (fw_offset
< sizeof(*phy
)) {
3587 dev_err(&tp
->intf
->dev
, "fw_offset too small\n");
3591 length
= __le32_to_cpu(phy
->blk_hdr
.length
);
3592 if (length
< fw_offset
) {
3593 dev_err(&tp
->intf
->dev
, "invalid fw_offset\n");
3597 length
-= __le16_to_cpu(phy
->fw_offset
);
3598 if (!length
|| (length
& 1)) {
3599 dev_err(&tp
->intf
->dev
, "invalid block length\n");
3603 if (__le16_to_cpu(phy
->fw_reg
) != fw_reg
) {
3604 dev_err(&tp
->intf
->dev
, "invalid register to load firmware\n");
3608 if (__le16_to_cpu(phy
->ba_reg
) != ba_reg
) {
3609 dev_err(&tp
->intf
->dev
, "invalid base address register\n");
3613 if (__le16_to_cpu(phy
->patch_en_addr
) != patch_en_addr
) {
3614 dev_err(&tp
->intf
->dev
,
3615 "invalid patch mode enabled register\n");
3619 if (__le16_to_cpu(phy
->mode_reg
) != mode_reg
) {
3620 dev_err(&tp
->intf
->dev
,
3621 "invalid register to switch the mode\n");
3625 if (__le16_to_cpu(phy
->bp_start
) != bp_start
) {
3626 dev_err(&tp
->intf
->dev
,
3627 "invalid start register of break point\n");
3631 if (__le16_to_cpu(phy
->bp_num
) > 4) {
3632 dev_err(&tp
->intf
->dev
, "invalid break point number\n");
3641 static bool rtl8152_is_fw_mac_ok(struct r8152
*tp
, struct fw_mac
*mac
)
3643 u16 fw_reg
, bp_ba_addr
, bp_en_addr
, bp_start
, fw_offset
;
3648 type
= __le32_to_cpu(mac
->blk_hdr
.type
);
3649 if (type
== RTL_FW_PLA
) {
3650 switch (tp
->version
) {
3655 bp_ba_addr
= PLA_BP_BA
;
3657 bp_start
= PLA_BP_0
;
3667 bp_ba_addr
= PLA_BP_BA
;
3668 bp_en_addr
= PLA_BP_EN
;
3669 bp_start
= PLA_BP_0
;
3675 } else if (type
== RTL_FW_USB
) {
3676 switch (tp
->version
) {
3682 bp_ba_addr
= USB_BP_BA
;
3683 bp_en_addr
= USB_BP_EN
;
3684 bp_start
= USB_BP_0
;
3690 bp_ba_addr
= USB_BP_BA
;
3691 bp_en_addr
= USB_BP2_EN
;
3692 bp_start
= USB_BP_0
;
3705 fw_offset
= __le16_to_cpu(mac
->fw_offset
);
3706 if (fw_offset
< sizeof(*mac
)) {
3707 dev_err(&tp
->intf
->dev
, "fw_offset too small\n");
3711 length
= __le32_to_cpu(mac
->blk_hdr
.length
);
3712 if (length
< fw_offset
) {
3713 dev_err(&tp
->intf
->dev
, "invalid fw_offset\n");
3717 length
-= fw_offset
;
3718 if (length
< 4 || (length
& 3)) {
3719 dev_err(&tp
->intf
->dev
, "invalid block length\n");
3723 if (__le16_to_cpu(mac
->fw_reg
) != fw_reg
) {
3724 dev_err(&tp
->intf
->dev
, "invalid register to load firmware\n");
3728 if (__le16_to_cpu(mac
->bp_ba_addr
) != bp_ba_addr
) {
3729 dev_err(&tp
->intf
->dev
, "invalid base address register\n");
3733 if (__le16_to_cpu(mac
->bp_en_addr
) != bp_en_addr
) {
3734 dev_err(&tp
->intf
->dev
, "invalid enabled mask register\n");
3738 if (__le16_to_cpu(mac
->bp_start
) != bp_start
) {
3739 dev_err(&tp
->intf
->dev
,
3740 "invalid start register of break point\n");
3744 if (__le16_to_cpu(mac
->bp_num
) > max_bp
) {
3745 dev_err(&tp
->intf
->dev
, "invalid break point number\n");
3749 for (i
= __le16_to_cpu(mac
->bp_num
); i
< max_bp
; i
++) {
3751 dev_err(&tp
->intf
->dev
, "unused bp%u is not zero\n", i
);
3761 /* Verify the checksum for the firmware file. It is calculated from the version
3762 * field to the end of the file. Compare the result with the checksum field to
3763 * make sure the file is correct.
3765 static long rtl8152_fw_verify_checksum(struct r8152
*tp
,
3766 struct fw_header
*fw_hdr
, size_t size
)
3768 unsigned char checksum
[sizeof(fw_hdr
->checksum
)];
3769 struct crypto_shash
*alg
;
3770 struct shash_desc
*sdesc
;
3774 alg
= crypto_alloc_shash("sha256", 0, 0);
3780 if (crypto_shash_digestsize(alg
) != sizeof(fw_hdr
->checksum
)) {
3782 dev_err(&tp
->intf
->dev
, "digestsize incorrect (%u)\n",
3783 crypto_shash_digestsize(alg
));
3787 len
= sizeof(*sdesc
) + crypto_shash_descsize(alg
);
3788 sdesc
= kmalloc(len
, GFP_KERNEL
);
3795 len
= size
- sizeof(fw_hdr
->checksum
);
3796 rc
= crypto_shash_digest(sdesc
, fw_hdr
->version
, len
, checksum
);
3801 if (memcmp(fw_hdr
->checksum
, checksum
, sizeof(fw_hdr
->checksum
))) {
3802 dev_err(&tp
->intf
->dev
, "checksum fail\n");
3807 crypto_free_shash(alg
);
3812 static long rtl8152_check_firmware(struct r8152
*tp
, struct rtl_fw
*rtl_fw
)
3814 const struct firmware
*fw
= rtl_fw
->fw
;
3815 struct fw_header
*fw_hdr
= (struct fw_header
*)fw
->data
;
3816 struct fw_mac
*pla
= NULL
, *usb
= NULL
;
3817 struct fw_phy_patch_key
*start
= NULL
;
3818 struct fw_phy_nc
*phy_nc
= NULL
;
3819 struct fw_block
*stop
= NULL
;
3823 if (fw
->size
< sizeof(*fw_hdr
)) {
3824 dev_err(&tp
->intf
->dev
, "file too small\n");
3828 ret
= rtl8152_fw_verify_checksum(tp
, fw_hdr
, fw
->size
);
3834 for (i
= sizeof(*fw_hdr
); i
< fw
->size
;) {
3835 struct fw_block
*block
= (struct fw_block
*)&fw
->data
[i
];
3838 if ((i
+ sizeof(*block
)) > fw
->size
)
3841 type
= __le32_to_cpu(block
->type
);
3844 if (__le32_to_cpu(block
->length
) != sizeof(*block
))
3849 dev_err(&tp
->intf
->dev
,
3850 "multiple PLA firmware encountered");
3854 pla
= (struct fw_mac
*)block
;
3855 if (!rtl8152_is_fw_mac_ok(tp
, pla
)) {
3856 dev_err(&tp
->intf
->dev
,
3857 "check PLA firmware failed\n");
3863 dev_err(&tp
->intf
->dev
,
3864 "multiple USB firmware encountered");
3868 usb
= (struct fw_mac
*)block
;
3869 if (!rtl8152_is_fw_mac_ok(tp
, usb
)) {
3870 dev_err(&tp
->intf
->dev
,
3871 "check USB firmware failed\n");
3875 case RTL_FW_PHY_START
:
3876 if (start
|| phy_nc
|| stop
) {
3877 dev_err(&tp
->intf
->dev
,
3878 "check PHY_START fail\n");
3882 if (__le32_to_cpu(block
->length
) != sizeof(*start
)) {
3883 dev_err(&tp
->intf
->dev
,
3884 "Invalid length for PHY_START\n");
3888 start
= (struct fw_phy_patch_key
*)block
;
3890 case RTL_FW_PHY_STOP
:
3891 if (stop
|| !start
) {
3892 dev_err(&tp
->intf
->dev
,
3893 "Check PHY_STOP fail\n");
3897 if (__le32_to_cpu(block
->length
) != sizeof(*block
)) {
3898 dev_err(&tp
->intf
->dev
,
3899 "Invalid length for PHY_STOP\n");
3906 if (!start
|| stop
) {
3907 dev_err(&tp
->intf
->dev
,
3908 "check PHY_NC fail\n");
3913 dev_err(&tp
->intf
->dev
,
3914 "multiple PHY NC encountered\n");
3918 phy_nc
= (struct fw_phy_nc
*)block
;
3919 if (!rtl8152_is_fw_phy_nc_ok(tp
, phy_nc
)) {
3920 dev_err(&tp
->intf
->dev
,
3921 "check PHY NC firmware failed\n");
3927 dev_warn(&tp
->intf
->dev
, "Unknown type %u is found\n",
3933 i
+= ALIGN(__le32_to_cpu(block
->length
), 8);
3937 if ((phy_nc
|| start
) && !stop
) {
3938 dev_err(&tp
->intf
->dev
, "without PHY_STOP\n");
3947 static void rtl8152_fw_phy_nc_apply(struct r8152
*tp
, struct fw_phy_nc
*phy
)
3949 u16 mode_reg
, bp_index
;
3953 mode_reg
= __le16_to_cpu(phy
->mode_reg
);
3954 sram_write(tp
, mode_reg
, __le16_to_cpu(phy
->mode_pre
));
3955 sram_write(tp
, __le16_to_cpu(phy
->ba_reg
),
3956 __le16_to_cpu(phy
->ba_data
));
3958 length
= __le32_to_cpu(phy
->blk_hdr
.length
);
3959 length
-= __le16_to_cpu(phy
->fw_offset
);
3961 data
= (__le16
*)((u8
*)phy
+ __le16_to_cpu(phy
->fw_offset
));
3963 ocp_reg_write(tp
, OCP_SRAM_ADDR
, __le16_to_cpu(phy
->fw_reg
));
3964 for (i
= 0; i
< num
; i
++)
3965 ocp_reg_write(tp
, OCP_SRAM_DATA
, __le16_to_cpu(data
[i
]));
3967 sram_write(tp
, __le16_to_cpu(phy
->patch_en_addr
),
3968 __le16_to_cpu(phy
->patch_en_value
));
3970 bp_index
= __le16_to_cpu(phy
->bp_start
);
3971 num
= __le16_to_cpu(phy
->bp_num
);
3972 for (i
= 0; i
< num
; i
++) {
3973 sram_write(tp
, bp_index
, __le16_to_cpu(phy
->bp
[i
]));
3977 sram_write(tp
, mode_reg
, __le16_to_cpu(phy
->mode_post
));
3979 dev_dbg(&tp
->intf
->dev
, "successfully applied %s\n", phy
->info
);
3982 static void rtl8152_fw_mac_apply(struct r8152
*tp
, struct fw_mac
*mac
)
3984 u16 bp_en_addr
, bp_index
, type
, bp_num
, fw_ver_reg
;
3989 switch (__le32_to_cpu(mac
->blk_hdr
.type
)) {
3991 type
= MCU_TYPE_PLA
;
3994 type
= MCU_TYPE_USB
;
4000 rtl_clear_bp(tp
, type
);
4002 /* Enable backup/restore of MACDBG. This is required after clearing PLA
4003 * break points and before applying the PLA firmware.
4005 if (tp
->version
== RTL_VER_04
&& type
== MCU_TYPE_PLA
&&
4006 !(ocp_read_word(tp
, MCU_TYPE_PLA
, PLA_MACDBG_POST
) & DEBUG_OE
)) {
4007 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_MACDBG_PRE
, DEBUG_LTSSM
);
4008 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_MACDBG_POST
, DEBUG_LTSSM
);
4011 length
= __le32_to_cpu(mac
->blk_hdr
.length
);
4012 length
-= __le16_to_cpu(mac
->fw_offset
);
4015 data
+= __le16_to_cpu(mac
->fw_offset
);
4017 generic_ocp_write(tp
, __le16_to_cpu(mac
->fw_reg
), 0xff, length
, data
,
4020 ocp_write_word(tp
, type
, __le16_to_cpu(mac
->bp_ba_addr
),
4021 __le16_to_cpu(mac
->bp_ba_value
));
4023 bp_index
= __le16_to_cpu(mac
->bp_start
);
4024 bp_num
= __le16_to_cpu(mac
->bp_num
);
4025 for (i
= 0; i
< bp_num
; i
++) {
4026 ocp_write_word(tp
, type
, bp_index
, __le16_to_cpu(mac
->bp
[i
]));
4030 bp_en_addr
= __le16_to_cpu(mac
->bp_en_addr
);
4032 ocp_write_word(tp
, type
, bp_en_addr
,
4033 __le16_to_cpu(mac
->bp_en_value
));
4035 fw_ver_reg
= __le16_to_cpu(mac
->fw_ver_reg
);
4037 ocp_write_byte(tp
, MCU_TYPE_USB
, fw_ver_reg
,
4040 dev_dbg(&tp
->intf
->dev
, "successfully applied %s\n", mac
->info
);
4043 static void rtl8152_apply_firmware(struct r8152
*tp
)
4045 struct rtl_fw
*rtl_fw
= &tp
->rtl_fw
;
4046 const struct firmware
*fw
;
4047 struct fw_header
*fw_hdr
;
4048 struct fw_phy_patch_key
*key
;
4052 if (IS_ERR_OR_NULL(rtl_fw
->fw
))
4056 fw_hdr
= (struct fw_header
*)fw
->data
;
4061 for (i
= offsetof(struct fw_header
, blocks
); i
< fw
->size
;) {
4062 struct fw_block
*block
= (struct fw_block
*)&fw
->data
[i
];
4064 switch (__le32_to_cpu(block
->type
)) {
4069 rtl8152_fw_mac_apply(tp
, (struct fw_mac
*)block
);
4071 case RTL_FW_PHY_START
:
4072 key
= (struct fw_phy_patch_key
*)block
;
4073 key_addr
= __le16_to_cpu(key
->key_reg
);
4074 r8153_pre_ram_code(tp
, key_addr
,
4075 __le16_to_cpu(key
->key_data
));
4077 case RTL_FW_PHY_STOP
:
4079 r8153_post_ram_code(tp
, key_addr
);
4082 rtl8152_fw_phy_nc_apply(tp
, (struct fw_phy_nc
*)block
);
4088 i
+= ALIGN(__le32_to_cpu(block
->length
), 8);
4092 if (rtl_fw
->post_fw
)
4093 rtl_fw
->post_fw(tp
);
4095 strscpy(rtl_fw
->version
, fw_hdr
->version
, RTL_VER_SIZE
);
4096 dev_info(&tp
->intf
->dev
, "load %s successfully\n", rtl_fw
->version
);
4099 static void rtl8152_release_firmware(struct r8152
*tp
)
4101 struct rtl_fw
*rtl_fw
= &tp
->rtl_fw
;
4103 if (!IS_ERR_OR_NULL(rtl_fw
->fw
)) {
4104 release_firmware(rtl_fw
->fw
);
4109 static int rtl8152_request_firmware(struct r8152
*tp
)
4111 struct rtl_fw
*rtl_fw
= &tp
->rtl_fw
;
4114 if (rtl_fw
->fw
|| !rtl_fw
->fw_name
) {
4115 dev_info(&tp
->intf
->dev
, "skip request firmware\n");
4120 rc
= request_firmware(&rtl_fw
->fw
, rtl_fw
->fw_name
, &tp
->intf
->dev
);
4124 rc
= rtl8152_check_firmware(tp
, rtl_fw
);
4126 release_firmware(rtl_fw
->fw
);
4130 rtl_fw
->fw
= ERR_PTR(rc
);
4132 dev_warn(&tp
->intf
->dev
,
4133 "unable to load firmware patch %s (%ld)\n",
4134 rtl_fw
->fw_name
, rc
);
4140 static void r8152_aldps_en(struct r8152
*tp
, bool enable
)
4143 ocp_reg_write(tp
, OCP_ALDPS_CONFIG
, ENPWRSAVE
| ENPDNPS
|
4144 LINKENA
| DIS_SDSAVE
);
4146 ocp_reg_write(tp
, OCP_ALDPS_CONFIG
, ENPDNPS
| LINKENA
|
4152 static inline void r8152_mmd_indirect(struct r8152
*tp
, u16 dev
, u16 reg
)
4154 ocp_reg_write(tp
, OCP_EEE_AR
, FUN_ADDR
| dev
);
4155 ocp_reg_write(tp
, OCP_EEE_DATA
, reg
);
4156 ocp_reg_write(tp
, OCP_EEE_AR
, FUN_DATA
| dev
);
4159 static u16
r8152_mmd_read(struct r8152
*tp
, u16 dev
, u16 reg
)
4163 r8152_mmd_indirect(tp
, dev
, reg
);
4164 data
= ocp_reg_read(tp
, OCP_EEE_DATA
);
4165 ocp_reg_write(tp
, OCP_EEE_AR
, 0x0000);
4170 static void r8152_mmd_write(struct r8152
*tp
, u16 dev
, u16 reg
, u16 data
)
4172 r8152_mmd_indirect(tp
, dev
, reg
);
4173 ocp_reg_write(tp
, OCP_EEE_DATA
, data
);
4174 ocp_reg_write(tp
, OCP_EEE_AR
, 0x0000);
4177 static void r8152_eee_en(struct r8152
*tp
, bool enable
)
4179 u16 config1
, config2
, config3
;
4182 ocp_data
= ocp_read_word(tp
, MCU_TYPE_PLA
, PLA_EEE_CR
);
4183 config1
= ocp_reg_read(tp
, OCP_EEE_CONFIG1
) & ~sd_rise_time_mask
;
4184 config2
= ocp_reg_read(tp
, OCP_EEE_CONFIG2
);
4185 config3
= ocp_reg_read(tp
, OCP_EEE_CONFIG3
) & ~fast_snr_mask
;
4188 ocp_data
|= EEE_RX_EN
| EEE_TX_EN
;
4189 config1
|= EEE_10_CAP
| EEE_NWAY_EN
| TX_QUIET_EN
| RX_QUIET_EN
;
4190 config1
|= sd_rise_time(1);
4191 config2
|= RG_DACQUIET_EN
| RG_LDVQUIET_EN
;
4192 config3
|= fast_snr(42);
4194 ocp_data
&= ~(EEE_RX_EN
| EEE_TX_EN
);
4195 config1
&= ~(EEE_10_CAP
| EEE_NWAY_EN
| TX_QUIET_EN
|
4197 config1
|= sd_rise_time(7);
4198 config2
&= ~(RG_DACQUIET_EN
| RG_LDVQUIET_EN
);
4199 config3
|= fast_snr(511);
4202 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_EEE_CR
, ocp_data
);
4203 ocp_reg_write(tp
, OCP_EEE_CONFIG1
, config1
);
4204 ocp_reg_write(tp
, OCP_EEE_CONFIG2
, config2
);
4205 ocp_reg_write(tp
, OCP_EEE_CONFIG3
, config3
);
4208 static void r8153_eee_en(struct r8152
*tp
, bool enable
)
4213 ocp_data
= ocp_read_word(tp
, MCU_TYPE_PLA
, PLA_EEE_CR
);
4214 config
= ocp_reg_read(tp
, OCP_EEE_CFG
);
4217 ocp_data
|= EEE_RX_EN
| EEE_TX_EN
;
4220 ocp_data
&= ~(EEE_RX_EN
| EEE_TX_EN
);
4221 config
&= ~EEE10_EN
;
4224 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_EEE_CR
, ocp_data
);
4225 ocp_reg_write(tp
, OCP_EEE_CFG
, config
);
4227 tp
->ups_info
.eee
= enable
;
4230 static void rtl_eee_enable(struct r8152
*tp
, bool enable
)
4232 switch (tp
->version
) {
4237 r8152_eee_en(tp
, true);
4238 r8152_mmd_write(tp
, MDIO_MMD_AN
, MDIO_AN_EEE_ADV
,
4241 r8152_eee_en(tp
, false);
4242 r8152_mmd_write(tp
, MDIO_MMD_AN
, MDIO_AN_EEE_ADV
, 0);
4252 r8153_eee_en(tp
, true);
4253 ocp_reg_write(tp
, OCP_EEE_ADV
, tp
->eee_adv
);
4255 r8153_eee_en(tp
, false);
4256 ocp_reg_write(tp
, OCP_EEE_ADV
, 0);
4264 static void r8152b_enable_fc(struct r8152
*tp
)
4268 anar
= r8152_mdio_read(tp
, MII_ADVERTISE
);
4269 anar
|= ADVERTISE_PAUSE_CAP
| ADVERTISE_PAUSE_ASYM
;
4270 r8152_mdio_write(tp
, MII_ADVERTISE
, anar
);
4272 tp
->ups_info
.flow_control
= true;
4275 static void rtl8152_disable(struct r8152
*tp
)
4277 r8152_aldps_en(tp
, false);
4279 r8152_aldps_en(tp
, true);
4282 static void r8152b_hw_phy_cfg(struct r8152
*tp
)
4284 rtl8152_apply_firmware(tp
);
4285 rtl_eee_enable(tp
, tp
->eee_en
);
4286 r8152_aldps_en(tp
, true);
4287 r8152b_enable_fc(tp
);
4289 set_bit(PHY_RESET
, &tp
->flags
);
4292 static void wait_oob_link_list_ready(struct r8152
*tp
)
4297 for (i
= 0; i
< 1000; i
++) {
4298 ocp_data
= ocp_read_byte(tp
, MCU_TYPE_PLA
, PLA_OOB_CTRL
);
4299 if (ocp_data
& LINK_LIST_READY
)
4301 usleep_range(1000, 2000);
4305 static void r8152b_exit_oob(struct r8152
*tp
)
4309 ocp_data
= ocp_read_dword(tp
, MCU_TYPE_PLA
, PLA_RCR
);
4310 ocp_data
&= ~RCR_ACPT_ALL
;
4311 ocp_write_dword(tp
, MCU_TYPE_PLA
, PLA_RCR
, ocp_data
);
4313 rxdy_gated_en(tp
, true);
4314 r8153_teredo_off(tp
);
4315 ocp_write_byte(tp
, MCU_TYPE_PLA
, PLA_CRWECR
, CRWECR_NORAML
);
4316 ocp_write_byte(tp
, MCU_TYPE_PLA
, PLA_CR
, 0x00);
4318 ocp_data
= ocp_read_byte(tp
, MCU_TYPE_PLA
, PLA_OOB_CTRL
);
4319 ocp_data
&= ~NOW_IS_OOB
;
4320 ocp_write_byte(tp
, MCU_TYPE_PLA
, PLA_OOB_CTRL
, ocp_data
);
4322 ocp_data
= ocp_read_word(tp
, MCU_TYPE_PLA
, PLA_SFF_STS_7
);
4323 ocp_data
&= ~MCU_BORW_EN
;
4324 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_SFF_STS_7
, ocp_data
);
4326 wait_oob_link_list_ready(tp
);
4328 ocp_data
= ocp_read_word(tp
, MCU_TYPE_PLA
, PLA_SFF_STS_7
);
4329 ocp_data
|= RE_INIT_LL
;
4330 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_SFF_STS_7
, ocp_data
);
4332 wait_oob_link_list_ready(tp
);
4334 rtl8152_nic_reset(tp
);
4336 /* rx share fifo credit full threshold */
4337 ocp_write_dword(tp
, MCU_TYPE_PLA
, PLA_RXFIFO_CTRL0
, RXFIFO_THR1_NORMAL
);
4339 if (tp
->udev
->speed
== USB_SPEED_FULL
||
4340 tp
->udev
->speed
== USB_SPEED_LOW
) {
4341 /* rx share fifo credit near full threshold */
4342 ocp_write_dword(tp
, MCU_TYPE_PLA
, PLA_RXFIFO_CTRL1
,
4344 ocp_write_dword(tp
, MCU_TYPE_PLA
, PLA_RXFIFO_CTRL2
,
4347 /* rx share fifo credit near full threshold */
4348 ocp_write_dword(tp
, MCU_TYPE_PLA
, PLA_RXFIFO_CTRL1
,
4350 ocp_write_dword(tp
, MCU_TYPE_PLA
, PLA_RXFIFO_CTRL2
,
4354 /* TX share fifo free credit full threshold */
4355 ocp_write_dword(tp
, MCU_TYPE_PLA
, PLA_TXFIFO_CTRL
, TXFIFO_THR_NORMAL
);
4357 ocp_write_byte(tp
, MCU_TYPE_USB
, USB_TX_AGG
, TX_AGG_MAX_THRESHOLD
);
4358 ocp_write_dword(tp
, MCU_TYPE_USB
, USB_RX_BUF_TH
, RX_THR_HIGH
);
4359 ocp_write_dword(tp
, MCU_TYPE_USB
, USB_TX_DMA
,
4360 TEST_MODE_DISABLE
| TX_SIZE_ADJUST1
);
4362 rtl_rx_vlan_en(tp
, tp
->netdev
->features
& NETIF_F_HW_VLAN_CTAG_RX
);
4364 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_RMS
, RTL8152_RMS
);
4366 ocp_data
= ocp_read_word(tp
, MCU_TYPE_PLA
, PLA_TCR0
);
4367 ocp_data
|= TCR0_AUTO_FIFO
;
4368 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_TCR0
, ocp_data
);
4371 static void r8152b_enter_oob(struct r8152
*tp
)
4375 ocp_data
= ocp_read_byte(tp
, MCU_TYPE_PLA
, PLA_OOB_CTRL
);
4376 ocp_data
&= ~NOW_IS_OOB
;
4377 ocp_write_byte(tp
, MCU_TYPE_PLA
, PLA_OOB_CTRL
, ocp_data
);
4379 ocp_write_dword(tp
, MCU_TYPE_PLA
, PLA_RXFIFO_CTRL0
, RXFIFO_THR1_OOB
);
4380 ocp_write_dword(tp
, MCU_TYPE_PLA
, PLA_RXFIFO_CTRL1
, RXFIFO_THR2_OOB
);
4381 ocp_write_dword(tp
, MCU_TYPE_PLA
, PLA_RXFIFO_CTRL2
, RXFIFO_THR3_OOB
);
4385 wait_oob_link_list_ready(tp
);
4387 ocp_data
= ocp_read_word(tp
, MCU_TYPE_PLA
, PLA_SFF_STS_7
);
4388 ocp_data
|= RE_INIT_LL
;
4389 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_SFF_STS_7
, ocp_data
);
4391 wait_oob_link_list_ready(tp
);
4393 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_RMS
, RTL8152_RMS
);
4395 rtl_rx_vlan_en(tp
, true);
4397 ocp_data
= ocp_read_word(tp
, MCU_TYPE_PLA
, PLA_BDC_CR
);
4398 ocp_data
|= ALDPS_PROXY_MODE
;
4399 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_BDC_CR
, ocp_data
);
4401 ocp_data
= ocp_read_byte(tp
, MCU_TYPE_PLA
, PLA_OOB_CTRL
);
4402 ocp_data
|= NOW_IS_OOB
| DIS_MCU_CLROOB
;
4403 ocp_write_byte(tp
, MCU_TYPE_PLA
, PLA_OOB_CTRL
, ocp_data
);
4405 rxdy_gated_en(tp
, false);
4407 ocp_data
= ocp_read_dword(tp
, MCU_TYPE_PLA
, PLA_RCR
);
4408 ocp_data
|= RCR_APM
| RCR_AM
| RCR_AB
;
4409 ocp_write_dword(tp
, MCU_TYPE_PLA
, PLA_RCR
, ocp_data
);
4412 static int r8153_pre_firmware_1(struct r8152
*tp
)
4416 /* Wait till the WTD timer is ready. It would take at most 104 ms. */
4417 for (i
= 0; i
< 104; i
++) {
4418 u32 ocp_data
= ocp_read_byte(tp
, MCU_TYPE_USB
, USB_WDT1_CTRL
);
4420 if (!(ocp_data
& WTD1_EN
))
4422 usleep_range(1000, 2000);
4428 static int r8153_post_firmware_1(struct r8152
*tp
)
4430 /* set USB_BP_4 to support USB_SPEED_SUPER only */
4431 if (ocp_read_byte(tp
, MCU_TYPE_USB
, USB_CSTMR
) & FORCE_SUPER
)
4432 ocp_write_word(tp
, MCU_TYPE_USB
, USB_BP_4
, BP4_SUPER_ONLY
);
4434 /* reset UPHY timer to 36 ms */
4435 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_UPHY_TIMER
, 36000 / 16);
4440 static int r8153_pre_firmware_2(struct r8152
*tp
)
4444 r8153_pre_firmware_1(tp
);
4446 ocp_data
= ocp_read_word(tp
, MCU_TYPE_USB
, USB_FW_FIX_EN0
);
4447 ocp_data
&= ~FW_FIX_SUSPEND
;
4448 ocp_write_word(tp
, MCU_TYPE_USB
, USB_FW_FIX_EN0
, ocp_data
);
4453 static int r8153_post_firmware_2(struct r8152
*tp
)
4457 /* enable bp0 if support USB_SPEED_SUPER only */
4458 if (ocp_read_byte(tp
, MCU_TYPE_USB
, USB_CSTMR
) & FORCE_SUPER
) {
4459 ocp_data
= ocp_read_word(tp
, MCU_TYPE_PLA
, PLA_BP_EN
);
4461 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_BP_EN
, ocp_data
);
4464 /* reset UPHY timer to 36 ms */
4465 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_UPHY_TIMER
, 36000 / 16);
4467 /* enable U3P3 check, set the counter to 4 */
4468 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_EXTRA_STATUS
, U3P3_CHECK_EN
| 4);
4470 ocp_data
= ocp_read_word(tp
, MCU_TYPE_USB
, USB_FW_FIX_EN0
);
4471 ocp_data
|= FW_FIX_SUSPEND
;
4472 ocp_write_word(tp
, MCU_TYPE_USB
, USB_FW_FIX_EN0
, ocp_data
);
4474 ocp_data
= ocp_read_byte(tp
, MCU_TYPE_USB
, USB_USB2PHY
);
4475 ocp_data
|= USB2PHY_L1
| USB2PHY_SUSPEND
;
4476 ocp_write_byte(tp
, MCU_TYPE_USB
, USB_USB2PHY
, ocp_data
);
4481 static int r8153_post_firmware_3(struct r8152
*tp
)
4485 ocp_data
= ocp_read_byte(tp
, MCU_TYPE_USB
, USB_USB2PHY
);
4486 ocp_data
|= USB2PHY_L1
| USB2PHY_SUSPEND
;
4487 ocp_write_byte(tp
, MCU_TYPE_USB
, USB_USB2PHY
, ocp_data
);
4489 ocp_data
= ocp_read_word(tp
, MCU_TYPE_USB
, USB_FW_FIX_EN1
);
4490 ocp_data
|= FW_IP_RESET_EN
;
4491 ocp_write_word(tp
, MCU_TYPE_USB
, USB_FW_FIX_EN1
, ocp_data
);
4496 static int r8153b_pre_firmware_1(struct r8152
*tp
)
4498 /* enable fc timer and set timer to 1 second. */
4499 ocp_write_word(tp
, MCU_TYPE_USB
, USB_FC_TIMER
,
4500 CTRL_TIMER_EN
| (1000 / 8));
4505 static int r8153b_post_firmware_1(struct r8152
*tp
)
4509 /* enable bp0 for RTL8153-BND */
4510 ocp_data
= ocp_read_byte(tp
, MCU_TYPE_USB
, USB_MISC_1
);
4511 if (ocp_data
& BND_MASK
) {
4512 ocp_data
= ocp_read_word(tp
, MCU_TYPE_PLA
, PLA_BP_EN
);
4514 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_BP_EN
, ocp_data
);
4517 ocp_data
= ocp_read_word(tp
, MCU_TYPE_USB
, USB_FW_CTRL
);
4518 ocp_data
|= FLOW_CTRL_PATCH_OPT
;
4519 ocp_write_word(tp
, MCU_TYPE_USB
, USB_FW_CTRL
, ocp_data
);
4521 ocp_data
= ocp_read_word(tp
, MCU_TYPE_USB
, USB_FW_TASK
);
4522 ocp_data
|= FC_PATCH_TASK
;
4523 ocp_write_word(tp
, MCU_TYPE_USB
, USB_FW_TASK
, ocp_data
);
4525 ocp_data
= ocp_read_word(tp
, MCU_TYPE_USB
, USB_FW_FIX_EN1
);
4526 ocp_data
|= FW_IP_RESET_EN
;
4527 ocp_write_word(tp
, MCU_TYPE_USB
, USB_FW_FIX_EN1
, ocp_data
);
4532 static void r8153_aldps_en(struct r8152
*tp
, bool enable
)
4536 data
= ocp_reg_read(tp
, OCP_POWER_CFG
);
4539 ocp_reg_write(tp
, OCP_POWER_CFG
, data
);
4544 ocp_reg_write(tp
, OCP_POWER_CFG
, data
);
4545 for (i
= 0; i
< 20; i
++) {
4546 usleep_range(1000, 2000);
4547 if (ocp_read_word(tp
, MCU_TYPE_PLA
, 0xe000) & 0x0100)
4552 tp
->ups_info
.aldps
= enable
;
4555 static void r8153_hw_phy_cfg(struct r8152
*tp
)
4560 /* disable ALDPS before updating the PHY parameters */
4561 r8153_aldps_en(tp
, false);
4563 /* disable EEE before updating the PHY parameters */
4564 rtl_eee_enable(tp
, false);
4566 rtl8152_apply_firmware(tp
);
4568 if (tp
->version
== RTL_VER_03
) {
4569 data
= ocp_reg_read(tp
, OCP_EEE_CFG
);
4570 data
&= ~CTAP_SHORT_EN
;
4571 ocp_reg_write(tp
, OCP_EEE_CFG
, data
);
4574 data
= ocp_reg_read(tp
, OCP_POWER_CFG
);
4575 data
|= EEE_CLKDIV_EN
;
4576 ocp_reg_write(tp
, OCP_POWER_CFG
, data
);
4578 data
= ocp_reg_read(tp
, OCP_DOWN_SPEED
);
4579 data
|= EN_10M_BGOFF
;
4580 ocp_reg_write(tp
, OCP_DOWN_SPEED
, data
);
4581 data
= ocp_reg_read(tp
, OCP_POWER_CFG
);
4582 data
|= EN_10M_PLLOFF
;
4583 ocp_reg_write(tp
, OCP_POWER_CFG
, data
);
4584 sram_write(tp
, SRAM_IMPEDANCE
, 0x0b13);
4586 ocp_data
= ocp_read_word(tp
, MCU_TYPE_PLA
, PLA_PHY_PWR
);
4587 ocp_data
|= PFM_PWM_SWITCH
;
4588 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_PHY_PWR
, ocp_data
);
4590 /* Enable LPF corner auto tune */
4591 sram_write(tp
, SRAM_LPF_CFG
, 0xf70f);
4593 /* Adjust 10M Amplitude */
4594 sram_write(tp
, SRAM_10M_AMP1
, 0x00af);
4595 sram_write(tp
, SRAM_10M_AMP2
, 0x0208);
4598 rtl_eee_enable(tp
, true);
4600 r8153_aldps_en(tp
, true);
4601 r8152b_enable_fc(tp
);
4603 switch (tp
->version
) {
4610 r8153_u2p3en(tp
, true);
4614 set_bit(PHY_RESET
, &tp
->flags
);
4617 static u32
r8152_efuse_read(struct r8152
*tp
, u8 addr
)
4621 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_EFUSE_CMD
, EFUSE_READ_CMD
| addr
);
4622 ocp_data
= ocp_read_word(tp
, MCU_TYPE_PLA
, PLA_EFUSE_CMD
);
4623 ocp_data
= (ocp_data
& EFUSE_DATA_BIT16
) << 9; /* data of bit16 */
4624 ocp_data
|= ocp_read_word(tp
, MCU_TYPE_PLA
, PLA_EFUSE_DATA
);
4629 static void r8153b_hw_phy_cfg(struct r8152
*tp
)
4634 /* disable ALDPS before updating the PHY parameters */
4635 r8153_aldps_en(tp
, false);
4637 /* disable EEE before updating the PHY parameters */
4638 rtl_eee_enable(tp
, false);
4640 rtl8152_apply_firmware(tp
);
4642 r8153b_green_en(tp
, test_bit(GREEN_ETHERNET
, &tp
->flags
));
4644 data
= sram_read(tp
, SRAM_GREEN_CFG
);
4646 sram_write(tp
, SRAM_GREEN_CFG
, data
);
4647 data
= ocp_reg_read(tp
, OCP_NCTL_CFG
);
4648 data
|= PGA_RETURN_EN
;
4649 ocp_reg_write(tp
, OCP_NCTL_CFG
, data
);
4651 /* ADC Bias Calibration:
4652 * read efuse offset 0x7d to get a 17-bit data. Remove the dummy/fake
4653 * bit (bit3) to rebuild the real 16-bit data. Write the data to the
4656 ocp_data
= r8152_efuse_read(tp
, 0x7d);
4657 data
= (u16
)(((ocp_data
& 0x1fff0) >> 1) | (ocp_data
& 0x7));
4659 ocp_reg_write(tp
, OCP_ADC_IOFFSET
, data
);
4661 /* ups mode tx-link-pulse timing adjustment:
4662 * rg_saw_cnt = OCP reg 0xC426 Bit[13:0]
4663 * swr_cnt_1ms_ini = 16000000 / rg_saw_cnt
4665 ocp_data
= ocp_reg_read(tp
, 0xc426);
4668 u32 swr_cnt_1ms_ini
;
4670 swr_cnt_1ms_ini
= (16000000 / ocp_data
) & SAW_CNT_1MS_MASK
;
4671 ocp_data
= ocp_read_word(tp
, MCU_TYPE_USB
, USB_UPS_CFG
);
4672 ocp_data
= (ocp_data
& ~SAW_CNT_1MS_MASK
) | swr_cnt_1ms_ini
;
4673 ocp_write_word(tp
, MCU_TYPE_USB
, USB_UPS_CFG
, ocp_data
);
4676 ocp_data
= ocp_read_word(tp
, MCU_TYPE_PLA
, PLA_PHY_PWR
);
4677 ocp_data
|= PFM_PWM_SWITCH
;
4678 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_PHY_PWR
, ocp_data
);
4681 if (!r8153_patch_request(tp
, true)) {
4682 data
= ocp_reg_read(tp
, OCP_POWER_CFG
);
4683 data
|= EEE_CLKDIV_EN
;
4684 ocp_reg_write(tp
, OCP_POWER_CFG
, data
);
4685 tp
->ups_info
.eee_ckdiv
= true;
4687 data
= ocp_reg_read(tp
, OCP_DOWN_SPEED
);
4688 data
|= EN_EEE_CMODE
| EN_EEE_1000
| EN_10M_CLKDIV
;
4689 ocp_reg_write(tp
, OCP_DOWN_SPEED
, data
);
4690 tp
->ups_info
.eee_cmod_lv
= true;
4691 tp
->ups_info
._10m_ckdiv
= true;
4692 tp
->ups_info
.eee_plloff_giga
= true;
4694 ocp_reg_write(tp
, OCP_SYSCLK_CFG
, 0);
4695 ocp_reg_write(tp
, OCP_SYSCLK_CFG
, clk_div_expo(5));
4696 tp
->ups_info
._250m_ckdiv
= true;
4698 r8153_patch_request(tp
, false);
4702 rtl_eee_enable(tp
, true);
4704 r8153_aldps_en(tp
, true);
4705 r8152b_enable_fc(tp
);
4707 set_bit(PHY_RESET
, &tp
->flags
);
4710 static void r8153_first_init(struct r8152
*tp
)
4714 r8153_mac_clk_spd(tp
, false);
4715 rxdy_gated_en(tp
, true);
4716 r8153_teredo_off(tp
);
4718 ocp_data
= ocp_read_dword(tp
, MCU_TYPE_PLA
, PLA_RCR
);
4719 ocp_data
&= ~RCR_ACPT_ALL
;
4720 ocp_write_dword(tp
, MCU_TYPE_PLA
, PLA_RCR
, ocp_data
);
4722 rtl8152_nic_reset(tp
);
4725 ocp_data
= ocp_read_byte(tp
, MCU_TYPE_PLA
, PLA_OOB_CTRL
);
4726 ocp_data
&= ~NOW_IS_OOB
;
4727 ocp_write_byte(tp
, MCU_TYPE_PLA
, PLA_OOB_CTRL
, ocp_data
);
4729 ocp_data
= ocp_read_word(tp
, MCU_TYPE_PLA
, PLA_SFF_STS_7
);
4730 ocp_data
&= ~MCU_BORW_EN
;
4731 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_SFF_STS_7
, ocp_data
);
4733 wait_oob_link_list_ready(tp
);
4735 ocp_data
= ocp_read_word(tp
, MCU_TYPE_PLA
, PLA_SFF_STS_7
);
4736 ocp_data
|= RE_INIT_LL
;
4737 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_SFF_STS_7
, ocp_data
);
4739 wait_oob_link_list_ready(tp
);
4741 rtl_rx_vlan_en(tp
, tp
->netdev
->features
& NETIF_F_HW_VLAN_CTAG_RX
);
4743 ocp_data
= tp
->netdev
->mtu
+ VLAN_ETH_HLEN
+ ETH_FCS_LEN
;
4744 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_RMS
, ocp_data
);
4745 ocp_write_byte(tp
, MCU_TYPE_PLA
, PLA_MTPS
, MTPS_JUMBO
);
4747 ocp_data
= ocp_read_word(tp
, MCU_TYPE_PLA
, PLA_TCR0
);
4748 ocp_data
|= TCR0_AUTO_FIFO
;
4749 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_TCR0
, ocp_data
);
4751 rtl8152_nic_reset(tp
);
4753 /* rx share fifo credit full threshold */
4754 ocp_write_dword(tp
, MCU_TYPE_PLA
, PLA_RXFIFO_CTRL0
, RXFIFO_THR1_NORMAL
);
4755 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_RXFIFO_CTRL1
, RXFIFO_THR2_NORMAL
);
4756 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_RXFIFO_CTRL2
, RXFIFO_THR3_NORMAL
);
4757 /* TX share fifo free credit full threshold */
4758 ocp_write_dword(tp
, MCU_TYPE_PLA
, PLA_TXFIFO_CTRL
, TXFIFO_THR_NORMAL2
);
4761 static void r8153_enter_oob(struct r8152
*tp
)
4765 r8153_mac_clk_spd(tp
, true);
4767 ocp_data
= ocp_read_byte(tp
, MCU_TYPE_PLA
, PLA_OOB_CTRL
);
4768 ocp_data
&= ~NOW_IS_OOB
;
4769 ocp_write_byte(tp
, MCU_TYPE_PLA
, PLA_OOB_CTRL
, ocp_data
);
4774 wait_oob_link_list_ready(tp
);
4776 ocp_data
= ocp_read_word(tp
, MCU_TYPE_PLA
, PLA_SFF_STS_7
);
4777 ocp_data
|= RE_INIT_LL
;
4778 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_SFF_STS_7
, ocp_data
);
4780 wait_oob_link_list_ready(tp
);
4782 ocp_data
= tp
->netdev
->mtu
+ VLAN_ETH_HLEN
+ ETH_FCS_LEN
;
4783 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_RMS
, ocp_data
);
4785 switch (tp
->version
) {
4790 ocp_data
= ocp_read_word(tp
, MCU_TYPE_PLA
, PLA_TEREDO_CFG
);
4791 ocp_data
&= ~TEREDO_WAKE_MASK
;
4792 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_TEREDO_CFG
, ocp_data
);
4797 /* Clear teredo wake event. bit[15:8] is the teredo wakeup
4798 * type. Set it to zero. bits[7:0] are the W1C bits about
4799 * the events. Set them to all 1 to clear them.
4801 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_TEREDO_WAKE_BASE
, 0x00ff);
4808 rtl_rx_vlan_en(tp
, true);
4810 ocp_data
= ocp_read_word(tp
, MCU_TYPE_PLA
, PLA_BDC_CR
);
4811 ocp_data
|= ALDPS_PROXY_MODE
;
4812 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_BDC_CR
, ocp_data
);
4814 ocp_data
= ocp_read_byte(tp
, MCU_TYPE_PLA
, PLA_OOB_CTRL
);
4815 ocp_data
|= NOW_IS_OOB
| DIS_MCU_CLROOB
;
4816 ocp_write_byte(tp
, MCU_TYPE_PLA
, PLA_OOB_CTRL
, ocp_data
);
4818 rxdy_gated_en(tp
, false);
4820 ocp_data
= ocp_read_dword(tp
, MCU_TYPE_PLA
, PLA_RCR
);
4821 ocp_data
|= RCR_APM
| RCR_AM
| RCR_AB
;
4822 ocp_write_dword(tp
, MCU_TYPE_PLA
, PLA_RCR
, ocp_data
);
4825 static void rtl8153_disable(struct r8152
*tp
)
4827 r8153_aldps_en(tp
, false);
4830 r8153_aldps_en(tp
, true);
4833 static int rtl8152_set_speed(struct r8152
*tp
, u8 autoneg
, u32 speed
, u8 duplex
,
4839 if (autoneg
== AUTONEG_DISABLE
) {
4840 if (duplex
!= DUPLEX_HALF
&& duplex
!= DUPLEX_FULL
)
4845 bmcr
= BMCR_SPEED10
;
4846 if (duplex
== DUPLEX_FULL
) {
4847 bmcr
|= BMCR_FULLDPLX
;
4848 tp
->ups_info
.speed_duplex
= FORCE_10M_FULL
;
4850 tp
->ups_info
.speed_duplex
= FORCE_10M_HALF
;
4854 bmcr
= BMCR_SPEED100
;
4855 if (duplex
== DUPLEX_FULL
) {
4856 bmcr
|= BMCR_FULLDPLX
;
4857 tp
->ups_info
.speed_duplex
= FORCE_100M_FULL
;
4859 tp
->ups_info
.speed_duplex
= FORCE_100M_HALF
;
4863 if (tp
->mii
.supports_gmii
) {
4864 bmcr
= BMCR_SPEED1000
| BMCR_FULLDPLX
;
4865 tp
->ups_info
.speed_duplex
= NWAY_1000M_FULL
;
4874 if (duplex
== DUPLEX_FULL
)
4875 tp
->mii
.full_duplex
= 1;
4877 tp
->mii
.full_duplex
= 0;
4879 tp
->mii
.force_media
= 1;
4884 support
= RTL_ADVERTISED_10_HALF
| RTL_ADVERTISED_10_FULL
|
4885 RTL_ADVERTISED_100_HALF
| RTL_ADVERTISED_100_FULL
;
4887 if (tp
->mii
.supports_gmii
)
4888 support
|= RTL_ADVERTISED_1000_FULL
;
4890 if (!(advertising
& support
))
4893 anar
= r8152_mdio_read(tp
, MII_ADVERTISE
);
4894 tmp1
= anar
& ~(ADVERTISE_10HALF
| ADVERTISE_10FULL
|
4895 ADVERTISE_100HALF
| ADVERTISE_100FULL
);
4896 if (advertising
& RTL_ADVERTISED_10_HALF
) {
4897 tmp1
|= ADVERTISE_10HALF
;
4898 tp
->ups_info
.speed_duplex
= NWAY_10M_HALF
;
4900 if (advertising
& RTL_ADVERTISED_10_FULL
) {
4901 tmp1
|= ADVERTISE_10FULL
;
4902 tp
->ups_info
.speed_duplex
= NWAY_10M_FULL
;
4905 if (advertising
& RTL_ADVERTISED_100_HALF
) {
4906 tmp1
|= ADVERTISE_100HALF
;
4907 tp
->ups_info
.speed_duplex
= NWAY_100M_HALF
;
4909 if (advertising
& RTL_ADVERTISED_100_FULL
) {
4910 tmp1
|= ADVERTISE_100FULL
;
4911 tp
->ups_info
.speed_duplex
= NWAY_100M_FULL
;
4915 r8152_mdio_write(tp
, MII_ADVERTISE
, tmp1
);
4916 tp
->mii
.advertising
= tmp1
;
4919 if (tp
->mii
.supports_gmii
) {
4922 gbcr
= r8152_mdio_read(tp
, MII_CTRL1000
);
4923 tmp1
= gbcr
& ~(ADVERTISE_1000FULL
|
4924 ADVERTISE_1000HALF
);
4926 if (advertising
& RTL_ADVERTISED_1000_FULL
) {
4927 tmp1
|= ADVERTISE_1000FULL
;
4928 tp
->ups_info
.speed_duplex
= NWAY_1000M_FULL
;
4932 r8152_mdio_write(tp
, MII_CTRL1000
, tmp1
);
4935 bmcr
= BMCR_ANENABLE
| BMCR_ANRESTART
;
4937 tp
->mii
.force_media
= 0;
4940 if (test_and_clear_bit(PHY_RESET
, &tp
->flags
))
4943 r8152_mdio_write(tp
, MII_BMCR
, bmcr
);
4945 if (bmcr
& BMCR_RESET
) {
4948 for (i
= 0; i
< 50; i
++) {
4950 if ((r8152_mdio_read(tp
, MII_BMCR
) & BMCR_RESET
) == 0)
4959 static void rtl8152_up(struct r8152
*tp
)
4961 if (test_bit(RTL8152_UNPLUG
, &tp
->flags
))
4964 r8152_aldps_en(tp
, false);
4965 r8152b_exit_oob(tp
);
4966 r8152_aldps_en(tp
, true);
4969 static void rtl8152_down(struct r8152
*tp
)
4971 if (test_bit(RTL8152_UNPLUG
, &tp
->flags
)) {
4972 rtl_drop_queued_tx(tp
);
4976 r8152_power_cut_en(tp
, false);
4977 r8152_aldps_en(tp
, false);
4978 r8152b_enter_oob(tp
);
4979 r8152_aldps_en(tp
, true);
4982 static void rtl8153_up(struct r8152
*tp
)
4986 if (test_bit(RTL8152_UNPLUG
, &tp
->flags
))
4989 r8153_u1u2en(tp
, false);
4990 r8153_u2p3en(tp
, false);
4991 r8153_aldps_en(tp
, false);
4992 r8153_first_init(tp
);
4994 ocp_data
= ocp_read_byte(tp
, MCU_TYPE_PLA
, PLA_CONFIG6
);
4995 ocp_data
|= LANWAKE_CLR_EN
;
4996 ocp_write_byte(tp
, MCU_TYPE_PLA
, PLA_CONFIG6
, ocp_data
);
4998 ocp_data
= ocp_read_byte(tp
, MCU_TYPE_PLA
, PLA_LWAKE_CTRL_REG
);
4999 ocp_data
&= ~LANWAKE_PIN
;
5000 ocp_write_byte(tp
, MCU_TYPE_PLA
, PLA_LWAKE_CTRL_REG
, ocp_data
);
5002 ocp_data
= ocp_read_word(tp
, MCU_TYPE_USB
, USB_SSPHYLINK1
);
5003 ocp_data
&= ~DELAY_PHY_PWR_CHG
;
5004 ocp_write_word(tp
, MCU_TYPE_USB
, USB_SSPHYLINK1
, ocp_data
);
5006 r8153_aldps_en(tp
, true);
5008 switch (tp
->version
) {
5015 r8153_u2p3en(tp
, true);
5019 r8153_u1u2en(tp
, true);
5022 static void rtl8153_down(struct r8152
*tp
)
5026 if (test_bit(RTL8152_UNPLUG
, &tp
->flags
)) {
5027 rtl_drop_queued_tx(tp
);
5031 ocp_data
= ocp_read_byte(tp
, MCU_TYPE_PLA
, PLA_CONFIG6
);
5032 ocp_data
&= ~LANWAKE_CLR_EN
;
5033 ocp_write_byte(tp
, MCU_TYPE_PLA
, PLA_CONFIG6
, ocp_data
);
5035 r8153_u1u2en(tp
, false);
5036 r8153_u2p3en(tp
, false);
5037 r8153_power_cut_en(tp
, false);
5038 r8153_aldps_en(tp
, false);
5039 r8153_enter_oob(tp
);
5040 r8153_aldps_en(tp
, true);
5043 static void rtl8153b_up(struct r8152
*tp
)
5047 if (test_bit(RTL8152_UNPLUG
, &tp
->flags
))
5050 r8153b_u1u2en(tp
, false);
5051 r8153_u2p3en(tp
, false);
5052 r8153_aldps_en(tp
, false);
5054 r8153_first_init(tp
);
5055 ocp_write_dword(tp
, MCU_TYPE_USB
, USB_RX_BUF_TH
, RX_THR_B
);
5057 ocp_data
= ocp_read_word(tp
, MCU_TYPE_PLA
, PLA_MAC_PWR_CTRL3
);
5058 ocp_data
&= ~PLA_MCU_SPDWN_EN
;
5059 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_MAC_PWR_CTRL3
, ocp_data
);
5061 r8153_aldps_en(tp
, true);
5063 if (tp
->udev
->speed
!= USB_SPEED_HIGH
)
5064 r8153b_u1u2en(tp
, true);
5067 static void rtl8153b_down(struct r8152
*tp
)
5071 if (test_bit(RTL8152_UNPLUG
, &tp
->flags
)) {
5072 rtl_drop_queued_tx(tp
);
5076 ocp_data
= ocp_read_word(tp
, MCU_TYPE_PLA
, PLA_MAC_PWR_CTRL3
);
5077 ocp_data
|= PLA_MCU_SPDWN_EN
;
5078 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_MAC_PWR_CTRL3
, ocp_data
);
5080 r8153b_u1u2en(tp
, false);
5081 r8153_u2p3en(tp
, false);
5082 r8153b_power_cut_en(tp
, false);
5083 r8153_aldps_en(tp
, false);
5084 r8153_enter_oob(tp
);
5085 r8153_aldps_en(tp
, true);
5088 static bool rtl8152_in_nway(struct r8152
*tp
)
5092 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_OCP_GPHY_BASE
, 0x2000);
5093 tp
->ocp_base
= 0x2000;
5094 ocp_write_byte(tp
, MCU_TYPE_PLA
, 0xb014, 0x4c); /* phy state */
5095 nway_state
= ocp_read_word(tp
, MCU_TYPE_PLA
, 0xb01a);
5097 /* bit 15: TXDIS_STATE, bit 14: ABD_STATE */
5098 if (nway_state
& 0xc000)
5104 static bool rtl8153_in_nway(struct r8152
*tp
)
5106 u16 phy_state
= ocp_reg_read(tp
, OCP_PHY_STATE
) & 0xff;
5108 if (phy_state
== TXDIS_STATE
|| phy_state
== ABD_STATE
)
5114 static void set_carrier(struct r8152
*tp
)
5116 struct net_device
*netdev
= tp
->netdev
;
5117 struct napi_struct
*napi
= &tp
->napi
;
5120 speed
= rtl8152_get_speed(tp
);
5122 if (speed
& LINK_STATUS
) {
5123 if (!netif_carrier_ok(netdev
)) {
5124 tp
->rtl_ops
.enable(tp
);
5125 netif_stop_queue(netdev
);
5127 netif_carrier_on(netdev
);
5129 clear_bit(RTL8152_SET_RX_MODE
, &tp
->flags
);
5130 _rtl8152_set_rx_mode(netdev
);
5131 napi_enable(&tp
->napi
);
5132 netif_wake_queue(netdev
);
5133 netif_info(tp
, link
, netdev
, "carrier on\n");
5134 } else if (netif_queue_stopped(netdev
) &&
5135 skb_queue_len(&tp
->tx_queue
) < tp
->tx_qlen
) {
5136 netif_wake_queue(netdev
);
5139 if (netif_carrier_ok(netdev
)) {
5140 netif_carrier_off(netdev
);
5141 tasklet_disable(&tp
->tx_tl
);
5143 tp
->rtl_ops
.disable(tp
);
5145 tasklet_enable(&tp
->tx_tl
);
5146 netif_info(tp
, link
, netdev
, "carrier off\n");
5151 static void rtl_work_func_t(struct work_struct
*work
)
5153 struct r8152
*tp
= container_of(work
, struct r8152
, schedule
.work
);
5155 /* If the device is unplugged or !netif_running(), the workqueue
5156 * doesn't need to wake the device, and could return directly.
5158 if (test_bit(RTL8152_UNPLUG
, &tp
->flags
) || !netif_running(tp
->netdev
))
5161 if (usb_autopm_get_interface(tp
->intf
) < 0)
5164 if (!test_bit(WORK_ENABLE
, &tp
->flags
))
5167 if (!mutex_trylock(&tp
->control
)) {
5168 schedule_delayed_work(&tp
->schedule
, 0);
5172 if (test_and_clear_bit(RTL8152_LINK_CHG
, &tp
->flags
))
5175 if (test_and_clear_bit(RTL8152_SET_RX_MODE
, &tp
->flags
))
5176 _rtl8152_set_rx_mode(tp
->netdev
);
5178 /* don't schedule tasket before linking */
5179 if (test_and_clear_bit(SCHEDULE_TASKLET
, &tp
->flags
) &&
5180 netif_carrier_ok(tp
->netdev
))
5181 tasklet_schedule(&tp
->tx_tl
);
5183 mutex_unlock(&tp
->control
);
5186 usb_autopm_put_interface(tp
->intf
);
5189 static void rtl_hw_phy_work_func_t(struct work_struct
*work
)
5191 struct r8152
*tp
= container_of(work
, struct r8152
, hw_phy_work
.work
);
5193 if (test_bit(RTL8152_UNPLUG
, &tp
->flags
))
5196 if (usb_autopm_get_interface(tp
->intf
) < 0)
5199 mutex_lock(&tp
->control
);
5201 if (rtl8152_request_firmware(tp
) == -ENODEV
&& tp
->rtl_fw
.retry
) {
5202 tp
->rtl_fw
.retry
= false;
5203 tp
->rtl_fw
.fw
= NULL
;
5205 /* Delay execution in case request_firmware() is not ready yet.
5207 queue_delayed_work(system_long_wq
, &tp
->hw_phy_work
, HZ
* 10);
5211 tp
->rtl_ops
.hw_phy_cfg(tp
);
5213 rtl8152_set_speed(tp
, tp
->autoneg
, tp
->speed
, tp
->duplex
,
5217 mutex_unlock(&tp
->control
);
5219 usb_autopm_put_interface(tp
->intf
);
5222 #ifdef CONFIG_PM_SLEEP
5223 static int rtl_notifier(struct notifier_block
*nb
, unsigned long action
,
5226 struct r8152
*tp
= container_of(nb
, struct r8152
, pm_notifier
);
5229 case PM_HIBERNATION_PREPARE
:
5230 case PM_SUSPEND_PREPARE
:
5231 usb_autopm_get_interface(tp
->intf
);
5234 case PM_POST_HIBERNATION
:
5235 case PM_POST_SUSPEND
:
5236 usb_autopm_put_interface(tp
->intf
);
5239 case PM_POST_RESTORE
:
5240 case PM_RESTORE_PREPARE
:
5249 static int rtl8152_open(struct net_device
*netdev
)
5251 struct r8152
*tp
= netdev_priv(netdev
);
5254 if (work_busy(&tp
->hw_phy_work
.work
) & WORK_BUSY_PENDING
) {
5255 cancel_delayed_work_sync(&tp
->hw_phy_work
);
5256 rtl_hw_phy_work_func_t(&tp
->hw_phy_work
.work
);
5259 res
= alloc_all_mem(tp
);
5263 res
= usb_autopm_get_interface(tp
->intf
);
5267 mutex_lock(&tp
->control
);
5271 netif_carrier_off(netdev
);
5272 netif_start_queue(netdev
);
5273 set_bit(WORK_ENABLE
, &tp
->flags
);
5275 res
= usb_submit_urb(tp
->intr_urb
, GFP_KERNEL
);
5278 netif_device_detach(tp
->netdev
);
5279 netif_warn(tp
, ifup
, netdev
, "intr_urb submit failed: %d\n",
5283 napi_enable(&tp
->napi
);
5284 tasklet_enable(&tp
->tx_tl
);
5286 mutex_unlock(&tp
->control
);
5288 usb_autopm_put_interface(tp
->intf
);
5289 #ifdef CONFIG_PM_SLEEP
5290 tp
->pm_notifier
.notifier_call
= rtl_notifier
;
5291 register_pm_notifier(&tp
->pm_notifier
);
5296 mutex_unlock(&tp
->control
);
5297 usb_autopm_put_interface(tp
->intf
);
5304 static int rtl8152_close(struct net_device
*netdev
)
5306 struct r8152
*tp
= netdev_priv(netdev
);
5309 #ifdef CONFIG_PM_SLEEP
5310 unregister_pm_notifier(&tp
->pm_notifier
);
5312 tasklet_disable(&tp
->tx_tl
);
5313 clear_bit(WORK_ENABLE
, &tp
->flags
);
5314 usb_kill_urb(tp
->intr_urb
);
5315 cancel_delayed_work_sync(&tp
->schedule
);
5316 napi_disable(&tp
->napi
);
5317 netif_stop_queue(netdev
);
5319 res
= usb_autopm_get_interface(tp
->intf
);
5320 if (res
< 0 || test_bit(RTL8152_UNPLUG
, &tp
->flags
)) {
5321 rtl_drop_queued_tx(tp
);
5324 mutex_lock(&tp
->control
);
5326 tp
->rtl_ops
.down(tp
);
5328 mutex_unlock(&tp
->control
);
5330 usb_autopm_put_interface(tp
->intf
);
5338 static void rtl_tally_reset(struct r8152
*tp
)
5342 ocp_data
= ocp_read_word(tp
, MCU_TYPE_PLA
, PLA_RSTTALLY
);
5343 ocp_data
|= TALLY_RESET
;
5344 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_RSTTALLY
, ocp_data
);
5347 static void r8152b_init(struct r8152
*tp
)
5352 if (test_bit(RTL8152_UNPLUG
, &tp
->flags
))
5355 data
= r8152_mdio_read(tp
, MII_BMCR
);
5356 if (data
& BMCR_PDOWN
) {
5357 data
&= ~BMCR_PDOWN
;
5358 r8152_mdio_write(tp
, MII_BMCR
, data
);
5361 r8152_aldps_en(tp
, false);
5363 if (tp
->version
== RTL_VER_01
) {
5364 ocp_data
= ocp_read_word(tp
, MCU_TYPE_PLA
, PLA_LED_FEATURE
);
5365 ocp_data
&= ~LED_MODE_MASK
;
5366 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_LED_FEATURE
, ocp_data
);
5369 r8152_power_cut_en(tp
, false);
5371 ocp_data
= ocp_read_word(tp
, MCU_TYPE_PLA
, PLA_PHY_PWR
);
5372 ocp_data
|= TX_10M_IDLE_EN
| PFM_PWM_SWITCH
;
5373 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_PHY_PWR
, ocp_data
);
5374 ocp_data
= ocp_read_dword(tp
, MCU_TYPE_PLA
, PLA_MAC_PWR_CTRL
);
5375 ocp_data
&= ~MCU_CLK_RATIO_MASK
;
5376 ocp_data
|= MCU_CLK_RATIO
| D3_CLK_GATED_EN
;
5377 ocp_write_dword(tp
, MCU_TYPE_PLA
, PLA_MAC_PWR_CTRL
, ocp_data
);
5378 ocp_data
= GPHY_STS_MSK
| SPEED_DOWN_MSK
|
5379 SPDWN_RXDV_MSK
| SPDWN_LINKCHG_MSK
;
5380 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_GPHY_INTR_IMR
, ocp_data
);
5382 rtl_tally_reset(tp
);
5384 /* enable rx aggregation */
5385 ocp_data
= ocp_read_word(tp
, MCU_TYPE_USB
, USB_USB_CTRL
);
5386 ocp_data
&= ~(RX_AGG_DISABLE
| RX_ZERO_EN
);
5387 ocp_write_word(tp
, MCU_TYPE_USB
, USB_USB_CTRL
, ocp_data
);
5390 static void r8153_init(struct r8152
*tp
)
5396 if (test_bit(RTL8152_UNPLUG
, &tp
->flags
))
5399 r8153_u1u2en(tp
, false);
5401 for (i
= 0; i
< 500; i
++) {
5402 if (ocp_read_word(tp
, MCU_TYPE_PLA
, PLA_BOOT_CTRL
) &
5408 data
= r8153_phy_status(tp
, 0);
5410 if (tp
->version
== RTL_VER_03
|| tp
->version
== RTL_VER_04
||
5411 tp
->version
== RTL_VER_05
)
5412 ocp_reg_write(tp
, OCP_ADC_CFG
, CKADSEL_L
| ADC_EN
| EN_EMI_L
);
5414 data
= r8152_mdio_read(tp
, MII_BMCR
);
5415 if (data
& BMCR_PDOWN
) {
5416 data
&= ~BMCR_PDOWN
;
5417 r8152_mdio_write(tp
, MII_BMCR
, data
);
5420 data
= r8153_phy_status(tp
, PHY_STAT_LAN_ON
);
5422 r8153_u2p3en(tp
, false);
5424 if (tp
->version
== RTL_VER_04
) {
5425 ocp_data
= ocp_read_word(tp
, MCU_TYPE_USB
, USB_SSPHYLINK2
);
5426 ocp_data
&= ~pwd_dn_scale_mask
;
5427 ocp_data
|= pwd_dn_scale(96);
5428 ocp_write_word(tp
, MCU_TYPE_USB
, USB_SSPHYLINK2
, ocp_data
);
5430 ocp_data
= ocp_read_byte(tp
, MCU_TYPE_USB
, USB_USB2PHY
);
5431 ocp_data
|= USB2PHY_L1
| USB2PHY_SUSPEND
;
5432 ocp_write_byte(tp
, MCU_TYPE_USB
, USB_USB2PHY
, ocp_data
);
5433 } else if (tp
->version
== RTL_VER_05
) {
5434 ocp_data
= ocp_read_byte(tp
, MCU_TYPE_PLA
, PLA_DMY_REG0
);
5435 ocp_data
&= ~ECM_ALDPS
;
5436 ocp_write_byte(tp
, MCU_TYPE_PLA
, PLA_DMY_REG0
, ocp_data
);
5438 ocp_data
= ocp_read_byte(tp
, MCU_TYPE_USB
, USB_CSR_DUMMY1
);
5439 if (ocp_read_word(tp
, MCU_TYPE_USB
, USB_BURST_SIZE
) == 0)
5440 ocp_data
&= ~DYNAMIC_BURST
;
5442 ocp_data
|= DYNAMIC_BURST
;
5443 ocp_write_byte(tp
, MCU_TYPE_USB
, USB_CSR_DUMMY1
, ocp_data
);
5444 } else if (tp
->version
== RTL_VER_06
) {
5445 ocp_data
= ocp_read_byte(tp
, MCU_TYPE_USB
, USB_CSR_DUMMY1
);
5446 if (ocp_read_word(tp
, MCU_TYPE_USB
, USB_BURST_SIZE
) == 0)
5447 ocp_data
&= ~DYNAMIC_BURST
;
5449 ocp_data
|= DYNAMIC_BURST
;
5450 ocp_write_byte(tp
, MCU_TYPE_USB
, USB_CSR_DUMMY1
, ocp_data
);
5452 r8153_queue_wake(tp
, false);
5454 ocp_data
= ocp_read_word(tp
, MCU_TYPE_PLA
, PLA_EXTRA_STATUS
);
5455 if (rtl8152_get_speed(tp
) & LINK_STATUS
)
5456 ocp_data
|= CUR_LINK_OK
;
5458 ocp_data
&= ~CUR_LINK_OK
;
5459 ocp_data
|= POLL_LINK_CHG
;
5460 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_EXTRA_STATUS
, ocp_data
);
5463 ocp_data
= ocp_read_byte(tp
, MCU_TYPE_USB
, USB_CSR_DUMMY2
);
5464 ocp_data
|= EP4_FULL_FC
;
5465 ocp_write_byte(tp
, MCU_TYPE_USB
, USB_CSR_DUMMY2
, ocp_data
);
5467 ocp_data
= ocp_read_word(tp
, MCU_TYPE_USB
, USB_WDT11_CTRL
);
5468 ocp_data
&= ~TIMER11_EN
;
5469 ocp_write_word(tp
, MCU_TYPE_USB
, USB_WDT11_CTRL
, ocp_data
);
5471 ocp_data
= ocp_read_word(tp
, MCU_TYPE_PLA
, PLA_LED_FEATURE
);
5472 ocp_data
&= ~LED_MODE_MASK
;
5473 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_LED_FEATURE
, ocp_data
);
5475 ocp_data
= FIFO_EMPTY_1FB
| ROK_EXIT_LPM
;
5476 if (tp
->version
== RTL_VER_04
&& tp
->udev
->speed
< USB_SPEED_SUPER
)
5477 ocp_data
|= LPM_TIMER_500MS
;
5479 ocp_data
|= LPM_TIMER_500US
;
5480 ocp_write_byte(tp
, MCU_TYPE_USB
, USB_LPM_CTRL
, ocp_data
);
5482 ocp_data
= ocp_read_word(tp
, MCU_TYPE_USB
, USB_AFE_CTRL2
);
5483 ocp_data
&= ~SEN_VAL_MASK
;
5484 ocp_data
|= SEN_VAL_NORMAL
| SEL_RXIDLE
;
5485 ocp_write_word(tp
, MCU_TYPE_USB
, USB_AFE_CTRL2
, ocp_data
);
5487 ocp_write_word(tp
, MCU_TYPE_USB
, USB_CONNECT_TIMER
, 0x0001);
5489 r8153_power_cut_en(tp
, false);
5490 rtl_runtime_suspend_enable(tp
, false);
5491 r8153_u1u2en(tp
, true);
5492 r8153_mac_clk_spd(tp
, false);
5493 usb_enable_lpm(tp
->udev
);
5495 ocp_data
= ocp_read_byte(tp
, MCU_TYPE_PLA
, PLA_CONFIG6
);
5496 ocp_data
|= LANWAKE_CLR_EN
;
5497 ocp_write_byte(tp
, MCU_TYPE_PLA
, PLA_CONFIG6
, ocp_data
);
5499 ocp_data
= ocp_read_byte(tp
, MCU_TYPE_PLA
, PLA_LWAKE_CTRL_REG
);
5500 ocp_data
&= ~LANWAKE_PIN
;
5501 ocp_write_byte(tp
, MCU_TYPE_PLA
, PLA_LWAKE_CTRL_REG
, ocp_data
);
5503 /* rx aggregation */
5504 ocp_data
= ocp_read_word(tp
, MCU_TYPE_USB
, USB_USB_CTRL
);
5505 ocp_data
&= ~(RX_AGG_DISABLE
| RX_ZERO_EN
);
5506 if (test_bit(DELL_TB_RX_AGG_BUG
, &tp
->flags
))
5507 ocp_data
|= RX_AGG_DISABLE
;
5509 ocp_write_word(tp
, MCU_TYPE_USB
, USB_USB_CTRL
, ocp_data
);
5511 rtl_tally_reset(tp
);
5513 switch (tp
->udev
->speed
) {
5514 case USB_SPEED_SUPER
:
5515 case USB_SPEED_SUPER_PLUS
:
5516 tp
->coalesce
= COALESCE_SUPER
;
5518 case USB_SPEED_HIGH
:
5519 tp
->coalesce
= COALESCE_HIGH
;
5522 tp
->coalesce
= COALESCE_SLOW
;
5527 static void r8153b_init(struct r8152
*tp
)
5533 if (test_bit(RTL8152_UNPLUG
, &tp
->flags
))
5536 r8153b_u1u2en(tp
, false);
5538 for (i
= 0; i
< 500; i
++) {
5539 if (ocp_read_word(tp
, MCU_TYPE_PLA
, PLA_BOOT_CTRL
) &
5545 data
= r8153_phy_status(tp
, 0);
5547 data
= r8152_mdio_read(tp
, MII_BMCR
);
5548 if (data
& BMCR_PDOWN
) {
5549 data
&= ~BMCR_PDOWN
;
5550 r8152_mdio_write(tp
, MII_BMCR
, data
);
5553 data
= r8153_phy_status(tp
, PHY_STAT_LAN_ON
);
5555 r8153_u2p3en(tp
, false);
5557 /* MSC timer = 0xfff * 8ms = 32760 ms */
5558 ocp_write_word(tp
, MCU_TYPE_USB
, USB_MSC_TIMER
, 0x0fff);
5560 /* U1/U2/L1 idle timer. 500 us */
5561 ocp_write_word(tp
, MCU_TYPE_USB
, USB_U1U2_TIMER
, 500);
5563 r8153b_power_cut_en(tp
, false);
5564 r8153b_ups_en(tp
, false);
5565 r8153_queue_wake(tp
, false);
5566 rtl_runtime_suspend_enable(tp
, false);
5568 ocp_data
= ocp_read_word(tp
, MCU_TYPE_PLA
, PLA_EXTRA_STATUS
);
5569 if (rtl8152_get_speed(tp
) & LINK_STATUS
)
5570 ocp_data
|= CUR_LINK_OK
;
5572 ocp_data
&= ~CUR_LINK_OK
;
5573 ocp_data
|= POLL_LINK_CHG
;
5574 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_EXTRA_STATUS
, ocp_data
);
5576 if (tp
->udev
->speed
!= USB_SPEED_HIGH
)
5577 r8153b_u1u2en(tp
, true);
5578 usb_enable_lpm(tp
->udev
);
5580 /* MAC clock speed down */
5581 ocp_data
= ocp_read_word(tp
, MCU_TYPE_PLA
, PLA_MAC_PWR_CTRL2
);
5582 ocp_data
|= MAC_CLK_SPDWN_EN
;
5583 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_MAC_PWR_CTRL2
, ocp_data
);
5585 ocp_data
= ocp_read_word(tp
, MCU_TYPE_PLA
, PLA_MAC_PWR_CTRL3
);
5586 ocp_data
&= ~PLA_MCU_SPDWN_EN
;
5587 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_MAC_PWR_CTRL3
, ocp_data
);
5589 if (tp
->version
== RTL_VER_09
) {
5590 /* Disable Test IO for 32QFN */
5591 if (ocp_read_byte(tp
, MCU_TYPE_PLA
, 0xdc00) & BIT(5)) {
5592 ocp_data
= ocp_read_word(tp
, MCU_TYPE_PLA
, PLA_PHY_PWR
);
5593 ocp_data
|= TEST_IO_OFF
;
5594 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_PHY_PWR
, ocp_data
);
5598 set_bit(GREEN_ETHERNET
, &tp
->flags
);
5600 /* rx aggregation */
5601 ocp_data
= ocp_read_word(tp
, MCU_TYPE_USB
, USB_USB_CTRL
);
5602 ocp_data
&= ~(RX_AGG_DISABLE
| RX_ZERO_EN
);
5603 ocp_write_word(tp
, MCU_TYPE_USB
, USB_USB_CTRL
, ocp_data
);
5605 rtl_tally_reset(tp
);
5607 tp
->coalesce
= 15000; /* 15 us */
5610 static int rtl8152_pre_reset(struct usb_interface
*intf
)
5612 struct r8152
*tp
= usb_get_intfdata(intf
);
5613 struct net_device
*netdev
;
5618 netdev
= tp
->netdev
;
5619 if (!netif_running(netdev
))
5622 netif_stop_queue(netdev
);
5623 tasklet_disable(&tp
->tx_tl
);
5624 clear_bit(WORK_ENABLE
, &tp
->flags
);
5625 usb_kill_urb(tp
->intr_urb
);
5626 cancel_delayed_work_sync(&tp
->schedule
);
5627 napi_disable(&tp
->napi
);
5628 if (netif_carrier_ok(netdev
)) {
5629 mutex_lock(&tp
->control
);
5630 tp
->rtl_ops
.disable(tp
);
5631 mutex_unlock(&tp
->control
);
5637 static int rtl8152_post_reset(struct usb_interface
*intf
)
5639 struct r8152
*tp
= usb_get_intfdata(intf
);
5640 struct net_device
*netdev
;
5646 /* reset the MAC adddress in case of policy change */
5647 if (determine_ethernet_addr(tp
, &sa
) >= 0) {
5649 dev_set_mac_address (tp
->netdev
, &sa
, NULL
);
5653 netdev
= tp
->netdev
;
5654 if (!netif_running(netdev
))
5657 set_bit(WORK_ENABLE
, &tp
->flags
);
5658 if (netif_carrier_ok(netdev
)) {
5659 mutex_lock(&tp
->control
);
5660 tp
->rtl_ops
.enable(tp
);
5662 _rtl8152_set_rx_mode(netdev
);
5663 mutex_unlock(&tp
->control
);
5666 napi_enable(&tp
->napi
);
5667 tasklet_enable(&tp
->tx_tl
);
5668 netif_wake_queue(netdev
);
5669 usb_submit_urb(tp
->intr_urb
, GFP_KERNEL
);
5671 if (!list_empty(&tp
->rx_done
))
5672 napi_schedule(&tp
->napi
);
5677 static bool delay_autosuspend(struct r8152
*tp
)
5679 bool sw_linking
= !!netif_carrier_ok(tp
->netdev
);
5680 bool hw_linking
= !!(rtl8152_get_speed(tp
) & LINK_STATUS
);
5682 /* This means a linking change occurs and the driver doesn't detect it,
5683 * yet. If the driver has disabled tx/rx and hw is linking on, the
5684 * device wouldn't wake up by receiving any packet.
5686 if (work_busy(&tp
->schedule
.work
) || sw_linking
!= hw_linking
)
5689 /* If the linking down is occurred by nway, the device may miss the
5690 * linking change event. And it wouldn't wake when linking on.
5692 if (!sw_linking
&& tp
->rtl_ops
.in_nway(tp
))
5694 else if (!skb_queue_empty(&tp
->tx_queue
))
5700 static int rtl8152_runtime_resume(struct r8152
*tp
)
5702 struct net_device
*netdev
= tp
->netdev
;
5704 if (netif_running(netdev
) && netdev
->flags
& IFF_UP
) {
5705 struct napi_struct
*napi
= &tp
->napi
;
5707 tp
->rtl_ops
.autosuspend_en(tp
, false);
5709 set_bit(WORK_ENABLE
, &tp
->flags
);
5711 if (netif_carrier_ok(netdev
)) {
5712 if (rtl8152_get_speed(tp
) & LINK_STATUS
) {
5715 netif_carrier_off(netdev
);
5716 tp
->rtl_ops
.disable(tp
);
5717 netif_info(tp
, link
, netdev
, "linking down\n");
5722 clear_bit(SELECTIVE_SUSPEND
, &tp
->flags
);
5723 smp_mb__after_atomic();
5725 if (!list_empty(&tp
->rx_done
))
5726 napi_schedule(&tp
->napi
);
5728 usb_submit_urb(tp
->intr_urb
, GFP_NOIO
);
5730 if (netdev
->flags
& IFF_UP
)
5731 tp
->rtl_ops
.autosuspend_en(tp
, false);
5733 clear_bit(SELECTIVE_SUSPEND
, &tp
->flags
);
5739 static int rtl8152_system_resume(struct r8152
*tp
)
5741 struct net_device
*netdev
= tp
->netdev
;
5743 netif_device_attach(netdev
);
5745 if (netif_running(netdev
) && (netdev
->flags
& IFF_UP
)) {
5747 netif_carrier_off(netdev
);
5748 set_bit(WORK_ENABLE
, &tp
->flags
);
5749 usb_submit_urb(tp
->intr_urb
, GFP_NOIO
);
5755 static int rtl8152_runtime_suspend(struct r8152
*tp
)
5757 struct net_device
*netdev
= tp
->netdev
;
5760 set_bit(SELECTIVE_SUSPEND
, &tp
->flags
);
5761 smp_mb__after_atomic();
5763 if (netif_running(netdev
) && test_bit(WORK_ENABLE
, &tp
->flags
)) {
5766 if (netif_carrier_ok(netdev
)) {
5769 rcr
= ocp_read_dword(tp
, MCU_TYPE_PLA
, PLA_RCR
);
5770 ocp_data
= rcr
& ~RCR_ACPT_ALL
;
5771 ocp_write_dword(tp
, MCU_TYPE_PLA
, PLA_RCR
, ocp_data
);
5772 rxdy_gated_en(tp
, true);
5773 ocp_data
= ocp_read_byte(tp
, MCU_TYPE_PLA
,
5775 if (!(ocp_data
& RXFIFO_EMPTY
)) {
5776 rxdy_gated_en(tp
, false);
5777 ocp_write_dword(tp
, MCU_TYPE_PLA
, PLA_RCR
, rcr
);
5778 clear_bit(SELECTIVE_SUSPEND
, &tp
->flags
);
5779 smp_mb__after_atomic();
5785 clear_bit(WORK_ENABLE
, &tp
->flags
);
5786 usb_kill_urb(tp
->intr_urb
);
5788 tp
->rtl_ops
.autosuspend_en(tp
, true);
5790 if (netif_carrier_ok(netdev
)) {
5791 struct napi_struct
*napi
= &tp
->napi
;
5795 rxdy_gated_en(tp
, false);
5796 ocp_write_dword(tp
, MCU_TYPE_PLA
, PLA_RCR
, rcr
);
5800 if (delay_autosuspend(tp
)) {
5801 rtl8152_runtime_resume(tp
);
5810 static int rtl8152_system_suspend(struct r8152
*tp
)
5812 struct net_device
*netdev
= tp
->netdev
;
5814 netif_device_detach(netdev
);
5816 if (netif_running(netdev
) && test_bit(WORK_ENABLE
, &tp
->flags
)) {
5817 struct napi_struct
*napi
= &tp
->napi
;
5819 clear_bit(WORK_ENABLE
, &tp
->flags
);
5820 usb_kill_urb(tp
->intr_urb
);
5821 tasklet_disable(&tp
->tx_tl
);
5823 cancel_delayed_work_sync(&tp
->schedule
);
5824 tp
->rtl_ops
.down(tp
);
5826 tasklet_enable(&tp
->tx_tl
);
5832 static int rtl8152_suspend(struct usb_interface
*intf
, pm_message_t message
)
5834 struct r8152
*tp
= usb_get_intfdata(intf
);
5837 mutex_lock(&tp
->control
);
5839 if (PMSG_IS_AUTO(message
))
5840 ret
= rtl8152_runtime_suspend(tp
);
5842 ret
= rtl8152_system_suspend(tp
);
5844 mutex_unlock(&tp
->control
);
5849 static int rtl8152_resume(struct usb_interface
*intf
)
5851 struct r8152
*tp
= usb_get_intfdata(intf
);
5854 mutex_lock(&tp
->control
);
5856 if (test_bit(SELECTIVE_SUSPEND
, &tp
->flags
))
5857 ret
= rtl8152_runtime_resume(tp
);
5859 ret
= rtl8152_system_resume(tp
);
5861 mutex_unlock(&tp
->control
);
5866 static int rtl8152_reset_resume(struct usb_interface
*intf
)
5868 struct r8152
*tp
= usb_get_intfdata(intf
);
5870 clear_bit(SELECTIVE_SUSPEND
, &tp
->flags
);
5871 tp
->rtl_ops
.init(tp
);
5872 queue_delayed_work(system_long_wq
, &tp
->hw_phy_work
, 0);
5873 set_ethernet_addr(tp
);
5874 return rtl8152_resume(intf
);
5877 static void rtl8152_get_wol(struct net_device
*dev
, struct ethtool_wolinfo
*wol
)
5879 struct r8152
*tp
= netdev_priv(dev
);
5881 if (usb_autopm_get_interface(tp
->intf
) < 0)
5884 if (!rtl_can_wakeup(tp
)) {
5888 mutex_lock(&tp
->control
);
5889 wol
->supported
= WAKE_ANY
;
5890 wol
->wolopts
= __rtl_get_wol(tp
);
5891 mutex_unlock(&tp
->control
);
5894 usb_autopm_put_interface(tp
->intf
);
5897 static int rtl8152_set_wol(struct net_device
*dev
, struct ethtool_wolinfo
*wol
)
5899 struct r8152
*tp
= netdev_priv(dev
);
5902 if (!rtl_can_wakeup(tp
))
5905 if (wol
->wolopts
& ~WAKE_ANY
)
5908 ret
= usb_autopm_get_interface(tp
->intf
);
5912 mutex_lock(&tp
->control
);
5914 __rtl_set_wol(tp
, wol
->wolopts
);
5915 tp
->saved_wolopts
= wol
->wolopts
& WAKE_ANY
;
5917 mutex_unlock(&tp
->control
);
5919 usb_autopm_put_interface(tp
->intf
);
5925 static u32
rtl8152_get_msglevel(struct net_device
*dev
)
5927 struct r8152
*tp
= netdev_priv(dev
);
5929 return tp
->msg_enable
;
5932 static void rtl8152_set_msglevel(struct net_device
*dev
, u32 value
)
5934 struct r8152
*tp
= netdev_priv(dev
);
5936 tp
->msg_enable
= value
;
5939 static void rtl8152_get_drvinfo(struct net_device
*netdev
,
5940 struct ethtool_drvinfo
*info
)
5942 struct r8152
*tp
= netdev_priv(netdev
);
5944 strlcpy(info
->driver
, MODULENAME
, sizeof(info
->driver
));
5945 strlcpy(info
->version
, DRIVER_VERSION
, sizeof(info
->version
));
5946 usb_make_path(tp
->udev
, info
->bus_info
, sizeof(info
->bus_info
));
5947 if (!IS_ERR_OR_NULL(tp
->rtl_fw
.fw
))
5948 strlcpy(info
->fw_version
, tp
->rtl_fw
.version
,
5949 sizeof(info
->fw_version
));
5953 int rtl8152_get_link_ksettings(struct net_device
*netdev
,
5954 struct ethtool_link_ksettings
*cmd
)
5956 struct r8152
*tp
= netdev_priv(netdev
);
5959 if (!tp
->mii
.mdio_read
)
5962 ret
= usb_autopm_get_interface(tp
->intf
);
5966 mutex_lock(&tp
->control
);
5968 mii_ethtool_get_link_ksettings(&tp
->mii
, cmd
);
5970 mutex_unlock(&tp
->control
);
5972 usb_autopm_put_interface(tp
->intf
);
5978 static int rtl8152_set_link_ksettings(struct net_device
*dev
,
5979 const struct ethtool_link_ksettings
*cmd
)
5981 struct r8152
*tp
= netdev_priv(dev
);
5982 u32 advertising
= 0;
5985 ret
= usb_autopm_get_interface(tp
->intf
);
5989 if (test_bit(ETHTOOL_LINK_MODE_10baseT_Half_BIT
,
5990 cmd
->link_modes
.advertising
))
5991 advertising
|= RTL_ADVERTISED_10_HALF
;
5993 if (test_bit(ETHTOOL_LINK_MODE_10baseT_Full_BIT
,
5994 cmd
->link_modes
.advertising
))
5995 advertising
|= RTL_ADVERTISED_10_FULL
;
5997 if (test_bit(ETHTOOL_LINK_MODE_100baseT_Half_BIT
,
5998 cmd
->link_modes
.advertising
))
5999 advertising
|= RTL_ADVERTISED_100_HALF
;
6001 if (test_bit(ETHTOOL_LINK_MODE_100baseT_Full_BIT
,
6002 cmd
->link_modes
.advertising
))
6003 advertising
|= RTL_ADVERTISED_100_FULL
;
6005 if (test_bit(ETHTOOL_LINK_MODE_1000baseT_Half_BIT
,
6006 cmd
->link_modes
.advertising
))
6007 advertising
|= RTL_ADVERTISED_1000_HALF
;
6009 if (test_bit(ETHTOOL_LINK_MODE_1000baseT_Full_BIT
,
6010 cmd
->link_modes
.advertising
))
6011 advertising
|= RTL_ADVERTISED_1000_FULL
;
6013 mutex_lock(&tp
->control
);
6015 ret
= rtl8152_set_speed(tp
, cmd
->base
.autoneg
, cmd
->base
.speed
,
6016 cmd
->base
.duplex
, advertising
);
6018 tp
->autoneg
= cmd
->base
.autoneg
;
6019 tp
->speed
= cmd
->base
.speed
;
6020 tp
->duplex
= cmd
->base
.duplex
;
6021 tp
->advertising
= advertising
;
6024 mutex_unlock(&tp
->control
);
6026 usb_autopm_put_interface(tp
->intf
);
6032 static const char rtl8152_gstrings
[][ETH_GSTRING_LEN
] = {
6039 "tx_single_collisions",
6040 "tx_multi_collisions",
6048 static int rtl8152_get_sset_count(struct net_device
*dev
, int sset
)
6052 return ARRAY_SIZE(rtl8152_gstrings
);
6058 static void rtl8152_get_ethtool_stats(struct net_device
*dev
,
6059 struct ethtool_stats
*stats
, u64
*data
)
6061 struct r8152
*tp
= netdev_priv(dev
);
6062 struct tally_counter tally
;
6064 if (usb_autopm_get_interface(tp
->intf
) < 0)
6067 generic_ocp_read(tp
, PLA_TALLYCNT
, sizeof(tally
), &tally
, MCU_TYPE_PLA
);
6069 usb_autopm_put_interface(tp
->intf
);
6071 data
[0] = le64_to_cpu(tally
.tx_packets
);
6072 data
[1] = le64_to_cpu(tally
.rx_packets
);
6073 data
[2] = le64_to_cpu(tally
.tx_errors
);
6074 data
[3] = le32_to_cpu(tally
.rx_errors
);
6075 data
[4] = le16_to_cpu(tally
.rx_missed
);
6076 data
[5] = le16_to_cpu(tally
.align_errors
);
6077 data
[6] = le32_to_cpu(tally
.tx_one_collision
);
6078 data
[7] = le32_to_cpu(tally
.tx_multi_collision
);
6079 data
[8] = le64_to_cpu(tally
.rx_unicast
);
6080 data
[9] = le64_to_cpu(tally
.rx_broadcast
);
6081 data
[10] = le32_to_cpu(tally
.rx_multicast
);
6082 data
[11] = le16_to_cpu(tally
.tx_aborted
);
6083 data
[12] = le16_to_cpu(tally
.tx_underrun
);
6086 static void rtl8152_get_strings(struct net_device
*dev
, u32 stringset
, u8
*data
)
6088 switch (stringset
) {
6090 memcpy(data
, *rtl8152_gstrings
, sizeof(rtl8152_gstrings
));
6095 static int r8152_get_eee(struct r8152
*tp
, struct ethtool_eee
*eee
)
6097 u32 lp
, adv
, supported
= 0;
6100 val
= r8152_mmd_read(tp
, MDIO_MMD_PCS
, MDIO_PCS_EEE_ABLE
);
6101 supported
= mmd_eee_cap_to_ethtool_sup_t(val
);
6103 val
= r8152_mmd_read(tp
, MDIO_MMD_AN
, MDIO_AN_EEE_ADV
);
6104 adv
= mmd_eee_adv_to_ethtool_adv_t(val
);
6106 val
= r8152_mmd_read(tp
, MDIO_MMD_AN
, MDIO_AN_EEE_LPABLE
);
6107 lp
= mmd_eee_adv_to_ethtool_adv_t(val
);
6109 eee
->eee_enabled
= tp
->eee_en
;
6110 eee
->eee_active
= !!(supported
& adv
& lp
);
6111 eee
->supported
= supported
;
6112 eee
->advertised
= tp
->eee_adv
;
6113 eee
->lp_advertised
= lp
;
6118 static int r8152_set_eee(struct r8152
*tp
, struct ethtool_eee
*eee
)
6120 u16 val
= ethtool_adv_to_mmd_eee_adv_t(eee
->advertised
);
6122 tp
->eee_en
= eee
->eee_enabled
;
6125 rtl_eee_enable(tp
, tp
->eee_en
);
6130 static int r8153_get_eee(struct r8152
*tp
, struct ethtool_eee
*eee
)
6132 u32 lp
, adv
, supported
= 0;
6135 val
= ocp_reg_read(tp
, OCP_EEE_ABLE
);
6136 supported
= mmd_eee_cap_to_ethtool_sup_t(val
);
6138 val
= ocp_reg_read(tp
, OCP_EEE_ADV
);
6139 adv
= mmd_eee_adv_to_ethtool_adv_t(val
);
6141 val
= ocp_reg_read(tp
, OCP_EEE_LPABLE
);
6142 lp
= mmd_eee_adv_to_ethtool_adv_t(val
);
6144 eee
->eee_enabled
= tp
->eee_en
;
6145 eee
->eee_active
= !!(supported
& adv
& lp
);
6146 eee
->supported
= supported
;
6147 eee
->advertised
= tp
->eee_adv
;
6148 eee
->lp_advertised
= lp
;
6154 rtl_ethtool_get_eee(struct net_device
*net
, struct ethtool_eee
*edata
)
6156 struct r8152
*tp
= netdev_priv(net
);
6159 ret
= usb_autopm_get_interface(tp
->intf
);
6163 mutex_lock(&tp
->control
);
6165 ret
= tp
->rtl_ops
.eee_get(tp
, edata
);
6167 mutex_unlock(&tp
->control
);
6169 usb_autopm_put_interface(tp
->intf
);
6176 rtl_ethtool_set_eee(struct net_device
*net
, struct ethtool_eee
*edata
)
6178 struct r8152
*tp
= netdev_priv(net
);
6181 ret
= usb_autopm_get_interface(tp
->intf
);
6185 mutex_lock(&tp
->control
);
6187 ret
= tp
->rtl_ops
.eee_set(tp
, edata
);
6189 ret
= mii_nway_restart(&tp
->mii
);
6191 mutex_unlock(&tp
->control
);
6193 usb_autopm_put_interface(tp
->intf
);
6199 static int rtl8152_nway_reset(struct net_device
*dev
)
6201 struct r8152
*tp
= netdev_priv(dev
);
6204 ret
= usb_autopm_get_interface(tp
->intf
);
6208 mutex_lock(&tp
->control
);
6210 ret
= mii_nway_restart(&tp
->mii
);
6212 mutex_unlock(&tp
->control
);
6214 usb_autopm_put_interface(tp
->intf
);
6220 static int rtl8152_get_coalesce(struct net_device
*netdev
,
6221 struct ethtool_coalesce
*coalesce
)
6223 struct r8152
*tp
= netdev_priv(netdev
);
6225 switch (tp
->version
) {
6234 coalesce
->rx_coalesce_usecs
= tp
->coalesce
;
6239 static int rtl8152_set_coalesce(struct net_device
*netdev
,
6240 struct ethtool_coalesce
*coalesce
)
6242 struct r8152
*tp
= netdev_priv(netdev
);
6245 switch (tp
->version
) {
6254 if (coalesce
->rx_coalesce_usecs
> COALESCE_SLOW
)
6257 ret
= usb_autopm_get_interface(tp
->intf
);
6261 mutex_lock(&tp
->control
);
6263 if (tp
->coalesce
!= coalesce
->rx_coalesce_usecs
) {
6264 tp
->coalesce
= coalesce
->rx_coalesce_usecs
;
6266 if (netif_running(netdev
) && netif_carrier_ok(netdev
)) {
6267 netif_stop_queue(netdev
);
6268 napi_disable(&tp
->napi
);
6269 tp
->rtl_ops
.disable(tp
);
6270 tp
->rtl_ops
.enable(tp
);
6272 clear_bit(RTL8152_SET_RX_MODE
, &tp
->flags
);
6273 _rtl8152_set_rx_mode(netdev
);
6274 napi_enable(&tp
->napi
);
6275 netif_wake_queue(netdev
);
6279 mutex_unlock(&tp
->control
);
6281 usb_autopm_put_interface(tp
->intf
);
6286 static int rtl8152_get_tunable(struct net_device
*netdev
,
6287 const struct ethtool_tunable
*tunable
, void *d
)
6289 struct r8152
*tp
= netdev_priv(netdev
);
6291 switch (tunable
->id
) {
6292 case ETHTOOL_RX_COPYBREAK
:
6293 *(u32
*)d
= tp
->rx_copybreak
;
6302 static int rtl8152_set_tunable(struct net_device
*netdev
,
6303 const struct ethtool_tunable
*tunable
,
6306 struct r8152
*tp
= netdev_priv(netdev
);
6309 switch (tunable
->id
) {
6310 case ETHTOOL_RX_COPYBREAK
:
6312 if (val
< ETH_ZLEN
) {
6313 netif_err(tp
, rx_err
, netdev
,
6314 "Invalid rx copy break value\n");
6318 if (tp
->rx_copybreak
!= val
) {
6319 if (netdev
->flags
& IFF_UP
) {
6320 mutex_lock(&tp
->control
);
6321 napi_disable(&tp
->napi
);
6322 tp
->rx_copybreak
= val
;
6323 napi_enable(&tp
->napi
);
6324 mutex_unlock(&tp
->control
);
6326 tp
->rx_copybreak
= val
;
6337 static void rtl8152_get_ringparam(struct net_device
*netdev
,
6338 struct ethtool_ringparam
*ring
)
6340 struct r8152
*tp
= netdev_priv(netdev
);
6342 ring
->rx_max_pending
= RTL8152_RX_MAX_PENDING
;
6343 ring
->rx_pending
= tp
->rx_pending
;
6346 static int rtl8152_set_ringparam(struct net_device
*netdev
,
6347 struct ethtool_ringparam
*ring
)
6349 struct r8152
*tp
= netdev_priv(netdev
);
6351 if (ring
->rx_pending
< (RTL8152_MAX_RX
* 2))
6354 if (tp
->rx_pending
!= ring
->rx_pending
) {
6355 if (netdev
->flags
& IFF_UP
) {
6356 mutex_lock(&tp
->control
);
6357 napi_disable(&tp
->napi
);
6358 tp
->rx_pending
= ring
->rx_pending
;
6359 napi_enable(&tp
->napi
);
6360 mutex_unlock(&tp
->control
);
6362 tp
->rx_pending
= ring
->rx_pending
;
6369 static const struct ethtool_ops ops
= {
6370 .get_drvinfo
= rtl8152_get_drvinfo
,
6371 .get_link
= ethtool_op_get_link
,
6372 .nway_reset
= rtl8152_nway_reset
,
6373 .get_msglevel
= rtl8152_get_msglevel
,
6374 .set_msglevel
= rtl8152_set_msglevel
,
6375 .get_wol
= rtl8152_get_wol
,
6376 .set_wol
= rtl8152_set_wol
,
6377 .get_strings
= rtl8152_get_strings
,
6378 .get_sset_count
= rtl8152_get_sset_count
,
6379 .get_ethtool_stats
= rtl8152_get_ethtool_stats
,
6380 .get_coalesce
= rtl8152_get_coalesce
,
6381 .set_coalesce
= rtl8152_set_coalesce
,
6382 .get_eee
= rtl_ethtool_get_eee
,
6383 .set_eee
= rtl_ethtool_set_eee
,
6384 .get_link_ksettings
= rtl8152_get_link_ksettings
,
6385 .set_link_ksettings
= rtl8152_set_link_ksettings
,
6386 .get_tunable
= rtl8152_get_tunable
,
6387 .set_tunable
= rtl8152_set_tunable
,
6388 .get_ringparam
= rtl8152_get_ringparam
,
6389 .set_ringparam
= rtl8152_set_ringparam
,
6392 static int rtl8152_ioctl(struct net_device
*netdev
, struct ifreq
*rq
, int cmd
)
6394 struct r8152
*tp
= netdev_priv(netdev
);
6395 struct mii_ioctl_data
*data
= if_mii(rq
);
6398 if (test_bit(RTL8152_UNPLUG
, &tp
->flags
))
6401 res
= usb_autopm_get_interface(tp
->intf
);
6407 data
->phy_id
= R8152_PHY_ID
; /* Internal PHY */
6411 mutex_lock(&tp
->control
);
6412 data
->val_out
= r8152_mdio_read(tp
, data
->reg_num
);
6413 mutex_unlock(&tp
->control
);
6417 if (!capable(CAP_NET_ADMIN
)) {
6421 mutex_lock(&tp
->control
);
6422 r8152_mdio_write(tp
, data
->reg_num
, data
->val_in
);
6423 mutex_unlock(&tp
->control
);
6430 usb_autopm_put_interface(tp
->intf
);
6436 static int rtl8152_change_mtu(struct net_device
*dev
, int new_mtu
)
6438 struct r8152
*tp
= netdev_priv(dev
);
6441 switch (tp
->version
) {
6451 ret
= usb_autopm_get_interface(tp
->intf
);
6455 mutex_lock(&tp
->control
);
6459 if (netif_running(dev
)) {
6460 u32 rms
= new_mtu
+ VLAN_ETH_HLEN
+ ETH_FCS_LEN
;
6462 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_RMS
, rms
);
6464 if (netif_carrier_ok(dev
))
6465 r8153_set_rx_early_size(tp
);
6468 mutex_unlock(&tp
->control
);
6470 usb_autopm_put_interface(tp
->intf
);
6475 static const struct net_device_ops rtl8152_netdev_ops
= {
6476 .ndo_open
= rtl8152_open
,
6477 .ndo_stop
= rtl8152_close
,
6478 .ndo_do_ioctl
= rtl8152_ioctl
,
6479 .ndo_start_xmit
= rtl8152_start_xmit
,
6480 .ndo_tx_timeout
= rtl8152_tx_timeout
,
6481 .ndo_set_features
= rtl8152_set_features
,
6482 .ndo_set_rx_mode
= rtl8152_set_rx_mode
,
6483 .ndo_set_mac_address
= rtl8152_set_mac_address
,
6484 .ndo_change_mtu
= rtl8152_change_mtu
,
6485 .ndo_validate_addr
= eth_validate_addr
,
6486 .ndo_features_check
= rtl8152_features_check
,
6489 static void rtl8152_unload(struct r8152
*tp
)
6491 if (test_bit(RTL8152_UNPLUG
, &tp
->flags
))
6494 if (tp
->version
!= RTL_VER_01
)
6495 r8152_power_cut_en(tp
, true);
6498 static void rtl8153_unload(struct r8152
*tp
)
6500 if (test_bit(RTL8152_UNPLUG
, &tp
->flags
))
6503 r8153_power_cut_en(tp
, false);
6506 static void rtl8153b_unload(struct r8152
*tp
)
6508 if (test_bit(RTL8152_UNPLUG
, &tp
->flags
))
6511 r8153b_power_cut_en(tp
, false);
6514 static int rtl_ops_init(struct r8152
*tp
)
6516 struct rtl_ops
*ops
= &tp
->rtl_ops
;
6519 switch (tp
->version
) {
6523 ops
->init
= r8152b_init
;
6524 ops
->enable
= rtl8152_enable
;
6525 ops
->disable
= rtl8152_disable
;
6526 ops
->up
= rtl8152_up
;
6527 ops
->down
= rtl8152_down
;
6528 ops
->unload
= rtl8152_unload
;
6529 ops
->eee_get
= r8152_get_eee
;
6530 ops
->eee_set
= r8152_set_eee
;
6531 ops
->in_nway
= rtl8152_in_nway
;
6532 ops
->hw_phy_cfg
= r8152b_hw_phy_cfg
;
6533 ops
->autosuspend_en
= rtl_runtime_suspend_enable
;
6534 tp
->rx_buf_sz
= 16 * 1024;
6536 tp
->eee_adv
= MDIO_EEE_100TX
;
6543 ops
->init
= r8153_init
;
6544 ops
->enable
= rtl8153_enable
;
6545 ops
->disable
= rtl8153_disable
;
6546 ops
->up
= rtl8153_up
;
6547 ops
->down
= rtl8153_down
;
6548 ops
->unload
= rtl8153_unload
;
6549 ops
->eee_get
= r8153_get_eee
;
6550 ops
->eee_set
= r8152_set_eee
;
6551 ops
->in_nway
= rtl8153_in_nway
;
6552 ops
->hw_phy_cfg
= r8153_hw_phy_cfg
;
6553 ops
->autosuspend_en
= rtl8153_runtime_enable
;
6554 tp
->rx_buf_sz
= 32 * 1024;
6556 tp
->eee_adv
= MDIO_EEE_1000T
| MDIO_EEE_100TX
;
6561 ops
->init
= r8153b_init
;
6562 ops
->enable
= rtl8153_enable
;
6563 ops
->disable
= rtl8153_disable
;
6564 ops
->up
= rtl8153b_up
;
6565 ops
->down
= rtl8153b_down
;
6566 ops
->unload
= rtl8153b_unload
;
6567 ops
->eee_get
= r8153_get_eee
;
6568 ops
->eee_set
= r8152_set_eee
;
6569 ops
->in_nway
= rtl8153_in_nway
;
6570 ops
->hw_phy_cfg
= r8153b_hw_phy_cfg
;
6571 ops
->autosuspend_en
= rtl8153b_runtime_enable
;
6572 tp
->rx_buf_sz
= 32 * 1024;
6574 tp
->eee_adv
= MDIO_EEE_1000T
| MDIO_EEE_100TX
;
6579 netif_err(tp
, probe
, tp
->netdev
, "Unknown Device\n");
6586 #define FIRMWARE_8153A_2 "rtl_nic/rtl8153a-2.fw"
6587 #define FIRMWARE_8153A_3 "rtl_nic/rtl8153a-3.fw"
6588 #define FIRMWARE_8153A_4 "rtl_nic/rtl8153a-4.fw"
6589 #define FIRMWARE_8153B_2 "rtl_nic/rtl8153b-2.fw"
6591 MODULE_FIRMWARE(FIRMWARE_8153A_2
);
6592 MODULE_FIRMWARE(FIRMWARE_8153A_3
);
6593 MODULE_FIRMWARE(FIRMWARE_8153A_4
);
6594 MODULE_FIRMWARE(FIRMWARE_8153B_2
);
6596 static int rtl_fw_init(struct r8152
*tp
)
6598 struct rtl_fw
*rtl_fw
= &tp
->rtl_fw
;
6600 switch (tp
->version
) {
6602 rtl_fw
->fw_name
= FIRMWARE_8153A_2
;
6603 rtl_fw
->pre_fw
= r8153_pre_firmware_1
;
6604 rtl_fw
->post_fw
= r8153_post_firmware_1
;
6607 rtl_fw
->fw_name
= FIRMWARE_8153A_3
;
6608 rtl_fw
->pre_fw
= r8153_pre_firmware_2
;
6609 rtl_fw
->post_fw
= r8153_post_firmware_2
;
6612 rtl_fw
->fw_name
= FIRMWARE_8153A_4
;
6613 rtl_fw
->post_fw
= r8153_post_firmware_3
;
6616 rtl_fw
->fw_name
= FIRMWARE_8153B_2
;
6617 rtl_fw
->pre_fw
= r8153b_pre_firmware_1
;
6618 rtl_fw
->post_fw
= r8153b_post_firmware_1
;
6627 static u8
rtl_get_version(struct usb_interface
*intf
)
6629 struct usb_device
*udev
= interface_to_usbdev(intf
);
6635 tmp
= kmalloc(sizeof(*tmp
), GFP_KERNEL
);
6639 ret
= usb_control_msg(udev
, usb_rcvctrlpipe(udev
, 0),
6640 RTL8152_REQ_GET_REGS
, RTL8152_REQT_READ
,
6641 PLA_TCR0
, MCU_TYPE_PLA
, tmp
, sizeof(*tmp
), 500);
6643 ocp_data
= (__le32_to_cpu(*tmp
) >> 16) & VERSION_MASK
;
6649 version
= RTL_VER_01
;
6652 version
= RTL_VER_02
;
6655 version
= RTL_VER_03
;
6658 version
= RTL_VER_04
;
6661 version
= RTL_VER_05
;
6664 version
= RTL_VER_06
;
6667 version
= RTL_VER_07
;
6670 version
= RTL_VER_08
;
6673 version
= RTL_VER_09
;
6676 version
= RTL_VER_UNKNOWN
;
6677 dev_info(&intf
->dev
, "Unknown version 0x%04x\n", ocp_data
);
6681 dev_dbg(&intf
->dev
, "Detected version 0x%04x\n", version
);
6686 static int rtl8152_probe(struct usb_interface
*intf
,
6687 const struct usb_device_id
*id
)
6689 struct usb_device
*udev
= interface_to_usbdev(intf
);
6690 u8 version
= rtl_get_version(intf
);
6692 struct net_device
*netdev
;
6695 if (version
== RTL_VER_UNKNOWN
)
6698 if (udev
->actconfig
->desc
.bConfigurationValue
!= 1) {
6699 usb_driver_set_configuration(udev
, 1);
6703 if (intf
->cur_altsetting
->desc
.bNumEndpoints
< 3)
6706 usb_reset_device(udev
);
6707 netdev
= alloc_etherdev(sizeof(struct r8152
));
6709 dev_err(&intf
->dev
, "Out of memory\n");
6713 SET_NETDEV_DEV(netdev
, &intf
->dev
);
6714 tp
= netdev_priv(netdev
);
6715 tp
->msg_enable
= 0x7FFF;
6718 tp
->netdev
= netdev
;
6720 tp
->version
= version
;
6726 tp
->mii
.supports_gmii
= 0;
6729 tp
->mii
.supports_gmii
= 1;
6733 ret
= rtl_ops_init(tp
);
6739 mutex_init(&tp
->control
);
6740 INIT_DELAYED_WORK(&tp
->schedule
, rtl_work_func_t
);
6741 INIT_DELAYED_WORK(&tp
->hw_phy_work
, rtl_hw_phy_work_func_t
);
6742 tasklet_init(&tp
->tx_tl
, bottom_half
, (unsigned long)tp
);
6743 tasklet_disable(&tp
->tx_tl
);
6745 netdev
->netdev_ops
= &rtl8152_netdev_ops
;
6746 netdev
->watchdog_timeo
= RTL8152_TX_TIMEOUT
;
6748 netdev
->features
|= NETIF_F_RXCSUM
| NETIF_F_IP_CSUM
| NETIF_F_SG
|
6749 NETIF_F_TSO
| NETIF_F_FRAGLIST
| NETIF_F_IPV6_CSUM
|
6750 NETIF_F_TSO6
| NETIF_F_HW_VLAN_CTAG_RX
|
6751 NETIF_F_HW_VLAN_CTAG_TX
;
6752 netdev
->hw_features
= NETIF_F_RXCSUM
| NETIF_F_IP_CSUM
| NETIF_F_SG
|
6753 NETIF_F_TSO
| NETIF_F_FRAGLIST
|
6754 NETIF_F_IPV6_CSUM
| NETIF_F_TSO6
|
6755 NETIF_F_HW_VLAN_CTAG_RX
| NETIF_F_HW_VLAN_CTAG_TX
;
6756 netdev
->vlan_features
= NETIF_F_SG
| NETIF_F_IP_CSUM
| NETIF_F_TSO
|
6757 NETIF_F_HIGHDMA
| NETIF_F_FRAGLIST
|
6758 NETIF_F_IPV6_CSUM
| NETIF_F_TSO6
;
6760 if (tp
->version
== RTL_VER_01
) {
6761 netdev
->features
&= ~NETIF_F_RXCSUM
;
6762 netdev
->hw_features
&= ~NETIF_F_RXCSUM
;
6765 if (le16_to_cpu(udev
->descriptor
.idVendor
) == VENDOR_ID_LENOVO
) {
6766 switch (le16_to_cpu(udev
->descriptor
.idProduct
)) {
6767 case DEVICE_ID_THINKPAD_THUNDERBOLT3_DOCK_GEN2
:
6768 case DEVICE_ID_THINKPAD_USB_C_DOCK_GEN2
:
6769 set_bit(LENOVO_MACPASSTHRU
, &tp
->flags
);
6773 if (le16_to_cpu(udev
->descriptor
.bcdDevice
) == 0x3011 && udev
->serial
&&
6774 (!strcmp(udev
->serial
, "000001000000") ||
6775 !strcmp(udev
->serial
, "000002000000"))) {
6776 dev_info(&udev
->dev
, "Dell TB16 Dock, disable RX aggregation");
6777 set_bit(DELL_TB_RX_AGG_BUG
, &tp
->flags
);
6780 netdev
->ethtool_ops
= &ops
;
6781 netif_set_gso_max_size(netdev
, RTL_LIMITED_TSO_SIZE
);
6783 /* MTU range: 68 - 1500 or 9194 */
6784 netdev
->min_mtu
= ETH_MIN_MTU
;
6785 switch (tp
->version
) {
6788 netdev
->max_mtu
= ETH_DATA_LEN
;
6791 netdev
->max_mtu
= RTL8153_MAX_MTU
;
6795 tp
->mii
.dev
= netdev
;
6796 tp
->mii
.mdio_read
= read_mii_word
;
6797 tp
->mii
.mdio_write
= write_mii_word
;
6798 tp
->mii
.phy_id_mask
= 0x3f;
6799 tp
->mii
.reg_num_mask
= 0x1f;
6800 tp
->mii
.phy_id
= R8152_PHY_ID
;
6802 tp
->autoneg
= AUTONEG_ENABLE
;
6803 tp
->speed
= SPEED_100
;
6804 tp
->advertising
= RTL_ADVERTISED_10_HALF
| RTL_ADVERTISED_10_FULL
|
6805 RTL_ADVERTISED_100_HALF
| RTL_ADVERTISED_100_FULL
;
6806 if (tp
->mii
.supports_gmii
) {
6807 tp
->speed
= SPEED_1000
;
6808 tp
->advertising
|= RTL_ADVERTISED_1000_FULL
;
6810 tp
->duplex
= DUPLEX_FULL
;
6812 tp
->rx_copybreak
= RTL8152_RXFG_HEADSZ
;
6813 tp
->rx_pending
= 10 * RTL8152_MAX_RX
;
6815 intf
->needs_remote_wakeup
= 1;
6817 if (!rtl_can_wakeup(tp
))
6818 __rtl_set_wol(tp
, 0);
6820 tp
->saved_wolopts
= __rtl_get_wol(tp
);
6822 tp
->rtl_ops
.init(tp
);
6823 #if IS_BUILTIN(CONFIG_USB_RTL8152)
6824 /* Retry in case request_firmware() is not ready yet. */
6825 tp
->rtl_fw
.retry
= true;
6827 queue_delayed_work(system_long_wq
, &tp
->hw_phy_work
, 0);
6828 set_ethernet_addr(tp
);
6830 usb_set_intfdata(intf
, tp
);
6831 netif_napi_add(netdev
, &tp
->napi
, r8152_poll
, RTL8152_NAPI_WEIGHT
);
6833 ret
= register_netdev(netdev
);
6835 netif_err(tp
, probe
, netdev
, "couldn't register the device\n");
6839 if (tp
->saved_wolopts
)
6840 device_set_wakeup_enable(&udev
->dev
, true);
6842 device_set_wakeup_enable(&udev
->dev
, false);
6844 netif_info(tp
, probe
, netdev
, "%s\n", DRIVER_VERSION
);
6849 tasklet_kill(&tp
->tx_tl
);
6850 usb_set_intfdata(intf
, NULL
);
6852 free_netdev(netdev
);
6856 static void rtl8152_disconnect(struct usb_interface
*intf
)
6858 struct r8152
*tp
= usb_get_intfdata(intf
);
6860 usb_set_intfdata(intf
, NULL
);
6864 unregister_netdev(tp
->netdev
);
6865 tasklet_kill(&tp
->tx_tl
);
6866 cancel_delayed_work_sync(&tp
->hw_phy_work
);
6867 tp
->rtl_ops
.unload(tp
);
6868 rtl8152_release_firmware(tp
);
6869 free_netdev(tp
->netdev
);
6873 #define REALTEK_USB_DEVICE(vend, prod) \
6874 .match_flags = USB_DEVICE_ID_MATCH_DEVICE | \
6875 USB_DEVICE_ID_MATCH_INT_CLASS, \
6876 .idVendor = (vend), \
6877 .idProduct = (prod), \
6878 .bInterfaceClass = USB_CLASS_VENDOR_SPEC \
6881 .match_flags = USB_DEVICE_ID_MATCH_INT_INFO | \
6882 USB_DEVICE_ID_MATCH_DEVICE, \
6883 .idVendor = (vend), \
6884 .idProduct = (prod), \
6885 .bInterfaceClass = USB_CLASS_COMM, \
6886 .bInterfaceSubClass = USB_CDC_SUBCLASS_ETHERNET, \
6887 .bInterfaceProtocol = USB_CDC_PROTO_NONE
6889 /* table of devices that work with this driver */
6890 static const struct usb_device_id rtl8152_table
[] = {
6891 {REALTEK_USB_DEVICE(VENDOR_ID_REALTEK
, 0x8050)},
6892 {REALTEK_USB_DEVICE(VENDOR_ID_REALTEK
, 0x8152)},
6893 {REALTEK_USB_DEVICE(VENDOR_ID_REALTEK
, 0x8153)},
6894 {REALTEK_USB_DEVICE(VENDOR_ID_MICROSOFT
, 0x07ab)},
6895 {REALTEK_USB_DEVICE(VENDOR_ID_MICROSOFT
, 0x07c6)},
6896 {REALTEK_USB_DEVICE(VENDOR_ID_SAMSUNG
, 0xa101)},
6897 {REALTEK_USB_DEVICE(VENDOR_ID_LENOVO
, 0x304f)},
6898 {REALTEK_USB_DEVICE(VENDOR_ID_LENOVO
, 0x3062)},
6899 {REALTEK_USB_DEVICE(VENDOR_ID_LENOVO
, 0x3069)},
6900 {REALTEK_USB_DEVICE(VENDOR_ID_LENOVO
, 0x3082)},
6901 {REALTEK_USB_DEVICE(VENDOR_ID_LENOVO
, 0x7205)},
6902 {REALTEK_USB_DEVICE(VENDOR_ID_LENOVO
, 0x720c)},
6903 {REALTEK_USB_DEVICE(VENDOR_ID_LENOVO
, 0x7214)},
6904 {REALTEK_USB_DEVICE(VENDOR_ID_LENOVO
, 0xa387)},
6905 {REALTEK_USB_DEVICE(VENDOR_ID_LINKSYS
, 0x0041)},
6906 {REALTEK_USB_DEVICE(VENDOR_ID_NVIDIA
, 0x09ff)},
6907 {REALTEK_USB_DEVICE(VENDOR_ID_TPLINK
, 0x0601)},
6911 MODULE_DEVICE_TABLE(usb
, rtl8152_table
);
6913 static struct usb_driver rtl8152_driver
= {
6915 .id_table
= rtl8152_table
,
6916 .probe
= rtl8152_probe
,
6917 .disconnect
= rtl8152_disconnect
,
6918 .suspend
= rtl8152_suspend
,
6919 .resume
= rtl8152_resume
,
6920 .reset_resume
= rtl8152_reset_resume
,
6921 .pre_reset
= rtl8152_pre_reset
,
6922 .post_reset
= rtl8152_post_reset
,
6923 .supports_autosuspend
= 1,
6924 .disable_hub_initiated_lpm
= 1,
6927 module_usb_driver(rtl8152_driver
);
6929 MODULE_AUTHOR(DRIVER_AUTHOR
);
6930 MODULE_DESCRIPTION(DRIVER_DESC
);
6931 MODULE_LICENSE("GPL");
6932 MODULE_VERSION(DRIVER_VERSION
);