2 * Copyright (c) 2014 Realtek Semiconductor Corp. All rights reserved.
4 * This program is free software; you can redistribute it and/or
5 * modify it under the terms of the GNU General Public License
6 * version 2 as published by the Free Software Foundation.
10 #include <linux/signal.h>
11 #include <linux/slab.h>
12 #include <linux/module.h>
13 #include <linux/netdevice.h>
14 #include <linux/etherdevice.h>
15 #include <linux/mii.h>
16 #include <linux/ethtool.h>
17 #include <linux/usb.h>
18 #include <linux/crc32.h>
19 #include <linux/if_vlan.h>
20 #include <linux/uaccess.h>
21 #include <linux/list.h>
23 #include <linux/ipv6.h>
24 #include <net/ip6_checksum.h>
25 #include <uapi/linux/mdio.h>
26 #include <linux/mdio.h>
27 #include <linux/usb/cdc.h>
28 #include <linux/suspend.h>
29 #include <linux/acpi.h>
31 /* Information for net-next */
32 #define NETNEXT_VERSION "09"
34 /* Information for net */
35 #define NET_VERSION "9"
37 #define DRIVER_VERSION "v1." NETNEXT_VERSION "." NET_VERSION
38 #define DRIVER_AUTHOR "Realtek linux nic maintainers <nic_swsd@realtek.com>"
39 #define DRIVER_DESC "Realtek RTL8152/RTL8153 Based USB Ethernet Adapters"
40 #define MODULENAME "r8152"
42 #define R8152_PHY_ID 32
44 #define PLA_IDR 0xc000
45 #define PLA_RCR 0xc010
46 #define PLA_RMS 0xc016
47 #define PLA_RXFIFO_CTRL0 0xc0a0
48 #define PLA_RXFIFO_CTRL1 0xc0a4
49 #define PLA_RXFIFO_CTRL2 0xc0a8
50 #define PLA_DMY_REG0 0xc0b0
51 #define PLA_FMC 0xc0b4
52 #define PLA_CFG_WOL 0xc0b6
53 #define PLA_TEREDO_CFG 0xc0bc
54 #define PLA_TEREDO_WAKE_BASE 0xc0c4
55 #define PLA_MAR 0xcd00
56 #define PLA_BACKUP 0xd000
57 #define PAL_BDC_CR 0xd1a0
58 #define PLA_TEREDO_TIMER 0xd2cc
59 #define PLA_REALWOW_TIMER 0xd2e8
60 #define PLA_EFUSE_DATA 0xdd00
61 #define PLA_EFUSE_CMD 0xdd02
62 #define PLA_LEDSEL 0xdd90
63 #define PLA_LED_FEATURE 0xdd92
64 #define PLA_PHYAR 0xde00
65 #define PLA_BOOT_CTRL 0xe004
66 #define PLA_GPHY_INTR_IMR 0xe022
67 #define PLA_EEE_CR 0xe040
68 #define PLA_EEEP_CR 0xe080
69 #define PLA_MAC_PWR_CTRL 0xe0c0
70 #define PLA_MAC_PWR_CTRL2 0xe0ca
71 #define PLA_MAC_PWR_CTRL3 0xe0cc
72 #define PLA_MAC_PWR_CTRL4 0xe0ce
73 #define PLA_WDT6_CTRL 0xe428
74 #define PLA_TCR0 0xe610
75 #define PLA_TCR1 0xe612
76 #define PLA_MTPS 0xe615
77 #define PLA_TXFIFO_CTRL 0xe618
78 #define PLA_RSTTALLY 0xe800
80 #define PLA_CRWECR 0xe81c
81 #define PLA_CONFIG12 0xe81e /* CONFIG1, CONFIG2 */
82 #define PLA_CONFIG34 0xe820 /* CONFIG3, CONFIG4 */
83 #define PLA_CONFIG5 0xe822
84 #define PLA_PHY_PWR 0xe84c
85 #define PLA_OOB_CTRL 0xe84f
86 #define PLA_CPCR 0xe854
87 #define PLA_MISC_0 0xe858
88 #define PLA_MISC_1 0xe85a
89 #define PLA_OCP_GPHY_BASE 0xe86c
90 #define PLA_TALLYCNT 0xe890
91 #define PLA_SFF_STS_7 0xe8de
92 #define PLA_PHYSTATUS 0xe908
93 #define PLA_BP_BA 0xfc26
94 #define PLA_BP_0 0xfc28
95 #define PLA_BP_1 0xfc2a
96 #define PLA_BP_2 0xfc2c
97 #define PLA_BP_3 0xfc2e
98 #define PLA_BP_4 0xfc30
99 #define PLA_BP_5 0xfc32
100 #define PLA_BP_6 0xfc34
101 #define PLA_BP_7 0xfc36
102 #define PLA_BP_EN 0xfc38
104 #define USB_USB2PHY 0xb41e
105 #define USB_SSPHYLINK2 0xb428
106 #define USB_U2P3_CTRL 0xb460
107 #define USB_CSR_DUMMY1 0xb464
108 #define USB_CSR_DUMMY2 0xb466
109 #define USB_DEV_STAT 0xb808
110 #define USB_CONNECT_TIMER 0xcbf8
111 #define USB_MSC_TIMER 0xcbfc
112 #define USB_BURST_SIZE 0xcfc0
113 #define USB_LPM_CONFIG 0xcfd8
114 #define USB_USB_CTRL 0xd406
115 #define USB_PHY_CTRL 0xd408
116 #define USB_TX_AGG 0xd40a
117 #define USB_RX_BUF_TH 0xd40c
118 #define USB_USB_TIMER 0xd428
119 #define USB_RX_EARLY_TIMEOUT 0xd42c
120 #define USB_RX_EARLY_SIZE 0xd42e
121 #define USB_PM_CTRL_STATUS 0xd432 /* RTL8153A */
122 #define USB_RX_EXTRA_AGGR_TMR 0xd432 /* RTL8153B */
123 #define USB_TX_DMA 0xd434
124 #define USB_UPT_RXDMA_OWN 0xd437
125 #define USB_TOLERANCE 0xd490
126 #define USB_LPM_CTRL 0xd41a
127 #define USB_BMU_RESET 0xd4b0
128 #define USB_U1U2_TIMER 0xd4da
129 #define USB_UPS_CTRL 0xd800
130 #define USB_POWER_CUT 0xd80a
131 #define USB_MISC_0 0xd81a
132 #define USB_AFE_CTRL2 0xd824
133 #define USB_UPS_CFG 0xd842
134 #define USB_UPS_FLAGS 0xd848
135 #define USB_WDT11_CTRL 0xe43c
136 #define USB_BP_BA 0xfc26
137 #define USB_BP_0 0xfc28
138 #define USB_BP_1 0xfc2a
139 #define USB_BP_2 0xfc2c
140 #define USB_BP_3 0xfc2e
141 #define USB_BP_4 0xfc30
142 #define USB_BP_5 0xfc32
143 #define USB_BP_6 0xfc34
144 #define USB_BP_7 0xfc36
145 #define USB_BP_EN 0xfc38
146 #define USB_BP_8 0xfc38
147 #define USB_BP_9 0xfc3a
148 #define USB_BP_10 0xfc3c
149 #define USB_BP_11 0xfc3e
150 #define USB_BP_12 0xfc40
151 #define USB_BP_13 0xfc42
152 #define USB_BP_14 0xfc44
153 #define USB_BP_15 0xfc46
154 #define USB_BP2_EN 0xfc48
157 #define OCP_ALDPS_CONFIG 0x2010
158 #define OCP_EEE_CONFIG1 0x2080
159 #define OCP_EEE_CONFIG2 0x2092
160 #define OCP_EEE_CONFIG3 0x2094
161 #define OCP_BASE_MII 0xa400
162 #define OCP_EEE_AR 0xa41a
163 #define OCP_EEE_DATA 0xa41c
164 #define OCP_PHY_STATUS 0xa420
165 #define OCP_NCTL_CFG 0xa42c
166 #define OCP_POWER_CFG 0xa430
167 #define OCP_EEE_CFG 0xa432
168 #define OCP_SRAM_ADDR 0xa436
169 #define OCP_SRAM_DATA 0xa438
170 #define OCP_DOWN_SPEED 0xa442
171 #define OCP_EEE_ABLE 0xa5c4
172 #define OCP_EEE_ADV 0xa5d0
173 #define OCP_EEE_LPABLE 0xa5d2
174 #define OCP_PHY_STATE 0xa708 /* nway state for 8153 */
175 #define OCP_PHY_PATCH_STAT 0xb800
176 #define OCP_PHY_PATCH_CMD 0xb820
177 #define OCP_ADC_IOFFSET 0xbcfc
178 #define OCP_ADC_CFG 0xbc06
179 #define OCP_SYSCLK_CFG 0xc416
182 #define SRAM_GREEN_CFG 0x8011
183 #define SRAM_LPF_CFG 0x8012
184 #define SRAM_10M_AMP1 0x8080
185 #define SRAM_10M_AMP2 0x8082
186 #define SRAM_IMPEDANCE 0x8084
189 #define RCR_AAP 0x00000001
190 #define RCR_APM 0x00000002
191 #define RCR_AM 0x00000004
192 #define RCR_AB 0x00000008
193 #define RCR_ACPT_ALL (RCR_AAP | RCR_APM | RCR_AM | RCR_AB)
195 /* PLA_RXFIFO_CTRL0 */
196 #define RXFIFO_THR1_NORMAL 0x00080002
197 #define RXFIFO_THR1_OOB 0x01800003
199 /* PLA_RXFIFO_CTRL1 */
200 #define RXFIFO_THR2_FULL 0x00000060
201 #define RXFIFO_THR2_HIGH 0x00000038
202 #define RXFIFO_THR2_OOB 0x0000004a
203 #define RXFIFO_THR2_NORMAL 0x00a0
205 /* PLA_RXFIFO_CTRL2 */
206 #define RXFIFO_THR3_FULL 0x00000078
207 #define RXFIFO_THR3_HIGH 0x00000048
208 #define RXFIFO_THR3_OOB 0x0000005a
209 #define RXFIFO_THR3_NORMAL 0x0110
211 /* PLA_TXFIFO_CTRL */
212 #define TXFIFO_THR_NORMAL 0x00400008
213 #define TXFIFO_THR_NORMAL2 0x01000008
216 #define ECM_ALDPS 0x0002
219 #define FMC_FCR_MCU_EN 0x0001
222 #define EEEP_CR_EEEP_TX 0x0002
225 #define WDT6_SET_MODE 0x0010
228 #define TCR0_TX_EMPTY 0x0800
229 #define TCR0_AUTO_FIFO 0x0080
232 #define VERSION_MASK 0x7cf0
235 #define MTPS_JUMBO (12 * 1024 / 64)
236 #define MTPS_DEFAULT (6 * 1024 / 64)
239 #define TALLY_RESET 0x0001
247 #define CRWECR_NORAML 0x00
248 #define CRWECR_CONFIG 0xc0
251 #define NOW_IS_OOB 0x80
252 #define TXFIFO_EMPTY 0x20
253 #define RXFIFO_EMPTY 0x10
254 #define LINK_LIST_READY 0x02
255 #define DIS_MCU_CLROOB 0x01
256 #define FIFO_EMPTY (TXFIFO_EMPTY | RXFIFO_EMPTY)
259 #define RXDY_GATED_EN 0x0008
262 #define RE_INIT_LL 0x8000
263 #define MCU_BORW_EN 0x4000
266 #define CPCR_RX_VLAN 0x0040
269 #define MAGIC_EN 0x0001
272 #define TEREDO_SEL 0x8000
273 #define TEREDO_WAKE_MASK 0x7f00
274 #define TEREDO_RS_EVENT_MASK 0x00fe
275 #define OOB_TEREDO_EN 0x0001
278 #define ALDPS_PROXY_MODE 0x0001
281 #define EFUSE_READ_CMD BIT(15)
282 #define EFUSE_DATA_BIT16 BIT(7)
285 #define LINK_ON_WAKE_EN 0x0010
286 #define LINK_OFF_WAKE_EN 0x0008
289 #define BWF_EN 0x0040
290 #define MWF_EN 0x0020
291 #define UWF_EN 0x0010
292 #define LAN_WAKE_EN 0x0002
294 /* PLA_LED_FEATURE */
295 #define LED_MODE_MASK 0x0700
298 #define TX_10M_IDLE_EN 0x0080
299 #define PFM_PWM_SWITCH 0x0040
301 /* PLA_MAC_PWR_CTRL */
302 #define D3_CLK_GATED_EN 0x00004000
303 #define MCU_CLK_RATIO 0x07010f07
304 #define MCU_CLK_RATIO_MASK 0x0f0f0f0f
305 #define ALDPS_SPDWN_RATIO 0x0f87
307 /* PLA_MAC_PWR_CTRL2 */
308 #define EEE_SPDWN_RATIO 0x8007
309 #define MAC_CLK_SPDWN_EN BIT(15)
311 /* PLA_MAC_PWR_CTRL3 */
312 #define PKT_AVAIL_SPDWN_EN 0x0100
313 #define SUSPEND_SPDWN_EN 0x0004
314 #define U1U2_SPDWN_EN 0x0002
315 #define L1_SPDWN_EN 0x0001
317 /* PLA_MAC_PWR_CTRL4 */
318 #define PWRSAVE_SPDWN_EN 0x1000
319 #define RXDV_SPDWN_EN 0x0800
320 #define TX10MIDLE_EN 0x0100
321 #define TP100_SPDWN_EN 0x0020
322 #define TP500_SPDWN_EN 0x0010
323 #define TP1000_SPDWN_EN 0x0008
324 #define EEE_SPDWN_EN 0x0001
326 /* PLA_GPHY_INTR_IMR */
327 #define GPHY_STS_MSK 0x0001
328 #define SPEED_DOWN_MSK 0x0002
329 #define SPDWN_RXDV_MSK 0x0004
330 #define SPDWN_LINKCHG_MSK 0x0008
333 #define PHYAR_FLAG 0x80000000
336 #define EEE_RX_EN 0x0001
337 #define EEE_TX_EN 0x0002
340 #define AUTOLOAD_DONE 0x0002
343 #define USB2PHY_SUSPEND 0x0001
344 #define USB2PHY_L1 0x0002
347 #define pwd_dn_scale_mask 0x3ffe
348 #define pwd_dn_scale(x) ((x) << 1)
351 #define DYNAMIC_BURST 0x0001
354 #define EP4_FULL_FC 0x0001
357 #define STAT_SPEED_MASK 0x0006
358 #define STAT_SPEED_HIGH 0x0000
359 #define STAT_SPEED_FULL 0x0002
362 #define LPM_U1U2_EN BIT(0)
365 #define TX_AGG_MAX_THRESHOLD 0x03
368 #define RX_THR_SUPPER 0x0c350180
369 #define RX_THR_HIGH 0x7a120180
370 #define RX_THR_SLOW 0xffff0180
371 #define RX_THR_B 0x00010001
374 #define TEST_MODE_DISABLE 0x00000001
375 #define TX_SIZE_ADJUST1 0x00000100
378 #define BMU_RESET_EP_IN 0x01
379 #define BMU_RESET_EP_OUT 0x02
381 /* USB_UPT_RXDMA_OWN */
382 #define OWN_UPDATE BIT(0)
383 #define OWN_CLEAR BIT(1)
386 #define POWER_CUT 0x0100
388 /* USB_PM_CTRL_STATUS */
389 #define RESUME_INDICATE 0x0001
392 #define RX_AGG_DISABLE 0x0010
393 #define RX_ZERO_EN 0x0080
396 #define U2P3_ENABLE 0x0001
399 #define PWR_EN 0x0001
400 #define PHASE2_EN 0x0008
401 #define UPS_EN BIT(4)
402 #define USP_PREWAKE BIT(5)
405 #define PCUT_STATUS 0x0001
407 /* USB_RX_EARLY_TIMEOUT */
408 #define COALESCE_SUPER 85000U
409 #define COALESCE_HIGH 250000U
410 #define COALESCE_SLOW 524280U
413 #define TIMER11_EN 0x0001
416 /* bit 4 ~ 5: fifo empty boundary */
417 #define FIFO_EMPTY_1FB 0x30 /* 0x1fb * 64 = 32448 bytes */
418 /* bit 2 ~ 3: LMP timer */
419 #define LPM_TIMER_MASK 0x0c
420 #define LPM_TIMER_500MS 0x04 /* 500 ms */
421 #define LPM_TIMER_500US 0x0c /* 500 us */
422 #define ROK_EXIT_LPM 0x02
425 #define SEN_VAL_MASK 0xf800
426 #define SEN_VAL_NORMAL 0xa000
427 #define SEL_RXIDLE 0x0100
430 #define SAW_CNT_1MS_MASK 0x0fff
433 #define UPS_FLAGS_R_TUNE BIT(0)
434 #define UPS_FLAGS_EN_10M_CKDIV BIT(1)
435 #define UPS_FLAGS_250M_CKDIV BIT(2)
436 #define UPS_FLAGS_EN_ALDPS BIT(3)
437 #define UPS_FLAGS_CTAP_SHORT_DIS BIT(4)
438 #define UPS_FLAGS_SPEED_MASK (0xf << 16)
439 #define ups_flags_speed(x) ((x) << 16)
440 #define UPS_FLAGS_EN_EEE BIT(20)
441 #define UPS_FLAGS_EN_500M_EEE BIT(21)
442 #define UPS_FLAGS_EN_EEE_CKDIV BIT(22)
443 #define UPS_FLAGS_EEE_PLLOFF_GIGA BIT(24)
444 #define UPS_FLAGS_EEE_CMOD_LV_EN BIT(25)
445 #define UPS_FLAGS_EN_GREEN BIT(26)
446 #define UPS_FLAGS_EN_FLOW_CTR BIT(27)
460 /* OCP_ALDPS_CONFIG */
461 #define ENPWRSAVE 0x8000
462 #define ENPDNPS 0x0200
463 #define LINKENA 0x0100
464 #define DIS_SDSAVE 0x0010
467 #define PHY_STAT_MASK 0x0007
468 #define PHY_STAT_EXT_INIT 2
469 #define PHY_STAT_LAN_ON 3
470 #define PHY_STAT_PWRDN 5
473 #define PGA_RETURN_EN BIT(1)
476 #define EEE_CLKDIV_EN 0x8000
477 #define EN_ALDPS 0x0004
478 #define EN_10M_PLLOFF 0x0001
480 /* OCP_EEE_CONFIG1 */
481 #define RG_TXLPI_MSK_HFDUP 0x8000
482 #define RG_MATCLR_EN 0x4000
483 #define EEE_10_CAP 0x2000
484 #define EEE_NWAY_EN 0x1000
485 #define TX_QUIET_EN 0x0200
486 #define RX_QUIET_EN 0x0100
487 #define sd_rise_time_mask 0x0070
488 #define sd_rise_time(x) (min(x, 7) << 4) /* bit 4 ~ 6 */
489 #define RG_RXLPI_MSK_HFDUP 0x0008
490 #define SDFALLTIME 0x0007 /* bit 0 ~ 2 */
492 /* OCP_EEE_CONFIG2 */
493 #define RG_LPIHYS_NUM 0x7000 /* bit 12 ~ 15 */
494 #define RG_DACQUIET_EN 0x0400
495 #define RG_LDVQUIET_EN 0x0200
496 #define RG_CKRSEL 0x0020
497 #define RG_EEEPRG_EN 0x0010
499 /* OCP_EEE_CONFIG3 */
500 #define fast_snr_mask 0xff80
501 #define fast_snr(x) (min(x, 0x1ff) << 7) /* bit 7 ~ 15 */
502 #define RG_LFS_SEL 0x0060 /* bit 6 ~ 5 */
503 #define MSK_PH 0x0006 /* bit 0 ~ 3 */
506 /* bit[15:14] function */
507 #define FUN_ADDR 0x0000
508 #define FUN_DATA 0x4000
509 /* bit[4:0] device addr */
512 #define CTAP_SHORT_EN 0x0040
513 #define EEE10_EN 0x0010
516 #define EN_EEE_CMODE BIT(14)
517 #define EN_EEE_1000 BIT(13)
518 #define EN_EEE_100 BIT(12)
519 #define EN_10M_CLKDIV BIT(11)
520 #define EN_10M_BGOFF 0x0080
523 #define TXDIS_STATE 0x01
524 #define ABD_STATE 0x02
526 /* OCP_PHY_PATCH_STAT */
527 #define PATCH_READY BIT(6)
529 /* OCP_PHY_PATCH_CMD */
530 #define PATCH_REQUEST BIT(4)
533 #define CKADSEL_L 0x0100
534 #define ADC_EN 0x0080
535 #define EN_EMI_L 0x0040
538 #define clk_div_expo(x) (min(x, 5) << 8)
541 #define GREEN_ETH_EN BIT(15)
542 #define R_TUNE_EN BIT(11)
545 #define LPF_AUTO_TUNE 0x8000
548 #define GDAC_IB_UPALL 0x0008
551 #define AMP_DN 0x0200
554 #define RX_DRIVING_MASK 0x6000
557 #define AD_MASK 0xfee0
559 #define PASS_THRU_MASK 0x1
561 enum rtl_register_content
{
569 #define RTL8152_MAX_TX 4
570 #define RTL8152_MAX_RX 10
576 #define INTR_LINK 0x0004
578 #define RTL8152_REQT_READ 0xc0
579 #define RTL8152_REQT_WRITE 0x40
580 #define RTL8152_REQ_GET_REGS 0x05
581 #define RTL8152_REQ_SET_REGS 0x05
583 #define BYTE_EN_DWORD 0xff
584 #define BYTE_EN_WORD 0x33
585 #define BYTE_EN_BYTE 0x11
586 #define BYTE_EN_SIX_BYTES 0x3f
587 #define BYTE_EN_START_MASK 0x0f
588 #define BYTE_EN_END_MASK 0xf0
590 #define RTL8153_MAX_PACKET 9216 /* 9K */
591 #define RTL8153_MAX_MTU (RTL8153_MAX_PACKET - VLAN_ETH_HLEN - VLAN_HLEN)
592 #define RTL8152_RMS (VLAN_ETH_FRAME_LEN + VLAN_HLEN)
593 #define RTL8153_RMS RTL8153_MAX_PACKET
594 #define RTL8152_TX_TIMEOUT (5 * HZ)
595 #define RTL8152_NAPI_WEIGHT 64
596 #define rx_reserved_size(x) ((x) + VLAN_ETH_HLEN + CRC_SIZE + \
597 sizeof(struct rx_desc) + RX_ALIGN)
611 /* Define these values to match your device */
612 #define VENDOR_ID_REALTEK 0x0bda
613 #define VENDOR_ID_MICROSOFT 0x045e
614 #define VENDOR_ID_SAMSUNG 0x04e8
615 #define VENDOR_ID_LENOVO 0x17ef
616 #define VENDOR_ID_NVIDIA 0x0955
618 #define MCU_TYPE_PLA 0x0100
619 #define MCU_TYPE_USB 0x0000
621 struct tally_counter
{
628 __le32 tx_one_collision
;
629 __le32 tx_multi_collision
;
639 #define RX_LEN_MASK 0x7fff
642 #define RD_UDP_CS BIT(23)
643 #define RD_TCP_CS BIT(22)
644 #define RD_IPV6_CS BIT(20)
645 #define RD_IPV4_CS BIT(19)
648 #define IPF BIT(23) /* IP checksum fail */
649 #define UDPF BIT(22) /* UDP checksum fail */
650 #define TCPF BIT(21) /* TCP checksum fail */
651 #define RX_VLAN_TAG BIT(16)
660 #define TX_FS BIT(31) /* First segment of a packet */
661 #define TX_LS BIT(30) /* Final segment of a packet */
662 #define GTSENDV4 BIT(28)
663 #define GTSENDV6 BIT(27)
664 #define GTTCPHO_SHIFT 18
665 #define GTTCPHO_MAX 0x7fU
666 #define TX_LEN_MAX 0x3ffffU
669 #define UDP_CS BIT(31) /* Calculate UDP/IP checksum */
670 #define TCP_CS BIT(30) /* Calculate TCP/IP checksum */
671 #define IPV4_CS BIT(29) /* Calculate IPv4 checksum */
672 #define IPV6_CS BIT(28) /* Calculate IPv6 checksum */
674 #define MSS_MAX 0x7ffU
675 #define TCPHO_SHIFT 17
676 #define TCPHO_MAX 0x7ffU
677 #define TX_VLAN_TAG BIT(16)
683 struct list_head list
;
685 struct r8152
*context
;
691 struct list_head list
;
693 struct r8152
*context
;
702 struct usb_device
*udev
;
703 struct napi_struct napi
;
704 struct usb_interface
*intf
;
705 struct net_device
*netdev
;
706 struct urb
*intr_urb
;
707 struct tx_agg tx_info
[RTL8152_MAX_TX
];
708 struct rx_agg rx_info
[RTL8152_MAX_RX
];
709 struct list_head rx_done
, tx_free
;
710 struct sk_buff_head tx_queue
, rx_queue
;
711 spinlock_t rx_lock
, tx_lock
;
712 struct delayed_work schedule
, hw_phy_work
;
713 struct mii_if_info mii
;
714 struct mutex control
; /* use for hw setting */
715 #ifdef CONFIG_PM_SLEEP
716 struct notifier_block pm_notifier
;
720 void (*init
)(struct r8152
*);
721 int (*enable
)(struct r8152
*);
722 void (*disable
)(struct r8152
*);
723 void (*up
)(struct r8152
*);
724 void (*down
)(struct r8152
*);
725 void (*unload
)(struct r8152
*);
726 int (*eee_get
)(struct r8152
*, struct ethtool_eee
*);
727 int (*eee_set
)(struct r8152
*, struct ethtool_eee
*);
728 bool (*in_nway
)(struct r8152
*);
729 void (*hw_phy_cfg
)(struct r8152
*);
730 void (*autosuspend_en
)(struct r8152
*tp
, bool enable
);
766 /* Maximum number of multicast addresses to filter (vs. Rx-all-multicast).
767 * The RTL chips use a 64 element hash table based on the Ethernet CRC.
769 static const int multicast_filter_limit
= 32;
770 static unsigned int agg_buf_sz
= 16384;
772 #define RTL_LIMITED_TSO_SIZE (agg_buf_sz - sizeof(struct tx_desc) - \
773 VLAN_ETH_HLEN - VLAN_HLEN)
776 int get_registers(struct r8152
*tp
, u16 value
, u16 index
, u16 size
, void *data
)
781 tmp
= kmalloc(size
, GFP_KERNEL
);
785 ret
= usb_control_msg(tp
->udev
, usb_rcvctrlpipe(tp
->udev
, 0),
786 RTL8152_REQ_GET_REGS
, RTL8152_REQT_READ
,
787 value
, index
, tmp
, size
, 500);
789 memcpy(data
, tmp
, size
);
796 int set_registers(struct r8152
*tp
, u16 value
, u16 index
, u16 size
, void *data
)
801 tmp
= kmemdup(data
, size
, GFP_KERNEL
);
805 ret
= usb_control_msg(tp
->udev
, usb_sndctrlpipe(tp
->udev
, 0),
806 RTL8152_REQ_SET_REGS
, RTL8152_REQT_WRITE
,
807 value
, index
, tmp
, size
, 500);
814 static int generic_ocp_read(struct r8152
*tp
, u16 index
, u16 size
,
815 void *data
, u16 type
)
820 if (test_bit(RTL8152_UNPLUG
, &tp
->flags
))
823 /* both size and indix must be 4 bytes align */
824 if ((size
& 3) || !size
|| (index
& 3) || !data
)
827 if ((u32
)index
+ (u32
)size
> 0xffff)
832 ret
= get_registers(tp
, index
, type
, limit
, data
);
840 ret
= get_registers(tp
, index
, type
, size
, data
);
852 set_bit(RTL8152_UNPLUG
, &tp
->flags
);
857 static int generic_ocp_write(struct r8152
*tp
, u16 index
, u16 byteen
,
858 u16 size
, void *data
, u16 type
)
861 u16 byteen_start
, byteen_end
, byen
;
864 if (test_bit(RTL8152_UNPLUG
, &tp
->flags
))
867 /* both size and indix must be 4 bytes align */
868 if ((size
& 3) || !size
|| (index
& 3) || !data
)
871 if ((u32
)index
+ (u32
)size
> 0xffff)
874 byteen_start
= byteen
& BYTE_EN_START_MASK
;
875 byteen_end
= byteen
& BYTE_EN_END_MASK
;
877 byen
= byteen_start
| (byteen_start
<< 4);
878 ret
= set_registers(tp
, index
, type
| byen
, 4, data
);
891 ret
= set_registers(tp
, index
,
892 type
| BYTE_EN_DWORD
,
901 ret
= set_registers(tp
, index
,
902 type
| BYTE_EN_DWORD
,
914 byen
= byteen_end
| (byteen_end
>> 4);
915 ret
= set_registers(tp
, index
, type
| byen
, 4, data
);
922 set_bit(RTL8152_UNPLUG
, &tp
->flags
);
928 int pla_ocp_read(struct r8152
*tp
, u16 index
, u16 size
, void *data
)
930 return generic_ocp_read(tp
, index
, size
, data
, MCU_TYPE_PLA
);
934 int pla_ocp_write(struct r8152
*tp
, u16 index
, u16 byteen
, u16 size
, void *data
)
936 return generic_ocp_write(tp
, index
, byteen
, size
, data
, MCU_TYPE_PLA
);
940 int usb_ocp_write(struct r8152
*tp
, u16 index
, u16 byteen
, u16 size
, void *data
)
942 return generic_ocp_write(tp
, index
, byteen
, size
, data
, MCU_TYPE_USB
);
945 static u32
ocp_read_dword(struct r8152
*tp
, u16 type
, u16 index
)
949 generic_ocp_read(tp
, index
, sizeof(data
), &data
, type
);
951 return __le32_to_cpu(data
);
954 static void ocp_write_dword(struct r8152
*tp
, u16 type
, u16 index
, u32 data
)
956 __le32 tmp
= __cpu_to_le32(data
);
958 generic_ocp_write(tp
, index
, BYTE_EN_DWORD
, sizeof(tmp
), &tmp
, type
);
961 static u16
ocp_read_word(struct r8152
*tp
, u16 type
, u16 index
)
965 u8 shift
= index
& 2;
969 generic_ocp_read(tp
, index
, sizeof(tmp
), &tmp
, type
);
971 data
= __le32_to_cpu(tmp
);
972 data
>>= (shift
* 8);
978 static void ocp_write_word(struct r8152
*tp
, u16 type
, u16 index
, u32 data
)
982 u16 byen
= BYTE_EN_WORD
;
983 u8 shift
= index
& 2;
989 mask
<<= (shift
* 8);
990 data
<<= (shift
* 8);
994 tmp
= __cpu_to_le32(data
);
996 generic_ocp_write(tp
, index
, byen
, sizeof(tmp
), &tmp
, type
);
999 static u8
ocp_read_byte(struct r8152
*tp
, u16 type
, u16 index
)
1003 u8 shift
= index
& 3;
1007 generic_ocp_read(tp
, index
, sizeof(tmp
), &tmp
, type
);
1009 data
= __le32_to_cpu(tmp
);
1010 data
>>= (shift
* 8);
1016 static void ocp_write_byte(struct r8152
*tp
, u16 type
, u16 index
, u32 data
)
1020 u16 byen
= BYTE_EN_BYTE
;
1021 u8 shift
= index
& 3;
1027 mask
<<= (shift
* 8);
1028 data
<<= (shift
* 8);
1032 tmp
= __cpu_to_le32(data
);
1034 generic_ocp_write(tp
, index
, byen
, sizeof(tmp
), &tmp
, type
);
1037 static u16
ocp_reg_read(struct r8152
*tp
, u16 addr
)
1039 u16 ocp_base
, ocp_index
;
1041 ocp_base
= addr
& 0xf000;
1042 if (ocp_base
!= tp
->ocp_base
) {
1043 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_OCP_GPHY_BASE
, ocp_base
);
1044 tp
->ocp_base
= ocp_base
;
1047 ocp_index
= (addr
& 0x0fff) | 0xb000;
1048 return ocp_read_word(tp
, MCU_TYPE_PLA
, ocp_index
);
1051 static void ocp_reg_write(struct r8152
*tp
, u16 addr
, u16 data
)
1053 u16 ocp_base
, ocp_index
;
1055 ocp_base
= addr
& 0xf000;
1056 if (ocp_base
!= tp
->ocp_base
) {
1057 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_OCP_GPHY_BASE
, ocp_base
);
1058 tp
->ocp_base
= ocp_base
;
1061 ocp_index
= (addr
& 0x0fff) | 0xb000;
1062 ocp_write_word(tp
, MCU_TYPE_PLA
, ocp_index
, data
);
1065 static inline void r8152_mdio_write(struct r8152
*tp
, u32 reg_addr
, u32 value
)
1067 ocp_reg_write(tp
, OCP_BASE_MII
+ reg_addr
* 2, value
);
1070 static inline int r8152_mdio_read(struct r8152
*tp
, u32 reg_addr
)
1072 return ocp_reg_read(tp
, OCP_BASE_MII
+ reg_addr
* 2);
1075 static void sram_write(struct r8152
*tp
, u16 addr
, u16 data
)
1077 ocp_reg_write(tp
, OCP_SRAM_ADDR
, addr
);
1078 ocp_reg_write(tp
, OCP_SRAM_DATA
, data
);
1081 static u16
sram_read(struct r8152
*tp
, u16 addr
)
1083 ocp_reg_write(tp
, OCP_SRAM_ADDR
, addr
);
1084 return ocp_reg_read(tp
, OCP_SRAM_DATA
);
1087 static int read_mii_word(struct net_device
*netdev
, int phy_id
, int reg
)
1089 struct r8152
*tp
= netdev_priv(netdev
);
1092 if (test_bit(RTL8152_UNPLUG
, &tp
->flags
))
1095 if (phy_id
!= R8152_PHY_ID
)
1098 ret
= r8152_mdio_read(tp
, reg
);
1104 void write_mii_word(struct net_device
*netdev
, int phy_id
, int reg
, int val
)
1106 struct r8152
*tp
= netdev_priv(netdev
);
1108 if (test_bit(RTL8152_UNPLUG
, &tp
->flags
))
1111 if (phy_id
!= R8152_PHY_ID
)
1114 r8152_mdio_write(tp
, reg
, val
);
1118 r8152_submit_rx(struct r8152
*tp
, struct rx_agg
*agg
, gfp_t mem_flags
);
1120 static int rtl8152_set_mac_address(struct net_device
*netdev
, void *p
)
1122 struct r8152
*tp
= netdev_priv(netdev
);
1123 struct sockaddr
*addr
= p
;
1124 int ret
= -EADDRNOTAVAIL
;
1126 if (!is_valid_ether_addr(addr
->sa_data
))
1129 ret
= usb_autopm_get_interface(tp
->intf
);
1133 mutex_lock(&tp
->control
);
1135 memcpy(netdev
->dev_addr
, addr
->sa_data
, netdev
->addr_len
);
1137 ocp_write_byte(tp
, MCU_TYPE_PLA
, PLA_CRWECR
, CRWECR_CONFIG
);
1138 pla_ocp_write(tp
, PLA_IDR
, BYTE_EN_SIX_BYTES
, 8, addr
->sa_data
);
1139 ocp_write_byte(tp
, MCU_TYPE_PLA
, PLA_CRWECR
, CRWECR_NORAML
);
1141 mutex_unlock(&tp
->control
);
1143 usb_autopm_put_interface(tp
->intf
);
1148 /* Devices containing RTL8153-AD can support a persistent
1149 * host system provided MAC address.
1150 * Examples of this are Dell TB15 and Dell WD15 docks
1152 static int vendor_mac_passthru_addr_read(struct r8152
*tp
, struct sockaddr
*sa
)
1155 struct acpi_buffer buffer
= { ACPI_ALLOCATE_BUFFER
, NULL
};
1156 union acpi_object
*obj
;
1159 unsigned char buf
[6];
1161 /* test for -AD variant of RTL8153 */
1162 ocp_data
= ocp_read_word(tp
, MCU_TYPE_USB
, USB_MISC_0
);
1163 if ((ocp_data
& AD_MASK
) != 0x1000)
1166 /* test for MAC address pass-through bit */
1167 ocp_data
= ocp_read_byte(tp
, MCU_TYPE_USB
, EFUSE
);
1168 if ((ocp_data
& PASS_THRU_MASK
) != 1)
1171 /* returns _AUXMAC_#AABBCCDDEEFF# */
1172 status
= acpi_evaluate_object(NULL
, "\\_SB.AMAC", NULL
, &buffer
);
1173 obj
= (union acpi_object
*)buffer
.pointer
;
1174 if (!ACPI_SUCCESS(status
))
1176 if (obj
->type
!= ACPI_TYPE_BUFFER
|| obj
->string
.length
!= 0x17) {
1177 netif_warn(tp
, probe
, tp
->netdev
,
1178 "Invalid buffer for pass-thru MAC addr: (%d, %d)\n",
1179 obj
->type
, obj
->string
.length
);
1182 if (strncmp(obj
->string
.pointer
, "_AUXMAC_#", 9) != 0 ||
1183 strncmp(obj
->string
.pointer
+ 0x15, "#", 1) != 0) {
1184 netif_warn(tp
, probe
, tp
->netdev
,
1185 "Invalid header when reading pass-thru MAC addr\n");
1188 ret
= hex2bin(buf
, obj
->string
.pointer
+ 9, 6);
1189 if (!(ret
== 0 && is_valid_ether_addr(buf
))) {
1190 netif_warn(tp
, probe
, tp
->netdev
,
1191 "Invalid MAC for pass-thru MAC addr: %d, %pM\n",
1196 memcpy(sa
->sa_data
, buf
, 6);
1197 ether_addr_copy(tp
->netdev
->dev_addr
, sa
->sa_data
);
1198 netif_info(tp
, probe
, tp
->netdev
,
1199 "Using pass-thru MAC addr %pM\n", sa
->sa_data
);
1206 static int set_ethernet_addr(struct r8152
*tp
)
1208 struct net_device
*dev
= tp
->netdev
;
1212 if (tp
->version
== RTL_VER_01
) {
1213 ret
= pla_ocp_read(tp
, PLA_IDR
, 8, sa
.sa_data
);
1215 /* if this is not an RTL8153-AD, no eFuse mac pass thru set,
1216 * or system doesn't provide valid _SB.AMAC this will be
1217 * be expected to non-zero
1219 ret
= vendor_mac_passthru_addr_read(tp
, &sa
);
1221 ret
= pla_ocp_read(tp
, PLA_BACKUP
, 8, sa
.sa_data
);
1225 netif_err(tp
, probe
, dev
, "Get ether addr fail\n");
1226 } else if (!is_valid_ether_addr(sa
.sa_data
)) {
1227 netif_err(tp
, probe
, dev
, "Invalid ether addr %pM\n",
1229 eth_hw_addr_random(dev
);
1230 ether_addr_copy(sa
.sa_data
, dev
->dev_addr
);
1231 ret
= rtl8152_set_mac_address(dev
, &sa
);
1232 netif_info(tp
, probe
, dev
, "Random ether addr %pM\n",
1235 if (tp
->version
== RTL_VER_01
)
1236 ether_addr_copy(dev
->dev_addr
, sa
.sa_data
);
1238 ret
= rtl8152_set_mac_address(dev
, &sa
);
1244 static void read_bulk_callback(struct urb
*urb
)
1246 struct net_device
*netdev
;
1247 int status
= urb
->status
;
1259 if (test_bit(RTL8152_UNPLUG
, &tp
->flags
))
1262 if (!test_bit(WORK_ENABLE
, &tp
->flags
))
1265 netdev
= tp
->netdev
;
1267 /* When link down, the driver would cancel all bulks. */
1268 /* This avoid the re-submitting bulk */
1269 if (!netif_carrier_ok(netdev
))
1272 usb_mark_last_busy(tp
->udev
);
1276 if (urb
->actual_length
< ETH_ZLEN
)
1279 spin_lock(&tp
->rx_lock
);
1280 list_add_tail(&agg
->list
, &tp
->rx_done
);
1281 spin_unlock(&tp
->rx_lock
);
1282 napi_schedule(&tp
->napi
);
1285 set_bit(RTL8152_UNPLUG
, &tp
->flags
);
1286 netif_device_detach(tp
->netdev
);
1289 return; /* the urb is in unlink state */
1291 if (net_ratelimit())
1292 netdev_warn(netdev
, "maybe reset is needed?\n");
1295 if (net_ratelimit())
1296 netdev_warn(netdev
, "Rx status %d\n", status
);
1300 r8152_submit_rx(tp
, agg
, GFP_ATOMIC
);
1303 static void write_bulk_callback(struct urb
*urb
)
1305 struct net_device_stats
*stats
;
1306 struct net_device
*netdev
;
1309 int status
= urb
->status
;
1319 netdev
= tp
->netdev
;
1320 stats
= &netdev
->stats
;
1322 if (net_ratelimit())
1323 netdev_warn(netdev
, "Tx status %d\n", status
);
1324 stats
->tx_errors
+= agg
->skb_num
;
1326 stats
->tx_packets
+= agg
->skb_num
;
1327 stats
->tx_bytes
+= agg
->skb_len
;
1330 spin_lock(&tp
->tx_lock
);
1331 list_add_tail(&agg
->list
, &tp
->tx_free
);
1332 spin_unlock(&tp
->tx_lock
);
1334 usb_autopm_put_interface_async(tp
->intf
);
1336 if (!netif_carrier_ok(netdev
))
1339 if (!test_bit(WORK_ENABLE
, &tp
->flags
))
1342 if (test_bit(RTL8152_UNPLUG
, &tp
->flags
))
1345 if (!skb_queue_empty(&tp
->tx_queue
))
1346 napi_schedule(&tp
->napi
);
1349 static void intr_callback(struct urb
*urb
)
1353 int status
= urb
->status
;
1360 if (!test_bit(WORK_ENABLE
, &tp
->flags
))
1363 if (test_bit(RTL8152_UNPLUG
, &tp
->flags
))
1367 case 0: /* success */
1369 case -ECONNRESET
: /* unlink */
1371 netif_device_detach(tp
->netdev
);
1374 netif_info(tp
, intr
, tp
->netdev
,
1375 "Stop submitting intr, status %d\n", status
);
1378 netif_info(tp
, intr
, tp
->netdev
, "intr status -EOVERFLOW\n");
1380 /* -EPIPE: should clear the halt */
1382 netif_info(tp
, intr
, tp
->netdev
, "intr status %d\n", status
);
1386 d
= urb
->transfer_buffer
;
1387 if (INTR_LINK
& __le16_to_cpu(d
[0])) {
1388 if (!netif_carrier_ok(tp
->netdev
)) {
1389 set_bit(RTL8152_LINK_CHG
, &tp
->flags
);
1390 schedule_delayed_work(&tp
->schedule
, 0);
1393 if (netif_carrier_ok(tp
->netdev
)) {
1394 netif_stop_queue(tp
->netdev
);
1395 set_bit(RTL8152_LINK_CHG
, &tp
->flags
);
1396 schedule_delayed_work(&tp
->schedule
, 0);
1401 res
= usb_submit_urb(urb
, GFP_ATOMIC
);
1402 if (res
== -ENODEV
) {
1403 set_bit(RTL8152_UNPLUG
, &tp
->flags
);
1404 netif_device_detach(tp
->netdev
);
1406 netif_err(tp
, intr
, tp
->netdev
,
1407 "can't resubmit intr, status %d\n", res
);
1411 static inline void *rx_agg_align(void *data
)
1413 return (void *)ALIGN((uintptr_t)data
, RX_ALIGN
);
1416 static inline void *tx_agg_align(void *data
)
1418 return (void *)ALIGN((uintptr_t)data
, TX_ALIGN
);
1421 static void free_all_mem(struct r8152
*tp
)
1425 for (i
= 0; i
< RTL8152_MAX_RX
; i
++) {
1426 usb_free_urb(tp
->rx_info
[i
].urb
);
1427 tp
->rx_info
[i
].urb
= NULL
;
1429 kfree(tp
->rx_info
[i
].buffer
);
1430 tp
->rx_info
[i
].buffer
= NULL
;
1431 tp
->rx_info
[i
].head
= NULL
;
1434 for (i
= 0; i
< RTL8152_MAX_TX
; i
++) {
1435 usb_free_urb(tp
->tx_info
[i
].urb
);
1436 tp
->tx_info
[i
].urb
= NULL
;
1438 kfree(tp
->tx_info
[i
].buffer
);
1439 tp
->tx_info
[i
].buffer
= NULL
;
1440 tp
->tx_info
[i
].head
= NULL
;
1443 usb_free_urb(tp
->intr_urb
);
1444 tp
->intr_urb
= NULL
;
1446 kfree(tp
->intr_buff
);
1447 tp
->intr_buff
= NULL
;
1450 static int alloc_all_mem(struct r8152
*tp
)
1452 struct net_device
*netdev
= tp
->netdev
;
1453 struct usb_interface
*intf
= tp
->intf
;
1454 struct usb_host_interface
*alt
= intf
->cur_altsetting
;
1455 struct usb_host_endpoint
*ep_intr
= alt
->endpoint
+ 2;
1460 node
= netdev
->dev
.parent
? dev_to_node(netdev
->dev
.parent
) : -1;
1462 spin_lock_init(&tp
->rx_lock
);
1463 spin_lock_init(&tp
->tx_lock
);
1464 INIT_LIST_HEAD(&tp
->tx_free
);
1465 INIT_LIST_HEAD(&tp
->rx_done
);
1466 skb_queue_head_init(&tp
->tx_queue
);
1467 skb_queue_head_init(&tp
->rx_queue
);
1469 for (i
= 0; i
< RTL8152_MAX_RX
; i
++) {
1470 buf
= kmalloc_node(agg_buf_sz
, GFP_KERNEL
, node
);
1474 if (buf
!= rx_agg_align(buf
)) {
1476 buf
= kmalloc_node(agg_buf_sz
+ RX_ALIGN
, GFP_KERNEL
,
1482 urb
= usb_alloc_urb(0, GFP_KERNEL
);
1488 INIT_LIST_HEAD(&tp
->rx_info
[i
].list
);
1489 tp
->rx_info
[i
].context
= tp
;
1490 tp
->rx_info
[i
].urb
= urb
;
1491 tp
->rx_info
[i
].buffer
= buf
;
1492 tp
->rx_info
[i
].head
= rx_agg_align(buf
);
1495 for (i
= 0; i
< RTL8152_MAX_TX
; i
++) {
1496 buf
= kmalloc_node(agg_buf_sz
, GFP_KERNEL
, node
);
1500 if (buf
!= tx_agg_align(buf
)) {
1502 buf
= kmalloc_node(agg_buf_sz
+ TX_ALIGN
, GFP_KERNEL
,
1508 urb
= usb_alloc_urb(0, GFP_KERNEL
);
1514 INIT_LIST_HEAD(&tp
->tx_info
[i
].list
);
1515 tp
->tx_info
[i
].context
= tp
;
1516 tp
->tx_info
[i
].urb
= urb
;
1517 tp
->tx_info
[i
].buffer
= buf
;
1518 tp
->tx_info
[i
].head
= tx_agg_align(buf
);
1520 list_add_tail(&tp
->tx_info
[i
].list
, &tp
->tx_free
);
1523 tp
->intr_urb
= usb_alloc_urb(0, GFP_KERNEL
);
1527 tp
->intr_buff
= kmalloc(INTBUFSIZE
, GFP_KERNEL
);
1531 tp
->intr_interval
= (int)ep_intr
->desc
.bInterval
;
1532 usb_fill_int_urb(tp
->intr_urb
, tp
->udev
, usb_rcvintpipe(tp
->udev
, 3),
1533 tp
->intr_buff
, INTBUFSIZE
, intr_callback
,
1534 tp
, tp
->intr_interval
);
1543 static struct tx_agg
*r8152_get_tx_agg(struct r8152
*tp
)
1545 struct tx_agg
*agg
= NULL
;
1546 unsigned long flags
;
1548 if (list_empty(&tp
->tx_free
))
1551 spin_lock_irqsave(&tp
->tx_lock
, flags
);
1552 if (!list_empty(&tp
->tx_free
)) {
1553 struct list_head
*cursor
;
1555 cursor
= tp
->tx_free
.next
;
1556 list_del_init(cursor
);
1557 agg
= list_entry(cursor
, struct tx_agg
, list
);
1559 spin_unlock_irqrestore(&tp
->tx_lock
, flags
);
1564 /* r8152_csum_workaround()
1565 * The hw limites the value the transport offset. When the offset is out of the
1566 * range, calculate the checksum by sw.
1568 static void r8152_csum_workaround(struct r8152
*tp
, struct sk_buff
*skb
,
1569 struct sk_buff_head
*list
)
1571 if (skb_shinfo(skb
)->gso_size
) {
1572 netdev_features_t features
= tp
->netdev
->features
;
1573 struct sk_buff_head seg_list
;
1574 struct sk_buff
*segs
, *nskb
;
1576 features
&= ~(NETIF_F_SG
| NETIF_F_IPV6_CSUM
| NETIF_F_TSO6
);
1577 segs
= skb_gso_segment(skb
, features
);
1578 if (IS_ERR(segs
) || !segs
)
1581 __skb_queue_head_init(&seg_list
);
1587 __skb_queue_tail(&seg_list
, nskb
);
1590 skb_queue_splice(&seg_list
, list
);
1592 } else if (skb
->ip_summed
== CHECKSUM_PARTIAL
) {
1593 if (skb_checksum_help(skb
) < 0)
1596 __skb_queue_head(list
, skb
);
1598 struct net_device_stats
*stats
;
1601 stats
= &tp
->netdev
->stats
;
1602 stats
->tx_dropped
++;
1607 /* msdn_giant_send_check()
1608 * According to the document of microsoft, the TCP Pseudo Header excludes the
1609 * packet length for IPv6 TCP large packets.
1611 static int msdn_giant_send_check(struct sk_buff
*skb
)
1613 const struct ipv6hdr
*ipv6h
;
1617 ret
= skb_cow_head(skb
, 0);
1621 ipv6h
= ipv6_hdr(skb
);
1625 th
->check
= ~tcp_v6_check(0, &ipv6h
->saddr
, &ipv6h
->daddr
, 0);
1630 static inline void rtl_tx_vlan_tag(struct tx_desc
*desc
, struct sk_buff
*skb
)
1632 if (skb_vlan_tag_present(skb
)) {
1635 opts2
= TX_VLAN_TAG
| swab16(skb_vlan_tag_get(skb
));
1636 desc
->opts2
|= cpu_to_le32(opts2
);
1640 static inline void rtl_rx_vlan_tag(struct rx_desc
*desc
, struct sk_buff
*skb
)
1642 u32 opts2
= le32_to_cpu(desc
->opts2
);
1644 if (opts2
& RX_VLAN_TAG
)
1645 __vlan_hwaccel_put_tag(skb
, htons(ETH_P_8021Q
),
1646 swab16(opts2
& 0xffff));
1649 static int r8152_tx_csum(struct r8152
*tp
, struct tx_desc
*desc
,
1650 struct sk_buff
*skb
, u32 len
, u32 transport_offset
)
1652 u32 mss
= skb_shinfo(skb
)->gso_size
;
1653 u32 opts1
, opts2
= 0;
1654 int ret
= TX_CSUM_SUCCESS
;
1656 WARN_ON_ONCE(len
> TX_LEN_MAX
);
1658 opts1
= len
| TX_FS
| TX_LS
;
1661 if (transport_offset
> GTTCPHO_MAX
) {
1662 netif_warn(tp
, tx_err
, tp
->netdev
,
1663 "Invalid transport offset 0x%x for TSO\n",
1669 switch (vlan_get_protocol(skb
)) {
1670 case htons(ETH_P_IP
):
1674 case htons(ETH_P_IPV6
):
1675 if (msdn_giant_send_check(skb
)) {
1687 opts1
|= transport_offset
<< GTTCPHO_SHIFT
;
1688 opts2
|= min(mss
, MSS_MAX
) << MSS_SHIFT
;
1689 } else if (skb
->ip_summed
== CHECKSUM_PARTIAL
) {
1692 if (transport_offset
> TCPHO_MAX
) {
1693 netif_warn(tp
, tx_err
, tp
->netdev
,
1694 "Invalid transport offset 0x%x\n",
1700 switch (vlan_get_protocol(skb
)) {
1701 case htons(ETH_P_IP
):
1703 ip_protocol
= ip_hdr(skb
)->protocol
;
1706 case htons(ETH_P_IPV6
):
1708 ip_protocol
= ipv6_hdr(skb
)->nexthdr
;
1712 ip_protocol
= IPPROTO_RAW
;
1716 if (ip_protocol
== IPPROTO_TCP
)
1718 else if (ip_protocol
== IPPROTO_UDP
)
1723 opts2
|= transport_offset
<< TCPHO_SHIFT
;
1726 desc
->opts2
= cpu_to_le32(opts2
);
1727 desc
->opts1
= cpu_to_le32(opts1
);
1733 static int r8152_tx_agg_fill(struct r8152
*tp
, struct tx_agg
*agg
)
1735 struct sk_buff_head skb_head
, *tx_queue
= &tp
->tx_queue
;
1739 __skb_queue_head_init(&skb_head
);
1740 spin_lock(&tx_queue
->lock
);
1741 skb_queue_splice_init(tx_queue
, &skb_head
);
1742 spin_unlock(&tx_queue
->lock
);
1744 tx_data
= agg
->head
;
1747 remain
= agg_buf_sz
;
1749 while (remain
>= ETH_ZLEN
+ sizeof(struct tx_desc
)) {
1750 struct tx_desc
*tx_desc
;
1751 struct sk_buff
*skb
;
1755 skb
= __skb_dequeue(&skb_head
);
1759 len
= skb
->len
+ sizeof(*tx_desc
);
1762 __skb_queue_head(&skb_head
, skb
);
1766 tx_data
= tx_agg_align(tx_data
);
1767 tx_desc
= (struct tx_desc
*)tx_data
;
1769 offset
= (u32
)skb_transport_offset(skb
);
1771 if (r8152_tx_csum(tp
, tx_desc
, skb
, skb
->len
, offset
)) {
1772 r8152_csum_workaround(tp
, skb
, &skb_head
);
1776 rtl_tx_vlan_tag(tx_desc
, skb
);
1778 tx_data
+= sizeof(*tx_desc
);
1781 if (skb_copy_bits(skb
, 0, tx_data
, len
) < 0) {
1782 struct net_device_stats
*stats
= &tp
->netdev
->stats
;
1784 stats
->tx_dropped
++;
1785 dev_kfree_skb_any(skb
);
1786 tx_data
-= sizeof(*tx_desc
);
1791 agg
->skb_len
+= len
;
1794 dev_kfree_skb_any(skb
);
1796 remain
= agg_buf_sz
- (int)(tx_agg_align(tx_data
) - agg
->head
);
1799 if (!skb_queue_empty(&skb_head
)) {
1800 spin_lock(&tx_queue
->lock
);
1801 skb_queue_splice(&skb_head
, tx_queue
);
1802 spin_unlock(&tx_queue
->lock
);
1805 netif_tx_lock(tp
->netdev
);
1807 if (netif_queue_stopped(tp
->netdev
) &&
1808 skb_queue_len(&tp
->tx_queue
) < tp
->tx_qlen
)
1809 netif_wake_queue(tp
->netdev
);
1811 netif_tx_unlock(tp
->netdev
);
1813 ret
= usb_autopm_get_interface_async(tp
->intf
);
1817 usb_fill_bulk_urb(agg
->urb
, tp
->udev
, usb_sndbulkpipe(tp
->udev
, 2),
1818 agg
->head
, (int)(tx_data
- (u8
*)agg
->head
),
1819 (usb_complete_t
)write_bulk_callback
, agg
);
1821 ret
= usb_submit_urb(agg
->urb
, GFP_ATOMIC
);
1823 usb_autopm_put_interface_async(tp
->intf
);
1829 static u8
r8152_rx_csum(struct r8152
*tp
, struct rx_desc
*rx_desc
)
1831 u8 checksum
= CHECKSUM_NONE
;
1834 if (!(tp
->netdev
->features
& NETIF_F_RXCSUM
))
1837 opts2
= le32_to_cpu(rx_desc
->opts2
);
1838 opts3
= le32_to_cpu(rx_desc
->opts3
);
1840 if (opts2
& RD_IPV4_CS
) {
1842 checksum
= CHECKSUM_NONE
;
1843 else if ((opts2
& RD_UDP_CS
) && (opts3
& UDPF
))
1844 checksum
= CHECKSUM_NONE
;
1845 else if ((opts2
& RD_TCP_CS
) && (opts3
& TCPF
))
1846 checksum
= CHECKSUM_NONE
;
1848 checksum
= CHECKSUM_UNNECESSARY
;
1849 } else if (opts2
& RD_IPV6_CS
) {
1850 if ((opts2
& RD_UDP_CS
) && !(opts3
& UDPF
))
1851 checksum
= CHECKSUM_UNNECESSARY
;
1852 else if ((opts2
& RD_TCP_CS
) && !(opts3
& TCPF
))
1853 checksum
= CHECKSUM_UNNECESSARY
;
1860 static int rx_bottom(struct r8152
*tp
, int budget
)
1862 unsigned long flags
;
1863 struct list_head
*cursor
, *next
, rx_queue
;
1864 int ret
= 0, work_done
= 0;
1865 struct napi_struct
*napi
= &tp
->napi
;
1867 if (!skb_queue_empty(&tp
->rx_queue
)) {
1868 while (work_done
< budget
) {
1869 struct sk_buff
*skb
= __skb_dequeue(&tp
->rx_queue
);
1870 struct net_device
*netdev
= tp
->netdev
;
1871 struct net_device_stats
*stats
= &netdev
->stats
;
1872 unsigned int pkt_len
;
1878 napi_gro_receive(napi
, skb
);
1880 stats
->rx_packets
++;
1881 stats
->rx_bytes
+= pkt_len
;
1885 if (list_empty(&tp
->rx_done
))
1888 INIT_LIST_HEAD(&rx_queue
);
1889 spin_lock_irqsave(&tp
->rx_lock
, flags
);
1890 list_splice_init(&tp
->rx_done
, &rx_queue
);
1891 spin_unlock_irqrestore(&tp
->rx_lock
, flags
);
1893 list_for_each_safe(cursor
, next
, &rx_queue
) {
1894 struct rx_desc
*rx_desc
;
1900 list_del_init(cursor
);
1902 agg
= list_entry(cursor
, struct rx_agg
, list
);
1904 if (urb
->actual_length
< ETH_ZLEN
)
1907 rx_desc
= agg
->head
;
1908 rx_data
= agg
->head
;
1909 len_used
+= sizeof(struct rx_desc
);
1911 while (urb
->actual_length
> len_used
) {
1912 struct net_device
*netdev
= tp
->netdev
;
1913 struct net_device_stats
*stats
= &netdev
->stats
;
1914 unsigned int pkt_len
;
1915 struct sk_buff
*skb
;
1917 /* limite the skb numbers for rx_queue */
1918 if (unlikely(skb_queue_len(&tp
->rx_queue
) >= 1000))
1921 pkt_len
= le32_to_cpu(rx_desc
->opts1
) & RX_LEN_MASK
;
1922 if (pkt_len
< ETH_ZLEN
)
1925 len_used
+= pkt_len
;
1926 if (urb
->actual_length
< len_used
)
1929 pkt_len
-= CRC_SIZE
;
1930 rx_data
+= sizeof(struct rx_desc
);
1932 skb
= napi_alloc_skb(napi
, pkt_len
);
1934 stats
->rx_dropped
++;
1938 skb
->ip_summed
= r8152_rx_csum(tp
, rx_desc
);
1939 memcpy(skb
->data
, rx_data
, pkt_len
);
1940 skb_put(skb
, pkt_len
);
1941 skb
->protocol
= eth_type_trans(skb
, netdev
);
1942 rtl_rx_vlan_tag(rx_desc
, skb
);
1943 if (work_done
< budget
) {
1944 napi_gro_receive(napi
, skb
);
1946 stats
->rx_packets
++;
1947 stats
->rx_bytes
+= pkt_len
;
1949 __skb_queue_tail(&tp
->rx_queue
, skb
);
1953 rx_data
= rx_agg_align(rx_data
+ pkt_len
+ CRC_SIZE
);
1954 rx_desc
= (struct rx_desc
*)rx_data
;
1955 len_used
= (int)(rx_data
- (u8
*)agg
->head
);
1956 len_used
+= sizeof(struct rx_desc
);
1961 ret
= r8152_submit_rx(tp
, agg
, GFP_ATOMIC
);
1963 urb
->actual_length
= 0;
1964 list_add_tail(&agg
->list
, next
);
1968 if (!list_empty(&rx_queue
)) {
1969 spin_lock_irqsave(&tp
->rx_lock
, flags
);
1970 list_splice_tail(&rx_queue
, &tp
->rx_done
);
1971 spin_unlock_irqrestore(&tp
->rx_lock
, flags
);
1978 static void tx_bottom(struct r8152
*tp
)
1985 if (skb_queue_empty(&tp
->tx_queue
))
1988 agg
= r8152_get_tx_agg(tp
);
1992 res
= r8152_tx_agg_fill(tp
, agg
);
1994 struct net_device
*netdev
= tp
->netdev
;
1996 if (res
== -ENODEV
) {
1997 set_bit(RTL8152_UNPLUG
, &tp
->flags
);
1998 netif_device_detach(netdev
);
2000 struct net_device_stats
*stats
= &netdev
->stats
;
2001 unsigned long flags
;
2003 netif_warn(tp
, tx_err
, netdev
,
2004 "failed tx_urb %d\n", res
);
2005 stats
->tx_dropped
+= agg
->skb_num
;
2007 spin_lock_irqsave(&tp
->tx_lock
, flags
);
2008 list_add_tail(&agg
->list
, &tp
->tx_free
);
2009 spin_unlock_irqrestore(&tp
->tx_lock
, flags
);
2015 static void bottom_half(struct r8152
*tp
)
2017 if (test_bit(RTL8152_UNPLUG
, &tp
->flags
))
2020 if (!test_bit(WORK_ENABLE
, &tp
->flags
))
2023 /* When link down, the driver would cancel all bulks. */
2024 /* This avoid the re-submitting bulk */
2025 if (!netif_carrier_ok(tp
->netdev
))
2028 clear_bit(SCHEDULE_NAPI
, &tp
->flags
);
2033 static int r8152_poll(struct napi_struct
*napi
, int budget
)
2035 struct r8152
*tp
= container_of(napi
, struct r8152
, napi
);
2038 work_done
= rx_bottom(tp
, budget
);
2041 if (work_done
< budget
) {
2042 if (!napi_complete_done(napi
, work_done
))
2044 if (!list_empty(&tp
->rx_done
))
2045 napi_schedule(napi
);
2046 else if (!skb_queue_empty(&tp
->tx_queue
) &&
2047 !list_empty(&tp
->tx_free
))
2048 napi_schedule(napi
);
2056 int r8152_submit_rx(struct r8152
*tp
, struct rx_agg
*agg
, gfp_t mem_flags
)
2060 /* The rx would be stopped, so skip submitting */
2061 if (test_bit(RTL8152_UNPLUG
, &tp
->flags
) ||
2062 !test_bit(WORK_ENABLE
, &tp
->flags
) || !netif_carrier_ok(tp
->netdev
))
2065 usb_fill_bulk_urb(agg
->urb
, tp
->udev
, usb_rcvbulkpipe(tp
->udev
, 1),
2066 agg
->head
, agg_buf_sz
,
2067 (usb_complete_t
)read_bulk_callback
, agg
);
2069 ret
= usb_submit_urb(agg
->urb
, mem_flags
);
2070 if (ret
== -ENODEV
) {
2071 set_bit(RTL8152_UNPLUG
, &tp
->flags
);
2072 netif_device_detach(tp
->netdev
);
2074 struct urb
*urb
= agg
->urb
;
2075 unsigned long flags
;
2077 urb
->actual_length
= 0;
2078 spin_lock_irqsave(&tp
->rx_lock
, flags
);
2079 list_add_tail(&agg
->list
, &tp
->rx_done
);
2080 spin_unlock_irqrestore(&tp
->rx_lock
, flags
);
2082 netif_err(tp
, rx_err
, tp
->netdev
,
2083 "Couldn't submit rx[%p], ret = %d\n", agg
, ret
);
2085 napi_schedule(&tp
->napi
);
2091 static void rtl_drop_queued_tx(struct r8152
*tp
)
2093 struct net_device_stats
*stats
= &tp
->netdev
->stats
;
2094 struct sk_buff_head skb_head
, *tx_queue
= &tp
->tx_queue
;
2095 struct sk_buff
*skb
;
2097 if (skb_queue_empty(tx_queue
))
2100 __skb_queue_head_init(&skb_head
);
2101 spin_lock_bh(&tx_queue
->lock
);
2102 skb_queue_splice_init(tx_queue
, &skb_head
);
2103 spin_unlock_bh(&tx_queue
->lock
);
2105 while ((skb
= __skb_dequeue(&skb_head
))) {
2107 stats
->tx_dropped
++;
2111 static void rtl8152_tx_timeout(struct net_device
*netdev
)
2113 struct r8152
*tp
= netdev_priv(netdev
);
2115 netif_warn(tp
, tx_err
, netdev
, "Tx timeout\n");
2117 usb_queue_reset_device(tp
->intf
);
2120 static void rtl8152_set_rx_mode(struct net_device
*netdev
)
2122 struct r8152
*tp
= netdev_priv(netdev
);
2124 if (netif_carrier_ok(netdev
)) {
2125 set_bit(RTL8152_SET_RX_MODE
, &tp
->flags
);
2126 schedule_delayed_work(&tp
->schedule
, 0);
2130 static void _rtl8152_set_rx_mode(struct net_device
*netdev
)
2132 struct r8152
*tp
= netdev_priv(netdev
);
2133 u32 mc_filter
[2]; /* Multicast hash filter */
2137 netif_stop_queue(netdev
);
2138 ocp_data
= ocp_read_dword(tp
, MCU_TYPE_PLA
, PLA_RCR
);
2139 ocp_data
&= ~RCR_ACPT_ALL
;
2140 ocp_data
|= RCR_AB
| RCR_APM
;
2142 if (netdev
->flags
& IFF_PROMISC
) {
2143 /* Unconditionally log net taps. */
2144 netif_notice(tp
, link
, netdev
, "Promiscuous mode enabled\n");
2145 ocp_data
|= RCR_AM
| RCR_AAP
;
2146 mc_filter
[1] = 0xffffffff;
2147 mc_filter
[0] = 0xffffffff;
2148 } else if ((netdev_mc_count(netdev
) > multicast_filter_limit
) ||
2149 (netdev
->flags
& IFF_ALLMULTI
)) {
2150 /* Too many to filter perfectly -- accept all multicasts. */
2152 mc_filter
[1] = 0xffffffff;
2153 mc_filter
[0] = 0xffffffff;
2155 struct netdev_hw_addr
*ha
;
2159 netdev_for_each_mc_addr(ha
, netdev
) {
2160 int bit_nr
= ether_crc(ETH_ALEN
, ha
->addr
) >> 26;
2162 mc_filter
[bit_nr
>> 5] |= 1 << (bit_nr
& 31);
2167 tmp
[0] = __cpu_to_le32(swab32(mc_filter
[1]));
2168 tmp
[1] = __cpu_to_le32(swab32(mc_filter
[0]));
2170 pla_ocp_write(tp
, PLA_MAR
, BYTE_EN_DWORD
, sizeof(tmp
), tmp
);
2171 ocp_write_dword(tp
, MCU_TYPE_PLA
, PLA_RCR
, ocp_data
);
2172 netif_wake_queue(netdev
);
2175 static netdev_features_t
2176 rtl8152_features_check(struct sk_buff
*skb
, struct net_device
*dev
,
2177 netdev_features_t features
)
2179 u32 mss
= skb_shinfo(skb
)->gso_size
;
2180 int max_offset
= mss
? GTTCPHO_MAX
: TCPHO_MAX
;
2181 int offset
= skb_transport_offset(skb
);
2183 if ((mss
|| skb
->ip_summed
== CHECKSUM_PARTIAL
) && offset
> max_offset
)
2184 features
&= ~(NETIF_F_CSUM_MASK
| NETIF_F_GSO_MASK
);
2185 else if ((skb
->len
+ sizeof(struct tx_desc
)) > agg_buf_sz
)
2186 features
&= ~NETIF_F_GSO_MASK
;
2191 static netdev_tx_t
rtl8152_start_xmit(struct sk_buff
*skb
,
2192 struct net_device
*netdev
)
2194 struct r8152
*tp
= netdev_priv(netdev
);
2196 skb_tx_timestamp(skb
);
2198 skb_queue_tail(&tp
->tx_queue
, skb
);
2200 if (!list_empty(&tp
->tx_free
)) {
2201 if (test_bit(SELECTIVE_SUSPEND
, &tp
->flags
)) {
2202 set_bit(SCHEDULE_NAPI
, &tp
->flags
);
2203 schedule_delayed_work(&tp
->schedule
, 0);
2205 usb_mark_last_busy(tp
->udev
);
2206 napi_schedule(&tp
->napi
);
2208 } else if (skb_queue_len(&tp
->tx_queue
) > tp
->tx_qlen
) {
2209 netif_stop_queue(netdev
);
2212 return NETDEV_TX_OK
;
2215 static void r8152b_reset_packet_filter(struct r8152
*tp
)
2219 ocp_data
= ocp_read_word(tp
, MCU_TYPE_PLA
, PLA_FMC
);
2220 ocp_data
&= ~FMC_FCR_MCU_EN
;
2221 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_FMC
, ocp_data
);
2222 ocp_data
|= FMC_FCR_MCU_EN
;
2223 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_FMC
, ocp_data
);
2226 static void rtl8152_nic_reset(struct r8152
*tp
)
2230 ocp_write_byte(tp
, MCU_TYPE_PLA
, PLA_CR
, CR_RST
);
2232 for (i
= 0; i
< 1000; i
++) {
2233 if (!(ocp_read_byte(tp
, MCU_TYPE_PLA
, PLA_CR
) & CR_RST
))
2235 usleep_range(100, 400);
2239 static void set_tx_qlen(struct r8152
*tp
)
2241 struct net_device
*netdev
= tp
->netdev
;
2243 tp
->tx_qlen
= agg_buf_sz
/ (netdev
->mtu
+ VLAN_ETH_HLEN
+ VLAN_HLEN
+
2244 sizeof(struct tx_desc
));
2247 static inline u8
rtl8152_get_speed(struct r8152
*tp
)
2249 return ocp_read_byte(tp
, MCU_TYPE_PLA
, PLA_PHYSTATUS
);
2252 static void rtl_set_eee_plus(struct r8152
*tp
)
2257 speed
= rtl8152_get_speed(tp
);
2258 if (speed
& _10bps
) {
2259 ocp_data
= ocp_read_word(tp
, MCU_TYPE_PLA
, PLA_EEEP_CR
);
2260 ocp_data
|= EEEP_CR_EEEP_TX
;
2261 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_EEEP_CR
, ocp_data
);
2263 ocp_data
= ocp_read_word(tp
, MCU_TYPE_PLA
, PLA_EEEP_CR
);
2264 ocp_data
&= ~EEEP_CR_EEEP_TX
;
2265 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_EEEP_CR
, ocp_data
);
2269 static void rxdy_gated_en(struct r8152
*tp
, bool enable
)
2273 ocp_data
= ocp_read_word(tp
, MCU_TYPE_PLA
, PLA_MISC_1
);
2275 ocp_data
|= RXDY_GATED_EN
;
2277 ocp_data
&= ~RXDY_GATED_EN
;
2278 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_MISC_1
, ocp_data
);
2281 static int rtl_start_rx(struct r8152
*tp
)
2285 INIT_LIST_HEAD(&tp
->rx_done
);
2286 for (i
= 0; i
< RTL8152_MAX_RX
; i
++) {
2287 INIT_LIST_HEAD(&tp
->rx_info
[i
].list
);
2288 ret
= r8152_submit_rx(tp
, &tp
->rx_info
[i
], GFP_KERNEL
);
2293 if (ret
&& ++i
< RTL8152_MAX_RX
) {
2294 struct list_head rx_queue
;
2295 unsigned long flags
;
2297 INIT_LIST_HEAD(&rx_queue
);
2300 struct rx_agg
*agg
= &tp
->rx_info
[i
++];
2301 struct urb
*urb
= agg
->urb
;
2303 urb
->actual_length
= 0;
2304 list_add_tail(&agg
->list
, &rx_queue
);
2305 } while (i
< RTL8152_MAX_RX
);
2307 spin_lock_irqsave(&tp
->rx_lock
, flags
);
2308 list_splice_tail(&rx_queue
, &tp
->rx_done
);
2309 spin_unlock_irqrestore(&tp
->rx_lock
, flags
);
2315 static int rtl_stop_rx(struct r8152
*tp
)
2319 for (i
= 0; i
< RTL8152_MAX_RX
; i
++)
2320 usb_kill_urb(tp
->rx_info
[i
].urb
);
2322 while (!skb_queue_empty(&tp
->rx_queue
))
2323 dev_kfree_skb(__skb_dequeue(&tp
->rx_queue
));
2328 static int rtl_enable(struct r8152
*tp
)
2332 r8152b_reset_packet_filter(tp
);
2334 ocp_data
= ocp_read_byte(tp
, MCU_TYPE_PLA
, PLA_CR
);
2335 ocp_data
|= CR_RE
| CR_TE
;
2336 ocp_write_byte(tp
, MCU_TYPE_PLA
, PLA_CR
, ocp_data
);
2338 rxdy_gated_en(tp
, false);
2343 static int rtl8152_enable(struct r8152
*tp
)
2345 if (test_bit(RTL8152_UNPLUG
, &tp
->flags
))
2349 rtl_set_eee_plus(tp
);
2351 return rtl_enable(tp
);
2354 static inline void r8153b_rx_agg_chg_indicate(struct r8152
*tp
)
2356 ocp_write_byte(tp
, MCU_TYPE_USB
, USB_UPT_RXDMA_OWN
,
2357 OWN_UPDATE
| OWN_CLEAR
);
2360 static void r8153_set_rx_early_timeout(struct r8152
*tp
)
2362 u32 ocp_data
= tp
->coalesce
/ 8;
2364 switch (tp
->version
) {
2369 ocp_write_word(tp
, MCU_TYPE_USB
, USB_RX_EARLY_TIMEOUT
,
2375 /* The RTL8153B uses USB_RX_EXTRA_AGGR_TMR for rx timeout
2376 * primarily. For USB_RX_EARLY_TIMEOUT, we fix it to 128ns.
2378 ocp_write_word(tp
, MCU_TYPE_USB
, USB_RX_EARLY_TIMEOUT
,
2380 ocp_write_word(tp
, MCU_TYPE_USB
, USB_RX_EXTRA_AGGR_TMR
,
2382 r8153b_rx_agg_chg_indicate(tp
);
2390 static void r8153_set_rx_early_size(struct r8152
*tp
)
2392 u32 ocp_data
= agg_buf_sz
- rx_reserved_size(tp
->netdev
->mtu
);
2394 switch (tp
->version
) {
2399 ocp_write_word(tp
, MCU_TYPE_USB
, USB_RX_EARLY_SIZE
,
2404 ocp_write_word(tp
, MCU_TYPE_USB
, USB_RX_EARLY_SIZE
,
2406 r8153b_rx_agg_chg_indicate(tp
);
2414 static int rtl8153_enable(struct r8152
*tp
)
2416 if (test_bit(RTL8152_UNPLUG
, &tp
->flags
))
2420 rtl_set_eee_plus(tp
);
2421 r8153_set_rx_early_timeout(tp
);
2422 r8153_set_rx_early_size(tp
);
2424 return rtl_enable(tp
);
2427 static void rtl_disable(struct r8152
*tp
)
2432 if (test_bit(RTL8152_UNPLUG
, &tp
->flags
)) {
2433 rtl_drop_queued_tx(tp
);
2437 ocp_data
= ocp_read_dword(tp
, MCU_TYPE_PLA
, PLA_RCR
);
2438 ocp_data
&= ~RCR_ACPT_ALL
;
2439 ocp_write_dword(tp
, MCU_TYPE_PLA
, PLA_RCR
, ocp_data
);
2441 rtl_drop_queued_tx(tp
);
2443 for (i
= 0; i
< RTL8152_MAX_TX
; i
++)
2444 usb_kill_urb(tp
->tx_info
[i
].urb
);
2446 rxdy_gated_en(tp
, true);
2448 for (i
= 0; i
< 1000; i
++) {
2449 ocp_data
= ocp_read_byte(tp
, MCU_TYPE_PLA
, PLA_OOB_CTRL
);
2450 if ((ocp_data
& FIFO_EMPTY
) == FIFO_EMPTY
)
2452 usleep_range(1000, 2000);
2455 for (i
= 0; i
< 1000; i
++) {
2456 if (ocp_read_word(tp
, MCU_TYPE_PLA
, PLA_TCR0
) & TCR0_TX_EMPTY
)
2458 usleep_range(1000, 2000);
2463 rtl8152_nic_reset(tp
);
2466 static void r8152_power_cut_en(struct r8152
*tp
, bool enable
)
2470 ocp_data
= ocp_read_word(tp
, MCU_TYPE_USB
, USB_UPS_CTRL
);
2472 ocp_data
|= POWER_CUT
;
2474 ocp_data
&= ~POWER_CUT
;
2475 ocp_write_word(tp
, MCU_TYPE_USB
, USB_UPS_CTRL
, ocp_data
);
2477 ocp_data
= ocp_read_word(tp
, MCU_TYPE_USB
, USB_PM_CTRL_STATUS
);
2478 ocp_data
&= ~RESUME_INDICATE
;
2479 ocp_write_word(tp
, MCU_TYPE_USB
, USB_PM_CTRL_STATUS
, ocp_data
);
2482 static void rtl_rx_vlan_en(struct r8152
*tp
, bool enable
)
2486 ocp_data
= ocp_read_word(tp
, MCU_TYPE_PLA
, PLA_CPCR
);
2488 ocp_data
|= CPCR_RX_VLAN
;
2490 ocp_data
&= ~CPCR_RX_VLAN
;
2491 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_CPCR
, ocp_data
);
2494 static int rtl8152_set_features(struct net_device
*dev
,
2495 netdev_features_t features
)
2497 netdev_features_t changed
= features
^ dev
->features
;
2498 struct r8152
*tp
= netdev_priv(dev
);
2501 ret
= usb_autopm_get_interface(tp
->intf
);
2505 mutex_lock(&tp
->control
);
2507 if (changed
& NETIF_F_HW_VLAN_CTAG_RX
) {
2508 if (features
& NETIF_F_HW_VLAN_CTAG_RX
)
2509 rtl_rx_vlan_en(tp
, true);
2511 rtl_rx_vlan_en(tp
, false);
2514 mutex_unlock(&tp
->control
);
2516 usb_autopm_put_interface(tp
->intf
);
2522 #define WAKE_ANY (WAKE_PHY | WAKE_MAGIC | WAKE_UCAST | WAKE_BCAST | WAKE_MCAST)
2524 static u32
__rtl_get_wol(struct r8152
*tp
)
2529 ocp_data
= ocp_read_word(tp
, MCU_TYPE_PLA
, PLA_CONFIG34
);
2530 if (ocp_data
& LINK_ON_WAKE_EN
)
2531 wolopts
|= WAKE_PHY
;
2533 ocp_data
= ocp_read_word(tp
, MCU_TYPE_PLA
, PLA_CONFIG5
);
2534 if (ocp_data
& UWF_EN
)
2535 wolopts
|= WAKE_UCAST
;
2536 if (ocp_data
& BWF_EN
)
2537 wolopts
|= WAKE_BCAST
;
2538 if (ocp_data
& MWF_EN
)
2539 wolopts
|= WAKE_MCAST
;
2541 ocp_data
= ocp_read_word(tp
, MCU_TYPE_PLA
, PLA_CFG_WOL
);
2542 if (ocp_data
& MAGIC_EN
)
2543 wolopts
|= WAKE_MAGIC
;
2548 static void __rtl_set_wol(struct r8152
*tp
, u32 wolopts
)
2552 ocp_write_byte(tp
, MCU_TYPE_PLA
, PLA_CRWECR
, CRWECR_CONFIG
);
2554 ocp_data
= ocp_read_word(tp
, MCU_TYPE_PLA
, PLA_CONFIG34
);
2555 ocp_data
&= ~LINK_ON_WAKE_EN
;
2556 if (wolopts
& WAKE_PHY
)
2557 ocp_data
|= LINK_ON_WAKE_EN
;
2558 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_CONFIG34
, ocp_data
);
2560 ocp_data
= ocp_read_word(tp
, MCU_TYPE_PLA
, PLA_CONFIG5
);
2561 ocp_data
&= ~(UWF_EN
| BWF_EN
| MWF_EN
);
2562 if (wolopts
& WAKE_UCAST
)
2564 if (wolopts
& WAKE_BCAST
)
2566 if (wolopts
& WAKE_MCAST
)
2568 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_CONFIG5
, ocp_data
);
2570 ocp_write_byte(tp
, MCU_TYPE_PLA
, PLA_CRWECR
, CRWECR_NORAML
);
2572 ocp_data
= ocp_read_word(tp
, MCU_TYPE_PLA
, PLA_CFG_WOL
);
2573 ocp_data
&= ~MAGIC_EN
;
2574 if (wolopts
& WAKE_MAGIC
)
2575 ocp_data
|= MAGIC_EN
;
2576 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_CFG_WOL
, ocp_data
);
2578 if (wolopts
& WAKE_ANY
)
2579 device_set_wakeup_enable(&tp
->udev
->dev
, true);
2581 device_set_wakeup_enable(&tp
->udev
->dev
, false);
2584 static void r8153_mac_clk_spd(struct r8152
*tp
, bool enable
)
2586 /* MAC clock speed down */
2588 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_MAC_PWR_CTRL
,
2590 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_MAC_PWR_CTRL2
,
2592 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_MAC_PWR_CTRL3
,
2593 PKT_AVAIL_SPDWN_EN
| SUSPEND_SPDWN_EN
|
2594 U1U2_SPDWN_EN
| L1_SPDWN_EN
);
2595 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_MAC_PWR_CTRL4
,
2596 PWRSAVE_SPDWN_EN
| RXDV_SPDWN_EN
| TX10MIDLE_EN
|
2597 TP100_SPDWN_EN
| TP500_SPDWN_EN
| EEE_SPDWN_EN
|
2600 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_MAC_PWR_CTRL
, 0);
2601 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_MAC_PWR_CTRL2
, 0);
2602 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_MAC_PWR_CTRL3
, 0);
2603 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_MAC_PWR_CTRL4
, 0);
2607 static void r8153_u1u2en(struct r8152
*tp
, bool enable
)
2612 memset(u1u2
, 0xff, sizeof(u1u2
));
2614 memset(u1u2
, 0x00, sizeof(u1u2
));
2616 usb_ocp_write(tp
, USB_TOLERANCE
, BYTE_EN_SIX_BYTES
, sizeof(u1u2
), u1u2
);
2619 static void r8153b_u1u2en(struct r8152
*tp
, bool enable
)
2623 ocp_data
= ocp_read_word(tp
, MCU_TYPE_USB
, USB_LPM_CONFIG
);
2625 ocp_data
|= LPM_U1U2_EN
;
2627 ocp_data
&= ~LPM_U1U2_EN
;
2629 ocp_write_word(tp
, MCU_TYPE_USB
, USB_LPM_CONFIG
, ocp_data
);
2632 static void r8153_u2p3en(struct r8152
*tp
, bool enable
)
2636 ocp_data
= ocp_read_word(tp
, MCU_TYPE_USB
, USB_U2P3_CTRL
);
2638 ocp_data
|= U2P3_ENABLE
;
2640 ocp_data
&= ~U2P3_ENABLE
;
2641 ocp_write_word(tp
, MCU_TYPE_USB
, USB_U2P3_CTRL
, ocp_data
);
2644 static void r8153b_ups_flags_w1w0(struct r8152
*tp
, u32 set
, u32 clear
)
2648 ocp_data
= ocp_read_dword(tp
, MCU_TYPE_USB
, USB_UPS_FLAGS
);
2651 ocp_write_dword(tp
, MCU_TYPE_USB
, USB_UPS_FLAGS
, ocp_data
);
2654 static void r8153b_green_en(struct r8152
*tp
, bool enable
)
2659 sram_write(tp
, 0x8045, 0); /* 10M abiq&ldvbias */
2660 sram_write(tp
, 0x804d, 0x1222); /* 100M short abiq&ldvbias */
2661 sram_write(tp
, 0x805d, 0x0022); /* 1000M short abiq&ldvbias */
2663 sram_write(tp
, 0x8045, 0x2444); /* 10M abiq&ldvbias */
2664 sram_write(tp
, 0x804d, 0x2444); /* 100M short abiq&ldvbias */
2665 sram_write(tp
, 0x805d, 0x2444); /* 1000M short abiq&ldvbias */
2668 data
= sram_read(tp
, SRAM_GREEN_CFG
);
2669 data
|= GREEN_ETH_EN
;
2670 sram_write(tp
, SRAM_GREEN_CFG
, data
);
2672 r8153b_ups_flags_w1w0(tp
, UPS_FLAGS_EN_GREEN
, 0);
2675 static u16
r8153_phy_status(struct r8152
*tp
, u16 desired
)
2680 for (i
= 0; i
< 500; i
++) {
2681 data
= ocp_reg_read(tp
, OCP_PHY_STATUS
);
2682 data
&= PHY_STAT_MASK
;
2684 if (data
== desired
)
2686 } else if (data
== PHY_STAT_LAN_ON
|| data
== PHY_STAT_PWRDN
||
2687 data
== PHY_STAT_EXT_INIT
) {
2697 static void r8153b_ups_en(struct r8152
*tp
, bool enable
)
2699 u32 ocp_data
= ocp_read_byte(tp
, MCU_TYPE_USB
, USB_POWER_CUT
);
2702 ocp_data
|= UPS_EN
| USP_PREWAKE
| PHASE2_EN
;
2703 ocp_write_byte(tp
, MCU_TYPE_USB
, USB_POWER_CUT
, ocp_data
);
2705 ocp_data
= ocp_read_byte(tp
, MCU_TYPE_USB
, 0xcfff);
2707 ocp_write_byte(tp
, MCU_TYPE_USB
, 0xcfff, ocp_data
);
2711 ocp_data
&= ~(UPS_EN
| USP_PREWAKE
);
2712 ocp_write_byte(tp
, MCU_TYPE_USB
, USB_POWER_CUT
, ocp_data
);
2714 ocp_data
= ocp_read_byte(tp
, MCU_TYPE_USB
, 0xcfff);
2715 ocp_data
&= ~BIT(0);
2716 ocp_write_byte(tp
, MCU_TYPE_USB
, 0xcfff, ocp_data
);
2718 ocp_data
= ocp_read_word(tp
, MCU_TYPE_USB
, USB_MISC_0
);
2719 ocp_data
&= ~PCUT_STATUS
;
2720 ocp_write_word(tp
, MCU_TYPE_USB
, USB_MISC_0
, ocp_data
);
2722 data
= r8153_phy_status(tp
, 0);
2725 case PHY_STAT_PWRDN
:
2726 case PHY_STAT_EXT_INIT
:
2728 test_bit(GREEN_ETHERNET
, &tp
->flags
));
2730 data
= r8152_mdio_read(tp
, MII_BMCR
);
2731 data
&= ~BMCR_PDOWN
;
2733 r8152_mdio_write(tp
, MII_BMCR
, data
);
2735 data
= r8153_phy_status(tp
, PHY_STAT_LAN_ON
);
2738 if (data
!= PHY_STAT_LAN_ON
)
2739 netif_warn(tp
, link
, tp
->netdev
,
2746 static void r8153_power_cut_en(struct r8152
*tp
, bool enable
)
2750 ocp_data
= ocp_read_word(tp
, MCU_TYPE_USB
, USB_POWER_CUT
);
2752 ocp_data
|= PWR_EN
| PHASE2_EN
;
2754 ocp_data
&= ~(PWR_EN
| PHASE2_EN
);
2755 ocp_write_word(tp
, MCU_TYPE_USB
, USB_POWER_CUT
, ocp_data
);
2757 ocp_data
= ocp_read_word(tp
, MCU_TYPE_USB
, USB_MISC_0
);
2758 ocp_data
&= ~PCUT_STATUS
;
2759 ocp_write_word(tp
, MCU_TYPE_USB
, USB_MISC_0
, ocp_data
);
2762 static void r8153b_power_cut_en(struct r8152
*tp
, bool enable
)
2766 ocp_data
= ocp_read_word(tp
, MCU_TYPE_USB
, USB_POWER_CUT
);
2768 ocp_data
|= PWR_EN
| PHASE2_EN
;
2770 ocp_data
&= ~PWR_EN
;
2771 ocp_write_word(tp
, MCU_TYPE_USB
, USB_POWER_CUT
, ocp_data
);
2773 ocp_data
= ocp_read_word(tp
, MCU_TYPE_USB
, USB_MISC_0
);
2774 ocp_data
&= ~PCUT_STATUS
;
2775 ocp_write_word(tp
, MCU_TYPE_USB
, USB_MISC_0
, ocp_data
);
2778 static void r8153b_queue_wake(struct r8152
*tp
, bool enable
)
2782 ocp_data
= ocp_read_byte(tp
, MCU_TYPE_PLA
, 0xd38a);
2786 ocp_data
&= ~BIT(0);
2787 ocp_write_byte(tp
, MCU_TYPE_PLA
, 0xd38a, ocp_data
);
2789 ocp_data
= ocp_read_byte(tp
, MCU_TYPE_PLA
, 0xd38c);
2790 ocp_data
&= ~BIT(0);
2791 ocp_write_byte(tp
, MCU_TYPE_PLA
, 0xd38c, ocp_data
);
2794 static bool rtl_can_wakeup(struct r8152
*tp
)
2796 struct usb_device
*udev
= tp
->udev
;
2798 return (udev
->actconfig
->desc
.bmAttributes
& USB_CONFIG_ATT_WAKEUP
);
2801 static void rtl_runtime_suspend_enable(struct r8152
*tp
, bool enable
)
2806 __rtl_set_wol(tp
, WAKE_ANY
);
2808 ocp_write_byte(tp
, MCU_TYPE_PLA
, PLA_CRWECR
, CRWECR_CONFIG
);
2810 ocp_data
= ocp_read_word(tp
, MCU_TYPE_PLA
, PLA_CONFIG34
);
2811 ocp_data
|= LINK_OFF_WAKE_EN
;
2812 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_CONFIG34
, ocp_data
);
2814 ocp_write_byte(tp
, MCU_TYPE_PLA
, PLA_CRWECR
, CRWECR_NORAML
);
2818 __rtl_set_wol(tp
, tp
->saved_wolopts
);
2820 ocp_write_byte(tp
, MCU_TYPE_PLA
, PLA_CRWECR
, CRWECR_CONFIG
);
2822 ocp_data
= ocp_read_word(tp
, MCU_TYPE_PLA
, PLA_CONFIG34
);
2823 ocp_data
&= ~LINK_OFF_WAKE_EN
;
2824 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_CONFIG34
, ocp_data
);
2826 ocp_write_byte(tp
, MCU_TYPE_PLA
, PLA_CRWECR
, CRWECR_NORAML
);
2830 static void rtl8153_runtime_enable(struct r8152
*tp
, bool enable
)
2833 r8153_u1u2en(tp
, false);
2834 r8153_u2p3en(tp
, false);
2835 r8153_mac_clk_spd(tp
, true);
2836 rtl_runtime_suspend_enable(tp
, true);
2838 rtl_runtime_suspend_enable(tp
, false);
2839 r8153_mac_clk_spd(tp
, false);
2841 switch (tp
->version
) {
2848 r8153_u2p3en(tp
, true);
2852 r8153_u1u2en(tp
, true);
2856 static void rtl8153b_runtime_enable(struct r8152
*tp
, bool enable
)
2859 r8153b_queue_wake(tp
, true);
2860 r8153b_u1u2en(tp
, false);
2861 r8153_u2p3en(tp
, false);
2862 rtl_runtime_suspend_enable(tp
, true);
2863 r8153b_ups_en(tp
, true);
2865 r8153b_ups_en(tp
, false);
2866 r8153b_queue_wake(tp
, false);
2867 rtl_runtime_suspend_enable(tp
, false);
2868 r8153_u2p3en(tp
, true);
2869 r8153b_u1u2en(tp
, true);
2873 static void r8153_teredo_off(struct r8152
*tp
)
2877 switch (tp
->version
) {
2885 ocp_data
= ocp_read_word(tp
, MCU_TYPE_PLA
, PLA_TEREDO_CFG
);
2886 ocp_data
&= ~(TEREDO_SEL
| TEREDO_RS_EVENT_MASK
|
2888 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_TEREDO_CFG
, ocp_data
);
2893 /* The bit 0 ~ 7 are relative with teredo settings. They are
2894 * W1C (write 1 to clear), so set all 1 to disable it.
2896 ocp_write_byte(tp
, MCU_TYPE_PLA
, PLA_TEREDO_CFG
, 0xff);
2903 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_WDT6_CTRL
, WDT6_SET_MODE
);
2904 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_REALWOW_TIMER
, 0);
2905 ocp_write_dword(tp
, MCU_TYPE_PLA
, PLA_TEREDO_TIMER
, 0);
2908 static void rtl_reset_bmu(struct r8152
*tp
)
2912 ocp_data
= ocp_read_byte(tp
, MCU_TYPE_USB
, USB_BMU_RESET
);
2913 ocp_data
&= ~(BMU_RESET_EP_IN
| BMU_RESET_EP_OUT
);
2914 ocp_write_byte(tp
, MCU_TYPE_USB
, USB_BMU_RESET
, ocp_data
);
2915 ocp_data
|= BMU_RESET_EP_IN
| BMU_RESET_EP_OUT
;
2916 ocp_write_byte(tp
, MCU_TYPE_USB
, USB_BMU_RESET
, ocp_data
);
2919 static void r8152_aldps_en(struct r8152
*tp
, bool enable
)
2922 ocp_reg_write(tp
, OCP_ALDPS_CONFIG
, ENPWRSAVE
| ENPDNPS
|
2923 LINKENA
| DIS_SDSAVE
);
2925 ocp_reg_write(tp
, OCP_ALDPS_CONFIG
, ENPDNPS
| LINKENA
|
2931 static inline void r8152_mmd_indirect(struct r8152
*tp
, u16 dev
, u16 reg
)
2933 ocp_reg_write(tp
, OCP_EEE_AR
, FUN_ADDR
| dev
);
2934 ocp_reg_write(tp
, OCP_EEE_DATA
, reg
);
2935 ocp_reg_write(tp
, OCP_EEE_AR
, FUN_DATA
| dev
);
2938 static u16
r8152_mmd_read(struct r8152
*tp
, u16 dev
, u16 reg
)
2942 r8152_mmd_indirect(tp
, dev
, reg
);
2943 data
= ocp_reg_read(tp
, OCP_EEE_DATA
);
2944 ocp_reg_write(tp
, OCP_EEE_AR
, 0x0000);
2949 static void r8152_mmd_write(struct r8152
*tp
, u16 dev
, u16 reg
, u16 data
)
2951 r8152_mmd_indirect(tp
, dev
, reg
);
2952 ocp_reg_write(tp
, OCP_EEE_DATA
, data
);
2953 ocp_reg_write(tp
, OCP_EEE_AR
, 0x0000);
2956 static void r8152_eee_en(struct r8152
*tp
, bool enable
)
2958 u16 config1
, config2
, config3
;
2961 ocp_data
= ocp_read_word(tp
, MCU_TYPE_PLA
, PLA_EEE_CR
);
2962 config1
= ocp_reg_read(tp
, OCP_EEE_CONFIG1
) & ~sd_rise_time_mask
;
2963 config2
= ocp_reg_read(tp
, OCP_EEE_CONFIG2
);
2964 config3
= ocp_reg_read(tp
, OCP_EEE_CONFIG3
) & ~fast_snr_mask
;
2967 ocp_data
|= EEE_RX_EN
| EEE_TX_EN
;
2968 config1
|= EEE_10_CAP
| EEE_NWAY_EN
| TX_QUIET_EN
| RX_QUIET_EN
;
2969 config1
|= sd_rise_time(1);
2970 config2
|= RG_DACQUIET_EN
| RG_LDVQUIET_EN
;
2971 config3
|= fast_snr(42);
2973 ocp_data
&= ~(EEE_RX_EN
| EEE_TX_EN
);
2974 config1
&= ~(EEE_10_CAP
| EEE_NWAY_EN
| TX_QUIET_EN
|
2976 config1
|= sd_rise_time(7);
2977 config2
&= ~(RG_DACQUIET_EN
| RG_LDVQUIET_EN
);
2978 config3
|= fast_snr(511);
2981 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_EEE_CR
, ocp_data
);
2982 ocp_reg_write(tp
, OCP_EEE_CONFIG1
, config1
);
2983 ocp_reg_write(tp
, OCP_EEE_CONFIG2
, config2
);
2984 ocp_reg_write(tp
, OCP_EEE_CONFIG3
, config3
);
2987 static void r8152b_enable_eee(struct r8152
*tp
)
2989 r8152_eee_en(tp
, true);
2990 r8152_mmd_write(tp
, MDIO_MMD_AN
, MDIO_AN_EEE_ADV
, MDIO_EEE_100TX
);
2993 static void r8152b_enable_fc(struct r8152
*tp
)
2997 anar
= r8152_mdio_read(tp
, MII_ADVERTISE
);
2998 anar
|= ADVERTISE_PAUSE_CAP
| ADVERTISE_PAUSE_ASYM
;
2999 r8152_mdio_write(tp
, MII_ADVERTISE
, anar
);
3002 static void rtl8152_disable(struct r8152
*tp
)
3004 r8152_aldps_en(tp
, false);
3006 r8152_aldps_en(tp
, true);
3009 static void r8152b_hw_phy_cfg(struct r8152
*tp
)
3011 r8152b_enable_eee(tp
);
3012 r8152_aldps_en(tp
, true);
3013 r8152b_enable_fc(tp
);
3015 set_bit(PHY_RESET
, &tp
->flags
);
3018 static void r8152b_exit_oob(struct r8152
*tp
)
3023 ocp_data
= ocp_read_dword(tp
, MCU_TYPE_PLA
, PLA_RCR
);
3024 ocp_data
&= ~RCR_ACPT_ALL
;
3025 ocp_write_dword(tp
, MCU_TYPE_PLA
, PLA_RCR
, ocp_data
);
3027 rxdy_gated_en(tp
, true);
3028 r8153_teredo_off(tp
);
3029 ocp_write_byte(tp
, MCU_TYPE_PLA
, PLA_CRWECR
, CRWECR_NORAML
);
3030 ocp_write_byte(tp
, MCU_TYPE_PLA
, PLA_CR
, 0x00);
3032 ocp_data
= ocp_read_byte(tp
, MCU_TYPE_PLA
, PLA_OOB_CTRL
);
3033 ocp_data
&= ~NOW_IS_OOB
;
3034 ocp_write_byte(tp
, MCU_TYPE_PLA
, PLA_OOB_CTRL
, ocp_data
);
3036 ocp_data
= ocp_read_word(tp
, MCU_TYPE_PLA
, PLA_SFF_STS_7
);
3037 ocp_data
&= ~MCU_BORW_EN
;
3038 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_SFF_STS_7
, ocp_data
);
3040 for (i
= 0; i
< 1000; i
++) {
3041 ocp_data
= ocp_read_byte(tp
, MCU_TYPE_PLA
, PLA_OOB_CTRL
);
3042 if (ocp_data
& LINK_LIST_READY
)
3044 usleep_range(1000, 2000);
3047 ocp_data
= ocp_read_word(tp
, MCU_TYPE_PLA
, PLA_SFF_STS_7
);
3048 ocp_data
|= RE_INIT_LL
;
3049 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_SFF_STS_7
, ocp_data
);
3051 for (i
= 0; i
< 1000; i
++) {
3052 ocp_data
= ocp_read_byte(tp
, MCU_TYPE_PLA
, PLA_OOB_CTRL
);
3053 if (ocp_data
& LINK_LIST_READY
)
3055 usleep_range(1000, 2000);
3058 rtl8152_nic_reset(tp
);
3060 /* rx share fifo credit full threshold */
3061 ocp_write_dword(tp
, MCU_TYPE_PLA
, PLA_RXFIFO_CTRL0
, RXFIFO_THR1_NORMAL
);
3063 if (tp
->udev
->speed
== USB_SPEED_FULL
||
3064 tp
->udev
->speed
== USB_SPEED_LOW
) {
3065 /* rx share fifo credit near full threshold */
3066 ocp_write_dword(tp
, MCU_TYPE_PLA
, PLA_RXFIFO_CTRL1
,
3068 ocp_write_dword(tp
, MCU_TYPE_PLA
, PLA_RXFIFO_CTRL2
,
3071 /* rx share fifo credit near full threshold */
3072 ocp_write_dword(tp
, MCU_TYPE_PLA
, PLA_RXFIFO_CTRL1
,
3074 ocp_write_dword(tp
, MCU_TYPE_PLA
, PLA_RXFIFO_CTRL2
,
3078 /* TX share fifo free credit full threshold */
3079 ocp_write_dword(tp
, MCU_TYPE_PLA
, PLA_TXFIFO_CTRL
, TXFIFO_THR_NORMAL
);
3081 ocp_write_byte(tp
, MCU_TYPE_USB
, USB_TX_AGG
, TX_AGG_MAX_THRESHOLD
);
3082 ocp_write_dword(tp
, MCU_TYPE_USB
, USB_RX_BUF_TH
, RX_THR_HIGH
);
3083 ocp_write_dword(tp
, MCU_TYPE_USB
, USB_TX_DMA
,
3084 TEST_MODE_DISABLE
| TX_SIZE_ADJUST1
);
3086 rtl_rx_vlan_en(tp
, tp
->netdev
->features
& NETIF_F_HW_VLAN_CTAG_RX
);
3088 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_RMS
, RTL8152_RMS
);
3090 ocp_data
= ocp_read_word(tp
, MCU_TYPE_PLA
, PLA_TCR0
);
3091 ocp_data
|= TCR0_AUTO_FIFO
;
3092 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_TCR0
, ocp_data
);
3095 static void r8152b_enter_oob(struct r8152
*tp
)
3100 ocp_data
= ocp_read_byte(tp
, MCU_TYPE_PLA
, PLA_OOB_CTRL
);
3101 ocp_data
&= ~NOW_IS_OOB
;
3102 ocp_write_byte(tp
, MCU_TYPE_PLA
, PLA_OOB_CTRL
, ocp_data
);
3104 ocp_write_dword(tp
, MCU_TYPE_PLA
, PLA_RXFIFO_CTRL0
, RXFIFO_THR1_OOB
);
3105 ocp_write_dword(tp
, MCU_TYPE_PLA
, PLA_RXFIFO_CTRL1
, RXFIFO_THR2_OOB
);
3106 ocp_write_dword(tp
, MCU_TYPE_PLA
, PLA_RXFIFO_CTRL2
, RXFIFO_THR3_OOB
);
3110 for (i
= 0; i
< 1000; i
++) {
3111 ocp_data
= ocp_read_byte(tp
, MCU_TYPE_PLA
, PLA_OOB_CTRL
);
3112 if (ocp_data
& LINK_LIST_READY
)
3114 usleep_range(1000, 2000);
3117 ocp_data
= ocp_read_word(tp
, MCU_TYPE_PLA
, PLA_SFF_STS_7
);
3118 ocp_data
|= RE_INIT_LL
;
3119 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_SFF_STS_7
, ocp_data
);
3121 for (i
= 0; i
< 1000; i
++) {
3122 ocp_data
= ocp_read_byte(tp
, MCU_TYPE_PLA
, PLA_OOB_CTRL
);
3123 if (ocp_data
& LINK_LIST_READY
)
3125 usleep_range(1000, 2000);
3128 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_RMS
, RTL8152_RMS
);
3130 rtl_rx_vlan_en(tp
, true);
3132 ocp_data
= ocp_read_word(tp
, MCU_TYPE_PLA
, PAL_BDC_CR
);
3133 ocp_data
|= ALDPS_PROXY_MODE
;
3134 ocp_write_word(tp
, MCU_TYPE_PLA
, PAL_BDC_CR
, ocp_data
);
3136 ocp_data
= ocp_read_byte(tp
, MCU_TYPE_PLA
, PLA_OOB_CTRL
);
3137 ocp_data
|= NOW_IS_OOB
| DIS_MCU_CLROOB
;
3138 ocp_write_byte(tp
, MCU_TYPE_PLA
, PLA_OOB_CTRL
, ocp_data
);
3140 rxdy_gated_en(tp
, false);
3142 ocp_data
= ocp_read_dword(tp
, MCU_TYPE_PLA
, PLA_RCR
);
3143 ocp_data
|= RCR_APM
| RCR_AM
| RCR_AB
;
3144 ocp_write_dword(tp
, MCU_TYPE_PLA
, PLA_RCR
, ocp_data
);
3147 static int r8153_patch_request(struct r8152
*tp
, bool request
)
3152 data
= ocp_reg_read(tp
, OCP_PHY_PATCH_CMD
);
3154 data
|= PATCH_REQUEST
;
3156 data
&= ~PATCH_REQUEST
;
3157 ocp_reg_write(tp
, OCP_PHY_PATCH_CMD
, data
);
3159 for (i
= 0; request
&& i
< 5000; i
++) {
3160 usleep_range(1000, 2000);
3161 if (ocp_reg_read(tp
, OCP_PHY_PATCH_STAT
) & PATCH_READY
)
3165 if (request
&& !(ocp_reg_read(tp
, OCP_PHY_PATCH_STAT
) & PATCH_READY
)) {
3166 netif_err(tp
, drv
, tp
->netdev
, "patch request fail\n");
3167 r8153_patch_request(tp
, false);
3174 static void r8153_aldps_en(struct r8152
*tp
, bool enable
)
3178 data
= ocp_reg_read(tp
, OCP_POWER_CFG
);
3181 ocp_reg_write(tp
, OCP_POWER_CFG
, data
);
3186 ocp_reg_write(tp
, OCP_POWER_CFG
, data
);
3187 for (i
= 0; i
< 20; i
++) {
3188 usleep_range(1000, 2000);
3189 if (ocp_read_word(tp
, MCU_TYPE_PLA
, 0xe000) & 0x0100)
3195 static void r8153b_aldps_en(struct r8152
*tp
, bool enable
)
3197 r8153_aldps_en(tp
, enable
);
3200 r8153b_ups_flags_w1w0(tp
, UPS_FLAGS_EN_ALDPS
, 0);
3202 r8153b_ups_flags_w1w0(tp
, 0, UPS_FLAGS_EN_ALDPS
);
3205 static void r8153_eee_en(struct r8152
*tp
, bool enable
)
3210 ocp_data
= ocp_read_word(tp
, MCU_TYPE_PLA
, PLA_EEE_CR
);
3211 config
= ocp_reg_read(tp
, OCP_EEE_CFG
);
3214 ocp_data
|= EEE_RX_EN
| EEE_TX_EN
;
3217 ocp_data
&= ~(EEE_RX_EN
| EEE_TX_EN
);
3218 config
&= ~EEE10_EN
;
3221 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_EEE_CR
, ocp_data
);
3222 ocp_reg_write(tp
, OCP_EEE_CFG
, config
);
3225 static void r8153b_eee_en(struct r8152
*tp
, bool enable
)
3227 r8153_eee_en(tp
, enable
);
3230 r8153b_ups_flags_w1w0(tp
, UPS_FLAGS_EN_EEE
, 0);
3232 r8153b_ups_flags_w1w0(tp
, 0, UPS_FLAGS_EN_EEE
);
3235 static void r8153b_enable_fc(struct r8152
*tp
)
3237 r8152b_enable_fc(tp
);
3238 r8153b_ups_flags_w1w0(tp
, UPS_FLAGS_EN_FLOW_CTR
, 0);
3241 static void r8153_hw_phy_cfg(struct r8152
*tp
)
3246 /* disable ALDPS before updating the PHY parameters */
3247 r8153_aldps_en(tp
, false);
3249 /* disable EEE before updating the PHY parameters */
3250 r8153_eee_en(tp
, false);
3251 ocp_reg_write(tp
, OCP_EEE_ADV
, 0);
3253 if (tp
->version
== RTL_VER_03
) {
3254 data
= ocp_reg_read(tp
, OCP_EEE_CFG
);
3255 data
&= ~CTAP_SHORT_EN
;
3256 ocp_reg_write(tp
, OCP_EEE_CFG
, data
);
3259 data
= ocp_reg_read(tp
, OCP_POWER_CFG
);
3260 data
|= EEE_CLKDIV_EN
;
3261 ocp_reg_write(tp
, OCP_POWER_CFG
, data
);
3263 data
= ocp_reg_read(tp
, OCP_DOWN_SPEED
);
3264 data
|= EN_10M_BGOFF
;
3265 ocp_reg_write(tp
, OCP_DOWN_SPEED
, data
);
3266 data
= ocp_reg_read(tp
, OCP_POWER_CFG
);
3267 data
|= EN_10M_PLLOFF
;
3268 ocp_reg_write(tp
, OCP_POWER_CFG
, data
);
3269 sram_write(tp
, SRAM_IMPEDANCE
, 0x0b13);
3271 ocp_data
= ocp_read_word(tp
, MCU_TYPE_PLA
, PLA_PHY_PWR
);
3272 ocp_data
|= PFM_PWM_SWITCH
;
3273 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_PHY_PWR
, ocp_data
);
3275 /* Enable LPF corner auto tune */
3276 sram_write(tp
, SRAM_LPF_CFG
, 0xf70f);
3278 /* Adjust 10M Amplitude */
3279 sram_write(tp
, SRAM_10M_AMP1
, 0x00af);
3280 sram_write(tp
, SRAM_10M_AMP2
, 0x0208);
3282 r8153_eee_en(tp
, true);
3283 ocp_reg_write(tp
, OCP_EEE_ADV
, MDIO_EEE_1000T
| MDIO_EEE_100TX
);
3285 r8153_aldps_en(tp
, true);
3286 r8152b_enable_fc(tp
);
3288 switch (tp
->version
) {
3295 r8153_u2p3en(tp
, true);
3299 set_bit(PHY_RESET
, &tp
->flags
);
3302 static u32
r8152_efuse_read(struct r8152
*tp
, u8 addr
)
3306 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_EFUSE_CMD
, EFUSE_READ_CMD
| addr
);
3307 ocp_data
= ocp_read_word(tp
, MCU_TYPE_PLA
, PLA_EFUSE_CMD
);
3308 ocp_data
= (ocp_data
& EFUSE_DATA_BIT16
) << 9; /* data of bit16 */
3309 ocp_data
|= ocp_read_word(tp
, MCU_TYPE_PLA
, PLA_EFUSE_DATA
);
3314 static void r8153b_hw_phy_cfg(struct r8152
*tp
)
3316 u32 ocp_data
, ups_flags
= 0;
3319 /* disable ALDPS before updating the PHY parameters */
3320 r8153b_aldps_en(tp
, false);
3322 /* disable EEE before updating the PHY parameters */
3323 r8153b_eee_en(tp
, false);
3324 ocp_reg_write(tp
, OCP_EEE_ADV
, 0);
3326 r8153b_green_en(tp
, test_bit(GREEN_ETHERNET
, &tp
->flags
));
3328 data
= sram_read(tp
, SRAM_GREEN_CFG
);
3330 sram_write(tp
, SRAM_GREEN_CFG
, data
);
3331 data
= ocp_reg_read(tp
, OCP_NCTL_CFG
);
3332 data
|= PGA_RETURN_EN
;
3333 ocp_reg_write(tp
, OCP_NCTL_CFG
, data
);
3335 /* ADC Bias Calibration:
3336 * read efuse offset 0x7d to get a 17-bit data. Remove the dummy/fake
3337 * bit (bit3) to rebuild the real 16-bit data. Write the data to the
3340 ocp_data
= r8152_efuse_read(tp
, 0x7d);
3341 data
= (u16
)(((ocp_data
& 0x1fff0) >> 1) | (ocp_data
& 0x7));
3343 ocp_reg_write(tp
, OCP_ADC_IOFFSET
, data
);
3345 /* ups mode tx-link-pulse timing adjustment:
3346 * rg_saw_cnt = OCP reg 0xC426 Bit[13:0]
3347 * swr_cnt_1ms_ini = 16000000 / rg_saw_cnt
3349 ocp_data
= ocp_reg_read(tp
, 0xc426);
3352 u32 swr_cnt_1ms_ini
;
3354 swr_cnt_1ms_ini
= (16000000 / ocp_data
) & SAW_CNT_1MS_MASK
;
3355 ocp_data
= ocp_read_word(tp
, MCU_TYPE_USB
, USB_UPS_CFG
);
3356 ocp_data
= (ocp_data
& ~SAW_CNT_1MS_MASK
) | swr_cnt_1ms_ini
;
3357 ocp_write_word(tp
, MCU_TYPE_USB
, USB_UPS_CFG
, ocp_data
);
3360 ocp_data
= ocp_read_word(tp
, MCU_TYPE_PLA
, PLA_PHY_PWR
);
3361 ocp_data
|= PFM_PWM_SWITCH
;
3362 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_PHY_PWR
, ocp_data
);
3365 if (!r8153_patch_request(tp
, true)) {
3366 data
= ocp_reg_read(tp
, OCP_POWER_CFG
);
3367 data
|= EEE_CLKDIV_EN
;
3368 ocp_reg_write(tp
, OCP_POWER_CFG
, data
);
3370 data
= ocp_reg_read(tp
, OCP_DOWN_SPEED
);
3371 data
|= EN_EEE_CMODE
| EN_EEE_1000
| EN_10M_CLKDIV
;
3372 ocp_reg_write(tp
, OCP_DOWN_SPEED
, data
);
3374 ocp_reg_write(tp
, OCP_SYSCLK_CFG
, 0);
3375 ocp_reg_write(tp
, OCP_SYSCLK_CFG
, clk_div_expo(5));
3377 ups_flags
|= UPS_FLAGS_EN_10M_CKDIV
| UPS_FLAGS_250M_CKDIV
|
3378 UPS_FLAGS_EN_EEE_CKDIV
| UPS_FLAGS_EEE_CMOD_LV_EN
|
3379 UPS_FLAGS_EEE_PLLOFF_GIGA
;
3381 r8153_patch_request(tp
, false);
3384 r8153b_ups_flags_w1w0(tp
, ups_flags
, 0);
3386 r8153b_eee_en(tp
, true);
3387 ocp_reg_write(tp
, OCP_EEE_ADV
, MDIO_EEE_1000T
| MDIO_EEE_100TX
);
3389 r8153b_aldps_en(tp
, true);
3390 r8153b_enable_fc(tp
);
3391 r8153_u2p3en(tp
, true);
3393 set_bit(PHY_RESET
, &tp
->flags
);
3396 static void r8153_first_init(struct r8152
*tp
)
3401 r8153_mac_clk_spd(tp
, false);
3402 rxdy_gated_en(tp
, true);
3403 r8153_teredo_off(tp
);
3405 ocp_data
= ocp_read_dword(tp
, MCU_TYPE_PLA
, PLA_RCR
);
3406 ocp_data
&= ~RCR_ACPT_ALL
;
3407 ocp_write_dword(tp
, MCU_TYPE_PLA
, PLA_RCR
, ocp_data
);
3409 rtl8152_nic_reset(tp
);
3412 ocp_data
= ocp_read_byte(tp
, MCU_TYPE_PLA
, PLA_OOB_CTRL
);
3413 ocp_data
&= ~NOW_IS_OOB
;
3414 ocp_write_byte(tp
, MCU_TYPE_PLA
, PLA_OOB_CTRL
, ocp_data
);
3416 ocp_data
= ocp_read_word(tp
, MCU_TYPE_PLA
, PLA_SFF_STS_7
);
3417 ocp_data
&= ~MCU_BORW_EN
;
3418 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_SFF_STS_7
, ocp_data
);
3420 for (i
= 0; i
< 1000; i
++) {
3421 ocp_data
= ocp_read_byte(tp
, MCU_TYPE_PLA
, PLA_OOB_CTRL
);
3422 if (ocp_data
& LINK_LIST_READY
)
3424 usleep_range(1000, 2000);
3427 ocp_data
= ocp_read_word(tp
, MCU_TYPE_PLA
, PLA_SFF_STS_7
);
3428 ocp_data
|= RE_INIT_LL
;
3429 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_SFF_STS_7
, ocp_data
);
3431 for (i
= 0; i
< 1000; i
++) {
3432 ocp_data
= ocp_read_byte(tp
, MCU_TYPE_PLA
, PLA_OOB_CTRL
);
3433 if (ocp_data
& LINK_LIST_READY
)
3435 usleep_range(1000, 2000);
3438 rtl_rx_vlan_en(tp
, tp
->netdev
->features
& NETIF_F_HW_VLAN_CTAG_RX
);
3440 ocp_data
= tp
->netdev
->mtu
+ VLAN_ETH_HLEN
+ CRC_SIZE
;
3441 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_RMS
, ocp_data
);
3442 ocp_write_byte(tp
, MCU_TYPE_PLA
, PLA_MTPS
, MTPS_JUMBO
);
3444 ocp_data
= ocp_read_word(tp
, MCU_TYPE_PLA
, PLA_TCR0
);
3445 ocp_data
|= TCR0_AUTO_FIFO
;
3446 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_TCR0
, ocp_data
);
3448 rtl8152_nic_reset(tp
);
3450 /* rx share fifo credit full threshold */
3451 ocp_write_dword(tp
, MCU_TYPE_PLA
, PLA_RXFIFO_CTRL0
, RXFIFO_THR1_NORMAL
);
3452 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_RXFIFO_CTRL1
, RXFIFO_THR2_NORMAL
);
3453 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_RXFIFO_CTRL2
, RXFIFO_THR3_NORMAL
);
3454 /* TX share fifo free credit full threshold */
3455 ocp_write_dword(tp
, MCU_TYPE_PLA
, PLA_TXFIFO_CTRL
, TXFIFO_THR_NORMAL2
);
3458 static void r8153_enter_oob(struct r8152
*tp
)
3463 r8153_mac_clk_spd(tp
, true);
3465 ocp_data
= ocp_read_byte(tp
, MCU_TYPE_PLA
, PLA_OOB_CTRL
);
3466 ocp_data
&= ~NOW_IS_OOB
;
3467 ocp_write_byte(tp
, MCU_TYPE_PLA
, PLA_OOB_CTRL
, ocp_data
);
3472 for (i
= 0; i
< 1000; i
++) {
3473 ocp_data
= ocp_read_byte(tp
, MCU_TYPE_PLA
, PLA_OOB_CTRL
);
3474 if (ocp_data
& LINK_LIST_READY
)
3476 usleep_range(1000, 2000);
3479 ocp_data
= ocp_read_word(tp
, MCU_TYPE_PLA
, PLA_SFF_STS_7
);
3480 ocp_data
|= RE_INIT_LL
;
3481 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_SFF_STS_7
, ocp_data
);
3483 for (i
= 0; i
< 1000; i
++) {
3484 ocp_data
= ocp_read_byte(tp
, MCU_TYPE_PLA
, PLA_OOB_CTRL
);
3485 if (ocp_data
& LINK_LIST_READY
)
3487 usleep_range(1000, 2000);
3490 ocp_data
= tp
->netdev
->mtu
+ VLAN_ETH_HLEN
+ CRC_SIZE
;
3491 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_RMS
, ocp_data
);
3493 switch (tp
->version
) {
3498 ocp_data
= ocp_read_word(tp
, MCU_TYPE_PLA
, PLA_TEREDO_CFG
);
3499 ocp_data
&= ~TEREDO_WAKE_MASK
;
3500 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_TEREDO_CFG
, ocp_data
);
3505 /* Clear teredo wake event. bit[15:8] is the teredo wakeup
3506 * type. Set it to zero. bits[7:0] are the W1C bits about
3507 * the events. Set them to all 1 to clear them.
3509 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_TEREDO_WAKE_BASE
, 0x00ff);
3516 rtl_rx_vlan_en(tp
, true);
3518 ocp_data
= ocp_read_word(tp
, MCU_TYPE_PLA
, PAL_BDC_CR
);
3519 ocp_data
|= ALDPS_PROXY_MODE
;
3520 ocp_write_word(tp
, MCU_TYPE_PLA
, PAL_BDC_CR
, ocp_data
);
3522 ocp_data
= ocp_read_byte(tp
, MCU_TYPE_PLA
, PLA_OOB_CTRL
);
3523 ocp_data
|= NOW_IS_OOB
| DIS_MCU_CLROOB
;
3524 ocp_write_byte(tp
, MCU_TYPE_PLA
, PLA_OOB_CTRL
, ocp_data
);
3526 rxdy_gated_en(tp
, false);
3528 ocp_data
= ocp_read_dword(tp
, MCU_TYPE_PLA
, PLA_RCR
);
3529 ocp_data
|= RCR_APM
| RCR_AM
| RCR_AB
;
3530 ocp_write_dword(tp
, MCU_TYPE_PLA
, PLA_RCR
, ocp_data
);
3533 static void rtl8153_disable(struct r8152
*tp
)
3535 r8153_aldps_en(tp
, false);
3538 r8153_aldps_en(tp
, true);
3541 static void rtl8153b_disable(struct r8152
*tp
)
3543 r8153b_aldps_en(tp
, false);
3546 r8153b_aldps_en(tp
, true);
3549 static int rtl8152_set_speed(struct r8152
*tp
, u8 autoneg
, u16 speed
, u8 duplex
)
3551 u16 bmcr
, anar
, gbcr
;
3552 enum spd_duplex speed_duplex
;
3555 anar
= r8152_mdio_read(tp
, MII_ADVERTISE
);
3556 anar
&= ~(ADVERTISE_10HALF
| ADVERTISE_10FULL
|
3557 ADVERTISE_100HALF
| ADVERTISE_100FULL
);
3558 if (tp
->mii
.supports_gmii
) {
3559 gbcr
= r8152_mdio_read(tp
, MII_CTRL1000
);
3560 gbcr
&= ~(ADVERTISE_1000FULL
| ADVERTISE_1000HALF
);
3565 if (autoneg
== AUTONEG_DISABLE
) {
3566 if (speed
== SPEED_10
) {
3568 anar
|= ADVERTISE_10HALF
| ADVERTISE_10FULL
;
3569 speed_duplex
= FORCE_10M_HALF
;
3570 } else if (speed
== SPEED_100
) {
3571 bmcr
= BMCR_SPEED100
;
3572 anar
|= ADVERTISE_100HALF
| ADVERTISE_100FULL
;
3573 speed_duplex
= FORCE_100M_HALF
;
3574 } else if (speed
== SPEED_1000
&& tp
->mii
.supports_gmii
) {
3575 bmcr
= BMCR_SPEED1000
;
3576 gbcr
|= ADVERTISE_1000FULL
| ADVERTISE_1000HALF
;
3577 speed_duplex
= NWAY_1000M_FULL
;
3583 if (duplex
== DUPLEX_FULL
) {
3584 bmcr
|= BMCR_FULLDPLX
;
3585 if (speed
!= SPEED_1000
)
3589 if (speed
== SPEED_10
) {
3590 if (duplex
== DUPLEX_FULL
) {
3591 anar
|= ADVERTISE_10HALF
| ADVERTISE_10FULL
;
3592 speed_duplex
= NWAY_10M_FULL
;
3594 anar
|= ADVERTISE_10HALF
;
3595 speed_duplex
= NWAY_10M_HALF
;
3597 } else if (speed
== SPEED_100
) {
3598 if (duplex
== DUPLEX_FULL
) {
3599 anar
|= ADVERTISE_10HALF
| ADVERTISE_10FULL
;
3600 anar
|= ADVERTISE_100HALF
| ADVERTISE_100FULL
;
3601 speed_duplex
= NWAY_100M_FULL
;
3603 anar
|= ADVERTISE_10HALF
;
3604 anar
|= ADVERTISE_100HALF
;
3605 speed_duplex
= NWAY_100M_HALF
;
3607 } else if (speed
== SPEED_1000
&& tp
->mii
.supports_gmii
) {
3608 if (duplex
== DUPLEX_FULL
) {
3609 anar
|= ADVERTISE_10HALF
| ADVERTISE_10FULL
;
3610 anar
|= ADVERTISE_100HALF
| ADVERTISE_100FULL
;
3611 gbcr
|= ADVERTISE_1000FULL
| ADVERTISE_1000HALF
;
3613 anar
|= ADVERTISE_10HALF
;
3614 anar
|= ADVERTISE_100HALF
;
3615 gbcr
|= ADVERTISE_1000HALF
;
3617 speed_duplex
= NWAY_1000M_FULL
;
3623 bmcr
= BMCR_ANENABLE
| BMCR_ANRESTART
;
3626 if (test_and_clear_bit(PHY_RESET
, &tp
->flags
))
3629 if (tp
->mii
.supports_gmii
)
3630 r8152_mdio_write(tp
, MII_CTRL1000
, gbcr
);
3632 r8152_mdio_write(tp
, MII_ADVERTISE
, anar
);
3633 r8152_mdio_write(tp
, MII_BMCR
, bmcr
);
3635 switch (tp
->version
) {
3638 r8153b_ups_flags_w1w0(tp
, ups_flags_speed(speed_duplex
),
3639 UPS_FLAGS_SPEED_MASK
);
3646 if (bmcr
& BMCR_RESET
) {
3649 for (i
= 0; i
< 50; i
++) {
3651 if ((r8152_mdio_read(tp
, MII_BMCR
) & BMCR_RESET
) == 0)
3660 static void rtl8152_up(struct r8152
*tp
)
3662 if (test_bit(RTL8152_UNPLUG
, &tp
->flags
))
3665 r8152_aldps_en(tp
, false);
3666 r8152b_exit_oob(tp
);
3667 r8152_aldps_en(tp
, true);
3670 static void rtl8152_down(struct r8152
*tp
)
3672 if (test_bit(RTL8152_UNPLUG
, &tp
->flags
)) {
3673 rtl_drop_queued_tx(tp
);
3677 r8152_power_cut_en(tp
, false);
3678 r8152_aldps_en(tp
, false);
3679 r8152b_enter_oob(tp
);
3680 r8152_aldps_en(tp
, true);
3683 static void rtl8153_up(struct r8152
*tp
)
3685 if (test_bit(RTL8152_UNPLUG
, &tp
->flags
))
3688 r8153_u1u2en(tp
, false);
3689 r8153_u2p3en(tp
, false);
3690 r8153_aldps_en(tp
, false);
3691 r8153_first_init(tp
);
3692 r8153_aldps_en(tp
, true);
3694 switch (tp
->version
) {
3701 r8153_u2p3en(tp
, true);
3705 r8153_u1u2en(tp
, true);
3708 static void rtl8153_down(struct r8152
*tp
)
3710 if (test_bit(RTL8152_UNPLUG
, &tp
->flags
)) {
3711 rtl_drop_queued_tx(tp
);
3715 r8153_u1u2en(tp
, false);
3716 r8153_u2p3en(tp
, false);
3717 r8153_power_cut_en(tp
, false);
3718 r8153_aldps_en(tp
, false);
3719 r8153_enter_oob(tp
);
3720 r8153_aldps_en(tp
, true);
3723 static void rtl8153b_up(struct r8152
*tp
)
3725 if (test_bit(RTL8152_UNPLUG
, &tp
->flags
))
3728 r8153b_u1u2en(tp
, false);
3729 r8153_u2p3en(tp
, false);
3730 r8153b_aldps_en(tp
, false);
3732 r8153_first_init(tp
);
3733 ocp_write_dword(tp
, MCU_TYPE_USB
, USB_RX_BUF_TH
, RX_THR_B
);
3735 r8153b_aldps_en(tp
, true);
3736 r8153_u2p3en(tp
, true);
3737 r8153b_u1u2en(tp
, true);
3740 static void rtl8153b_down(struct r8152
*tp
)
3742 if (test_bit(RTL8152_UNPLUG
, &tp
->flags
)) {
3743 rtl_drop_queued_tx(tp
);
3747 r8153b_u1u2en(tp
, false);
3748 r8153_u2p3en(tp
, false);
3749 r8153b_power_cut_en(tp
, false);
3750 r8153b_aldps_en(tp
, false);
3751 r8153_enter_oob(tp
);
3752 r8153b_aldps_en(tp
, true);
3755 static bool rtl8152_in_nway(struct r8152
*tp
)
3759 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_OCP_GPHY_BASE
, 0x2000);
3760 tp
->ocp_base
= 0x2000;
3761 ocp_write_byte(tp
, MCU_TYPE_PLA
, 0xb014, 0x4c); /* phy state */
3762 nway_state
= ocp_read_word(tp
, MCU_TYPE_PLA
, 0xb01a);
3764 /* bit 15: TXDIS_STATE, bit 14: ABD_STATE */
3765 if (nway_state
& 0xc000)
3771 static bool rtl8153_in_nway(struct r8152
*tp
)
3773 u16 phy_state
= ocp_reg_read(tp
, OCP_PHY_STATE
) & 0xff;
3775 if (phy_state
== TXDIS_STATE
|| phy_state
== ABD_STATE
)
3781 static void set_carrier(struct r8152
*tp
)
3783 struct net_device
*netdev
= tp
->netdev
;
3784 struct napi_struct
*napi
= &tp
->napi
;
3787 speed
= rtl8152_get_speed(tp
);
3789 if (speed
& LINK_STATUS
) {
3790 if (!netif_carrier_ok(netdev
)) {
3791 tp
->rtl_ops
.enable(tp
);
3792 set_bit(RTL8152_SET_RX_MODE
, &tp
->flags
);
3793 netif_stop_queue(netdev
);
3795 netif_carrier_on(netdev
);
3797 napi_enable(&tp
->napi
);
3798 netif_wake_queue(netdev
);
3799 netif_info(tp
, link
, netdev
, "carrier on\n");
3800 } else if (netif_queue_stopped(netdev
) &&
3801 skb_queue_len(&tp
->tx_queue
) < tp
->tx_qlen
) {
3802 netif_wake_queue(netdev
);
3805 if (netif_carrier_ok(netdev
)) {
3806 netif_carrier_off(netdev
);
3808 tp
->rtl_ops
.disable(tp
);
3810 netif_info(tp
, link
, netdev
, "carrier off\n");
3815 static void rtl_work_func_t(struct work_struct
*work
)
3817 struct r8152
*tp
= container_of(work
, struct r8152
, schedule
.work
);
3819 /* If the device is unplugged or !netif_running(), the workqueue
3820 * doesn't need to wake the device, and could return directly.
3822 if (test_bit(RTL8152_UNPLUG
, &tp
->flags
) || !netif_running(tp
->netdev
))
3825 if (usb_autopm_get_interface(tp
->intf
) < 0)
3828 if (!test_bit(WORK_ENABLE
, &tp
->flags
))
3831 if (!mutex_trylock(&tp
->control
)) {
3832 schedule_delayed_work(&tp
->schedule
, 0);
3836 if (test_and_clear_bit(RTL8152_LINK_CHG
, &tp
->flags
))
3839 if (test_and_clear_bit(RTL8152_SET_RX_MODE
, &tp
->flags
))
3840 _rtl8152_set_rx_mode(tp
->netdev
);
3842 /* don't schedule napi before linking */
3843 if (test_and_clear_bit(SCHEDULE_NAPI
, &tp
->flags
) &&
3844 netif_carrier_ok(tp
->netdev
))
3845 napi_schedule(&tp
->napi
);
3847 mutex_unlock(&tp
->control
);
3850 usb_autopm_put_interface(tp
->intf
);
3853 static void rtl_hw_phy_work_func_t(struct work_struct
*work
)
3855 struct r8152
*tp
= container_of(work
, struct r8152
, hw_phy_work
.work
);
3857 if (test_bit(RTL8152_UNPLUG
, &tp
->flags
))
3860 if (usb_autopm_get_interface(tp
->intf
) < 0)
3863 mutex_lock(&tp
->control
);
3865 tp
->rtl_ops
.hw_phy_cfg(tp
);
3867 rtl8152_set_speed(tp
, tp
->autoneg
, tp
->speed
, tp
->duplex
);
3869 mutex_unlock(&tp
->control
);
3871 usb_autopm_put_interface(tp
->intf
);
3874 #ifdef CONFIG_PM_SLEEP
3875 static int rtl_notifier(struct notifier_block
*nb
, unsigned long action
,
3878 struct r8152
*tp
= container_of(nb
, struct r8152
, pm_notifier
);
3881 case PM_HIBERNATION_PREPARE
:
3882 case PM_SUSPEND_PREPARE
:
3883 usb_autopm_get_interface(tp
->intf
);
3886 case PM_POST_HIBERNATION
:
3887 case PM_POST_SUSPEND
:
3888 usb_autopm_put_interface(tp
->intf
);
3891 case PM_POST_RESTORE
:
3892 case PM_RESTORE_PREPARE
:
3901 static int rtl8152_open(struct net_device
*netdev
)
3903 struct r8152
*tp
= netdev_priv(netdev
);
3906 res
= alloc_all_mem(tp
);
3910 res
= usb_autopm_get_interface(tp
->intf
);
3914 mutex_lock(&tp
->control
);
3918 netif_carrier_off(netdev
);
3919 netif_start_queue(netdev
);
3920 set_bit(WORK_ENABLE
, &tp
->flags
);
3922 res
= usb_submit_urb(tp
->intr_urb
, GFP_KERNEL
);
3925 netif_device_detach(tp
->netdev
);
3926 netif_warn(tp
, ifup
, netdev
, "intr_urb submit failed: %d\n",
3930 napi_enable(&tp
->napi
);
3932 mutex_unlock(&tp
->control
);
3934 usb_autopm_put_interface(tp
->intf
);
3935 #ifdef CONFIG_PM_SLEEP
3936 tp
->pm_notifier
.notifier_call
= rtl_notifier
;
3937 register_pm_notifier(&tp
->pm_notifier
);
3942 mutex_unlock(&tp
->control
);
3943 usb_autopm_put_interface(tp
->intf
);
3950 static int rtl8152_close(struct net_device
*netdev
)
3952 struct r8152
*tp
= netdev_priv(netdev
);
3955 #ifdef CONFIG_PM_SLEEP
3956 unregister_pm_notifier(&tp
->pm_notifier
);
3958 napi_disable(&tp
->napi
);
3959 clear_bit(WORK_ENABLE
, &tp
->flags
);
3960 usb_kill_urb(tp
->intr_urb
);
3961 cancel_delayed_work_sync(&tp
->schedule
);
3962 netif_stop_queue(netdev
);
3964 res
= usb_autopm_get_interface(tp
->intf
);
3965 if (res
< 0 || test_bit(RTL8152_UNPLUG
, &tp
->flags
)) {
3966 rtl_drop_queued_tx(tp
);
3969 mutex_lock(&tp
->control
);
3971 tp
->rtl_ops
.down(tp
);
3973 mutex_unlock(&tp
->control
);
3975 usb_autopm_put_interface(tp
->intf
);
3983 static void rtl_tally_reset(struct r8152
*tp
)
3987 ocp_data
= ocp_read_word(tp
, MCU_TYPE_PLA
, PLA_RSTTALLY
);
3988 ocp_data
|= TALLY_RESET
;
3989 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_RSTTALLY
, ocp_data
);
3992 static void r8152b_init(struct r8152
*tp
)
3997 if (test_bit(RTL8152_UNPLUG
, &tp
->flags
))
4000 data
= r8152_mdio_read(tp
, MII_BMCR
);
4001 if (data
& BMCR_PDOWN
) {
4002 data
&= ~BMCR_PDOWN
;
4003 r8152_mdio_write(tp
, MII_BMCR
, data
);
4006 r8152_aldps_en(tp
, false);
4008 if (tp
->version
== RTL_VER_01
) {
4009 ocp_data
= ocp_read_word(tp
, MCU_TYPE_PLA
, PLA_LED_FEATURE
);
4010 ocp_data
&= ~LED_MODE_MASK
;
4011 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_LED_FEATURE
, ocp_data
);
4014 r8152_power_cut_en(tp
, false);
4016 ocp_data
= ocp_read_word(tp
, MCU_TYPE_PLA
, PLA_PHY_PWR
);
4017 ocp_data
|= TX_10M_IDLE_EN
| PFM_PWM_SWITCH
;
4018 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_PHY_PWR
, ocp_data
);
4019 ocp_data
= ocp_read_dword(tp
, MCU_TYPE_PLA
, PLA_MAC_PWR_CTRL
);
4020 ocp_data
&= ~MCU_CLK_RATIO_MASK
;
4021 ocp_data
|= MCU_CLK_RATIO
| D3_CLK_GATED_EN
;
4022 ocp_write_dword(tp
, MCU_TYPE_PLA
, PLA_MAC_PWR_CTRL
, ocp_data
);
4023 ocp_data
= GPHY_STS_MSK
| SPEED_DOWN_MSK
|
4024 SPDWN_RXDV_MSK
| SPDWN_LINKCHG_MSK
;
4025 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_GPHY_INTR_IMR
, ocp_data
);
4027 rtl_tally_reset(tp
);
4029 /* enable rx aggregation */
4030 ocp_data
= ocp_read_word(tp
, MCU_TYPE_USB
, USB_USB_CTRL
);
4031 ocp_data
&= ~(RX_AGG_DISABLE
| RX_ZERO_EN
);
4032 ocp_write_word(tp
, MCU_TYPE_USB
, USB_USB_CTRL
, ocp_data
);
4035 static void r8153_init(struct r8152
*tp
)
4041 if (test_bit(RTL8152_UNPLUG
, &tp
->flags
))
4044 r8153_u1u2en(tp
, false);
4046 for (i
= 0; i
< 500; i
++) {
4047 if (ocp_read_word(tp
, MCU_TYPE_PLA
, PLA_BOOT_CTRL
) &
4053 data
= r8153_phy_status(tp
, 0);
4055 if (tp
->version
== RTL_VER_03
|| tp
->version
== RTL_VER_04
||
4056 tp
->version
== RTL_VER_05
)
4057 ocp_reg_write(tp
, OCP_ADC_CFG
, CKADSEL_L
| ADC_EN
| EN_EMI_L
);
4059 data
= r8152_mdio_read(tp
, MII_BMCR
);
4060 if (data
& BMCR_PDOWN
) {
4061 data
&= ~BMCR_PDOWN
;
4062 r8152_mdio_write(tp
, MII_BMCR
, data
);
4065 data
= r8153_phy_status(tp
, PHY_STAT_LAN_ON
);
4067 r8153_u2p3en(tp
, false);
4069 if (tp
->version
== RTL_VER_04
) {
4070 ocp_data
= ocp_read_word(tp
, MCU_TYPE_USB
, USB_SSPHYLINK2
);
4071 ocp_data
&= ~pwd_dn_scale_mask
;
4072 ocp_data
|= pwd_dn_scale(96);
4073 ocp_write_word(tp
, MCU_TYPE_USB
, USB_SSPHYLINK2
, ocp_data
);
4075 ocp_data
= ocp_read_byte(tp
, MCU_TYPE_USB
, USB_USB2PHY
);
4076 ocp_data
|= USB2PHY_L1
| USB2PHY_SUSPEND
;
4077 ocp_write_byte(tp
, MCU_TYPE_USB
, USB_USB2PHY
, ocp_data
);
4078 } else if (tp
->version
== RTL_VER_05
) {
4079 ocp_data
= ocp_read_byte(tp
, MCU_TYPE_PLA
, PLA_DMY_REG0
);
4080 ocp_data
&= ~ECM_ALDPS
;
4081 ocp_write_byte(tp
, MCU_TYPE_PLA
, PLA_DMY_REG0
, ocp_data
);
4083 ocp_data
= ocp_read_byte(tp
, MCU_TYPE_USB
, USB_CSR_DUMMY1
);
4084 if (ocp_read_word(tp
, MCU_TYPE_USB
, USB_BURST_SIZE
) == 0)
4085 ocp_data
&= ~DYNAMIC_BURST
;
4087 ocp_data
|= DYNAMIC_BURST
;
4088 ocp_write_byte(tp
, MCU_TYPE_USB
, USB_CSR_DUMMY1
, ocp_data
);
4089 } else if (tp
->version
== RTL_VER_06
) {
4090 ocp_data
= ocp_read_byte(tp
, MCU_TYPE_USB
, USB_CSR_DUMMY1
);
4091 if (ocp_read_word(tp
, MCU_TYPE_USB
, USB_BURST_SIZE
) == 0)
4092 ocp_data
&= ~DYNAMIC_BURST
;
4094 ocp_data
|= DYNAMIC_BURST
;
4095 ocp_write_byte(tp
, MCU_TYPE_USB
, USB_CSR_DUMMY1
, ocp_data
);
4098 ocp_data
= ocp_read_byte(tp
, MCU_TYPE_USB
, USB_CSR_DUMMY2
);
4099 ocp_data
|= EP4_FULL_FC
;
4100 ocp_write_byte(tp
, MCU_TYPE_USB
, USB_CSR_DUMMY2
, ocp_data
);
4102 ocp_data
= ocp_read_word(tp
, MCU_TYPE_USB
, USB_WDT11_CTRL
);
4103 ocp_data
&= ~TIMER11_EN
;
4104 ocp_write_word(tp
, MCU_TYPE_USB
, USB_WDT11_CTRL
, ocp_data
);
4106 ocp_data
= ocp_read_word(tp
, MCU_TYPE_PLA
, PLA_LED_FEATURE
);
4107 ocp_data
&= ~LED_MODE_MASK
;
4108 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_LED_FEATURE
, ocp_data
);
4110 ocp_data
= FIFO_EMPTY_1FB
| ROK_EXIT_LPM
;
4111 if (tp
->version
== RTL_VER_04
&& tp
->udev
->speed
< USB_SPEED_SUPER
)
4112 ocp_data
|= LPM_TIMER_500MS
;
4114 ocp_data
|= LPM_TIMER_500US
;
4115 ocp_write_byte(tp
, MCU_TYPE_USB
, USB_LPM_CTRL
, ocp_data
);
4117 ocp_data
= ocp_read_word(tp
, MCU_TYPE_USB
, USB_AFE_CTRL2
);
4118 ocp_data
&= ~SEN_VAL_MASK
;
4119 ocp_data
|= SEN_VAL_NORMAL
| SEL_RXIDLE
;
4120 ocp_write_word(tp
, MCU_TYPE_USB
, USB_AFE_CTRL2
, ocp_data
);
4122 ocp_write_word(tp
, MCU_TYPE_USB
, USB_CONNECT_TIMER
, 0x0001);
4124 r8153_power_cut_en(tp
, false);
4125 r8153_u1u2en(tp
, true);
4126 r8153_mac_clk_spd(tp
, false);
4127 usb_enable_lpm(tp
->udev
);
4129 /* rx aggregation */
4130 ocp_data
= ocp_read_word(tp
, MCU_TYPE_USB
, USB_USB_CTRL
);
4131 ocp_data
&= ~(RX_AGG_DISABLE
| RX_ZERO_EN
);
4132 ocp_write_word(tp
, MCU_TYPE_USB
, USB_USB_CTRL
, ocp_data
);
4134 rtl_tally_reset(tp
);
4136 switch (tp
->udev
->speed
) {
4137 case USB_SPEED_SUPER
:
4138 case USB_SPEED_SUPER_PLUS
:
4139 tp
->coalesce
= COALESCE_SUPER
;
4141 case USB_SPEED_HIGH
:
4142 tp
->coalesce
= COALESCE_HIGH
;
4145 tp
->coalesce
= COALESCE_SLOW
;
4150 static void r8153b_init(struct r8152
*tp
)
4156 if (test_bit(RTL8152_UNPLUG
, &tp
->flags
))
4159 r8153b_u1u2en(tp
, false);
4161 for (i
= 0; i
< 500; i
++) {
4162 if (ocp_read_word(tp
, MCU_TYPE_PLA
, PLA_BOOT_CTRL
) &
4168 data
= r8153_phy_status(tp
, 0);
4170 data
= r8152_mdio_read(tp
, MII_BMCR
);
4171 if (data
& BMCR_PDOWN
) {
4172 data
&= ~BMCR_PDOWN
;
4173 r8152_mdio_write(tp
, MII_BMCR
, data
);
4176 data
= r8153_phy_status(tp
, PHY_STAT_LAN_ON
);
4178 r8153_u2p3en(tp
, false);
4180 /* MSC timer = 0xfff * 8ms = 32760 ms */
4181 ocp_write_word(tp
, MCU_TYPE_USB
, USB_MSC_TIMER
, 0x0fff);
4183 /* U1/U2/L1 idle timer. 500 us */
4184 ocp_write_word(tp
, MCU_TYPE_USB
, USB_U1U2_TIMER
, 500);
4186 r8153b_power_cut_en(tp
, false);
4187 r8153b_ups_en(tp
, false);
4188 r8153b_queue_wake(tp
, false);
4189 rtl_runtime_suspend_enable(tp
, false);
4190 r8153b_u1u2en(tp
, true);
4191 usb_enable_lpm(tp
->udev
);
4193 /* MAC clock speed down */
4194 ocp_data
= ocp_read_word(tp
, MCU_TYPE_PLA
, PLA_MAC_PWR_CTRL2
);
4195 ocp_data
|= MAC_CLK_SPDWN_EN
;
4196 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_MAC_PWR_CTRL2
, ocp_data
);
4198 set_bit(GREEN_ETHERNET
, &tp
->flags
);
4200 /* rx aggregation */
4201 ocp_data
= ocp_read_word(tp
, MCU_TYPE_USB
, USB_USB_CTRL
);
4202 ocp_data
&= ~(RX_AGG_DISABLE
| RX_ZERO_EN
);
4203 ocp_write_word(tp
, MCU_TYPE_USB
, USB_USB_CTRL
, ocp_data
);
4205 rtl_tally_reset(tp
);
4207 tp
->coalesce
= 15000; /* 15 us */
4210 static int rtl8152_pre_reset(struct usb_interface
*intf
)
4212 struct r8152
*tp
= usb_get_intfdata(intf
);
4213 struct net_device
*netdev
;
4218 netdev
= tp
->netdev
;
4219 if (!netif_running(netdev
))
4222 netif_stop_queue(netdev
);
4223 napi_disable(&tp
->napi
);
4224 clear_bit(WORK_ENABLE
, &tp
->flags
);
4225 usb_kill_urb(tp
->intr_urb
);
4226 cancel_delayed_work_sync(&tp
->schedule
);
4227 if (netif_carrier_ok(netdev
)) {
4228 mutex_lock(&tp
->control
);
4229 tp
->rtl_ops
.disable(tp
);
4230 mutex_unlock(&tp
->control
);
4236 static int rtl8152_post_reset(struct usb_interface
*intf
)
4238 struct r8152
*tp
= usb_get_intfdata(intf
);
4239 struct net_device
*netdev
;
4244 netdev
= tp
->netdev
;
4245 if (!netif_running(netdev
))
4248 set_bit(WORK_ENABLE
, &tp
->flags
);
4249 if (netif_carrier_ok(netdev
)) {
4250 mutex_lock(&tp
->control
);
4251 tp
->rtl_ops
.enable(tp
);
4253 rtl8152_set_rx_mode(netdev
);
4254 mutex_unlock(&tp
->control
);
4257 napi_enable(&tp
->napi
);
4258 netif_wake_queue(netdev
);
4259 usb_submit_urb(tp
->intr_urb
, GFP_KERNEL
);
4261 if (!list_empty(&tp
->rx_done
))
4262 napi_schedule(&tp
->napi
);
4267 static bool delay_autosuspend(struct r8152
*tp
)
4269 bool sw_linking
= !!netif_carrier_ok(tp
->netdev
);
4270 bool hw_linking
= !!(rtl8152_get_speed(tp
) & LINK_STATUS
);
4272 /* This means a linking change occurs and the driver doesn't detect it,
4273 * yet. If the driver has disabled tx/rx and hw is linking on, the
4274 * device wouldn't wake up by receiving any packet.
4276 if (work_busy(&tp
->schedule
.work
) || sw_linking
!= hw_linking
)
4279 /* If the linking down is occurred by nway, the device may miss the
4280 * linking change event. And it wouldn't wake when linking on.
4282 if (!sw_linking
&& tp
->rtl_ops
.in_nway(tp
))
4284 else if (!skb_queue_empty(&tp
->tx_queue
))
4290 static int rtl8152_runtime_suspend(struct r8152
*tp
)
4292 struct net_device
*netdev
= tp
->netdev
;
4295 set_bit(SELECTIVE_SUSPEND
, &tp
->flags
);
4296 smp_mb__after_atomic();
4298 if (netif_running(netdev
) && test_bit(WORK_ENABLE
, &tp
->flags
)) {
4301 if (delay_autosuspend(tp
)) {
4302 clear_bit(SELECTIVE_SUSPEND
, &tp
->flags
);
4303 smp_mb__after_atomic();
4308 if (netif_carrier_ok(netdev
)) {
4311 rcr
= ocp_read_dword(tp
, MCU_TYPE_PLA
, PLA_RCR
);
4312 ocp_data
= rcr
& ~RCR_ACPT_ALL
;
4313 ocp_write_dword(tp
, MCU_TYPE_PLA
, PLA_RCR
, ocp_data
);
4314 rxdy_gated_en(tp
, true);
4315 ocp_data
= ocp_read_byte(tp
, MCU_TYPE_PLA
,
4317 if (!(ocp_data
& RXFIFO_EMPTY
)) {
4318 rxdy_gated_en(tp
, false);
4319 ocp_write_dword(tp
, MCU_TYPE_PLA
, PLA_RCR
, rcr
);
4320 clear_bit(SELECTIVE_SUSPEND
, &tp
->flags
);
4321 smp_mb__after_atomic();
4327 clear_bit(WORK_ENABLE
, &tp
->flags
);
4328 usb_kill_urb(tp
->intr_urb
);
4330 tp
->rtl_ops
.autosuspend_en(tp
, true);
4332 if (netif_carrier_ok(netdev
)) {
4333 struct napi_struct
*napi
= &tp
->napi
;
4337 rxdy_gated_en(tp
, false);
4338 ocp_write_dword(tp
, MCU_TYPE_PLA
, PLA_RCR
, rcr
);
4347 static int rtl8152_system_suspend(struct r8152
*tp
)
4349 struct net_device
*netdev
= tp
->netdev
;
4352 netif_device_detach(netdev
);
4354 if (netif_running(netdev
) && test_bit(WORK_ENABLE
, &tp
->flags
)) {
4355 struct napi_struct
*napi
= &tp
->napi
;
4357 clear_bit(WORK_ENABLE
, &tp
->flags
);
4358 usb_kill_urb(tp
->intr_urb
);
4360 cancel_delayed_work_sync(&tp
->schedule
);
4361 tp
->rtl_ops
.down(tp
);
4368 static int rtl8152_suspend(struct usb_interface
*intf
, pm_message_t message
)
4370 struct r8152
*tp
= usb_get_intfdata(intf
);
4373 mutex_lock(&tp
->control
);
4375 if (PMSG_IS_AUTO(message
))
4376 ret
= rtl8152_runtime_suspend(tp
);
4378 ret
= rtl8152_system_suspend(tp
);
4380 mutex_unlock(&tp
->control
);
4385 static int rtl8152_resume(struct usb_interface
*intf
)
4387 struct r8152
*tp
= usb_get_intfdata(intf
);
4388 struct net_device
*netdev
= tp
->netdev
;
4390 mutex_lock(&tp
->control
);
4392 if (!test_bit(SELECTIVE_SUSPEND
, &tp
->flags
))
4393 netif_device_attach(netdev
);
4395 if (netif_running(netdev
) && netdev
->flags
& IFF_UP
) {
4396 if (test_bit(SELECTIVE_SUSPEND
, &tp
->flags
)) {
4397 struct napi_struct
*napi
= &tp
->napi
;
4399 tp
->rtl_ops
.autosuspend_en(tp
, false);
4401 set_bit(WORK_ENABLE
, &tp
->flags
);
4402 if (netif_carrier_ok(netdev
)) {
4403 if (rtl8152_get_speed(tp
) & LINK_STATUS
) {
4406 netif_carrier_off(netdev
);
4407 tp
->rtl_ops
.disable(tp
);
4408 netif_info(tp
, link
, netdev
,
4413 clear_bit(SELECTIVE_SUSPEND
, &tp
->flags
);
4414 smp_mb__after_atomic();
4415 if (!list_empty(&tp
->rx_done
))
4416 napi_schedule(&tp
->napi
);
4419 netif_carrier_off(netdev
);
4420 set_bit(WORK_ENABLE
, &tp
->flags
);
4422 usb_submit_urb(tp
->intr_urb
, GFP_KERNEL
);
4423 } else if (test_bit(SELECTIVE_SUSPEND
, &tp
->flags
)) {
4424 if (netdev
->flags
& IFF_UP
)
4425 tp
->rtl_ops
.autosuspend_en(tp
, false);
4426 clear_bit(SELECTIVE_SUSPEND
, &tp
->flags
);
4429 mutex_unlock(&tp
->control
);
4434 static int rtl8152_reset_resume(struct usb_interface
*intf
)
4436 struct r8152
*tp
= usb_get_intfdata(intf
);
4438 clear_bit(SELECTIVE_SUSPEND
, &tp
->flags
);
4439 mutex_lock(&tp
->control
);
4440 tp
->rtl_ops
.init(tp
);
4441 queue_delayed_work(system_long_wq
, &tp
->hw_phy_work
, 0);
4442 mutex_unlock(&tp
->control
);
4443 return rtl8152_resume(intf
);
4446 static void rtl8152_get_wol(struct net_device
*dev
, struct ethtool_wolinfo
*wol
)
4448 struct r8152
*tp
= netdev_priv(dev
);
4450 if (usb_autopm_get_interface(tp
->intf
) < 0)
4453 if (!rtl_can_wakeup(tp
)) {
4457 mutex_lock(&tp
->control
);
4458 wol
->supported
= WAKE_ANY
;
4459 wol
->wolopts
= __rtl_get_wol(tp
);
4460 mutex_unlock(&tp
->control
);
4463 usb_autopm_put_interface(tp
->intf
);
4466 static int rtl8152_set_wol(struct net_device
*dev
, struct ethtool_wolinfo
*wol
)
4468 struct r8152
*tp
= netdev_priv(dev
);
4471 if (!rtl_can_wakeup(tp
))
4474 ret
= usb_autopm_get_interface(tp
->intf
);
4478 mutex_lock(&tp
->control
);
4480 __rtl_set_wol(tp
, wol
->wolopts
);
4481 tp
->saved_wolopts
= wol
->wolopts
& WAKE_ANY
;
4483 mutex_unlock(&tp
->control
);
4485 usb_autopm_put_interface(tp
->intf
);
4491 static u32
rtl8152_get_msglevel(struct net_device
*dev
)
4493 struct r8152
*tp
= netdev_priv(dev
);
4495 return tp
->msg_enable
;
4498 static void rtl8152_set_msglevel(struct net_device
*dev
, u32 value
)
4500 struct r8152
*tp
= netdev_priv(dev
);
4502 tp
->msg_enable
= value
;
4505 static void rtl8152_get_drvinfo(struct net_device
*netdev
,
4506 struct ethtool_drvinfo
*info
)
4508 struct r8152
*tp
= netdev_priv(netdev
);
4510 strlcpy(info
->driver
, MODULENAME
, sizeof(info
->driver
));
4511 strlcpy(info
->version
, DRIVER_VERSION
, sizeof(info
->version
));
4512 usb_make_path(tp
->udev
, info
->bus_info
, sizeof(info
->bus_info
));
4516 int rtl8152_get_link_ksettings(struct net_device
*netdev
,
4517 struct ethtool_link_ksettings
*cmd
)
4519 struct r8152
*tp
= netdev_priv(netdev
);
4522 if (!tp
->mii
.mdio_read
)
4525 ret
= usb_autopm_get_interface(tp
->intf
);
4529 mutex_lock(&tp
->control
);
4531 mii_ethtool_get_link_ksettings(&tp
->mii
, cmd
);
4533 mutex_unlock(&tp
->control
);
4535 usb_autopm_put_interface(tp
->intf
);
4541 static int rtl8152_set_link_ksettings(struct net_device
*dev
,
4542 const struct ethtool_link_ksettings
*cmd
)
4544 struct r8152
*tp
= netdev_priv(dev
);
4547 ret
= usb_autopm_get_interface(tp
->intf
);
4551 mutex_lock(&tp
->control
);
4553 ret
= rtl8152_set_speed(tp
, cmd
->base
.autoneg
, cmd
->base
.speed
,
4556 tp
->autoneg
= cmd
->base
.autoneg
;
4557 tp
->speed
= cmd
->base
.speed
;
4558 tp
->duplex
= cmd
->base
.duplex
;
4561 mutex_unlock(&tp
->control
);
4563 usb_autopm_put_interface(tp
->intf
);
4569 static const char rtl8152_gstrings
[][ETH_GSTRING_LEN
] = {
4576 "tx_single_collisions",
4577 "tx_multi_collisions",
4585 static int rtl8152_get_sset_count(struct net_device
*dev
, int sset
)
4589 return ARRAY_SIZE(rtl8152_gstrings
);
4595 static void rtl8152_get_ethtool_stats(struct net_device
*dev
,
4596 struct ethtool_stats
*stats
, u64
*data
)
4598 struct r8152
*tp
= netdev_priv(dev
);
4599 struct tally_counter tally
;
4601 if (usb_autopm_get_interface(tp
->intf
) < 0)
4604 generic_ocp_read(tp
, PLA_TALLYCNT
, sizeof(tally
), &tally
, MCU_TYPE_PLA
);
4606 usb_autopm_put_interface(tp
->intf
);
4608 data
[0] = le64_to_cpu(tally
.tx_packets
);
4609 data
[1] = le64_to_cpu(tally
.rx_packets
);
4610 data
[2] = le64_to_cpu(tally
.tx_errors
);
4611 data
[3] = le32_to_cpu(tally
.rx_errors
);
4612 data
[4] = le16_to_cpu(tally
.rx_missed
);
4613 data
[5] = le16_to_cpu(tally
.align_errors
);
4614 data
[6] = le32_to_cpu(tally
.tx_one_collision
);
4615 data
[7] = le32_to_cpu(tally
.tx_multi_collision
);
4616 data
[8] = le64_to_cpu(tally
.rx_unicast
);
4617 data
[9] = le64_to_cpu(tally
.rx_broadcast
);
4618 data
[10] = le32_to_cpu(tally
.rx_multicast
);
4619 data
[11] = le16_to_cpu(tally
.tx_aborted
);
4620 data
[12] = le16_to_cpu(tally
.tx_underrun
);
4623 static void rtl8152_get_strings(struct net_device
*dev
, u32 stringset
, u8
*data
)
4625 switch (stringset
) {
4627 memcpy(data
, *rtl8152_gstrings
, sizeof(rtl8152_gstrings
));
4632 static int r8152_get_eee(struct r8152
*tp
, struct ethtool_eee
*eee
)
4634 u32 ocp_data
, lp
, adv
, supported
= 0;
4637 val
= r8152_mmd_read(tp
, MDIO_MMD_PCS
, MDIO_PCS_EEE_ABLE
);
4638 supported
= mmd_eee_cap_to_ethtool_sup_t(val
);
4640 val
= r8152_mmd_read(tp
, MDIO_MMD_AN
, MDIO_AN_EEE_ADV
);
4641 adv
= mmd_eee_adv_to_ethtool_adv_t(val
);
4643 val
= r8152_mmd_read(tp
, MDIO_MMD_AN
, MDIO_AN_EEE_LPABLE
);
4644 lp
= mmd_eee_adv_to_ethtool_adv_t(val
);
4646 ocp_data
= ocp_read_word(tp
, MCU_TYPE_PLA
, PLA_EEE_CR
);
4647 ocp_data
&= EEE_RX_EN
| EEE_TX_EN
;
4649 eee
->eee_enabled
= !!ocp_data
;
4650 eee
->eee_active
= !!(supported
& adv
& lp
);
4651 eee
->supported
= supported
;
4652 eee
->advertised
= adv
;
4653 eee
->lp_advertised
= lp
;
4658 static int r8152_set_eee(struct r8152
*tp
, struct ethtool_eee
*eee
)
4660 u16 val
= ethtool_adv_to_mmd_eee_adv_t(eee
->advertised
);
4662 r8152_eee_en(tp
, eee
->eee_enabled
);
4664 if (!eee
->eee_enabled
)
4667 r8152_mmd_write(tp
, MDIO_MMD_AN
, MDIO_AN_EEE_ADV
, val
);
4672 static int r8153_get_eee(struct r8152
*tp
, struct ethtool_eee
*eee
)
4674 u32 ocp_data
, lp
, adv
, supported
= 0;
4677 val
= ocp_reg_read(tp
, OCP_EEE_ABLE
);
4678 supported
= mmd_eee_cap_to_ethtool_sup_t(val
);
4680 val
= ocp_reg_read(tp
, OCP_EEE_ADV
);
4681 adv
= mmd_eee_adv_to_ethtool_adv_t(val
);
4683 val
= ocp_reg_read(tp
, OCP_EEE_LPABLE
);
4684 lp
= mmd_eee_adv_to_ethtool_adv_t(val
);
4686 ocp_data
= ocp_read_word(tp
, MCU_TYPE_PLA
, PLA_EEE_CR
);
4687 ocp_data
&= EEE_RX_EN
| EEE_TX_EN
;
4689 eee
->eee_enabled
= !!ocp_data
;
4690 eee
->eee_active
= !!(supported
& adv
& lp
);
4691 eee
->supported
= supported
;
4692 eee
->advertised
= adv
;
4693 eee
->lp_advertised
= lp
;
4698 static int r8153_set_eee(struct r8152
*tp
, struct ethtool_eee
*eee
)
4700 u16 val
= ethtool_adv_to_mmd_eee_adv_t(eee
->advertised
);
4702 r8153_eee_en(tp
, eee
->eee_enabled
);
4704 if (!eee
->eee_enabled
)
4707 ocp_reg_write(tp
, OCP_EEE_ADV
, val
);
4712 static int r8153b_set_eee(struct r8152
*tp
, struct ethtool_eee
*eee
)
4714 u16 val
= ethtool_adv_to_mmd_eee_adv_t(eee
->advertised
);
4716 r8153b_eee_en(tp
, eee
->eee_enabled
);
4718 if (!eee
->eee_enabled
)
4721 ocp_reg_write(tp
, OCP_EEE_ADV
, val
);
4727 rtl_ethtool_get_eee(struct net_device
*net
, struct ethtool_eee
*edata
)
4729 struct r8152
*tp
= netdev_priv(net
);
4732 ret
= usb_autopm_get_interface(tp
->intf
);
4736 mutex_lock(&tp
->control
);
4738 ret
= tp
->rtl_ops
.eee_get(tp
, edata
);
4740 mutex_unlock(&tp
->control
);
4742 usb_autopm_put_interface(tp
->intf
);
4749 rtl_ethtool_set_eee(struct net_device
*net
, struct ethtool_eee
*edata
)
4751 struct r8152
*tp
= netdev_priv(net
);
4754 ret
= usb_autopm_get_interface(tp
->intf
);
4758 mutex_lock(&tp
->control
);
4760 ret
= tp
->rtl_ops
.eee_set(tp
, edata
);
4762 ret
= mii_nway_restart(&tp
->mii
);
4764 mutex_unlock(&tp
->control
);
4766 usb_autopm_put_interface(tp
->intf
);
4772 static int rtl8152_nway_reset(struct net_device
*dev
)
4774 struct r8152
*tp
= netdev_priv(dev
);
4777 ret
= usb_autopm_get_interface(tp
->intf
);
4781 mutex_lock(&tp
->control
);
4783 ret
= mii_nway_restart(&tp
->mii
);
4785 mutex_unlock(&tp
->control
);
4787 usb_autopm_put_interface(tp
->intf
);
4793 static int rtl8152_get_coalesce(struct net_device
*netdev
,
4794 struct ethtool_coalesce
*coalesce
)
4796 struct r8152
*tp
= netdev_priv(netdev
);
4798 switch (tp
->version
) {
4807 coalesce
->rx_coalesce_usecs
= tp
->coalesce
;
4812 static int rtl8152_set_coalesce(struct net_device
*netdev
,
4813 struct ethtool_coalesce
*coalesce
)
4815 struct r8152
*tp
= netdev_priv(netdev
);
4818 switch (tp
->version
) {
4827 if (coalesce
->rx_coalesce_usecs
> COALESCE_SLOW
)
4830 ret
= usb_autopm_get_interface(tp
->intf
);
4834 mutex_lock(&tp
->control
);
4836 if (tp
->coalesce
!= coalesce
->rx_coalesce_usecs
) {
4837 tp
->coalesce
= coalesce
->rx_coalesce_usecs
;
4839 if (netif_running(tp
->netdev
) && netif_carrier_ok(netdev
))
4840 r8153_set_rx_early_timeout(tp
);
4843 mutex_unlock(&tp
->control
);
4845 usb_autopm_put_interface(tp
->intf
);
4850 static const struct ethtool_ops ops
= {
4851 .get_drvinfo
= rtl8152_get_drvinfo
,
4852 .get_link
= ethtool_op_get_link
,
4853 .nway_reset
= rtl8152_nway_reset
,
4854 .get_msglevel
= rtl8152_get_msglevel
,
4855 .set_msglevel
= rtl8152_set_msglevel
,
4856 .get_wol
= rtl8152_get_wol
,
4857 .set_wol
= rtl8152_set_wol
,
4858 .get_strings
= rtl8152_get_strings
,
4859 .get_sset_count
= rtl8152_get_sset_count
,
4860 .get_ethtool_stats
= rtl8152_get_ethtool_stats
,
4861 .get_coalesce
= rtl8152_get_coalesce
,
4862 .set_coalesce
= rtl8152_set_coalesce
,
4863 .get_eee
= rtl_ethtool_get_eee
,
4864 .set_eee
= rtl_ethtool_set_eee
,
4865 .get_link_ksettings
= rtl8152_get_link_ksettings
,
4866 .set_link_ksettings
= rtl8152_set_link_ksettings
,
4869 static int rtl8152_ioctl(struct net_device
*netdev
, struct ifreq
*rq
, int cmd
)
4871 struct r8152
*tp
= netdev_priv(netdev
);
4872 struct mii_ioctl_data
*data
= if_mii(rq
);
4875 if (test_bit(RTL8152_UNPLUG
, &tp
->flags
))
4878 res
= usb_autopm_get_interface(tp
->intf
);
4884 data
->phy_id
= R8152_PHY_ID
; /* Internal PHY */
4888 mutex_lock(&tp
->control
);
4889 data
->val_out
= r8152_mdio_read(tp
, data
->reg_num
);
4890 mutex_unlock(&tp
->control
);
4894 if (!capable(CAP_NET_ADMIN
)) {
4898 mutex_lock(&tp
->control
);
4899 r8152_mdio_write(tp
, data
->reg_num
, data
->val_in
);
4900 mutex_unlock(&tp
->control
);
4907 usb_autopm_put_interface(tp
->intf
);
4913 static int rtl8152_change_mtu(struct net_device
*dev
, int new_mtu
)
4915 struct r8152
*tp
= netdev_priv(dev
);
4918 switch (tp
->version
) {
4928 ret
= usb_autopm_get_interface(tp
->intf
);
4932 mutex_lock(&tp
->control
);
4936 if (netif_running(dev
)) {
4937 u32 rms
= new_mtu
+ VLAN_ETH_HLEN
+ CRC_SIZE
;
4939 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_RMS
, rms
);
4941 if (netif_carrier_ok(dev
))
4942 r8153_set_rx_early_size(tp
);
4945 mutex_unlock(&tp
->control
);
4947 usb_autopm_put_interface(tp
->intf
);
4952 static const struct net_device_ops rtl8152_netdev_ops
= {
4953 .ndo_open
= rtl8152_open
,
4954 .ndo_stop
= rtl8152_close
,
4955 .ndo_do_ioctl
= rtl8152_ioctl
,
4956 .ndo_start_xmit
= rtl8152_start_xmit
,
4957 .ndo_tx_timeout
= rtl8152_tx_timeout
,
4958 .ndo_set_features
= rtl8152_set_features
,
4959 .ndo_set_rx_mode
= rtl8152_set_rx_mode
,
4960 .ndo_set_mac_address
= rtl8152_set_mac_address
,
4961 .ndo_change_mtu
= rtl8152_change_mtu
,
4962 .ndo_validate_addr
= eth_validate_addr
,
4963 .ndo_features_check
= rtl8152_features_check
,
4966 static void rtl8152_unload(struct r8152
*tp
)
4968 if (test_bit(RTL8152_UNPLUG
, &tp
->flags
))
4971 if (tp
->version
!= RTL_VER_01
)
4972 r8152_power_cut_en(tp
, true);
4975 static void rtl8153_unload(struct r8152
*tp
)
4977 if (test_bit(RTL8152_UNPLUG
, &tp
->flags
))
4980 r8153_power_cut_en(tp
, false);
4983 static void rtl8153b_unload(struct r8152
*tp
)
4985 if (test_bit(RTL8152_UNPLUG
, &tp
->flags
))
4988 r8153b_power_cut_en(tp
, false);
4991 static int rtl_ops_init(struct r8152
*tp
)
4993 struct rtl_ops
*ops
= &tp
->rtl_ops
;
4996 switch (tp
->version
) {
5000 ops
->init
= r8152b_init
;
5001 ops
->enable
= rtl8152_enable
;
5002 ops
->disable
= rtl8152_disable
;
5003 ops
->up
= rtl8152_up
;
5004 ops
->down
= rtl8152_down
;
5005 ops
->unload
= rtl8152_unload
;
5006 ops
->eee_get
= r8152_get_eee
;
5007 ops
->eee_set
= r8152_set_eee
;
5008 ops
->in_nway
= rtl8152_in_nway
;
5009 ops
->hw_phy_cfg
= r8152b_hw_phy_cfg
;
5010 ops
->autosuspend_en
= rtl_runtime_suspend_enable
;
5017 ops
->init
= r8153_init
;
5018 ops
->enable
= rtl8153_enable
;
5019 ops
->disable
= rtl8153_disable
;
5020 ops
->up
= rtl8153_up
;
5021 ops
->down
= rtl8153_down
;
5022 ops
->unload
= rtl8153_unload
;
5023 ops
->eee_get
= r8153_get_eee
;
5024 ops
->eee_set
= r8153_set_eee
;
5025 ops
->in_nway
= rtl8153_in_nway
;
5026 ops
->hw_phy_cfg
= r8153_hw_phy_cfg
;
5027 ops
->autosuspend_en
= rtl8153_runtime_enable
;
5032 ops
->init
= r8153b_init
;
5033 ops
->enable
= rtl8153_enable
;
5034 ops
->disable
= rtl8153b_disable
;
5035 ops
->up
= rtl8153b_up
;
5036 ops
->down
= rtl8153b_down
;
5037 ops
->unload
= rtl8153b_unload
;
5038 ops
->eee_get
= r8153_get_eee
;
5039 ops
->eee_set
= r8153b_set_eee
;
5040 ops
->in_nway
= rtl8153_in_nway
;
5041 ops
->hw_phy_cfg
= r8153b_hw_phy_cfg
;
5042 ops
->autosuspend_en
= rtl8153b_runtime_enable
;
5047 netif_err(tp
, probe
, tp
->netdev
, "Unknown Device\n");
5054 static u8
rtl_get_version(struct usb_interface
*intf
)
5056 struct usb_device
*udev
= interface_to_usbdev(intf
);
5062 tmp
= kmalloc(sizeof(*tmp
), GFP_KERNEL
);
5066 ret
= usb_control_msg(udev
, usb_rcvctrlpipe(udev
, 0),
5067 RTL8152_REQ_GET_REGS
, RTL8152_REQT_READ
,
5068 PLA_TCR0
, MCU_TYPE_PLA
, tmp
, sizeof(*tmp
), 500);
5070 ocp_data
= (__le32_to_cpu(*tmp
) >> 16) & VERSION_MASK
;
5076 version
= RTL_VER_01
;
5079 version
= RTL_VER_02
;
5082 version
= RTL_VER_03
;
5085 version
= RTL_VER_04
;
5088 version
= RTL_VER_05
;
5091 version
= RTL_VER_06
;
5094 version
= RTL_VER_07
;
5097 version
= RTL_VER_08
;
5100 version
= RTL_VER_09
;
5103 version
= RTL_VER_UNKNOWN
;
5104 dev_info(&intf
->dev
, "Unknown version 0x%04x\n", ocp_data
);
5108 dev_dbg(&intf
->dev
, "Detected version 0x%04x\n", version
);
5113 static int rtl8152_probe(struct usb_interface
*intf
,
5114 const struct usb_device_id
*id
)
5116 struct usb_device
*udev
= interface_to_usbdev(intf
);
5117 u8 version
= rtl_get_version(intf
);
5119 struct net_device
*netdev
;
5122 if (version
== RTL_VER_UNKNOWN
)
5125 if (udev
->actconfig
->desc
.bConfigurationValue
!= 1) {
5126 usb_driver_set_configuration(udev
, 1);
5130 usb_reset_device(udev
);
5131 netdev
= alloc_etherdev(sizeof(struct r8152
));
5133 dev_err(&intf
->dev
, "Out of memory\n");
5137 SET_NETDEV_DEV(netdev
, &intf
->dev
);
5138 tp
= netdev_priv(netdev
);
5139 tp
->msg_enable
= 0x7FFF;
5142 tp
->netdev
= netdev
;
5144 tp
->version
= version
;
5150 tp
->mii
.supports_gmii
= 0;
5153 tp
->mii
.supports_gmii
= 1;
5157 ret
= rtl_ops_init(tp
);
5161 mutex_init(&tp
->control
);
5162 INIT_DELAYED_WORK(&tp
->schedule
, rtl_work_func_t
);
5163 INIT_DELAYED_WORK(&tp
->hw_phy_work
, rtl_hw_phy_work_func_t
);
5165 netdev
->netdev_ops
= &rtl8152_netdev_ops
;
5166 netdev
->watchdog_timeo
= RTL8152_TX_TIMEOUT
;
5168 netdev
->features
|= NETIF_F_RXCSUM
| NETIF_F_IP_CSUM
| NETIF_F_SG
|
5169 NETIF_F_TSO
| NETIF_F_FRAGLIST
| NETIF_F_IPV6_CSUM
|
5170 NETIF_F_TSO6
| NETIF_F_HW_VLAN_CTAG_RX
|
5171 NETIF_F_HW_VLAN_CTAG_TX
;
5172 netdev
->hw_features
= NETIF_F_RXCSUM
| NETIF_F_IP_CSUM
| NETIF_F_SG
|
5173 NETIF_F_TSO
| NETIF_F_FRAGLIST
|
5174 NETIF_F_IPV6_CSUM
| NETIF_F_TSO6
|
5175 NETIF_F_HW_VLAN_CTAG_RX
| NETIF_F_HW_VLAN_CTAG_TX
;
5176 netdev
->vlan_features
= NETIF_F_SG
| NETIF_F_IP_CSUM
| NETIF_F_TSO
|
5177 NETIF_F_HIGHDMA
| NETIF_F_FRAGLIST
|
5178 NETIF_F_IPV6_CSUM
| NETIF_F_TSO6
;
5180 if (tp
->version
== RTL_VER_01
) {
5181 netdev
->features
&= ~NETIF_F_RXCSUM
;
5182 netdev
->hw_features
&= ~NETIF_F_RXCSUM
;
5185 netdev
->ethtool_ops
= &ops
;
5186 netif_set_gso_max_size(netdev
, RTL_LIMITED_TSO_SIZE
);
5188 /* MTU range: 68 - 1500 or 9194 */
5189 netdev
->min_mtu
= ETH_MIN_MTU
;
5190 switch (tp
->version
) {
5193 netdev
->max_mtu
= ETH_DATA_LEN
;
5196 netdev
->max_mtu
= RTL8153_MAX_MTU
;
5200 tp
->mii
.dev
= netdev
;
5201 tp
->mii
.mdio_read
= read_mii_word
;
5202 tp
->mii
.mdio_write
= write_mii_word
;
5203 tp
->mii
.phy_id_mask
= 0x3f;
5204 tp
->mii
.reg_num_mask
= 0x1f;
5205 tp
->mii
.phy_id
= R8152_PHY_ID
;
5207 tp
->autoneg
= AUTONEG_ENABLE
;
5208 tp
->speed
= tp
->mii
.supports_gmii
? SPEED_1000
: SPEED_100
;
5209 tp
->duplex
= DUPLEX_FULL
;
5211 intf
->needs_remote_wakeup
= 1;
5213 tp
->rtl_ops
.init(tp
);
5214 queue_delayed_work(system_long_wq
, &tp
->hw_phy_work
, 0);
5215 set_ethernet_addr(tp
);
5217 usb_set_intfdata(intf
, tp
);
5218 netif_napi_add(netdev
, &tp
->napi
, r8152_poll
, RTL8152_NAPI_WEIGHT
);
5220 ret
= register_netdev(netdev
);
5222 netif_err(tp
, probe
, netdev
, "couldn't register the device\n");
5226 if (!rtl_can_wakeup(tp
))
5227 __rtl_set_wol(tp
, 0);
5229 tp
->saved_wolopts
= __rtl_get_wol(tp
);
5230 if (tp
->saved_wolopts
)
5231 device_set_wakeup_enable(&udev
->dev
, true);
5233 device_set_wakeup_enable(&udev
->dev
, false);
5235 netif_info(tp
, probe
, netdev
, "%s\n", DRIVER_VERSION
);
5240 netif_napi_del(&tp
->napi
);
5241 usb_set_intfdata(intf
, NULL
);
5243 free_netdev(netdev
);
5247 static void rtl8152_disconnect(struct usb_interface
*intf
)
5249 struct r8152
*tp
= usb_get_intfdata(intf
);
5251 usb_set_intfdata(intf
, NULL
);
5253 struct usb_device
*udev
= tp
->udev
;
5255 if (udev
->state
== USB_STATE_NOTATTACHED
)
5256 set_bit(RTL8152_UNPLUG
, &tp
->flags
);
5258 netif_napi_del(&tp
->napi
);
5259 unregister_netdev(tp
->netdev
);
5260 cancel_delayed_work_sync(&tp
->hw_phy_work
);
5261 tp
->rtl_ops
.unload(tp
);
5262 free_netdev(tp
->netdev
);
5266 #define REALTEK_USB_DEVICE(vend, prod) \
5267 .match_flags = USB_DEVICE_ID_MATCH_DEVICE | \
5268 USB_DEVICE_ID_MATCH_INT_CLASS, \
5269 .idVendor = (vend), \
5270 .idProduct = (prod), \
5271 .bInterfaceClass = USB_CLASS_VENDOR_SPEC \
5274 .match_flags = USB_DEVICE_ID_MATCH_INT_INFO | \
5275 USB_DEVICE_ID_MATCH_DEVICE, \
5276 .idVendor = (vend), \
5277 .idProduct = (prod), \
5278 .bInterfaceClass = USB_CLASS_COMM, \
5279 .bInterfaceSubClass = USB_CDC_SUBCLASS_ETHERNET, \
5280 .bInterfaceProtocol = USB_CDC_PROTO_NONE
5282 /* table of devices that work with this driver */
5283 static struct usb_device_id rtl8152_table
[] = {
5284 {REALTEK_USB_DEVICE(VENDOR_ID_REALTEK
, 0x8050)},
5285 {REALTEK_USB_DEVICE(VENDOR_ID_REALTEK
, 0x8152)},
5286 {REALTEK_USB_DEVICE(VENDOR_ID_REALTEK
, 0x8153)},
5287 {REALTEK_USB_DEVICE(VENDOR_ID_MICROSOFT
, 0x07ab)},
5288 {REALTEK_USB_DEVICE(VENDOR_ID_MICROSOFT
, 0x07c6)},
5289 {REALTEK_USB_DEVICE(VENDOR_ID_SAMSUNG
, 0xa101)},
5290 {REALTEK_USB_DEVICE(VENDOR_ID_LENOVO
, 0x304f)},
5291 {REALTEK_USB_DEVICE(VENDOR_ID_LENOVO
, 0x3062)},
5292 {REALTEK_USB_DEVICE(VENDOR_ID_LENOVO
, 0x3069)},
5293 {REALTEK_USB_DEVICE(VENDOR_ID_LENOVO
, 0x7205)},
5294 {REALTEK_USB_DEVICE(VENDOR_ID_LENOVO
, 0x720c)},
5295 {REALTEK_USB_DEVICE(VENDOR_ID_LENOVO
, 0x7214)},
5296 {REALTEK_USB_DEVICE(VENDOR_ID_NVIDIA
, 0x09ff)},
5300 MODULE_DEVICE_TABLE(usb
, rtl8152_table
);
5302 static struct usb_driver rtl8152_driver
= {
5304 .id_table
= rtl8152_table
,
5305 .probe
= rtl8152_probe
,
5306 .disconnect
= rtl8152_disconnect
,
5307 .suspend
= rtl8152_suspend
,
5308 .resume
= rtl8152_resume
,
5309 .reset_resume
= rtl8152_reset_resume
,
5310 .pre_reset
= rtl8152_pre_reset
,
5311 .post_reset
= rtl8152_post_reset
,
5312 .supports_autosuspend
= 1,
5313 .disable_hub_initiated_lpm
= 1,
5316 module_usb_driver(rtl8152_driver
);
5318 MODULE_AUTHOR(DRIVER_AUTHOR
);
5319 MODULE_DESCRIPTION(DRIVER_DESC
);
5320 MODULE_LICENSE("GPL");
5321 MODULE_VERSION(DRIVER_VERSION
);