2 * Copyright (c) 2014 Realtek Semiconductor Corp. All rights reserved.
4 * This program is free software; you can redistribute it and/or
5 * modify it under the terms of the GNU General Public License
6 * version 2 as published by the Free Software Foundation.
10 #include <linux/signal.h>
11 #include <linux/slab.h>
12 #include <linux/module.h>
13 #include <linux/netdevice.h>
14 #include <linux/etherdevice.h>
15 #include <linux/mii.h>
16 #include <linux/ethtool.h>
17 #include <linux/usb.h>
18 #include <linux/crc32.h>
19 #include <linux/if_vlan.h>
20 #include <linux/uaccess.h>
21 #include <linux/list.h>
23 #include <linux/ipv6.h>
24 #include <net/ip6_checksum.h>
25 #include <uapi/linux/mdio.h>
26 #include <linux/mdio.h>
27 #include <linux/usb/cdc.h>
28 #include <linux/suspend.h>
29 #include <linux/acpi.h>
31 /* Information for net-next */
32 #define NETNEXT_VERSION "08"
34 /* Information for net */
35 #define NET_VERSION "2"
37 #define DRIVER_VERSION "v1." NETNEXT_VERSION "." NET_VERSION
38 #define DRIVER_AUTHOR "Realtek linux nic maintainers <nic_swsd@realtek.com>"
39 #define DRIVER_DESC "Realtek RTL8152/RTL8153 Based USB Ethernet Adapters"
40 #define MODULENAME "r8152"
42 #define R8152_PHY_ID 32
44 #define PLA_IDR 0xc000
45 #define PLA_RCR 0xc010
46 #define PLA_RMS 0xc016
47 #define PLA_RXFIFO_CTRL0 0xc0a0
48 #define PLA_RXFIFO_CTRL1 0xc0a4
49 #define PLA_RXFIFO_CTRL2 0xc0a8
50 #define PLA_DMY_REG0 0xc0b0
51 #define PLA_FMC 0xc0b4
52 #define PLA_CFG_WOL 0xc0b6
53 #define PLA_TEREDO_CFG 0xc0bc
54 #define PLA_MAR 0xcd00
55 #define PLA_BACKUP 0xd000
56 #define PAL_BDC_CR 0xd1a0
57 #define PLA_TEREDO_TIMER 0xd2cc
58 #define PLA_REALWOW_TIMER 0xd2e8
59 #define PLA_LEDSEL 0xdd90
60 #define PLA_LED_FEATURE 0xdd92
61 #define PLA_PHYAR 0xde00
62 #define PLA_BOOT_CTRL 0xe004
63 #define PLA_GPHY_INTR_IMR 0xe022
64 #define PLA_EEE_CR 0xe040
65 #define PLA_EEEP_CR 0xe080
66 #define PLA_MAC_PWR_CTRL 0xe0c0
67 #define PLA_MAC_PWR_CTRL2 0xe0ca
68 #define PLA_MAC_PWR_CTRL3 0xe0cc
69 #define PLA_MAC_PWR_CTRL4 0xe0ce
70 #define PLA_WDT6_CTRL 0xe428
71 #define PLA_TCR0 0xe610
72 #define PLA_TCR1 0xe612
73 #define PLA_MTPS 0xe615
74 #define PLA_TXFIFO_CTRL 0xe618
75 #define PLA_RSTTALLY 0xe800
77 #define PLA_CRWECR 0xe81c
78 #define PLA_CONFIG12 0xe81e /* CONFIG1, CONFIG2 */
79 #define PLA_CONFIG34 0xe820 /* CONFIG3, CONFIG4 */
80 #define PLA_CONFIG5 0xe822
81 #define PLA_PHY_PWR 0xe84c
82 #define PLA_OOB_CTRL 0xe84f
83 #define PLA_CPCR 0xe854
84 #define PLA_MISC_0 0xe858
85 #define PLA_MISC_1 0xe85a
86 #define PLA_OCP_GPHY_BASE 0xe86c
87 #define PLA_TALLYCNT 0xe890
88 #define PLA_SFF_STS_7 0xe8de
89 #define PLA_PHYSTATUS 0xe908
90 #define PLA_BP_BA 0xfc26
91 #define PLA_BP_0 0xfc28
92 #define PLA_BP_1 0xfc2a
93 #define PLA_BP_2 0xfc2c
94 #define PLA_BP_3 0xfc2e
95 #define PLA_BP_4 0xfc30
96 #define PLA_BP_5 0xfc32
97 #define PLA_BP_6 0xfc34
98 #define PLA_BP_7 0xfc36
99 #define PLA_BP_EN 0xfc38
101 #define USB_USB2PHY 0xb41e
102 #define USB_SSPHYLINK2 0xb428
103 #define USB_U2P3_CTRL 0xb460
104 #define USB_CSR_DUMMY1 0xb464
105 #define USB_CSR_DUMMY2 0xb466
106 #define USB_DEV_STAT 0xb808
107 #define USB_CONNECT_TIMER 0xcbf8
108 #define USB_BURST_SIZE 0xcfc0
109 #define USB_USB_CTRL 0xd406
110 #define USB_PHY_CTRL 0xd408
111 #define USB_TX_AGG 0xd40a
112 #define USB_RX_BUF_TH 0xd40c
113 #define USB_USB_TIMER 0xd428
114 #define USB_RX_EARLY_TIMEOUT 0xd42c
115 #define USB_RX_EARLY_SIZE 0xd42e
116 #define USB_PM_CTRL_STATUS 0xd432
117 #define USB_TX_DMA 0xd434
118 #define USB_TOLERANCE 0xd490
119 #define USB_LPM_CTRL 0xd41a
120 #define USB_UPS_CTRL 0xd800
121 #define USB_MISC_0 0xd81a
122 #define USB_POWER_CUT 0xd80a
123 #define USB_AFE_CTRL2 0xd824
124 #define USB_WDT11_CTRL 0xe43c
125 #define USB_BP_BA 0xfc26
126 #define USB_BP_0 0xfc28
127 #define USB_BP_1 0xfc2a
128 #define USB_BP_2 0xfc2c
129 #define USB_BP_3 0xfc2e
130 #define USB_BP_4 0xfc30
131 #define USB_BP_5 0xfc32
132 #define USB_BP_6 0xfc34
133 #define USB_BP_7 0xfc36
134 #define USB_BP_EN 0xfc38
137 #define OCP_ALDPS_CONFIG 0x2010
138 #define OCP_EEE_CONFIG1 0x2080
139 #define OCP_EEE_CONFIG2 0x2092
140 #define OCP_EEE_CONFIG3 0x2094
141 #define OCP_BASE_MII 0xa400
142 #define OCP_EEE_AR 0xa41a
143 #define OCP_EEE_DATA 0xa41c
144 #define OCP_PHY_STATUS 0xa420
145 #define OCP_POWER_CFG 0xa430
146 #define OCP_EEE_CFG 0xa432
147 #define OCP_SRAM_ADDR 0xa436
148 #define OCP_SRAM_DATA 0xa438
149 #define OCP_DOWN_SPEED 0xa442
150 #define OCP_EEE_ABLE 0xa5c4
151 #define OCP_EEE_ADV 0xa5d0
152 #define OCP_EEE_LPABLE 0xa5d2
153 #define OCP_PHY_STATE 0xa708 /* nway state for 8153 */
154 #define OCP_ADC_CFG 0xbc06
157 #define SRAM_LPF_CFG 0x8012
158 #define SRAM_10M_AMP1 0x8080
159 #define SRAM_10M_AMP2 0x8082
160 #define SRAM_IMPEDANCE 0x8084
163 #define RCR_AAP 0x00000001
164 #define RCR_APM 0x00000002
165 #define RCR_AM 0x00000004
166 #define RCR_AB 0x00000008
167 #define RCR_ACPT_ALL (RCR_AAP | RCR_APM | RCR_AM | RCR_AB)
169 /* PLA_RXFIFO_CTRL0 */
170 #define RXFIFO_THR1_NORMAL 0x00080002
171 #define RXFIFO_THR1_OOB 0x01800003
173 /* PLA_RXFIFO_CTRL1 */
174 #define RXFIFO_THR2_FULL 0x00000060
175 #define RXFIFO_THR2_HIGH 0x00000038
176 #define RXFIFO_THR2_OOB 0x0000004a
177 #define RXFIFO_THR2_NORMAL 0x00a0
179 /* PLA_RXFIFO_CTRL2 */
180 #define RXFIFO_THR3_FULL 0x00000078
181 #define RXFIFO_THR3_HIGH 0x00000048
182 #define RXFIFO_THR3_OOB 0x0000005a
183 #define RXFIFO_THR3_NORMAL 0x0110
185 /* PLA_TXFIFO_CTRL */
186 #define TXFIFO_THR_NORMAL 0x00400008
187 #define TXFIFO_THR_NORMAL2 0x01000008
190 #define ECM_ALDPS 0x0002
193 #define FMC_FCR_MCU_EN 0x0001
196 #define EEEP_CR_EEEP_TX 0x0002
199 #define WDT6_SET_MODE 0x0010
202 #define TCR0_TX_EMPTY 0x0800
203 #define TCR0_AUTO_FIFO 0x0080
206 #define VERSION_MASK 0x7cf0
209 #define MTPS_JUMBO (12 * 1024 / 64)
210 #define MTPS_DEFAULT (6 * 1024 / 64)
213 #define TALLY_RESET 0x0001
221 #define CRWECR_NORAML 0x00
222 #define CRWECR_CONFIG 0xc0
225 #define NOW_IS_OOB 0x80
226 #define TXFIFO_EMPTY 0x20
227 #define RXFIFO_EMPTY 0x10
228 #define LINK_LIST_READY 0x02
229 #define DIS_MCU_CLROOB 0x01
230 #define FIFO_EMPTY (TXFIFO_EMPTY | RXFIFO_EMPTY)
233 #define RXDY_GATED_EN 0x0008
236 #define RE_INIT_LL 0x8000
237 #define MCU_BORW_EN 0x4000
240 #define CPCR_RX_VLAN 0x0040
243 #define MAGIC_EN 0x0001
246 #define TEREDO_SEL 0x8000
247 #define TEREDO_WAKE_MASK 0x7f00
248 #define TEREDO_RS_EVENT_MASK 0x00fe
249 #define OOB_TEREDO_EN 0x0001
252 #define ALDPS_PROXY_MODE 0x0001
255 #define LINK_ON_WAKE_EN 0x0010
256 #define LINK_OFF_WAKE_EN 0x0008
259 #define BWF_EN 0x0040
260 #define MWF_EN 0x0020
261 #define UWF_EN 0x0010
262 #define LAN_WAKE_EN 0x0002
264 /* PLA_LED_FEATURE */
265 #define LED_MODE_MASK 0x0700
268 #define TX_10M_IDLE_EN 0x0080
269 #define PFM_PWM_SWITCH 0x0040
271 /* PLA_MAC_PWR_CTRL */
272 #define D3_CLK_GATED_EN 0x00004000
273 #define MCU_CLK_RATIO 0x07010f07
274 #define MCU_CLK_RATIO_MASK 0x0f0f0f0f
275 #define ALDPS_SPDWN_RATIO 0x0f87
277 /* PLA_MAC_PWR_CTRL2 */
278 #define EEE_SPDWN_RATIO 0x8007
280 /* PLA_MAC_PWR_CTRL3 */
281 #define PKT_AVAIL_SPDWN_EN 0x0100
282 #define SUSPEND_SPDWN_EN 0x0004
283 #define U1U2_SPDWN_EN 0x0002
284 #define L1_SPDWN_EN 0x0001
286 /* PLA_MAC_PWR_CTRL4 */
287 #define PWRSAVE_SPDWN_EN 0x1000
288 #define RXDV_SPDWN_EN 0x0800
289 #define TX10MIDLE_EN 0x0100
290 #define TP100_SPDWN_EN 0x0020
291 #define TP500_SPDWN_EN 0x0010
292 #define TP1000_SPDWN_EN 0x0008
293 #define EEE_SPDWN_EN 0x0001
295 /* PLA_GPHY_INTR_IMR */
296 #define GPHY_STS_MSK 0x0001
297 #define SPEED_DOWN_MSK 0x0002
298 #define SPDWN_RXDV_MSK 0x0004
299 #define SPDWN_LINKCHG_MSK 0x0008
302 #define PHYAR_FLAG 0x80000000
305 #define EEE_RX_EN 0x0001
306 #define EEE_TX_EN 0x0002
309 #define AUTOLOAD_DONE 0x0002
312 #define USB2PHY_SUSPEND 0x0001
313 #define USB2PHY_L1 0x0002
316 #define pwd_dn_scale_mask 0x3ffe
317 #define pwd_dn_scale(x) ((x) << 1)
320 #define DYNAMIC_BURST 0x0001
323 #define EP4_FULL_FC 0x0001
326 #define STAT_SPEED_MASK 0x0006
327 #define STAT_SPEED_HIGH 0x0000
328 #define STAT_SPEED_FULL 0x0002
331 #define TX_AGG_MAX_THRESHOLD 0x03
334 #define RX_THR_SUPPER 0x0c350180
335 #define RX_THR_HIGH 0x7a120180
336 #define RX_THR_SLOW 0xffff0180
339 #define TEST_MODE_DISABLE 0x00000001
340 #define TX_SIZE_ADJUST1 0x00000100
343 #define POWER_CUT 0x0100
345 /* USB_PM_CTRL_STATUS */
346 #define RESUME_INDICATE 0x0001
349 #define RX_AGG_DISABLE 0x0010
350 #define RX_ZERO_EN 0x0080
353 #define U2P3_ENABLE 0x0001
356 #define PWR_EN 0x0001
357 #define PHASE2_EN 0x0008
360 #define PCUT_STATUS 0x0001
362 /* USB_RX_EARLY_TIMEOUT */
363 #define COALESCE_SUPER 85000U
364 #define COALESCE_HIGH 250000U
365 #define COALESCE_SLOW 524280U
368 #define TIMER11_EN 0x0001
371 /* bit 4 ~ 5: fifo empty boundary */
372 #define FIFO_EMPTY_1FB 0x30 /* 0x1fb * 64 = 32448 bytes */
373 /* bit 2 ~ 3: LMP timer */
374 #define LPM_TIMER_MASK 0x0c
375 #define LPM_TIMER_500MS 0x04 /* 500 ms */
376 #define LPM_TIMER_500US 0x0c /* 500 us */
377 #define ROK_EXIT_LPM 0x02
380 #define SEN_VAL_MASK 0xf800
381 #define SEN_VAL_NORMAL 0xa000
382 #define SEL_RXIDLE 0x0100
384 /* OCP_ALDPS_CONFIG */
385 #define ENPWRSAVE 0x8000
386 #define ENPDNPS 0x0200
387 #define LINKENA 0x0100
388 #define DIS_SDSAVE 0x0010
391 #define PHY_STAT_MASK 0x0007
392 #define PHY_STAT_LAN_ON 3
393 #define PHY_STAT_PWRDN 5
396 #define EEE_CLKDIV_EN 0x8000
397 #define EN_ALDPS 0x0004
398 #define EN_10M_PLLOFF 0x0001
400 /* OCP_EEE_CONFIG1 */
401 #define RG_TXLPI_MSK_HFDUP 0x8000
402 #define RG_MATCLR_EN 0x4000
403 #define EEE_10_CAP 0x2000
404 #define EEE_NWAY_EN 0x1000
405 #define TX_QUIET_EN 0x0200
406 #define RX_QUIET_EN 0x0100
407 #define sd_rise_time_mask 0x0070
408 #define sd_rise_time(x) (min(x, 7) << 4) /* bit 4 ~ 6 */
409 #define RG_RXLPI_MSK_HFDUP 0x0008
410 #define SDFALLTIME 0x0007 /* bit 0 ~ 2 */
412 /* OCP_EEE_CONFIG2 */
413 #define RG_LPIHYS_NUM 0x7000 /* bit 12 ~ 15 */
414 #define RG_DACQUIET_EN 0x0400
415 #define RG_LDVQUIET_EN 0x0200
416 #define RG_CKRSEL 0x0020
417 #define RG_EEEPRG_EN 0x0010
419 /* OCP_EEE_CONFIG3 */
420 #define fast_snr_mask 0xff80
421 #define fast_snr(x) (min(x, 0x1ff) << 7) /* bit 7 ~ 15 */
422 #define RG_LFS_SEL 0x0060 /* bit 6 ~ 5 */
423 #define MSK_PH 0x0006 /* bit 0 ~ 3 */
426 /* bit[15:14] function */
427 #define FUN_ADDR 0x0000
428 #define FUN_DATA 0x4000
429 /* bit[4:0] device addr */
432 #define CTAP_SHORT_EN 0x0040
433 #define EEE10_EN 0x0010
436 #define EN_10M_BGOFF 0x0080
439 #define TXDIS_STATE 0x01
440 #define ABD_STATE 0x02
443 #define CKADSEL_L 0x0100
444 #define ADC_EN 0x0080
445 #define EN_EMI_L 0x0040
448 #define LPF_AUTO_TUNE 0x8000
451 #define GDAC_IB_UPALL 0x0008
454 #define AMP_DN 0x0200
457 #define RX_DRIVING_MASK 0x6000
460 #define AD_MASK 0xfee0
462 #define PASS_THRU_MASK 0x1
464 enum rtl_register_content
{
472 #define RTL8152_MAX_TX 4
473 #define RTL8152_MAX_RX 10
479 #define INTR_LINK 0x0004
481 #define RTL8152_REQT_READ 0xc0
482 #define RTL8152_REQT_WRITE 0x40
483 #define RTL8152_REQ_GET_REGS 0x05
484 #define RTL8152_REQ_SET_REGS 0x05
486 #define BYTE_EN_DWORD 0xff
487 #define BYTE_EN_WORD 0x33
488 #define BYTE_EN_BYTE 0x11
489 #define BYTE_EN_SIX_BYTES 0x3f
490 #define BYTE_EN_START_MASK 0x0f
491 #define BYTE_EN_END_MASK 0xf0
493 #define RTL8153_MAX_PACKET 9216 /* 9K */
494 #define RTL8153_MAX_MTU (RTL8153_MAX_PACKET - VLAN_ETH_HLEN - VLAN_HLEN)
495 #define RTL8152_RMS (VLAN_ETH_FRAME_LEN + VLAN_HLEN)
496 #define RTL8153_RMS RTL8153_MAX_PACKET
497 #define RTL8152_TX_TIMEOUT (5 * HZ)
498 #define RTL8152_NAPI_WEIGHT 64
511 /* Define these values to match your device */
512 #define VENDOR_ID_REALTEK 0x0bda
513 #define VENDOR_ID_SAMSUNG 0x04e8
514 #define VENDOR_ID_LENOVO 0x17ef
515 #define VENDOR_ID_NVIDIA 0x0955
517 #define MCU_TYPE_PLA 0x0100
518 #define MCU_TYPE_USB 0x0000
520 struct tally_counter
{
527 __le32 tx_one_collision
;
528 __le32 tx_multi_collision
;
538 #define RX_LEN_MASK 0x7fff
541 #define RD_UDP_CS BIT(23)
542 #define RD_TCP_CS BIT(22)
543 #define RD_IPV6_CS BIT(20)
544 #define RD_IPV4_CS BIT(19)
547 #define IPF BIT(23) /* IP checksum fail */
548 #define UDPF BIT(22) /* UDP checksum fail */
549 #define TCPF BIT(21) /* TCP checksum fail */
550 #define RX_VLAN_TAG BIT(16)
559 #define TX_FS BIT(31) /* First segment of a packet */
560 #define TX_LS BIT(30) /* Final segment of a packet */
561 #define GTSENDV4 BIT(28)
562 #define GTSENDV6 BIT(27)
563 #define GTTCPHO_SHIFT 18
564 #define GTTCPHO_MAX 0x7fU
565 #define TX_LEN_MAX 0x3ffffU
568 #define UDP_CS BIT(31) /* Calculate UDP/IP checksum */
569 #define TCP_CS BIT(30) /* Calculate TCP/IP checksum */
570 #define IPV4_CS BIT(29) /* Calculate IPv4 checksum */
571 #define IPV6_CS BIT(28) /* Calculate IPv6 checksum */
573 #define MSS_MAX 0x7ffU
574 #define TCPHO_SHIFT 17
575 #define TCPHO_MAX 0x7ffU
576 #define TX_VLAN_TAG BIT(16)
582 struct list_head list
;
584 struct r8152
*context
;
590 struct list_head list
;
592 struct r8152
*context
;
601 struct usb_device
*udev
;
602 struct napi_struct napi
;
603 struct usb_interface
*intf
;
604 struct net_device
*netdev
;
605 struct urb
*intr_urb
;
606 struct tx_agg tx_info
[RTL8152_MAX_TX
];
607 struct rx_agg rx_info
[RTL8152_MAX_RX
];
608 struct list_head rx_done
, tx_free
;
609 struct sk_buff_head tx_queue
, rx_queue
;
610 spinlock_t rx_lock
, tx_lock
;
611 struct delayed_work schedule
;
612 struct mii_if_info mii
;
613 struct mutex control
; /* use for hw setting */
616 void (*init
)(struct r8152
*);
617 int (*enable
)(struct r8152
*);
618 void (*disable
)(struct r8152
*);
619 void (*up
)(struct r8152
*);
620 void (*down
)(struct r8152
*);
621 void (*unload
)(struct r8152
*);
622 int (*eee_get
)(struct r8152
*, struct ethtool_eee
*);
623 int (*eee_set
)(struct r8152
*, struct ethtool_eee
*);
624 bool (*in_nway
)(struct r8152
*);
654 /* Maximum number of multicast addresses to filter (vs. Rx-all-multicast).
655 * The RTL chips use a 64 element hash table based on the Ethernet CRC.
657 static const int multicast_filter_limit
= 32;
658 static unsigned int agg_buf_sz
= 16384;
660 #define RTL_LIMITED_TSO_SIZE (agg_buf_sz - sizeof(struct tx_desc) - \
661 VLAN_ETH_HLEN - VLAN_HLEN)
664 int get_registers(struct r8152
*tp
, u16 value
, u16 index
, u16 size
, void *data
)
669 tmp
= kmalloc(size
, GFP_KERNEL
);
673 ret
= usb_control_msg(tp
->udev
, usb_rcvctrlpipe(tp
->udev
, 0),
674 RTL8152_REQ_GET_REGS
, RTL8152_REQT_READ
,
675 value
, index
, tmp
, size
, 500);
677 memcpy(data
, tmp
, size
);
684 int set_registers(struct r8152
*tp
, u16 value
, u16 index
, u16 size
, void *data
)
689 tmp
= kmemdup(data
, size
, GFP_KERNEL
);
693 ret
= usb_control_msg(tp
->udev
, usb_sndctrlpipe(tp
->udev
, 0),
694 RTL8152_REQ_SET_REGS
, RTL8152_REQT_WRITE
,
695 value
, index
, tmp
, size
, 500);
702 static int generic_ocp_read(struct r8152
*tp
, u16 index
, u16 size
,
703 void *data
, u16 type
)
708 if (test_bit(RTL8152_UNPLUG
, &tp
->flags
))
711 /* both size and indix must be 4 bytes align */
712 if ((size
& 3) || !size
|| (index
& 3) || !data
)
715 if ((u32
)index
+ (u32
)size
> 0xffff)
720 ret
= get_registers(tp
, index
, type
, limit
, data
);
728 ret
= get_registers(tp
, index
, type
, size
, data
);
740 set_bit(RTL8152_UNPLUG
, &tp
->flags
);
745 static int generic_ocp_write(struct r8152
*tp
, u16 index
, u16 byteen
,
746 u16 size
, void *data
, u16 type
)
749 u16 byteen_start
, byteen_end
, byen
;
752 if (test_bit(RTL8152_UNPLUG
, &tp
->flags
))
755 /* both size and indix must be 4 bytes align */
756 if ((size
& 3) || !size
|| (index
& 3) || !data
)
759 if ((u32
)index
+ (u32
)size
> 0xffff)
762 byteen_start
= byteen
& BYTE_EN_START_MASK
;
763 byteen_end
= byteen
& BYTE_EN_END_MASK
;
765 byen
= byteen_start
| (byteen_start
<< 4);
766 ret
= set_registers(tp
, index
, type
| byen
, 4, data
);
779 ret
= set_registers(tp
, index
,
780 type
| BYTE_EN_DWORD
,
789 ret
= set_registers(tp
, index
,
790 type
| BYTE_EN_DWORD
,
802 byen
= byteen_end
| (byteen_end
>> 4);
803 ret
= set_registers(tp
, index
, type
| byen
, 4, data
);
810 set_bit(RTL8152_UNPLUG
, &tp
->flags
);
816 int pla_ocp_read(struct r8152
*tp
, u16 index
, u16 size
, void *data
)
818 return generic_ocp_read(tp
, index
, size
, data
, MCU_TYPE_PLA
);
822 int pla_ocp_write(struct r8152
*tp
, u16 index
, u16 byteen
, u16 size
, void *data
)
824 return generic_ocp_write(tp
, index
, byteen
, size
, data
, MCU_TYPE_PLA
);
828 int usb_ocp_read(struct r8152
*tp
, u16 index
, u16 size
, void *data
)
830 return generic_ocp_read(tp
, index
, size
, data
, MCU_TYPE_USB
);
834 int usb_ocp_write(struct r8152
*tp
, u16 index
, u16 byteen
, u16 size
, void *data
)
836 return generic_ocp_write(tp
, index
, byteen
, size
, data
, MCU_TYPE_USB
);
839 static u32
ocp_read_dword(struct r8152
*tp
, u16 type
, u16 index
)
843 generic_ocp_read(tp
, index
, sizeof(data
), &data
, type
);
845 return __le32_to_cpu(data
);
848 static void ocp_write_dword(struct r8152
*tp
, u16 type
, u16 index
, u32 data
)
850 __le32 tmp
= __cpu_to_le32(data
);
852 generic_ocp_write(tp
, index
, BYTE_EN_DWORD
, sizeof(tmp
), &tmp
, type
);
855 static u16
ocp_read_word(struct r8152
*tp
, u16 type
, u16 index
)
859 u8 shift
= index
& 2;
863 generic_ocp_read(tp
, index
, sizeof(tmp
), &tmp
, type
);
865 data
= __le32_to_cpu(tmp
);
866 data
>>= (shift
* 8);
872 static void ocp_write_word(struct r8152
*tp
, u16 type
, u16 index
, u32 data
)
876 u16 byen
= BYTE_EN_WORD
;
877 u8 shift
= index
& 2;
883 mask
<<= (shift
* 8);
884 data
<<= (shift
* 8);
888 tmp
= __cpu_to_le32(data
);
890 generic_ocp_write(tp
, index
, byen
, sizeof(tmp
), &tmp
, type
);
893 static u8
ocp_read_byte(struct r8152
*tp
, u16 type
, u16 index
)
897 u8 shift
= index
& 3;
901 generic_ocp_read(tp
, index
, sizeof(tmp
), &tmp
, type
);
903 data
= __le32_to_cpu(tmp
);
904 data
>>= (shift
* 8);
910 static void ocp_write_byte(struct r8152
*tp
, u16 type
, u16 index
, u32 data
)
914 u16 byen
= BYTE_EN_BYTE
;
915 u8 shift
= index
& 3;
921 mask
<<= (shift
* 8);
922 data
<<= (shift
* 8);
926 tmp
= __cpu_to_le32(data
);
928 generic_ocp_write(tp
, index
, byen
, sizeof(tmp
), &tmp
, type
);
931 static u16
ocp_reg_read(struct r8152
*tp
, u16 addr
)
933 u16 ocp_base
, ocp_index
;
935 ocp_base
= addr
& 0xf000;
936 if (ocp_base
!= tp
->ocp_base
) {
937 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_OCP_GPHY_BASE
, ocp_base
);
938 tp
->ocp_base
= ocp_base
;
941 ocp_index
= (addr
& 0x0fff) | 0xb000;
942 return ocp_read_word(tp
, MCU_TYPE_PLA
, ocp_index
);
945 static void ocp_reg_write(struct r8152
*tp
, u16 addr
, u16 data
)
947 u16 ocp_base
, ocp_index
;
949 ocp_base
= addr
& 0xf000;
950 if (ocp_base
!= tp
->ocp_base
) {
951 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_OCP_GPHY_BASE
, ocp_base
);
952 tp
->ocp_base
= ocp_base
;
955 ocp_index
= (addr
& 0x0fff) | 0xb000;
956 ocp_write_word(tp
, MCU_TYPE_PLA
, ocp_index
, data
);
959 static inline void r8152_mdio_write(struct r8152
*tp
, u32 reg_addr
, u32 value
)
961 ocp_reg_write(tp
, OCP_BASE_MII
+ reg_addr
* 2, value
);
964 static inline int r8152_mdio_read(struct r8152
*tp
, u32 reg_addr
)
966 return ocp_reg_read(tp
, OCP_BASE_MII
+ reg_addr
* 2);
969 static void sram_write(struct r8152
*tp
, u16 addr
, u16 data
)
971 ocp_reg_write(tp
, OCP_SRAM_ADDR
, addr
);
972 ocp_reg_write(tp
, OCP_SRAM_DATA
, data
);
975 static int read_mii_word(struct net_device
*netdev
, int phy_id
, int reg
)
977 struct r8152
*tp
= netdev_priv(netdev
);
980 if (test_bit(RTL8152_UNPLUG
, &tp
->flags
))
983 if (phy_id
!= R8152_PHY_ID
)
986 ret
= r8152_mdio_read(tp
, reg
);
992 void write_mii_word(struct net_device
*netdev
, int phy_id
, int reg
, int val
)
994 struct r8152
*tp
= netdev_priv(netdev
);
996 if (test_bit(RTL8152_UNPLUG
, &tp
->flags
))
999 if (phy_id
!= R8152_PHY_ID
)
1002 r8152_mdio_write(tp
, reg
, val
);
1006 r8152_submit_rx(struct r8152
*tp
, struct rx_agg
*agg
, gfp_t mem_flags
);
1008 static int rtl8152_set_mac_address(struct net_device
*netdev
, void *p
)
1010 struct r8152
*tp
= netdev_priv(netdev
);
1011 struct sockaddr
*addr
= p
;
1012 int ret
= -EADDRNOTAVAIL
;
1014 if (!is_valid_ether_addr(addr
->sa_data
))
1017 ret
= usb_autopm_get_interface(tp
->intf
);
1021 mutex_lock(&tp
->control
);
1023 memcpy(netdev
->dev_addr
, addr
->sa_data
, netdev
->addr_len
);
1025 ocp_write_byte(tp
, MCU_TYPE_PLA
, PLA_CRWECR
, CRWECR_CONFIG
);
1026 pla_ocp_write(tp
, PLA_IDR
, BYTE_EN_SIX_BYTES
, 8, addr
->sa_data
);
1027 ocp_write_byte(tp
, MCU_TYPE_PLA
, PLA_CRWECR
, CRWECR_NORAML
);
1029 mutex_unlock(&tp
->control
);
1031 usb_autopm_put_interface(tp
->intf
);
1036 /* Devices containing RTL8153-AD can support a persistent
1037 * host system provided MAC address.
1038 * Examples of this are Dell TB15 and Dell WD15 docks
1040 static int vendor_mac_passthru_addr_read(struct r8152
*tp
, struct sockaddr
*sa
)
1043 struct acpi_buffer buffer
= { ACPI_ALLOCATE_BUFFER
, NULL
};
1044 union acpi_object
*obj
;
1047 unsigned char buf
[6];
1049 /* test for -AD variant of RTL8153 */
1050 ocp_data
= ocp_read_word(tp
, MCU_TYPE_USB
, USB_MISC_0
);
1051 if ((ocp_data
& AD_MASK
) != 0x1000)
1054 /* test for MAC address pass-through bit */
1055 ocp_data
= ocp_read_byte(tp
, MCU_TYPE_USB
, EFUSE
);
1056 if ((ocp_data
& PASS_THRU_MASK
) != 1)
1059 /* returns _AUXMAC_#AABBCCDDEEFF# */
1060 status
= acpi_evaluate_object(NULL
, "\\_SB.AMAC", NULL
, &buffer
);
1061 obj
= (union acpi_object
*)buffer
.pointer
;
1062 if (!ACPI_SUCCESS(status
))
1064 if (obj
->type
!= ACPI_TYPE_BUFFER
|| obj
->string
.length
!= 0x17) {
1065 netif_warn(tp
, probe
, tp
->netdev
,
1066 "Invalid buffer when reading pass-thru MAC addr: "
1068 obj
->type
, obj
->string
.length
);
1071 if (strncmp(obj
->string
.pointer
, "_AUXMAC_#", 9) != 0 ||
1072 strncmp(obj
->string
.pointer
+ 0x15, "#", 1) != 0) {
1073 netif_warn(tp
, probe
, tp
->netdev
,
1074 "Invalid header when reading pass-thru MAC addr\n");
1077 ret
= hex2bin(buf
, obj
->string
.pointer
+ 9, 6);
1078 if (!(ret
== 0 && is_valid_ether_addr(buf
))) {
1079 netif_warn(tp
, probe
, tp
->netdev
,
1080 "Invalid MAC when reading pass-thru MAC addr: "
1081 "%d, %pM\n", ret
, buf
);
1085 memcpy(sa
->sa_data
, buf
, 6);
1086 ether_addr_copy(tp
->netdev
->dev_addr
, sa
->sa_data
);
1087 netif_info(tp
, probe
, tp
->netdev
,
1088 "Using pass-thru MAC addr %pM\n", sa
->sa_data
);
1095 static int set_ethernet_addr(struct r8152
*tp
)
1097 struct net_device
*dev
= tp
->netdev
;
1101 if (tp
->version
== RTL_VER_01
)
1102 ret
= pla_ocp_read(tp
, PLA_IDR
, 8, sa
.sa_data
);
1104 /* if this is not an RTL8153-AD, no eFuse mac pass thru set,
1105 * or system doesn't provide valid _SB.AMAC this will be
1106 * be expected to non-zero
1108 ret
= vendor_mac_passthru_addr_read(tp
, &sa
);
1110 ret
= pla_ocp_read(tp
, PLA_BACKUP
, 8, sa
.sa_data
);
1114 netif_err(tp
, probe
, dev
, "Get ether addr fail\n");
1115 } else if (!is_valid_ether_addr(sa
.sa_data
)) {
1116 netif_err(tp
, probe
, dev
, "Invalid ether addr %pM\n",
1118 eth_hw_addr_random(dev
);
1119 ether_addr_copy(sa
.sa_data
, dev
->dev_addr
);
1120 ret
= rtl8152_set_mac_address(dev
, &sa
);
1121 netif_info(tp
, probe
, dev
, "Random ether addr %pM\n",
1124 if (tp
->version
== RTL_VER_01
)
1125 ether_addr_copy(dev
->dev_addr
, sa
.sa_data
);
1127 ret
= rtl8152_set_mac_address(dev
, &sa
);
1133 static void read_bulk_callback(struct urb
*urb
)
1135 struct net_device
*netdev
;
1136 int status
= urb
->status
;
1148 if (test_bit(RTL8152_UNPLUG
, &tp
->flags
))
1151 if (!test_bit(WORK_ENABLE
, &tp
->flags
))
1154 netdev
= tp
->netdev
;
1156 /* When link down, the driver would cancel all bulks. */
1157 /* This avoid the re-submitting bulk */
1158 if (!netif_carrier_ok(netdev
))
1161 usb_mark_last_busy(tp
->udev
);
1165 if (urb
->actual_length
< ETH_ZLEN
)
1168 spin_lock(&tp
->rx_lock
);
1169 list_add_tail(&agg
->list
, &tp
->rx_done
);
1170 spin_unlock(&tp
->rx_lock
);
1171 napi_schedule(&tp
->napi
);
1174 set_bit(RTL8152_UNPLUG
, &tp
->flags
);
1175 netif_device_detach(tp
->netdev
);
1178 return; /* the urb is in unlink state */
1180 if (net_ratelimit())
1181 netdev_warn(netdev
, "maybe reset is needed?\n");
1184 if (net_ratelimit())
1185 netdev_warn(netdev
, "Rx status %d\n", status
);
1189 r8152_submit_rx(tp
, agg
, GFP_ATOMIC
);
1192 static void write_bulk_callback(struct urb
*urb
)
1194 struct net_device_stats
*stats
;
1195 struct net_device
*netdev
;
1198 int status
= urb
->status
;
1208 netdev
= tp
->netdev
;
1209 stats
= &netdev
->stats
;
1211 if (net_ratelimit())
1212 netdev_warn(netdev
, "Tx status %d\n", status
);
1213 stats
->tx_errors
+= agg
->skb_num
;
1215 stats
->tx_packets
+= agg
->skb_num
;
1216 stats
->tx_bytes
+= agg
->skb_len
;
1219 spin_lock(&tp
->tx_lock
);
1220 list_add_tail(&agg
->list
, &tp
->tx_free
);
1221 spin_unlock(&tp
->tx_lock
);
1223 usb_autopm_put_interface_async(tp
->intf
);
1225 if (!netif_carrier_ok(netdev
))
1228 if (!test_bit(WORK_ENABLE
, &tp
->flags
))
1231 if (test_bit(RTL8152_UNPLUG
, &tp
->flags
))
1234 if (!skb_queue_empty(&tp
->tx_queue
))
1235 napi_schedule(&tp
->napi
);
1238 static void intr_callback(struct urb
*urb
)
1242 int status
= urb
->status
;
1249 if (!test_bit(WORK_ENABLE
, &tp
->flags
))
1252 if (test_bit(RTL8152_UNPLUG
, &tp
->flags
))
1256 case 0: /* success */
1258 case -ECONNRESET
: /* unlink */
1260 netif_device_detach(tp
->netdev
);
1263 netif_info(tp
, intr
, tp
->netdev
,
1264 "Stop submitting intr, status %d\n", status
);
1267 netif_info(tp
, intr
, tp
->netdev
, "intr status -EOVERFLOW\n");
1269 /* -EPIPE: should clear the halt */
1271 netif_info(tp
, intr
, tp
->netdev
, "intr status %d\n", status
);
1275 d
= urb
->transfer_buffer
;
1276 if (INTR_LINK
& __le16_to_cpu(d
[0])) {
1277 if (!netif_carrier_ok(tp
->netdev
)) {
1278 set_bit(RTL8152_LINK_CHG
, &tp
->flags
);
1279 schedule_delayed_work(&tp
->schedule
, 0);
1282 if (netif_carrier_ok(tp
->netdev
)) {
1283 set_bit(RTL8152_LINK_CHG
, &tp
->flags
);
1284 schedule_delayed_work(&tp
->schedule
, 0);
1289 res
= usb_submit_urb(urb
, GFP_ATOMIC
);
1290 if (res
== -ENODEV
) {
1291 set_bit(RTL8152_UNPLUG
, &tp
->flags
);
1292 netif_device_detach(tp
->netdev
);
1294 netif_err(tp
, intr
, tp
->netdev
,
1295 "can't resubmit intr, status %d\n", res
);
1299 static inline void *rx_agg_align(void *data
)
1301 return (void *)ALIGN((uintptr_t)data
, RX_ALIGN
);
1304 static inline void *tx_agg_align(void *data
)
1306 return (void *)ALIGN((uintptr_t)data
, TX_ALIGN
);
1309 static void free_all_mem(struct r8152
*tp
)
1313 for (i
= 0; i
< RTL8152_MAX_RX
; i
++) {
1314 usb_free_urb(tp
->rx_info
[i
].urb
);
1315 tp
->rx_info
[i
].urb
= NULL
;
1317 kfree(tp
->rx_info
[i
].buffer
);
1318 tp
->rx_info
[i
].buffer
= NULL
;
1319 tp
->rx_info
[i
].head
= NULL
;
1322 for (i
= 0; i
< RTL8152_MAX_TX
; i
++) {
1323 usb_free_urb(tp
->tx_info
[i
].urb
);
1324 tp
->tx_info
[i
].urb
= NULL
;
1326 kfree(tp
->tx_info
[i
].buffer
);
1327 tp
->tx_info
[i
].buffer
= NULL
;
1328 tp
->tx_info
[i
].head
= NULL
;
1331 usb_free_urb(tp
->intr_urb
);
1332 tp
->intr_urb
= NULL
;
1334 kfree(tp
->intr_buff
);
1335 tp
->intr_buff
= NULL
;
1338 static int alloc_all_mem(struct r8152
*tp
)
1340 struct net_device
*netdev
= tp
->netdev
;
1341 struct usb_interface
*intf
= tp
->intf
;
1342 struct usb_host_interface
*alt
= intf
->cur_altsetting
;
1343 struct usb_host_endpoint
*ep_intr
= alt
->endpoint
+ 2;
1348 node
= netdev
->dev
.parent
? dev_to_node(netdev
->dev
.parent
) : -1;
1350 spin_lock_init(&tp
->rx_lock
);
1351 spin_lock_init(&tp
->tx_lock
);
1352 INIT_LIST_HEAD(&tp
->tx_free
);
1353 skb_queue_head_init(&tp
->tx_queue
);
1354 skb_queue_head_init(&tp
->rx_queue
);
1356 for (i
= 0; i
< RTL8152_MAX_RX
; i
++) {
1357 buf
= kmalloc_node(agg_buf_sz
, GFP_KERNEL
, node
);
1361 if (buf
!= rx_agg_align(buf
)) {
1363 buf
= kmalloc_node(agg_buf_sz
+ RX_ALIGN
, GFP_KERNEL
,
1369 urb
= usb_alloc_urb(0, GFP_KERNEL
);
1375 INIT_LIST_HEAD(&tp
->rx_info
[i
].list
);
1376 tp
->rx_info
[i
].context
= tp
;
1377 tp
->rx_info
[i
].urb
= urb
;
1378 tp
->rx_info
[i
].buffer
= buf
;
1379 tp
->rx_info
[i
].head
= rx_agg_align(buf
);
1382 for (i
= 0; i
< RTL8152_MAX_TX
; i
++) {
1383 buf
= kmalloc_node(agg_buf_sz
, GFP_KERNEL
, node
);
1387 if (buf
!= tx_agg_align(buf
)) {
1389 buf
= kmalloc_node(agg_buf_sz
+ TX_ALIGN
, GFP_KERNEL
,
1395 urb
= usb_alloc_urb(0, GFP_KERNEL
);
1401 INIT_LIST_HEAD(&tp
->tx_info
[i
].list
);
1402 tp
->tx_info
[i
].context
= tp
;
1403 tp
->tx_info
[i
].urb
= urb
;
1404 tp
->tx_info
[i
].buffer
= buf
;
1405 tp
->tx_info
[i
].head
= tx_agg_align(buf
);
1407 list_add_tail(&tp
->tx_info
[i
].list
, &tp
->tx_free
);
1410 tp
->intr_urb
= usb_alloc_urb(0, GFP_KERNEL
);
1414 tp
->intr_buff
= kmalloc(INTBUFSIZE
, GFP_KERNEL
);
1418 tp
->intr_interval
= (int)ep_intr
->desc
.bInterval
;
1419 usb_fill_int_urb(tp
->intr_urb
, tp
->udev
, usb_rcvintpipe(tp
->udev
, 3),
1420 tp
->intr_buff
, INTBUFSIZE
, intr_callback
,
1421 tp
, tp
->intr_interval
);
1430 static struct tx_agg
*r8152_get_tx_agg(struct r8152
*tp
)
1432 struct tx_agg
*agg
= NULL
;
1433 unsigned long flags
;
1435 if (list_empty(&tp
->tx_free
))
1438 spin_lock_irqsave(&tp
->tx_lock
, flags
);
1439 if (!list_empty(&tp
->tx_free
)) {
1440 struct list_head
*cursor
;
1442 cursor
= tp
->tx_free
.next
;
1443 list_del_init(cursor
);
1444 agg
= list_entry(cursor
, struct tx_agg
, list
);
1446 spin_unlock_irqrestore(&tp
->tx_lock
, flags
);
1451 /* r8152_csum_workaround()
1452 * The hw limites the value the transport offset. When the offset is out of the
1453 * range, calculate the checksum by sw.
1455 static void r8152_csum_workaround(struct r8152
*tp
, struct sk_buff
*skb
,
1456 struct sk_buff_head
*list
)
1458 if (skb_shinfo(skb
)->gso_size
) {
1459 netdev_features_t features
= tp
->netdev
->features
;
1460 struct sk_buff_head seg_list
;
1461 struct sk_buff
*segs
, *nskb
;
1463 features
&= ~(NETIF_F_SG
| NETIF_F_IPV6_CSUM
| NETIF_F_TSO6
);
1464 segs
= skb_gso_segment(skb
, features
);
1465 if (IS_ERR(segs
) || !segs
)
1468 __skb_queue_head_init(&seg_list
);
1474 __skb_queue_tail(&seg_list
, nskb
);
1477 skb_queue_splice(&seg_list
, list
);
1479 } else if (skb
->ip_summed
== CHECKSUM_PARTIAL
) {
1480 if (skb_checksum_help(skb
) < 0)
1483 __skb_queue_head(list
, skb
);
1485 struct net_device_stats
*stats
;
1488 stats
= &tp
->netdev
->stats
;
1489 stats
->tx_dropped
++;
1494 /* msdn_giant_send_check()
1495 * According to the document of microsoft, the TCP Pseudo Header excludes the
1496 * packet length for IPv6 TCP large packets.
1498 static int msdn_giant_send_check(struct sk_buff
*skb
)
1500 const struct ipv6hdr
*ipv6h
;
1504 ret
= skb_cow_head(skb
, 0);
1508 ipv6h
= ipv6_hdr(skb
);
1512 th
->check
= ~tcp_v6_check(0, &ipv6h
->saddr
, &ipv6h
->daddr
, 0);
1517 static inline void rtl_tx_vlan_tag(struct tx_desc
*desc
, struct sk_buff
*skb
)
1519 if (skb_vlan_tag_present(skb
)) {
1522 opts2
= TX_VLAN_TAG
| swab16(skb_vlan_tag_get(skb
));
1523 desc
->opts2
|= cpu_to_le32(opts2
);
1527 static inline void rtl_rx_vlan_tag(struct rx_desc
*desc
, struct sk_buff
*skb
)
1529 u32 opts2
= le32_to_cpu(desc
->opts2
);
1531 if (opts2
& RX_VLAN_TAG
)
1532 __vlan_hwaccel_put_tag(skb
, htons(ETH_P_8021Q
),
1533 swab16(opts2
& 0xffff));
1536 static int r8152_tx_csum(struct r8152
*tp
, struct tx_desc
*desc
,
1537 struct sk_buff
*skb
, u32 len
, u32 transport_offset
)
1539 u32 mss
= skb_shinfo(skb
)->gso_size
;
1540 u32 opts1
, opts2
= 0;
1541 int ret
= TX_CSUM_SUCCESS
;
1543 WARN_ON_ONCE(len
> TX_LEN_MAX
);
1545 opts1
= len
| TX_FS
| TX_LS
;
1548 if (transport_offset
> GTTCPHO_MAX
) {
1549 netif_warn(tp
, tx_err
, tp
->netdev
,
1550 "Invalid transport offset 0x%x for TSO\n",
1556 switch (vlan_get_protocol(skb
)) {
1557 case htons(ETH_P_IP
):
1561 case htons(ETH_P_IPV6
):
1562 if (msdn_giant_send_check(skb
)) {
1574 opts1
|= transport_offset
<< GTTCPHO_SHIFT
;
1575 opts2
|= min(mss
, MSS_MAX
) << MSS_SHIFT
;
1576 } else if (skb
->ip_summed
== CHECKSUM_PARTIAL
) {
1579 if (transport_offset
> TCPHO_MAX
) {
1580 netif_warn(tp
, tx_err
, tp
->netdev
,
1581 "Invalid transport offset 0x%x\n",
1587 switch (vlan_get_protocol(skb
)) {
1588 case htons(ETH_P_IP
):
1590 ip_protocol
= ip_hdr(skb
)->protocol
;
1593 case htons(ETH_P_IPV6
):
1595 ip_protocol
= ipv6_hdr(skb
)->nexthdr
;
1599 ip_protocol
= IPPROTO_RAW
;
1603 if (ip_protocol
== IPPROTO_TCP
)
1605 else if (ip_protocol
== IPPROTO_UDP
)
1610 opts2
|= transport_offset
<< TCPHO_SHIFT
;
1613 desc
->opts2
= cpu_to_le32(opts2
);
1614 desc
->opts1
= cpu_to_le32(opts1
);
1620 static int r8152_tx_agg_fill(struct r8152
*tp
, struct tx_agg
*agg
)
1622 struct sk_buff_head skb_head
, *tx_queue
= &tp
->tx_queue
;
1626 __skb_queue_head_init(&skb_head
);
1627 spin_lock(&tx_queue
->lock
);
1628 skb_queue_splice_init(tx_queue
, &skb_head
);
1629 spin_unlock(&tx_queue
->lock
);
1631 tx_data
= agg
->head
;
1634 remain
= agg_buf_sz
;
1636 while (remain
>= ETH_ZLEN
+ sizeof(struct tx_desc
)) {
1637 struct tx_desc
*tx_desc
;
1638 struct sk_buff
*skb
;
1642 skb
= __skb_dequeue(&skb_head
);
1646 len
= skb
->len
+ sizeof(*tx_desc
);
1649 __skb_queue_head(&skb_head
, skb
);
1653 tx_data
= tx_agg_align(tx_data
);
1654 tx_desc
= (struct tx_desc
*)tx_data
;
1656 offset
= (u32
)skb_transport_offset(skb
);
1658 if (r8152_tx_csum(tp
, tx_desc
, skb
, skb
->len
, offset
)) {
1659 r8152_csum_workaround(tp
, skb
, &skb_head
);
1663 rtl_tx_vlan_tag(tx_desc
, skb
);
1665 tx_data
+= sizeof(*tx_desc
);
1668 if (skb_copy_bits(skb
, 0, tx_data
, len
) < 0) {
1669 struct net_device_stats
*stats
= &tp
->netdev
->stats
;
1671 stats
->tx_dropped
++;
1672 dev_kfree_skb_any(skb
);
1673 tx_data
-= sizeof(*tx_desc
);
1678 agg
->skb_len
+= len
;
1681 dev_kfree_skb_any(skb
);
1683 remain
= agg_buf_sz
- (int)(tx_agg_align(tx_data
) - agg
->head
);
1686 if (!skb_queue_empty(&skb_head
)) {
1687 spin_lock(&tx_queue
->lock
);
1688 skb_queue_splice(&skb_head
, tx_queue
);
1689 spin_unlock(&tx_queue
->lock
);
1692 netif_tx_lock(tp
->netdev
);
1694 if (netif_queue_stopped(tp
->netdev
) &&
1695 skb_queue_len(&tp
->tx_queue
) < tp
->tx_qlen
)
1696 netif_wake_queue(tp
->netdev
);
1698 netif_tx_unlock(tp
->netdev
);
1700 ret
= usb_autopm_get_interface_async(tp
->intf
);
1704 usb_fill_bulk_urb(agg
->urb
, tp
->udev
, usb_sndbulkpipe(tp
->udev
, 2),
1705 agg
->head
, (int)(tx_data
- (u8
*)agg
->head
),
1706 (usb_complete_t
)write_bulk_callback
, agg
);
1708 ret
= usb_submit_urb(agg
->urb
, GFP_ATOMIC
);
1710 usb_autopm_put_interface_async(tp
->intf
);
1716 static u8
r8152_rx_csum(struct r8152
*tp
, struct rx_desc
*rx_desc
)
1718 u8 checksum
= CHECKSUM_NONE
;
1721 if (!(tp
->netdev
->features
& NETIF_F_RXCSUM
))
1724 opts2
= le32_to_cpu(rx_desc
->opts2
);
1725 opts3
= le32_to_cpu(rx_desc
->opts3
);
1727 if (opts2
& RD_IPV4_CS
) {
1729 checksum
= CHECKSUM_NONE
;
1730 else if ((opts2
& RD_UDP_CS
) && (opts3
& UDPF
))
1731 checksum
= CHECKSUM_NONE
;
1732 else if ((opts2
& RD_TCP_CS
) && (opts3
& TCPF
))
1733 checksum
= CHECKSUM_NONE
;
1735 checksum
= CHECKSUM_UNNECESSARY
;
1736 } else if (RD_IPV6_CS
) {
1737 if ((opts2
& RD_UDP_CS
) && !(opts3
& UDPF
))
1738 checksum
= CHECKSUM_UNNECESSARY
;
1739 else if ((opts2
& RD_TCP_CS
) && !(opts3
& TCPF
))
1740 checksum
= CHECKSUM_UNNECESSARY
;
1747 static int rx_bottom(struct r8152
*tp
, int budget
)
1749 unsigned long flags
;
1750 struct list_head
*cursor
, *next
, rx_queue
;
1751 int ret
= 0, work_done
= 0;
1753 if (!skb_queue_empty(&tp
->rx_queue
)) {
1754 while (work_done
< budget
) {
1755 struct sk_buff
*skb
= __skb_dequeue(&tp
->rx_queue
);
1756 struct net_device
*netdev
= tp
->netdev
;
1757 struct net_device_stats
*stats
= &netdev
->stats
;
1758 unsigned int pkt_len
;
1764 napi_gro_receive(&tp
->napi
, skb
);
1766 stats
->rx_packets
++;
1767 stats
->rx_bytes
+= pkt_len
;
1771 if (list_empty(&tp
->rx_done
))
1774 INIT_LIST_HEAD(&rx_queue
);
1775 spin_lock_irqsave(&tp
->rx_lock
, flags
);
1776 list_splice_init(&tp
->rx_done
, &rx_queue
);
1777 spin_unlock_irqrestore(&tp
->rx_lock
, flags
);
1779 list_for_each_safe(cursor
, next
, &rx_queue
) {
1780 struct rx_desc
*rx_desc
;
1786 list_del_init(cursor
);
1788 agg
= list_entry(cursor
, struct rx_agg
, list
);
1790 if (urb
->actual_length
< ETH_ZLEN
)
1793 rx_desc
= agg
->head
;
1794 rx_data
= agg
->head
;
1795 len_used
+= sizeof(struct rx_desc
);
1797 while (urb
->actual_length
> len_used
) {
1798 struct net_device
*netdev
= tp
->netdev
;
1799 struct net_device_stats
*stats
= &netdev
->stats
;
1800 unsigned int pkt_len
;
1801 struct sk_buff
*skb
;
1803 pkt_len
= le32_to_cpu(rx_desc
->opts1
) & RX_LEN_MASK
;
1804 if (pkt_len
< ETH_ZLEN
)
1807 len_used
+= pkt_len
;
1808 if (urb
->actual_length
< len_used
)
1811 pkt_len
-= CRC_SIZE
;
1812 rx_data
+= sizeof(struct rx_desc
);
1814 skb
= netdev_alloc_skb_ip_align(netdev
, pkt_len
);
1816 stats
->rx_dropped
++;
1820 skb
->ip_summed
= r8152_rx_csum(tp
, rx_desc
);
1821 memcpy(skb
->data
, rx_data
, pkt_len
);
1822 skb_put(skb
, pkt_len
);
1823 skb
->protocol
= eth_type_trans(skb
, netdev
);
1824 rtl_rx_vlan_tag(rx_desc
, skb
);
1825 if (work_done
< budget
) {
1826 napi_gro_receive(&tp
->napi
, skb
);
1828 stats
->rx_packets
++;
1829 stats
->rx_bytes
+= pkt_len
;
1831 __skb_queue_tail(&tp
->rx_queue
, skb
);
1835 rx_data
= rx_agg_align(rx_data
+ pkt_len
+ CRC_SIZE
);
1836 rx_desc
= (struct rx_desc
*)rx_data
;
1837 len_used
= (int)(rx_data
- (u8
*)agg
->head
);
1838 len_used
+= sizeof(struct rx_desc
);
1843 ret
= r8152_submit_rx(tp
, agg
, GFP_ATOMIC
);
1845 urb
->actual_length
= 0;
1846 list_add_tail(&agg
->list
, next
);
1850 if (!list_empty(&rx_queue
)) {
1851 spin_lock_irqsave(&tp
->rx_lock
, flags
);
1852 list_splice_tail(&rx_queue
, &tp
->rx_done
);
1853 spin_unlock_irqrestore(&tp
->rx_lock
, flags
);
1860 static void tx_bottom(struct r8152
*tp
)
1867 if (skb_queue_empty(&tp
->tx_queue
))
1870 agg
= r8152_get_tx_agg(tp
);
1874 res
= r8152_tx_agg_fill(tp
, agg
);
1876 struct net_device
*netdev
= tp
->netdev
;
1878 if (res
== -ENODEV
) {
1879 set_bit(RTL8152_UNPLUG
, &tp
->flags
);
1880 netif_device_detach(netdev
);
1882 struct net_device_stats
*stats
= &netdev
->stats
;
1883 unsigned long flags
;
1885 netif_warn(tp
, tx_err
, netdev
,
1886 "failed tx_urb %d\n", res
);
1887 stats
->tx_dropped
+= agg
->skb_num
;
1889 spin_lock_irqsave(&tp
->tx_lock
, flags
);
1890 list_add_tail(&agg
->list
, &tp
->tx_free
);
1891 spin_unlock_irqrestore(&tp
->tx_lock
, flags
);
1897 static void bottom_half(struct r8152
*tp
)
1899 if (test_bit(RTL8152_UNPLUG
, &tp
->flags
))
1902 if (!test_bit(WORK_ENABLE
, &tp
->flags
))
1905 /* When link down, the driver would cancel all bulks. */
1906 /* This avoid the re-submitting bulk */
1907 if (!netif_carrier_ok(tp
->netdev
))
1910 clear_bit(SCHEDULE_NAPI
, &tp
->flags
);
1915 static int r8152_poll(struct napi_struct
*napi
, int budget
)
1917 struct r8152
*tp
= container_of(napi
, struct r8152
, napi
);
1920 work_done
= rx_bottom(tp
, budget
);
1923 if (work_done
< budget
) {
1924 napi_complete(napi
);
1925 if (!list_empty(&tp
->rx_done
))
1926 napi_schedule(napi
);
1933 int r8152_submit_rx(struct r8152
*tp
, struct rx_agg
*agg
, gfp_t mem_flags
)
1937 /* The rx would be stopped, so skip submitting */
1938 if (test_bit(RTL8152_UNPLUG
, &tp
->flags
) ||
1939 !test_bit(WORK_ENABLE
, &tp
->flags
) || !netif_carrier_ok(tp
->netdev
))
1942 usb_fill_bulk_urb(agg
->urb
, tp
->udev
, usb_rcvbulkpipe(tp
->udev
, 1),
1943 agg
->head
, agg_buf_sz
,
1944 (usb_complete_t
)read_bulk_callback
, agg
);
1946 ret
= usb_submit_urb(agg
->urb
, mem_flags
);
1947 if (ret
== -ENODEV
) {
1948 set_bit(RTL8152_UNPLUG
, &tp
->flags
);
1949 netif_device_detach(tp
->netdev
);
1951 struct urb
*urb
= agg
->urb
;
1952 unsigned long flags
;
1954 urb
->actual_length
= 0;
1955 spin_lock_irqsave(&tp
->rx_lock
, flags
);
1956 list_add_tail(&agg
->list
, &tp
->rx_done
);
1957 spin_unlock_irqrestore(&tp
->rx_lock
, flags
);
1959 netif_err(tp
, rx_err
, tp
->netdev
,
1960 "Couldn't submit rx[%p], ret = %d\n", agg
, ret
);
1962 napi_schedule(&tp
->napi
);
1968 static void rtl_drop_queued_tx(struct r8152
*tp
)
1970 struct net_device_stats
*stats
= &tp
->netdev
->stats
;
1971 struct sk_buff_head skb_head
, *tx_queue
= &tp
->tx_queue
;
1972 struct sk_buff
*skb
;
1974 if (skb_queue_empty(tx_queue
))
1977 __skb_queue_head_init(&skb_head
);
1978 spin_lock_bh(&tx_queue
->lock
);
1979 skb_queue_splice_init(tx_queue
, &skb_head
);
1980 spin_unlock_bh(&tx_queue
->lock
);
1982 while ((skb
= __skb_dequeue(&skb_head
))) {
1984 stats
->tx_dropped
++;
1988 static void rtl8152_tx_timeout(struct net_device
*netdev
)
1990 struct r8152
*tp
= netdev_priv(netdev
);
1992 netif_warn(tp
, tx_err
, netdev
, "Tx timeout\n");
1994 usb_queue_reset_device(tp
->intf
);
1997 static void rtl8152_set_rx_mode(struct net_device
*netdev
)
1999 struct r8152
*tp
= netdev_priv(netdev
);
2001 if (netif_carrier_ok(netdev
)) {
2002 set_bit(RTL8152_SET_RX_MODE
, &tp
->flags
);
2003 schedule_delayed_work(&tp
->schedule
, 0);
2007 static void _rtl8152_set_rx_mode(struct net_device
*netdev
)
2009 struct r8152
*tp
= netdev_priv(netdev
);
2010 u32 mc_filter
[2]; /* Multicast hash filter */
2014 clear_bit(RTL8152_SET_RX_MODE
, &tp
->flags
);
2015 netif_stop_queue(netdev
);
2016 ocp_data
= ocp_read_dword(tp
, MCU_TYPE_PLA
, PLA_RCR
);
2017 ocp_data
&= ~RCR_ACPT_ALL
;
2018 ocp_data
|= RCR_AB
| RCR_APM
;
2020 if (netdev
->flags
& IFF_PROMISC
) {
2021 /* Unconditionally log net taps. */
2022 netif_notice(tp
, link
, netdev
, "Promiscuous mode enabled\n");
2023 ocp_data
|= RCR_AM
| RCR_AAP
;
2024 mc_filter
[1] = 0xffffffff;
2025 mc_filter
[0] = 0xffffffff;
2026 } else if ((netdev_mc_count(netdev
) > multicast_filter_limit
) ||
2027 (netdev
->flags
& IFF_ALLMULTI
)) {
2028 /* Too many to filter perfectly -- accept all multicasts. */
2030 mc_filter
[1] = 0xffffffff;
2031 mc_filter
[0] = 0xffffffff;
2033 struct netdev_hw_addr
*ha
;
2037 netdev_for_each_mc_addr(ha
, netdev
) {
2038 int bit_nr
= ether_crc(ETH_ALEN
, ha
->addr
) >> 26;
2040 mc_filter
[bit_nr
>> 5] |= 1 << (bit_nr
& 31);
2045 tmp
[0] = __cpu_to_le32(swab32(mc_filter
[1]));
2046 tmp
[1] = __cpu_to_le32(swab32(mc_filter
[0]));
2048 pla_ocp_write(tp
, PLA_MAR
, BYTE_EN_DWORD
, sizeof(tmp
), tmp
);
2049 ocp_write_dword(tp
, MCU_TYPE_PLA
, PLA_RCR
, ocp_data
);
2050 netif_wake_queue(netdev
);
2053 static netdev_features_t
2054 rtl8152_features_check(struct sk_buff
*skb
, struct net_device
*dev
,
2055 netdev_features_t features
)
2057 u32 mss
= skb_shinfo(skb
)->gso_size
;
2058 int max_offset
= mss
? GTTCPHO_MAX
: TCPHO_MAX
;
2059 int offset
= skb_transport_offset(skb
);
2061 if ((mss
|| skb
->ip_summed
== CHECKSUM_PARTIAL
) && offset
> max_offset
)
2062 features
&= ~(NETIF_F_ALL_CSUM
| NETIF_F_GSO_MASK
);
2063 else if ((skb
->len
+ sizeof(struct tx_desc
)) > agg_buf_sz
)
2064 features
&= ~NETIF_F_GSO_MASK
;
2069 static netdev_tx_t
rtl8152_start_xmit(struct sk_buff
*skb
,
2070 struct net_device
*netdev
)
2072 struct r8152
*tp
= netdev_priv(netdev
);
2074 skb_tx_timestamp(skb
);
2076 skb_queue_tail(&tp
->tx_queue
, skb
);
2078 if (!list_empty(&tp
->tx_free
)) {
2079 if (test_bit(SELECTIVE_SUSPEND
, &tp
->flags
)) {
2080 set_bit(SCHEDULE_NAPI
, &tp
->flags
);
2081 schedule_delayed_work(&tp
->schedule
, 0);
2083 usb_mark_last_busy(tp
->udev
);
2084 napi_schedule(&tp
->napi
);
2086 } else if (skb_queue_len(&tp
->tx_queue
) > tp
->tx_qlen
) {
2087 netif_stop_queue(netdev
);
2090 return NETDEV_TX_OK
;
2093 static void r8152b_reset_packet_filter(struct r8152
*tp
)
2097 ocp_data
= ocp_read_word(tp
, MCU_TYPE_PLA
, PLA_FMC
);
2098 ocp_data
&= ~FMC_FCR_MCU_EN
;
2099 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_FMC
, ocp_data
);
2100 ocp_data
|= FMC_FCR_MCU_EN
;
2101 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_FMC
, ocp_data
);
2104 static void rtl8152_nic_reset(struct r8152
*tp
)
2108 ocp_write_byte(tp
, MCU_TYPE_PLA
, PLA_CR
, CR_RST
);
2110 for (i
= 0; i
< 1000; i
++) {
2111 if (!(ocp_read_byte(tp
, MCU_TYPE_PLA
, PLA_CR
) & CR_RST
))
2113 usleep_range(100, 400);
2117 static void set_tx_qlen(struct r8152
*tp
)
2119 struct net_device
*netdev
= tp
->netdev
;
2121 tp
->tx_qlen
= agg_buf_sz
/ (netdev
->mtu
+ VLAN_ETH_HLEN
+ VLAN_HLEN
+
2122 sizeof(struct tx_desc
));
2125 static inline u8
rtl8152_get_speed(struct r8152
*tp
)
2127 return ocp_read_byte(tp
, MCU_TYPE_PLA
, PLA_PHYSTATUS
);
2130 static void rtl_set_eee_plus(struct r8152
*tp
)
2135 speed
= rtl8152_get_speed(tp
);
2136 if (speed
& _10bps
) {
2137 ocp_data
= ocp_read_word(tp
, MCU_TYPE_PLA
, PLA_EEEP_CR
);
2138 ocp_data
|= EEEP_CR_EEEP_TX
;
2139 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_EEEP_CR
, ocp_data
);
2141 ocp_data
= ocp_read_word(tp
, MCU_TYPE_PLA
, PLA_EEEP_CR
);
2142 ocp_data
&= ~EEEP_CR_EEEP_TX
;
2143 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_EEEP_CR
, ocp_data
);
2147 static void rxdy_gated_en(struct r8152
*tp
, bool enable
)
2151 ocp_data
= ocp_read_word(tp
, MCU_TYPE_PLA
, PLA_MISC_1
);
2153 ocp_data
|= RXDY_GATED_EN
;
2155 ocp_data
&= ~RXDY_GATED_EN
;
2156 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_MISC_1
, ocp_data
);
2159 static int rtl_start_rx(struct r8152
*tp
)
2163 INIT_LIST_HEAD(&tp
->rx_done
);
2164 for (i
= 0; i
< RTL8152_MAX_RX
; i
++) {
2165 INIT_LIST_HEAD(&tp
->rx_info
[i
].list
);
2166 ret
= r8152_submit_rx(tp
, &tp
->rx_info
[i
], GFP_KERNEL
);
2171 if (ret
&& ++i
< RTL8152_MAX_RX
) {
2172 struct list_head rx_queue
;
2173 unsigned long flags
;
2175 INIT_LIST_HEAD(&rx_queue
);
2178 struct rx_agg
*agg
= &tp
->rx_info
[i
++];
2179 struct urb
*urb
= agg
->urb
;
2181 urb
->actual_length
= 0;
2182 list_add_tail(&agg
->list
, &rx_queue
);
2183 } while (i
< RTL8152_MAX_RX
);
2185 spin_lock_irqsave(&tp
->rx_lock
, flags
);
2186 list_splice_tail(&rx_queue
, &tp
->rx_done
);
2187 spin_unlock_irqrestore(&tp
->rx_lock
, flags
);
2193 static int rtl_stop_rx(struct r8152
*tp
)
2197 for (i
= 0; i
< RTL8152_MAX_RX
; i
++)
2198 usb_kill_urb(tp
->rx_info
[i
].urb
);
2200 while (!skb_queue_empty(&tp
->rx_queue
))
2201 dev_kfree_skb(__skb_dequeue(&tp
->rx_queue
));
2206 static int rtl_enable(struct r8152
*tp
)
2210 r8152b_reset_packet_filter(tp
);
2212 ocp_data
= ocp_read_byte(tp
, MCU_TYPE_PLA
, PLA_CR
);
2213 ocp_data
|= CR_RE
| CR_TE
;
2214 ocp_write_byte(tp
, MCU_TYPE_PLA
, PLA_CR
, ocp_data
);
2216 rxdy_gated_en(tp
, false);
2221 static int rtl8152_enable(struct r8152
*tp
)
2223 if (test_bit(RTL8152_UNPLUG
, &tp
->flags
))
2227 rtl_set_eee_plus(tp
);
2229 return rtl_enable(tp
);
2232 static void r8153_set_rx_early_timeout(struct r8152
*tp
)
2234 u32 ocp_data
= tp
->coalesce
/ 8;
2236 ocp_write_word(tp
, MCU_TYPE_USB
, USB_RX_EARLY_TIMEOUT
, ocp_data
);
2239 static void r8153_set_rx_early_size(struct r8152
*tp
)
2241 u32 mtu
= tp
->netdev
->mtu
;
2242 u32 ocp_data
= (agg_buf_sz
- mtu
- VLAN_ETH_HLEN
- VLAN_HLEN
) / 4;
2244 ocp_write_word(tp
, MCU_TYPE_USB
, USB_RX_EARLY_SIZE
, ocp_data
);
2247 static int rtl8153_enable(struct r8152
*tp
)
2249 if (test_bit(RTL8152_UNPLUG
, &tp
->flags
))
2252 usb_disable_lpm(tp
->udev
);
2254 rtl_set_eee_plus(tp
);
2255 r8153_set_rx_early_timeout(tp
);
2256 r8153_set_rx_early_size(tp
);
2258 return rtl_enable(tp
);
2261 static void rtl_disable(struct r8152
*tp
)
2266 if (test_bit(RTL8152_UNPLUG
, &tp
->flags
)) {
2267 rtl_drop_queued_tx(tp
);
2271 ocp_data
= ocp_read_dword(tp
, MCU_TYPE_PLA
, PLA_RCR
);
2272 ocp_data
&= ~RCR_ACPT_ALL
;
2273 ocp_write_dword(tp
, MCU_TYPE_PLA
, PLA_RCR
, ocp_data
);
2275 rtl_drop_queued_tx(tp
);
2277 for (i
= 0; i
< RTL8152_MAX_TX
; i
++)
2278 usb_kill_urb(tp
->tx_info
[i
].urb
);
2280 rxdy_gated_en(tp
, true);
2282 for (i
= 0; i
< 1000; i
++) {
2283 ocp_data
= ocp_read_byte(tp
, MCU_TYPE_PLA
, PLA_OOB_CTRL
);
2284 if ((ocp_data
& FIFO_EMPTY
) == FIFO_EMPTY
)
2286 usleep_range(1000, 2000);
2289 for (i
= 0; i
< 1000; i
++) {
2290 if (ocp_read_word(tp
, MCU_TYPE_PLA
, PLA_TCR0
) & TCR0_TX_EMPTY
)
2292 usleep_range(1000, 2000);
2297 rtl8152_nic_reset(tp
);
2300 static void r8152_power_cut_en(struct r8152
*tp
, bool enable
)
2304 ocp_data
= ocp_read_word(tp
, MCU_TYPE_USB
, USB_UPS_CTRL
);
2306 ocp_data
|= POWER_CUT
;
2308 ocp_data
&= ~POWER_CUT
;
2309 ocp_write_word(tp
, MCU_TYPE_USB
, USB_UPS_CTRL
, ocp_data
);
2311 ocp_data
= ocp_read_word(tp
, MCU_TYPE_USB
, USB_PM_CTRL_STATUS
);
2312 ocp_data
&= ~RESUME_INDICATE
;
2313 ocp_write_word(tp
, MCU_TYPE_USB
, USB_PM_CTRL_STATUS
, ocp_data
);
2316 static void rtl_rx_vlan_en(struct r8152
*tp
, bool enable
)
2320 ocp_data
= ocp_read_word(tp
, MCU_TYPE_PLA
, PLA_CPCR
);
2322 ocp_data
|= CPCR_RX_VLAN
;
2324 ocp_data
&= ~CPCR_RX_VLAN
;
2325 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_CPCR
, ocp_data
);
2328 static int rtl8152_set_features(struct net_device
*dev
,
2329 netdev_features_t features
)
2331 netdev_features_t changed
= features
^ dev
->features
;
2332 struct r8152
*tp
= netdev_priv(dev
);
2335 ret
= usb_autopm_get_interface(tp
->intf
);
2339 mutex_lock(&tp
->control
);
2341 if (changed
& NETIF_F_HW_VLAN_CTAG_RX
) {
2342 if (features
& NETIF_F_HW_VLAN_CTAG_RX
)
2343 rtl_rx_vlan_en(tp
, true);
2345 rtl_rx_vlan_en(tp
, false);
2348 mutex_unlock(&tp
->control
);
2350 usb_autopm_put_interface(tp
->intf
);
2356 #define WAKE_ANY (WAKE_PHY | WAKE_MAGIC | WAKE_UCAST | WAKE_BCAST | WAKE_MCAST)
2358 static u32
__rtl_get_wol(struct r8152
*tp
)
2363 ocp_data
= ocp_read_byte(tp
, MCU_TYPE_PLA
, PLA_CONFIG5
);
2364 if (!(ocp_data
& LAN_WAKE_EN
))
2367 ocp_data
= ocp_read_word(tp
, MCU_TYPE_PLA
, PLA_CONFIG34
);
2368 if (ocp_data
& LINK_ON_WAKE_EN
)
2369 wolopts
|= WAKE_PHY
;
2371 ocp_data
= ocp_read_word(tp
, MCU_TYPE_PLA
, PLA_CONFIG5
);
2372 if (ocp_data
& UWF_EN
)
2373 wolopts
|= WAKE_UCAST
;
2374 if (ocp_data
& BWF_EN
)
2375 wolopts
|= WAKE_BCAST
;
2376 if (ocp_data
& MWF_EN
)
2377 wolopts
|= WAKE_MCAST
;
2379 ocp_data
= ocp_read_word(tp
, MCU_TYPE_PLA
, PLA_CFG_WOL
);
2380 if (ocp_data
& MAGIC_EN
)
2381 wolopts
|= WAKE_MAGIC
;
2386 static void __rtl_set_wol(struct r8152
*tp
, u32 wolopts
)
2390 ocp_write_byte(tp
, MCU_TYPE_PLA
, PLA_CRWECR
, CRWECR_CONFIG
);
2392 ocp_data
= ocp_read_word(tp
, MCU_TYPE_PLA
, PLA_CONFIG34
);
2393 ocp_data
&= ~LINK_ON_WAKE_EN
;
2394 if (wolopts
& WAKE_PHY
)
2395 ocp_data
|= LINK_ON_WAKE_EN
;
2396 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_CONFIG34
, ocp_data
);
2398 ocp_data
= ocp_read_word(tp
, MCU_TYPE_PLA
, PLA_CONFIG5
);
2399 ocp_data
&= ~(UWF_EN
| BWF_EN
| MWF_EN
| LAN_WAKE_EN
);
2400 if (wolopts
& WAKE_UCAST
)
2402 if (wolopts
& WAKE_BCAST
)
2404 if (wolopts
& WAKE_MCAST
)
2406 if (wolopts
& WAKE_ANY
)
2407 ocp_data
|= LAN_WAKE_EN
;
2408 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_CONFIG5
, ocp_data
);
2410 ocp_write_byte(tp
, MCU_TYPE_PLA
, PLA_CRWECR
, CRWECR_NORAML
);
2412 ocp_data
= ocp_read_word(tp
, MCU_TYPE_PLA
, PLA_CFG_WOL
);
2413 ocp_data
&= ~MAGIC_EN
;
2414 if (wolopts
& WAKE_MAGIC
)
2415 ocp_data
|= MAGIC_EN
;
2416 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_CFG_WOL
, ocp_data
);
2418 if (wolopts
& WAKE_ANY
)
2419 device_set_wakeup_enable(&tp
->udev
->dev
, true);
2421 device_set_wakeup_enable(&tp
->udev
->dev
, false);
2424 static void r8153_u1u2en(struct r8152
*tp
, bool enable
)
2429 memset(u1u2
, 0xff, sizeof(u1u2
));
2431 memset(u1u2
, 0x00, sizeof(u1u2
));
2433 usb_ocp_write(tp
, USB_TOLERANCE
, BYTE_EN_SIX_BYTES
, sizeof(u1u2
), u1u2
);
2436 static void r8153_u2p3en(struct r8152
*tp
, bool enable
)
2440 ocp_data
= ocp_read_word(tp
, MCU_TYPE_USB
, USB_U2P3_CTRL
);
2441 if (enable
&& tp
->version
!= RTL_VER_03
&& tp
->version
!= RTL_VER_04
)
2442 ocp_data
|= U2P3_ENABLE
;
2444 ocp_data
&= ~U2P3_ENABLE
;
2445 ocp_write_word(tp
, MCU_TYPE_USB
, USB_U2P3_CTRL
, ocp_data
);
2448 static void r8153_power_cut_en(struct r8152
*tp
, bool enable
)
2452 ocp_data
= ocp_read_word(tp
, MCU_TYPE_USB
, USB_POWER_CUT
);
2454 ocp_data
|= PWR_EN
| PHASE2_EN
;
2456 ocp_data
&= ~(PWR_EN
| PHASE2_EN
);
2457 ocp_write_word(tp
, MCU_TYPE_USB
, USB_POWER_CUT
, ocp_data
);
2459 ocp_data
= ocp_read_word(tp
, MCU_TYPE_USB
, USB_MISC_0
);
2460 ocp_data
&= ~PCUT_STATUS
;
2461 ocp_write_word(tp
, MCU_TYPE_USB
, USB_MISC_0
, ocp_data
);
2464 static bool rtl_can_wakeup(struct r8152
*tp
)
2466 struct usb_device
*udev
= tp
->udev
;
2468 return (udev
->actconfig
->desc
.bmAttributes
& USB_CONFIG_ATT_WAKEUP
);
2471 static void rtl_runtime_suspend_enable(struct r8152
*tp
, bool enable
)
2476 r8153_u1u2en(tp
, false);
2477 r8153_u2p3en(tp
, false);
2479 __rtl_set_wol(tp
, WAKE_ANY
);
2481 ocp_write_byte(tp
, MCU_TYPE_PLA
, PLA_CRWECR
, CRWECR_CONFIG
);
2483 ocp_data
= ocp_read_word(tp
, MCU_TYPE_PLA
, PLA_CONFIG34
);
2484 ocp_data
|= LINK_OFF_WAKE_EN
;
2485 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_CONFIG34
, ocp_data
);
2487 ocp_write_byte(tp
, MCU_TYPE_PLA
, PLA_CRWECR
, CRWECR_NORAML
);
2489 __rtl_set_wol(tp
, tp
->saved_wolopts
);
2490 r8153_u2p3en(tp
, true);
2491 r8153_u1u2en(tp
, true);
2495 static void rtl_phy_reset(struct r8152
*tp
)
2500 clear_bit(PHY_RESET
, &tp
->flags
);
2502 data
= r8152_mdio_read(tp
, MII_BMCR
);
2504 /* don't reset again before the previous one complete */
2505 if (data
& BMCR_RESET
)
2509 r8152_mdio_write(tp
, MII_BMCR
, data
);
2511 for (i
= 0; i
< 50; i
++) {
2513 if ((r8152_mdio_read(tp
, MII_BMCR
) & BMCR_RESET
) == 0)
2518 static void r8153_teredo_off(struct r8152
*tp
)
2522 ocp_data
= ocp_read_word(tp
, MCU_TYPE_PLA
, PLA_TEREDO_CFG
);
2523 ocp_data
&= ~(TEREDO_SEL
| TEREDO_RS_EVENT_MASK
| OOB_TEREDO_EN
);
2524 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_TEREDO_CFG
, ocp_data
);
2526 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_WDT6_CTRL
, WDT6_SET_MODE
);
2527 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_REALWOW_TIMER
, 0);
2528 ocp_write_dword(tp
, MCU_TYPE_PLA
, PLA_TEREDO_TIMER
, 0);
2531 static void r8152b_disable_aldps(struct r8152
*tp
)
2533 ocp_reg_write(tp
, OCP_ALDPS_CONFIG
, ENPDNPS
| LINKENA
| DIS_SDSAVE
);
2537 static inline void r8152b_enable_aldps(struct r8152
*tp
)
2539 ocp_reg_write(tp
, OCP_ALDPS_CONFIG
, ENPWRSAVE
| ENPDNPS
|
2540 LINKENA
| DIS_SDSAVE
);
2543 static void rtl8152_disable(struct r8152
*tp
)
2545 r8152b_disable_aldps(tp
);
2547 r8152b_enable_aldps(tp
);
2550 static void r8152b_hw_phy_cfg(struct r8152
*tp
)
2554 data
= r8152_mdio_read(tp
, MII_BMCR
);
2555 if (data
& BMCR_PDOWN
) {
2556 data
&= ~BMCR_PDOWN
;
2557 r8152_mdio_write(tp
, MII_BMCR
, data
);
2560 set_bit(PHY_RESET
, &tp
->flags
);
2563 static void r8152b_exit_oob(struct r8152
*tp
)
2568 ocp_data
= ocp_read_dword(tp
, MCU_TYPE_PLA
, PLA_RCR
);
2569 ocp_data
&= ~RCR_ACPT_ALL
;
2570 ocp_write_dword(tp
, MCU_TYPE_PLA
, PLA_RCR
, ocp_data
);
2572 rxdy_gated_en(tp
, true);
2573 r8153_teredo_off(tp
);
2574 r8152b_hw_phy_cfg(tp
);
2576 ocp_write_byte(tp
, MCU_TYPE_PLA
, PLA_CRWECR
, CRWECR_NORAML
);
2577 ocp_write_byte(tp
, MCU_TYPE_PLA
, PLA_CR
, 0x00);
2579 ocp_data
= ocp_read_byte(tp
, MCU_TYPE_PLA
, PLA_OOB_CTRL
);
2580 ocp_data
&= ~NOW_IS_OOB
;
2581 ocp_write_byte(tp
, MCU_TYPE_PLA
, PLA_OOB_CTRL
, ocp_data
);
2583 ocp_data
= ocp_read_word(tp
, MCU_TYPE_PLA
, PLA_SFF_STS_7
);
2584 ocp_data
&= ~MCU_BORW_EN
;
2585 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_SFF_STS_7
, ocp_data
);
2587 for (i
= 0; i
< 1000; i
++) {
2588 ocp_data
= ocp_read_byte(tp
, MCU_TYPE_PLA
, PLA_OOB_CTRL
);
2589 if (ocp_data
& LINK_LIST_READY
)
2591 usleep_range(1000, 2000);
2594 ocp_data
= ocp_read_word(tp
, MCU_TYPE_PLA
, PLA_SFF_STS_7
);
2595 ocp_data
|= RE_INIT_LL
;
2596 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_SFF_STS_7
, ocp_data
);
2598 for (i
= 0; i
< 1000; i
++) {
2599 ocp_data
= ocp_read_byte(tp
, MCU_TYPE_PLA
, PLA_OOB_CTRL
);
2600 if (ocp_data
& LINK_LIST_READY
)
2602 usleep_range(1000, 2000);
2605 rtl8152_nic_reset(tp
);
2607 /* rx share fifo credit full threshold */
2608 ocp_write_dword(tp
, MCU_TYPE_PLA
, PLA_RXFIFO_CTRL0
, RXFIFO_THR1_NORMAL
);
2610 if (tp
->udev
->speed
== USB_SPEED_FULL
||
2611 tp
->udev
->speed
== USB_SPEED_LOW
) {
2612 /* rx share fifo credit near full threshold */
2613 ocp_write_dword(tp
, MCU_TYPE_PLA
, PLA_RXFIFO_CTRL1
,
2615 ocp_write_dword(tp
, MCU_TYPE_PLA
, PLA_RXFIFO_CTRL2
,
2618 /* rx share fifo credit near full threshold */
2619 ocp_write_dword(tp
, MCU_TYPE_PLA
, PLA_RXFIFO_CTRL1
,
2621 ocp_write_dword(tp
, MCU_TYPE_PLA
, PLA_RXFIFO_CTRL2
,
2625 /* TX share fifo free credit full threshold */
2626 ocp_write_dword(tp
, MCU_TYPE_PLA
, PLA_TXFIFO_CTRL
, TXFIFO_THR_NORMAL
);
2628 ocp_write_byte(tp
, MCU_TYPE_USB
, USB_TX_AGG
, TX_AGG_MAX_THRESHOLD
);
2629 ocp_write_dword(tp
, MCU_TYPE_USB
, USB_RX_BUF_TH
, RX_THR_HIGH
);
2630 ocp_write_dword(tp
, MCU_TYPE_USB
, USB_TX_DMA
,
2631 TEST_MODE_DISABLE
| TX_SIZE_ADJUST1
);
2633 rtl_rx_vlan_en(tp
, tp
->netdev
->features
& NETIF_F_HW_VLAN_CTAG_RX
);
2635 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_RMS
, RTL8152_RMS
);
2637 ocp_data
= ocp_read_word(tp
, MCU_TYPE_PLA
, PLA_TCR0
);
2638 ocp_data
|= TCR0_AUTO_FIFO
;
2639 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_TCR0
, ocp_data
);
2642 static void r8152b_enter_oob(struct r8152
*tp
)
2647 ocp_data
= ocp_read_byte(tp
, MCU_TYPE_PLA
, PLA_OOB_CTRL
);
2648 ocp_data
&= ~NOW_IS_OOB
;
2649 ocp_write_byte(tp
, MCU_TYPE_PLA
, PLA_OOB_CTRL
, ocp_data
);
2651 ocp_write_dword(tp
, MCU_TYPE_PLA
, PLA_RXFIFO_CTRL0
, RXFIFO_THR1_OOB
);
2652 ocp_write_dword(tp
, MCU_TYPE_PLA
, PLA_RXFIFO_CTRL1
, RXFIFO_THR2_OOB
);
2653 ocp_write_dword(tp
, MCU_TYPE_PLA
, PLA_RXFIFO_CTRL2
, RXFIFO_THR3_OOB
);
2657 for (i
= 0; i
< 1000; i
++) {
2658 ocp_data
= ocp_read_byte(tp
, MCU_TYPE_PLA
, PLA_OOB_CTRL
);
2659 if (ocp_data
& LINK_LIST_READY
)
2661 usleep_range(1000, 2000);
2664 ocp_data
= ocp_read_word(tp
, MCU_TYPE_PLA
, PLA_SFF_STS_7
);
2665 ocp_data
|= RE_INIT_LL
;
2666 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_SFF_STS_7
, ocp_data
);
2668 for (i
= 0; i
< 1000; i
++) {
2669 ocp_data
= ocp_read_byte(tp
, MCU_TYPE_PLA
, PLA_OOB_CTRL
);
2670 if (ocp_data
& LINK_LIST_READY
)
2672 usleep_range(1000, 2000);
2675 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_RMS
, RTL8152_RMS
);
2677 rtl_rx_vlan_en(tp
, true);
2679 ocp_data
= ocp_read_word(tp
, MCU_TYPE_PLA
, PAL_BDC_CR
);
2680 ocp_data
|= ALDPS_PROXY_MODE
;
2681 ocp_write_word(tp
, MCU_TYPE_PLA
, PAL_BDC_CR
, ocp_data
);
2683 ocp_data
= ocp_read_byte(tp
, MCU_TYPE_PLA
, PLA_OOB_CTRL
);
2684 ocp_data
|= NOW_IS_OOB
| DIS_MCU_CLROOB
;
2685 ocp_write_byte(tp
, MCU_TYPE_PLA
, PLA_OOB_CTRL
, ocp_data
);
2687 rxdy_gated_en(tp
, false);
2689 ocp_data
= ocp_read_dword(tp
, MCU_TYPE_PLA
, PLA_RCR
);
2690 ocp_data
|= RCR_APM
| RCR_AM
| RCR_AB
;
2691 ocp_write_dword(tp
, MCU_TYPE_PLA
, PLA_RCR
, ocp_data
);
2694 static void r8153_hw_phy_cfg(struct r8152
*tp
)
2699 if (tp
->version
== RTL_VER_03
|| tp
->version
== RTL_VER_04
||
2700 tp
->version
== RTL_VER_05
)
2701 ocp_reg_write(tp
, OCP_ADC_CFG
, CKADSEL_L
| ADC_EN
| EN_EMI_L
);
2703 data
= r8152_mdio_read(tp
, MII_BMCR
);
2704 if (data
& BMCR_PDOWN
) {
2705 data
&= ~BMCR_PDOWN
;
2706 r8152_mdio_write(tp
, MII_BMCR
, data
);
2709 if (tp
->version
== RTL_VER_03
) {
2710 data
= ocp_reg_read(tp
, OCP_EEE_CFG
);
2711 data
&= ~CTAP_SHORT_EN
;
2712 ocp_reg_write(tp
, OCP_EEE_CFG
, data
);
2715 data
= ocp_reg_read(tp
, OCP_POWER_CFG
);
2716 data
|= EEE_CLKDIV_EN
;
2717 ocp_reg_write(tp
, OCP_POWER_CFG
, data
);
2719 data
= ocp_reg_read(tp
, OCP_DOWN_SPEED
);
2720 data
|= EN_10M_BGOFF
;
2721 ocp_reg_write(tp
, OCP_DOWN_SPEED
, data
);
2722 data
= ocp_reg_read(tp
, OCP_POWER_CFG
);
2723 data
|= EN_10M_PLLOFF
;
2724 ocp_reg_write(tp
, OCP_POWER_CFG
, data
);
2725 sram_write(tp
, SRAM_IMPEDANCE
, 0x0b13);
2727 ocp_data
= ocp_read_word(tp
, MCU_TYPE_PLA
, PLA_PHY_PWR
);
2728 ocp_data
|= PFM_PWM_SWITCH
;
2729 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_PHY_PWR
, ocp_data
);
2731 /* Enable LPF corner auto tune */
2732 sram_write(tp
, SRAM_LPF_CFG
, 0xf70f);
2734 /* Adjust 10M Amplitude */
2735 sram_write(tp
, SRAM_10M_AMP1
, 0x00af);
2736 sram_write(tp
, SRAM_10M_AMP2
, 0x0208);
2738 set_bit(PHY_RESET
, &tp
->flags
);
2741 static void r8153_first_init(struct r8152
*tp
)
2746 rxdy_gated_en(tp
, true);
2747 r8153_teredo_off(tp
);
2749 ocp_data
= ocp_read_dword(tp
, MCU_TYPE_PLA
, PLA_RCR
);
2750 ocp_data
&= ~RCR_ACPT_ALL
;
2751 ocp_write_dword(tp
, MCU_TYPE_PLA
, PLA_RCR
, ocp_data
);
2753 r8153_hw_phy_cfg(tp
);
2755 rtl8152_nic_reset(tp
);
2757 ocp_data
= ocp_read_byte(tp
, MCU_TYPE_PLA
, PLA_OOB_CTRL
);
2758 ocp_data
&= ~NOW_IS_OOB
;
2759 ocp_write_byte(tp
, MCU_TYPE_PLA
, PLA_OOB_CTRL
, ocp_data
);
2761 ocp_data
= ocp_read_word(tp
, MCU_TYPE_PLA
, PLA_SFF_STS_7
);
2762 ocp_data
&= ~MCU_BORW_EN
;
2763 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_SFF_STS_7
, ocp_data
);
2765 for (i
= 0; i
< 1000; i
++) {
2766 ocp_data
= ocp_read_byte(tp
, MCU_TYPE_PLA
, PLA_OOB_CTRL
);
2767 if (ocp_data
& LINK_LIST_READY
)
2769 usleep_range(1000, 2000);
2772 ocp_data
= ocp_read_word(tp
, MCU_TYPE_PLA
, PLA_SFF_STS_7
);
2773 ocp_data
|= RE_INIT_LL
;
2774 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_SFF_STS_7
, ocp_data
);
2776 for (i
= 0; i
< 1000; i
++) {
2777 ocp_data
= ocp_read_byte(tp
, MCU_TYPE_PLA
, PLA_OOB_CTRL
);
2778 if (ocp_data
& LINK_LIST_READY
)
2780 usleep_range(1000, 2000);
2783 rtl_rx_vlan_en(tp
, tp
->netdev
->features
& NETIF_F_HW_VLAN_CTAG_RX
);
2785 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_RMS
, RTL8153_RMS
);
2786 ocp_write_byte(tp
, MCU_TYPE_PLA
, PLA_MTPS
, MTPS_JUMBO
);
2788 ocp_data
= ocp_read_word(tp
, MCU_TYPE_PLA
, PLA_TCR0
);
2789 ocp_data
|= TCR0_AUTO_FIFO
;
2790 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_TCR0
, ocp_data
);
2792 rtl8152_nic_reset(tp
);
2794 /* rx share fifo credit full threshold */
2795 ocp_write_dword(tp
, MCU_TYPE_PLA
, PLA_RXFIFO_CTRL0
, RXFIFO_THR1_NORMAL
);
2796 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_RXFIFO_CTRL1
, RXFIFO_THR2_NORMAL
);
2797 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_RXFIFO_CTRL2
, RXFIFO_THR3_NORMAL
);
2798 /* TX share fifo free credit full threshold */
2799 ocp_write_dword(tp
, MCU_TYPE_PLA
, PLA_TXFIFO_CTRL
, TXFIFO_THR_NORMAL2
);
2801 /* rx aggregation */
2802 ocp_data
= ocp_read_word(tp
, MCU_TYPE_USB
, USB_USB_CTRL
);
2803 ocp_data
&= ~(RX_AGG_DISABLE
| RX_ZERO_EN
);
2804 ocp_write_word(tp
, MCU_TYPE_USB
, USB_USB_CTRL
, ocp_data
);
2807 static void r8153_enter_oob(struct r8152
*tp
)
2812 ocp_data
= ocp_read_byte(tp
, MCU_TYPE_PLA
, PLA_OOB_CTRL
);
2813 ocp_data
&= ~NOW_IS_OOB
;
2814 ocp_write_byte(tp
, MCU_TYPE_PLA
, PLA_OOB_CTRL
, ocp_data
);
2818 for (i
= 0; i
< 1000; i
++) {
2819 ocp_data
= ocp_read_byte(tp
, MCU_TYPE_PLA
, PLA_OOB_CTRL
);
2820 if (ocp_data
& LINK_LIST_READY
)
2822 usleep_range(1000, 2000);
2825 ocp_data
= ocp_read_word(tp
, MCU_TYPE_PLA
, PLA_SFF_STS_7
);
2826 ocp_data
|= RE_INIT_LL
;
2827 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_SFF_STS_7
, ocp_data
);
2829 for (i
= 0; i
< 1000; i
++) {
2830 ocp_data
= ocp_read_byte(tp
, MCU_TYPE_PLA
, PLA_OOB_CTRL
);
2831 if (ocp_data
& LINK_LIST_READY
)
2833 usleep_range(1000, 2000);
2836 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_RMS
, RTL8153_RMS
);
2838 ocp_data
= ocp_read_word(tp
, MCU_TYPE_PLA
, PLA_TEREDO_CFG
);
2839 ocp_data
&= ~TEREDO_WAKE_MASK
;
2840 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_TEREDO_CFG
, ocp_data
);
2842 rtl_rx_vlan_en(tp
, true);
2844 ocp_data
= ocp_read_word(tp
, MCU_TYPE_PLA
, PAL_BDC_CR
);
2845 ocp_data
|= ALDPS_PROXY_MODE
;
2846 ocp_write_word(tp
, MCU_TYPE_PLA
, PAL_BDC_CR
, ocp_data
);
2848 ocp_data
= ocp_read_byte(tp
, MCU_TYPE_PLA
, PLA_OOB_CTRL
);
2849 ocp_data
|= NOW_IS_OOB
| DIS_MCU_CLROOB
;
2850 ocp_write_byte(tp
, MCU_TYPE_PLA
, PLA_OOB_CTRL
, ocp_data
);
2852 rxdy_gated_en(tp
, false);
2854 ocp_data
= ocp_read_dword(tp
, MCU_TYPE_PLA
, PLA_RCR
);
2855 ocp_data
|= RCR_APM
| RCR_AM
| RCR_AB
;
2856 ocp_write_dword(tp
, MCU_TYPE_PLA
, PLA_RCR
, ocp_data
);
2859 static void r8153_disable_aldps(struct r8152
*tp
)
2863 data
= ocp_reg_read(tp
, OCP_POWER_CFG
);
2865 ocp_reg_write(tp
, OCP_POWER_CFG
, data
);
2869 static void r8153_enable_aldps(struct r8152
*tp
)
2873 data
= ocp_reg_read(tp
, OCP_POWER_CFG
);
2875 ocp_reg_write(tp
, OCP_POWER_CFG
, data
);
2878 static void rtl8153_disable(struct r8152
*tp
)
2880 r8153_disable_aldps(tp
);
2882 r8153_enable_aldps(tp
);
2883 usb_enable_lpm(tp
->udev
);
2886 static int rtl8152_set_speed(struct r8152
*tp
, u8 autoneg
, u16 speed
, u8 duplex
)
2888 u16 bmcr
, anar
, gbcr
;
2891 cancel_delayed_work_sync(&tp
->schedule
);
2892 anar
= r8152_mdio_read(tp
, MII_ADVERTISE
);
2893 anar
&= ~(ADVERTISE_10HALF
| ADVERTISE_10FULL
|
2894 ADVERTISE_100HALF
| ADVERTISE_100FULL
);
2895 if (tp
->mii
.supports_gmii
) {
2896 gbcr
= r8152_mdio_read(tp
, MII_CTRL1000
);
2897 gbcr
&= ~(ADVERTISE_1000FULL
| ADVERTISE_1000HALF
);
2902 if (autoneg
== AUTONEG_DISABLE
) {
2903 if (speed
== SPEED_10
) {
2905 anar
|= ADVERTISE_10HALF
| ADVERTISE_10FULL
;
2906 } else if (speed
== SPEED_100
) {
2907 bmcr
= BMCR_SPEED100
;
2908 anar
|= ADVERTISE_100HALF
| ADVERTISE_100FULL
;
2909 } else if (speed
== SPEED_1000
&& tp
->mii
.supports_gmii
) {
2910 bmcr
= BMCR_SPEED1000
;
2911 gbcr
|= ADVERTISE_1000FULL
| ADVERTISE_1000HALF
;
2917 if (duplex
== DUPLEX_FULL
)
2918 bmcr
|= BMCR_FULLDPLX
;
2920 if (speed
== SPEED_10
) {
2921 if (duplex
== DUPLEX_FULL
)
2922 anar
|= ADVERTISE_10HALF
| ADVERTISE_10FULL
;
2924 anar
|= ADVERTISE_10HALF
;
2925 } else if (speed
== SPEED_100
) {
2926 if (duplex
== DUPLEX_FULL
) {
2927 anar
|= ADVERTISE_10HALF
| ADVERTISE_10FULL
;
2928 anar
|= ADVERTISE_100HALF
| ADVERTISE_100FULL
;
2930 anar
|= ADVERTISE_10HALF
;
2931 anar
|= ADVERTISE_100HALF
;
2933 } else if (speed
== SPEED_1000
&& tp
->mii
.supports_gmii
) {
2934 if (duplex
== DUPLEX_FULL
) {
2935 anar
|= ADVERTISE_10HALF
| ADVERTISE_10FULL
;
2936 anar
|= ADVERTISE_100HALF
| ADVERTISE_100FULL
;
2937 gbcr
|= ADVERTISE_1000FULL
| ADVERTISE_1000HALF
;
2939 anar
|= ADVERTISE_10HALF
;
2940 anar
|= ADVERTISE_100HALF
;
2941 gbcr
|= ADVERTISE_1000HALF
;
2948 bmcr
= BMCR_ANENABLE
| BMCR_ANRESTART
;
2951 if (test_bit(PHY_RESET
, &tp
->flags
))
2954 if (tp
->mii
.supports_gmii
)
2955 r8152_mdio_write(tp
, MII_CTRL1000
, gbcr
);
2957 r8152_mdio_write(tp
, MII_ADVERTISE
, anar
);
2958 r8152_mdio_write(tp
, MII_BMCR
, bmcr
);
2960 if (test_bit(PHY_RESET
, &tp
->flags
)) {
2963 clear_bit(PHY_RESET
, &tp
->flags
);
2964 for (i
= 0; i
< 50; i
++) {
2966 if ((r8152_mdio_read(tp
, MII_BMCR
) & BMCR_RESET
) == 0)
2976 static void rtl8152_up(struct r8152
*tp
)
2978 if (test_bit(RTL8152_UNPLUG
, &tp
->flags
))
2981 r8152b_disable_aldps(tp
);
2982 r8152b_exit_oob(tp
);
2983 r8152b_enable_aldps(tp
);
2986 static void rtl8152_down(struct r8152
*tp
)
2988 if (test_bit(RTL8152_UNPLUG
, &tp
->flags
)) {
2989 rtl_drop_queued_tx(tp
);
2993 r8152_power_cut_en(tp
, false);
2994 r8152b_disable_aldps(tp
);
2995 r8152b_enter_oob(tp
);
2996 r8152b_enable_aldps(tp
);
2999 static void rtl8153_up(struct r8152
*tp
)
3001 if (test_bit(RTL8152_UNPLUG
, &tp
->flags
))
3004 r8153_u1u2en(tp
, false);
3005 r8153_disable_aldps(tp
);
3006 r8153_first_init(tp
);
3007 r8153_enable_aldps(tp
);
3008 r8153_u2p3en(tp
, true);
3009 r8153_u1u2en(tp
, true);
3010 usb_enable_lpm(tp
->udev
);
3013 static void rtl8153_down(struct r8152
*tp
)
3015 if (test_bit(RTL8152_UNPLUG
, &tp
->flags
)) {
3016 rtl_drop_queued_tx(tp
);
3020 r8153_u1u2en(tp
, false);
3021 r8153_u2p3en(tp
, false);
3022 r8153_power_cut_en(tp
, false);
3023 r8153_disable_aldps(tp
);
3024 r8153_enter_oob(tp
);
3025 r8153_enable_aldps(tp
);
3028 static bool rtl8152_in_nway(struct r8152
*tp
)
3032 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_OCP_GPHY_BASE
, 0x2000);
3033 tp
->ocp_base
= 0x2000;
3034 ocp_write_byte(tp
, MCU_TYPE_PLA
, 0xb014, 0x4c); /* phy state */
3035 nway_state
= ocp_read_word(tp
, MCU_TYPE_PLA
, 0xb01a);
3037 /* bit 15: TXDIS_STATE, bit 14: ABD_STATE */
3038 if (nway_state
& 0xc000)
3044 static bool rtl8153_in_nway(struct r8152
*tp
)
3046 u16 phy_state
= ocp_reg_read(tp
, OCP_PHY_STATE
) & 0xff;
3048 if (phy_state
== TXDIS_STATE
|| phy_state
== ABD_STATE
)
3054 static void set_carrier(struct r8152
*tp
)
3056 struct net_device
*netdev
= tp
->netdev
;
3059 clear_bit(RTL8152_LINK_CHG
, &tp
->flags
);
3060 speed
= rtl8152_get_speed(tp
);
3062 if (speed
& LINK_STATUS
) {
3063 if (!netif_carrier_ok(netdev
)) {
3064 tp
->rtl_ops
.enable(tp
);
3065 set_bit(RTL8152_SET_RX_MODE
, &tp
->flags
);
3066 napi_disable(&tp
->napi
);
3067 netif_carrier_on(netdev
);
3069 napi_enable(&tp
->napi
);
3072 if (netif_carrier_ok(netdev
)) {
3073 netif_carrier_off(netdev
);
3074 napi_disable(&tp
->napi
);
3075 tp
->rtl_ops
.disable(tp
);
3076 napi_enable(&tp
->napi
);
3081 static void rtl_work_func_t(struct work_struct
*work
)
3083 struct r8152
*tp
= container_of(work
, struct r8152
, schedule
.work
);
3085 /* If the device is unplugged or !netif_running(), the workqueue
3086 * doesn't need to wake the device, and could return directly.
3088 if (test_bit(RTL8152_UNPLUG
, &tp
->flags
) || !netif_running(tp
->netdev
))
3091 if (usb_autopm_get_interface(tp
->intf
) < 0)
3094 if (!test_bit(WORK_ENABLE
, &tp
->flags
))
3097 if (!mutex_trylock(&tp
->control
)) {
3098 schedule_delayed_work(&tp
->schedule
, 0);
3102 if (test_bit(RTL8152_LINK_CHG
, &tp
->flags
))
3105 if (test_bit(RTL8152_SET_RX_MODE
, &tp
->flags
))
3106 _rtl8152_set_rx_mode(tp
->netdev
);
3108 /* don't schedule napi before linking */
3109 if (test_bit(SCHEDULE_NAPI
, &tp
->flags
) &&
3110 netif_carrier_ok(tp
->netdev
)) {
3111 clear_bit(SCHEDULE_NAPI
, &tp
->flags
);
3112 napi_schedule(&tp
->napi
);
3115 if (test_bit(PHY_RESET
, &tp
->flags
))
3118 mutex_unlock(&tp
->control
);
3121 usb_autopm_put_interface(tp
->intf
);
3124 static int rtl8152_open(struct net_device
*netdev
)
3126 struct r8152
*tp
= netdev_priv(netdev
);
3129 res
= alloc_all_mem(tp
);
3133 netif_carrier_off(netdev
);
3135 res
= usb_autopm_get_interface(tp
->intf
);
3141 mutex_lock(&tp
->control
);
3145 rtl8152_set_speed(tp
, AUTONEG_ENABLE
,
3146 tp
->mii
.supports_gmii
? SPEED_1000
: SPEED_100
,
3148 netif_carrier_off(netdev
);
3149 netif_start_queue(netdev
);
3150 set_bit(WORK_ENABLE
, &tp
->flags
);
3152 res
= usb_submit_urb(tp
->intr_urb
, GFP_KERNEL
);
3155 netif_device_detach(tp
->netdev
);
3156 netif_warn(tp
, ifup
, netdev
, "intr_urb submit failed: %d\n",
3160 napi_enable(&tp
->napi
);
3163 mutex_unlock(&tp
->control
);
3165 usb_autopm_put_interface(tp
->intf
);
3171 static int rtl8152_close(struct net_device
*netdev
)
3173 struct r8152
*tp
= netdev_priv(netdev
);
3176 napi_disable(&tp
->napi
);
3177 clear_bit(WORK_ENABLE
, &tp
->flags
);
3178 usb_kill_urb(tp
->intr_urb
);
3179 cancel_delayed_work_sync(&tp
->schedule
);
3180 netif_stop_queue(netdev
);
3182 res
= usb_autopm_get_interface(tp
->intf
);
3183 if (res
< 0 || test_bit(RTL8152_UNPLUG
, &tp
->flags
)) {
3184 rtl_drop_queued_tx(tp
);
3187 mutex_lock(&tp
->control
);
3189 tp
->rtl_ops
.down(tp
);
3191 mutex_unlock(&tp
->control
);
3193 usb_autopm_put_interface(tp
->intf
);
3201 static inline void r8152_mmd_indirect(struct r8152
*tp
, u16 dev
, u16 reg
)
3203 ocp_reg_write(tp
, OCP_EEE_AR
, FUN_ADDR
| dev
);
3204 ocp_reg_write(tp
, OCP_EEE_DATA
, reg
);
3205 ocp_reg_write(tp
, OCP_EEE_AR
, FUN_DATA
| dev
);
3208 static u16
r8152_mmd_read(struct r8152
*tp
, u16 dev
, u16 reg
)
3212 r8152_mmd_indirect(tp
, dev
, reg
);
3213 data
= ocp_reg_read(tp
, OCP_EEE_DATA
);
3214 ocp_reg_write(tp
, OCP_EEE_AR
, 0x0000);
3219 static void r8152_mmd_write(struct r8152
*tp
, u16 dev
, u16 reg
, u16 data
)
3221 r8152_mmd_indirect(tp
, dev
, reg
);
3222 ocp_reg_write(tp
, OCP_EEE_DATA
, data
);
3223 ocp_reg_write(tp
, OCP_EEE_AR
, 0x0000);
3226 static void r8152_eee_en(struct r8152
*tp
, bool enable
)
3228 u16 config1
, config2
, config3
;
3231 ocp_data
= ocp_read_word(tp
, MCU_TYPE_PLA
, PLA_EEE_CR
);
3232 config1
= ocp_reg_read(tp
, OCP_EEE_CONFIG1
) & ~sd_rise_time_mask
;
3233 config2
= ocp_reg_read(tp
, OCP_EEE_CONFIG2
);
3234 config3
= ocp_reg_read(tp
, OCP_EEE_CONFIG3
) & ~fast_snr_mask
;
3237 ocp_data
|= EEE_RX_EN
| EEE_TX_EN
;
3238 config1
|= EEE_10_CAP
| EEE_NWAY_EN
| TX_QUIET_EN
| RX_QUIET_EN
;
3239 config1
|= sd_rise_time(1);
3240 config2
|= RG_DACQUIET_EN
| RG_LDVQUIET_EN
;
3241 config3
|= fast_snr(42);
3243 ocp_data
&= ~(EEE_RX_EN
| EEE_TX_EN
);
3244 config1
&= ~(EEE_10_CAP
| EEE_NWAY_EN
| TX_QUIET_EN
|
3246 config1
|= sd_rise_time(7);
3247 config2
&= ~(RG_DACQUIET_EN
| RG_LDVQUIET_EN
);
3248 config3
|= fast_snr(511);
3251 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_EEE_CR
, ocp_data
);
3252 ocp_reg_write(tp
, OCP_EEE_CONFIG1
, config1
);
3253 ocp_reg_write(tp
, OCP_EEE_CONFIG2
, config2
);
3254 ocp_reg_write(tp
, OCP_EEE_CONFIG3
, config3
);
3257 static void r8152b_enable_eee(struct r8152
*tp
)
3259 r8152_eee_en(tp
, true);
3260 r8152_mmd_write(tp
, MDIO_MMD_AN
, MDIO_AN_EEE_ADV
, MDIO_EEE_100TX
);
3263 static void r8153_eee_en(struct r8152
*tp
, bool enable
)
3268 ocp_data
= ocp_read_word(tp
, MCU_TYPE_PLA
, PLA_EEE_CR
);
3269 config
= ocp_reg_read(tp
, OCP_EEE_CFG
);
3272 ocp_data
|= EEE_RX_EN
| EEE_TX_EN
;
3275 ocp_data
&= ~(EEE_RX_EN
| EEE_TX_EN
);
3276 config
&= ~EEE10_EN
;
3279 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_EEE_CR
, ocp_data
);
3280 ocp_reg_write(tp
, OCP_EEE_CFG
, config
);
3283 static void r8153_enable_eee(struct r8152
*tp
)
3285 r8153_eee_en(tp
, true);
3286 ocp_reg_write(tp
, OCP_EEE_ADV
, MDIO_EEE_1000T
| MDIO_EEE_100TX
);
3289 static void r8152b_enable_fc(struct r8152
*tp
)
3293 anar
= r8152_mdio_read(tp
, MII_ADVERTISE
);
3294 anar
|= ADVERTISE_PAUSE_CAP
| ADVERTISE_PAUSE_ASYM
;
3295 r8152_mdio_write(tp
, MII_ADVERTISE
, anar
);
3298 static void rtl_tally_reset(struct r8152
*tp
)
3302 ocp_data
= ocp_read_word(tp
, MCU_TYPE_PLA
, PLA_RSTTALLY
);
3303 ocp_data
|= TALLY_RESET
;
3304 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_RSTTALLY
, ocp_data
);
3307 static void r8152b_init(struct r8152
*tp
)
3311 if (test_bit(RTL8152_UNPLUG
, &tp
->flags
))
3314 r8152b_disable_aldps(tp
);
3316 if (tp
->version
== RTL_VER_01
) {
3317 ocp_data
= ocp_read_word(tp
, MCU_TYPE_PLA
, PLA_LED_FEATURE
);
3318 ocp_data
&= ~LED_MODE_MASK
;
3319 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_LED_FEATURE
, ocp_data
);
3322 r8152_power_cut_en(tp
, false);
3324 ocp_data
= ocp_read_word(tp
, MCU_TYPE_PLA
, PLA_PHY_PWR
);
3325 ocp_data
|= TX_10M_IDLE_EN
| PFM_PWM_SWITCH
;
3326 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_PHY_PWR
, ocp_data
);
3327 ocp_data
= ocp_read_dword(tp
, MCU_TYPE_PLA
, PLA_MAC_PWR_CTRL
);
3328 ocp_data
&= ~MCU_CLK_RATIO_MASK
;
3329 ocp_data
|= MCU_CLK_RATIO
| D3_CLK_GATED_EN
;
3330 ocp_write_dword(tp
, MCU_TYPE_PLA
, PLA_MAC_PWR_CTRL
, ocp_data
);
3331 ocp_data
= GPHY_STS_MSK
| SPEED_DOWN_MSK
|
3332 SPDWN_RXDV_MSK
| SPDWN_LINKCHG_MSK
;
3333 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_GPHY_INTR_IMR
, ocp_data
);
3335 r8152b_enable_eee(tp
);
3336 r8152b_enable_aldps(tp
);
3337 r8152b_enable_fc(tp
);
3338 rtl_tally_reset(tp
);
3340 /* enable rx aggregation */
3341 ocp_data
= ocp_read_word(tp
, MCU_TYPE_USB
, USB_USB_CTRL
);
3342 ocp_data
&= ~(RX_AGG_DISABLE
| RX_ZERO_EN
);
3343 ocp_write_word(tp
, MCU_TYPE_USB
, USB_USB_CTRL
, ocp_data
);
3346 static void r8153_init(struct r8152
*tp
)
3351 if (test_bit(RTL8152_UNPLUG
, &tp
->flags
))
3354 r8153_disable_aldps(tp
);
3355 r8153_u1u2en(tp
, false);
3357 for (i
= 0; i
< 500; i
++) {
3358 if (ocp_read_word(tp
, MCU_TYPE_PLA
, PLA_BOOT_CTRL
) &
3364 for (i
= 0; i
< 500; i
++) {
3365 ocp_data
= ocp_reg_read(tp
, OCP_PHY_STATUS
) & PHY_STAT_MASK
;
3366 if (ocp_data
== PHY_STAT_LAN_ON
|| ocp_data
== PHY_STAT_PWRDN
)
3371 usb_disable_lpm(tp
->udev
);
3372 r8153_u2p3en(tp
, false);
3374 if (tp
->version
== RTL_VER_04
) {
3375 ocp_data
= ocp_read_word(tp
, MCU_TYPE_USB
, USB_SSPHYLINK2
);
3376 ocp_data
&= ~pwd_dn_scale_mask
;
3377 ocp_data
|= pwd_dn_scale(96);
3378 ocp_write_word(tp
, MCU_TYPE_USB
, USB_SSPHYLINK2
, ocp_data
);
3380 ocp_data
= ocp_read_byte(tp
, MCU_TYPE_USB
, USB_USB2PHY
);
3381 ocp_data
|= USB2PHY_L1
| USB2PHY_SUSPEND
;
3382 ocp_write_byte(tp
, MCU_TYPE_USB
, USB_USB2PHY
, ocp_data
);
3383 } else if (tp
->version
== RTL_VER_05
) {
3384 ocp_data
= ocp_read_byte(tp
, MCU_TYPE_PLA
, PLA_DMY_REG0
);
3385 ocp_data
&= ~ECM_ALDPS
;
3386 ocp_write_byte(tp
, MCU_TYPE_PLA
, PLA_DMY_REG0
, ocp_data
);
3388 ocp_data
= ocp_read_byte(tp
, MCU_TYPE_USB
, USB_CSR_DUMMY1
);
3389 if (ocp_read_word(tp
, MCU_TYPE_USB
, USB_BURST_SIZE
) == 0)
3390 ocp_data
&= ~DYNAMIC_BURST
;
3392 ocp_data
|= DYNAMIC_BURST
;
3393 ocp_write_byte(tp
, MCU_TYPE_USB
, USB_CSR_DUMMY1
, ocp_data
);
3394 } else if (tp
->version
== RTL_VER_06
) {
3395 ocp_data
= ocp_read_byte(tp
, MCU_TYPE_USB
, USB_CSR_DUMMY1
);
3396 if (ocp_read_word(tp
, MCU_TYPE_USB
, USB_BURST_SIZE
) == 0)
3397 ocp_data
&= ~DYNAMIC_BURST
;
3399 ocp_data
|= DYNAMIC_BURST
;
3400 ocp_write_byte(tp
, MCU_TYPE_USB
, USB_CSR_DUMMY1
, ocp_data
);
3403 ocp_data
= ocp_read_byte(tp
, MCU_TYPE_USB
, USB_CSR_DUMMY2
);
3404 ocp_data
|= EP4_FULL_FC
;
3405 ocp_write_byte(tp
, MCU_TYPE_USB
, USB_CSR_DUMMY2
, ocp_data
);
3407 ocp_data
= ocp_read_word(tp
, MCU_TYPE_USB
, USB_WDT11_CTRL
);
3408 ocp_data
&= ~TIMER11_EN
;
3409 ocp_write_word(tp
, MCU_TYPE_USB
, USB_WDT11_CTRL
, ocp_data
);
3411 ocp_data
= ocp_read_word(tp
, MCU_TYPE_PLA
, PLA_LED_FEATURE
);
3412 ocp_data
&= ~LED_MODE_MASK
;
3413 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_LED_FEATURE
, ocp_data
);
3415 ocp_data
= FIFO_EMPTY_1FB
| ROK_EXIT_LPM
;
3416 if (tp
->version
== RTL_VER_04
&& tp
->udev
->speed
!= USB_SPEED_SUPER
)
3417 ocp_data
|= LPM_TIMER_500MS
;
3419 ocp_data
|= LPM_TIMER_500US
;
3420 ocp_write_byte(tp
, MCU_TYPE_USB
, USB_LPM_CTRL
, ocp_data
);
3422 ocp_data
= ocp_read_word(tp
, MCU_TYPE_USB
, USB_AFE_CTRL2
);
3423 ocp_data
&= ~SEN_VAL_MASK
;
3424 ocp_data
|= SEN_VAL_NORMAL
| SEL_RXIDLE
;
3425 ocp_write_word(tp
, MCU_TYPE_USB
, USB_AFE_CTRL2
, ocp_data
);
3427 ocp_write_word(tp
, MCU_TYPE_USB
, USB_CONNECT_TIMER
, 0x0001);
3429 r8153_power_cut_en(tp
, false);
3430 r8153_u1u2en(tp
, true);
3432 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_MAC_PWR_CTRL
, ALDPS_SPDWN_RATIO
);
3433 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_MAC_PWR_CTRL2
, EEE_SPDWN_RATIO
);
3434 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_MAC_PWR_CTRL3
,
3435 PKT_AVAIL_SPDWN_EN
| SUSPEND_SPDWN_EN
|
3436 U1U2_SPDWN_EN
| L1_SPDWN_EN
);
3437 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_MAC_PWR_CTRL4
,
3438 PWRSAVE_SPDWN_EN
| RXDV_SPDWN_EN
| TX10MIDLE_EN
|
3439 TP100_SPDWN_EN
| TP500_SPDWN_EN
| TP1000_SPDWN_EN
|
3442 r8153_enable_eee(tp
);
3443 r8153_enable_aldps(tp
);
3444 r8152b_enable_fc(tp
);
3445 rtl_tally_reset(tp
);
3446 r8153_u2p3en(tp
, true);
3449 static int rtl8152_pre_reset(struct usb_interface
*intf
)
3451 struct r8152
*tp
= usb_get_intfdata(intf
);
3452 struct net_device
*netdev
;
3457 netdev
= tp
->netdev
;
3458 if (!netif_running(netdev
))
3461 napi_disable(&tp
->napi
);
3462 clear_bit(WORK_ENABLE
, &tp
->flags
);
3463 usb_kill_urb(tp
->intr_urb
);
3464 cancel_delayed_work_sync(&tp
->schedule
);
3465 if (netif_carrier_ok(netdev
)) {
3466 netif_stop_queue(netdev
);
3467 mutex_lock(&tp
->control
);
3468 tp
->rtl_ops
.disable(tp
);
3469 mutex_unlock(&tp
->control
);
3475 static int rtl8152_post_reset(struct usb_interface
*intf
)
3477 struct r8152
*tp
= usb_get_intfdata(intf
);
3478 struct net_device
*netdev
;
3483 netdev
= tp
->netdev
;
3484 if (!netif_running(netdev
))
3487 set_bit(WORK_ENABLE
, &tp
->flags
);
3488 if (netif_carrier_ok(netdev
)) {
3489 mutex_lock(&tp
->control
);
3490 tp
->rtl_ops
.enable(tp
);
3491 rtl8152_set_rx_mode(netdev
);
3492 mutex_unlock(&tp
->control
);
3493 netif_wake_queue(netdev
);
3496 napi_enable(&tp
->napi
);
3501 static bool delay_autosuspend(struct r8152
*tp
)
3503 bool sw_linking
= !!netif_carrier_ok(tp
->netdev
);
3504 bool hw_linking
= !!(rtl8152_get_speed(tp
) & LINK_STATUS
);
3506 /* This means a linking change occurs and the driver doesn't detect it,
3507 * yet. If the driver has disabled tx/rx and hw is linking on, the
3508 * device wouldn't wake up by receiving any packet.
3510 if (work_busy(&tp
->schedule
.work
) || sw_linking
!= hw_linking
)
3513 /* If the linking down is occurred by nway, the device may miss the
3514 * linking change event. And it wouldn't wake when linking on.
3516 if (!sw_linking
&& tp
->rtl_ops
.in_nway(tp
))
3518 else if (!skb_queue_empty(&tp
->tx_queue
))
3524 static int rtl8152_rumtime_suspend(struct r8152
*tp
)
3526 struct net_device
*netdev
= tp
->netdev
;
3529 if (netif_running(netdev
) && test_bit(WORK_ENABLE
, &tp
->flags
)) {
3532 if (delay_autosuspend(tp
)) {
3537 if (netif_carrier_ok(netdev
)) {
3540 rcr
= ocp_read_dword(tp
, MCU_TYPE_PLA
, PLA_RCR
);
3541 ocp_data
= rcr
& ~RCR_ACPT_ALL
;
3542 ocp_write_dword(tp
, MCU_TYPE_PLA
, PLA_RCR
, ocp_data
);
3543 rxdy_gated_en(tp
, true);
3544 ocp_data
= ocp_read_byte(tp
, MCU_TYPE_PLA
,
3546 if (!(ocp_data
& RXFIFO_EMPTY
)) {
3547 rxdy_gated_en(tp
, false);
3548 ocp_write_dword(tp
, MCU_TYPE_PLA
, PLA_RCR
, rcr
);
3554 clear_bit(WORK_ENABLE
, &tp
->flags
);
3555 usb_kill_urb(tp
->intr_urb
);
3557 rtl_runtime_suspend_enable(tp
, true);
3559 if (netif_carrier_ok(netdev
)) {
3560 napi_disable(&tp
->napi
);
3562 rxdy_gated_en(tp
, false);
3563 ocp_write_dword(tp
, MCU_TYPE_PLA
, PLA_RCR
, rcr
);
3564 napi_enable(&tp
->napi
);
3568 set_bit(SELECTIVE_SUSPEND
, &tp
->flags
);
3574 static int rtl8152_system_suspend(struct r8152
*tp
)
3576 struct net_device
*netdev
= tp
->netdev
;
3579 netif_device_detach(netdev
);
3581 if (netif_running(netdev
) && test_bit(WORK_ENABLE
, &tp
->flags
)) {
3582 clear_bit(WORK_ENABLE
, &tp
->flags
);
3583 usb_kill_urb(tp
->intr_urb
);
3584 napi_disable(&tp
->napi
);
3585 cancel_delayed_work_sync(&tp
->schedule
);
3586 tp
->rtl_ops
.down(tp
);
3587 napi_enable(&tp
->napi
);
3593 static int rtl8152_suspend(struct usb_interface
*intf
, pm_message_t message
)
3595 struct r8152
*tp
= usb_get_intfdata(intf
);
3598 mutex_lock(&tp
->control
);
3600 if (PMSG_IS_AUTO(message
))
3601 ret
= rtl8152_rumtime_suspend(tp
);
3603 ret
= rtl8152_system_suspend(tp
);
3605 mutex_unlock(&tp
->control
);
3610 static int rtl8152_resume(struct usb_interface
*intf
)
3612 struct r8152
*tp
= usb_get_intfdata(intf
);
3614 mutex_lock(&tp
->control
);
3616 if (!test_bit(SELECTIVE_SUSPEND
, &tp
->flags
)) {
3617 tp
->rtl_ops
.init(tp
);
3618 netif_device_attach(tp
->netdev
);
3621 if (netif_running(tp
->netdev
) && tp
->netdev
->flags
& IFF_UP
) {
3622 if (test_bit(SELECTIVE_SUSPEND
, &tp
->flags
)) {
3623 rtl_runtime_suspend_enable(tp
, false);
3624 clear_bit(SELECTIVE_SUSPEND
, &tp
->flags
);
3625 napi_disable(&tp
->napi
);
3626 set_bit(WORK_ENABLE
, &tp
->flags
);
3627 if (netif_carrier_ok(tp
->netdev
))
3629 napi_enable(&tp
->napi
);
3632 rtl8152_set_speed(tp
, AUTONEG_ENABLE
,
3633 tp
->mii
.supports_gmii
?
3634 SPEED_1000
: SPEED_100
,
3636 netif_carrier_off(tp
->netdev
);
3637 set_bit(WORK_ENABLE
, &tp
->flags
);
3639 usb_submit_urb(tp
->intr_urb
, GFP_KERNEL
);
3640 } else if (test_bit(SELECTIVE_SUSPEND
, &tp
->flags
)) {
3641 if (tp
->netdev
->flags
& IFF_UP
)
3642 rtl_runtime_suspend_enable(tp
, false);
3643 clear_bit(SELECTIVE_SUSPEND
, &tp
->flags
);
3646 mutex_unlock(&tp
->control
);
3651 static int rtl8152_reset_resume(struct usb_interface
*intf
)
3653 struct r8152
*tp
= usb_get_intfdata(intf
);
3655 clear_bit(SELECTIVE_SUSPEND
, &tp
->flags
);
3656 return rtl8152_resume(intf
);
3659 static void rtl8152_get_wol(struct net_device
*dev
, struct ethtool_wolinfo
*wol
)
3661 struct r8152
*tp
= netdev_priv(dev
);
3663 if (usb_autopm_get_interface(tp
->intf
) < 0)
3666 if (!rtl_can_wakeup(tp
)) {
3670 mutex_lock(&tp
->control
);
3671 wol
->supported
= WAKE_ANY
;
3672 wol
->wolopts
= __rtl_get_wol(tp
);
3673 mutex_unlock(&tp
->control
);
3676 usb_autopm_put_interface(tp
->intf
);
3679 static int rtl8152_set_wol(struct net_device
*dev
, struct ethtool_wolinfo
*wol
)
3681 struct r8152
*tp
= netdev_priv(dev
);
3684 if (!rtl_can_wakeup(tp
))
3687 ret
= usb_autopm_get_interface(tp
->intf
);
3691 mutex_lock(&tp
->control
);
3693 __rtl_set_wol(tp
, wol
->wolopts
);
3694 tp
->saved_wolopts
= wol
->wolopts
& WAKE_ANY
;
3696 mutex_unlock(&tp
->control
);
3698 usb_autopm_put_interface(tp
->intf
);
3704 static u32
rtl8152_get_msglevel(struct net_device
*dev
)
3706 struct r8152
*tp
= netdev_priv(dev
);
3708 return tp
->msg_enable
;
3711 static void rtl8152_set_msglevel(struct net_device
*dev
, u32 value
)
3713 struct r8152
*tp
= netdev_priv(dev
);
3715 tp
->msg_enable
= value
;
3718 static void rtl8152_get_drvinfo(struct net_device
*netdev
,
3719 struct ethtool_drvinfo
*info
)
3721 struct r8152
*tp
= netdev_priv(netdev
);
3723 strlcpy(info
->driver
, MODULENAME
, sizeof(info
->driver
));
3724 strlcpy(info
->version
, DRIVER_VERSION
, sizeof(info
->version
));
3725 usb_make_path(tp
->udev
, info
->bus_info
, sizeof(info
->bus_info
));
3729 int rtl8152_get_settings(struct net_device
*netdev
, struct ethtool_cmd
*cmd
)
3731 struct r8152
*tp
= netdev_priv(netdev
);
3734 if (!tp
->mii
.mdio_read
)
3737 ret
= usb_autopm_get_interface(tp
->intf
);
3741 mutex_lock(&tp
->control
);
3743 ret
= mii_ethtool_gset(&tp
->mii
, cmd
);
3745 mutex_unlock(&tp
->control
);
3747 usb_autopm_put_interface(tp
->intf
);
3753 static int rtl8152_set_settings(struct net_device
*dev
, struct ethtool_cmd
*cmd
)
3755 struct r8152
*tp
= netdev_priv(dev
);
3758 ret
= usb_autopm_get_interface(tp
->intf
);
3762 mutex_lock(&tp
->control
);
3764 ret
= rtl8152_set_speed(tp
, cmd
->autoneg
, cmd
->speed
, cmd
->duplex
);
3766 mutex_unlock(&tp
->control
);
3768 usb_autopm_put_interface(tp
->intf
);
3774 static const char rtl8152_gstrings
[][ETH_GSTRING_LEN
] = {
3781 "tx_single_collisions",
3782 "tx_multi_collisions",
3790 static int rtl8152_get_sset_count(struct net_device
*dev
, int sset
)
3794 return ARRAY_SIZE(rtl8152_gstrings
);
3800 static void rtl8152_get_ethtool_stats(struct net_device
*dev
,
3801 struct ethtool_stats
*stats
, u64
*data
)
3803 struct r8152
*tp
= netdev_priv(dev
);
3804 struct tally_counter tally
;
3806 if (usb_autopm_get_interface(tp
->intf
) < 0)
3809 generic_ocp_read(tp
, PLA_TALLYCNT
, sizeof(tally
), &tally
, MCU_TYPE_PLA
);
3811 usb_autopm_put_interface(tp
->intf
);
3813 data
[0] = le64_to_cpu(tally
.tx_packets
);
3814 data
[1] = le64_to_cpu(tally
.rx_packets
);
3815 data
[2] = le64_to_cpu(tally
.tx_errors
);
3816 data
[3] = le32_to_cpu(tally
.rx_errors
);
3817 data
[4] = le16_to_cpu(tally
.rx_missed
);
3818 data
[5] = le16_to_cpu(tally
.align_errors
);
3819 data
[6] = le32_to_cpu(tally
.tx_one_collision
);
3820 data
[7] = le32_to_cpu(tally
.tx_multi_collision
);
3821 data
[8] = le64_to_cpu(tally
.rx_unicast
);
3822 data
[9] = le64_to_cpu(tally
.rx_broadcast
);
3823 data
[10] = le32_to_cpu(tally
.rx_multicast
);
3824 data
[11] = le16_to_cpu(tally
.tx_aborted
);
3825 data
[12] = le16_to_cpu(tally
.tx_underrun
);
3828 static void rtl8152_get_strings(struct net_device
*dev
, u32 stringset
, u8
*data
)
3830 switch (stringset
) {
3832 memcpy(data
, *rtl8152_gstrings
, sizeof(rtl8152_gstrings
));
3837 static int r8152_get_eee(struct r8152
*tp
, struct ethtool_eee
*eee
)
3839 u32 ocp_data
, lp
, adv
, supported
= 0;
3842 val
= r8152_mmd_read(tp
, MDIO_MMD_PCS
, MDIO_PCS_EEE_ABLE
);
3843 supported
= mmd_eee_cap_to_ethtool_sup_t(val
);
3845 val
= r8152_mmd_read(tp
, MDIO_MMD_AN
, MDIO_AN_EEE_ADV
);
3846 adv
= mmd_eee_adv_to_ethtool_adv_t(val
);
3848 val
= r8152_mmd_read(tp
, MDIO_MMD_AN
, MDIO_AN_EEE_LPABLE
);
3849 lp
= mmd_eee_adv_to_ethtool_adv_t(val
);
3851 ocp_data
= ocp_read_word(tp
, MCU_TYPE_PLA
, PLA_EEE_CR
);
3852 ocp_data
&= EEE_RX_EN
| EEE_TX_EN
;
3854 eee
->eee_enabled
= !!ocp_data
;
3855 eee
->eee_active
= !!(supported
& adv
& lp
);
3856 eee
->supported
= supported
;
3857 eee
->advertised
= adv
;
3858 eee
->lp_advertised
= lp
;
3863 static int r8152_set_eee(struct r8152
*tp
, struct ethtool_eee
*eee
)
3865 u16 val
= ethtool_adv_to_mmd_eee_adv_t(eee
->advertised
);
3867 r8152_eee_en(tp
, eee
->eee_enabled
);
3869 if (!eee
->eee_enabled
)
3872 r8152_mmd_write(tp
, MDIO_MMD_AN
, MDIO_AN_EEE_ADV
, val
);
3877 static int r8153_get_eee(struct r8152
*tp
, struct ethtool_eee
*eee
)
3879 u32 ocp_data
, lp
, adv
, supported
= 0;
3882 val
= ocp_reg_read(tp
, OCP_EEE_ABLE
);
3883 supported
= mmd_eee_cap_to_ethtool_sup_t(val
);
3885 val
= ocp_reg_read(tp
, OCP_EEE_ADV
);
3886 adv
= mmd_eee_adv_to_ethtool_adv_t(val
);
3888 val
= ocp_reg_read(tp
, OCP_EEE_LPABLE
);
3889 lp
= mmd_eee_adv_to_ethtool_adv_t(val
);
3891 ocp_data
= ocp_read_word(tp
, MCU_TYPE_PLA
, PLA_EEE_CR
);
3892 ocp_data
&= EEE_RX_EN
| EEE_TX_EN
;
3894 eee
->eee_enabled
= !!ocp_data
;
3895 eee
->eee_active
= !!(supported
& adv
& lp
);
3896 eee
->supported
= supported
;
3897 eee
->advertised
= adv
;
3898 eee
->lp_advertised
= lp
;
3903 static int r8153_set_eee(struct r8152
*tp
, struct ethtool_eee
*eee
)
3905 u16 val
= ethtool_adv_to_mmd_eee_adv_t(eee
->advertised
);
3907 r8153_eee_en(tp
, eee
->eee_enabled
);
3909 if (!eee
->eee_enabled
)
3912 ocp_reg_write(tp
, OCP_EEE_ADV
, val
);
3918 rtl_ethtool_get_eee(struct net_device
*net
, struct ethtool_eee
*edata
)
3920 struct r8152
*tp
= netdev_priv(net
);
3923 ret
= usb_autopm_get_interface(tp
->intf
);
3927 mutex_lock(&tp
->control
);
3929 ret
= tp
->rtl_ops
.eee_get(tp
, edata
);
3931 mutex_unlock(&tp
->control
);
3933 usb_autopm_put_interface(tp
->intf
);
3940 rtl_ethtool_set_eee(struct net_device
*net
, struct ethtool_eee
*edata
)
3942 struct r8152
*tp
= netdev_priv(net
);
3945 ret
= usb_autopm_get_interface(tp
->intf
);
3949 mutex_lock(&tp
->control
);
3951 ret
= tp
->rtl_ops
.eee_set(tp
, edata
);
3953 ret
= mii_nway_restart(&tp
->mii
);
3955 mutex_unlock(&tp
->control
);
3957 usb_autopm_put_interface(tp
->intf
);
3963 static int rtl8152_nway_reset(struct net_device
*dev
)
3965 struct r8152
*tp
= netdev_priv(dev
);
3968 ret
= usb_autopm_get_interface(tp
->intf
);
3972 mutex_lock(&tp
->control
);
3974 ret
= mii_nway_restart(&tp
->mii
);
3976 mutex_unlock(&tp
->control
);
3978 usb_autopm_put_interface(tp
->intf
);
3984 static int rtl8152_get_coalesce(struct net_device
*netdev
,
3985 struct ethtool_coalesce
*coalesce
)
3987 struct r8152
*tp
= netdev_priv(netdev
);
3989 switch (tp
->version
) {
3997 coalesce
->rx_coalesce_usecs
= tp
->coalesce
;
4002 static int rtl8152_set_coalesce(struct net_device
*netdev
,
4003 struct ethtool_coalesce
*coalesce
)
4005 struct r8152
*tp
= netdev_priv(netdev
);
4008 switch (tp
->version
) {
4016 if (coalesce
->rx_coalesce_usecs
> COALESCE_SLOW
)
4019 ret
= usb_autopm_get_interface(tp
->intf
);
4023 mutex_lock(&tp
->control
);
4025 if (tp
->coalesce
!= coalesce
->rx_coalesce_usecs
) {
4026 tp
->coalesce
= coalesce
->rx_coalesce_usecs
;
4028 if (netif_running(tp
->netdev
) && netif_carrier_ok(netdev
))
4029 r8153_set_rx_early_timeout(tp
);
4032 mutex_unlock(&tp
->control
);
4034 usb_autopm_put_interface(tp
->intf
);
4039 static struct ethtool_ops ops
= {
4040 .get_drvinfo
= rtl8152_get_drvinfo
,
4041 .get_settings
= rtl8152_get_settings
,
4042 .set_settings
= rtl8152_set_settings
,
4043 .get_link
= ethtool_op_get_link
,
4044 .nway_reset
= rtl8152_nway_reset
,
4045 .get_msglevel
= rtl8152_get_msglevel
,
4046 .set_msglevel
= rtl8152_set_msglevel
,
4047 .get_wol
= rtl8152_get_wol
,
4048 .set_wol
= rtl8152_set_wol
,
4049 .get_strings
= rtl8152_get_strings
,
4050 .get_sset_count
= rtl8152_get_sset_count
,
4051 .get_ethtool_stats
= rtl8152_get_ethtool_stats
,
4052 .get_coalesce
= rtl8152_get_coalesce
,
4053 .set_coalesce
= rtl8152_set_coalesce
,
4054 .get_eee
= rtl_ethtool_get_eee
,
4055 .set_eee
= rtl_ethtool_set_eee
,
4058 static int rtl8152_ioctl(struct net_device
*netdev
, struct ifreq
*rq
, int cmd
)
4060 struct r8152
*tp
= netdev_priv(netdev
);
4061 struct mii_ioctl_data
*data
= if_mii(rq
);
4064 if (test_bit(RTL8152_UNPLUG
, &tp
->flags
))
4067 res
= usb_autopm_get_interface(tp
->intf
);
4073 data
->phy_id
= R8152_PHY_ID
; /* Internal PHY */
4077 mutex_lock(&tp
->control
);
4078 data
->val_out
= r8152_mdio_read(tp
, data
->reg_num
);
4079 mutex_unlock(&tp
->control
);
4083 if (!capable(CAP_NET_ADMIN
)) {
4087 mutex_lock(&tp
->control
);
4088 r8152_mdio_write(tp
, data
->reg_num
, data
->val_in
);
4089 mutex_unlock(&tp
->control
);
4096 usb_autopm_put_interface(tp
->intf
);
4102 static int rtl8152_change_mtu(struct net_device
*dev
, int new_mtu
)
4104 struct r8152
*tp
= netdev_priv(dev
);
4107 switch (tp
->version
) {
4110 return eth_change_mtu(dev
, new_mtu
);
4115 if (new_mtu
< 68 || new_mtu
> RTL8153_MAX_MTU
)
4118 ret
= usb_autopm_get_interface(tp
->intf
);
4122 mutex_lock(&tp
->control
);
4126 if (netif_running(dev
) && netif_carrier_ok(dev
))
4127 r8153_set_rx_early_size(tp
);
4129 mutex_unlock(&tp
->control
);
4131 usb_autopm_put_interface(tp
->intf
);
4136 static const struct net_device_ops rtl8152_netdev_ops
= {
4137 .ndo_open
= rtl8152_open
,
4138 .ndo_stop
= rtl8152_close
,
4139 .ndo_do_ioctl
= rtl8152_ioctl
,
4140 .ndo_start_xmit
= rtl8152_start_xmit
,
4141 .ndo_tx_timeout
= rtl8152_tx_timeout
,
4142 .ndo_set_features
= rtl8152_set_features
,
4143 .ndo_set_rx_mode
= rtl8152_set_rx_mode
,
4144 .ndo_set_mac_address
= rtl8152_set_mac_address
,
4145 .ndo_change_mtu
= rtl8152_change_mtu
,
4146 .ndo_validate_addr
= eth_validate_addr
,
4147 .ndo_features_check
= rtl8152_features_check
,
4150 static void r8152b_get_version(struct r8152
*tp
)
4155 ocp_data
= ocp_read_word(tp
, MCU_TYPE_PLA
, PLA_TCR1
);
4156 version
= (u16
)(ocp_data
& VERSION_MASK
);
4160 tp
->version
= RTL_VER_01
;
4163 tp
->version
= RTL_VER_02
;
4166 tp
->version
= RTL_VER_03
;
4167 tp
->mii
.supports_gmii
= 1;
4170 tp
->version
= RTL_VER_04
;
4171 tp
->mii
.supports_gmii
= 1;
4174 tp
->version
= RTL_VER_05
;
4175 tp
->mii
.supports_gmii
= 1;
4178 tp
->version
= RTL_VER_06
;
4179 tp
->mii
.supports_gmii
= 1;
4182 netif_info(tp
, probe
, tp
->netdev
,
4183 "Unknown version 0x%04x\n", version
);
4188 static void rtl8152_unload(struct r8152
*tp
)
4190 if (test_bit(RTL8152_UNPLUG
, &tp
->flags
))
4193 if (tp
->version
!= RTL_VER_01
)
4194 r8152_power_cut_en(tp
, true);
4197 static void rtl8153_unload(struct r8152
*tp
)
4199 if (test_bit(RTL8152_UNPLUG
, &tp
->flags
))
4202 r8153_power_cut_en(tp
, false);
4205 static int rtl_ops_init(struct r8152
*tp
)
4207 struct rtl_ops
*ops
= &tp
->rtl_ops
;
4210 switch (tp
->version
) {
4213 ops
->init
= r8152b_init
;
4214 ops
->enable
= rtl8152_enable
;
4215 ops
->disable
= rtl8152_disable
;
4216 ops
->up
= rtl8152_up
;
4217 ops
->down
= rtl8152_down
;
4218 ops
->unload
= rtl8152_unload
;
4219 ops
->eee_get
= r8152_get_eee
;
4220 ops
->eee_set
= r8152_set_eee
;
4221 ops
->in_nway
= rtl8152_in_nway
;
4228 ops
->init
= r8153_init
;
4229 ops
->enable
= rtl8153_enable
;
4230 ops
->disable
= rtl8153_disable
;
4231 ops
->up
= rtl8153_up
;
4232 ops
->down
= rtl8153_down
;
4233 ops
->unload
= rtl8153_unload
;
4234 ops
->eee_get
= r8153_get_eee
;
4235 ops
->eee_set
= r8153_set_eee
;
4236 ops
->in_nway
= rtl8153_in_nway
;
4241 netif_err(tp
, probe
, tp
->netdev
, "Unknown Device\n");
4248 static int rtl8152_probe(struct usb_interface
*intf
,
4249 const struct usb_device_id
*id
)
4251 struct usb_device
*udev
= interface_to_usbdev(intf
);
4253 struct net_device
*netdev
;
4256 if (udev
->actconfig
->desc
.bConfigurationValue
!= 1) {
4257 usb_driver_set_configuration(udev
, 1);
4261 usb_reset_device(udev
);
4262 netdev
= alloc_etherdev(sizeof(struct r8152
));
4264 dev_err(&intf
->dev
, "Out of memory\n");
4268 SET_NETDEV_DEV(netdev
, &intf
->dev
);
4269 tp
= netdev_priv(netdev
);
4270 tp
->msg_enable
= 0x7FFF;
4273 tp
->netdev
= netdev
;
4276 r8152b_get_version(tp
);
4277 ret
= rtl_ops_init(tp
);
4281 mutex_init(&tp
->control
);
4282 INIT_DELAYED_WORK(&tp
->schedule
, rtl_work_func_t
);
4284 netdev
->netdev_ops
= &rtl8152_netdev_ops
;
4285 netdev
->watchdog_timeo
= RTL8152_TX_TIMEOUT
;
4287 netdev
->features
|= NETIF_F_RXCSUM
| NETIF_F_IP_CSUM
| NETIF_F_SG
|
4288 NETIF_F_TSO
| NETIF_F_FRAGLIST
| NETIF_F_IPV6_CSUM
|
4289 NETIF_F_TSO6
| NETIF_F_HW_VLAN_CTAG_RX
|
4290 NETIF_F_HW_VLAN_CTAG_TX
;
4291 netdev
->hw_features
= NETIF_F_RXCSUM
| NETIF_F_IP_CSUM
| NETIF_F_SG
|
4292 NETIF_F_TSO
| NETIF_F_FRAGLIST
|
4293 NETIF_F_IPV6_CSUM
| NETIF_F_TSO6
|
4294 NETIF_F_HW_VLAN_CTAG_RX
| NETIF_F_HW_VLAN_CTAG_TX
;
4295 netdev
->vlan_features
= NETIF_F_SG
| NETIF_F_IP_CSUM
| NETIF_F_TSO
|
4296 NETIF_F_HIGHDMA
| NETIF_F_FRAGLIST
|
4297 NETIF_F_IPV6_CSUM
| NETIF_F_TSO6
;
4299 if (tp
->version
== RTL_VER_01
) {
4300 netdev
->features
&= ~NETIF_F_RXCSUM
;
4301 netdev
->hw_features
&= ~NETIF_F_RXCSUM
;
4304 netdev
->ethtool_ops
= &ops
;
4305 netif_set_gso_max_size(netdev
, RTL_LIMITED_TSO_SIZE
);
4307 tp
->mii
.dev
= netdev
;
4308 tp
->mii
.mdio_read
= read_mii_word
;
4309 tp
->mii
.mdio_write
= write_mii_word
;
4310 tp
->mii
.phy_id_mask
= 0x3f;
4311 tp
->mii
.reg_num_mask
= 0x1f;
4312 tp
->mii
.phy_id
= R8152_PHY_ID
;
4314 switch (udev
->speed
) {
4315 case USB_SPEED_SUPER
:
4316 tp
->coalesce
= COALESCE_SUPER
;
4318 case USB_SPEED_HIGH
:
4319 tp
->coalesce
= COALESCE_HIGH
;
4322 tp
->coalesce
= COALESCE_SLOW
;
4326 intf
->needs_remote_wakeup
= 1;
4328 tp
->rtl_ops
.init(tp
);
4329 set_ethernet_addr(tp
);
4331 usb_set_intfdata(intf
, tp
);
4332 netif_napi_add(netdev
, &tp
->napi
, r8152_poll
, RTL8152_NAPI_WEIGHT
);
4334 ret
= register_netdev(netdev
);
4336 netif_err(tp
, probe
, netdev
, "couldn't register the device\n");
4340 if (!rtl_can_wakeup(tp
))
4341 __rtl_set_wol(tp
, 0);
4343 tp
->saved_wolopts
= __rtl_get_wol(tp
);
4344 if (tp
->saved_wolopts
)
4345 device_set_wakeup_enable(&udev
->dev
, true);
4347 device_set_wakeup_enable(&udev
->dev
, false);
4349 netif_info(tp
, probe
, netdev
, "%s\n", DRIVER_VERSION
);
4354 netif_napi_del(&tp
->napi
);
4355 usb_set_intfdata(intf
, NULL
);
4357 free_netdev(netdev
);
4361 static void rtl8152_disconnect(struct usb_interface
*intf
)
4363 struct r8152
*tp
= usb_get_intfdata(intf
);
4365 usb_set_intfdata(intf
, NULL
);
4367 struct usb_device
*udev
= tp
->udev
;
4369 if (udev
->state
== USB_STATE_NOTATTACHED
)
4370 set_bit(RTL8152_UNPLUG
, &tp
->flags
);
4372 netif_napi_del(&tp
->napi
);
4373 unregister_netdev(tp
->netdev
);
4374 tp
->rtl_ops
.unload(tp
);
4375 free_netdev(tp
->netdev
);
4379 #define REALTEK_USB_DEVICE(vend, prod) \
4380 .match_flags = USB_DEVICE_ID_MATCH_DEVICE | \
4381 USB_DEVICE_ID_MATCH_INT_CLASS, \
4382 .idVendor = (vend), \
4383 .idProduct = (prod), \
4384 .bInterfaceClass = USB_CLASS_VENDOR_SPEC \
4387 .match_flags = USB_DEVICE_ID_MATCH_INT_INFO | \
4388 USB_DEVICE_ID_MATCH_DEVICE, \
4389 .idVendor = (vend), \
4390 .idProduct = (prod), \
4391 .bInterfaceClass = USB_CLASS_COMM, \
4392 .bInterfaceSubClass = USB_CDC_SUBCLASS_ETHERNET, \
4393 .bInterfaceProtocol = USB_CDC_PROTO_NONE
4395 /* table of devices that work with this driver */
4396 static struct usb_device_id rtl8152_table
[] = {
4397 {REALTEK_USB_DEVICE(VENDOR_ID_REALTEK
, 0x8152)},
4398 {REALTEK_USB_DEVICE(VENDOR_ID_REALTEK
, 0x8153)},
4399 {REALTEK_USB_DEVICE(VENDOR_ID_SAMSUNG
, 0xa101)},
4400 {REALTEK_USB_DEVICE(VENDOR_ID_LENOVO
, 0x7205)},
4401 {REALTEK_USB_DEVICE(VENDOR_ID_LENOVO
, 0x304f)},
4402 {REALTEK_USB_DEVICE(VENDOR_ID_NVIDIA
, 0x09ff)},
4406 MODULE_DEVICE_TABLE(usb
, rtl8152_table
);
4408 static struct usb_driver rtl8152_driver
= {
4410 .id_table
= rtl8152_table
,
4411 .probe
= rtl8152_probe
,
4412 .disconnect
= rtl8152_disconnect
,
4413 .suspend
= rtl8152_suspend
,
4414 .resume
= rtl8152_resume
,
4415 .reset_resume
= rtl8152_reset_resume
,
4416 .pre_reset
= rtl8152_pre_reset
,
4417 .post_reset
= rtl8152_post_reset
,
4418 .supports_autosuspend
= 1,
4419 .disable_hub_initiated_lpm
= 1,
4422 module_usb_driver(rtl8152_driver
);
4424 MODULE_AUTHOR(DRIVER_AUTHOR
);
4425 MODULE_DESCRIPTION(DRIVER_DESC
);
4426 MODULE_LICENSE("GPL");