2 * Copyright (c) 2014 Realtek Semiconductor Corp. All rights reserved.
4 * This program is free software; you can redistribute it and/or
5 * modify it under the terms of the GNU General Public License
6 * version 2 as published by the Free Software Foundation.
10 #include <linux/signal.h>
11 #include <linux/slab.h>
12 #include <linux/module.h>
13 #include <linux/netdevice.h>
14 #include <linux/etherdevice.h>
15 #include <linux/mii.h>
16 #include <linux/ethtool.h>
17 #include <linux/usb.h>
18 #include <linux/crc32.h>
19 #include <linux/if_vlan.h>
20 #include <linux/uaccess.h>
21 #include <linux/list.h>
23 #include <linux/ipv6.h>
25 /* Version Information */
26 #define DRIVER_VERSION "v1.05.0 (2014/02/18)"
27 #define DRIVER_AUTHOR "Realtek linux nic maintainers <nic_swsd@realtek.com>"
28 #define DRIVER_DESC "Realtek RTL8152/RTL8153 Based USB Ethernet Adapters"
29 #define MODULENAME "r8152"
31 #define R8152_PHY_ID 32
33 #define PLA_IDR 0xc000
34 #define PLA_RCR 0xc010
35 #define PLA_RMS 0xc016
36 #define PLA_RXFIFO_CTRL0 0xc0a0
37 #define PLA_RXFIFO_CTRL1 0xc0a4
38 #define PLA_RXFIFO_CTRL2 0xc0a8
39 #define PLA_FMC 0xc0b4
40 #define PLA_CFG_WOL 0xc0b6
41 #define PLA_TEREDO_CFG 0xc0bc
42 #define PLA_MAR 0xcd00
43 #define PLA_BACKUP 0xd000
44 #define PAL_BDC_CR 0xd1a0
45 #define PLA_TEREDO_TIMER 0xd2cc
46 #define PLA_REALWOW_TIMER 0xd2e8
47 #define PLA_LEDSEL 0xdd90
48 #define PLA_LED_FEATURE 0xdd92
49 #define PLA_PHYAR 0xde00
50 #define PLA_BOOT_CTRL 0xe004
51 #define PLA_GPHY_INTR_IMR 0xe022
52 #define PLA_EEE_CR 0xe040
53 #define PLA_EEEP_CR 0xe080
54 #define PLA_MAC_PWR_CTRL 0xe0c0
55 #define PLA_MAC_PWR_CTRL2 0xe0ca
56 #define PLA_MAC_PWR_CTRL3 0xe0cc
57 #define PLA_MAC_PWR_CTRL4 0xe0ce
58 #define PLA_WDT6_CTRL 0xe428
59 #define PLA_TCR0 0xe610
60 #define PLA_TCR1 0xe612
61 #define PLA_TXFIFO_CTRL 0xe618
62 #define PLA_RSTTELLY 0xe800
64 #define PLA_CRWECR 0xe81c
65 #define PLA_CONFIG12 0xe81e /* CONFIG1, CONFIG2 */
66 #define PLA_CONFIG34 0xe820 /* CONFIG3, CONFIG4 */
67 #define PLA_CONFIG5 0xe822
68 #define PLA_PHY_PWR 0xe84c
69 #define PLA_OOB_CTRL 0xe84f
70 #define PLA_CPCR 0xe854
71 #define PLA_MISC_0 0xe858
72 #define PLA_MISC_1 0xe85a
73 #define PLA_OCP_GPHY_BASE 0xe86c
74 #define PLA_TELLYCNT 0xe890
75 #define PLA_SFF_STS_7 0xe8de
76 #define PLA_PHYSTATUS 0xe908
77 #define PLA_BP_BA 0xfc26
78 #define PLA_BP_0 0xfc28
79 #define PLA_BP_1 0xfc2a
80 #define PLA_BP_2 0xfc2c
81 #define PLA_BP_3 0xfc2e
82 #define PLA_BP_4 0xfc30
83 #define PLA_BP_5 0xfc32
84 #define PLA_BP_6 0xfc34
85 #define PLA_BP_7 0xfc36
86 #define PLA_BP_EN 0xfc38
88 #define USB_U2P3_CTRL 0xb460
89 #define USB_DEV_STAT 0xb808
90 #define USB_USB_CTRL 0xd406
91 #define USB_PHY_CTRL 0xd408
92 #define USB_TX_AGG 0xd40a
93 #define USB_RX_BUF_TH 0xd40c
94 #define USB_USB_TIMER 0xd428
95 #define USB_RX_EARLY_AGG 0xd42c
96 #define USB_PM_CTRL_STATUS 0xd432
97 #define USB_TX_DMA 0xd434
98 #define USB_TOLERANCE 0xd490
99 #define USB_LPM_CTRL 0xd41a
100 #define USB_UPS_CTRL 0xd800
101 #define USB_MISC_0 0xd81a
102 #define USB_POWER_CUT 0xd80a
103 #define USB_AFE_CTRL2 0xd824
104 #define USB_WDT11_CTRL 0xe43c
105 #define USB_BP_BA 0xfc26
106 #define USB_BP_0 0xfc28
107 #define USB_BP_1 0xfc2a
108 #define USB_BP_2 0xfc2c
109 #define USB_BP_3 0xfc2e
110 #define USB_BP_4 0xfc30
111 #define USB_BP_5 0xfc32
112 #define USB_BP_6 0xfc34
113 #define USB_BP_7 0xfc36
114 #define USB_BP_EN 0xfc38
117 #define OCP_ALDPS_CONFIG 0x2010
118 #define OCP_EEE_CONFIG1 0x2080
119 #define OCP_EEE_CONFIG2 0x2092
120 #define OCP_EEE_CONFIG3 0x2094
121 #define OCP_BASE_MII 0xa400
122 #define OCP_EEE_AR 0xa41a
123 #define OCP_EEE_DATA 0xa41c
124 #define OCP_PHY_STATUS 0xa420
125 #define OCP_POWER_CFG 0xa430
126 #define OCP_EEE_CFG 0xa432
127 #define OCP_SRAM_ADDR 0xa436
128 #define OCP_SRAM_DATA 0xa438
129 #define OCP_DOWN_SPEED 0xa442
130 #define OCP_EEE_CFG2 0xa5d0
131 #define OCP_ADC_CFG 0xbc06
134 #define SRAM_LPF_CFG 0x8012
135 #define SRAM_10M_AMP1 0x8080
136 #define SRAM_10M_AMP2 0x8082
137 #define SRAM_IMPEDANCE 0x8084
140 #define RCR_AAP 0x00000001
141 #define RCR_APM 0x00000002
142 #define RCR_AM 0x00000004
143 #define RCR_AB 0x00000008
144 #define RCR_ACPT_ALL (RCR_AAP | RCR_APM | RCR_AM | RCR_AB)
146 /* PLA_RXFIFO_CTRL0 */
147 #define RXFIFO_THR1_NORMAL 0x00080002
148 #define RXFIFO_THR1_OOB 0x01800003
150 /* PLA_RXFIFO_CTRL1 */
151 #define RXFIFO_THR2_FULL 0x00000060
152 #define RXFIFO_THR2_HIGH 0x00000038
153 #define RXFIFO_THR2_OOB 0x0000004a
154 #define RXFIFO_THR2_NORMAL 0x00a0
156 /* PLA_RXFIFO_CTRL2 */
157 #define RXFIFO_THR3_FULL 0x00000078
158 #define RXFIFO_THR3_HIGH 0x00000048
159 #define RXFIFO_THR3_OOB 0x0000005a
160 #define RXFIFO_THR3_NORMAL 0x0110
162 /* PLA_TXFIFO_CTRL */
163 #define TXFIFO_THR_NORMAL 0x00400008
164 #define TXFIFO_THR_NORMAL2 0x01000008
167 #define FMC_FCR_MCU_EN 0x0001
170 #define EEEP_CR_EEEP_TX 0x0002
173 #define WDT6_SET_MODE 0x0010
176 #define TCR0_TX_EMPTY 0x0800
177 #define TCR0_AUTO_FIFO 0x0080
180 #define VERSION_MASK 0x7cf0
188 #define CRWECR_NORAML 0x00
189 #define CRWECR_CONFIG 0xc0
192 #define NOW_IS_OOB 0x80
193 #define TXFIFO_EMPTY 0x20
194 #define RXFIFO_EMPTY 0x10
195 #define LINK_LIST_READY 0x02
196 #define DIS_MCU_CLROOB 0x01
197 #define FIFO_EMPTY (TXFIFO_EMPTY | RXFIFO_EMPTY)
200 #define RXDY_GATED_EN 0x0008
203 #define RE_INIT_LL 0x8000
204 #define MCU_BORW_EN 0x4000
207 #define CPCR_RX_VLAN 0x0040
210 #define MAGIC_EN 0x0001
213 #define TEREDO_SEL 0x8000
214 #define TEREDO_WAKE_MASK 0x7f00
215 #define TEREDO_RS_EVENT_MASK 0x00fe
216 #define OOB_TEREDO_EN 0x0001
219 #define ALDPS_PROXY_MODE 0x0001
222 #define LINK_ON_WAKE_EN 0x0010
223 #define LINK_OFF_WAKE_EN 0x0008
226 #define BWF_EN 0x0040
227 #define MWF_EN 0x0020
228 #define UWF_EN 0x0010
229 #define LAN_WAKE_EN 0x0002
231 /* PLA_LED_FEATURE */
232 #define LED_MODE_MASK 0x0700
235 #define TX_10M_IDLE_EN 0x0080
236 #define PFM_PWM_SWITCH 0x0040
238 /* PLA_MAC_PWR_CTRL */
239 #define D3_CLK_GATED_EN 0x00004000
240 #define MCU_CLK_RATIO 0x07010f07
241 #define MCU_CLK_RATIO_MASK 0x0f0f0f0f
242 #define ALDPS_SPDWN_RATIO 0x0f87
244 /* PLA_MAC_PWR_CTRL2 */
245 #define EEE_SPDWN_RATIO 0x8007
247 /* PLA_MAC_PWR_CTRL3 */
248 #define PKT_AVAIL_SPDWN_EN 0x0100
249 #define SUSPEND_SPDWN_EN 0x0004
250 #define U1U2_SPDWN_EN 0x0002
251 #define L1_SPDWN_EN 0x0001
253 /* PLA_MAC_PWR_CTRL4 */
254 #define PWRSAVE_SPDWN_EN 0x1000
255 #define RXDV_SPDWN_EN 0x0800
256 #define TX10MIDLE_EN 0x0100
257 #define TP100_SPDWN_EN 0x0020
258 #define TP500_SPDWN_EN 0x0010
259 #define TP1000_SPDWN_EN 0x0008
260 #define EEE_SPDWN_EN 0x0001
262 /* PLA_GPHY_INTR_IMR */
263 #define GPHY_STS_MSK 0x0001
264 #define SPEED_DOWN_MSK 0x0002
265 #define SPDWN_RXDV_MSK 0x0004
266 #define SPDWN_LINKCHG_MSK 0x0008
269 #define PHYAR_FLAG 0x80000000
272 #define EEE_RX_EN 0x0001
273 #define EEE_TX_EN 0x0002
276 #define AUTOLOAD_DONE 0x0002
279 #define STAT_SPEED_MASK 0x0006
280 #define STAT_SPEED_HIGH 0x0000
281 #define STAT_SPEED_FULL 0x0001
284 #define TX_AGG_MAX_THRESHOLD 0x03
287 #define RX_THR_SUPPER 0x0c350180
288 #define RX_THR_HIGH 0x7a120180
289 #define RX_THR_SLOW 0xffff0180
292 #define TEST_MODE_DISABLE 0x00000001
293 #define TX_SIZE_ADJUST1 0x00000100
296 #define POWER_CUT 0x0100
298 /* USB_PM_CTRL_STATUS */
299 #define RESUME_INDICATE 0x0001
302 #define RX_AGG_DISABLE 0x0010
305 #define U2P3_ENABLE 0x0001
308 #define PWR_EN 0x0001
309 #define PHASE2_EN 0x0008
312 #define PCUT_STATUS 0x0001
314 /* USB_RX_EARLY_AGG */
315 #define EARLY_AGG_SUPPER 0x0e832981
316 #define EARLY_AGG_HIGH 0x0e837a12
317 #define EARLY_AGG_SLOW 0x0e83ffff
320 #define TIMER11_EN 0x0001
323 #define LPM_TIMER_MASK 0x0c
324 #define LPM_TIMER_500MS 0x04 /* 500 ms */
325 #define LPM_TIMER_500US 0x0c /* 500 us */
328 #define SEN_VAL_MASK 0xf800
329 #define SEN_VAL_NORMAL 0xa000
330 #define SEL_RXIDLE 0x0100
332 /* OCP_ALDPS_CONFIG */
333 #define ENPWRSAVE 0x8000
334 #define ENPDNPS 0x0200
335 #define LINKENA 0x0100
336 #define DIS_SDSAVE 0x0010
339 #define PHY_STAT_MASK 0x0007
340 #define PHY_STAT_LAN_ON 3
341 #define PHY_STAT_PWRDN 5
344 #define EEE_CLKDIV_EN 0x8000
345 #define EN_ALDPS 0x0004
346 #define EN_10M_PLLOFF 0x0001
348 /* OCP_EEE_CONFIG1 */
349 #define RG_TXLPI_MSK_HFDUP 0x8000
350 #define RG_MATCLR_EN 0x4000
351 #define EEE_10_CAP 0x2000
352 #define EEE_NWAY_EN 0x1000
353 #define TX_QUIET_EN 0x0200
354 #define RX_QUIET_EN 0x0100
355 #define SDRISETIME 0x0010 /* bit 4 ~ 6 */
356 #define RG_RXLPI_MSK_HFDUP 0x0008
357 #define SDFALLTIME 0x0007 /* bit 0 ~ 2 */
359 /* OCP_EEE_CONFIG2 */
360 #define RG_LPIHYS_NUM 0x7000 /* bit 12 ~ 15 */
361 #define RG_DACQUIET_EN 0x0400
362 #define RG_LDVQUIET_EN 0x0200
363 #define RG_CKRSEL 0x0020
364 #define RG_EEEPRG_EN 0x0010
366 /* OCP_EEE_CONFIG3 */
367 #define FST_SNR_EYE_R 0x1500 /* bit 7 ~ 15 */
368 #define RG_LFS_SEL 0x0060 /* bit 6 ~ 5 */
369 #define MSK_PH 0x0006 /* bit 0 ~ 3 */
372 /* bit[15:14] function */
373 #define FUN_ADDR 0x0000
374 #define FUN_DATA 0x4000
375 /* bit[4:0] device addr */
376 #define DEVICE_ADDR 0x0007
379 #define EEE_ADDR 0x003C
380 #define EEE_DATA 0x0002
383 #define CTAP_SHORT_EN 0x0040
384 #define EEE10_EN 0x0010
387 #define EN_10M_BGOFF 0x0080
390 #define MY1000_EEE 0x0004
391 #define MY100_EEE 0x0002
394 #define CKADSEL_L 0x0100
395 #define ADC_EN 0x0080
396 #define EN_EMI_L 0x0040
399 #define LPF_AUTO_TUNE 0x8000
402 #define GDAC_IB_UPALL 0x0008
405 #define AMP_DN 0x0200
408 #define RX_DRIVING_MASK 0x6000
410 enum rtl_register_content
{
418 #define RTL8152_MAX_TX 10
419 #define RTL8152_MAX_RX 10
425 #define INTR_LINK 0x0004
427 #define RTL8152_REQT_READ 0xc0
428 #define RTL8152_REQT_WRITE 0x40
429 #define RTL8152_REQ_GET_REGS 0x05
430 #define RTL8152_REQ_SET_REGS 0x05
432 #define BYTE_EN_DWORD 0xff
433 #define BYTE_EN_WORD 0x33
434 #define BYTE_EN_BYTE 0x11
435 #define BYTE_EN_SIX_BYTES 0x3f
436 #define BYTE_EN_START_MASK 0x0f
437 #define BYTE_EN_END_MASK 0xf0
439 #define RTL8152_RMS (VLAN_ETH_FRAME_LEN + VLAN_HLEN)
440 #define RTL8152_TX_TIMEOUT (HZ)
452 /* Define these values to match your device */
453 #define VENDOR_ID_REALTEK 0x0bda
454 #define PRODUCT_ID_RTL8152 0x8152
455 #define PRODUCT_ID_RTL8153 0x8153
457 #define VENDOR_ID_SAMSUNG 0x04e8
458 #define PRODUCT_ID_SAMSUNG 0xa101
460 #define MCU_TYPE_PLA 0x0100
461 #define MCU_TYPE_USB 0x0000
463 #define REALTEK_USB_DEVICE(vend, prod) \
464 USB_DEVICE_INTERFACE_CLASS(vend, prod, USB_CLASS_VENDOR_SPEC)
468 #define RX_LEN_MASK 0x7fff
478 #define TX_FS (1 << 31) /* First segment of a packet */
479 #define TX_LS (1 << 30) /* Final segment of a packet */
480 #define TX_LEN_MASK 0x3ffff
483 #define UDP_CS (1 << 31) /* Calculate UDP/IP checksum */
484 #define TCP_CS (1 << 30) /* Calculate TCP/IP checksum */
485 #define IPV4_CS (1 << 29) /* Calculate IPv4 checksum */
486 #define IPV6_CS (1 << 28) /* Calculate IPv6 checksum */
492 struct list_head list
;
494 struct r8152
*context
;
500 struct list_head list
;
502 struct r8152
*context
;
511 struct usb_device
*udev
;
512 struct tasklet_struct tl
;
513 struct usb_interface
*intf
;
514 struct net_device
*netdev
;
515 struct urb
*intr_urb
;
516 struct tx_agg tx_info
[RTL8152_MAX_TX
];
517 struct rx_agg rx_info
[RTL8152_MAX_RX
];
518 struct list_head rx_done
, tx_free
;
519 struct sk_buff_head tx_queue
;
520 spinlock_t rx_lock
, tx_lock
;
521 struct delayed_work schedule
;
522 struct mii_if_info mii
;
525 void (*init
)(struct r8152
*);
526 int (*enable
)(struct r8152
*);
527 void (*disable
)(struct r8152
*);
528 void (*up
)(struct r8152
*);
529 void (*down
)(struct r8152
*);
530 void (*unload
)(struct r8152
*);
553 /* Maximum number of multicast addresses to filter (vs. Rx-all-multicast).
554 * The RTL chips use a 64 element hash table based on the Ethernet CRC.
556 static const int multicast_filter_limit
= 32;
557 static unsigned int rx_buf_sz
= 16384;
560 int get_registers(struct r8152
*tp
, u16 value
, u16 index
, u16 size
, void *data
)
565 tmp
= kmalloc(size
, GFP_KERNEL
);
569 ret
= usb_control_msg(tp
->udev
, usb_rcvctrlpipe(tp
->udev
, 0),
570 RTL8152_REQ_GET_REGS
, RTL8152_REQT_READ
,
571 value
, index
, tmp
, size
, 500);
573 memcpy(data
, tmp
, size
);
580 int set_registers(struct r8152
*tp
, u16 value
, u16 index
, u16 size
, void *data
)
585 tmp
= kmalloc(size
, GFP_KERNEL
);
589 memcpy(tmp
, data
, size
);
591 ret
= usb_control_msg(tp
->udev
, usb_sndctrlpipe(tp
->udev
, 0),
592 RTL8152_REQ_SET_REGS
, RTL8152_REQT_WRITE
,
593 value
, index
, tmp
, size
, 500);
599 static int generic_ocp_read(struct r8152
*tp
, u16 index
, u16 size
,
600 void *data
, u16 type
)
605 if (test_bit(RTL8152_UNPLUG
, &tp
->flags
))
608 /* both size and indix must be 4 bytes align */
609 if ((size
& 3) || !size
|| (index
& 3) || !data
)
612 if ((u32
)index
+ (u32
)size
> 0xffff)
617 ret
= get_registers(tp
, index
, type
, limit
, data
);
625 ret
= get_registers(tp
, index
, type
, size
, data
);
639 static int generic_ocp_write(struct r8152
*tp
, u16 index
, u16 byteen
,
640 u16 size
, void *data
, u16 type
)
643 u16 byteen_start
, byteen_end
, byen
;
646 if (test_bit(RTL8152_UNPLUG
, &tp
->flags
))
649 /* both size and indix must be 4 bytes align */
650 if ((size
& 3) || !size
|| (index
& 3) || !data
)
653 if ((u32
)index
+ (u32
)size
> 0xffff)
656 byteen_start
= byteen
& BYTE_EN_START_MASK
;
657 byteen_end
= byteen
& BYTE_EN_END_MASK
;
659 byen
= byteen_start
| (byteen_start
<< 4);
660 ret
= set_registers(tp
, index
, type
| byen
, 4, data
);
673 ret
= set_registers(tp
, index
,
674 type
| BYTE_EN_DWORD
,
683 ret
= set_registers(tp
, index
,
684 type
| BYTE_EN_DWORD
,
696 byen
= byteen_end
| (byteen_end
>> 4);
697 ret
= set_registers(tp
, index
, type
| byen
, 4, data
);
707 int pla_ocp_read(struct r8152
*tp
, u16 index
, u16 size
, void *data
)
709 return generic_ocp_read(tp
, index
, size
, data
, MCU_TYPE_PLA
);
713 int pla_ocp_write(struct r8152
*tp
, u16 index
, u16 byteen
, u16 size
, void *data
)
715 return generic_ocp_write(tp
, index
, byteen
, size
, data
, MCU_TYPE_PLA
);
719 int usb_ocp_read(struct r8152
*tp
, u16 index
, u16 size
, void *data
)
721 return generic_ocp_read(tp
, index
, size
, data
, MCU_TYPE_USB
);
725 int usb_ocp_write(struct r8152
*tp
, u16 index
, u16 byteen
, u16 size
, void *data
)
727 return generic_ocp_write(tp
, index
, byteen
, size
, data
, MCU_TYPE_USB
);
730 static u32
ocp_read_dword(struct r8152
*tp
, u16 type
, u16 index
)
734 generic_ocp_read(tp
, index
, sizeof(data
), &data
, type
);
736 return __le32_to_cpu(data
);
739 static void ocp_write_dword(struct r8152
*tp
, u16 type
, u16 index
, u32 data
)
741 __le32 tmp
= __cpu_to_le32(data
);
743 generic_ocp_write(tp
, index
, BYTE_EN_DWORD
, sizeof(tmp
), &tmp
, type
);
746 static u16
ocp_read_word(struct r8152
*tp
, u16 type
, u16 index
)
750 u8 shift
= index
& 2;
754 generic_ocp_read(tp
, index
, sizeof(tmp
), &tmp
, type
);
756 data
= __le32_to_cpu(tmp
);
757 data
>>= (shift
* 8);
763 static void ocp_write_word(struct r8152
*tp
, u16 type
, u16 index
, u32 data
)
767 u16 byen
= BYTE_EN_WORD
;
768 u8 shift
= index
& 2;
774 mask
<<= (shift
* 8);
775 data
<<= (shift
* 8);
779 generic_ocp_read(tp
, index
, sizeof(tmp
), &tmp
, type
);
781 data
|= __le32_to_cpu(tmp
) & ~mask
;
782 tmp
= __cpu_to_le32(data
);
784 generic_ocp_write(tp
, index
, byen
, sizeof(tmp
), &tmp
, type
);
787 static u8
ocp_read_byte(struct r8152
*tp
, u16 type
, u16 index
)
791 u8 shift
= index
& 3;
795 generic_ocp_read(tp
, index
, sizeof(tmp
), &tmp
, type
);
797 data
= __le32_to_cpu(tmp
);
798 data
>>= (shift
* 8);
804 static void ocp_write_byte(struct r8152
*tp
, u16 type
, u16 index
, u32 data
)
808 u16 byen
= BYTE_EN_BYTE
;
809 u8 shift
= index
& 3;
815 mask
<<= (shift
* 8);
816 data
<<= (shift
* 8);
820 generic_ocp_read(tp
, index
, sizeof(tmp
), &tmp
, type
);
822 data
|= __le32_to_cpu(tmp
) & ~mask
;
823 tmp
= __cpu_to_le32(data
);
825 generic_ocp_write(tp
, index
, byen
, sizeof(tmp
), &tmp
, type
);
828 static u16
ocp_reg_read(struct r8152
*tp
, u16 addr
)
830 u16 ocp_base
, ocp_index
;
832 ocp_base
= addr
& 0xf000;
833 if (ocp_base
!= tp
->ocp_base
) {
834 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_OCP_GPHY_BASE
, ocp_base
);
835 tp
->ocp_base
= ocp_base
;
838 ocp_index
= (addr
& 0x0fff) | 0xb000;
839 return ocp_read_word(tp
, MCU_TYPE_PLA
, ocp_index
);
842 static void ocp_reg_write(struct r8152
*tp
, u16 addr
, u16 data
)
844 u16 ocp_base
, ocp_index
;
846 ocp_base
= addr
& 0xf000;
847 if (ocp_base
!= tp
->ocp_base
) {
848 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_OCP_GPHY_BASE
, ocp_base
);
849 tp
->ocp_base
= ocp_base
;
852 ocp_index
= (addr
& 0x0fff) | 0xb000;
853 ocp_write_word(tp
, MCU_TYPE_PLA
, ocp_index
, data
);
856 static inline void r8152_mdio_write(struct r8152
*tp
, u32 reg_addr
, u32 value
)
858 ocp_reg_write(tp
, OCP_BASE_MII
+ reg_addr
* 2, value
);
861 static inline int r8152_mdio_read(struct r8152
*tp
, u32 reg_addr
)
863 return ocp_reg_read(tp
, OCP_BASE_MII
+ reg_addr
* 2);
866 static void sram_write(struct r8152
*tp
, u16 addr
, u16 data
)
868 ocp_reg_write(tp
, OCP_SRAM_ADDR
, addr
);
869 ocp_reg_write(tp
, OCP_SRAM_DATA
, data
);
872 static u16
sram_read(struct r8152
*tp
, u16 addr
)
874 ocp_reg_write(tp
, OCP_SRAM_ADDR
, addr
);
875 return ocp_reg_read(tp
, OCP_SRAM_DATA
);
878 static int read_mii_word(struct net_device
*netdev
, int phy_id
, int reg
)
880 struct r8152
*tp
= netdev_priv(netdev
);
883 if (phy_id
!= R8152_PHY_ID
)
886 ret
= usb_autopm_get_interface(tp
->intf
);
890 ret
= r8152_mdio_read(tp
, reg
);
892 usb_autopm_put_interface(tp
->intf
);
899 void write_mii_word(struct net_device
*netdev
, int phy_id
, int reg
, int val
)
901 struct r8152
*tp
= netdev_priv(netdev
);
903 if (phy_id
!= R8152_PHY_ID
)
906 if (usb_autopm_get_interface(tp
->intf
) < 0)
909 r8152_mdio_write(tp
, reg
, val
);
911 usb_autopm_put_interface(tp
->intf
);
915 int r8152_submit_rx(struct r8152
*tp
, struct rx_agg
*agg
, gfp_t mem_flags
);
917 static inline void set_ethernet_addr(struct r8152
*tp
)
919 struct net_device
*dev
= tp
->netdev
;
923 if (tp
->version
== RTL_VER_01
)
924 ret
= pla_ocp_read(tp
, PLA_IDR
, sizeof(node_id
), node_id
);
926 ret
= pla_ocp_read(tp
, PLA_BACKUP
, sizeof(node_id
), node_id
);
929 netif_notice(tp
, probe
, dev
, "inet addr fail\n");
931 if (tp
->version
!= RTL_VER_01
) {
932 ocp_write_byte(tp
, MCU_TYPE_PLA
, PLA_CRWECR
,
934 pla_ocp_write(tp
, PLA_IDR
, BYTE_EN_SIX_BYTES
,
935 sizeof(node_id
), node_id
);
936 ocp_write_byte(tp
, MCU_TYPE_PLA
, PLA_CRWECR
,
940 memcpy(dev
->dev_addr
, node_id
, dev
->addr_len
);
941 memcpy(dev
->perm_addr
, dev
->dev_addr
, dev
->addr_len
);
945 static int rtl8152_set_mac_address(struct net_device
*netdev
, void *p
)
947 struct r8152
*tp
= netdev_priv(netdev
);
948 struct sockaddr
*addr
= p
;
950 if (!is_valid_ether_addr(addr
->sa_data
))
951 return -EADDRNOTAVAIL
;
953 memcpy(netdev
->dev_addr
, addr
->sa_data
, netdev
->addr_len
);
955 ocp_write_byte(tp
, MCU_TYPE_PLA
, PLA_CRWECR
, CRWECR_CONFIG
);
956 pla_ocp_write(tp
, PLA_IDR
, BYTE_EN_SIX_BYTES
, 8, addr
->sa_data
);
957 ocp_write_byte(tp
, MCU_TYPE_PLA
, PLA_CRWECR
, CRWECR_NORAML
);
962 static struct net_device_stats
*rtl8152_get_stats(struct net_device
*dev
)
967 static void read_bulk_callback(struct urb
*urb
)
969 struct net_device
*netdev
;
971 int status
= urb
->status
;
984 if (test_bit(RTL8152_UNPLUG
, &tp
->flags
))
987 if (!test_bit(WORK_ENABLE
, &tp
->flags
))
992 /* When link down, the driver would cancel all bulks. */
993 /* This avoid the re-submitting bulk */
994 if (!netif_carrier_ok(netdev
))
997 usb_mark_last_busy(tp
->udev
);
1001 if (urb
->actual_length
< ETH_ZLEN
)
1004 spin_lock_irqsave(&tp
->rx_lock
, flags
);
1005 list_add_tail(&agg
->list
, &tp
->rx_done
);
1006 spin_unlock_irqrestore(&tp
->rx_lock
, flags
);
1007 tasklet_schedule(&tp
->tl
);
1010 set_bit(RTL8152_UNPLUG
, &tp
->flags
);
1011 netif_device_detach(tp
->netdev
);
1014 return; /* the urb is in unlink state */
1016 if (net_ratelimit())
1017 netdev_warn(netdev
, "maybe reset is needed?\n");
1020 if (net_ratelimit())
1021 netdev_warn(netdev
, "Rx status %d\n", status
);
1025 result
= r8152_submit_rx(tp
, agg
, GFP_ATOMIC
);
1026 if (result
== -ENODEV
) {
1027 netif_device_detach(tp
->netdev
);
1028 } else if (result
) {
1029 spin_lock_irqsave(&tp
->rx_lock
, flags
);
1030 list_add_tail(&agg
->list
, &tp
->rx_done
);
1031 spin_unlock_irqrestore(&tp
->rx_lock
, flags
);
1032 tasklet_schedule(&tp
->tl
);
1036 static void write_bulk_callback(struct urb
*urb
)
1038 struct net_device_stats
*stats
;
1039 unsigned long flags
;
1042 int status
= urb
->status
;
1052 stats
= rtl8152_get_stats(tp
->netdev
);
1054 if (net_ratelimit())
1055 netdev_warn(tp
->netdev
, "Tx status %d\n", status
);
1056 stats
->tx_errors
+= agg
->skb_num
;
1058 stats
->tx_packets
+= agg
->skb_num
;
1059 stats
->tx_bytes
+= agg
->skb_len
;
1062 spin_lock_irqsave(&tp
->tx_lock
, flags
);
1063 list_add_tail(&agg
->list
, &tp
->tx_free
);
1064 spin_unlock_irqrestore(&tp
->tx_lock
, flags
);
1066 usb_autopm_put_interface_async(tp
->intf
);
1068 if (!netif_carrier_ok(tp
->netdev
))
1071 if (!test_bit(WORK_ENABLE
, &tp
->flags
))
1074 if (test_bit(RTL8152_UNPLUG
, &tp
->flags
))
1077 if (!skb_queue_empty(&tp
->tx_queue
))
1078 schedule_delayed_work(&tp
->schedule
, 0);
1081 static void intr_callback(struct urb
*urb
)
1085 int status
= urb
->status
;
1092 if (!test_bit(WORK_ENABLE
, &tp
->flags
))
1095 if (test_bit(RTL8152_UNPLUG
, &tp
->flags
))
1099 case 0: /* success */
1101 case -ECONNRESET
: /* unlink */
1103 netif_device_detach(tp
->netdev
);
1107 netif_info(tp
, intr
, tp
->netdev
, "intr status -EOVERFLOW\n");
1109 /* -EPIPE: should clear the halt */
1111 netif_info(tp
, intr
, tp
->netdev
, "intr status %d\n", status
);
1115 d
= urb
->transfer_buffer
;
1116 if (INTR_LINK
& __le16_to_cpu(d
[0])) {
1117 if (!(tp
->speed
& LINK_STATUS
)) {
1118 set_bit(RTL8152_LINK_CHG
, &tp
->flags
);
1119 schedule_delayed_work(&tp
->schedule
, 0);
1122 if (tp
->speed
& LINK_STATUS
) {
1123 set_bit(RTL8152_LINK_CHG
, &tp
->flags
);
1124 schedule_delayed_work(&tp
->schedule
, 0);
1129 res
= usb_submit_urb(urb
, GFP_ATOMIC
);
1131 netif_device_detach(tp
->netdev
);
1133 netif_err(tp
, intr
, tp
->netdev
,
1134 "can't resubmit intr, status %d\n", res
);
1137 static inline void *rx_agg_align(void *data
)
1139 return (void *)ALIGN((uintptr_t)data
, RX_ALIGN
);
1142 static inline void *tx_agg_align(void *data
)
1144 return (void *)ALIGN((uintptr_t)data
, TX_ALIGN
);
1147 static void free_all_mem(struct r8152
*tp
)
1151 for (i
= 0; i
< RTL8152_MAX_RX
; i
++) {
1152 usb_free_urb(tp
->rx_info
[i
].urb
);
1153 tp
->rx_info
[i
].urb
= NULL
;
1155 kfree(tp
->rx_info
[i
].buffer
);
1156 tp
->rx_info
[i
].buffer
= NULL
;
1157 tp
->rx_info
[i
].head
= NULL
;
1160 for (i
= 0; i
< RTL8152_MAX_TX
; i
++) {
1161 usb_free_urb(tp
->tx_info
[i
].urb
);
1162 tp
->tx_info
[i
].urb
= NULL
;
1164 kfree(tp
->tx_info
[i
].buffer
);
1165 tp
->tx_info
[i
].buffer
= NULL
;
1166 tp
->tx_info
[i
].head
= NULL
;
1169 usb_free_urb(tp
->intr_urb
);
1170 tp
->intr_urb
= NULL
;
1172 kfree(tp
->intr_buff
);
1173 tp
->intr_buff
= NULL
;
1176 static int alloc_all_mem(struct r8152
*tp
)
1178 struct net_device
*netdev
= tp
->netdev
;
1179 struct usb_interface
*intf
= tp
->intf
;
1180 struct usb_host_interface
*alt
= intf
->cur_altsetting
;
1181 struct usb_host_endpoint
*ep_intr
= alt
->endpoint
+ 2;
1186 node
= netdev
->dev
.parent
? dev_to_node(netdev
->dev
.parent
) : -1;
1188 spin_lock_init(&tp
->rx_lock
);
1189 spin_lock_init(&tp
->tx_lock
);
1190 INIT_LIST_HEAD(&tp
->rx_done
);
1191 INIT_LIST_HEAD(&tp
->tx_free
);
1192 skb_queue_head_init(&tp
->tx_queue
);
1194 for (i
= 0; i
< RTL8152_MAX_RX
; i
++) {
1195 buf
= kmalloc_node(rx_buf_sz
, GFP_KERNEL
, node
);
1199 if (buf
!= rx_agg_align(buf
)) {
1201 buf
= kmalloc_node(rx_buf_sz
+ RX_ALIGN
, GFP_KERNEL
,
1207 urb
= usb_alloc_urb(0, GFP_KERNEL
);
1213 INIT_LIST_HEAD(&tp
->rx_info
[i
].list
);
1214 tp
->rx_info
[i
].context
= tp
;
1215 tp
->rx_info
[i
].urb
= urb
;
1216 tp
->rx_info
[i
].buffer
= buf
;
1217 tp
->rx_info
[i
].head
= rx_agg_align(buf
);
1220 for (i
= 0; i
< RTL8152_MAX_TX
; i
++) {
1221 buf
= kmalloc_node(rx_buf_sz
, GFP_KERNEL
, node
);
1225 if (buf
!= tx_agg_align(buf
)) {
1227 buf
= kmalloc_node(rx_buf_sz
+ TX_ALIGN
, GFP_KERNEL
,
1233 urb
= usb_alloc_urb(0, GFP_KERNEL
);
1239 INIT_LIST_HEAD(&tp
->tx_info
[i
].list
);
1240 tp
->tx_info
[i
].context
= tp
;
1241 tp
->tx_info
[i
].urb
= urb
;
1242 tp
->tx_info
[i
].buffer
= buf
;
1243 tp
->tx_info
[i
].head
= tx_agg_align(buf
);
1245 list_add_tail(&tp
->tx_info
[i
].list
, &tp
->tx_free
);
1248 tp
->intr_urb
= usb_alloc_urb(0, GFP_KERNEL
);
1252 tp
->intr_buff
= kmalloc(INTBUFSIZE
, GFP_KERNEL
);
1256 tp
->intr_interval
= (int)ep_intr
->desc
.bInterval
;
1257 usb_fill_int_urb(tp
->intr_urb
, tp
->udev
, usb_rcvintpipe(tp
->udev
, 3),
1258 tp
->intr_buff
, INTBUFSIZE
, intr_callback
,
1259 tp
, tp
->intr_interval
);
1268 static struct tx_agg
*r8152_get_tx_agg(struct r8152
*tp
)
1270 struct tx_agg
*agg
= NULL
;
1271 unsigned long flags
;
1273 spin_lock_irqsave(&tp
->tx_lock
, flags
);
1274 if (!list_empty(&tp
->tx_free
)) {
1275 struct list_head
*cursor
;
1277 cursor
= tp
->tx_free
.next
;
1278 list_del_init(cursor
);
1279 agg
= list_entry(cursor
, struct tx_agg
, list
);
1281 spin_unlock_irqrestore(&tp
->tx_lock
, flags
);
1287 r8152_tx_csum(struct r8152
*tp
, struct tx_desc
*desc
, struct sk_buff
*skb
)
1289 memset(desc
, 0, sizeof(*desc
));
1291 desc
->opts1
= cpu_to_le32((skb
->len
& TX_LEN_MASK
) | TX_FS
| TX_LS
);
1293 if (skb
->ip_summed
== CHECKSUM_PARTIAL
) {
1298 if (skb
->protocol
== htons(ETH_P_8021Q
))
1299 protocol
= vlan_eth_hdr(skb
)->h_vlan_encapsulated_proto
;
1301 protocol
= skb
->protocol
;
1304 case htons(ETH_P_IP
):
1306 ip_protocol
= ip_hdr(skb
)->protocol
;
1309 case htons(ETH_P_IPV6
):
1311 ip_protocol
= ipv6_hdr(skb
)->nexthdr
;
1315 ip_protocol
= IPPROTO_RAW
;
1319 if (ip_protocol
== IPPROTO_TCP
) {
1321 opts2
|= (skb_transport_offset(skb
) & 0x7fff) << 17;
1322 } else if (ip_protocol
== IPPROTO_UDP
) {
1328 desc
->opts2
= cpu_to_le32(opts2
);
1332 static int r8152_tx_agg_fill(struct r8152
*tp
, struct tx_agg
*agg
)
1334 struct sk_buff_head skb_head
, *tx_queue
= &tp
->tx_queue
;
1335 unsigned long flags
;
1339 __skb_queue_head_init(&skb_head
);
1340 spin_lock_irqsave(&tx_queue
->lock
, flags
);
1341 skb_queue_splice_init(tx_queue
, &skb_head
);
1342 spin_unlock_irqrestore(&tx_queue
->lock
, flags
);
1344 tx_data
= agg
->head
;
1345 agg
->skb_num
= agg
->skb_len
= 0;
1348 while (remain
>= ETH_ZLEN
+ sizeof(struct tx_desc
)) {
1349 struct tx_desc
*tx_desc
;
1350 struct sk_buff
*skb
;
1353 skb
= __skb_dequeue(&skb_head
);
1357 remain
-= sizeof(*tx_desc
);
1360 __skb_queue_head(&skb_head
, skb
);
1364 tx_data
= tx_agg_align(tx_data
);
1365 tx_desc
= (struct tx_desc
*)tx_data
;
1366 tx_data
+= sizeof(*tx_desc
);
1368 r8152_tx_csum(tp
, tx_desc
, skb
);
1369 memcpy(tx_data
, skb
->data
, len
);
1371 agg
->skb_len
+= len
;
1372 dev_kfree_skb_any(skb
);
1375 remain
= rx_buf_sz
- (int)(tx_agg_align(tx_data
) - agg
->head
);
1378 if (!skb_queue_empty(&skb_head
)) {
1379 spin_lock_irqsave(&tx_queue
->lock
, flags
);
1380 skb_queue_splice(&skb_head
, tx_queue
);
1381 spin_unlock_irqrestore(&tx_queue
->lock
, flags
);
1384 netif_tx_lock_bh(tp
->netdev
);
1386 if (netif_queue_stopped(tp
->netdev
) &&
1387 skb_queue_len(&tp
->tx_queue
) < tp
->tx_qlen
)
1388 netif_wake_queue(tp
->netdev
);
1390 netif_tx_unlock_bh(tp
->netdev
);
1392 ret
= usb_autopm_get_interface(tp
->intf
);
1396 usb_fill_bulk_urb(agg
->urb
, tp
->udev
, usb_sndbulkpipe(tp
->udev
, 2),
1397 agg
->head
, (int)(tx_data
- (u8
*)agg
->head
),
1398 (usb_complete_t
)write_bulk_callback
, agg
);
1400 ret
= usb_submit_urb(agg
->urb
, GFP_KERNEL
);
1402 usb_autopm_put_interface(tp
->intf
);
1408 static void rx_bottom(struct r8152
*tp
)
1410 unsigned long flags
;
1411 struct list_head
*cursor
, *next
, rx_queue
;
1413 if (list_empty(&tp
->rx_done
))
1416 INIT_LIST_HEAD(&rx_queue
);
1417 spin_lock_irqsave(&tp
->rx_lock
, flags
);
1418 list_splice_init(&tp
->rx_done
, &rx_queue
);
1419 spin_unlock_irqrestore(&tp
->rx_lock
, flags
);
1421 list_for_each_safe(cursor
, next
, &rx_queue
) {
1422 struct rx_desc
*rx_desc
;
1429 list_del_init(cursor
);
1431 agg
= list_entry(cursor
, struct rx_agg
, list
);
1433 if (urb
->actual_length
< ETH_ZLEN
)
1436 rx_desc
= agg
->head
;
1437 rx_data
= agg
->head
;
1438 len_used
+= sizeof(struct rx_desc
);
1440 while (urb
->actual_length
> len_used
) {
1441 struct net_device
*netdev
= tp
->netdev
;
1442 struct net_device_stats
*stats
;
1443 unsigned int pkt_len
;
1444 struct sk_buff
*skb
;
1446 pkt_len
= le32_to_cpu(rx_desc
->opts1
) & RX_LEN_MASK
;
1447 if (pkt_len
< ETH_ZLEN
)
1450 len_used
+= pkt_len
;
1451 if (urb
->actual_length
< len_used
)
1454 stats
= rtl8152_get_stats(netdev
);
1456 pkt_len
-= CRC_SIZE
;
1457 rx_data
+= sizeof(struct rx_desc
);
1459 skb
= netdev_alloc_skb_ip_align(netdev
, pkt_len
);
1461 stats
->rx_dropped
++;
1464 memcpy(skb
->data
, rx_data
, pkt_len
);
1465 skb_put(skb
, pkt_len
);
1466 skb
->protocol
= eth_type_trans(skb
, netdev
);
1467 netif_receive_skb(skb
);
1468 stats
->rx_packets
++;
1469 stats
->rx_bytes
+= pkt_len
;
1471 rx_data
= rx_agg_align(rx_data
+ pkt_len
+ CRC_SIZE
);
1472 rx_desc
= (struct rx_desc
*)rx_data
;
1473 len_used
= (int)(rx_data
- (u8
*)agg
->head
);
1474 len_used
+= sizeof(struct rx_desc
);
1478 ret
= r8152_submit_rx(tp
, agg
, GFP_ATOMIC
);
1479 if (ret
&& ret
!= -ENODEV
) {
1480 spin_lock_irqsave(&tp
->rx_lock
, flags
);
1481 list_add_tail(&agg
->list
, &tp
->rx_done
);
1482 spin_unlock_irqrestore(&tp
->rx_lock
, flags
);
1483 tasklet_schedule(&tp
->tl
);
1488 static void tx_bottom(struct r8152
*tp
)
1495 if (skb_queue_empty(&tp
->tx_queue
))
1498 agg
= r8152_get_tx_agg(tp
);
1502 res
= r8152_tx_agg_fill(tp
, agg
);
1504 struct net_device_stats
*stats
;
1505 struct net_device
*netdev
;
1506 unsigned long flags
;
1508 netdev
= tp
->netdev
;
1509 stats
= rtl8152_get_stats(netdev
);
1511 if (res
== -ENODEV
) {
1512 netif_device_detach(netdev
);
1514 netif_warn(tp
, tx_err
, netdev
,
1515 "failed tx_urb %d\n", res
);
1516 stats
->tx_dropped
+= agg
->skb_num
;
1517 spin_lock_irqsave(&tp
->tx_lock
, flags
);
1518 list_add_tail(&agg
->list
, &tp
->tx_free
);
1519 spin_unlock_irqrestore(&tp
->tx_lock
, flags
);
1525 static void bottom_half(unsigned long data
)
1529 tp
= (struct r8152
*)data
;
1531 if (test_bit(RTL8152_UNPLUG
, &tp
->flags
))
1534 if (!test_bit(WORK_ENABLE
, &tp
->flags
))
1537 /* When link down, the driver would cancel all bulks. */
1538 /* This avoid the re-submitting bulk */
1539 if (!netif_carrier_ok(tp
->netdev
))
1546 int r8152_submit_rx(struct r8152
*tp
, struct rx_agg
*agg
, gfp_t mem_flags
)
1548 usb_fill_bulk_urb(agg
->urb
, tp
->udev
, usb_rcvbulkpipe(tp
->udev
, 1),
1549 agg
->head
, rx_buf_sz
,
1550 (usb_complete_t
)read_bulk_callback
, agg
);
1552 return usb_submit_urb(agg
->urb
, mem_flags
);
1555 static void rtl_drop_queued_tx(struct r8152
*tp
)
1557 struct net_device_stats
*stats
= &tp
->netdev
->stats
;
1558 struct sk_buff_head skb_head
, *tx_queue
= &tp
->tx_queue
;
1559 unsigned long flags
;
1560 struct sk_buff
*skb
;
1562 if (skb_queue_empty(tx_queue
))
1565 __skb_queue_head_init(&skb_head
);
1566 spin_lock_irqsave(&tx_queue
->lock
, flags
);
1567 skb_queue_splice_init(tx_queue
, &skb_head
);
1568 spin_unlock_irqrestore(&tx_queue
->lock
, flags
);
1570 while ((skb
= __skb_dequeue(&skb_head
))) {
1572 stats
->tx_dropped
++;
1576 static void rtl8152_tx_timeout(struct net_device
*netdev
)
1578 struct r8152
*tp
= netdev_priv(netdev
);
1581 netif_warn(tp
, tx_err
, netdev
, "Tx timeout\n");
1582 for (i
= 0; i
< RTL8152_MAX_TX
; i
++)
1583 usb_unlink_urb(tp
->tx_info
[i
].urb
);
1586 static void rtl8152_set_rx_mode(struct net_device
*netdev
)
1588 struct r8152
*tp
= netdev_priv(netdev
);
1590 if (tp
->speed
& LINK_STATUS
) {
1591 set_bit(RTL8152_SET_RX_MODE
, &tp
->flags
);
1592 schedule_delayed_work(&tp
->schedule
, 0);
1596 static void _rtl8152_set_rx_mode(struct net_device
*netdev
)
1598 struct r8152
*tp
= netdev_priv(netdev
);
1599 u32 mc_filter
[2]; /* Multicast hash filter */
1603 clear_bit(RTL8152_SET_RX_MODE
, &tp
->flags
);
1604 netif_stop_queue(netdev
);
1605 ocp_data
= ocp_read_dword(tp
, MCU_TYPE_PLA
, PLA_RCR
);
1606 ocp_data
&= ~RCR_ACPT_ALL
;
1607 ocp_data
|= RCR_AB
| RCR_APM
;
1609 if (netdev
->flags
& IFF_PROMISC
) {
1610 /* Unconditionally log net taps. */
1611 netif_notice(tp
, link
, netdev
, "Promiscuous mode enabled\n");
1612 ocp_data
|= RCR_AM
| RCR_AAP
;
1613 mc_filter
[1] = mc_filter
[0] = 0xffffffff;
1614 } else if ((netdev_mc_count(netdev
) > multicast_filter_limit
) ||
1615 (netdev
->flags
& IFF_ALLMULTI
)) {
1616 /* Too many to filter perfectly -- accept all multicasts. */
1618 mc_filter
[1] = mc_filter
[0] = 0xffffffff;
1620 struct netdev_hw_addr
*ha
;
1622 mc_filter
[1] = mc_filter
[0] = 0;
1623 netdev_for_each_mc_addr(ha
, netdev
) {
1624 int bit_nr
= ether_crc(ETH_ALEN
, ha
->addr
) >> 26;
1625 mc_filter
[bit_nr
>> 5] |= 1 << (bit_nr
& 31);
1630 tmp
[0] = __cpu_to_le32(swab32(mc_filter
[1]));
1631 tmp
[1] = __cpu_to_le32(swab32(mc_filter
[0]));
1633 pla_ocp_write(tp
, PLA_MAR
, BYTE_EN_DWORD
, sizeof(tmp
), tmp
);
1634 ocp_write_dword(tp
, MCU_TYPE_PLA
, PLA_RCR
, ocp_data
);
1635 netif_wake_queue(netdev
);
1638 static netdev_tx_t
rtl8152_start_xmit(struct sk_buff
*skb
,
1639 struct net_device
*netdev
)
1641 struct r8152
*tp
= netdev_priv(netdev
);
1643 skb_tx_timestamp(skb
);
1645 skb_queue_tail(&tp
->tx_queue
, skb
);
1647 if (list_empty(&tp
->tx_free
) &&
1648 skb_queue_len(&tp
->tx_queue
) > tp
->tx_qlen
)
1649 netif_stop_queue(netdev
);
1651 if (!list_empty(&tp
->tx_free
))
1652 schedule_delayed_work(&tp
->schedule
, 0);
1654 return NETDEV_TX_OK
;
1657 static void r8152b_reset_packet_filter(struct r8152
*tp
)
1661 ocp_data
= ocp_read_word(tp
, MCU_TYPE_PLA
, PLA_FMC
);
1662 ocp_data
&= ~FMC_FCR_MCU_EN
;
1663 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_FMC
, ocp_data
);
1664 ocp_data
|= FMC_FCR_MCU_EN
;
1665 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_FMC
, ocp_data
);
1668 static void rtl8152_nic_reset(struct r8152
*tp
)
1672 ocp_write_byte(tp
, MCU_TYPE_PLA
, PLA_CR
, CR_RST
);
1674 for (i
= 0; i
< 1000; i
++) {
1675 if (!(ocp_read_byte(tp
, MCU_TYPE_PLA
, PLA_CR
) & CR_RST
))
1681 static void set_tx_qlen(struct r8152
*tp
)
1683 struct net_device
*netdev
= tp
->netdev
;
1685 tp
->tx_qlen
= rx_buf_sz
/ (netdev
->mtu
+ VLAN_ETH_HLEN
+ VLAN_HLEN
+
1686 sizeof(struct tx_desc
));
1689 static inline u8
rtl8152_get_speed(struct r8152
*tp
)
1691 return ocp_read_byte(tp
, MCU_TYPE_PLA
, PLA_PHYSTATUS
);
1694 static void rtl_set_eee_plus(struct r8152
*tp
)
1699 speed
= rtl8152_get_speed(tp
);
1700 if (speed
& _10bps
) {
1701 ocp_data
= ocp_read_word(tp
, MCU_TYPE_PLA
, PLA_EEEP_CR
);
1702 ocp_data
|= EEEP_CR_EEEP_TX
;
1703 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_EEEP_CR
, ocp_data
);
1705 ocp_data
= ocp_read_word(tp
, MCU_TYPE_PLA
, PLA_EEEP_CR
);
1706 ocp_data
&= ~EEEP_CR_EEEP_TX
;
1707 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_EEEP_CR
, ocp_data
);
1711 static void rxdy_gated_en(struct r8152
*tp
, bool enable
)
1715 ocp_data
= ocp_read_word(tp
, MCU_TYPE_PLA
, PLA_MISC_1
);
1717 ocp_data
|= RXDY_GATED_EN
;
1719 ocp_data
&= ~RXDY_GATED_EN
;
1720 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_MISC_1
, ocp_data
);
1723 static int rtl_enable(struct r8152
*tp
)
1728 r8152b_reset_packet_filter(tp
);
1730 ocp_data
= ocp_read_byte(tp
, MCU_TYPE_PLA
, PLA_CR
);
1731 ocp_data
|= CR_RE
| CR_TE
;
1732 ocp_write_byte(tp
, MCU_TYPE_PLA
, PLA_CR
, ocp_data
);
1734 rxdy_gated_en(tp
, false);
1736 INIT_LIST_HEAD(&tp
->rx_done
);
1738 for (i
= 0; i
< RTL8152_MAX_RX
; i
++) {
1739 INIT_LIST_HEAD(&tp
->rx_info
[i
].list
);
1740 ret
|= r8152_submit_rx(tp
, &tp
->rx_info
[i
], GFP_KERNEL
);
1746 static int rtl8152_enable(struct r8152
*tp
)
1749 rtl_set_eee_plus(tp
);
1751 return rtl_enable(tp
);
1754 static void r8153_set_rx_agg(struct r8152
*tp
)
1758 speed
= rtl8152_get_speed(tp
);
1759 if (speed
& _1000bps
) {
1760 if (tp
->udev
->speed
== USB_SPEED_SUPER
) {
1761 ocp_write_dword(tp
, MCU_TYPE_USB
, USB_RX_BUF_TH
,
1763 ocp_write_dword(tp
, MCU_TYPE_USB
, USB_RX_EARLY_AGG
,
1766 ocp_write_dword(tp
, MCU_TYPE_USB
, USB_RX_BUF_TH
,
1768 ocp_write_dword(tp
, MCU_TYPE_USB
, USB_RX_EARLY_AGG
,
1772 ocp_write_dword(tp
, MCU_TYPE_USB
, USB_RX_BUF_TH
, RX_THR_SLOW
);
1773 ocp_write_dword(tp
, MCU_TYPE_USB
, USB_RX_EARLY_AGG
,
1778 static int rtl8153_enable(struct r8152
*tp
)
1781 rtl_set_eee_plus(tp
);
1782 r8153_set_rx_agg(tp
);
1784 return rtl_enable(tp
);
1787 static void rtl8152_disable(struct r8152
*tp
)
1792 ocp_data
= ocp_read_dword(tp
, MCU_TYPE_PLA
, PLA_RCR
);
1793 ocp_data
&= ~RCR_ACPT_ALL
;
1794 ocp_write_dword(tp
, MCU_TYPE_PLA
, PLA_RCR
, ocp_data
);
1796 rtl_drop_queued_tx(tp
);
1798 for (i
= 0; i
< RTL8152_MAX_TX
; i
++)
1799 usb_kill_urb(tp
->tx_info
[i
].urb
);
1801 rxdy_gated_en(tp
, true);
1803 for (i
= 0; i
< 1000; i
++) {
1804 ocp_data
= ocp_read_byte(tp
, MCU_TYPE_PLA
, PLA_OOB_CTRL
);
1805 if ((ocp_data
& FIFO_EMPTY
) == FIFO_EMPTY
)
1810 for (i
= 0; i
< 1000; i
++) {
1811 if (ocp_read_word(tp
, MCU_TYPE_PLA
, PLA_TCR0
) & TCR0_TX_EMPTY
)
1816 for (i
= 0; i
< RTL8152_MAX_RX
; i
++)
1817 usb_kill_urb(tp
->rx_info
[i
].urb
);
1819 rtl8152_nic_reset(tp
);
1822 static void r8152_power_cut_en(struct r8152
*tp
, bool enable
)
1826 ocp_data
= ocp_read_word(tp
, MCU_TYPE_USB
, USB_UPS_CTRL
);
1828 ocp_data
|= POWER_CUT
;
1830 ocp_data
&= ~POWER_CUT
;
1831 ocp_write_word(tp
, MCU_TYPE_USB
, USB_UPS_CTRL
, ocp_data
);
1833 ocp_data
= ocp_read_word(tp
, MCU_TYPE_USB
, USB_PM_CTRL_STATUS
);
1834 ocp_data
&= ~RESUME_INDICATE
;
1835 ocp_write_word(tp
, MCU_TYPE_USB
, USB_PM_CTRL_STATUS
, ocp_data
);
1839 #define WAKE_ANY (WAKE_PHY | WAKE_MAGIC | WAKE_UCAST | WAKE_BCAST | WAKE_MCAST)
1841 static u32
__rtl_get_wol(struct r8152
*tp
)
1846 ocp_data
= ocp_read_byte(tp
, MCU_TYPE_PLA
, PLA_CONFIG5
);
1847 if (!(ocp_data
& LAN_WAKE_EN
))
1850 ocp_data
= ocp_read_word(tp
, MCU_TYPE_PLA
, PLA_CONFIG34
);
1851 if (ocp_data
& LINK_ON_WAKE_EN
)
1852 wolopts
|= WAKE_PHY
;
1854 ocp_data
= ocp_read_word(tp
, MCU_TYPE_PLA
, PLA_CONFIG5
);
1855 if (ocp_data
& UWF_EN
)
1856 wolopts
|= WAKE_UCAST
;
1857 if (ocp_data
& BWF_EN
)
1858 wolopts
|= WAKE_BCAST
;
1859 if (ocp_data
& MWF_EN
)
1860 wolopts
|= WAKE_MCAST
;
1862 ocp_data
= ocp_read_word(tp
, MCU_TYPE_PLA
, PLA_CFG_WOL
);
1863 if (ocp_data
& MAGIC_EN
)
1864 wolopts
|= WAKE_MAGIC
;
1869 static void __rtl_set_wol(struct r8152
*tp
, u32 wolopts
)
1873 ocp_write_byte(tp
, MCU_TYPE_PLA
, PLA_CRWECR
, CRWECR_CONFIG
);
1875 ocp_data
= ocp_read_word(tp
, MCU_TYPE_PLA
, PLA_CONFIG34
);
1876 ocp_data
&= ~LINK_ON_WAKE_EN
;
1877 if (wolopts
& WAKE_PHY
)
1878 ocp_data
|= LINK_ON_WAKE_EN
;
1879 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_CONFIG34
, ocp_data
);
1881 ocp_data
= ocp_read_word(tp
, MCU_TYPE_PLA
, PLA_CONFIG5
);
1882 ocp_data
&= ~(UWF_EN
| BWF_EN
| MWF_EN
| LAN_WAKE_EN
);
1883 if (wolopts
& WAKE_UCAST
)
1885 if (wolopts
& WAKE_BCAST
)
1887 if (wolopts
& WAKE_MCAST
)
1889 if (wolopts
& WAKE_ANY
)
1890 ocp_data
|= LAN_WAKE_EN
;
1891 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_CONFIG5
, ocp_data
);
1893 ocp_write_byte(tp
, MCU_TYPE_PLA
, PLA_CRWECR
, CRWECR_NORAML
);
1895 ocp_data
= ocp_read_word(tp
, MCU_TYPE_PLA
, PLA_CFG_WOL
);
1896 ocp_data
&= ~MAGIC_EN
;
1897 if (wolopts
& WAKE_MAGIC
)
1898 ocp_data
|= MAGIC_EN
;
1899 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_CFG_WOL
, ocp_data
);
1901 if (wolopts
& WAKE_ANY
)
1902 device_set_wakeup_enable(&tp
->udev
->dev
, true);
1904 device_set_wakeup_enable(&tp
->udev
->dev
, false);
1907 static void rtl_runtime_suspend_enable(struct r8152
*tp
, bool enable
)
1912 __rtl_set_wol(tp
, WAKE_ANY
);
1914 ocp_write_byte(tp
, MCU_TYPE_PLA
, PLA_CRWECR
, CRWECR_CONFIG
);
1916 ocp_data
= ocp_read_word(tp
, MCU_TYPE_PLA
, PLA_CONFIG34
);
1917 ocp_data
|= LINK_OFF_WAKE_EN
;
1918 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_CONFIG34
, ocp_data
);
1920 ocp_write_byte(tp
, MCU_TYPE_PLA
, PLA_CRWECR
, CRWECR_NORAML
);
1922 __rtl_set_wol(tp
, tp
->saved_wolopts
);
1926 static void rtl_phy_reset(struct r8152
*tp
)
1931 clear_bit(PHY_RESET
, &tp
->flags
);
1933 data
= r8152_mdio_read(tp
, MII_BMCR
);
1935 /* don't reset again before the previous one complete */
1936 if (data
& BMCR_RESET
)
1940 r8152_mdio_write(tp
, MII_BMCR
, data
);
1942 for (i
= 0; i
< 50; i
++) {
1944 if ((r8152_mdio_read(tp
, MII_BMCR
) & BMCR_RESET
) == 0)
1949 static void rtl_clear_bp(struct r8152
*tp
)
1951 ocp_write_dword(tp
, MCU_TYPE_PLA
, PLA_BP_0
, 0);
1952 ocp_write_dword(tp
, MCU_TYPE_PLA
, PLA_BP_2
, 0);
1953 ocp_write_dword(tp
, MCU_TYPE_PLA
, PLA_BP_4
, 0);
1954 ocp_write_dword(tp
, MCU_TYPE_PLA
, PLA_BP_6
, 0);
1955 ocp_write_dword(tp
, MCU_TYPE_USB
, USB_BP_0
, 0);
1956 ocp_write_dword(tp
, MCU_TYPE_USB
, USB_BP_2
, 0);
1957 ocp_write_dword(tp
, MCU_TYPE_USB
, USB_BP_4
, 0);
1958 ocp_write_dword(tp
, MCU_TYPE_USB
, USB_BP_6
, 0);
1960 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_BP_BA
, 0);
1961 ocp_write_word(tp
, MCU_TYPE_USB
, USB_BP_BA
, 0);
1964 static void r8153_clear_bp(struct r8152
*tp
)
1966 ocp_write_byte(tp
, MCU_TYPE_PLA
, PLA_BP_EN
, 0);
1967 ocp_write_byte(tp
, MCU_TYPE_USB
, USB_BP_EN
, 0);
1971 static void r8153_teredo_off(struct r8152
*tp
)
1975 ocp_data
= ocp_read_word(tp
, MCU_TYPE_PLA
, PLA_TEREDO_CFG
);
1976 ocp_data
&= ~(TEREDO_SEL
| TEREDO_RS_EVENT_MASK
| OOB_TEREDO_EN
);
1977 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_TEREDO_CFG
, ocp_data
);
1979 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_WDT6_CTRL
, WDT6_SET_MODE
);
1980 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_REALWOW_TIMER
, 0);
1981 ocp_write_dword(tp
, MCU_TYPE_PLA
, PLA_TEREDO_TIMER
, 0);
1984 static void r8152b_disable_aldps(struct r8152
*tp
)
1986 ocp_reg_write(tp
, OCP_ALDPS_CONFIG
, ENPDNPS
| LINKENA
| DIS_SDSAVE
);
1990 static inline void r8152b_enable_aldps(struct r8152
*tp
)
1992 ocp_reg_write(tp
, OCP_ALDPS_CONFIG
, ENPWRSAVE
| ENPDNPS
|
1993 LINKENA
| DIS_SDSAVE
);
1996 static void r8152b_hw_phy_cfg(struct r8152
*tp
)
2000 data
= r8152_mdio_read(tp
, MII_BMCR
);
2001 if (data
& BMCR_PDOWN
) {
2002 data
&= ~BMCR_PDOWN
;
2003 r8152_mdio_write(tp
, MII_BMCR
, data
);
2006 r8152b_disable_aldps(tp
);
2010 r8152b_enable_aldps(tp
);
2011 set_bit(PHY_RESET
, &tp
->flags
);
2014 static void r8152b_exit_oob(struct r8152
*tp
)
2019 ocp_data
= ocp_read_dword(tp
, MCU_TYPE_PLA
, PLA_RCR
);
2020 ocp_data
&= ~RCR_ACPT_ALL
;
2021 ocp_write_dword(tp
, MCU_TYPE_PLA
, PLA_RCR
, ocp_data
);
2023 rxdy_gated_en(tp
, true);
2024 r8153_teredo_off(tp
);
2025 r8152b_hw_phy_cfg(tp
);
2027 ocp_write_byte(tp
, MCU_TYPE_PLA
, PLA_CRWECR
, CRWECR_NORAML
);
2028 ocp_write_byte(tp
, MCU_TYPE_PLA
, PLA_CR
, 0x00);
2030 ocp_data
= ocp_read_byte(tp
, MCU_TYPE_PLA
, PLA_OOB_CTRL
);
2031 ocp_data
&= ~NOW_IS_OOB
;
2032 ocp_write_byte(tp
, MCU_TYPE_PLA
, PLA_OOB_CTRL
, ocp_data
);
2034 ocp_data
= ocp_read_word(tp
, MCU_TYPE_PLA
, PLA_SFF_STS_7
);
2035 ocp_data
&= ~MCU_BORW_EN
;
2036 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_SFF_STS_7
, ocp_data
);
2038 for (i
= 0; i
< 1000; i
++) {
2039 ocp_data
= ocp_read_byte(tp
, MCU_TYPE_PLA
, PLA_OOB_CTRL
);
2040 if (ocp_data
& LINK_LIST_READY
)
2045 ocp_data
= ocp_read_word(tp
, MCU_TYPE_PLA
, PLA_SFF_STS_7
);
2046 ocp_data
|= RE_INIT_LL
;
2047 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_SFF_STS_7
, ocp_data
);
2049 for (i
= 0; i
< 1000; i
++) {
2050 ocp_data
= ocp_read_byte(tp
, MCU_TYPE_PLA
, PLA_OOB_CTRL
);
2051 if (ocp_data
& LINK_LIST_READY
)
2056 rtl8152_nic_reset(tp
);
2058 /* rx share fifo credit full threshold */
2059 ocp_write_dword(tp
, MCU_TYPE_PLA
, PLA_RXFIFO_CTRL0
, RXFIFO_THR1_NORMAL
);
2061 ocp_data
= ocp_read_word(tp
, MCU_TYPE_USB
, USB_DEV_STAT
);
2062 ocp_data
&= STAT_SPEED_MASK
;
2063 if (ocp_data
== STAT_SPEED_FULL
) {
2064 /* rx share fifo credit near full threshold */
2065 ocp_write_dword(tp
, MCU_TYPE_PLA
, PLA_RXFIFO_CTRL1
,
2067 ocp_write_dword(tp
, MCU_TYPE_PLA
, PLA_RXFIFO_CTRL2
,
2070 /* rx share fifo credit near full threshold */
2071 ocp_write_dword(tp
, MCU_TYPE_PLA
, PLA_RXFIFO_CTRL1
,
2073 ocp_write_dword(tp
, MCU_TYPE_PLA
, PLA_RXFIFO_CTRL2
,
2077 /* TX share fifo free credit full threshold */
2078 ocp_write_dword(tp
, MCU_TYPE_PLA
, PLA_TXFIFO_CTRL
, TXFIFO_THR_NORMAL
);
2080 ocp_write_byte(tp
, MCU_TYPE_USB
, USB_TX_AGG
, TX_AGG_MAX_THRESHOLD
);
2081 ocp_write_dword(tp
, MCU_TYPE_USB
, USB_RX_BUF_TH
, RX_THR_HIGH
);
2082 ocp_write_dword(tp
, MCU_TYPE_USB
, USB_TX_DMA
,
2083 TEST_MODE_DISABLE
| TX_SIZE_ADJUST1
);
2085 ocp_data
= ocp_read_word(tp
, MCU_TYPE_PLA
, PLA_CPCR
);
2086 ocp_data
&= ~CPCR_RX_VLAN
;
2087 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_CPCR
, ocp_data
);
2089 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_RMS
, RTL8152_RMS
);
2091 ocp_data
= ocp_read_word(tp
, MCU_TYPE_PLA
, PLA_TCR0
);
2092 ocp_data
|= TCR0_AUTO_FIFO
;
2093 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_TCR0
, ocp_data
);
2096 static void r8152b_enter_oob(struct r8152
*tp
)
2101 ocp_data
= ocp_read_byte(tp
, MCU_TYPE_PLA
, PLA_OOB_CTRL
);
2102 ocp_data
&= ~NOW_IS_OOB
;
2103 ocp_write_byte(tp
, MCU_TYPE_PLA
, PLA_OOB_CTRL
, ocp_data
);
2105 ocp_write_dword(tp
, MCU_TYPE_PLA
, PLA_RXFIFO_CTRL0
, RXFIFO_THR1_OOB
);
2106 ocp_write_dword(tp
, MCU_TYPE_PLA
, PLA_RXFIFO_CTRL1
, RXFIFO_THR2_OOB
);
2107 ocp_write_dword(tp
, MCU_TYPE_PLA
, PLA_RXFIFO_CTRL2
, RXFIFO_THR3_OOB
);
2109 rtl8152_disable(tp
);
2111 for (i
= 0; i
< 1000; i
++) {
2112 ocp_data
= ocp_read_byte(tp
, MCU_TYPE_PLA
, PLA_OOB_CTRL
);
2113 if (ocp_data
& LINK_LIST_READY
)
2118 ocp_data
= ocp_read_word(tp
, MCU_TYPE_PLA
, PLA_SFF_STS_7
);
2119 ocp_data
|= RE_INIT_LL
;
2120 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_SFF_STS_7
, ocp_data
);
2122 for (i
= 0; i
< 1000; i
++) {
2123 ocp_data
= ocp_read_byte(tp
, MCU_TYPE_PLA
, PLA_OOB_CTRL
);
2124 if (ocp_data
& LINK_LIST_READY
)
2129 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_RMS
, RTL8152_RMS
);
2131 ocp_data
= ocp_read_word(tp
, MCU_TYPE_PLA
, PLA_CPCR
);
2132 ocp_data
|= CPCR_RX_VLAN
;
2133 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_CPCR
, ocp_data
);
2135 ocp_data
= ocp_read_word(tp
, MCU_TYPE_PLA
, PAL_BDC_CR
);
2136 ocp_data
|= ALDPS_PROXY_MODE
;
2137 ocp_write_word(tp
, MCU_TYPE_PLA
, PAL_BDC_CR
, ocp_data
);
2139 ocp_data
= ocp_read_byte(tp
, MCU_TYPE_PLA
, PLA_OOB_CTRL
);
2140 ocp_data
|= NOW_IS_OOB
| DIS_MCU_CLROOB
;
2141 ocp_write_byte(tp
, MCU_TYPE_PLA
, PLA_OOB_CTRL
, ocp_data
);
2143 rxdy_gated_en(tp
, false);
2145 ocp_data
= ocp_read_dword(tp
, MCU_TYPE_PLA
, PLA_RCR
);
2146 ocp_data
|= RCR_APM
| RCR_AM
| RCR_AB
;
2147 ocp_write_dword(tp
, MCU_TYPE_PLA
, PLA_RCR
, ocp_data
);
2150 static void r8153_hw_phy_cfg(struct r8152
*tp
)
2155 ocp_reg_write(tp
, OCP_ADC_CFG
, CKADSEL_L
| ADC_EN
| EN_EMI_L
);
2156 data
= r8152_mdio_read(tp
, MII_BMCR
);
2157 if (data
& BMCR_PDOWN
) {
2158 data
&= ~BMCR_PDOWN
;
2159 r8152_mdio_write(tp
, MII_BMCR
, data
);
2164 if (tp
->version
== RTL_VER_03
) {
2165 data
= ocp_reg_read(tp
, OCP_EEE_CFG
);
2166 data
&= ~CTAP_SHORT_EN
;
2167 ocp_reg_write(tp
, OCP_EEE_CFG
, data
);
2170 data
= ocp_reg_read(tp
, OCP_POWER_CFG
);
2171 data
|= EEE_CLKDIV_EN
;
2172 ocp_reg_write(tp
, OCP_POWER_CFG
, data
);
2174 data
= ocp_reg_read(tp
, OCP_DOWN_SPEED
);
2175 data
|= EN_10M_BGOFF
;
2176 ocp_reg_write(tp
, OCP_DOWN_SPEED
, data
);
2177 data
= ocp_reg_read(tp
, OCP_POWER_CFG
);
2178 data
|= EN_10M_PLLOFF
;
2179 ocp_reg_write(tp
, OCP_POWER_CFG
, data
);
2180 data
= sram_read(tp
, SRAM_IMPEDANCE
);
2181 data
&= ~RX_DRIVING_MASK
;
2182 sram_write(tp
, SRAM_IMPEDANCE
, data
);
2184 ocp_data
= ocp_read_word(tp
, MCU_TYPE_PLA
, PLA_PHY_PWR
);
2185 ocp_data
|= PFM_PWM_SWITCH
;
2186 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_PHY_PWR
, ocp_data
);
2188 data
= sram_read(tp
, SRAM_LPF_CFG
);
2189 data
|= LPF_AUTO_TUNE
;
2190 sram_write(tp
, SRAM_LPF_CFG
, data
);
2192 data
= sram_read(tp
, SRAM_10M_AMP1
);
2193 data
|= GDAC_IB_UPALL
;
2194 sram_write(tp
, SRAM_10M_AMP1
, data
);
2195 data
= sram_read(tp
, SRAM_10M_AMP2
);
2197 sram_write(tp
, SRAM_10M_AMP2
, data
);
2199 set_bit(PHY_RESET
, &tp
->flags
);
2202 static void r8153_u1u2en(struct r8152
*tp
, bool enable
)
2207 memset(u1u2
, 0xff, sizeof(u1u2
));
2209 memset(u1u2
, 0x00, sizeof(u1u2
));
2211 usb_ocp_write(tp
, USB_TOLERANCE
, BYTE_EN_SIX_BYTES
, sizeof(u1u2
), u1u2
);
2214 static void r8153_u2p3en(struct r8152
*tp
, bool enable
)
2218 ocp_data
= ocp_read_word(tp
, MCU_TYPE_USB
, USB_U2P3_CTRL
);
2220 ocp_data
|= U2P3_ENABLE
;
2222 ocp_data
&= ~U2P3_ENABLE
;
2223 ocp_write_word(tp
, MCU_TYPE_USB
, USB_U2P3_CTRL
, ocp_data
);
2226 static void r8153_power_cut_en(struct r8152
*tp
, bool enable
)
2230 ocp_data
= ocp_read_word(tp
, MCU_TYPE_USB
, USB_POWER_CUT
);
2232 ocp_data
|= PWR_EN
| PHASE2_EN
;
2234 ocp_data
&= ~(PWR_EN
| PHASE2_EN
);
2235 ocp_write_word(tp
, MCU_TYPE_USB
, USB_POWER_CUT
, ocp_data
);
2237 ocp_data
= ocp_read_word(tp
, MCU_TYPE_USB
, USB_MISC_0
);
2238 ocp_data
&= ~PCUT_STATUS
;
2239 ocp_write_word(tp
, MCU_TYPE_USB
, USB_MISC_0
, ocp_data
);
2242 static void r8153_first_init(struct r8152
*tp
)
2247 rxdy_gated_en(tp
, true);
2248 r8153_teredo_off(tp
);
2250 ocp_data
= ocp_read_dword(tp
, MCU_TYPE_PLA
, PLA_RCR
);
2251 ocp_data
&= ~RCR_ACPT_ALL
;
2252 ocp_write_dword(tp
, MCU_TYPE_PLA
, PLA_RCR
, ocp_data
);
2254 r8153_hw_phy_cfg(tp
);
2256 rtl8152_nic_reset(tp
);
2258 ocp_data
= ocp_read_byte(tp
, MCU_TYPE_PLA
, PLA_OOB_CTRL
);
2259 ocp_data
&= ~NOW_IS_OOB
;
2260 ocp_write_byte(tp
, MCU_TYPE_PLA
, PLA_OOB_CTRL
, ocp_data
);
2262 ocp_data
= ocp_read_word(tp
, MCU_TYPE_PLA
, PLA_SFF_STS_7
);
2263 ocp_data
&= ~MCU_BORW_EN
;
2264 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_SFF_STS_7
, ocp_data
);
2266 for (i
= 0; i
< 1000; i
++) {
2267 ocp_data
= ocp_read_byte(tp
, MCU_TYPE_PLA
, PLA_OOB_CTRL
);
2268 if (ocp_data
& LINK_LIST_READY
)
2273 ocp_data
= ocp_read_word(tp
, MCU_TYPE_PLA
, PLA_SFF_STS_7
);
2274 ocp_data
|= RE_INIT_LL
;
2275 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_SFF_STS_7
, ocp_data
);
2277 for (i
= 0; i
< 1000; i
++) {
2278 ocp_data
= ocp_read_byte(tp
, MCU_TYPE_PLA
, PLA_OOB_CTRL
);
2279 if (ocp_data
& LINK_LIST_READY
)
2284 ocp_data
= ocp_read_word(tp
, MCU_TYPE_PLA
, PLA_CPCR
);
2285 ocp_data
&= ~CPCR_RX_VLAN
;
2286 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_CPCR
, ocp_data
);
2288 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_RMS
, RTL8152_RMS
);
2290 ocp_data
= ocp_read_word(tp
, MCU_TYPE_PLA
, PLA_TCR0
);
2291 ocp_data
|= TCR0_AUTO_FIFO
;
2292 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_TCR0
, ocp_data
);
2294 rtl8152_nic_reset(tp
);
2296 /* rx share fifo credit full threshold */
2297 ocp_write_dword(tp
, MCU_TYPE_PLA
, PLA_RXFIFO_CTRL0
, RXFIFO_THR1_NORMAL
);
2298 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_RXFIFO_CTRL1
, RXFIFO_THR2_NORMAL
);
2299 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_RXFIFO_CTRL2
, RXFIFO_THR3_NORMAL
);
2300 /* TX share fifo free credit full threshold */
2301 ocp_write_dword(tp
, MCU_TYPE_PLA
, PLA_TXFIFO_CTRL
, TXFIFO_THR_NORMAL2
);
2303 /* rx aggregation */
2304 ocp_data
= ocp_read_word(tp
, MCU_TYPE_USB
, USB_USB_CTRL
);
2305 ocp_data
&= ~RX_AGG_DISABLE
;
2306 ocp_write_word(tp
, MCU_TYPE_USB
, USB_USB_CTRL
, ocp_data
);
2309 static void r8153_enter_oob(struct r8152
*tp
)
2314 ocp_data
= ocp_read_byte(tp
, MCU_TYPE_PLA
, PLA_OOB_CTRL
);
2315 ocp_data
&= ~NOW_IS_OOB
;
2316 ocp_write_byte(tp
, MCU_TYPE_PLA
, PLA_OOB_CTRL
, ocp_data
);
2318 rtl8152_disable(tp
);
2320 for (i
= 0; i
< 1000; i
++) {
2321 ocp_data
= ocp_read_byte(tp
, MCU_TYPE_PLA
, PLA_OOB_CTRL
);
2322 if (ocp_data
& LINK_LIST_READY
)
2327 ocp_data
= ocp_read_word(tp
, MCU_TYPE_PLA
, PLA_SFF_STS_7
);
2328 ocp_data
|= RE_INIT_LL
;
2329 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_SFF_STS_7
, ocp_data
);
2331 for (i
= 0; i
< 1000; i
++) {
2332 ocp_data
= ocp_read_byte(tp
, MCU_TYPE_PLA
, PLA_OOB_CTRL
);
2333 if (ocp_data
& LINK_LIST_READY
)
2338 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_RMS
, RTL8152_RMS
);
2340 ocp_data
= ocp_read_word(tp
, MCU_TYPE_PLA
, PLA_TEREDO_CFG
);
2341 ocp_data
&= ~TEREDO_WAKE_MASK
;
2342 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_TEREDO_CFG
, ocp_data
);
2344 ocp_data
= ocp_read_word(tp
, MCU_TYPE_PLA
, PLA_CPCR
);
2345 ocp_data
|= CPCR_RX_VLAN
;
2346 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_CPCR
, ocp_data
);
2348 ocp_data
= ocp_read_word(tp
, MCU_TYPE_PLA
, PAL_BDC_CR
);
2349 ocp_data
|= ALDPS_PROXY_MODE
;
2350 ocp_write_word(tp
, MCU_TYPE_PLA
, PAL_BDC_CR
, ocp_data
);
2352 ocp_data
= ocp_read_byte(tp
, MCU_TYPE_PLA
, PLA_OOB_CTRL
);
2353 ocp_data
|= NOW_IS_OOB
| DIS_MCU_CLROOB
;
2354 ocp_write_byte(tp
, MCU_TYPE_PLA
, PLA_OOB_CTRL
, ocp_data
);
2356 rxdy_gated_en(tp
, false);
2358 ocp_data
= ocp_read_dword(tp
, MCU_TYPE_PLA
, PLA_RCR
);
2359 ocp_data
|= RCR_APM
| RCR_AM
| RCR_AB
;
2360 ocp_write_dword(tp
, MCU_TYPE_PLA
, PLA_RCR
, ocp_data
);
2363 static void r8153_disable_aldps(struct r8152
*tp
)
2367 data
= ocp_reg_read(tp
, OCP_POWER_CFG
);
2369 ocp_reg_write(tp
, OCP_POWER_CFG
, data
);
2373 static void r8153_enable_aldps(struct r8152
*tp
)
2377 data
= ocp_reg_read(tp
, OCP_POWER_CFG
);
2379 ocp_reg_write(tp
, OCP_POWER_CFG
, data
);
2382 static int rtl8152_set_speed(struct r8152
*tp
, u8 autoneg
, u16 speed
, u8 duplex
)
2384 u16 bmcr
, anar
, gbcr
;
2387 cancel_delayed_work_sync(&tp
->schedule
);
2388 anar
= r8152_mdio_read(tp
, MII_ADVERTISE
);
2389 anar
&= ~(ADVERTISE_10HALF
| ADVERTISE_10FULL
|
2390 ADVERTISE_100HALF
| ADVERTISE_100FULL
);
2391 if (tp
->mii
.supports_gmii
) {
2392 gbcr
= r8152_mdio_read(tp
, MII_CTRL1000
);
2393 gbcr
&= ~(ADVERTISE_1000FULL
| ADVERTISE_1000HALF
);
2398 if (autoneg
== AUTONEG_DISABLE
) {
2399 if (speed
== SPEED_10
) {
2401 anar
|= ADVERTISE_10HALF
| ADVERTISE_10FULL
;
2402 } else if (speed
== SPEED_100
) {
2403 bmcr
= BMCR_SPEED100
;
2404 anar
|= ADVERTISE_100HALF
| ADVERTISE_100FULL
;
2405 } else if (speed
== SPEED_1000
&& tp
->mii
.supports_gmii
) {
2406 bmcr
= BMCR_SPEED1000
;
2407 gbcr
|= ADVERTISE_1000FULL
| ADVERTISE_1000HALF
;
2413 if (duplex
== DUPLEX_FULL
)
2414 bmcr
|= BMCR_FULLDPLX
;
2416 if (speed
== SPEED_10
) {
2417 if (duplex
== DUPLEX_FULL
)
2418 anar
|= ADVERTISE_10HALF
| ADVERTISE_10FULL
;
2420 anar
|= ADVERTISE_10HALF
;
2421 } else if (speed
== SPEED_100
) {
2422 if (duplex
== DUPLEX_FULL
) {
2423 anar
|= ADVERTISE_10HALF
| ADVERTISE_10FULL
;
2424 anar
|= ADVERTISE_100HALF
| ADVERTISE_100FULL
;
2426 anar
|= ADVERTISE_10HALF
;
2427 anar
|= ADVERTISE_100HALF
;
2429 } else if (speed
== SPEED_1000
&& tp
->mii
.supports_gmii
) {
2430 if (duplex
== DUPLEX_FULL
) {
2431 anar
|= ADVERTISE_10HALF
| ADVERTISE_10FULL
;
2432 anar
|= ADVERTISE_100HALF
| ADVERTISE_100FULL
;
2433 gbcr
|= ADVERTISE_1000FULL
| ADVERTISE_1000HALF
;
2435 anar
|= ADVERTISE_10HALF
;
2436 anar
|= ADVERTISE_100HALF
;
2437 gbcr
|= ADVERTISE_1000HALF
;
2444 bmcr
= BMCR_ANENABLE
| BMCR_ANRESTART
;
2447 if (test_bit(PHY_RESET
, &tp
->flags
))
2450 if (tp
->mii
.supports_gmii
)
2451 r8152_mdio_write(tp
, MII_CTRL1000
, gbcr
);
2453 r8152_mdio_write(tp
, MII_ADVERTISE
, anar
);
2454 r8152_mdio_write(tp
, MII_BMCR
, bmcr
);
2456 if (test_bit(PHY_RESET
, &tp
->flags
)) {
2459 clear_bit(PHY_RESET
, &tp
->flags
);
2460 for (i
= 0; i
< 50; i
++) {
2462 if ((r8152_mdio_read(tp
, MII_BMCR
) & BMCR_RESET
) == 0)
2472 static void rtl8152_down(struct r8152
*tp
)
2474 r8152_power_cut_en(tp
, false);
2475 r8152b_disable_aldps(tp
);
2476 r8152b_enter_oob(tp
);
2477 r8152b_enable_aldps(tp
);
2480 static void rtl8153_down(struct r8152
*tp
)
2482 r8153_u1u2en(tp
, false);
2483 r8153_power_cut_en(tp
, false);
2484 r8153_disable_aldps(tp
);
2485 r8153_enter_oob(tp
);
2486 r8153_enable_aldps(tp
);
2489 static void set_carrier(struct r8152
*tp
)
2491 struct net_device
*netdev
= tp
->netdev
;
2494 clear_bit(RTL8152_LINK_CHG
, &tp
->flags
);
2495 speed
= rtl8152_get_speed(tp
);
2497 if (speed
& LINK_STATUS
) {
2498 if (!(tp
->speed
& LINK_STATUS
)) {
2499 tp
->rtl_ops
.enable(tp
);
2500 set_bit(RTL8152_SET_RX_MODE
, &tp
->flags
);
2501 netif_carrier_on(netdev
);
2504 if (tp
->speed
& LINK_STATUS
) {
2505 netif_carrier_off(netdev
);
2506 tasklet_disable(&tp
->tl
);
2507 tp
->rtl_ops
.disable(tp
);
2508 tasklet_enable(&tp
->tl
);
2514 static void rtl_work_func_t(struct work_struct
*work
)
2516 struct r8152
*tp
= container_of(work
, struct r8152
, schedule
.work
);
2518 if (usb_autopm_get_interface(tp
->intf
) < 0)
2521 if (!test_bit(WORK_ENABLE
, &tp
->flags
))
2524 if (test_bit(RTL8152_UNPLUG
, &tp
->flags
))
2527 if (test_bit(RTL8152_LINK_CHG
, &tp
->flags
))
2530 if (test_bit(RTL8152_SET_RX_MODE
, &tp
->flags
))
2531 _rtl8152_set_rx_mode(tp
->netdev
);
2533 if (tp
->speed
& LINK_STATUS
)
2536 if (test_bit(PHY_RESET
, &tp
->flags
))
2540 usb_autopm_put_interface(tp
->intf
);
2543 static int rtl8152_open(struct net_device
*netdev
)
2545 struct r8152
*tp
= netdev_priv(netdev
);
2548 res
= alloc_all_mem(tp
);
2552 res
= usb_autopm_get_interface(tp
->intf
);
2558 /* The WORK_ENABLE may be set when autoresume occurs */
2559 if (test_bit(WORK_ENABLE
, &tp
->flags
)) {
2560 clear_bit(WORK_ENABLE
, &tp
->flags
);
2561 usb_kill_urb(tp
->intr_urb
);
2562 cancel_delayed_work_sync(&tp
->schedule
);
2563 if (tp
->speed
& LINK_STATUS
)
2564 tp
->rtl_ops
.disable(tp
);
2569 rtl8152_set_speed(tp
, AUTONEG_ENABLE
,
2570 tp
->mii
.supports_gmii
? SPEED_1000
: SPEED_100
,
2573 netif_carrier_off(netdev
);
2574 netif_start_queue(netdev
);
2575 set_bit(WORK_ENABLE
, &tp
->flags
);
2576 res
= usb_submit_urb(tp
->intr_urb
, GFP_KERNEL
);
2579 netif_device_detach(tp
->netdev
);
2580 netif_warn(tp
, ifup
, netdev
, "intr_urb submit failed: %d\n",
2585 usb_autopm_put_interface(tp
->intf
);
2591 static int rtl8152_close(struct net_device
*netdev
)
2593 struct r8152
*tp
= netdev_priv(netdev
);
2596 clear_bit(WORK_ENABLE
, &tp
->flags
);
2597 usb_kill_urb(tp
->intr_urb
);
2598 cancel_delayed_work_sync(&tp
->schedule
);
2599 netif_stop_queue(netdev
);
2601 res
= usb_autopm_get_interface(tp
->intf
);
2603 rtl_drop_queued_tx(tp
);
2606 * The autosuspend may have been enabled and wouldn't
2607 * be disable when autoresume occurs, because the
2608 * netif_running() would be false.
2610 if (test_bit(SELECTIVE_SUSPEND
, &tp
->flags
)) {
2611 rtl_runtime_suspend_enable(tp
, false);
2612 clear_bit(SELECTIVE_SUSPEND
, &tp
->flags
);
2615 tasklet_disable(&tp
->tl
);
2616 tp
->rtl_ops
.down(tp
);
2617 tasklet_enable(&tp
->tl
);
2618 usb_autopm_put_interface(tp
->intf
);
2626 static void r8152b_enable_eee(struct r8152
*tp
)
2630 ocp_data
= ocp_read_word(tp
, MCU_TYPE_PLA
, PLA_EEE_CR
);
2631 ocp_data
|= EEE_RX_EN
| EEE_TX_EN
;
2632 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_EEE_CR
, ocp_data
);
2633 ocp_reg_write(tp
, OCP_EEE_CONFIG1
, RG_TXLPI_MSK_HFDUP
| RG_MATCLR_EN
|
2634 EEE_10_CAP
| EEE_NWAY_EN
|
2635 TX_QUIET_EN
| RX_QUIET_EN
|
2636 SDRISETIME
| RG_RXLPI_MSK_HFDUP
|
2638 ocp_reg_write(tp
, OCP_EEE_CONFIG2
, RG_LPIHYS_NUM
| RG_DACQUIET_EN
|
2639 RG_LDVQUIET_EN
| RG_CKRSEL
|
2641 ocp_reg_write(tp
, OCP_EEE_CONFIG3
, FST_SNR_EYE_R
| RG_LFS_SEL
| MSK_PH
);
2642 ocp_reg_write(tp
, OCP_EEE_AR
, FUN_ADDR
| DEVICE_ADDR
);
2643 ocp_reg_write(tp
, OCP_EEE_DATA
, EEE_ADDR
);
2644 ocp_reg_write(tp
, OCP_EEE_AR
, FUN_DATA
| DEVICE_ADDR
);
2645 ocp_reg_write(tp
, OCP_EEE_DATA
, EEE_DATA
);
2646 ocp_reg_write(tp
, OCP_EEE_AR
, 0x0000);
2649 static void r8153_enable_eee(struct r8152
*tp
)
2654 ocp_data
= ocp_read_word(tp
, MCU_TYPE_PLA
, PLA_EEE_CR
);
2655 ocp_data
|= EEE_RX_EN
| EEE_TX_EN
;
2656 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_EEE_CR
, ocp_data
);
2657 data
= ocp_reg_read(tp
, OCP_EEE_CFG
);
2659 ocp_reg_write(tp
, OCP_EEE_CFG
, data
);
2660 data
= ocp_reg_read(tp
, OCP_EEE_CFG2
);
2661 data
|= MY1000_EEE
| MY100_EEE
;
2662 ocp_reg_write(tp
, OCP_EEE_CFG2
, data
);
2665 static void r8152b_enable_fc(struct r8152
*tp
)
2669 anar
= r8152_mdio_read(tp
, MII_ADVERTISE
);
2670 anar
|= ADVERTISE_PAUSE_CAP
| ADVERTISE_PAUSE_ASYM
;
2671 r8152_mdio_write(tp
, MII_ADVERTISE
, anar
);
2674 static void r8152b_init(struct r8152
*tp
)
2678 if (tp
->version
== RTL_VER_01
) {
2679 ocp_data
= ocp_read_word(tp
, MCU_TYPE_PLA
, PLA_LED_FEATURE
);
2680 ocp_data
&= ~LED_MODE_MASK
;
2681 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_LED_FEATURE
, ocp_data
);
2684 r8152_power_cut_en(tp
, false);
2686 ocp_data
= ocp_read_word(tp
, MCU_TYPE_PLA
, PLA_PHY_PWR
);
2687 ocp_data
|= TX_10M_IDLE_EN
| PFM_PWM_SWITCH
;
2688 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_PHY_PWR
, ocp_data
);
2689 ocp_data
= ocp_read_dword(tp
, MCU_TYPE_PLA
, PLA_MAC_PWR_CTRL
);
2690 ocp_data
&= ~MCU_CLK_RATIO_MASK
;
2691 ocp_data
|= MCU_CLK_RATIO
| D3_CLK_GATED_EN
;
2692 ocp_write_dword(tp
, MCU_TYPE_PLA
, PLA_MAC_PWR_CTRL
, ocp_data
);
2693 ocp_data
= GPHY_STS_MSK
| SPEED_DOWN_MSK
|
2694 SPDWN_RXDV_MSK
| SPDWN_LINKCHG_MSK
;
2695 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_GPHY_INTR_IMR
, ocp_data
);
2697 r8152b_enable_eee(tp
);
2698 r8152b_enable_aldps(tp
);
2699 r8152b_enable_fc(tp
);
2701 /* enable rx aggregation */
2702 ocp_data
= ocp_read_word(tp
, MCU_TYPE_USB
, USB_USB_CTRL
);
2703 ocp_data
&= ~RX_AGG_DISABLE
;
2704 ocp_write_word(tp
, MCU_TYPE_USB
, USB_USB_CTRL
, ocp_data
);
2707 static void r8153_init(struct r8152
*tp
)
2712 r8153_u1u2en(tp
, false);
2714 for (i
= 0; i
< 500; i
++) {
2715 if (ocp_read_word(tp
, MCU_TYPE_PLA
, PLA_BOOT_CTRL
) &
2721 for (i
= 0; i
< 500; i
++) {
2722 ocp_data
= ocp_reg_read(tp
, OCP_PHY_STATUS
) & PHY_STAT_MASK
;
2723 if (ocp_data
== PHY_STAT_LAN_ON
|| ocp_data
== PHY_STAT_PWRDN
)
2728 r8153_u2p3en(tp
, false);
2730 ocp_data
= ocp_read_word(tp
, MCU_TYPE_USB
, USB_WDT11_CTRL
);
2731 ocp_data
&= ~TIMER11_EN
;
2732 ocp_write_word(tp
, MCU_TYPE_USB
, USB_WDT11_CTRL
, ocp_data
);
2734 ocp_data
= ocp_read_word(tp
, MCU_TYPE_PLA
, PLA_LED_FEATURE
);
2735 ocp_data
&= ~LED_MODE_MASK
;
2736 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_LED_FEATURE
, ocp_data
);
2738 ocp_data
= ocp_read_byte(tp
, MCU_TYPE_USB
, USB_LPM_CTRL
);
2739 ocp_data
&= ~LPM_TIMER_MASK
;
2740 if (tp
->udev
->speed
== USB_SPEED_SUPER
)
2741 ocp_data
|= LPM_TIMER_500US
;
2743 ocp_data
|= LPM_TIMER_500MS
;
2744 ocp_write_byte(tp
, MCU_TYPE_USB
, USB_LPM_CTRL
, ocp_data
);
2746 ocp_data
= ocp_read_word(tp
, MCU_TYPE_USB
, USB_AFE_CTRL2
);
2747 ocp_data
&= ~SEN_VAL_MASK
;
2748 ocp_data
|= SEN_VAL_NORMAL
| SEL_RXIDLE
;
2749 ocp_write_word(tp
, MCU_TYPE_USB
, USB_AFE_CTRL2
, ocp_data
);
2751 r8153_power_cut_en(tp
, false);
2752 r8153_u1u2en(tp
, true);
2754 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_MAC_PWR_CTRL
, ALDPS_SPDWN_RATIO
);
2755 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_MAC_PWR_CTRL2
, EEE_SPDWN_RATIO
);
2756 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_MAC_PWR_CTRL3
,
2757 PKT_AVAIL_SPDWN_EN
| SUSPEND_SPDWN_EN
|
2758 U1U2_SPDWN_EN
| L1_SPDWN_EN
);
2759 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_MAC_PWR_CTRL4
,
2760 PWRSAVE_SPDWN_EN
| RXDV_SPDWN_EN
| TX10MIDLE_EN
|
2761 TP100_SPDWN_EN
| TP500_SPDWN_EN
| TP1000_SPDWN_EN
|
2764 r8153_enable_eee(tp
);
2765 r8153_enable_aldps(tp
);
2766 r8152b_enable_fc(tp
);
2769 static int rtl8152_suspend(struct usb_interface
*intf
, pm_message_t message
)
2771 struct r8152
*tp
= usb_get_intfdata(intf
);
2773 if (PMSG_IS_AUTO(message
))
2774 set_bit(SELECTIVE_SUSPEND
, &tp
->flags
);
2776 netif_device_detach(tp
->netdev
);
2778 if (netif_running(tp
->netdev
)) {
2779 clear_bit(WORK_ENABLE
, &tp
->flags
);
2780 usb_kill_urb(tp
->intr_urb
);
2781 cancel_delayed_work_sync(&tp
->schedule
);
2782 if (test_bit(SELECTIVE_SUSPEND
, &tp
->flags
)) {
2783 rtl_runtime_suspend_enable(tp
, true);
2785 tasklet_disable(&tp
->tl
);
2786 tp
->rtl_ops
.down(tp
);
2787 tasklet_enable(&tp
->tl
);
2794 static int rtl8152_resume(struct usb_interface
*intf
)
2796 struct r8152
*tp
= usb_get_intfdata(intf
);
2798 if (!test_bit(SELECTIVE_SUSPEND
, &tp
->flags
)) {
2799 tp
->rtl_ops
.init(tp
);
2800 netif_device_attach(tp
->netdev
);
2803 if (netif_running(tp
->netdev
)) {
2804 if (test_bit(SELECTIVE_SUSPEND
, &tp
->flags
)) {
2805 rtl_runtime_suspend_enable(tp
, false);
2806 clear_bit(SELECTIVE_SUSPEND
, &tp
->flags
);
2807 if (tp
->speed
& LINK_STATUS
)
2808 tp
->rtl_ops
.disable(tp
);
2811 rtl8152_set_speed(tp
, AUTONEG_ENABLE
,
2812 tp
->mii
.supports_gmii
? SPEED_1000
: SPEED_100
,
2816 netif_carrier_off(tp
->netdev
);
2817 set_bit(WORK_ENABLE
, &tp
->flags
);
2818 usb_submit_urb(tp
->intr_urb
, GFP_KERNEL
);
2824 static void rtl8152_get_wol(struct net_device
*dev
, struct ethtool_wolinfo
*wol
)
2826 struct r8152
*tp
= netdev_priv(dev
);
2828 if (usb_autopm_get_interface(tp
->intf
) < 0)
2831 wol
->supported
= WAKE_ANY
;
2832 wol
->wolopts
= __rtl_get_wol(tp
);
2834 usb_autopm_put_interface(tp
->intf
);
2837 static int rtl8152_set_wol(struct net_device
*dev
, struct ethtool_wolinfo
*wol
)
2839 struct r8152
*tp
= netdev_priv(dev
);
2842 ret
= usb_autopm_get_interface(tp
->intf
);
2846 __rtl_set_wol(tp
, wol
->wolopts
);
2847 tp
->saved_wolopts
= wol
->wolopts
& WAKE_ANY
;
2849 usb_autopm_put_interface(tp
->intf
);
2855 static void rtl8152_get_drvinfo(struct net_device
*netdev
,
2856 struct ethtool_drvinfo
*info
)
2858 struct r8152
*tp
= netdev_priv(netdev
);
2860 strncpy(info
->driver
, MODULENAME
, ETHTOOL_BUSINFO_LEN
);
2861 strncpy(info
->version
, DRIVER_VERSION
, ETHTOOL_BUSINFO_LEN
);
2862 usb_make_path(tp
->udev
, info
->bus_info
, sizeof(info
->bus_info
));
2866 int rtl8152_get_settings(struct net_device
*netdev
, struct ethtool_cmd
*cmd
)
2868 struct r8152
*tp
= netdev_priv(netdev
);
2870 if (!tp
->mii
.mdio_read
)
2873 return mii_ethtool_gset(&tp
->mii
, cmd
);
2876 static int rtl8152_set_settings(struct net_device
*dev
, struct ethtool_cmd
*cmd
)
2878 struct r8152
*tp
= netdev_priv(dev
);
2881 ret
= usb_autopm_get_interface(tp
->intf
);
2885 ret
= rtl8152_set_speed(tp
, cmd
->autoneg
, cmd
->speed
, cmd
->duplex
);
2887 usb_autopm_put_interface(tp
->intf
);
2893 static struct ethtool_ops ops
= {
2894 .get_drvinfo
= rtl8152_get_drvinfo
,
2895 .get_settings
= rtl8152_get_settings
,
2896 .set_settings
= rtl8152_set_settings
,
2897 .get_link
= ethtool_op_get_link
,
2898 .get_wol
= rtl8152_get_wol
,
2899 .set_wol
= rtl8152_set_wol
,
2902 static int rtl8152_ioctl(struct net_device
*netdev
, struct ifreq
*rq
, int cmd
)
2904 struct r8152
*tp
= netdev_priv(netdev
);
2905 struct mii_ioctl_data
*data
= if_mii(rq
);
2908 res
= usb_autopm_get_interface(tp
->intf
);
2914 data
->phy_id
= R8152_PHY_ID
; /* Internal PHY */
2918 data
->val_out
= r8152_mdio_read(tp
, data
->reg_num
);
2922 if (!capable(CAP_NET_ADMIN
)) {
2926 r8152_mdio_write(tp
, data
->reg_num
, data
->val_in
);
2933 usb_autopm_put_interface(tp
->intf
);
2939 static const struct net_device_ops rtl8152_netdev_ops
= {
2940 .ndo_open
= rtl8152_open
,
2941 .ndo_stop
= rtl8152_close
,
2942 .ndo_do_ioctl
= rtl8152_ioctl
,
2943 .ndo_start_xmit
= rtl8152_start_xmit
,
2944 .ndo_tx_timeout
= rtl8152_tx_timeout
,
2945 .ndo_set_rx_mode
= rtl8152_set_rx_mode
,
2946 .ndo_set_mac_address
= rtl8152_set_mac_address
,
2948 .ndo_change_mtu
= eth_change_mtu
,
2949 .ndo_validate_addr
= eth_validate_addr
,
2952 static void r8152b_get_version(struct r8152
*tp
)
2957 ocp_data
= ocp_read_word(tp
, MCU_TYPE_PLA
, PLA_TCR1
);
2958 version
= (u16
)(ocp_data
& VERSION_MASK
);
2962 tp
->version
= RTL_VER_01
;
2965 tp
->version
= RTL_VER_02
;
2968 tp
->version
= RTL_VER_03
;
2969 tp
->mii
.supports_gmii
= 1;
2972 tp
->version
= RTL_VER_04
;
2973 tp
->mii
.supports_gmii
= 1;
2976 tp
->version
= RTL_VER_05
;
2977 tp
->mii
.supports_gmii
= 1;
2980 netif_info(tp
, probe
, tp
->netdev
,
2981 "Unknown version 0x%04x\n", version
);
2986 static void rtl8152_unload(struct r8152
*tp
)
2988 if (tp
->version
!= RTL_VER_01
)
2989 r8152_power_cut_en(tp
, true);
2992 static void rtl8153_unload(struct r8152
*tp
)
2994 r8153_power_cut_en(tp
, true);
2997 static int rtl_ops_init(struct r8152
*tp
, const struct usb_device_id
*id
)
2999 struct rtl_ops
*ops
= &tp
->rtl_ops
;
3002 switch (id
->idVendor
) {
3003 case VENDOR_ID_REALTEK
:
3004 switch (id
->idProduct
) {
3005 case PRODUCT_ID_RTL8152
:
3006 ops
->init
= r8152b_init
;
3007 ops
->enable
= rtl8152_enable
;
3008 ops
->disable
= rtl8152_disable
;
3009 ops
->up
= r8152b_exit_oob
;
3010 ops
->down
= rtl8152_down
;
3011 ops
->unload
= rtl8152_unload
;
3014 case PRODUCT_ID_RTL8153
:
3015 ops
->init
= r8153_init
;
3016 ops
->enable
= rtl8153_enable
;
3017 ops
->disable
= rtl8152_disable
;
3018 ops
->up
= r8153_first_init
;
3019 ops
->down
= rtl8153_down
;
3020 ops
->unload
= rtl8153_unload
;
3028 case VENDOR_ID_SAMSUNG
:
3029 switch (id
->idProduct
) {
3030 case PRODUCT_ID_SAMSUNG
:
3031 ops
->init
= r8153_init
;
3032 ops
->enable
= rtl8153_enable
;
3033 ops
->disable
= rtl8152_disable
;
3034 ops
->up
= r8153_first_init
;
3035 ops
->down
= rtl8153_down
;
3036 ops
->unload
= rtl8153_unload
;
3049 netif_err(tp
, probe
, tp
->netdev
, "Unknown Device\n");
3054 static int rtl8152_probe(struct usb_interface
*intf
,
3055 const struct usb_device_id
*id
)
3057 struct usb_device
*udev
= interface_to_usbdev(intf
);
3059 struct net_device
*netdev
;
3062 netdev
= alloc_etherdev(sizeof(struct r8152
));
3064 dev_err(&intf
->dev
, "Out of memory\n");
3068 SET_NETDEV_DEV(netdev
, &intf
->dev
);
3069 tp
= netdev_priv(netdev
);
3070 tp
->msg_enable
= 0x7FFF;
3073 tp
->netdev
= netdev
;
3076 ret
= rtl_ops_init(tp
, id
);
3080 tasklet_init(&tp
->tl
, bottom_half
, (unsigned long)tp
);
3081 INIT_DELAYED_WORK(&tp
->schedule
, rtl_work_func_t
);
3083 netdev
->netdev_ops
= &rtl8152_netdev_ops
;
3084 netdev
->watchdog_timeo
= RTL8152_TX_TIMEOUT
;
3086 netdev
->features
|= NETIF_F_IP_CSUM
;
3087 netdev
->hw_features
= NETIF_F_IP_CSUM
;
3088 SET_ETHTOOL_OPS(netdev
, &ops
);
3090 tp
->mii
.dev
= netdev
;
3091 tp
->mii
.mdio_read
= read_mii_word
;
3092 tp
->mii
.mdio_write
= write_mii_word
;
3093 tp
->mii
.phy_id_mask
= 0x3f;
3094 tp
->mii
.reg_num_mask
= 0x1f;
3095 tp
->mii
.phy_id
= R8152_PHY_ID
;
3096 tp
->mii
.supports_gmii
= 0;
3098 intf
->needs_remote_wakeup
= 1;
3100 r8152b_get_version(tp
);
3101 tp
->rtl_ops
.init(tp
);
3102 set_ethernet_addr(tp
);
3104 usb_set_intfdata(intf
, tp
);
3106 ret
= register_netdev(netdev
);
3108 netif_err(tp
, probe
, netdev
, "couldn't register the device\n");
3112 tp
->saved_wolopts
= __rtl_get_wol(tp
);
3113 if (tp
->saved_wolopts
)
3114 device_set_wakeup_enable(&udev
->dev
, true);
3116 device_set_wakeup_enable(&udev
->dev
, false);
3118 netif_info(tp
, probe
, netdev
, "%s\n", DRIVER_VERSION
);
3123 usb_set_intfdata(intf
, NULL
);
3125 free_netdev(netdev
);
3129 static void rtl8152_disconnect(struct usb_interface
*intf
)
3131 struct r8152
*tp
= usb_get_intfdata(intf
);
3133 usb_set_intfdata(intf
, NULL
);
3135 set_bit(RTL8152_UNPLUG
, &tp
->flags
);
3136 tasklet_kill(&tp
->tl
);
3137 unregister_netdev(tp
->netdev
);
3138 tp
->rtl_ops
.unload(tp
);
3139 free_netdev(tp
->netdev
);
3143 /* table of devices that work with this driver */
3144 static struct usb_device_id rtl8152_table
[] = {
3145 {REALTEK_USB_DEVICE(VENDOR_ID_REALTEK
, PRODUCT_ID_RTL8152
)},
3146 {REALTEK_USB_DEVICE(VENDOR_ID_REALTEK
, PRODUCT_ID_RTL8153
)},
3147 {REALTEK_USB_DEVICE(VENDOR_ID_SAMSUNG
, PRODUCT_ID_SAMSUNG
)},
3151 MODULE_DEVICE_TABLE(usb
, rtl8152_table
);
3153 static struct usb_driver rtl8152_driver
= {
3155 .id_table
= rtl8152_table
,
3156 .probe
= rtl8152_probe
,
3157 .disconnect
= rtl8152_disconnect
,
3158 .suspend
= rtl8152_suspend
,
3159 .resume
= rtl8152_resume
,
3160 .reset_resume
= rtl8152_resume
,
3161 .supports_autosuspend
= 1,
3162 .disable_hub_initiated_lpm
= 1,
3165 module_usb_driver(rtl8152_driver
);
3167 MODULE_AUTHOR(DRIVER_AUTHOR
);
3168 MODULE_DESCRIPTION(DRIVER_DESC
);
3169 MODULE_LICENSE("GPL");