]> git.proxmox.com Git - mirror_ubuntu-artful-kernel.git/blob - drivers/net/vxge/vxge-main.h
vxge: add support for ethtool firmware flashing
[mirror_ubuntu-artful-kernel.git] / drivers / net / vxge / vxge-main.h
1 /******************************************************************************
2 * This software may be used and distributed according to the terms of
3 * the GNU General Public License (GPL), incorporated herein by reference.
4 * Drivers based on or derived from this code fall under the GPL and must
5 * retain the authorship, copyright and license notice. This file is not
6 * a complete program and may only be used when the entire operating
7 * system is licensed under the GPL.
8 * See the file COPYING in this distribution for more information.
9 *
10 * vxge-main.h: Driver for Exar Corp's X3100 Series 10GbE PCIe I/O
11 * Virtualized Server Adapter.
12 * Copyright(c) 2002-2010 Exar Corp.
13 ******************************************************************************/
14 #ifndef VXGE_MAIN_H
15 #define VXGE_MAIN_H
16
17 #include "vxge-traffic.h"
18 #include "vxge-config.h"
19 #include "vxge-version.h"
20 #include <linux/list.h>
21
22 #define VXGE_DRIVER_NAME "vxge"
23 #define VXGE_DRIVER_VENDOR "Neterion, Inc"
24 #define VXGE_DRIVER_FW_VERSION_MAJOR 1
25
26 #define DRV_VERSION VXGE_VERSION_MAJOR"."VXGE_VERSION_MINOR"."\
27 VXGE_VERSION_FIX"."VXGE_VERSION_BUILD"-"\
28 VXGE_VERSION_FOR
29
30 #define PCI_DEVICE_ID_TITAN_WIN 0x5733
31 #define PCI_DEVICE_ID_TITAN_UNI 0x5833
32 #define VXGE_USE_DEFAULT 0xffffffff
33 #define VXGE_HW_VPATH_MSIX_ACTIVE 4
34 #define VXGE_ALARM_MSIX_ID 2
35 #define VXGE_HW_RXSYNC_FREQ_CNT 4
36 #define VXGE_LL_WATCH_DOG_TIMEOUT (15 * HZ)
37 #define VXGE_LL_RX_COPY_THRESHOLD 256
38 #define VXGE_DEF_FIFO_LENGTH 84
39
40 #define NO_STEERING 0
41 #define PORT_STEERING 0x1
42 #define RTH_STEERING 0x2
43 #define RX_TOS_STEERING 0x3
44 #define RX_VLAN_STEERING 0x4
45 #define RTH_BUCKET_SIZE 4
46
47 #define TX_PRIORITY_STEERING 1
48 #define TX_VLAN_STEERING 2
49 #define TX_PORT_STEERING 3
50 #define TX_MULTIQ_STEERING 4
51
52 #define VXGE_HW_MAC_ADDR_LEARN_DEFAULT VXGE_HW_RTS_MAC_DISABLE
53
54 #define VXGE_TTI_BTIMER_VAL 250000
55
56 #define VXGE_TTI_LTIMER_VAL 1000
57 #define VXGE_TTI_RTIMER_VAL 0
58 #define VXGE_RTI_BTIMER_VAL 250
59 #define VXGE_RTI_LTIMER_VAL 100
60 #define VXGE_RTI_RTIMER_VAL 0
61 #define VXGE_FIFO_INDICATE_MAX_PKTS VXGE_DEF_FIFO_LENGTH
62 #define VXGE_ISR_POLLING_CNT 8
63 #define VXGE_MAX_CONFIG_DEV 0xFF
64 #define VXGE_EXEC_MODE_DISABLE 0
65 #define VXGE_EXEC_MODE_ENABLE 1
66 #define VXGE_MAX_CONFIG_PORT 1
67 #define VXGE_ALL_VID_DISABLE 0
68 #define VXGE_ALL_VID_ENABLE 1
69 #define VXGE_PAUSE_CTRL_DISABLE 0
70 #define VXGE_PAUSE_CTRL_ENABLE 1
71
72 #define TTI_TX_URANGE_A 5
73 #define TTI_TX_URANGE_B 15
74 #define TTI_TX_URANGE_C 40
75 #define TTI_TX_UFC_A 5
76 #define TTI_TX_UFC_B 40
77 #define TTI_TX_UFC_C 60
78 #define TTI_TX_UFC_D 100
79
80 #define RTI_RX_URANGE_A 5
81 #define RTI_RX_URANGE_B 15
82 #define RTI_RX_URANGE_C 40
83 #define RTI_RX_UFC_A 1
84 #define RTI_RX_UFC_B 5
85 #define RTI_RX_UFC_C 10
86 #define RTI_RX_UFC_D 15
87
88 /* Milli secs timer period */
89 #define VXGE_TIMER_DELAY 10000
90
91 #define VXGE_LL_MAX_FRAME_SIZE(dev) ((dev)->mtu + VXGE_HW_MAC_HEADER_MAX_SIZE)
92
93 #define is_sriov(function_mode) \
94 ((function_mode == VXGE_HW_FUNCTION_MODE_SRIOV) || \
95 (function_mode == VXGE_HW_FUNCTION_MODE_SRIOV_8) || \
96 (function_mode == VXGE_HW_FUNCTION_MODE_SRIOV_4))
97
98 enum vxge_reset_event {
99 /* reset events */
100 VXGE_LL_VPATH_RESET = 0,
101 VXGE_LL_DEVICE_RESET = 1,
102 VXGE_LL_FULL_RESET = 2,
103 VXGE_LL_START_RESET = 3,
104 VXGE_LL_COMPL_RESET = 4
105 };
106 /* These flags represent the devices temporary state */
107 enum vxge_device_state_t {
108 __VXGE_STATE_RESET_CARD = 0,
109 __VXGE_STATE_CARD_UP
110 };
111
112 enum vxge_mac_addr_state {
113 /* mac address states */
114 VXGE_LL_MAC_ADDR_IN_LIST = 0,
115 VXGE_LL_MAC_ADDR_IN_DA_TABLE = 1
116 };
117
118 struct vxge_drv_config {
119 int config_dev_cnt;
120 int total_dev_cnt;
121 int g_no_cpus;
122 unsigned int vpath_per_dev;
123 };
124
125 struct macInfo {
126 unsigned char macaddr[ETH_ALEN];
127 unsigned char macmask[ETH_ALEN];
128 unsigned int vpath_no;
129 enum vxge_mac_addr_state state;
130 };
131
132 struct vxge_config {
133 int tx_pause_enable;
134 int rx_pause_enable;
135
136 #define NEW_NAPI_WEIGHT 64
137 int napi_weight;
138 #define VXGE_GRO_DONOT_AGGREGATE 0
139 #define VXGE_GRO_ALWAYS_AGGREGATE 1
140 int gro_enable;
141 int intr_type;
142 #define INTA 0
143 #define MSI 1
144 #define MSI_X 2
145
146 int addr_learn_en;
147
148 u32 rth_steering:2,
149 rth_algorithm:2,
150 rth_hash_type_tcpipv4:1,
151 rth_hash_type_ipv4:1,
152 rth_hash_type_tcpipv6:1,
153 rth_hash_type_ipv6:1,
154 rth_hash_type_tcpipv6ex:1,
155 rth_hash_type_ipv6ex:1,
156 rth_bkt_sz:8;
157 int rth_jhash_golden_ratio;
158 int tx_steering_type;
159 int fifo_indicate_max_pkts;
160 struct vxge_hw_device_hw_info device_hw_info;
161 };
162
163 struct vxge_msix_entry {
164 /* Mimicing the msix_entry struct of Kernel. */
165 u16 vector;
166 u16 entry;
167 u16 in_use;
168 void *arg;
169 };
170
171 /* Software Statistics */
172
173 struct vxge_sw_stats {
174 /* Network Stats (interface stats) */
175
176 /* Tx */
177 u64 tx_frms;
178 u64 tx_errors;
179 u64 tx_bytes;
180 u64 txd_not_free;
181 u64 txd_out_of_desc;
182
183 /* Virtual Path */
184 u64 vpaths_open;
185 u64 vpath_open_fail;
186
187 /* Rx */
188 u64 rx_frms;
189 u64 rx_errors;
190 u64 rx_bytes;
191 u64 rx_mcast;
192
193 /* Misc. */
194 u64 link_up;
195 u64 link_down;
196 u64 pci_map_fail;
197 u64 skb_alloc_fail;
198 };
199
200 struct vxge_mac_addrs {
201 struct list_head item;
202 u64 macaddr;
203 u64 macmask;
204 enum vxge_mac_addr_state state;
205 };
206
207 struct vxgedev;
208
209 struct vxge_fifo_stats {
210 u64 tx_frms;
211 u64 tx_errors;
212 u64 tx_bytes;
213 u64 txd_not_free;
214 u64 txd_out_of_desc;
215 u64 pci_map_fail;
216 };
217
218 struct vxge_fifo {
219 struct net_device *ndev;
220 struct pci_dev *pdev;
221 struct __vxge_hw_fifo *handle;
222 struct netdev_queue *txq;
223
224 int tx_steering_type;
225 int indicate_max_pkts;
226
227 /* Tx stats */
228 struct vxge_fifo_stats stats;
229 } ____cacheline_aligned;
230
231 struct vxge_ring_stats {
232 u64 prev_rx_frms;
233 u64 rx_frms;
234 u64 rx_errors;
235 u64 rx_dropped;
236 u64 rx_bytes;
237 u64 rx_mcast;
238 u64 pci_map_fail;
239 u64 skb_alloc_fail;
240 };
241
242 struct vxge_ring {
243 struct net_device *ndev;
244 struct pci_dev *pdev;
245 struct __vxge_hw_ring *handle;
246 /* The vpath id maintained in the driver -
247 * 0 to 'maximum_vpaths_in_function - 1'
248 */
249 int driver_id;
250
251 /* copy of the flag indicating whether rx_csum is to be used */
252 u32 rx_csum;
253
254 int pkts_processed;
255 int budget;
256 int gro_enable;
257
258 struct napi_struct napi;
259 struct napi_struct *napi_p;
260
261 #define VXGE_MAX_MAC_ADDR_COUNT 30
262
263 int vlan_tag_strip;
264 struct vlan_group *vlgrp;
265 int rx_vector_no;
266 enum vxge_hw_status last_status;
267
268 /* Rx stats */
269 struct vxge_ring_stats stats;
270 } ____cacheline_aligned;
271
272 struct vxge_vpath {
273 struct vxge_fifo fifo;
274 struct vxge_ring ring;
275
276 struct __vxge_hw_vpath_handle *handle;
277
278 /* Actual vpath id for this vpath in the device - 0 to 16 */
279 int device_id;
280 int max_mac_addr_cnt;
281 int is_configured;
282 int is_open;
283 struct vxgedev *vdev;
284 u8 (macaddr)[ETH_ALEN];
285 u8 (macmask)[ETH_ALEN];
286
287 #define VXGE_MAX_LEARN_MAC_ADDR_CNT 2048
288 /* mac addresses currently programmed into NIC */
289 u16 mac_addr_cnt;
290 u16 mcast_addr_cnt;
291 struct list_head mac_addr_list;
292
293 u32 level_err;
294 u32 level_trace;
295 };
296 #define VXGE_COPY_DEBUG_INFO_TO_LL(vdev, err, trace) { \
297 for (i = 0; i < vdev->no_of_vpath; i++) { \
298 vdev->vpaths[i].level_err = err; \
299 vdev->vpaths[i].level_trace = trace; \
300 } \
301 vdev->level_err = err; \
302 vdev->level_trace = trace; \
303 }
304
305 struct vxgedev {
306 struct net_device *ndev;
307 struct pci_dev *pdev;
308 struct __vxge_hw_device *devh;
309 struct vlan_group *vlgrp;
310 int vlan_tag_strip;
311 struct vxge_config config;
312 unsigned long state;
313
314 /* Indicates which vpath to reset */
315 unsigned long vp_reset;
316
317 /* Timer used for polling vpath resets */
318 struct timer_list vp_reset_timer;
319
320 /* Timer used for polling vpath lockup */
321 struct timer_list vp_lockup_timer;
322
323 /*
324 * Flags to track whether device is in All Multicast
325 * or in promiscuous mode.
326 */
327 u16 all_multi_flg;
328
329 /* A flag indicating whether rx_csum is to be used or not. */
330 u32 rx_csum;
331
332 struct vxge_msix_entry *vxge_entries;
333 struct msix_entry *entries;
334 /*
335 * 4 for each vpath * 17;
336 * total is 68
337 */
338 #define VXGE_MAX_REQUESTED_MSIX 68
339 #define VXGE_INTR_STRLEN 80
340 char desc[VXGE_MAX_REQUESTED_MSIX][VXGE_INTR_STRLEN];
341
342 enum vxge_hw_event cric_err_event;
343
344 int max_vpath_supported;
345 int no_of_vpath;
346
347 struct napi_struct napi;
348 /* A debug option, when enabled and if error condition occurs,
349 * the driver will do following steps:
350 * - mask all interrupts
351 * - Not clear the source of the alarm
352 * - gracefully stop all I/O
353 * A diagnostic dump of register and stats at this point
354 * reveals very useful information.
355 */
356 int exec_mode;
357 int max_config_port;
358 struct vxge_vpath *vpaths;
359
360 struct __vxge_hw_vpath_handle *vp_handles[VXGE_HW_MAX_VIRTUAL_PATHS];
361 void __iomem *bar0;
362 struct vxge_sw_stats stats;
363 int mtu;
364 /* Below variables are used for vpath selection to transmit a packet */
365 u8 vpath_selector[VXGE_HW_MAX_VIRTUAL_PATHS];
366 u64 vpaths_deployed;
367
368 u32 intr_cnt;
369 u32 level_err;
370 u32 level_trace;
371 char fw_version[VXGE_HW_FW_STRLEN];
372 };
373
374 struct vxge_rx_priv {
375 struct sk_buff *skb;
376 unsigned char *skb_data;
377 dma_addr_t data_dma;
378 dma_addr_t data_size;
379 };
380
381 struct vxge_tx_priv {
382 struct sk_buff *skb;
383 dma_addr_t dma_buffers[MAX_SKB_FRAGS+1];
384 };
385
386 #define VXGE_MODULE_PARAM_INT(p, val) \
387 static int p = val; \
388 module_param(p, int, 0)
389
390 #define vxge_os_timer(timer, handle, arg, exp) do { \
391 init_timer(&timer); \
392 timer.function = handle; \
393 timer.data = (unsigned long) arg; \
394 mod_timer(&timer, (jiffies + exp)); \
395 } while (0);
396
397 extern void vxge_initialize_ethtool_ops(struct net_device *ndev);
398 enum vxge_hw_status vxge_reset_all_vpaths(struct vxgedev *vdev);
399
400 int vxge_fw_upgrade(struct vxgedev *vdev, char *fw_name, int override);
401
402 /**
403 * #define VXGE_DEBUG_INIT: debug for initialization functions
404 * #define VXGE_DEBUG_TX : debug transmit related functions
405 * #define VXGE_DEBUG_RX : debug recevice related functions
406 * #define VXGE_DEBUG_MEM : debug memory module
407 * #define VXGE_DEBUG_LOCK: debug locks
408 * #define VXGE_DEBUG_SEM : debug semaphore
409 * #define VXGE_DEBUG_ENTRYEXIT: debug functions by adding entry exit statements
410 */
411 #define VXGE_DEBUG_INIT 0x00000001
412 #define VXGE_DEBUG_TX 0x00000002
413 #define VXGE_DEBUG_RX 0x00000004
414 #define VXGE_DEBUG_MEM 0x00000008
415 #define VXGE_DEBUG_LOCK 0x00000010
416 #define VXGE_DEBUG_SEM 0x00000020
417 #define VXGE_DEBUG_ENTRYEXIT 0x00000040
418 #define VXGE_DEBUG_INTR 0x00000080
419 #define VXGE_DEBUG_LL_CONFIG 0x00000100
420
421 /* Debug tracing for VXGE driver */
422 #ifndef VXGE_DEBUG_MASK
423 #define VXGE_DEBUG_MASK 0x0
424 #endif
425
426 #if (VXGE_DEBUG_LL_CONFIG & VXGE_DEBUG_MASK)
427 #define vxge_debug_ll_config(level, fmt, ...) \
428 vxge_debug_ll(level, VXGE_DEBUG_LL_CONFIG, fmt, __VA_ARGS__)
429 #else
430 #define vxge_debug_ll_config(level, fmt, ...)
431 #endif
432
433 #if (VXGE_DEBUG_INIT & VXGE_DEBUG_MASK)
434 #define vxge_debug_init(level, fmt, ...) \
435 vxge_debug_ll(level, VXGE_DEBUG_INIT, fmt, __VA_ARGS__)
436 #else
437 #define vxge_debug_init(level, fmt, ...)
438 #endif
439
440 #if (VXGE_DEBUG_TX & VXGE_DEBUG_MASK)
441 #define vxge_debug_tx(level, fmt, ...) \
442 vxge_debug_ll(level, VXGE_DEBUG_TX, fmt, __VA_ARGS__)
443 #else
444 #define vxge_debug_tx(level, fmt, ...)
445 #endif
446
447 #if (VXGE_DEBUG_RX & VXGE_DEBUG_MASK)
448 #define vxge_debug_rx(level, fmt, ...) \
449 vxge_debug_ll(level, VXGE_DEBUG_RX, fmt, __VA_ARGS__)
450 #else
451 #define vxge_debug_rx(level, fmt, ...)
452 #endif
453
454 #if (VXGE_DEBUG_MEM & VXGE_DEBUG_MASK)
455 #define vxge_debug_mem(level, fmt, ...) \
456 vxge_debug_ll(level, VXGE_DEBUG_MEM, fmt, __VA_ARGS__)
457 #else
458 #define vxge_debug_mem(level, fmt, ...)
459 #endif
460
461 #if (VXGE_DEBUG_ENTRYEXIT & VXGE_DEBUG_MASK)
462 #define vxge_debug_entryexit(level, fmt, ...) \
463 vxge_debug_ll(level, VXGE_DEBUG_ENTRYEXIT, fmt, __VA_ARGS__)
464 #else
465 #define vxge_debug_entryexit(level, fmt, ...)
466 #endif
467
468 #if (VXGE_DEBUG_INTR & VXGE_DEBUG_MASK)
469 #define vxge_debug_intr(level, fmt, ...) \
470 vxge_debug_ll(level, VXGE_DEBUG_INTR, fmt, __VA_ARGS__)
471 #else
472 #define vxge_debug_intr(level, fmt, ...)
473 #endif
474
475 #define VXGE_DEVICE_DEBUG_LEVEL_SET(level, mask, vdev) {\
476 vxge_hw_device_debug_set((struct __vxge_hw_device *)vdev->devh, \
477 level, mask);\
478 VXGE_COPY_DEBUG_INFO_TO_LL(vdev, \
479 vxge_hw_device_error_level_get((struct __vxge_hw_device *) \
480 vdev->devh), \
481 vxge_hw_device_trace_level_get((struct __vxge_hw_device *) \
482 vdev->devh));\
483 }
484
485 #ifdef NETIF_F_GSO
486 #define vxge_tcp_mss(skb) (skb_shinfo(skb)->gso_size)
487 #define vxge_udp_mss(skb) (skb_shinfo(skb)->gso_size)
488 #define vxge_offload_type(skb) (skb_shinfo(skb)->gso_type)
489 #endif
490
491 #endif