3 * Linux device driver for ADMtek ADM8211 (IEEE 802.11b MAC/BBP)
5 * Copyright (c) 2003, Jouni Malinen <j@w1.fi>
6 * Copyright (c) 2004-2007, Michael Wu <flamingice@sourmilk.net>
7 * Some parts copyright (c) 2003 by David Young <dyoung@pobox.com>
8 * and used with permission.
10 * Much thanks to Infineon-ADMtek for their support of this driver.
12 * This program is free software; you can redistribute it and/or modify
13 * it under the terms of the GNU General Public License version 2 as
14 * published by the Free Software Foundation. See README and COPYING for
18 #include <linux/init.h>
20 #include <linux/skbuff.h>
21 #include <linux/slab.h>
22 #include <linux/etherdevice.h>
23 #include <linux/pci.h>
24 #include <linux/delay.h>
25 #include <linux/crc32.h>
26 #include <linux/eeprom_93cx6.h>
27 #include <net/mac80211.h>
31 MODULE_AUTHOR("Michael Wu <flamingice@sourmilk.net>");
32 MODULE_AUTHOR("Jouni Malinen <j@w1.fi>");
33 MODULE_DESCRIPTION("Driver for IEEE 802.11b wireless cards based on ADMtek ADM8211");
34 MODULE_SUPPORTED_DEVICE("ADM8211");
35 MODULE_LICENSE("GPL");
37 static unsigned int tx_ring_size __read_mostly
= 16;
38 static unsigned int rx_ring_size __read_mostly
= 16;
40 module_param(tx_ring_size
, uint
, 0);
41 module_param(rx_ring_size
, uint
, 0);
43 static DEFINE_PCI_DEVICE_TABLE(adm8211_pci_id_table
) = {
45 { PCI_DEVICE(0x10B7, 0x6000) }, /* 3Com 3CRSHPW796 */
46 { PCI_DEVICE(0x1200, 0x8201) }, /* ? */
47 { PCI_DEVICE(0x1317, 0x8201) }, /* ADM8211A */
48 { PCI_DEVICE(0x1317, 0x8211) }, /* ADM8211B/C */
52 static struct ieee80211_rate adm8211_rates
[] = {
53 { .bitrate
= 10, .flags
= IEEE80211_RATE_SHORT_PREAMBLE
},
54 { .bitrate
= 20, .flags
= IEEE80211_RATE_SHORT_PREAMBLE
},
55 { .bitrate
= 55, .flags
= IEEE80211_RATE_SHORT_PREAMBLE
},
56 { .bitrate
= 110, .flags
= IEEE80211_RATE_SHORT_PREAMBLE
},
57 { .bitrate
= 220, .flags
= IEEE80211_RATE_SHORT_PREAMBLE
}, /* XX ?? */
60 static const struct ieee80211_channel adm8211_channels
[] = {
61 { .center_freq
= 2412},
62 { .center_freq
= 2417},
63 { .center_freq
= 2422},
64 { .center_freq
= 2427},
65 { .center_freq
= 2432},
66 { .center_freq
= 2437},
67 { .center_freq
= 2442},
68 { .center_freq
= 2447},
69 { .center_freq
= 2452},
70 { .center_freq
= 2457},
71 { .center_freq
= 2462},
72 { .center_freq
= 2467},
73 { .center_freq
= 2472},
74 { .center_freq
= 2484},
78 static void adm8211_eeprom_register_read(struct eeprom_93cx6
*eeprom
)
80 struct adm8211_priv
*priv
= eeprom
->data
;
81 u32 reg
= ADM8211_CSR_READ(SPR
);
83 eeprom
->reg_data_in
= reg
& ADM8211_SPR_SDI
;
84 eeprom
->reg_data_out
= reg
& ADM8211_SPR_SDO
;
85 eeprom
->reg_data_clock
= reg
& ADM8211_SPR_SCLK
;
86 eeprom
->reg_chip_select
= reg
& ADM8211_SPR_SCS
;
89 static void adm8211_eeprom_register_write(struct eeprom_93cx6
*eeprom
)
91 struct adm8211_priv
*priv
= eeprom
->data
;
92 u32 reg
= 0x4000 | ADM8211_SPR_SRS
;
94 if (eeprom
->reg_data_in
)
95 reg
|= ADM8211_SPR_SDI
;
96 if (eeprom
->reg_data_out
)
97 reg
|= ADM8211_SPR_SDO
;
98 if (eeprom
->reg_data_clock
)
99 reg
|= ADM8211_SPR_SCLK
;
100 if (eeprom
->reg_chip_select
)
101 reg
|= ADM8211_SPR_SCS
;
103 ADM8211_CSR_WRITE(SPR
, reg
);
104 ADM8211_CSR_READ(SPR
); /* eeprom_delay */
107 static int adm8211_read_eeprom(struct ieee80211_hw
*dev
)
109 struct adm8211_priv
*priv
= dev
->priv
;
110 unsigned int words
, i
;
111 struct ieee80211_chan_range chan_range
;
113 struct eeprom_93cx6 eeprom
= {
115 .register_read
= adm8211_eeprom_register_read
,
116 .register_write
= adm8211_eeprom_register_write
119 if (ADM8211_CSR_READ(CSR_TEST0
) & ADM8211_CSR_TEST0_EPTYP
) {
120 /* 256 * 16-bit = 512 bytes */
121 eeprom
.width
= PCI_EEPROM_WIDTH_93C66
;
124 /* 64 * 16-bit = 128 bytes */
125 eeprom
.width
= PCI_EEPROM_WIDTH_93C46
;
129 priv
->eeprom_len
= words
* 2;
130 priv
->eeprom
= kmalloc(priv
->eeprom_len
, GFP_KERNEL
);
134 eeprom_93cx6_multiread(&eeprom
, 0, (__le16
*)priv
->eeprom
, words
);
136 cr49
= le16_to_cpu(priv
->eeprom
->cr49
);
137 priv
->rf_type
= (cr49
>> 3) & 0x7;
138 switch (priv
->rf_type
) {
139 case ADM8211_TYPE_INTERSIL
:
140 case ADM8211_TYPE_RFMD
:
141 case ADM8211_TYPE_MARVEL
:
142 case ADM8211_TYPE_AIROHA
:
143 case ADM8211_TYPE_ADMTEK
:
147 if (priv
->pdev
->revision
< ADM8211_REV_CA
)
148 priv
->rf_type
= ADM8211_TYPE_RFMD
;
150 priv
->rf_type
= ADM8211_TYPE_AIROHA
;
152 printk(KERN_WARNING
"%s (adm8211): Unknown RFtype %d\n",
153 pci_name(priv
->pdev
), (cr49
>> 3) & 0x7);
156 priv
->bbp_type
= cr49
& 0x7;
157 switch (priv
->bbp_type
) {
158 case ADM8211_TYPE_INTERSIL
:
159 case ADM8211_TYPE_RFMD
:
160 case ADM8211_TYPE_MARVEL
:
161 case ADM8211_TYPE_AIROHA
:
162 case ADM8211_TYPE_ADMTEK
:
165 if (priv
->pdev
->revision
< ADM8211_REV_CA
)
166 priv
->bbp_type
= ADM8211_TYPE_RFMD
;
168 priv
->bbp_type
= ADM8211_TYPE_ADMTEK
;
170 printk(KERN_WARNING
"%s (adm8211): Unknown BBPtype: %d\n",
171 pci_name(priv
->pdev
), cr49
>> 3);
174 if (priv
->eeprom
->country_code
>= ARRAY_SIZE(cranges
)) {
175 printk(KERN_WARNING
"%s (adm8211): Invalid country code (%d)\n",
176 pci_name(priv
->pdev
), priv
->eeprom
->country_code
);
178 chan_range
= cranges
[2];
180 chan_range
= cranges
[priv
->eeprom
->country_code
];
182 printk(KERN_DEBUG
"%s (adm8211): Channel range: %d - %d\n",
183 pci_name(priv
->pdev
), (int)chan_range
.min
, (int)chan_range
.max
);
185 BUILD_BUG_ON(sizeof(priv
->channels
) != sizeof(adm8211_channels
));
187 memcpy(priv
->channels
, adm8211_channels
, sizeof(priv
->channels
));
188 priv
->band
.channels
= priv
->channels
;
189 priv
->band
.n_channels
= ARRAY_SIZE(adm8211_channels
);
190 priv
->band
.bitrates
= adm8211_rates
;
191 priv
->band
.n_bitrates
= ARRAY_SIZE(adm8211_rates
);
193 for (i
= 1; i
<= ARRAY_SIZE(adm8211_channels
); i
++)
194 if (i
< chan_range
.min
|| i
> chan_range
.max
)
195 priv
->channels
[i
- 1].flags
|= IEEE80211_CHAN_DISABLED
;
197 switch (priv
->eeprom
->specific_bbptype
) {
198 case ADM8211_BBP_RFMD3000
:
199 case ADM8211_BBP_RFMD3002
:
200 case ADM8211_BBP_ADM8011
:
201 priv
->specific_bbptype
= priv
->eeprom
->specific_bbptype
;
205 if (priv
->pdev
->revision
< ADM8211_REV_CA
)
206 priv
->specific_bbptype
= ADM8211_BBP_RFMD3000
;
208 priv
->specific_bbptype
= ADM8211_BBP_ADM8011
;
210 printk(KERN_WARNING
"%s (adm8211): Unknown specific BBP: %d\n",
211 pci_name(priv
->pdev
), priv
->eeprom
->specific_bbptype
);
214 switch (priv
->eeprom
->specific_rftype
) {
215 case ADM8211_RFMD2948
:
216 case ADM8211_RFMD2958
:
217 case ADM8211_RFMD2958_RF3000_CONTROL_POWER
:
218 case ADM8211_MAX2820
:
219 case ADM8211_AL2210L
:
220 priv
->transceiver_type
= priv
->eeprom
->specific_rftype
;
224 if (priv
->pdev
->revision
== ADM8211_REV_BA
)
225 priv
->transceiver_type
= ADM8211_RFMD2958_RF3000_CONTROL_POWER
;
226 else if (priv
->pdev
->revision
== ADM8211_REV_CA
)
227 priv
->transceiver_type
= ADM8211_AL2210L
;
228 else if (priv
->pdev
->revision
== ADM8211_REV_AB
)
229 priv
->transceiver_type
= ADM8211_RFMD2948
;
231 printk(KERN_WARNING
"%s (adm8211): Unknown transceiver: %d\n",
232 pci_name(priv
->pdev
), priv
->eeprom
->specific_rftype
);
237 printk(KERN_DEBUG
"%s (adm8211): RFtype=%d BBPtype=%d Specific BBP=%d "
238 "Transceiver=%d\n", pci_name(priv
->pdev
), priv
->rf_type
,
239 priv
->bbp_type
, priv
->specific_bbptype
, priv
->transceiver_type
);
244 static inline void adm8211_write_sram(struct ieee80211_hw
*dev
,
247 struct adm8211_priv
*priv
= dev
->priv
;
249 ADM8211_CSR_WRITE(WEPCTL
, addr
| ADM8211_WEPCTL_TABLE_WR
|
250 (priv
->pdev
->revision
< ADM8211_REV_BA
?
251 0 : ADM8211_WEPCTL_SEL_WEPTABLE
));
252 ADM8211_CSR_READ(WEPCTL
);
255 ADM8211_CSR_WRITE(WESK
, data
);
256 ADM8211_CSR_READ(WESK
);
260 static void adm8211_write_sram_bytes(struct ieee80211_hw
*dev
,
261 unsigned int addr
, u8
*buf
,
264 struct adm8211_priv
*priv
= dev
->priv
;
265 u32 reg
= ADM8211_CSR_READ(WEPCTL
);
268 if (priv
->pdev
->revision
< ADM8211_REV_BA
) {
269 for (i
= 0; i
< len
; i
+= 2) {
270 u16 val
= buf
[i
] | (buf
[i
+ 1] << 8);
271 adm8211_write_sram(dev
, addr
+ i
/ 2, val
);
274 for (i
= 0; i
< len
; i
+= 4) {
275 u32 val
= (buf
[i
+ 0] << 0 ) | (buf
[i
+ 1] << 8 ) |
276 (buf
[i
+ 2] << 16) | (buf
[i
+ 3] << 24);
277 adm8211_write_sram(dev
, addr
+ i
/ 4, val
);
281 ADM8211_CSR_WRITE(WEPCTL
, reg
);
284 static void adm8211_clear_sram(struct ieee80211_hw
*dev
)
286 struct adm8211_priv
*priv
= dev
->priv
;
287 u32 reg
= ADM8211_CSR_READ(WEPCTL
);
290 for (addr
= 0; addr
< ADM8211_SRAM_SIZE
; addr
++)
291 adm8211_write_sram(dev
, addr
, 0);
293 ADM8211_CSR_WRITE(WEPCTL
, reg
);
296 static int adm8211_get_stats(struct ieee80211_hw
*dev
,
297 struct ieee80211_low_level_stats
*stats
)
299 struct adm8211_priv
*priv
= dev
->priv
;
301 memcpy(stats
, &priv
->stats
, sizeof(*stats
));
306 static void adm8211_interrupt_tci(struct ieee80211_hw
*dev
)
308 struct adm8211_priv
*priv
= dev
->priv
;
309 unsigned int dirty_tx
;
311 spin_lock(&priv
->lock
);
313 for (dirty_tx
= priv
->dirty_tx
; priv
->cur_tx
- dirty_tx
; dirty_tx
++) {
314 unsigned int entry
= dirty_tx
% priv
->tx_ring_size
;
315 u32 status
= le32_to_cpu(priv
->tx_ring
[entry
].status
);
316 struct ieee80211_tx_info
*txi
;
317 struct adm8211_tx_ring_info
*info
;
320 if (status
& TDES0_CONTROL_OWN
||
321 !(status
& TDES0_CONTROL_DONE
))
324 info
= &priv
->tx_buffers
[entry
];
326 txi
= IEEE80211_SKB_CB(skb
);
328 /* TODO: check TDES0_STATUS_TUF and TDES0_STATUS_TRO */
330 pci_unmap_single(priv
->pdev
, info
->mapping
,
331 info
->skb
->len
, PCI_DMA_TODEVICE
);
333 ieee80211_tx_info_clear_status(txi
);
335 skb_pull(skb
, sizeof(struct adm8211_tx_hdr
));
336 memcpy(skb_push(skb
, info
->hdrlen
), skb
->cb
, info
->hdrlen
);
337 if (!(txi
->flags
& IEEE80211_TX_CTL_NO_ACK
) &&
338 !(status
& TDES0_STATUS_ES
))
339 txi
->flags
|= IEEE80211_TX_STAT_ACK
;
341 ieee80211_tx_status_irqsafe(dev
, skb
);
346 if (priv
->cur_tx
- dirty_tx
< priv
->tx_ring_size
- 2)
347 ieee80211_wake_queue(dev
, 0);
349 priv
->dirty_tx
= dirty_tx
;
350 spin_unlock(&priv
->lock
);
354 static void adm8211_interrupt_rci(struct ieee80211_hw
*dev
)
356 struct adm8211_priv
*priv
= dev
->priv
;
357 unsigned int entry
= priv
->cur_rx
% priv
->rx_ring_size
;
360 struct sk_buff
*skb
, *newskb
;
361 unsigned int limit
= priv
->rx_ring_size
;
364 while (!(priv
->rx_ring
[entry
].status
& cpu_to_le32(RDES0_STATUS_OWN
))) {
368 status
= le32_to_cpu(priv
->rx_ring
[entry
].status
);
369 rate
= (status
& RDES0_STATUS_RXDR
) >> 12;
370 rssi
= le32_to_cpu(priv
->rx_ring
[entry
].length
) &
373 pktlen
= status
& RDES0_STATUS_FL
;
374 if (pktlen
> RX_PKT_SIZE
) {
376 printk(KERN_DEBUG
"%s: frame too long (%d)\n",
377 wiphy_name(dev
->wiphy
), pktlen
);
378 pktlen
= RX_PKT_SIZE
;
381 if (!priv
->soft_rx_crc
&& status
& RDES0_STATUS_ES
) {
382 skb
= NULL
; /* old buffer will be reused */
383 /* TODO: update RX error stats */
384 /* TODO: check RDES0_STATUS_CRC*E */
385 } else if (pktlen
< RX_COPY_BREAK
) {
386 skb
= dev_alloc_skb(pktlen
);
388 pci_dma_sync_single_for_cpu(
390 priv
->rx_buffers
[entry
].mapping
,
391 pktlen
, PCI_DMA_FROMDEVICE
);
392 memcpy(skb_put(skb
, pktlen
),
393 skb_tail_pointer(priv
->rx_buffers
[entry
].skb
),
395 pci_dma_sync_single_for_device(
397 priv
->rx_buffers
[entry
].mapping
,
398 RX_PKT_SIZE
, PCI_DMA_FROMDEVICE
);
401 newskb
= dev_alloc_skb(RX_PKT_SIZE
);
403 skb
= priv
->rx_buffers
[entry
].skb
;
404 skb_put(skb
, pktlen
);
407 priv
->rx_buffers
[entry
].mapping
,
408 RX_PKT_SIZE
, PCI_DMA_FROMDEVICE
);
409 priv
->rx_buffers
[entry
].skb
= newskb
;
410 priv
->rx_buffers
[entry
].mapping
=
411 pci_map_single(priv
->pdev
,
412 skb_tail_pointer(newskb
),
417 /* TODO: update rx dropped stats */
420 priv
->rx_ring
[entry
].buffer1
=
421 cpu_to_le32(priv
->rx_buffers
[entry
].mapping
);
424 priv
->rx_ring
[entry
].status
= cpu_to_le32(RDES0_STATUS_OWN
|
426 priv
->rx_ring
[entry
].length
=
427 cpu_to_le32(RX_PKT_SIZE
|
428 (entry
== priv
->rx_ring_size
- 1 ?
429 RDES1_CONTROL_RER
: 0));
432 struct ieee80211_rx_status rx_status
= {0};
434 if (priv
->pdev
->revision
< ADM8211_REV_CA
)
435 rx_status
.signal
= rssi
;
437 rx_status
.signal
= 100 - rssi
;
439 rx_status
.rate_idx
= rate
;
441 rx_status
.freq
= adm8211_channels
[priv
->channel
- 1].center_freq
;
442 rx_status
.band
= IEEE80211_BAND_2GHZ
;
444 memcpy(IEEE80211_SKB_RXCB(skb
), &rx_status
, sizeof(rx_status
));
445 ieee80211_rx_irqsafe(dev
, skb
);
448 entry
= (++priv
->cur_rx
) % priv
->rx_ring_size
;
451 /* TODO: check LPC and update stats? */
455 static irqreturn_t
adm8211_interrupt(int irq
, void *dev_id
)
457 #define ADM8211_INT(x) \
459 if (unlikely(stsr & ADM8211_STSR_ ## x)) \
460 printk(KERN_DEBUG "%s: " #x "\n", wiphy_name(dev->wiphy)); \
463 struct ieee80211_hw
*dev
= dev_id
;
464 struct adm8211_priv
*priv
= dev
->priv
;
465 u32 stsr
= ADM8211_CSR_READ(STSR
);
466 ADM8211_CSR_WRITE(STSR
, stsr
);
467 if (stsr
== 0xffffffff)
470 if (!(stsr
& (ADM8211_STSR_NISS
| ADM8211_STSR_AISS
)))
473 if (stsr
& ADM8211_STSR_RCI
)
474 adm8211_interrupt_rci(dev
);
475 if (stsr
& ADM8211_STSR_TCI
)
476 adm8211_interrupt_tci(dev
);
501 #define WRITE_SYN(name,v_mask,v_shift,a_mask,a_shift,bits,prewrite,postwrite)\
502 static void adm8211_rf_write_syn_ ## name (struct ieee80211_hw *dev, \
503 u16 addr, u32 value) { \
504 struct adm8211_priv *priv = dev->priv; \
510 bitbuf = (value << v_shift) | (addr << a_shift); \
512 ADM8211_CSR_WRITE(SYNRF, ADM8211_SYNRF_IF_SELECT_1); \
513 ADM8211_CSR_READ(SYNRF); \
514 ADM8211_CSR_WRITE(SYNRF, ADM8211_SYNRF_IF_SELECT_0); \
515 ADM8211_CSR_READ(SYNRF); \
518 ADM8211_CSR_WRITE(SYNRF, ADM8211_SYNRF_WRITE_SYNDATA_0); \
519 ADM8211_CSR_READ(SYNRF); \
522 for (i = 0; i <= bits; i++) { \
523 if (bitbuf & (1 << (bits - i))) \
524 reg = ADM8211_SYNRF_WRITE_SYNDATA_1; \
526 reg = ADM8211_SYNRF_WRITE_SYNDATA_0; \
528 ADM8211_CSR_WRITE(SYNRF, reg); \
529 ADM8211_CSR_READ(SYNRF); \
531 ADM8211_CSR_WRITE(SYNRF, reg | ADM8211_SYNRF_WRITE_CLOCK_1); \
532 ADM8211_CSR_READ(SYNRF); \
533 ADM8211_CSR_WRITE(SYNRF, reg | ADM8211_SYNRF_WRITE_CLOCK_0); \
534 ADM8211_CSR_READ(SYNRF); \
537 if (postwrite == 1) { \
538 ADM8211_CSR_WRITE(SYNRF, reg | ADM8211_SYNRF_IF_SELECT_0); \
539 ADM8211_CSR_READ(SYNRF); \
541 if (postwrite == 2) { \
542 ADM8211_CSR_WRITE(SYNRF, reg | ADM8211_SYNRF_IF_SELECT_1); \
543 ADM8211_CSR_READ(SYNRF); \
546 ADM8211_CSR_WRITE(SYNRF, 0); \
547 ADM8211_CSR_READ(SYNRF); \
550 WRITE_SYN(max2820
, 0x00FFF, 0, 0x0F, 12, 15, 1, 1)
551 WRITE_SYN(al2210l
, 0xFFFFF, 4, 0x0F, 0, 23, 1, 1)
552 WRITE_SYN(rfmd2958
, 0x3FFFF, 0, 0x1F, 18, 23, 0, 1)
553 WRITE_SYN(rfmd2948
, 0x0FFFF, 4, 0x0F, 0, 21, 0, 2)
557 static int adm8211_write_bbp(struct ieee80211_hw
*dev
, u8 addr
, u8 data
)
559 struct adm8211_priv
*priv
= dev
->priv
;
560 unsigned int timeout
;
564 while (timeout
> 0) {
565 reg
= ADM8211_CSR_READ(BBPCTL
);
566 if (!(reg
& (ADM8211_BBPCTL_WR
| ADM8211_BBPCTL_RD
)))
573 printk(KERN_DEBUG
"%s: adm8211_write_bbp(%d,%d) failed"
574 " prewrite (reg=0x%08x)\n",
575 wiphy_name(dev
->wiphy
), addr
, data
, reg
);
579 switch (priv
->bbp_type
) {
580 case ADM8211_TYPE_INTERSIL
:
581 reg
= ADM8211_BBPCTL_MMISEL
; /* three wire interface */
583 case ADM8211_TYPE_RFMD
:
584 reg
= (0x20 << 24) | ADM8211_BBPCTL_TXCE
| ADM8211_BBPCTL_CCAP
|
587 case ADM8211_TYPE_ADMTEK
:
588 reg
= (0x20 << 24) | ADM8211_BBPCTL_TXCE
| ADM8211_BBPCTL_CCAP
|
592 reg
|= ADM8211_BBPCTL_WR
| (addr
<< 8) | data
;
594 ADM8211_CSR_WRITE(BBPCTL
, reg
);
597 while (timeout
> 0) {
598 reg
= ADM8211_CSR_READ(BBPCTL
);
599 if (!(reg
& ADM8211_BBPCTL_WR
))
606 ADM8211_CSR_WRITE(BBPCTL
, ADM8211_CSR_READ(BBPCTL
) &
608 printk(KERN_DEBUG
"%s: adm8211_write_bbp(%d,%d) failed"
609 " postwrite (reg=0x%08x)\n",
610 wiphy_name(dev
->wiphy
), addr
, data
, reg
);
617 static int adm8211_rf_set_channel(struct ieee80211_hw
*dev
, unsigned int chan
)
619 static const u32 adm8211_rfmd2958_reg5
[] =
620 {0x22BD, 0x22D2, 0x22E8, 0x22FE, 0x2314, 0x232A, 0x2340,
621 0x2355, 0x236B, 0x2381, 0x2397, 0x23AD, 0x23C2, 0x23F7};
622 static const u32 adm8211_rfmd2958_reg6
[] =
623 {0x05D17, 0x3A2E8, 0x2E8BA, 0x22E8B, 0x1745D, 0x0BA2E, 0x00000,
624 0x345D1, 0x28BA2, 0x1D174, 0x11745, 0x05D17, 0x3A2E8, 0x11745};
626 struct adm8211_priv
*priv
= dev
->priv
;
627 u8 ant_power
= priv
->ant_power
> 0x3F ?
628 priv
->eeprom
->antenna_power
[chan
- 1] : priv
->ant_power
;
629 u8 tx_power
= priv
->tx_power
> 0x3F ?
630 priv
->eeprom
->tx_power
[chan
- 1] : priv
->tx_power
;
631 u8 lpf_cutoff
= priv
->lpf_cutoff
== 0xFF ?
632 priv
->eeprom
->lpf_cutoff
[chan
- 1] : priv
->lpf_cutoff
;
633 u8 lnags_thresh
= priv
->lnags_threshold
== 0xFF ?
634 priv
->eeprom
->lnags_threshold
[chan
- 1] : priv
->lnags_threshold
;
639 /* Program synthesizer to new channel */
640 switch (priv
->transceiver_type
) {
641 case ADM8211_RFMD2958
:
642 case ADM8211_RFMD2958_RF3000_CONTROL_POWER
:
643 adm8211_rf_write_syn_rfmd2958(dev
, 0x00, 0x04007);
644 adm8211_rf_write_syn_rfmd2958(dev
, 0x02, 0x00033);
646 adm8211_rf_write_syn_rfmd2958(dev
, 0x05,
647 adm8211_rfmd2958_reg5
[chan
- 1]);
648 adm8211_rf_write_syn_rfmd2958(dev
, 0x06,
649 adm8211_rfmd2958_reg6
[chan
- 1]);
652 case ADM8211_RFMD2948
:
653 adm8211_rf_write_syn_rfmd2948(dev
, SI4126_MAIN_CONF
,
654 SI4126_MAIN_XINDIV2
);
655 adm8211_rf_write_syn_rfmd2948(dev
, SI4126_POWERDOWN
,
656 SI4126_POWERDOWN_PDIB
|
657 SI4126_POWERDOWN_PDRB
);
658 adm8211_rf_write_syn_rfmd2948(dev
, SI4126_PHASE_DET_GAIN
, 0);
659 adm8211_rf_write_syn_rfmd2948(dev
, SI4126_RF2_N_DIV
,
661 2110 : (2033 + (chan
* 5))));
662 adm8211_rf_write_syn_rfmd2948(dev
, SI4126_IF_N_DIV
, 1496);
663 adm8211_rf_write_syn_rfmd2948(dev
, SI4126_RF2_R_DIV
, 44);
664 adm8211_rf_write_syn_rfmd2948(dev
, SI4126_IF_R_DIV
, 44);
667 case ADM8211_MAX2820
:
668 adm8211_rf_write_syn_max2820(dev
, 0x3,
669 (chan
== 14 ? 0x054 : (0x7 + (chan
* 5))));
672 case ADM8211_AL2210L
:
673 adm8211_rf_write_syn_al2210l(dev
, 0x0,
674 (chan
== 14 ? 0x229B4 : (0x22967 + (chan
* 5))));
678 printk(KERN_DEBUG
"%s: unsupported transceiver type %d\n",
679 wiphy_name(dev
->wiphy
), priv
->transceiver_type
);
684 if (priv
->bbp_type
== ADM8211_TYPE_RFMD
) {
686 /* SMC 2635W specific? adm8211b doesn't use the 2948 though.. */
687 /* TODO: remove if SMC 2635W doesn't need this */
688 if (priv
->transceiver_type
== ADM8211_RFMD2948
) {
689 reg
= ADM8211_CSR_READ(GPIO
);
691 reg
|= ADM8211_CSR_GPIO_EN0
;
693 reg
|= ADM8211_CSR_GPIO_O0
;
694 ADM8211_CSR_WRITE(GPIO
, reg
);
697 if (priv
->transceiver_type
== ADM8211_RFMD2958
) {
699 adm8211_rf_write_syn_rfmd2958(dev
, 0x0B, 0x07100);
700 /* set PCNT1 P_DESIRED/MID_BIAS */
701 reg
= le16_to_cpu(priv
->eeprom
->cr49
);
704 reg
|= ant_power
<< 9;
705 adm8211_rf_write_syn_rfmd2958(dev
, 0x0A, reg
);
706 /* set TXRX TX_GAIN */
707 adm8211_rf_write_syn_rfmd2958(dev
, 0x09, 0x00050 |
708 (priv
->pdev
->revision
< ADM8211_REV_CA
? tx_power
: 0));
710 reg
= ADM8211_CSR_READ(PLCPHD
);
712 reg
|= tx_power
<< 18;
713 ADM8211_CSR_WRITE(PLCPHD
, reg
);
716 ADM8211_CSR_WRITE(SYNRF
, ADM8211_SYNRF_SELRF
|
717 ADM8211_SYNRF_PE1
| ADM8211_SYNRF_PHYRST
);
718 ADM8211_CSR_READ(SYNRF
);
722 if (priv
->transceiver_type
!= ADM8211_RFMD2958
)
723 adm8211_write_bbp(dev
, RF3000_TX_VAR_GAIN__TX_LEN_EXT
,
725 adm8211_write_bbp(dev
, RF3000_LOW_GAIN_CALIB
, lpf_cutoff
);
726 adm8211_write_bbp(dev
, RF3000_HIGH_GAIN_CALIB
, lnags_thresh
);
727 adm8211_write_bbp(dev
, 0x1c, priv
->pdev
->revision
== ADM8211_REV_BA
?
728 priv
->eeprom
->cr28
: 0);
729 adm8211_write_bbp(dev
, 0x1d, priv
->eeprom
->cr29
);
731 ADM8211_CSR_WRITE(SYNRF
, 0);
733 /* Nothing to do for ADMtek BBP */
734 } else if (priv
->bbp_type
!= ADM8211_TYPE_ADMTEK
)
735 printk(KERN_DEBUG
"%s: unsupported BBP type %d\n",
736 wiphy_name(dev
->wiphy
), priv
->bbp_type
);
740 /* update current channel for adhoc (and maybe AP mode) */
741 reg
= ADM8211_CSR_READ(CAP0
);
744 ADM8211_CSR_WRITE(CAP0
, reg
);
749 static void adm8211_update_mode(struct ieee80211_hw
*dev
)
751 struct adm8211_priv
*priv
= dev
->priv
;
755 priv
->soft_rx_crc
= 0;
756 switch (priv
->mode
) {
757 case NL80211_IFTYPE_STATION
:
758 priv
->nar
&= ~(ADM8211_NAR_PR
| ADM8211_NAR_EA
);
759 priv
->nar
|= ADM8211_NAR_ST
| ADM8211_NAR_SR
;
761 case NL80211_IFTYPE_ADHOC
:
762 priv
->nar
&= ~ADM8211_NAR_PR
;
763 priv
->nar
|= ADM8211_NAR_EA
| ADM8211_NAR_ST
| ADM8211_NAR_SR
;
765 /* don't trust the error bits on rev 0x20 and up in adhoc */
766 if (priv
->pdev
->revision
>= ADM8211_REV_BA
)
767 priv
->soft_rx_crc
= 1;
769 case NL80211_IFTYPE_MONITOR
:
770 priv
->nar
&= ~(ADM8211_NAR_EA
| ADM8211_NAR_ST
);
771 priv
->nar
|= ADM8211_NAR_PR
| ADM8211_NAR_SR
;
778 static void adm8211_hw_init_syn(struct ieee80211_hw
*dev
)
780 struct adm8211_priv
*priv
= dev
->priv
;
782 switch (priv
->transceiver_type
) {
783 case ADM8211_RFMD2958
:
784 case ADM8211_RFMD2958_RF3000_CONTROL_POWER
:
785 /* comments taken from ADMtek vendor driver */
787 /* Reset RF2958 after power on */
788 adm8211_rf_write_syn_rfmd2958(dev
, 0x1F, 0x00000);
789 /* Initialize RF VCO Core Bias to maximum */
790 adm8211_rf_write_syn_rfmd2958(dev
, 0x0C, 0x3001F);
791 /* Initialize IF PLL */
792 adm8211_rf_write_syn_rfmd2958(dev
, 0x01, 0x29C03);
793 /* Initialize IF PLL Coarse Tuning */
794 adm8211_rf_write_syn_rfmd2958(dev
, 0x03, 0x1FF6F);
795 /* Initialize RF PLL */
796 adm8211_rf_write_syn_rfmd2958(dev
, 0x04, 0x29403);
797 /* Initialize RF PLL Coarse Tuning */
798 adm8211_rf_write_syn_rfmd2958(dev
, 0x07, 0x1456F);
799 /* Initialize TX gain and filter BW (R9) */
800 adm8211_rf_write_syn_rfmd2958(dev
, 0x09,
801 (priv
->transceiver_type
== ADM8211_RFMD2958
?
803 /* Initialize CAL register */
804 adm8211_rf_write_syn_rfmd2958(dev
, 0x08, 0x3FFF8);
807 case ADM8211_MAX2820
:
808 adm8211_rf_write_syn_max2820(dev
, 0x1, 0x01E);
809 adm8211_rf_write_syn_max2820(dev
, 0x2, 0x001);
810 adm8211_rf_write_syn_max2820(dev
, 0x3, 0x054);
811 adm8211_rf_write_syn_max2820(dev
, 0x4, 0x310);
812 adm8211_rf_write_syn_max2820(dev
, 0x5, 0x000);
815 case ADM8211_AL2210L
:
816 adm8211_rf_write_syn_al2210l(dev
, 0x0, 0x0196C);
817 adm8211_rf_write_syn_al2210l(dev
, 0x1, 0x007CB);
818 adm8211_rf_write_syn_al2210l(dev
, 0x2, 0x3582F);
819 adm8211_rf_write_syn_al2210l(dev
, 0x3, 0x010A9);
820 adm8211_rf_write_syn_al2210l(dev
, 0x4, 0x77280);
821 adm8211_rf_write_syn_al2210l(dev
, 0x5, 0x45641);
822 adm8211_rf_write_syn_al2210l(dev
, 0x6, 0xEA130);
823 adm8211_rf_write_syn_al2210l(dev
, 0x7, 0x80000);
824 adm8211_rf_write_syn_al2210l(dev
, 0x8, 0x7850F);
825 adm8211_rf_write_syn_al2210l(dev
, 0x9, 0xF900C);
826 adm8211_rf_write_syn_al2210l(dev
, 0xA, 0x00000);
827 adm8211_rf_write_syn_al2210l(dev
, 0xB, 0x00000);
830 case ADM8211_RFMD2948
:
836 static int adm8211_hw_init_bbp(struct ieee80211_hw
*dev
)
838 struct adm8211_priv
*priv
= dev
->priv
;
841 /* write addresses */
842 if (priv
->bbp_type
== ADM8211_TYPE_INTERSIL
) {
843 ADM8211_CSR_WRITE(MMIWA
, 0x100E0C0A);
844 ADM8211_CSR_WRITE(MMIRD0
, 0x00007C7E);
845 ADM8211_CSR_WRITE(MMIRD1
, 0x00100000);
846 } else if (priv
->bbp_type
== ADM8211_TYPE_RFMD
||
847 priv
->bbp_type
== ADM8211_TYPE_ADMTEK
) {
848 /* check specific BBP type */
849 switch (priv
->specific_bbptype
) {
850 case ADM8211_BBP_RFMD3000
:
851 case ADM8211_BBP_RFMD3002
:
852 ADM8211_CSR_WRITE(MMIWA
, 0x00009101);
853 ADM8211_CSR_WRITE(MMIRD0
, 0x00000301);
856 case ADM8211_BBP_ADM8011
:
857 ADM8211_CSR_WRITE(MMIWA
, 0x00008903);
858 ADM8211_CSR_WRITE(MMIRD0
, 0x00001716);
860 reg
= ADM8211_CSR_READ(BBPCTL
);
861 reg
&= ~ADM8211_BBPCTL_TYPE
;
863 ADM8211_CSR_WRITE(BBPCTL
, reg
);
867 switch (priv
->pdev
->revision
) {
869 if (priv
->transceiver_type
== ADM8211_RFMD2958
||
870 priv
->transceiver_type
== ADM8211_RFMD2958_RF3000_CONTROL_POWER
||
871 priv
->transceiver_type
== ADM8211_RFMD2948
)
872 ADM8211_CSR_WRITE(SYNCTL
, 0x1 << 22);
873 else if (priv
->transceiver_type
== ADM8211_MAX2820
||
874 priv
->transceiver_type
== ADM8211_AL2210L
)
875 ADM8211_CSR_WRITE(SYNCTL
, 0x3 << 22);
879 reg
= ADM8211_CSR_READ(MMIRD1
);
882 ADM8211_CSR_WRITE(MMIRD1
, reg
);
888 ADM8211_CSR_WRITE(MMIRD1
, 0x7e100000);
893 ADM8211_CSR_WRITE(MACTEST
, 0x800);
896 adm8211_hw_init_syn(dev
);
898 /* Set RF Power control IF pin to PE1+PHYRST# */
899 ADM8211_CSR_WRITE(SYNRF
, ADM8211_SYNRF_SELRF
|
900 ADM8211_SYNRF_PE1
| ADM8211_SYNRF_PHYRST
);
901 ADM8211_CSR_READ(SYNRF
);
905 if (priv
->bbp_type
== ADM8211_TYPE_RFMD
) {
910 * 15: 50 (chan 1..13; chan 14: d0)
914 adm8211_write_bbp(dev
, RF3000_CCA_CTRL
, 0x80);
915 /* antenna selection: diversity */
916 adm8211_write_bbp(dev
, RF3000_DIVERSITY__RSSI
, 0x80);
917 adm8211_write_bbp(dev
, RF3000_TX_VAR_GAIN__TX_LEN_EXT
, 0x74);
918 adm8211_write_bbp(dev
, RF3000_LOW_GAIN_CALIB
, 0x38);
919 adm8211_write_bbp(dev
, RF3000_HIGH_GAIN_CALIB
, 0x40);
921 if (priv
->eeprom
->major_version
< 2) {
922 adm8211_write_bbp(dev
, 0x1c, 0x00);
923 adm8211_write_bbp(dev
, 0x1d, 0x80);
925 if (priv
->pdev
->revision
== ADM8211_REV_BA
)
926 adm8211_write_bbp(dev
, 0x1c, priv
->eeprom
->cr28
);
928 adm8211_write_bbp(dev
, 0x1c, 0x00);
930 adm8211_write_bbp(dev
, 0x1d, priv
->eeprom
->cr29
);
932 } else if (priv
->bbp_type
== ADM8211_TYPE_ADMTEK
) {
934 adm8211_write_bbp(dev
, 0x00, 0xFF);
935 /* antenna selection: diversity */
936 adm8211_write_bbp(dev
, 0x07, 0x0A);
938 /* TODO: find documentation for this */
939 switch (priv
->transceiver_type
) {
940 case ADM8211_RFMD2958
:
941 case ADM8211_RFMD2958_RF3000_CONTROL_POWER
:
942 adm8211_write_bbp(dev
, 0x00, 0x00);
943 adm8211_write_bbp(dev
, 0x01, 0x00);
944 adm8211_write_bbp(dev
, 0x02, 0x00);
945 adm8211_write_bbp(dev
, 0x03, 0x00);
946 adm8211_write_bbp(dev
, 0x06, 0x0f);
947 adm8211_write_bbp(dev
, 0x09, 0x00);
948 adm8211_write_bbp(dev
, 0x0a, 0x00);
949 adm8211_write_bbp(dev
, 0x0b, 0x00);
950 adm8211_write_bbp(dev
, 0x0c, 0x00);
951 adm8211_write_bbp(dev
, 0x0f, 0xAA);
952 adm8211_write_bbp(dev
, 0x10, 0x8c);
953 adm8211_write_bbp(dev
, 0x11, 0x43);
954 adm8211_write_bbp(dev
, 0x18, 0x40);
955 adm8211_write_bbp(dev
, 0x20, 0x23);
956 adm8211_write_bbp(dev
, 0x21, 0x02);
957 adm8211_write_bbp(dev
, 0x22, 0x28);
958 adm8211_write_bbp(dev
, 0x23, 0x30);
959 adm8211_write_bbp(dev
, 0x24, 0x2d);
960 adm8211_write_bbp(dev
, 0x28, 0x35);
961 adm8211_write_bbp(dev
, 0x2a, 0x8c);
962 adm8211_write_bbp(dev
, 0x2b, 0x81);
963 adm8211_write_bbp(dev
, 0x2c, 0x44);
964 adm8211_write_bbp(dev
, 0x2d, 0x0A);
965 adm8211_write_bbp(dev
, 0x29, 0x40);
966 adm8211_write_bbp(dev
, 0x60, 0x08);
967 adm8211_write_bbp(dev
, 0x64, 0x01);
970 case ADM8211_MAX2820
:
971 adm8211_write_bbp(dev
, 0x00, 0x00);
972 adm8211_write_bbp(dev
, 0x01, 0x00);
973 adm8211_write_bbp(dev
, 0x02, 0x00);
974 adm8211_write_bbp(dev
, 0x03, 0x00);
975 adm8211_write_bbp(dev
, 0x06, 0x0f);
976 adm8211_write_bbp(dev
, 0x09, 0x05);
977 adm8211_write_bbp(dev
, 0x0a, 0x02);
978 adm8211_write_bbp(dev
, 0x0b, 0x00);
979 adm8211_write_bbp(dev
, 0x0c, 0x0f);
980 adm8211_write_bbp(dev
, 0x0f, 0x55);
981 adm8211_write_bbp(dev
, 0x10, 0x8d);
982 adm8211_write_bbp(dev
, 0x11, 0x43);
983 adm8211_write_bbp(dev
, 0x18, 0x4a);
984 adm8211_write_bbp(dev
, 0x20, 0x20);
985 adm8211_write_bbp(dev
, 0x21, 0x02);
986 adm8211_write_bbp(dev
, 0x22, 0x23);
987 adm8211_write_bbp(dev
, 0x23, 0x30);
988 adm8211_write_bbp(dev
, 0x24, 0x2d);
989 adm8211_write_bbp(dev
, 0x2a, 0x8c);
990 adm8211_write_bbp(dev
, 0x2b, 0x81);
991 adm8211_write_bbp(dev
, 0x2c, 0x44);
992 adm8211_write_bbp(dev
, 0x29, 0x4a);
993 adm8211_write_bbp(dev
, 0x60, 0x2b);
994 adm8211_write_bbp(dev
, 0x64, 0x01);
997 case ADM8211_AL2210L
:
998 adm8211_write_bbp(dev
, 0x00, 0x00);
999 adm8211_write_bbp(dev
, 0x01, 0x00);
1000 adm8211_write_bbp(dev
, 0x02, 0x00);
1001 adm8211_write_bbp(dev
, 0x03, 0x00);
1002 adm8211_write_bbp(dev
, 0x06, 0x0f);
1003 adm8211_write_bbp(dev
, 0x07, 0x05);
1004 adm8211_write_bbp(dev
, 0x08, 0x03);
1005 adm8211_write_bbp(dev
, 0x09, 0x00);
1006 adm8211_write_bbp(dev
, 0x0a, 0x00);
1007 adm8211_write_bbp(dev
, 0x0b, 0x00);
1008 adm8211_write_bbp(dev
, 0x0c, 0x10);
1009 adm8211_write_bbp(dev
, 0x0f, 0x55);
1010 adm8211_write_bbp(dev
, 0x10, 0x8d);
1011 adm8211_write_bbp(dev
, 0x11, 0x43);
1012 adm8211_write_bbp(dev
, 0x18, 0x4a);
1013 adm8211_write_bbp(dev
, 0x20, 0x20);
1014 adm8211_write_bbp(dev
, 0x21, 0x02);
1015 adm8211_write_bbp(dev
, 0x22, 0x23);
1016 adm8211_write_bbp(dev
, 0x23, 0x30);
1017 adm8211_write_bbp(dev
, 0x24, 0x2d);
1018 adm8211_write_bbp(dev
, 0x2a, 0xaa);
1019 adm8211_write_bbp(dev
, 0x2b, 0x81);
1020 adm8211_write_bbp(dev
, 0x2c, 0x44);
1021 adm8211_write_bbp(dev
, 0x29, 0xfa);
1022 adm8211_write_bbp(dev
, 0x60, 0x2d);
1023 adm8211_write_bbp(dev
, 0x64, 0x01);
1026 case ADM8211_RFMD2948
:
1030 printk(KERN_DEBUG
"%s: unsupported transceiver %d\n",
1031 wiphy_name(dev
->wiphy
), priv
->transceiver_type
);
1035 printk(KERN_DEBUG
"%s: unsupported BBP %d\n",
1036 wiphy_name(dev
->wiphy
), priv
->bbp_type
);
1038 ADM8211_CSR_WRITE(SYNRF
, 0);
1040 /* Set RF CAL control source to MAC control */
1041 reg
= ADM8211_CSR_READ(SYNCTL
);
1042 reg
|= ADM8211_SYNCTL_SELCAL
;
1043 ADM8211_CSR_WRITE(SYNCTL
, reg
);
1048 /* configures hw beacons/probe responses */
1049 static int adm8211_set_rate(struct ieee80211_hw
*dev
)
1051 struct adm8211_priv
*priv
= dev
->priv
;
1054 u8 rate_buf
[12] = {0};
1056 /* write supported rates */
1057 if (priv
->pdev
->revision
!= ADM8211_REV_BA
) {
1058 rate_buf
[0] = ARRAY_SIZE(adm8211_rates
);
1059 for (i
= 0; i
< ARRAY_SIZE(adm8211_rates
); i
++)
1060 rate_buf
[i
+ 1] = (adm8211_rates
[i
].bitrate
/ 5) | 0x80;
1062 /* workaround for rev BA specific bug */
1070 adm8211_write_sram_bytes(dev
, ADM8211_SRAM_SUPP_RATE
, rate_buf
,
1071 ARRAY_SIZE(adm8211_rates
) + 1);
1073 reg
= ADM8211_CSR_READ(PLCPHD
) & 0x00FFFFFF; /* keep bits 0-23 */
1074 reg
|= 1 << 15; /* short preamble */
1076 ADM8211_CSR_WRITE(PLCPHD
, reg
);
1078 /* MTMLT = 512 TU (max TX MSDU lifetime)
1079 * BCNTSIG = plcp_signal (beacon, probe resp, and atim TX rate)
1080 * SRTYLIM = 224 (short retry limit, TX header value is default) */
1081 ADM8211_CSR_WRITE(TXLMT
, (512 << 16) | (110 << 8) | (224 << 0));
1086 static void adm8211_hw_init(struct ieee80211_hw
*dev
)
1088 struct adm8211_priv
*priv
= dev
->priv
;
1092 reg
= ADM8211_CSR_READ(PAR
);
1093 reg
|= ADM8211_PAR_MRLE
| ADM8211_PAR_MRME
;
1094 reg
&= ~(ADM8211_PAR_BAR
| ADM8211_PAR_CAL
);
1096 if (!pci_set_mwi(priv
->pdev
)) {
1098 pci_read_config_byte(priv
->pdev
, PCI_CACHE_LINE_SIZE
, &cline
);
1101 case 0x8: reg
|= (0x1 << 14);
1103 case 0x16: reg
|= (0x2 << 14);
1105 case 0x32: reg
|= (0x3 << 14);
1107 default: reg
|= (0x0 << 14);
1112 ADM8211_CSR_WRITE(PAR
, reg
);
1114 reg
= ADM8211_CSR_READ(CSR_TEST1
);
1115 reg
&= ~(0xF << 28);
1116 reg
|= (1 << 28) | (1 << 31);
1117 ADM8211_CSR_WRITE(CSR_TEST1
, reg
);
1119 /* lose link after 4 lost beacons */
1120 reg
= (0x04 << 21) | ADM8211_WCSR_TSFTWE
| ADM8211_WCSR_LSOE
;
1121 ADM8211_CSR_WRITE(WCSR
, reg
);
1123 /* Disable APM, enable receive FIFO threshold, and set drain receive
1124 * threshold to store-and-forward */
1125 reg
= ADM8211_CSR_READ(CMDR
);
1126 reg
&= ~(ADM8211_CMDR_APM
| ADM8211_CMDR_DRT
);
1127 reg
|= ADM8211_CMDR_RTE
| ADM8211_CMDR_DRT_SF
;
1128 ADM8211_CSR_WRITE(CMDR
, reg
);
1130 adm8211_set_rate(dev
);
1134 * PWR0PAPE = 8 us or 5 us
1135 * PWR1PAPE = 1 us or 3 us
1140 * PWR0TXPE = 8 or 6 */
1141 if (priv
->pdev
->revision
< ADM8211_REV_CA
)
1142 ADM8211_CSR_WRITE(TOFS2
, 0x8815cd18);
1144 ADM8211_CSR_WRITE(TOFS2
, 0x8535cd16);
1146 /* Enable store and forward for transmit */
1147 priv
->nar
= ADM8211_NAR_SF
| ADM8211_NAR_PB
;
1148 ADM8211_CSR_WRITE(NAR
, priv
->nar
);
1151 ADM8211_CSR_WRITE(SYNRF
, ADM8211_SYNRF_RADIO
);
1152 ADM8211_CSR_READ(SYNRF
);
1154 ADM8211_CSR_WRITE(SYNRF
, 0);
1155 ADM8211_CSR_READ(SYNRF
);
1158 /* Set CFP Max Duration to 0x10 TU */
1159 reg
= ADM8211_CSR_READ(CFPP
);
1160 reg
&= ~(0xffff << 8);
1162 ADM8211_CSR_WRITE(CFPP
, reg
);
1164 /* USCNT = 0x16 (number of system clocks, 22 MHz, in 1us
1165 * TUCNT = 0x3ff - Tu counter 1024 us */
1166 ADM8211_CSR_WRITE(TOFS0
, (0x16 << 24) | 0x3ff);
1168 /* SLOT=20 us, SIFS=110 cycles of 22 MHz (5 us),
1169 * DIFS=50 us, EIFS=100 us */
1170 if (priv
->pdev
->revision
< ADM8211_REV_CA
)
1171 ADM8211_CSR_WRITE(IFST
, (20 << 23) | (110 << 15) |
1174 ADM8211_CSR_WRITE(IFST
, (20 << 23) | (24 << 15) |
1177 /* PCNT = 1 (MAC idle time awake/sleep, unit S)
1178 * RMRD = 2346 * 8 + 1 us (max RX duration) */
1179 ADM8211_CSR_WRITE(RMD
, (1 << 16) | 18769);
1181 /* MART=65535 us, MIRT=256 us, TSFTOFST=0 us */
1182 ADM8211_CSR_WRITE(RSPT
, 0xffffff00);
1184 /* Initialize BBP (and SYN) */
1185 adm8211_hw_init_bbp(dev
);
1187 /* make sure interrupts are off */
1188 ADM8211_CSR_WRITE(IER
, 0);
1190 /* ACK interrupts */
1191 ADM8211_CSR_WRITE(STSR
, ADM8211_CSR_READ(STSR
));
1193 /* Setup WEP (turns it off for now) */
1194 reg
= ADM8211_CSR_READ(MACTEST
);
1196 ADM8211_CSR_WRITE(MACTEST
, reg
);
1198 reg
= ADM8211_CSR_READ(WEPCTL
);
1199 reg
&= ~ADM8211_WEPCTL_WEPENABLE
;
1200 reg
|= ADM8211_WEPCTL_WEPRXBYP
;
1201 ADM8211_CSR_WRITE(WEPCTL
, reg
);
1203 /* Clear the missed-packet counter. */
1204 ADM8211_CSR_READ(LPC
);
1207 static int adm8211_hw_reset(struct ieee80211_hw
*dev
)
1209 struct adm8211_priv
*priv
= dev
->priv
;
1213 /* Power-on issue */
1214 /* TODO: check if this is necessary */
1215 ADM8211_CSR_WRITE(FRCTL
, 0);
1217 /* Reset the chip */
1218 tmp
= ADM8211_CSR_READ(PAR
);
1219 ADM8211_CSR_WRITE(PAR
, ADM8211_PAR_SWR
);
1221 while ((ADM8211_CSR_READ(PAR
) & ADM8211_PAR_SWR
) && timeout
--)
1227 ADM8211_CSR_WRITE(PAR
, tmp
);
1229 if (priv
->pdev
->revision
== ADM8211_REV_BA
&&
1230 (priv
->transceiver_type
== ADM8211_RFMD2958_RF3000_CONTROL_POWER
||
1231 priv
->transceiver_type
== ADM8211_RFMD2958
)) {
1232 reg
= ADM8211_CSR_READ(CSR_TEST1
);
1233 reg
|= (1 << 4) | (1 << 5);
1234 ADM8211_CSR_WRITE(CSR_TEST1
, reg
);
1235 } else if (priv
->pdev
->revision
== ADM8211_REV_CA
) {
1236 reg
= ADM8211_CSR_READ(CSR_TEST1
);
1237 reg
&= ~((1 << 4) | (1 << 5));
1238 ADM8211_CSR_WRITE(CSR_TEST1
, reg
);
1241 ADM8211_CSR_WRITE(FRCTL
, 0);
1243 reg
= ADM8211_CSR_READ(CSR_TEST0
);
1244 reg
|= ADM8211_CSR_TEST0_EPRLD
; /* EEPROM Recall */
1245 ADM8211_CSR_WRITE(CSR_TEST0
, reg
);
1247 adm8211_clear_sram(dev
);
1252 static u64
adm8211_get_tsft(struct ieee80211_hw
*dev
)
1254 struct adm8211_priv
*priv
= dev
->priv
;
1258 tsftl
= ADM8211_CSR_READ(TSFTL
);
1259 tsft
= ADM8211_CSR_READ(TSFTH
);
1266 static void adm8211_set_interval(struct ieee80211_hw
*dev
,
1267 unsigned short bi
, unsigned short li
)
1269 struct adm8211_priv
*priv
= dev
->priv
;
1272 /* BP (beacon interval) = data->beacon_interval
1273 * LI (listen interval) = data->listen_interval (in beacon intervals) */
1274 reg
= (bi
<< 16) | li
;
1275 ADM8211_CSR_WRITE(BPLI
, reg
);
1278 static void adm8211_set_bssid(struct ieee80211_hw
*dev
, const u8
*bssid
)
1280 struct adm8211_priv
*priv
= dev
->priv
;
1283 ADM8211_CSR_WRITE(BSSID0
, le32_to_cpu(*(__le32
*)bssid
));
1284 reg
= ADM8211_CSR_READ(ABDA1
);
1286 reg
|= (bssid
[4] << 16) | (bssid
[5] << 24);
1287 ADM8211_CSR_WRITE(ABDA1
, reg
);
1290 static int adm8211_config(struct ieee80211_hw
*dev
, u32 changed
)
1292 struct adm8211_priv
*priv
= dev
->priv
;
1293 struct ieee80211_conf
*conf
= &dev
->conf
;
1294 int channel
= ieee80211_frequency_to_channel(conf
->channel
->center_freq
);
1296 if (channel
!= priv
->channel
) {
1297 priv
->channel
= channel
;
1298 adm8211_rf_set_channel(dev
, priv
->channel
);
1304 static void adm8211_bss_info_changed(struct ieee80211_hw
*dev
,
1305 struct ieee80211_vif
*vif
,
1306 struct ieee80211_bss_conf
*conf
,
1309 struct adm8211_priv
*priv
= dev
->priv
;
1311 if (!(changes
& BSS_CHANGED_BSSID
))
1314 if (memcmp(conf
->bssid
, priv
->bssid
, ETH_ALEN
)) {
1315 adm8211_set_bssid(dev
, conf
->bssid
);
1316 memcpy(priv
->bssid
, conf
->bssid
, ETH_ALEN
);
1320 static u64
adm8211_prepare_multicast(struct ieee80211_hw
*hw
,
1321 int mc_count
, struct dev_addr_list
*mclist
)
1323 unsigned int bit_nr
, i
;
1326 mc_filter
[1] = mc_filter
[0] = 0;
1328 for (i
= 0; i
< mc_count
; i
++) {
1331 bit_nr
= ether_crc(ETH_ALEN
, mclist
->dmi_addr
) >> 26;
1334 mc_filter
[bit_nr
>> 5] |= 1 << (bit_nr
& 31);
1335 mclist
= mclist
->next
;
1338 return mc_filter
[0] | ((u64
)(mc_filter
[1]) << 32);
1341 static void adm8211_configure_filter(struct ieee80211_hw
*dev
,
1342 unsigned int changed_flags
,
1343 unsigned int *total_flags
,
1346 static const u8 bcast
[ETH_ALEN
] = { 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF };
1347 struct adm8211_priv
*priv
= dev
->priv
;
1348 unsigned int new_flags
;
1351 mc_filter
[0] = multicast
;
1352 mc_filter
[1] = multicast
>> 32;
1356 if (*total_flags
& FIF_PROMISC_IN_BSS
) {
1357 new_flags
|= FIF_PROMISC_IN_BSS
;
1358 priv
->nar
|= ADM8211_NAR_PR
;
1359 priv
->nar
&= ~ADM8211_NAR_MM
;
1360 mc_filter
[1] = mc_filter
[0] = ~0;
1361 } else if (*total_flags
& FIF_ALLMULTI
|| multicast
== ~(0ULL)) {
1362 new_flags
|= FIF_ALLMULTI
;
1363 priv
->nar
&= ~ADM8211_NAR_PR
;
1364 priv
->nar
|= ADM8211_NAR_MM
;
1365 mc_filter
[1] = mc_filter
[0] = ~0;
1367 priv
->nar
&= ~(ADM8211_NAR_MM
| ADM8211_NAR_PR
);
1372 ADM8211_CSR_WRITE(MAR0
, mc_filter
[0]);
1373 ADM8211_CSR_WRITE(MAR1
, mc_filter
[1]);
1374 ADM8211_CSR_READ(NAR
);
1376 if (priv
->nar
& ADM8211_NAR_PR
)
1377 dev
->flags
|= IEEE80211_HW_RX_INCLUDES_FCS
;
1379 dev
->flags
&= ~IEEE80211_HW_RX_INCLUDES_FCS
;
1381 if (*total_flags
& FIF_BCN_PRBRESP_PROMISC
)
1382 adm8211_set_bssid(dev
, bcast
);
1384 adm8211_set_bssid(dev
, priv
->bssid
);
1388 *total_flags
= new_flags
;
1391 static int adm8211_add_interface(struct ieee80211_hw
*dev
,
1392 struct ieee80211_vif
*vif
)
1394 struct adm8211_priv
*priv
= dev
->priv
;
1395 if (priv
->mode
!= NL80211_IFTYPE_MONITOR
)
1398 switch (vif
->type
) {
1399 case NL80211_IFTYPE_STATION
:
1400 priv
->mode
= vif
->type
;
1408 ADM8211_CSR_WRITE(PAR0
, le32_to_cpu(*(__le32
*)vif
->addr
));
1409 ADM8211_CSR_WRITE(PAR1
, le16_to_cpu(*(__le16
*)(vif
->addr
+ 4)));
1411 adm8211_update_mode(dev
);
1418 static void adm8211_remove_interface(struct ieee80211_hw
*dev
,
1419 struct ieee80211_vif
*vif
)
1421 struct adm8211_priv
*priv
= dev
->priv
;
1422 priv
->mode
= NL80211_IFTYPE_MONITOR
;
1425 static int adm8211_init_rings(struct ieee80211_hw
*dev
)
1427 struct adm8211_priv
*priv
= dev
->priv
;
1428 struct adm8211_desc
*desc
= NULL
;
1429 struct adm8211_rx_ring_info
*rx_info
;
1430 struct adm8211_tx_ring_info
*tx_info
;
1433 for (i
= 0; i
< priv
->rx_ring_size
; i
++) {
1434 desc
= &priv
->rx_ring
[i
];
1436 desc
->length
= cpu_to_le32(RX_PKT_SIZE
);
1437 priv
->rx_buffers
[i
].skb
= NULL
;
1439 /* Mark the end of RX ring; hw returns to base address after this
1441 desc
->length
|= cpu_to_le32(RDES1_CONTROL_RER
);
1443 for (i
= 0; i
< priv
->rx_ring_size
; i
++) {
1444 desc
= &priv
->rx_ring
[i
];
1445 rx_info
= &priv
->rx_buffers
[i
];
1447 rx_info
->skb
= dev_alloc_skb(RX_PKT_SIZE
);
1448 if (rx_info
->skb
== NULL
)
1450 rx_info
->mapping
= pci_map_single(priv
->pdev
,
1451 skb_tail_pointer(rx_info
->skb
),
1453 PCI_DMA_FROMDEVICE
);
1454 desc
->buffer1
= cpu_to_le32(rx_info
->mapping
);
1455 desc
->status
= cpu_to_le32(RDES0_STATUS_OWN
| RDES0_STATUS_SQL
);
1458 /* Setup TX ring. TX buffers descriptors will be filled in as needed */
1459 for (i
= 0; i
< priv
->tx_ring_size
; i
++) {
1460 desc
= &priv
->tx_ring
[i
];
1461 tx_info
= &priv
->tx_buffers
[i
];
1463 tx_info
->skb
= NULL
;
1464 tx_info
->mapping
= 0;
1467 desc
->length
= cpu_to_le32(TDES1_CONTROL_TER
);
1469 priv
->cur_rx
= priv
->cur_tx
= priv
->dirty_tx
= 0;
1470 ADM8211_CSR_WRITE(RDB
, priv
->rx_ring_dma
);
1471 ADM8211_CSR_WRITE(TDBD
, priv
->tx_ring_dma
);
1476 static void adm8211_free_rings(struct ieee80211_hw
*dev
)
1478 struct adm8211_priv
*priv
= dev
->priv
;
1481 for (i
= 0; i
< priv
->rx_ring_size
; i
++) {
1482 if (!priv
->rx_buffers
[i
].skb
)
1487 priv
->rx_buffers
[i
].mapping
,
1488 RX_PKT_SIZE
, PCI_DMA_FROMDEVICE
);
1490 dev_kfree_skb(priv
->rx_buffers
[i
].skb
);
1493 for (i
= 0; i
< priv
->tx_ring_size
; i
++) {
1494 if (!priv
->tx_buffers
[i
].skb
)
1497 pci_unmap_single(priv
->pdev
,
1498 priv
->tx_buffers
[i
].mapping
,
1499 priv
->tx_buffers
[i
].skb
->len
,
1502 dev_kfree_skb(priv
->tx_buffers
[i
].skb
);
1506 static int adm8211_start(struct ieee80211_hw
*dev
)
1508 struct adm8211_priv
*priv
= dev
->priv
;
1511 /* Power up MAC and RF chips */
1512 retval
= adm8211_hw_reset(dev
);
1514 printk(KERN_ERR
"%s: hardware reset failed\n",
1515 wiphy_name(dev
->wiphy
));
1519 retval
= adm8211_init_rings(dev
);
1521 printk(KERN_ERR
"%s: failed to initialize rings\n",
1522 wiphy_name(dev
->wiphy
));
1527 adm8211_hw_init(dev
);
1528 adm8211_rf_set_channel(dev
, priv
->channel
);
1530 retval
= request_irq(priv
->pdev
->irq
, adm8211_interrupt
,
1531 IRQF_SHARED
, "adm8211", dev
);
1533 printk(KERN_ERR
"%s: failed to register IRQ handler\n",
1534 wiphy_name(dev
->wiphy
));
1538 ADM8211_CSR_WRITE(IER
, ADM8211_IER_NIE
| ADM8211_IER_AIE
|
1539 ADM8211_IER_RCIE
| ADM8211_IER_TCIE
|
1540 ADM8211_IER_TDUIE
| ADM8211_IER_GPTIE
);
1541 priv
->mode
= NL80211_IFTYPE_MONITOR
;
1542 adm8211_update_mode(dev
);
1543 ADM8211_CSR_WRITE(RDR
, 0);
1545 adm8211_set_interval(dev
, 100, 10);
1552 static void adm8211_stop(struct ieee80211_hw
*dev
)
1554 struct adm8211_priv
*priv
= dev
->priv
;
1556 priv
->mode
= NL80211_IFTYPE_UNSPECIFIED
;
1558 ADM8211_CSR_WRITE(NAR
, 0);
1559 ADM8211_CSR_WRITE(IER
, 0);
1560 ADM8211_CSR_READ(NAR
);
1562 free_irq(priv
->pdev
->irq
, dev
);
1564 adm8211_free_rings(dev
);
1567 static void adm8211_calc_durations(int *dur
, int *plcp
, size_t payload_len
, int len
,
1568 int plcp_signal
, int short_preamble
)
1570 /* Alternative calculation from NetBSD: */
1572 /* IEEE 802.11b durations for DSSS PHY in microseconds */
1573 #define IEEE80211_DUR_DS_LONG_PREAMBLE 144
1574 #define IEEE80211_DUR_DS_SHORT_PREAMBLE 72
1575 #define IEEE80211_DUR_DS_FAST_PLCPHDR 24
1576 #define IEEE80211_DUR_DS_SLOW_PLCPHDR 48
1577 #define IEEE80211_DUR_DS_SLOW_ACK 112
1578 #define IEEE80211_DUR_DS_FAST_ACK 56
1579 #define IEEE80211_DUR_DS_SLOW_CTS 112
1580 #define IEEE80211_DUR_DS_FAST_CTS 56
1581 #define IEEE80211_DUR_DS_SLOT 20
1582 #define IEEE80211_DUR_DS_SIFS 10
1586 *dur
= (80 * (24 + payload_len
) + plcp_signal
- 1)
1589 if (plcp_signal
<= PLCP_SIGNAL_2M
)
1590 /* 1-2Mbps WLAN: send ACK/CTS at 1Mbps */
1591 *dur
+= 3 * (IEEE80211_DUR_DS_SIFS
+
1592 IEEE80211_DUR_DS_SHORT_PREAMBLE
+
1593 IEEE80211_DUR_DS_FAST_PLCPHDR
) +
1594 IEEE80211_DUR_DS_SLOW_CTS
+ IEEE80211_DUR_DS_SLOW_ACK
;
1596 /* 5-11Mbps WLAN: send ACK/CTS at 2Mbps */
1597 *dur
+= 3 * (IEEE80211_DUR_DS_SIFS
+
1598 IEEE80211_DUR_DS_SHORT_PREAMBLE
+
1599 IEEE80211_DUR_DS_FAST_PLCPHDR
) +
1600 IEEE80211_DUR_DS_FAST_CTS
+ IEEE80211_DUR_DS_FAST_ACK
;
1602 /* lengthen duration if long preamble */
1603 if (!short_preamble
)
1604 *dur
+= 3 * (IEEE80211_DUR_DS_LONG_PREAMBLE
-
1605 IEEE80211_DUR_DS_SHORT_PREAMBLE
) +
1606 3 * (IEEE80211_DUR_DS_SLOW_PLCPHDR
-
1607 IEEE80211_DUR_DS_FAST_PLCPHDR
);
1610 *plcp
= (80 * len
) / plcp_signal
;
1611 remainder
= (80 * len
) % plcp_signal
;
1612 if (plcp_signal
== PLCP_SIGNAL_11M
&&
1613 remainder
<= 30 && remainder
> 0)
1614 *plcp
= (*plcp
| 0x8000) + 1;
1619 /* Transmit skb w/adm8211_tx_hdr (802.11 header created by hardware) */
1620 static void adm8211_tx_raw(struct ieee80211_hw
*dev
, struct sk_buff
*skb
,
1624 struct adm8211_priv
*priv
= dev
->priv
;
1625 unsigned long flags
;
1630 mapping
= pci_map_single(priv
->pdev
, skb
->data
, skb
->len
,
1633 spin_lock_irqsave(&priv
->lock
, flags
);
1635 if (priv
->cur_tx
- priv
->dirty_tx
== priv
->tx_ring_size
/ 2)
1636 flag
= TDES1_CONTROL_IC
| TDES1_CONTROL_LS
| TDES1_CONTROL_FS
;
1638 flag
= TDES1_CONTROL_LS
| TDES1_CONTROL_FS
;
1640 if (priv
->cur_tx
- priv
->dirty_tx
== priv
->tx_ring_size
- 2)
1641 ieee80211_stop_queue(dev
, 0);
1643 entry
= priv
->cur_tx
% priv
->tx_ring_size
;
1645 priv
->tx_buffers
[entry
].skb
= skb
;
1646 priv
->tx_buffers
[entry
].mapping
= mapping
;
1647 priv
->tx_buffers
[entry
].hdrlen
= hdrlen
;
1648 priv
->tx_ring
[entry
].buffer1
= cpu_to_le32(mapping
);
1650 if (entry
== priv
->tx_ring_size
- 1)
1651 flag
|= TDES1_CONTROL_TER
;
1652 priv
->tx_ring
[entry
].length
= cpu_to_le32(flag
| skb
->len
);
1654 /* Set TX rate (SIGNAL field in PLCP PPDU format) */
1655 flag
= TDES0_CONTROL_OWN
| (plcp_signal
<< 20) | 8 /* ? */;
1656 priv
->tx_ring
[entry
].status
= cpu_to_le32(flag
);
1660 spin_unlock_irqrestore(&priv
->lock
, flags
);
1662 /* Trigger transmit poll */
1663 ADM8211_CSR_WRITE(TDR
, 0);
1666 /* Put adm8211_tx_hdr on skb and transmit */
1667 static int adm8211_tx(struct ieee80211_hw
*dev
, struct sk_buff
*skb
)
1669 struct adm8211_tx_hdr
*txhdr
;
1670 size_t payload_len
, hdrlen
;
1671 int plcp
, dur
, len
, plcp_signal
, short_preamble
;
1672 struct ieee80211_hdr
*hdr
;
1673 struct ieee80211_tx_info
*info
= IEEE80211_SKB_CB(skb
);
1674 struct ieee80211_rate
*txrate
= ieee80211_get_tx_rate(dev
, info
);
1677 rc_flags
= info
->control
.rates
[0].flags
;
1678 short_preamble
= !!(rc_flags
& IEEE80211_TX_RC_USE_SHORT_PREAMBLE
);
1679 plcp_signal
= txrate
->bitrate
;
1681 hdr
= (struct ieee80211_hdr
*)skb
->data
;
1682 hdrlen
= ieee80211_hdrlen(hdr
->frame_control
);
1683 memcpy(skb
->cb
, skb
->data
, hdrlen
);
1684 hdr
= (struct ieee80211_hdr
*)skb
->cb
;
1685 skb_pull(skb
, hdrlen
);
1686 payload_len
= skb
->len
;
1688 txhdr
= (struct adm8211_tx_hdr
*) skb_push(skb
, sizeof(*txhdr
));
1689 memset(txhdr
, 0, sizeof(*txhdr
));
1690 memcpy(txhdr
->da
, ieee80211_get_DA(hdr
), ETH_ALEN
);
1691 txhdr
->signal
= plcp_signal
;
1692 txhdr
->frame_body_size
= cpu_to_le16(payload_len
);
1693 txhdr
->frame_control
= hdr
->frame_control
;
1695 len
= hdrlen
+ payload_len
+ FCS_LEN
;
1697 txhdr
->frag
= cpu_to_le16(0x0FFF);
1698 adm8211_calc_durations(&dur
, &plcp
, payload_len
,
1699 len
, plcp_signal
, short_preamble
);
1700 txhdr
->plcp_frag_head_len
= cpu_to_le16(plcp
);
1701 txhdr
->plcp_frag_tail_len
= cpu_to_le16(plcp
);
1702 txhdr
->dur_frag_head
= cpu_to_le16(dur
);
1703 txhdr
->dur_frag_tail
= cpu_to_le16(dur
);
1705 txhdr
->header_control
= cpu_to_le16(ADM8211_TXHDRCTL_ENABLE_EXTEND_HEADER
);
1708 txhdr
->header_control
|= cpu_to_le16(ADM8211_TXHDRCTL_SHORT_PREAMBLE
);
1710 if (rc_flags
& IEEE80211_TX_RC_USE_RTS_CTS
)
1711 txhdr
->header_control
|= cpu_to_le16(ADM8211_TXHDRCTL_ENABLE_RTS
);
1713 txhdr
->retry_limit
= info
->control
.rates
[0].count
;
1715 adm8211_tx_raw(dev
, skb
, plcp_signal
, hdrlen
);
1717 return NETDEV_TX_OK
;
1720 static int adm8211_alloc_rings(struct ieee80211_hw
*dev
)
1722 struct adm8211_priv
*priv
= dev
->priv
;
1723 unsigned int ring_size
;
1725 priv
->rx_buffers
= kmalloc(sizeof(*priv
->rx_buffers
) * priv
->rx_ring_size
+
1726 sizeof(*priv
->tx_buffers
) * priv
->tx_ring_size
, GFP_KERNEL
);
1727 if (!priv
->rx_buffers
)
1730 priv
->tx_buffers
= (void *)priv
->rx_buffers
+
1731 sizeof(*priv
->rx_buffers
) * priv
->rx_ring_size
;
1733 /* Allocate TX/RX descriptors */
1734 ring_size
= sizeof(struct adm8211_desc
) * priv
->rx_ring_size
+
1735 sizeof(struct adm8211_desc
) * priv
->tx_ring_size
;
1736 priv
->rx_ring
= pci_alloc_consistent(priv
->pdev
, ring_size
,
1737 &priv
->rx_ring_dma
);
1739 if (!priv
->rx_ring
) {
1740 kfree(priv
->rx_buffers
);
1741 priv
->rx_buffers
= NULL
;
1742 priv
->tx_buffers
= NULL
;
1746 priv
->tx_ring
= (struct adm8211_desc
*)(priv
->rx_ring
+
1747 priv
->rx_ring_size
);
1748 priv
->tx_ring_dma
= priv
->rx_ring_dma
+
1749 sizeof(struct adm8211_desc
) * priv
->rx_ring_size
;
1754 static const struct ieee80211_ops adm8211_ops
= {
1756 .start
= adm8211_start
,
1757 .stop
= adm8211_stop
,
1758 .add_interface
= adm8211_add_interface
,
1759 .remove_interface
= adm8211_remove_interface
,
1760 .config
= adm8211_config
,
1761 .bss_info_changed
= adm8211_bss_info_changed
,
1762 .prepare_multicast
= adm8211_prepare_multicast
,
1763 .configure_filter
= adm8211_configure_filter
,
1764 .get_stats
= adm8211_get_stats
,
1765 .get_tsf
= adm8211_get_tsft
1768 static int __devinit
adm8211_probe(struct pci_dev
*pdev
,
1769 const struct pci_device_id
*id
)
1771 struct ieee80211_hw
*dev
;
1772 struct adm8211_priv
*priv
;
1773 unsigned long mem_addr
, mem_len
;
1774 unsigned int io_addr
, io_len
;
1777 u8 perm_addr
[ETH_ALEN
];
1779 err
= pci_enable_device(pdev
);
1781 printk(KERN_ERR
"%s (adm8211): Cannot enable new PCI device\n",
1786 io_addr
= pci_resource_start(pdev
, 0);
1787 io_len
= pci_resource_len(pdev
, 0);
1788 mem_addr
= pci_resource_start(pdev
, 1);
1789 mem_len
= pci_resource_len(pdev
, 1);
1790 if (io_len
< 256 || mem_len
< 1024) {
1791 printk(KERN_ERR
"%s (adm8211): Too short PCI resources\n",
1793 goto err_disable_pdev
;
1797 /* check signature */
1798 pci_read_config_dword(pdev
, 0x80 /* CR32 */, ®
);
1799 if (reg
!= ADM8211_SIG1
&& reg
!= ADM8211_SIG2
) {
1800 printk(KERN_ERR
"%s (adm8211): Invalid signature (0x%x)\n",
1801 pci_name(pdev
), reg
);
1802 goto err_disable_pdev
;
1805 err
= pci_request_regions(pdev
, "adm8211");
1807 printk(KERN_ERR
"%s (adm8211): Cannot obtain PCI resources\n",
1809 return err
; /* someone else grabbed it? don't disable it */
1812 if (pci_set_dma_mask(pdev
, DMA_BIT_MASK(32)) ||
1813 pci_set_consistent_dma_mask(pdev
, DMA_BIT_MASK(32))) {
1814 printk(KERN_ERR
"%s (adm8211): No suitable DMA available\n",
1819 pci_set_master(pdev
);
1821 dev
= ieee80211_alloc_hw(sizeof(*priv
), &adm8211_ops
);
1823 printk(KERN_ERR
"%s (adm8211): ieee80211 alloc failed\n",
1831 spin_lock_init(&priv
->lock
);
1833 SET_IEEE80211_DEV(dev
, &pdev
->dev
);
1835 pci_set_drvdata(pdev
, dev
);
1837 priv
->map
= pci_iomap(pdev
, 1, mem_len
);
1839 priv
->map
= pci_iomap(pdev
, 0, io_len
);
1842 printk(KERN_ERR
"%s (adm8211): Cannot map device memory\n",
1847 priv
->rx_ring_size
= rx_ring_size
;
1848 priv
->tx_ring_size
= tx_ring_size
;
1850 if (adm8211_alloc_rings(dev
)) {
1851 printk(KERN_ERR
"%s (adm8211): Cannot allocate TX/RX ring\n",
1856 *(__le32
*)perm_addr
= cpu_to_le32(ADM8211_CSR_READ(PAR0
));
1857 *(__le16
*)&perm_addr
[4] =
1858 cpu_to_le16(ADM8211_CSR_READ(PAR1
) & 0xFFFF);
1860 if (!is_valid_ether_addr(perm_addr
)) {
1861 printk(KERN_WARNING
"%s (adm8211): Invalid hwaddr in EEPROM!\n",
1863 random_ether_addr(perm_addr
);
1865 SET_IEEE80211_PERM_ADDR(dev
, perm_addr
);
1867 dev
->extra_tx_headroom
= sizeof(struct adm8211_tx_hdr
);
1868 /* dev->flags = IEEE80211_HW_RX_INCLUDES_FCS in promisc mode */
1869 dev
->flags
= IEEE80211_HW_SIGNAL_UNSPEC
;
1870 dev
->wiphy
->interface_modes
= BIT(NL80211_IFTYPE_STATION
);
1872 dev
->channel_change_time
= 1000;
1873 dev
->max_signal
= 100; /* FIXME: find better value */
1875 dev
->queues
= 1; /* ADM8211C supports more, maybe ADM8211B too */
1877 priv
->retry_limit
= 3;
1878 priv
->ant_power
= 0x40;
1879 priv
->tx_power
= 0x40;
1880 priv
->lpf_cutoff
= 0xFF;
1881 priv
->lnags_threshold
= 0xFF;
1882 priv
->mode
= NL80211_IFTYPE_UNSPECIFIED
;
1884 /* Power-on issue. EEPROM won't read correctly without */
1885 if (pdev
->revision
>= ADM8211_REV_BA
) {
1886 ADM8211_CSR_WRITE(FRCTL
, 0);
1887 ADM8211_CSR_READ(FRCTL
);
1888 ADM8211_CSR_WRITE(FRCTL
, 1);
1889 ADM8211_CSR_READ(FRCTL
);
1893 err
= adm8211_read_eeprom(dev
);
1895 printk(KERN_ERR
"%s (adm8211): Can't alloc eeprom buffer\n",
1902 dev
->wiphy
->bands
[IEEE80211_BAND_2GHZ
] = &priv
->band
;
1904 err
= ieee80211_register_hw(dev
);
1906 printk(KERN_ERR
"%s (adm8211): Cannot register device\n",
1911 printk(KERN_INFO
"%s: hwaddr %pM, Rev 0x%02x\n",
1912 wiphy_name(dev
->wiphy
), dev
->wiphy
->perm_addr
,
1918 pci_free_consistent(pdev
,
1919 sizeof(struct adm8211_desc
) * priv
->rx_ring_size
+
1920 sizeof(struct adm8211_desc
) * priv
->tx_ring_size
,
1921 priv
->rx_ring
, priv
->rx_ring_dma
);
1922 kfree(priv
->rx_buffers
);
1925 pci_iounmap(pdev
, priv
->map
);
1928 pci_set_drvdata(pdev
, NULL
);
1929 ieee80211_free_hw(dev
);
1932 pci_release_regions(pdev
);
1935 pci_disable_device(pdev
);
1940 static void __devexit
adm8211_remove(struct pci_dev
*pdev
)
1942 struct ieee80211_hw
*dev
= pci_get_drvdata(pdev
);
1943 struct adm8211_priv
*priv
;
1948 ieee80211_unregister_hw(dev
);
1952 pci_free_consistent(pdev
,
1953 sizeof(struct adm8211_desc
) * priv
->rx_ring_size
+
1954 sizeof(struct adm8211_desc
) * priv
->tx_ring_size
,
1955 priv
->rx_ring
, priv
->rx_ring_dma
);
1957 kfree(priv
->rx_buffers
);
1958 kfree(priv
->eeprom
);
1959 pci_iounmap(pdev
, priv
->map
);
1960 pci_release_regions(pdev
);
1961 pci_disable_device(pdev
);
1962 ieee80211_free_hw(dev
);
1967 static int adm8211_suspend(struct pci_dev
*pdev
, pm_message_t state
)
1969 pci_save_state(pdev
);
1970 pci_set_power_state(pdev
, pci_choose_state(pdev
, state
));
1974 static int adm8211_resume(struct pci_dev
*pdev
)
1976 pci_set_power_state(pdev
, PCI_D0
);
1977 pci_restore_state(pdev
);
1980 #endif /* CONFIG_PM */
1983 MODULE_DEVICE_TABLE(pci
, adm8211_pci_id_table
);
1985 /* TODO: implement enable_wake */
1986 static struct pci_driver adm8211_driver
= {
1988 .id_table
= adm8211_pci_id_table
,
1989 .probe
= adm8211_probe
,
1990 .remove
= __devexit_p(adm8211_remove
),
1992 .suspend
= adm8211_suspend
,
1993 .resume
= adm8211_resume
,
1994 #endif /* CONFIG_PM */
1999 static int __init
adm8211_init(void)
2001 return pci_register_driver(&adm8211_driver
);
2005 static void __exit
adm8211_exit(void)
2007 pci_unregister_driver(&adm8211_driver
);
2011 module_init(adm8211_init
);
2012 module_exit(adm8211_exit
);