]> git.proxmox.com Git - mirror_ubuntu-jammy-kernel.git/blob - drivers/net/wireless/ath/ath10k/core.c
projects / mirror_ubuntu-jammy-kernel.git / blob
? search:
summary | shortlog | log | commit | commitdiff | tree
blame | history | raw | HEAD
Merge ath-next from git://git.kernel.org/pub/scm/linux/kernel/git/kvalo/ath.git
[mirror_ubuntu-jammy-kernel.git] / drivers / net / wireless / ath / ath10k / core.c
1 // SPDX-License-Identifier: ISC
2 /*
3 * Copyright (c) 2005-2011 Atheros Communications Inc.
4 * Copyright (c) 2011-2017 Qualcomm Atheros, Inc.
5 * Copyright (c) 2018, The Linux Foundation. All rights reserved.
6 */
7
8 #include <linux/module.h>
9 #include <linux/firmware.h>
10 #include <linux/of.h>
11 #include <linux/property.h>
12 #include <linux/dmi.h>
13 #include <linux/ctype.h>
14 #include <asm/byteorder.h>
15
16 #include "core.h"
17 #include "mac.h"
18 #include "htc.h"
19 #include "hif.h"
20 #include "wmi.h"
21 #include "bmi.h"
22 #include "debug.h"
23 #include "htt.h"
24 #include "testmode.h"
25 #include "wmi-ops.h"
26 #include "coredump.h"
27
28 unsigned int ath10k_debug_mask;
29 static unsigned int ath10k_cryptmode_param;
30 static bool uart_print;
31 static bool skip_otp;
32 static bool rawmode;
33
34 unsigned long ath10k_coredump_mask = BIT(ATH10K_FW_CRASH_DUMP_REGISTERS) |
35 BIT(ATH10K_FW_CRASH_DUMP_CE_DATA);
36
37 /* FIXME: most of these should be readonly */
38 module_param_named(debug_mask, ath10k_debug_mask, uint, 0644);
39 module_param_named(cryptmode, ath10k_cryptmode_param, uint, 0644);
40 module_param(uart_print, bool, 0644);
41 module_param(skip_otp, bool, 0644);
42 module_param(rawmode, bool, 0644);
43 module_param_named(coredump_mask, ath10k_coredump_mask, ulong, 0444);
44
45 MODULE_PARM_DESC(debug_mask, "Debugging mask");
46 MODULE_PARM_DESC(uart_print, "Uart target debugging");
47 MODULE_PARM_DESC(skip_otp, "Skip otp failure for calibration in testmode");
48 MODULE_PARM_DESC(cryptmode, "Crypto mode: 0-hardware, 1-software");
49 MODULE_PARM_DESC(rawmode, "Use raw 802.11 frame datapath");
50 MODULE_PARM_DESC(coredump_mask, "Bitfield of what to include in firmware crash file");
51
52 static const struct ath10k_hw_params ath10k_hw_params_list[] = {
53 {
54 .id = QCA988X_HW_2_0_VERSION,
55 .dev_id = QCA988X_2_0_DEVICE_ID,
56 .bus = ATH10K_BUS_PCI,
57 .name = "qca988x hw2.0",
58 .patch_load_addr = QCA988X_HW_2_0_PATCH_LOAD_ADDR,
59 .uart_pin = 7,
60 .cc_wraparound_type = ATH10K_HW_CC_WRAP_SHIFTED_ALL,
61 .otp_exe_param = 0,
62 .channel_counters_freq_hz = 88000,
63 .max_probe_resp_desc_thres = 0,
64 .cal_data_len = 2116,
65 .fw = {
66 .dir = QCA988X_HW_2_0_FW_DIR,
67 .board = QCA988X_HW_2_0_BOARD_DATA_FILE,
68 .board_size = QCA988X_BOARD_DATA_SZ,
69 .board_ext_size = QCA988X_BOARD_EXT_DATA_SZ,
70 },
71 .hw_ops = &qca988x_ops,
72 .decap_align_bytes = 4,
73 .spectral_bin_discard = 0,
74 .spectral_bin_offset = 0,
75 .vht160_mcs_rx_highest = 0,
76 .vht160_mcs_tx_highest = 0,
77 .n_cipher_suites = 8,
78 .ast_skid_limit = 0x10,
79 .num_wds_entries = 0x20,
80 .target_64bit = false,
81 .rx_ring_fill_level = HTT_RX_RING_FILL_LEVEL,
82 .shadow_reg_support = false,
83 .rri_on_ddr = false,
84 .hw_filter_reset_required = true,
85 .fw_diag_ce_download = false,
86 },
87 {
88 .id = QCA988X_HW_2_0_VERSION,
89 .dev_id = QCA988X_2_0_DEVICE_ID_UBNT,
90 .name = "qca988x hw2.0 ubiquiti",
91 .patch_load_addr = QCA988X_HW_2_0_PATCH_LOAD_ADDR,
92 .uart_pin = 7,
93 .cc_wraparound_type = ATH10K_HW_CC_WRAP_SHIFTED_ALL,
94 .otp_exe_param = 0,
95 .channel_counters_freq_hz = 88000,
96 .max_probe_resp_desc_thres = 0,
97 .cal_data_len = 2116,
98 .fw = {
99 .dir = QCA988X_HW_2_0_FW_DIR,
100 .board = QCA988X_HW_2_0_BOARD_DATA_FILE,
101 .board_size = QCA988X_BOARD_DATA_SZ,
102 .board_ext_size = QCA988X_BOARD_EXT_DATA_SZ,
103 },
104 .hw_ops = &qca988x_ops,
105 .decap_align_bytes = 4,
106 .spectral_bin_discard = 0,
107 .spectral_bin_offset = 0,
108 .vht160_mcs_rx_highest = 0,
109 .vht160_mcs_tx_highest = 0,
110 .n_cipher_suites = 8,
111 .ast_skid_limit = 0x10,
112 .num_wds_entries = 0x20,
113 .target_64bit = false,
114 .rx_ring_fill_level = HTT_RX_RING_FILL_LEVEL,
115 .per_ce_irq = false,
116 .shadow_reg_support = false,
117 .rri_on_ddr = false,
118 .hw_filter_reset_required = true,
119 .fw_diag_ce_download = false,
120 },
121 {
122 .id = QCA9887_HW_1_0_VERSION,
123 .dev_id = QCA9887_1_0_DEVICE_ID,
124 .bus = ATH10K_BUS_PCI,
125 .name = "qca9887 hw1.0",
126 .patch_load_addr = QCA9887_HW_1_0_PATCH_LOAD_ADDR,
127 .uart_pin = 7,
128 .cc_wraparound_type = ATH10K_HW_CC_WRAP_SHIFTED_ALL,
129 .otp_exe_param = 0,
130 .channel_counters_freq_hz = 88000,
131 .max_probe_resp_desc_thres = 0,
132 .cal_data_len = 2116,
133 .fw = {
134 .dir = QCA9887_HW_1_0_FW_DIR,
135 .board = QCA9887_HW_1_0_BOARD_DATA_FILE,
136 .board_size = QCA9887_BOARD_DATA_SZ,
137 .board_ext_size = QCA9887_BOARD_EXT_DATA_SZ,
138 },
139 .hw_ops = &qca988x_ops,
140 .decap_align_bytes = 4,
141 .spectral_bin_discard = 0,
142 .spectral_bin_offset = 0,
143 .vht160_mcs_rx_highest = 0,
144 .vht160_mcs_tx_highest = 0,
145 .n_cipher_suites = 8,
146 .ast_skid_limit = 0x10,
147 .num_wds_entries = 0x20,
148 .target_64bit = false,
149 .rx_ring_fill_level = HTT_RX_RING_FILL_LEVEL,
150 .per_ce_irq = false,
151 .shadow_reg_support = false,
152 .rri_on_ddr = false,
153 .hw_filter_reset_required = true,
154 .fw_diag_ce_download = false,
155 },
156 {
157 .id = QCA6174_HW_3_2_VERSION,
158 .dev_id = QCA6174_3_2_DEVICE_ID,
159 .bus = ATH10K_BUS_SDIO,
160 .name = "qca6174 hw3.2 sdio",
161 .patch_load_addr = QCA6174_HW_3_0_PATCH_LOAD_ADDR,
162 .uart_pin = 19,
163 .otp_exe_param = 0,
164 .channel_counters_freq_hz = 88000,
165 .max_probe_resp_desc_thres = 0,
166 .cal_data_len = 0,
167 .fw = {
168 .dir = QCA6174_HW_3_0_FW_DIR,
169 .board = QCA6174_HW_3_0_BOARD_DATA_FILE,
170 .board_size = QCA6174_BOARD_DATA_SZ,
171 .board_ext_size = QCA6174_BOARD_EXT_DATA_SZ,
172 },
173 .hw_ops = &qca6174_ops,
174 .hw_clk = qca6174_clk,
175 .target_cpu_freq = 176000000,
176 .decap_align_bytes = 4,
177 .n_cipher_suites = 8,
178 .num_peers = 10,
179 .ast_skid_limit = 0x10,
180 .num_wds_entries = 0x20,
181 .uart_pin_workaround = true,
182 },
183 {
184 .id = QCA6174_HW_2_1_VERSION,
185 .dev_id = QCA6164_2_1_DEVICE_ID,
186 .bus = ATH10K_BUS_PCI,
187 .name = "qca6164 hw2.1",
188 .patch_load_addr = QCA6174_HW_2_1_PATCH_LOAD_ADDR,
189 .uart_pin = 6,
190 .otp_exe_param = 0,
191 .channel_counters_freq_hz = 88000,
192 .max_probe_resp_desc_thres = 0,
193 .cal_data_len = 8124,
194 .fw = {
195 .dir = QCA6174_HW_2_1_FW_DIR,
196 .board = QCA6174_HW_2_1_BOARD_DATA_FILE,
197 .board_size = QCA6174_BOARD_DATA_SZ,
198 .board_ext_size = QCA6174_BOARD_EXT_DATA_SZ,
199 },
200 .hw_ops = &qca988x_ops,
201 .decap_align_bytes = 4,
202 .spectral_bin_discard = 0,
203 .spectral_bin_offset = 0,
204 .vht160_mcs_rx_highest = 0,
205 .vht160_mcs_tx_highest = 0,
206 .n_cipher_suites = 8,
207 .ast_skid_limit = 0x10,
208 .num_wds_entries = 0x20,
209 .target_64bit = false,
210 .rx_ring_fill_level = HTT_RX_RING_FILL_LEVEL,
211 .per_ce_irq = false,
212 .shadow_reg_support = false,
213 .rri_on_ddr = false,
214 .hw_filter_reset_required = true,
215 .fw_diag_ce_download = false,
216 },
217 {
218 .id = QCA6174_HW_2_1_VERSION,
219 .dev_id = QCA6174_2_1_DEVICE_ID,
220 .bus = ATH10K_BUS_PCI,
221 .name = "qca6174 hw2.1",
222 .patch_load_addr = QCA6174_HW_2_1_PATCH_LOAD_ADDR,
223 .uart_pin = 6,
224 .otp_exe_param = 0,
225 .channel_counters_freq_hz = 88000,
226 .max_probe_resp_desc_thres = 0,
227 .cal_data_len = 8124,
228 .fw = {
229 .dir = QCA6174_HW_2_1_FW_DIR,
230 .board = QCA6174_HW_2_1_BOARD_DATA_FILE,
231 .board_size = QCA6174_BOARD_DATA_SZ,
232 .board_ext_size = QCA6174_BOARD_EXT_DATA_SZ,
233 },
234 .hw_ops = &qca988x_ops,
235 .decap_align_bytes = 4,
236 .spectral_bin_discard = 0,
237 .spectral_bin_offset = 0,
238 .vht160_mcs_rx_highest = 0,
239 .vht160_mcs_tx_highest = 0,
240 .n_cipher_suites = 8,
241 .ast_skid_limit = 0x10,
242 .num_wds_entries = 0x20,
243 .target_64bit = false,
244 .rx_ring_fill_level = HTT_RX_RING_FILL_LEVEL,
245 .per_ce_irq = false,
246 .shadow_reg_support = false,
247 .rri_on_ddr = false,
248 .hw_filter_reset_required = true,
249 .fw_diag_ce_download = false,
250 },
251 {
252 .id = QCA6174_HW_3_0_VERSION,
253 .dev_id = QCA6174_2_1_DEVICE_ID,
254 .bus = ATH10K_BUS_PCI,
255 .name = "qca6174 hw3.0",
256 .patch_load_addr = QCA6174_HW_3_0_PATCH_LOAD_ADDR,
257 .uart_pin = 6,
258 .otp_exe_param = 0,
259 .channel_counters_freq_hz = 88000,
260 .max_probe_resp_desc_thres = 0,
261 .cal_data_len = 8124,
262 .fw = {
263 .dir = QCA6174_HW_3_0_FW_DIR,
264 .board = QCA6174_HW_3_0_BOARD_DATA_FILE,
265 .board_size = QCA6174_BOARD_DATA_SZ,
266 .board_ext_size = QCA6174_BOARD_EXT_DATA_SZ,
267 },
268 .hw_ops = &qca988x_ops,
269 .decap_align_bytes = 4,
270 .spectral_bin_discard = 0,
271 .spectral_bin_offset = 0,
272 .vht160_mcs_rx_highest = 0,
273 .vht160_mcs_tx_highest = 0,
274 .n_cipher_suites = 8,
275 .ast_skid_limit = 0x10,
276 .num_wds_entries = 0x20,
277 .target_64bit = false,
278 .rx_ring_fill_level = HTT_RX_RING_FILL_LEVEL,
279 .per_ce_irq = false,
280 .shadow_reg_support = false,
281 .rri_on_ddr = false,
282 .hw_filter_reset_required = true,
283 .fw_diag_ce_download = false,
284 },
285 {
286 .id = QCA6174_HW_3_2_VERSION,
287 .dev_id = QCA6174_2_1_DEVICE_ID,
288 .bus = ATH10K_BUS_PCI,
289 .name = "qca6174 hw3.2",
290 .patch_load_addr = QCA6174_HW_3_0_PATCH_LOAD_ADDR,
291 .uart_pin = 6,
292 .otp_exe_param = 0,
293 .channel_counters_freq_hz = 88000,
294 .max_probe_resp_desc_thres = 0,
295 .cal_data_len = 8124,
296 .fw = {
297 /* uses same binaries as hw3.0 */
298 .dir = QCA6174_HW_3_0_FW_DIR,
299 .board = QCA6174_HW_3_0_BOARD_DATA_FILE,
300 .board_size = QCA6174_BOARD_DATA_SZ,
301 .board_ext_size = QCA6174_BOARD_EXT_DATA_SZ,
302 },
303 .hw_ops = &qca6174_ops,
304 .hw_clk = qca6174_clk,
305 .target_cpu_freq = 176000000,
306 .decap_align_bytes = 4,
307 .spectral_bin_discard = 0,
308 .spectral_bin_offset = 0,
309 .vht160_mcs_rx_highest = 0,
310 .vht160_mcs_tx_highest = 0,
311 .n_cipher_suites = 8,
312 .ast_skid_limit = 0x10,
313 .num_wds_entries = 0x20,
314 .target_64bit = false,
315 .rx_ring_fill_level = HTT_RX_RING_FILL_LEVEL,
316 .per_ce_irq = false,
317 .shadow_reg_support = false,
318 .rri_on_ddr = false,
319 .hw_filter_reset_required = true,
320 .fw_diag_ce_download = true,
321 },
322 {
323 .id = QCA99X0_HW_2_0_DEV_VERSION,
324 .dev_id = QCA99X0_2_0_DEVICE_ID,
325 .bus = ATH10K_BUS_PCI,
326 .name = "qca99x0 hw2.0",
327 .patch_load_addr = QCA99X0_HW_2_0_PATCH_LOAD_ADDR,
328 .uart_pin = 7,
329 .otp_exe_param = 0x00000700,
330 .continuous_frag_desc = true,
331 .cck_rate_map_rev2 = true,
332 .channel_counters_freq_hz = 150000,
333 .max_probe_resp_desc_thres = 24,
334 .tx_chain_mask = 0xf,
335 .rx_chain_mask = 0xf,
336 .max_spatial_stream = 4,
337 .cal_data_len = 12064,
338 .fw = {
339 .dir = QCA99X0_HW_2_0_FW_DIR,
340 .board = QCA99X0_HW_2_0_BOARD_DATA_FILE,
341 .board_size = QCA99X0_BOARD_DATA_SZ,
342 .board_ext_size = QCA99X0_BOARD_EXT_DATA_SZ,
343 },
344 .sw_decrypt_mcast_mgmt = true,
345 .hw_ops = &qca99x0_ops,
346 .decap_align_bytes = 1,
347 .spectral_bin_discard = 4,
348 .spectral_bin_offset = 0,
349 .vht160_mcs_rx_highest = 0,
350 .vht160_mcs_tx_highest = 0,
351 .n_cipher_suites = 11,
352 .ast_skid_limit = 0x10,
353 .num_wds_entries = 0x20,
354 .target_64bit = false,
355 .rx_ring_fill_level = HTT_RX_RING_FILL_LEVEL,
356 .per_ce_irq = false,
357 .shadow_reg_support = false,
358 .rri_on_ddr = false,
359 .hw_filter_reset_required = true,
360 .fw_diag_ce_download = false,
361 },
362 {
363 .id = QCA9984_HW_1_0_DEV_VERSION,
364 .dev_id = QCA9984_1_0_DEVICE_ID,
365 .bus = ATH10K_BUS_PCI,
366 .name = "qca9984/qca9994 hw1.0",
367 .patch_load_addr = QCA9984_HW_1_0_PATCH_LOAD_ADDR,
368 .uart_pin = 7,
369 .cc_wraparound_type = ATH10K_HW_CC_WRAP_SHIFTED_EACH,
370 .otp_exe_param = 0x00000700,
371 .continuous_frag_desc = true,
372 .cck_rate_map_rev2 = true,
373 .channel_counters_freq_hz = 150000,
374 .max_probe_resp_desc_thres = 24,
375 .tx_chain_mask = 0xf,
376 .rx_chain_mask = 0xf,
377 .max_spatial_stream = 4,
378 .cal_data_len = 12064,
379 .fw = {
380 .dir = QCA9984_HW_1_0_FW_DIR,
381 .board = QCA9984_HW_1_0_BOARD_DATA_FILE,
382 .eboard = QCA9984_HW_1_0_EBOARD_DATA_FILE,
383 .board_size = QCA99X0_BOARD_DATA_SZ,
384 .board_ext_size = QCA99X0_BOARD_EXT_DATA_SZ,
385 .ext_board_size = QCA99X0_EXT_BOARD_DATA_SZ,
386 },
387 .sw_decrypt_mcast_mgmt = true,
388 .hw_ops = &qca99x0_ops,
389 .decap_align_bytes = 1,
390 .spectral_bin_discard = 12,
391 .spectral_bin_offset = 8,
392
393 /* Can do only 2x2 VHT160 or 80+80. 1560Mbps is 4x4 80Mhz
394 * or 2x2 160Mhz, long-guard-interval.
395 */
396 .vht160_mcs_rx_highest = 1560,
397 .vht160_mcs_tx_highest = 1560,
398 .n_cipher_suites = 11,
399 .ast_skid_limit = 0x10,
400 .num_wds_entries = 0x20,
401 .target_64bit = false,
402 .rx_ring_fill_level = HTT_RX_RING_FILL_LEVEL,
403 .per_ce_irq = false,
404 .shadow_reg_support = false,
405 .rri_on_ddr = false,
406 .hw_filter_reset_required = true,
407 .fw_diag_ce_download = false,
408 },
409 {
410 .id = QCA9888_HW_2_0_DEV_VERSION,
411 .dev_id = QCA9888_2_0_DEVICE_ID,
412 .bus = ATH10K_BUS_PCI,
413 .name = "qca9888 hw2.0",
414 .patch_load_addr = QCA9888_HW_2_0_PATCH_LOAD_ADDR,
415 .uart_pin = 7,
416 .cc_wraparound_type = ATH10K_HW_CC_WRAP_SHIFTED_EACH,
417 .otp_exe_param = 0x00000700,
418 .continuous_frag_desc = true,
419 .channel_counters_freq_hz = 150000,
420 .max_probe_resp_desc_thres = 24,
421 .tx_chain_mask = 3,
422 .rx_chain_mask = 3,
423 .max_spatial_stream = 2,
424 .cal_data_len = 12064,
425 .fw = {
426 .dir = QCA9888_HW_2_0_FW_DIR,
427 .board = QCA9888_HW_2_0_BOARD_DATA_FILE,
428 .board_size = QCA99X0_BOARD_DATA_SZ,
429 .board_ext_size = QCA99X0_BOARD_EXT_DATA_SZ,
430 },
431 .sw_decrypt_mcast_mgmt = true,
432 .hw_ops = &qca99x0_ops,
433 .decap_align_bytes = 1,
434 .spectral_bin_discard = 12,
435 .spectral_bin_offset = 8,
436
437 /* Can do only 1x1 VHT160 or 80+80. 780Mbps is 2x2 80Mhz or
438 * 1x1 160Mhz, long-guard-interval.
439 */
440 .vht160_mcs_rx_highest = 780,
441 .vht160_mcs_tx_highest = 780,
442 .n_cipher_suites = 11,
443 .ast_skid_limit = 0x10,
444 .num_wds_entries = 0x20,
445 .target_64bit = false,
446 .rx_ring_fill_level = HTT_RX_RING_FILL_LEVEL,
447 .per_ce_irq = false,
448 .shadow_reg_support = false,
449 .rri_on_ddr = false,
450 .hw_filter_reset_required = true,
451 .fw_diag_ce_download = false,
452 },
453 {
454 .id = QCA9377_HW_1_0_DEV_VERSION,
455 .dev_id = QCA9377_1_0_DEVICE_ID,
456 .bus = ATH10K_BUS_PCI,
457 .name = "qca9377 hw1.0",
458 .patch_load_addr = QCA9377_HW_1_0_PATCH_LOAD_ADDR,
459 .uart_pin = 6,
460 .otp_exe_param = 0,
461 .channel_counters_freq_hz = 88000,
462 .max_probe_resp_desc_thres = 0,
463 .cal_data_len = 8124,
464 .fw = {
465 .dir = QCA9377_HW_1_0_FW_DIR,
466 .board = QCA9377_HW_1_0_BOARD_DATA_FILE,
467 .board_size = QCA9377_BOARD_DATA_SZ,
468 .board_ext_size = QCA9377_BOARD_EXT_DATA_SZ,
469 },
470 .hw_ops = &qca988x_ops,
471 .decap_align_bytes = 4,
472 .spectral_bin_discard = 0,
473 .spectral_bin_offset = 0,
474 .vht160_mcs_rx_highest = 0,
475 .vht160_mcs_tx_highest = 0,
476 .n_cipher_suites = 8,
477 .ast_skid_limit = 0x10,
478 .num_wds_entries = 0x20,
479 .target_64bit = false,
480 .rx_ring_fill_level = HTT_RX_RING_FILL_LEVEL,
481 .per_ce_irq = false,
482 .shadow_reg_support = false,
483 .rri_on_ddr = false,
484 .hw_filter_reset_required = true,
485 .fw_diag_ce_download = false,
486 },
487 {
488 .id = QCA9377_HW_1_1_DEV_VERSION,
489 .dev_id = QCA9377_1_0_DEVICE_ID,
490 .bus = ATH10K_BUS_PCI,
491 .name = "qca9377 hw1.1",
492 .patch_load_addr = QCA9377_HW_1_0_PATCH_LOAD_ADDR,
493 .uart_pin = 6,
494 .otp_exe_param = 0,
495 .channel_counters_freq_hz = 88000,
496 .max_probe_resp_desc_thres = 0,
497 .cal_data_len = 8124,
498 .fw = {
499 .dir = QCA9377_HW_1_0_FW_DIR,
500 .board = QCA9377_HW_1_0_BOARD_DATA_FILE,
501 .board_size = QCA9377_BOARD_DATA_SZ,
502 .board_ext_size = QCA9377_BOARD_EXT_DATA_SZ,
503 },
504 .hw_ops = &qca6174_ops,
505 .hw_clk = qca6174_clk,
506 .target_cpu_freq = 176000000,
507 .decap_align_bytes = 4,
508 .spectral_bin_discard = 0,
509 .spectral_bin_offset = 0,
510 .vht160_mcs_rx_highest = 0,
511 .vht160_mcs_tx_highest = 0,
512 .n_cipher_suites = 8,
513 .ast_skid_limit = 0x10,
514 .num_wds_entries = 0x20,
515 .target_64bit = false,
516 .rx_ring_fill_level = HTT_RX_RING_FILL_LEVEL,
517 .per_ce_irq = false,
518 .shadow_reg_support = false,
519 .rri_on_ddr = false,
520 .hw_filter_reset_required = true,
521 .fw_diag_ce_download = true,
522 },
523 {
524 .id = QCA4019_HW_1_0_DEV_VERSION,
525 .dev_id = 0,
526 .bus = ATH10K_BUS_AHB,
527 .name = "qca4019 hw1.0",
528 .patch_load_addr = QCA4019_HW_1_0_PATCH_LOAD_ADDR,
529 .uart_pin = 7,
530 .cc_wraparound_type = ATH10K_HW_CC_WRAP_SHIFTED_EACH,
531 .otp_exe_param = 0x0010000,
532 .continuous_frag_desc = true,
533 .cck_rate_map_rev2 = true,
534 .channel_counters_freq_hz = 125000,
535 .max_probe_resp_desc_thres = 24,
536 .tx_chain_mask = 0x3,
537 .rx_chain_mask = 0x3,
538 .max_spatial_stream = 2,
539 .cal_data_len = 12064,
540 .fw = {
541 .dir = QCA4019_HW_1_0_FW_DIR,
542 .board = QCA4019_HW_1_0_BOARD_DATA_FILE,
543 .board_size = QCA4019_BOARD_DATA_SZ,
544 .board_ext_size = QCA4019_BOARD_EXT_DATA_SZ,
545 },
546 .sw_decrypt_mcast_mgmt = true,
547 .hw_ops = &qca99x0_ops,
548 .decap_align_bytes = 1,
549 .spectral_bin_discard = 4,
550 .spectral_bin_offset = 0,
551 .vht160_mcs_rx_highest = 0,
552 .vht160_mcs_tx_highest = 0,
553 .n_cipher_suites = 11,
554 .ast_skid_limit = 0x10,
555 .num_wds_entries = 0x20,
556 .target_64bit = false,
557 .rx_ring_fill_level = HTT_RX_RING_FILL_LEVEL,
558 .per_ce_irq = false,
559 .shadow_reg_support = false,
560 .rri_on_ddr = false,
561 .hw_filter_reset_required = true,
562 .fw_diag_ce_download = false,
563 },
564 {
565 .id = WCN3990_HW_1_0_DEV_VERSION,
566 .dev_id = 0,
567 .bus = ATH10K_BUS_SNOC,
568 .name = "wcn3990 hw1.0",
569 .continuous_frag_desc = true,
570 .tx_chain_mask = 0x7,
571 .rx_chain_mask = 0x7,
572 .max_spatial_stream = 4,
573 .fw = {
574 .dir = WCN3990_HW_1_0_FW_DIR,
575 },
576 .sw_decrypt_mcast_mgmt = true,
577 .hw_ops = &wcn3990_ops,
578 .decap_align_bytes = 1,
579 .num_peers = TARGET_HL_TLV_NUM_PEERS,
580 .n_cipher_suites = 11,
581 .ast_skid_limit = TARGET_HL_TLV_AST_SKID_LIMIT,
582 .num_wds_entries = TARGET_HL_TLV_NUM_WDS_ENTRIES,
583 .target_64bit = true,
584 .rx_ring_fill_level = HTT_RX_RING_FILL_LEVEL_DUAL_MAC,
585 .per_ce_irq = true,
586 .shadow_reg_support = true,
587 .rri_on_ddr = true,
588 .hw_filter_reset_required = false,
589 .fw_diag_ce_download = false,
590 },
591 };
592
593 static const char *const ath10k_core_fw_feature_str[] = {
594 [ATH10K_FW_FEATURE_EXT_WMI_MGMT_RX] = "wmi-mgmt-rx",
595 [ATH10K_FW_FEATURE_WMI_10X] = "wmi-10.x",
596 [ATH10K_FW_FEATURE_HAS_WMI_MGMT_TX] = "has-wmi-mgmt-tx",
597 [ATH10K_FW_FEATURE_NO_P2P] = "no-p2p",
598 [ATH10K_FW_FEATURE_WMI_10_2] = "wmi-10.2",
599 [ATH10K_FW_FEATURE_MULTI_VIF_PS_SUPPORT] = "multi-vif-ps",
600 [ATH10K_FW_FEATURE_WOWLAN_SUPPORT] = "wowlan",
601 [ATH10K_FW_FEATURE_IGNORE_OTP_RESULT] = "ignore-otp",
602 [ATH10K_FW_FEATURE_NO_NWIFI_DECAP_4ADDR_PADDING] = "no-4addr-pad",
603 [ATH10K_FW_FEATURE_SUPPORTS_SKIP_CLOCK_INIT] = "skip-clock-init",
604 [ATH10K_FW_FEATURE_RAW_MODE_SUPPORT] = "raw-mode",
605 [ATH10K_FW_FEATURE_SUPPORTS_ADAPTIVE_CCA] = "adaptive-cca",
606 [ATH10K_FW_FEATURE_MFP_SUPPORT] = "mfp",
607 [ATH10K_FW_FEATURE_PEER_FLOW_CONTROL] = "peer-flow-ctrl",
608 [ATH10K_FW_FEATURE_BTCOEX_PARAM] = "btcoex-param",
609 [ATH10K_FW_FEATURE_SKIP_NULL_FUNC_WAR] = "skip-null-func-war",
610 [ATH10K_FW_FEATURE_ALLOWS_MESH_BCAST] = "allows-mesh-bcast",
611 [ATH10K_FW_FEATURE_NO_PS] = "no-ps",
612 [ATH10K_FW_FEATURE_MGMT_TX_BY_REF] = "mgmt-tx-by-reference",
613 [ATH10K_FW_FEATURE_NON_BMI] = "non-bmi",
614 [ATH10K_FW_FEATURE_SINGLE_CHAN_INFO_PER_CHANNEL] = "single-chan-info-per-channel",
615 };
616
617 static unsigned int ath10k_core_get_fw_feature_str(char *buf,
618 size_t buf_len,
619 enum ath10k_fw_features feat)
620 {
621 /* make sure that ath10k_core_fw_feature_str[] gets updated */
622 BUILD_BUG_ON(ARRAY_SIZE(ath10k_core_fw_feature_str) !=
623 ATH10K_FW_FEATURE_COUNT);
624
625 if (feat >= ARRAY_SIZE(ath10k_core_fw_feature_str) ||
626 WARN_ON(!ath10k_core_fw_feature_str[feat])) {
627 return scnprintf(buf, buf_len, "bit%d", feat);
628 }
629
630 return scnprintf(buf, buf_len, "%s", ath10k_core_fw_feature_str[feat]);
631 }
632
633 void ath10k_core_get_fw_features_str(struct ath10k *ar,
634 char *buf,
635 size_t buf_len)
636 {
637 size_t len = 0;
638 int i;
639
640 for (i = 0; i < ATH10K_FW_FEATURE_COUNT; i++) {
641 if (test_bit(i, ar->normal_mode_fw.fw_file.fw_features)) {
642 if (len > 0)
643 len += scnprintf(buf + len, buf_len - len, ",");
644
645 len += ath10k_core_get_fw_feature_str(buf + len,
646 buf_len - len,
647 i);
648 }
649 }
650 }
651
652 static void ath10k_send_suspend_complete(struct ath10k *ar)
653 {
654 ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot suspend complete\n");
655
656 complete(&ar->target_suspend);
657 }
658
659 static void ath10k_init_sdio(struct ath10k *ar, enum ath10k_firmware_mode mode)
660 {
661 u32 param = 0;
662
663 ath10k_bmi_write32(ar, hi_mbox_io_block_sz, 256);
664 ath10k_bmi_write32(ar, hi_mbox_isr_yield_limit, 99);
665 ath10k_bmi_read32(ar, hi_acs_flags, &param);
666
667 /* Data transfer is not initiated, when reduced Tx completion
668 * is used for SDIO. disable it until fixed
669 */
670 param &= ~HI_ACS_FLAGS_SDIO_REDUCE_TX_COMPL_SET;
671
672 /* Alternate credit size of 1544 as used by SDIO firmware is
673 * not big enough for mac80211 / native wifi frames. disable it
674 */
675 param &= ~HI_ACS_FLAGS_ALT_DATA_CREDIT_SIZE;
676
677 if (mode == ATH10K_FIRMWARE_MODE_UTF)
678 param &= ~HI_ACS_FLAGS_SDIO_SWAP_MAILBOX_SET;
679 else
680 param |= HI_ACS_FLAGS_SDIO_SWAP_MAILBOX_SET;
681
682 ath10k_bmi_write32(ar, hi_acs_flags, param);
683
684 /* Explicitly set fwlog prints to zero as target may turn it on
685 * based on scratch registers.
686 */
687 ath10k_bmi_read32(ar, hi_option_flag, &param);
688 param |= HI_OPTION_DISABLE_DBGLOG;
689 ath10k_bmi_write32(ar, hi_option_flag, param);
690 }
691
692 static int ath10k_init_configure_target(struct ath10k *ar)
693 {
694 u32 param_host;
695 int ret;
696
697 /* tell target which HTC version it is used*/
698 ret = ath10k_bmi_write32(ar, hi_app_host_interest,
699 HTC_PROTOCOL_VERSION);
700 if (ret) {
701 ath10k_err(ar, "settings HTC version failed\n");
702 return ret;
703 }
704
705 /* set the firmware mode to STA/IBSS/AP */
706 ret = ath10k_bmi_read32(ar, hi_option_flag, &param_host);
707 if (ret) {
708 ath10k_err(ar, "setting firmware mode (1/2) failed\n");
709 return ret;
710 }
711
712 /* TODO following parameters need to be re-visited. */
713 /* num_device */
714 param_host |= (1 << HI_OPTION_NUM_DEV_SHIFT);
715 /* Firmware mode */
716 /* FIXME: Why FW_MODE_AP ??.*/
717 param_host |= (HI_OPTION_FW_MODE_AP << HI_OPTION_FW_MODE_SHIFT);
718 /* mac_addr_method */
719 param_host |= (1 << HI_OPTION_MAC_ADDR_METHOD_SHIFT);
720 /* firmware_bridge */
721 param_host |= (0 << HI_OPTION_FW_BRIDGE_SHIFT);
722 /* fwsubmode */
723 param_host |= (0 << HI_OPTION_FW_SUBMODE_SHIFT);
724
725 ret = ath10k_bmi_write32(ar, hi_option_flag, param_host);
726 if (ret) {
727 ath10k_err(ar, "setting firmware mode (2/2) failed\n");
728 return ret;
729 }
730
731 /* We do all byte-swapping on the host */
732 ret = ath10k_bmi_write32(ar, hi_be, 0);
733 if (ret) {
734 ath10k_err(ar, "setting host CPU BE mode failed\n");
735 return ret;
736 }
737
738 /* FW descriptor/Data swap flags */
739 ret = ath10k_bmi_write32(ar, hi_fw_swap, 0);
740
741 if (ret) {
742 ath10k_err(ar, "setting FW data/desc swap flags failed\n");
743 return ret;
744 }
745
746 /* Some devices have a special sanity check that verifies the PCI
747 * Device ID is written to this host interest var. It is known to be
748 * required to boot QCA6164.
749 */
750 ret = ath10k_bmi_write32(ar, hi_hci_uart_pwr_mgmt_params_ext,
751 ar->dev_id);
752 if (ret) {
753 ath10k_err(ar, "failed to set pwr_mgmt_params: %d\n", ret);
754 return ret;
755 }
756
757 return 0;
758 }
759
760 static const struct firmware *ath10k_fetch_fw_file(struct ath10k *ar,
761 const char *dir,
762 const char *file)
763 {
764 char filename[100];
765 const struct firmware *fw;
766 int ret;
767
768 if (file == NULL)
769 return ERR_PTR(-ENOENT);
770
771 if (dir == NULL)
772 dir = ".";
773
774 snprintf(filename, sizeof(filename), "%s/%s", dir, file);
775 ret = firmware_request_nowarn(&fw, filename, ar->dev);
776 ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot fw request '%s': %d\n",
777 filename, ret);
778
779 if (ret)
780 return ERR_PTR(ret);
781
782 return fw;
783 }
784
785 static int ath10k_push_board_ext_data(struct ath10k *ar, const void *data,
786 size_t data_len)
787 {
788 u32 board_data_size = ar->hw_params.fw.board_size;
789 u32 board_ext_data_size = ar->hw_params.fw.board_ext_size;
790 u32 board_ext_data_addr;
791 int ret;
792
793 ret = ath10k_bmi_read32(ar, hi_board_ext_data, &board_ext_data_addr);
794 if (ret) {
795 ath10k_err(ar, "could not read board ext data addr (%d)\n",
796 ret);
797 return ret;
798 }
799
800 ath10k_dbg(ar, ATH10K_DBG_BOOT,
801 "boot push board extended data addr 0x%x\n",
802 board_ext_data_addr);
803
804 if (board_ext_data_addr == 0)
805 return 0;
806
807 if (data_len != (board_data_size + board_ext_data_size)) {
808 ath10k_err(ar, "invalid board (ext) data sizes %zu != %d+%d\n",
809 data_len, board_data_size, board_ext_data_size);
810 return -EINVAL;
811 }
812
813 ret = ath10k_bmi_write_memory(ar, board_ext_data_addr,
814 data + board_data_size,
815 board_ext_data_size);
816 if (ret) {
817 ath10k_err(ar, "could not write board ext data (%d)\n", ret);
818 return ret;
819 }
820
821 ret = ath10k_bmi_write32(ar, hi_board_ext_data_config,
822 (board_ext_data_size << 16) | 1);
823 if (ret) {
824 ath10k_err(ar, "could not write board ext data bit (%d)\n",
825 ret);
826 return ret;
827 }
828
829 return 0;
830 }
831
832 static int ath10k_core_get_board_id_from_otp(struct ath10k *ar)
833 {
834 u32 result, address;
835 u8 board_id, chip_id;
836 bool ext_bid_support;
837 int ret, bmi_board_id_param;
838
839 address = ar->hw_params.patch_load_addr;
840
841 if (!ar->normal_mode_fw.fw_file.otp_data ||
842 !ar->normal_mode_fw.fw_file.otp_len) {
843 ath10k_warn(ar,
844 "failed to retrieve board id because of invalid otp\n");
845 return -ENODATA;
846 }
847
848 ath10k_dbg(ar, ATH10K_DBG_BOOT,
849 "boot upload otp to 0x%x len %zd for board id\n",
850 address, ar->normal_mode_fw.fw_file.otp_len);
851
852 ret = ath10k_bmi_fast_download(ar, address,
853 ar->normal_mode_fw.fw_file.otp_data,
854 ar->normal_mode_fw.fw_file.otp_len);
855 if (ret) {
856 ath10k_err(ar, "could not write otp for board id check: %d\n",
857 ret);
858 return ret;
859 }
860
861 if (ar->cal_mode == ATH10K_PRE_CAL_MODE_DT ||
862 ar->cal_mode == ATH10K_PRE_CAL_MODE_FILE)
863 bmi_board_id_param = BMI_PARAM_GET_FLASH_BOARD_ID;
864 else
865 bmi_board_id_param = BMI_PARAM_GET_EEPROM_BOARD_ID;
866
867 ret = ath10k_bmi_execute(ar, address, bmi_board_id_param, &result);
868 if (ret) {
869 ath10k_err(ar, "could not execute otp for board id check: %d\n",
870 ret);
871 return ret;
872 }
873
874 board_id = MS(result, ATH10K_BMI_BOARD_ID_FROM_OTP);
875 chip_id = MS(result, ATH10K_BMI_CHIP_ID_FROM_OTP);
876 ext_bid_support = (result & ATH10K_BMI_EXT_BOARD_ID_SUPPORT);
877
878 ath10k_dbg(ar, ATH10K_DBG_BOOT,
879 "boot get otp board id result 0x%08x board_id %d chip_id %d ext_bid_support %d\n",
880 result, board_id, chip_id, ext_bid_support);
881
882 ar->id.ext_bid_supported = ext_bid_support;
883
884 if ((result & ATH10K_BMI_BOARD_ID_STATUS_MASK) != 0 ||
885 (board_id == 0)) {
886 ath10k_dbg(ar, ATH10K_DBG_BOOT,
887 "board id does not exist in otp, ignore it\n");
888 return -EOPNOTSUPP;
889 }
890
891 ar->id.bmi_ids_valid = true;
892 ar->id.bmi_board_id = board_id;
893 ar->id.bmi_chip_id = chip_id;
894
895 return 0;
896 }
897
898 static void ath10k_core_check_bdfext(const struct dmi_header *hdr, void *data)
899 {
900 struct ath10k *ar = data;
901 const char *bdf_ext;
902 const char *magic = ATH10K_SMBIOS_BDF_EXT_MAGIC;
903 u8 bdf_enabled;
904 int i;
905
906 if (hdr->type != ATH10K_SMBIOS_BDF_EXT_TYPE)
907 return;
908
909 if (hdr->length != ATH10K_SMBIOS_BDF_EXT_LENGTH) {
910 ath10k_dbg(ar, ATH10K_DBG_BOOT,
911 "wrong smbios bdf ext type length (%d).\n",
912 hdr->length);
913 return;
914 }
915
916 bdf_enabled = *((u8 *)hdr + ATH10K_SMBIOS_BDF_EXT_OFFSET);
917 if (!bdf_enabled) {
918 ath10k_dbg(ar, ATH10K_DBG_BOOT, "bdf variant name not found.\n");
919 return;
920 }
921
922 /* Only one string exists (per spec) */
923 bdf_ext = (char *)hdr + hdr->length;
924
925 if (memcmp(bdf_ext, magic, strlen(magic)) != 0) {
926 ath10k_dbg(ar, ATH10K_DBG_BOOT,
927 "bdf variant magic does not match.\n");
928 return;
929 }
930
931 for (i = 0; i < strlen(bdf_ext); i++) {
932 if (!isascii(bdf_ext[i]) || !isprint(bdf_ext[i])) {
933 ath10k_dbg(ar, ATH10K_DBG_BOOT,
934 "bdf variant name contains non ascii chars.\n");
935 return;
936 }
937 }
938
939 /* Copy extension name without magic suffix */
940 if (strscpy(ar->id.bdf_ext, bdf_ext + strlen(magic),
941 sizeof(ar->id.bdf_ext)) < 0) {
942 ath10k_dbg(ar, ATH10K_DBG_BOOT,
943 "bdf variant string is longer than the buffer can accommodate (variant: %s)\n",
944 bdf_ext);
945 return;
946 }
947
948 ath10k_dbg(ar, ATH10K_DBG_BOOT,
949 "found and validated bdf variant smbios_type 0x%x bdf %s\n",
950 ATH10K_SMBIOS_BDF_EXT_TYPE, bdf_ext);
951 }
952
953 static int ath10k_core_check_smbios(struct ath10k *ar)
954 {
955 ar->id.bdf_ext[0] = '\0';
956 dmi_walk(ath10k_core_check_bdfext, ar);
957
958 if (ar->id.bdf_ext[0] == '\0')
959 return -ENODATA;
960
961 return 0;
962 }
963
964 static int ath10k_core_check_dt(struct ath10k *ar)
965 {
966 struct device_node *node;
967 const char *variant = NULL;
968
969 node = ar->dev->of_node;
970 if (!node)
971 return -ENOENT;
972
973 of_property_read_string(node, "qcom,ath10k-calibration-variant",
974 &variant);
975 if (!variant)
976 return -ENODATA;
977
978 if (strscpy(ar->id.bdf_ext, variant, sizeof(ar->id.bdf_ext)) < 0)
979 ath10k_dbg(ar, ATH10K_DBG_BOOT,
980 "bdf variant string is longer than the buffer can accommodate (variant: %s)\n",
981 variant);
982
983 return 0;
984 }
985
986 static int ath10k_download_fw(struct ath10k *ar)
987 {
988 u32 address, data_len;
989 const void *data;
990 int ret;
991
992 address = ar->hw_params.patch_load_addr;
993
994 data = ar->running_fw->fw_file.firmware_data;
995 data_len = ar->running_fw->fw_file.firmware_len;
996
997 ret = ath10k_swap_code_seg_configure(ar, &ar->running_fw->fw_file);
998 if (ret) {
999 ath10k_err(ar, "failed to configure fw code swap: %d\n",
1000 ret);
1001 return ret;
1002 }
1003
1004 ath10k_dbg(ar, ATH10K_DBG_BOOT,
1005 "boot uploading firmware image %pK len %d\n",
1006 data, data_len);
1007
1008 /* Check if device supports to download firmware via
1009 * diag copy engine. Downloading firmware via diag CE
1010 * greatly reduces the time to download firmware.
1011 */
1012 if (ar->hw_params.fw_diag_ce_download) {
1013 ret = ath10k_hw_diag_fast_download(ar, address,
1014 data, data_len);
1015 if (ret == 0)
1016 /* firmware upload via diag ce was successful */
1017 return 0;
1018
1019 ath10k_warn(ar,
1020 "failed to upload firmware via diag ce, trying BMI: %d",
1021 ret);
1022 }
1023
1024 return ath10k_bmi_fast_download(ar, address,
1025 data, data_len);
1026 }
1027
1028 void ath10k_core_free_board_files(struct ath10k *ar)
1029 {
1030 if (!IS_ERR(ar->normal_mode_fw.board))
1031 release_firmware(ar->normal_mode_fw.board);
1032
1033 if (!IS_ERR(ar->normal_mode_fw.ext_board))
1034 release_firmware(ar->normal_mode_fw.ext_board);
1035
1036 ar->normal_mode_fw.board = NULL;
1037 ar->normal_mode_fw.board_data = NULL;
1038 ar->normal_mode_fw.board_len = 0;
1039 ar->normal_mode_fw.ext_board = NULL;
1040 ar->normal_mode_fw.ext_board_data = NULL;
1041 ar->normal_mode_fw.ext_board_len = 0;
1042 }
1043 EXPORT_SYMBOL(ath10k_core_free_board_files);
1044
1045 static void ath10k_core_free_firmware_files(struct ath10k *ar)
1046 {
1047 if (!IS_ERR(ar->normal_mode_fw.fw_file.firmware))
1048 release_firmware(ar->normal_mode_fw.fw_file.firmware);
1049
1050 if (!IS_ERR(ar->cal_file))
1051 release_firmware(ar->cal_file);
1052
1053 if (!IS_ERR(ar->pre_cal_file))
1054 release_firmware(ar->pre_cal_file);
1055
1056 ath10k_swap_code_seg_release(ar, &ar->normal_mode_fw.fw_file);
1057
1058 ar->normal_mode_fw.fw_file.otp_data = NULL;
1059 ar->normal_mode_fw.fw_file.otp_len = 0;
1060
1061 ar->normal_mode_fw.fw_file.firmware = NULL;
1062 ar->normal_mode_fw.fw_file.firmware_data = NULL;
1063 ar->normal_mode_fw.fw_file.firmware_len = 0;
1064
1065 ar->cal_file = NULL;
1066 ar->pre_cal_file = NULL;
1067 }
1068
1069 static int ath10k_fetch_cal_file(struct ath10k *ar)
1070 {
1071 char filename[100];
1072
1073 /* pre-cal-<bus>-<id>.bin */
1074 scnprintf(filename, sizeof(filename), "pre-cal-%s-%s.bin",
1075 ath10k_bus_str(ar->hif.bus), dev_name(ar->dev));
1076
1077 ar->pre_cal_file = ath10k_fetch_fw_file(ar, ATH10K_FW_DIR, filename);
1078 if (!IS_ERR(ar->pre_cal_file))
1079 goto success;
1080
1081 /* cal-<bus>-<id>.bin */
1082 scnprintf(filename, sizeof(filename), "cal-%s-%s.bin",
1083 ath10k_bus_str(ar->hif.bus), dev_name(ar->dev));
1084
1085 ar->cal_file = ath10k_fetch_fw_file(ar, ATH10K_FW_DIR, filename);
1086 if (IS_ERR(ar->cal_file))
1087 /* calibration file is optional, don't print any warnings */
1088 return PTR_ERR(ar->cal_file);
1089 success:
1090 ath10k_dbg(ar, ATH10K_DBG_BOOT, "found calibration file %s/%s\n",
1091 ATH10K_FW_DIR, filename);
1092
1093 return 0;
1094 }
1095
1096 static int ath10k_core_fetch_board_data_api_1(struct ath10k *ar, int bd_ie_type)
1097 {
1098 const struct firmware *fw;
1099
1100 if (bd_ie_type == ATH10K_BD_IE_BOARD) {
1101 if (!ar->hw_params.fw.board) {
1102 ath10k_err(ar, "failed to find board file fw entry\n");
1103 return -EINVAL;
1104 }
1105
1106 ar->normal_mode_fw.board = ath10k_fetch_fw_file(ar,
1107 ar->hw_params.fw.dir,
1108 ar->hw_params.fw.board);
1109 if (IS_ERR(ar->normal_mode_fw.board))
1110 return PTR_ERR(ar->normal_mode_fw.board);
1111
1112 ar->normal_mode_fw.board_data = ar->normal_mode_fw.board->data;
1113 ar->normal_mode_fw.board_len = ar->normal_mode_fw.board->size;
1114 } else if (bd_ie_type == ATH10K_BD_IE_BOARD_EXT) {
1115 if (!ar->hw_params.fw.eboard) {
1116 ath10k_err(ar, "failed to find eboard file fw entry\n");
1117 return -EINVAL;
1118 }
1119
1120 fw = ath10k_fetch_fw_file(ar, ar->hw_params.fw.dir,
1121 ar->hw_params.fw.eboard);
1122 ar->normal_mode_fw.ext_board = fw;
1123 if (IS_ERR(ar->normal_mode_fw.ext_board))
1124 return PTR_ERR(ar->normal_mode_fw.ext_board);
1125
1126 ar->normal_mode_fw.ext_board_data = ar->normal_mode_fw.ext_board->data;
1127 ar->normal_mode_fw.ext_board_len = ar->normal_mode_fw.ext_board->size;
1128 }
1129
1130 return 0;
1131 }
1132
1133 static int ath10k_core_parse_bd_ie_board(struct ath10k *ar,
1134 const void *buf, size_t buf_len,
1135 const char *boardname,
1136 int bd_ie_type)
1137 {
1138 const struct ath10k_fw_ie *hdr;
1139 bool name_match_found;
1140 int ret, board_ie_id;
1141 size_t board_ie_len;
1142 const void *board_ie_data;
1143
1144 name_match_found = false;
1145
1146 /* go through ATH10K_BD_IE_BOARD_ elements */
1147 while (buf_len > sizeof(struct ath10k_fw_ie)) {
1148 hdr = buf;
1149 board_ie_id = le32_to_cpu(hdr->id);
1150 board_ie_len = le32_to_cpu(hdr->len);
1151 board_ie_data = hdr->data;
1152
1153 buf_len -= sizeof(*hdr);
1154 buf += sizeof(*hdr);
1155
1156 if (buf_len < ALIGN(board_ie_len, 4)) {
1157 ath10k_err(ar, "invalid ATH10K_BD_IE_BOARD length: %zu < %zu\n",
1158 buf_len, ALIGN(board_ie_len, 4));
1159 ret = -EINVAL;
1160 goto out;
1161 }
1162
1163 switch (board_ie_id) {
1164 case ATH10K_BD_IE_BOARD_NAME:
1165 ath10k_dbg_dump(ar, ATH10K_DBG_BOOT, "board name", "",
1166 board_ie_data, board_ie_len);
1167
1168 if (board_ie_len != strlen(boardname))
1169 break;
1170
1171 ret = memcmp(board_ie_data, boardname, strlen(boardname));
1172 if (ret)
1173 break;
1174
1175 name_match_found = true;
1176 ath10k_dbg(ar, ATH10K_DBG_BOOT,
1177 "boot found match for name '%s'",
1178 boardname);
1179 break;
1180 case ATH10K_BD_IE_BOARD_DATA:
1181 if (!name_match_found)
1182 /* no match found */
1183 break;
1184
1185 if (bd_ie_type == ATH10K_BD_IE_BOARD) {
1186 ath10k_dbg(ar, ATH10K_DBG_BOOT,
1187 "boot found board data for '%s'",
1188 boardname);
1189
1190 ar->normal_mode_fw.board_data = board_ie_data;
1191 ar->normal_mode_fw.board_len = board_ie_len;
1192 } else if (bd_ie_type == ATH10K_BD_IE_BOARD_EXT) {
1193 ath10k_dbg(ar, ATH10K_DBG_BOOT,
1194 "boot found eboard data for '%s'",
1195 boardname);
1196
1197 ar->normal_mode_fw.ext_board_data = board_ie_data;
1198 ar->normal_mode_fw.ext_board_len = board_ie_len;
1199 }
1200
1201 ret = 0;
1202 goto out;
1203 default:
1204 ath10k_warn(ar, "unknown ATH10K_BD_IE_BOARD found: %d\n",
1205 board_ie_id);
1206 break;
1207 }
1208
1209 /* jump over the padding */
1210 board_ie_len = ALIGN(board_ie_len, 4);
1211
1212 buf_len -= board_ie_len;
1213 buf += board_ie_len;
1214 }
1215
1216 /* no match found */
1217 ret = -ENOENT;
1218
1219 out:
1220 return ret;
1221 }
1222
1223 static int ath10k_core_search_bd(struct ath10k *ar,
1224 const char *boardname,
1225 const u8 *data,
1226 size_t len)
1227 {
1228 size_t ie_len;
1229 struct ath10k_fw_ie *hdr;
1230 int ret = -ENOENT, ie_id;
1231
1232 while (len > sizeof(struct ath10k_fw_ie)) {
1233 hdr = (struct ath10k_fw_ie *)data;
1234 ie_id = le32_to_cpu(hdr->id);
1235 ie_len = le32_to_cpu(hdr->len);
1236
1237 len -= sizeof(*hdr);
1238 data = hdr->data;
1239
1240 if (len < ALIGN(ie_len, 4)) {
1241 ath10k_err(ar, "invalid length for board ie_id %d ie_len %zu len %zu\n",
1242 ie_id, ie_len, len);
1243 return -EINVAL;
1244 }
1245
1246 switch (ie_id) {
1247 case ATH10K_BD_IE_BOARD:
1248 ret = ath10k_core_parse_bd_ie_board(ar, data, ie_len,
1249 boardname,
1250 ATH10K_BD_IE_BOARD);
1251 if (ret == -ENOENT)
1252 /* no match found, continue */
1253 break;
1254
1255 /* either found or error, so stop searching */
1256 goto out;
1257 case ATH10K_BD_IE_BOARD_EXT:
1258 ret = ath10k_core_parse_bd_ie_board(ar, data, ie_len,
1259 boardname,
1260 ATH10K_BD_IE_BOARD_EXT);
1261 if (ret == -ENOENT)
1262 /* no match found, continue */
1263 break;
1264
1265 /* either found or error, so stop searching */
1266 goto out;
1267 }
1268
1269 /* jump over the padding */
1270 ie_len = ALIGN(ie_len, 4);
1271
1272 len -= ie_len;
1273 data += ie_len;
1274 }
1275
1276 out:
1277 /* return result of parse_bd_ie_board() or -ENOENT */
1278 return ret;
1279 }
1280
1281 static int ath10k_core_fetch_board_data_api_n(struct ath10k *ar,
1282 const char *boardname,
1283 const char *fallback_boardname,
1284 const char *filename)
1285 {
1286 size_t len, magic_len;
1287 const u8 *data;
1288 int ret;
1289
1290 /* Skip if already fetched during board data download */
1291 if (!ar->normal_mode_fw.board)
1292 ar->normal_mode_fw.board = ath10k_fetch_fw_file(ar,
1293 ar->hw_params.fw.dir,
1294 filename);
1295 if (IS_ERR(ar->normal_mode_fw.board))
1296 return PTR_ERR(ar->normal_mode_fw.board);
1297
1298 data = ar->normal_mode_fw.board->data;
1299 len = ar->normal_mode_fw.board->size;
1300
1301 /* magic has extra null byte padded */
1302 magic_len = strlen(ATH10K_BOARD_MAGIC) + 1;
1303 if (len < magic_len) {
1304 ath10k_err(ar, "failed to find magic value in %s/%s, file too short: %zu\n",
1305 ar->hw_params.fw.dir, filename, len);
1306 ret = -EINVAL;
1307 goto err;
1308 }
1309
1310 if (memcmp(data, ATH10K_BOARD_MAGIC, magic_len)) {
1311 ath10k_err(ar, "found invalid board magic\n");
1312 ret = -EINVAL;
1313 goto err;
1314 }
1315
1316 /* magic is padded to 4 bytes */
1317 magic_len = ALIGN(magic_len, 4);
1318 if (len < magic_len) {
1319 ath10k_err(ar, "failed: %s/%s too small to contain board data, len: %zu\n",
1320 ar->hw_params.fw.dir, filename, len);
1321 ret = -EINVAL;
1322 goto err;
1323 }
1324
1325 data += magic_len;
1326 len -= magic_len;
1327
1328 /* attempt to find boardname in the IE list */
1329 ret = ath10k_core_search_bd(ar, boardname, data, len);
1330
1331 /* if we didn't find it and have a fallback name, try that */
1332 if (ret == -ENOENT && fallback_boardname)
1333 ret = ath10k_core_search_bd(ar, fallback_boardname, data, len);
1334
1335 if (ret == -ENOENT) {
1336 ath10k_err(ar,
1337 "failed to fetch board data for %s from %s/%s\n",
1338 boardname, ar->hw_params.fw.dir, filename);
1339 ret = -ENODATA;
1340 }
1341
1342 if (ret)
1343 goto err;
1344
1345 return 0;
1346
1347 err:
1348 ath10k_core_free_board_files(ar);
1349 return ret;
1350 }
1351
1352 static int ath10k_core_create_board_name(struct ath10k *ar, char *name,
1353 size_t name_len, bool with_variant)
1354 {
1355 /* strlen(',variant=') + strlen(ar->id.bdf_ext) */
1356 char variant[9 + ATH10K_SMBIOS_BDF_EXT_STR_LENGTH] = { 0 };
1357
1358 if (with_variant && ar->id.bdf_ext[0] != '\0')
1359 scnprintf(variant, sizeof(variant), ",variant=%s",
1360 ar->id.bdf_ext);
1361
1362 if (ar->id.bmi_ids_valid) {
1363 scnprintf(name, name_len,
1364 "bus=%s,bmi-chip-id=%d,bmi-board-id=%d%s",
1365 ath10k_bus_str(ar->hif.bus),
1366 ar->id.bmi_chip_id,
1367 ar->id.bmi_board_id, variant);
1368 goto out;
1369 }
1370
1371 if (ar->id.qmi_ids_valid) {
1372 scnprintf(name, name_len,
1373 "bus=%s,qmi-board-id=%x",
1374 ath10k_bus_str(ar->hif.bus),
1375 ar->id.qmi_board_id);
1376 goto out;
1377 }
1378
1379 scnprintf(name, name_len,
1380 "bus=%s,vendor=%04x,device=%04x,subsystem-vendor=%04x,subsystem-device=%04x%s",
1381 ath10k_bus_str(ar->hif.bus),
1382 ar->id.vendor, ar->id.device,
1383 ar->id.subsystem_vendor, ar->id.subsystem_device, variant);
1384 out:
1385 ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot using board name '%s'\n", name);
1386
1387 return 0;
1388 }
1389
1390 static int ath10k_core_create_eboard_name(struct ath10k *ar, char *name,
1391 size_t name_len)
1392 {
1393 if (ar->id.bmi_ids_valid) {
1394 scnprintf(name, name_len,
1395 "bus=%s,bmi-chip-id=%d,bmi-eboard-id=%d",
1396 ath10k_bus_str(ar->hif.bus),
1397 ar->id.bmi_chip_id,
1398 ar->id.bmi_eboard_id);
1399
1400 ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot using eboard name '%s'\n", name);
1401 return 0;
1402 }
1403 /* Fallback if returned board id is zero */
1404 return -1;
1405 }
1406
1407 int ath10k_core_fetch_board_file(struct ath10k *ar, int bd_ie_type)
1408 {
1409 char boardname[100], fallback_boardname[100];
1410 int ret;
1411
1412 if (bd_ie_type == ATH10K_BD_IE_BOARD) {
1413 ret = ath10k_core_create_board_name(ar, boardname,
1414 sizeof(boardname), true);
1415 if (ret) {
1416 ath10k_err(ar, "failed to create board name: %d", ret);
1417 return ret;
1418 }
1419
1420 ret = ath10k_core_create_board_name(ar, fallback_boardname,
1421 sizeof(boardname), false);
1422 if (ret) {
1423 ath10k_err(ar, "failed to create fallback board name: %d", ret);
1424 return ret;
1425 }
1426 } else if (bd_ie_type == ATH10K_BD_IE_BOARD_EXT) {
1427 ret = ath10k_core_create_eboard_name(ar, boardname,
1428 sizeof(boardname));
1429 if (ret) {
1430 ath10k_err(ar, "fallback to eboard.bin since board id 0");
1431 goto fallback;
1432 }
1433 }
1434
1435 ar->bd_api = 2;
1436 ret = ath10k_core_fetch_board_data_api_n(ar, boardname,
1437 fallback_boardname,
1438 ATH10K_BOARD_API2_FILE);
1439 if (!ret)
1440 goto success;
1441
1442 fallback:
1443 ar->bd_api = 1;
1444 ret = ath10k_core_fetch_board_data_api_1(ar, bd_ie_type);
1445 if (ret) {
1446 ath10k_err(ar, "failed to fetch board-2.bin or board.bin from %s\n",
1447 ar->hw_params.fw.dir);
1448 return ret;
1449 }
1450
1451 success:
1452 ath10k_dbg(ar, ATH10K_DBG_BOOT, "using board api %d\n", ar->bd_api);
1453 return 0;
1454 }
1455 EXPORT_SYMBOL(ath10k_core_fetch_board_file);
1456
1457 static int ath10k_core_get_ext_board_id_from_otp(struct ath10k *ar)
1458 {
1459 u32 result, address;
1460 u8 ext_board_id;
1461 int ret;
1462
1463 address = ar->hw_params.patch_load_addr;
1464
1465 if (!ar->normal_mode_fw.fw_file.otp_data ||
1466 !ar->normal_mode_fw.fw_file.otp_len) {
1467 ath10k_warn(ar,
1468 "failed to retrieve extended board id due to otp binary missing\n");
1469 return -ENODATA;
1470 }
1471
1472 ath10k_dbg(ar, ATH10K_DBG_BOOT,
1473 "boot upload otp to 0x%x len %zd for ext board id\n",
1474 address, ar->normal_mode_fw.fw_file.otp_len);
1475
1476 ret = ath10k_bmi_fast_download(ar, address,
1477 ar->normal_mode_fw.fw_file.otp_data,
1478 ar->normal_mode_fw.fw_file.otp_len);
1479 if (ret) {
1480 ath10k_err(ar, "could not write otp for ext board id check: %d\n",
1481 ret);
1482 return ret;
1483 }
1484
1485 ret = ath10k_bmi_execute(ar, address, BMI_PARAM_GET_EXT_BOARD_ID, &result);
1486 if (ret) {
1487 ath10k_err(ar, "could not execute otp for ext board id check: %d\n",
1488 ret);
1489 return ret;
1490 }
1491
1492 if (!result) {
1493 ath10k_dbg(ar, ATH10K_DBG_BOOT,
1494 "ext board id does not exist in otp, ignore it\n");
1495 return -EOPNOTSUPP;
1496 }
1497
1498 ext_board_id = result & ATH10K_BMI_EBOARD_ID_STATUS_MASK;
1499
1500 ath10k_dbg(ar, ATH10K_DBG_BOOT,
1501 "boot get otp ext board id result 0x%08x ext_board_id %d\n",
1502 result, ext_board_id);
1503
1504 ar->id.bmi_eboard_id = ext_board_id;
1505
1506 return 0;
1507 }
1508
1509 static int ath10k_download_board_data(struct ath10k *ar, const void *data,
1510 size_t data_len)
1511 {
1512 u32 board_data_size = ar->hw_params.fw.board_size;
1513 u32 eboard_data_size = ar->hw_params.fw.ext_board_size;
1514 u32 board_address;
1515 u32 ext_board_address;
1516 int ret;
1517
1518 ret = ath10k_push_board_ext_data(ar, data, data_len);
1519 if (ret) {
1520 ath10k_err(ar, "could not push board ext data (%d)\n", ret);
1521 goto exit;
1522 }
1523
1524 ret = ath10k_bmi_read32(ar, hi_board_data, &board_address);
1525 if (ret) {
1526 ath10k_err(ar, "could not read board data addr (%d)\n", ret);
1527 goto exit;
1528 }
1529
1530 ret = ath10k_bmi_write_memory(ar, board_address, data,
1531 min_t(u32, board_data_size,
1532 data_len));
1533 if (ret) {
1534 ath10k_err(ar, "could not write board data (%d)\n", ret);
1535 goto exit;
1536 }
1537
1538 ret = ath10k_bmi_write32(ar, hi_board_data_initialized, 1);
1539 if (ret) {
1540 ath10k_err(ar, "could not write board data bit (%d)\n", ret);
1541 goto exit;
1542 }
1543
1544 if (!ar->id.ext_bid_supported)
1545 goto exit;
1546
1547 /* Extended board data download */
1548 ret = ath10k_core_get_ext_board_id_from_otp(ar);
1549 if (ret == -EOPNOTSUPP) {
1550 /* Not fetching ext_board_data if ext board id is 0 */
1551 ath10k_dbg(ar, ATH10K_DBG_BOOT, "otp returned ext board id 0\n");
1552 return 0;
1553 } else if (ret) {
1554 ath10k_err(ar, "failed to get extended board id: %d\n", ret);
1555 goto exit;
1556 }
1557
1558 ret = ath10k_core_fetch_board_file(ar, ATH10K_BD_IE_BOARD_EXT);
1559 if (ret)
1560 goto exit;
1561
1562 if (ar->normal_mode_fw.ext_board_data) {
1563 ext_board_address = board_address + EXT_BOARD_ADDRESS_OFFSET;
1564 ath10k_dbg(ar, ATH10K_DBG_BOOT,
1565 "boot writing ext board data to addr 0x%x",
1566 ext_board_address);
1567 ret = ath10k_bmi_write_memory(ar, ext_board_address,
1568 ar->normal_mode_fw.ext_board_data,
1569 min_t(u32, eboard_data_size, data_len));
1570 if (ret)
1571 ath10k_err(ar, "failed to write ext board data: %d\n", ret);
1572 }
1573
1574 exit:
1575 return ret;
1576 }
1577
1578 static int ath10k_download_and_run_otp(struct ath10k *ar)
1579 {
1580 u32 result, address = ar->hw_params.patch_load_addr;
1581 u32 bmi_otp_exe_param = ar->hw_params.otp_exe_param;
1582 int ret;
1583
1584 ret = ath10k_download_board_data(ar,
1585 ar->running_fw->board_data,
1586 ar->running_fw->board_len);
1587 if (ret) {
1588 ath10k_err(ar, "failed to download board data: %d\n", ret);
1589 return ret;
1590 }
1591
1592 /* OTP is optional */
1593
1594 if (!ar->running_fw->fw_file.otp_data ||
1595 !ar->running_fw->fw_file.otp_len) {
1596 ath10k_warn(ar, "Not running otp, calibration will be incorrect (otp-data %pK otp_len %zd)!\n",
1597 ar->running_fw->fw_file.otp_data,
1598 ar->running_fw->fw_file.otp_len);
1599 return 0;
1600 }
1601
1602 ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot upload otp to 0x%x len %zd\n",
1603 address, ar->running_fw->fw_file.otp_len);
1604
1605 ret = ath10k_bmi_fast_download(ar, address,
1606 ar->running_fw->fw_file.otp_data,
1607 ar->running_fw->fw_file.otp_len);
1608 if (ret) {
1609 ath10k_err(ar, "could not write otp (%d)\n", ret);
1610 return ret;
1611 }
1612
1613 /* As of now pre-cal is valid for 10_4 variants */
1614 if (ar->cal_mode == ATH10K_PRE_CAL_MODE_DT ||
1615 ar->cal_mode == ATH10K_PRE_CAL_MODE_FILE)
1616 bmi_otp_exe_param = BMI_PARAM_FLASH_SECTION_ALL;
1617
1618 ret = ath10k_bmi_execute(ar, address, bmi_otp_exe_param, &result);
1619 if (ret) {
1620 ath10k_err(ar, "could not execute otp (%d)\n", ret);
1621 return ret;
1622 }
1623
1624 ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot otp execute result %d\n", result);
1625
1626 if (!(skip_otp || test_bit(ATH10K_FW_FEATURE_IGNORE_OTP_RESULT,
1627 ar->running_fw->fw_file.fw_features)) &&
1628 result != 0) {
1629 ath10k_err(ar, "otp calibration failed: %d", result);
1630 return -EINVAL;
1631 }
1632
1633 return 0;
1634 }
1635
1636 static int ath10k_download_cal_file(struct ath10k *ar,
1637 const struct firmware *file)
1638 {
1639 int ret;
1640
1641 if (!file)
1642 return -ENOENT;
1643
1644 if (IS_ERR(file))
1645 return PTR_ERR(file);
1646
1647 ret = ath10k_download_board_data(ar, file->data, file->size);
1648 if (ret) {
1649 ath10k_err(ar, "failed to download cal_file data: %d\n", ret);
1650 return ret;
1651 }
1652
1653 ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot cal file downloaded\n");
1654
1655 return 0;
1656 }
1657
1658 static int ath10k_download_cal_dt(struct ath10k *ar, const char *dt_name)
1659 {
1660 struct device_node *node;
1661 int data_len;
1662 void *data;
1663 int ret;
1664
1665 node = ar->dev->of_node;
1666 if (!node)
1667 /* Device Tree is optional, don't print any warnings if
1668 * there's no node for ath10k.
1669 */
1670 return -ENOENT;
1671
1672 if (!of_get_property(node, dt_name, &data_len)) {
1673 /* The calibration data node is optional */
1674 return -ENOENT;
1675 }
1676
1677 if (data_len != ar->hw_params.cal_data_len) {
1678 ath10k_warn(ar, "invalid calibration data length in DT: %d\n",
1679 data_len);
1680 ret = -EMSGSIZE;
1681 goto out;
1682 }
1683
1684 data = kmalloc(data_len, GFP_KERNEL);
1685 if (!data) {
1686 ret = -ENOMEM;
1687 goto out;
1688 }
1689
1690 ret = of_property_read_u8_array(node, dt_name, data, data_len);
1691 if (ret) {
1692 ath10k_warn(ar, "failed to read calibration data from DT: %d\n",
1693 ret);
1694 goto out_free;
1695 }
1696
1697 ret = ath10k_download_board_data(ar, data, data_len);
1698 if (ret) {
1699 ath10k_warn(ar, "failed to download calibration data from Device Tree: %d\n",
1700 ret);
1701 goto out_free;
1702 }
1703
1704 ret = 0;
1705
1706 out_free:
1707 kfree(data);
1708
1709 out:
1710 return ret;
1711 }
1712
1713 static int ath10k_download_cal_eeprom(struct ath10k *ar)
1714 {
1715 size_t data_len;
1716 void *data = NULL;
1717 int ret;
1718
1719 ret = ath10k_hif_fetch_cal_eeprom(ar, &data, &data_len);
1720 if (ret) {
1721 if (ret != -EOPNOTSUPP)
1722 ath10k_warn(ar, "failed to read calibration data from EEPROM: %d\n",
1723 ret);
1724 goto out_free;
1725 }
1726
1727 ret = ath10k_download_board_data(ar, data, data_len);
1728 if (ret) {
1729 ath10k_warn(ar, "failed to download calibration data from EEPROM: %d\n",
1730 ret);
1731 goto out_free;
1732 }
1733
1734 ret = 0;
1735
1736 out_free:
1737 kfree(data);
1738
1739 return ret;
1740 }
1741
1742 int ath10k_core_fetch_firmware_api_n(struct ath10k *ar, const char *name,
1743 struct ath10k_fw_file *fw_file)
1744 {
1745 size_t magic_len, len, ie_len;
1746 int ie_id, i, index, bit, ret;
1747 struct ath10k_fw_ie *hdr;
1748 const u8 *data;
1749 __le32 *timestamp, *version;
1750
1751 /* first fetch the firmware file (firmware-*.bin) */
1752 fw_file->firmware = ath10k_fetch_fw_file(ar, ar->hw_params.fw.dir,
1753 name);
1754 if (IS_ERR(fw_file->firmware))
1755 return PTR_ERR(fw_file->firmware);
1756
1757 data = fw_file->firmware->data;
1758 len = fw_file->firmware->size;
1759
1760 /* magic also includes the null byte, check that as well */
1761 magic_len = strlen(ATH10K_FIRMWARE_MAGIC) + 1;
1762
1763 if (len < magic_len) {
1764 ath10k_err(ar, "firmware file '%s/%s' too small to contain magic: %zu\n",
1765 ar->hw_params.fw.dir, name, len);
1766 ret = -EINVAL;
1767 goto err;
1768 }
1769
1770 if (memcmp(data, ATH10K_FIRMWARE_MAGIC, magic_len) != 0) {
1771 ath10k_err(ar, "invalid firmware magic\n");
1772 ret = -EINVAL;
1773 goto err;
1774 }
1775
1776 /* jump over the padding */
1777 magic_len = ALIGN(magic_len, 4);
1778
1779 len -= magic_len;
1780 data += magic_len;
1781
1782 /* loop elements */
1783 while (len > sizeof(struct ath10k_fw_ie)) {
1784 hdr = (struct ath10k_fw_ie *)data;
1785
1786 ie_id = le32_to_cpu(hdr->id);
1787 ie_len = le32_to_cpu(hdr->len);
1788
1789 len -= sizeof(*hdr);
1790 data += sizeof(*hdr);
1791
1792 if (len < ie_len) {
1793 ath10k_err(ar, "invalid length for FW IE %d (%zu < %zu)\n",
1794 ie_id, len, ie_len);
1795 ret = -EINVAL;
1796 goto err;
1797 }
1798
1799 switch (ie_id) {
1800 case ATH10K_FW_IE_FW_VERSION:
1801 if (ie_len > sizeof(fw_file->fw_version) - 1)
1802 break;
1803
1804 memcpy(fw_file->fw_version, data, ie_len);
1805 fw_file->fw_version[ie_len] = '\0';
1806
1807 ath10k_dbg(ar, ATH10K_DBG_BOOT,
1808 "found fw version %s\n",
1809 fw_file->fw_version);
1810 break;
1811 case ATH10K_FW_IE_TIMESTAMP:
1812 if (ie_len != sizeof(u32))
1813 break;
1814
1815 timestamp = (__le32 *)data;
1816
1817 ath10k_dbg(ar, ATH10K_DBG_BOOT, "found fw timestamp %d\n",
1818 le32_to_cpup(timestamp));
1819 break;
1820 case ATH10K_FW_IE_FEATURES:
1821 ath10k_dbg(ar, ATH10K_DBG_BOOT,
1822 "found firmware features ie (%zd B)\n",
1823 ie_len);
1824
1825 for (i = 0; i < ATH10K_FW_FEATURE_COUNT; i++) {
1826 index = i / 8;
1827 bit = i % 8;
1828
1829 if (index == ie_len)
1830 break;
1831
1832 if (data[index] & (1 << bit)) {
1833 ath10k_dbg(ar, ATH10K_DBG_BOOT,
1834 "Enabling feature bit: %i\n",
1835 i);
1836 __set_bit(i, fw_file->fw_features);
1837 }
1838 }
1839
1840 ath10k_dbg_dump(ar, ATH10K_DBG_BOOT, "features", "",
1841 fw_file->fw_features,
1842 sizeof(fw_file->fw_features));
1843 break;
1844 case ATH10K_FW_IE_FW_IMAGE:
1845 ath10k_dbg(ar, ATH10K_DBG_BOOT,
1846 "found fw image ie (%zd B)\n",
1847 ie_len);
1848
1849 fw_file->firmware_data = data;
1850 fw_file->firmware_len = ie_len;
1851
1852 break;
1853 case ATH10K_FW_IE_OTP_IMAGE:
1854 ath10k_dbg(ar, ATH10K_DBG_BOOT,
1855 "found otp image ie (%zd B)\n",
1856 ie_len);
1857
1858 fw_file->otp_data = data;
1859 fw_file->otp_len = ie_len;
1860
1861 break;
1862 case ATH10K_FW_IE_WMI_OP_VERSION:
1863 if (ie_len != sizeof(u32))
1864 break;
1865
1866 version = (__le32 *)data;
1867
1868 fw_file->wmi_op_version = le32_to_cpup(version);
1869
1870 ath10k_dbg(ar, ATH10K_DBG_BOOT, "found fw ie wmi op version %d\n",
1871 fw_file->wmi_op_version);
1872 break;
1873 case ATH10K_FW_IE_HTT_OP_VERSION:
1874 if (ie_len != sizeof(u32))
1875 break;
1876
1877 version = (__le32 *)data;
1878
1879 fw_file->htt_op_version = le32_to_cpup(version);
1880
1881 ath10k_dbg(ar, ATH10K_DBG_BOOT, "found fw ie htt op version %d\n",
1882 fw_file->htt_op_version);
1883 break;
1884 case ATH10K_FW_IE_FW_CODE_SWAP_IMAGE:
1885 ath10k_dbg(ar, ATH10K_DBG_BOOT,
1886 "found fw code swap image ie (%zd B)\n",
1887 ie_len);
1888 fw_file->codeswap_data = data;
1889 fw_file->codeswap_len = ie_len;
1890 break;
1891 default:
1892 ath10k_warn(ar, "Unknown FW IE: %u\n",
1893 le32_to_cpu(hdr->id));
1894 break;
1895 }
1896
1897 /* jump over the padding */
1898 ie_len = ALIGN(ie_len, 4);
1899
1900 len -= ie_len;
1901 data += ie_len;
1902 }
1903
1904 if (!test_bit(ATH10K_FW_FEATURE_NON_BMI, fw_file->fw_features) &&
1905 (!fw_file->firmware_data || !fw_file->firmware_len)) {
1906 ath10k_warn(ar, "No ATH10K_FW_IE_FW_IMAGE found from '%s/%s', skipping\n",
1907 ar->hw_params.fw.dir, name);
1908 ret = -ENOMEDIUM;
1909 goto err;
1910 }
1911
1912 return 0;
1913
1914 err:
1915 ath10k_core_free_firmware_files(ar);
1916 return ret;
1917 }
1918
1919 static void ath10k_core_get_fw_name(struct ath10k *ar, char *fw_name,
1920 size_t fw_name_len, int fw_api)
1921 {
1922 switch (ar->hif.bus) {
1923 case ATH10K_BUS_SDIO:
1924 case ATH10K_BUS_USB:
1925 scnprintf(fw_name, fw_name_len, "%s-%s-%d.bin",
1926 ATH10K_FW_FILE_BASE, ath10k_bus_str(ar->hif.bus),
1927 fw_api);
1928 break;
1929 case ATH10K_BUS_PCI:
1930 case ATH10K_BUS_AHB:
1931 case ATH10K_BUS_SNOC:
1932 scnprintf(fw_name, fw_name_len, "%s-%d.bin",
1933 ATH10K_FW_FILE_BASE, fw_api);
1934 break;
1935 }
1936 }
1937
1938 static int ath10k_core_fetch_firmware_files(struct ath10k *ar)
1939 {
1940 int ret, i;
1941 char fw_name[100];
1942
1943 /* calibration file is optional, don't check for any errors */
1944 ath10k_fetch_cal_file(ar);
1945
1946 for (i = ATH10K_FW_API_MAX; i >= ATH10K_FW_API_MIN; i--) {
1947 ar->fw_api = i;
1948 ath10k_dbg(ar, ATH10K_DBG_BOOT, "trying fw api %d\n",
1949 ar->fw_api);
1950
1951 ath10k_core_get_fw_name(ar, fw_name, sizeof(fw_name), ar->fw_api);
1952 ret = ath10k_core_fetch_firmware_api_n(ar, fw_name,
1953 &ar->normal_mode_fw.fw_file);
1954 if (!ret)
1955 goto success;
1956 }
1957
1958 /* we end up here if we couldn't fetch any firmware */
1959
1960 ath10k_err(ar, "Failed to find firmware-N.bin (N between %d and %d) from %s: %d",
1961 ATH10K_FW_API_MIN, ATH10K_FW_API_MAX, ar->hw_params.fw.dir,
1962 ret);
1963
1964 return ret;
1965
1966 success:
1967 ath10k_dbg(ar, ATH10K_DBG_BOOT, "using fw api %d\n", ar->fw_api);
1968
1969 return 0;
1970 }
1971
1972 static int ath10k_core_pre_cal_download(struct ath10k *ar)
1973 {
1974 int ret;
1975
1976 ret = ath10k_download_cal_file(ar, ar->pre_cal_file);
1977 if (ret == 0) {
1978 ar->cal_mode = ATH10K_PRE_CAL_MODE_FILE;
1979 goto success;
1980 }
1981
1982 ath10k_dbg(ar, ATH10K_DBG_BOOT,
1983 "boot did not find a pre calibration file, try DT next: %d\n",
1984 ret);
1985
1986 ret = ath10k_download_cal_dt(ar, "qcom,ath10k-pre-calibration-data");
1987 if (ret) {
1988 ath10k_dbg(ar, ATH10K_DBG_BOOT,
1989 "unable to load pre cal data from DT: %d\n", ret);
1990 return ret;
1991 }
1992 ar->cal_mode = ATH10K_PRE_CAL_MODE_DT;
1993
1994 success:
1995 ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot using calibration mode %s\n",
1996 ath10k_cal_mode_str(ar->cal_mode));
1997
1998 return 0;
1999 }
2000
2001 static int ath10k_core_pre_cal_config(struct ath10k *ar)
2002 {
2003 int ret;
2004
2005 ret = ath10k_core_pre_cal_download(ar);
2006 if (ret) {
2007 ath10k_dbg(ar, ATH10K_DBG_BOOT,
2008 "failed to load pre cal data: %d\n", ret);
2009 return ret;
2010 }
2011
2012 ret = ath10k_core_get_board_id_from_otp(ar);
2013 if (ret) {
2014 ath10k_err(ar, "failed to get board id: %d\n", ret);
2015 return ret;
2016 }
2017
2018 ret = ath10k_download_and_run_otp(ar);
2019 if (ret) {
2020 ath10k_err(ar, "failed to run otp: %d\n", ret);
2021 return ret;
2022 }
2023
2024 ath10k_dbg(ar, ATH10K_DBG_BOOT,
2025 "pre cal configuration done successfully\n");
2026
2027 return 0;
2028 }
2029
2030 static int ath10k_download_cal_data(struct ath10k *ar)
2031 {
2032 int ret;
2033
2034 ret = ath10k_core_pre_cal_config(ar);
2035 if (ret == 0)
2036 return 0;
2037
2038 ath10k_dbg(ar, ATH10K_DBG_BOOT,
2039 "pre cal download procedure failed, try cal file: %d\n",
2040 ret);
2041
2042 ret = ath10k_download_cal_file(ar, ar->cal_file);
2043 if (ret == 0) {
2044 ar->cal_mode = ATH10K_CAL_MODE_FILE;
2045 goto done;
2046 }
2047
2048 ath10k_dbg(ar, ATH10K_DBG_BOOT,
2049 "boot did not find a calibration file, try DT next: %d\n",
2050 ret);
2051
2052 ret = ath10k_download_cal_dt(ar, "qcom,ath10k-calibration-data");
2053 if (ret == 0) {
2054 ar->cal_mode = ATH10K_CAL_MODE_DT;
2055 goto done;
2056 }
2057
2058 ath10k_dbg(ar, ATH10K_DBG_BOOT,
2059 "boot did not find DT entry, try target EEPROM next: %d\n",
2060 ret);
2061
2062 ret = ath10k_download_cal_eeprom(ar);
2063 if (ret == 0) {
2064 ar->cal_mode = ATH10K_CAL_MODE_EEPROM;
2065 goto done;
2066 }
2067
2068 ath10k_dbg(ar, ATH10K_DBG_BOOT,
2069 "boot did not find target EEPROM entry, try OTP next: %d\n",
2070 ret);
2071
2072 ret = ath10k_download_and_run_otp(ar);
2073 if (ret) {
2074 ath10k_err(ar, "failed to run otp: %d\n", ret);
2075 return ret;
2076 }
2077
2078 ar->cal_mode = ATH10K_CAL_MODE_OTP;
2079
2080 done:
2081 ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot using calibration mode %s\n",
2082 ath10k_cal_mode_str(ar->cal_mode));
2083 return 0;
2084 }
2085
2086 static int ath10k_init_uart(struct ath10k *ar)
2087 {
2088 int ret;
2089
2090 /*
2091 * Explicitly setting UART prints to zero as target turns it on
2092 * based on scratch registers.
2093 */
2094 ret = ath10k_bmi_write32(ar, hi_serial_enable, 0);
2095 if (ret) {
2096 ath10k_warn(ar, "could not disable UART prints (%d)\n", ret);
2097 return ret;
2098 }
2099
2100 if (!uart_print && ar->hw_params.uart_pin_workaround) {
2101 ret = ath10k_bmi_write32(ar, hi_dbg_uart_txpin,
2102 ar->hw_params.uart_pin);
2103 if (ret) {
2104 ath10k_warn(ar, "failed to set UART TX pin: %d", ret);
2105 return ret;
2106 }
2107
2108 return 0;
2109 }
2110
2111 ret = ath10k_bmi_write32(ar, hi_dbg_uart_txpin, ar->hw_params.uart_pin);
2112 if (ret) {
2113 ath10k_warn(ar, "could not enable UART prints (%d)\n", ret);
2114 return ret;
2115 }
2116
2117 ret = ath10k_bmi_write32(ar, hi_serial_enable, 1);
2118 if (ret) {
2119 ath10k_warn(ar, "could not enable UART prints (%d)\n", ret);
2120 return ret;
2121 }
2122
2123 /* Set the UART baud rate to 19200. */
2124 ret = ath10k_bmi_write32(ar, hi_desired_baud_rate, 19200);
2125 if (ret) {
2126 ath10k_warn(ar, "could not set the baud rate (%d)\n", ret);
2127 return ret;
2128 }
2129
2130 ath10k_info(ar, "UART prints enabled\n");
2131 return 0;
2132 }
2133
2134 static int ath10k_init_hw_params(struct ath10k *ar)
2135 {
2136 const struct ath10k_hw_params *uninitialized_var(hw_params);
2137 int i;
2138
2139 for (i = 0; i < ARRAY_SIZE(ath10k_hw_params_list); i++) {
2140 hw_params = &ath10k_hw_params_list[i];
2141
2142 if (hw_params->bus == ar->hif.bus &&
2143 hw_params->id == ar->target_version &&
2144 hw_params->dev_id == ar->dev_id)
2145 break;
2146 }
2147
2148 if (i == ARRAY_SIZE(ath10k_hw_params_list)) {
2149 ath10k_err(ar, "Unsupported hardware version: 0x%x\n",
2150 ar->target_version);
2151 return -EINVAL;
2152 }
2153
2154 ar->hw_params = *hw_params;
2155
2156 ath10k_dbg(ar, ATH10K_DBG_BOOT, "Hardware name %s version 0x%x\n",
2157 ar->hw_params.name, ar->target_version);
2158
2159 return 0;
2160 }
2161
2162 static void ath10k_core_restart(struct work_struct *work)
2163 {
2164 struct ath10k *ar = container_of(work, struct ath10k, restart_work);
2165 int ret;
2166
2167 set_bit(ATH10K_FLAG_CRASH_FLUSH, &ar->dev_flags);
2168
2169 /* Place a barrier to make sure the compiler doesn't reorder
2170 * CRASH_FLUSH and calling other functions.
2171 */
2172 barrier();
2173
2174 ieee80211_stop_queues(ar->hw);
2175 ath10k_drain_tx(ar);
2176 complete(&ar->scan.started);
2177 complete(&ar->scan.completed);
2178 complete(&ar->scan.on_channel);
2179 complete(&ar->offchan_tx_completed);
2180 complete(&ar->install_key_done);
2181 complete(&ar->vdev_setup_done);
2182 complete(&ar->thermal.wmi_sync);
2183 complete(&ar->bss_survey_done);
2184 wake_up(&ar->htt.empty_tx_wq);
2185 wake_up(&ar->wmi.tx_credits_wq);
2186 wake_up(&ar->peer_mapping_wq);
2187
2188 /* TODO: We can have one instance of cancelling coverage_class_work by
2189 * moving it to ath10k_halt(), so that both stop() and restart() would
2190 * call that but it takes conf_mutex() and if we call cancel_work_sync()
2191 * with conf_mutex it will deadlock.
2192 */
2193 cancel_work_sync(&ar->set_coverage_class_work);
2194
2195 mutex_lock(&ar->conf_mutex);
2196
2197 switch (ar->state) {
2198 case ATH10K_STATE_ON:
2199 ar->state = ATH10K_STATE_RESTARTING;
2200 ath10k_halt(ar);
2201 ath10k_scan_finish(ar);
2202 ieee80211_restart_hw(ar->hw);
2203 break;
2204 case ATH10K_STATE_OFF:
2205 /* this can happen if driver is being unloaded
2206 * or if the crash happens during FW probing
2207 */
2208 ath10k_warn(ar, "cannot restart a device that hasn't been started\n");
2209 break;
2210 case ATH10K_STATE_RESTARTING:
2211 /* hw restart might be requested from multiple places */
2212 break;
2213 case ATH10K_STATE_RESTARTED:
2214 ar->state = ATH10K_STATE_WEDGED;
2215 /* fall through */
2216 case ATH10K_STATE_WEDGED:
2217 ath10k_warn(ar, "device is wedged, will not restart\n");
2218 break;
2219 case ATH10K_STATE_UTF:
2220 ath10k_warn(ar, "firmware restart in UTF mode not supported\n");
2221 break;
2222 }
2223
2224 mutex_unlock(&ar->conf_mutex);
2225
2226 ret = ath10k_coredump_submit(ar);
2227 if (ret)
2228 ath10k_warn(ar, "failed to send firmware crash dump via devcoredump: %d",
2229 ret);
2230
2231 complete(&ar->driver_recovery);
2232 }
2233
2234 static void ath10k_core_set_coverage_class_work(struct work_struct *work)
2235 {
2236 struct ath10k *ar = container_of(work, struct ath10k,
2237 set_coverage_class_work);
2238
2239 if (ar->hw_params.hw_ops->set_coverage_class)
2240 ar->hw_params.hw_ops->set_coverage_class(ar, -1);
2241 }
2242
2243 static int ath10k_core_init_firmware_features(struct ath10k *ar)
2244 {
2245 struct ath10k_fw_file *fw_file = &ar->normal_mode_fw.fw_file;
2246 int max_num_peers;
2247
2248 if (test_bit(ATH10K_FW_FEATURE_WMI_10_2, fw_file->fw_features) &&
2249 !test_bit(ATH10K_FW_FEATURE_WMI_10X, fw_file->fw_features)) {
2250 ath10k_err(ar, "feature bits corrupted: 10.2 feature requires 10.x feature to be set as well");
2251 return -EINVAL;
2252 }
2253
2254 if (fw_file->wmi_op_version >= ATH10K_FW_WMI_OP_VERSION_MAX) {
2255 ath10k_err(ar, "unsupported WMI OP version (max %d): %d\n",
2256 ATH10K_FW_WMI_OP_VERSION_MAX, fw_file->wmi_op_version);
2257 return -EINVAL;
2258 }
2259
2260 ar->wmi.rx_decap_mode = ATH10K_HW_TXRX_NATIVE_WIFI;
2261 switch (ath10k_cryptmode_param) {
2262 case ATH10K_CRYPT_MODE_HW:
2263 clear_bit(ATH10K_FLAG_RAW_MODE, &ar->dev_flags);
2264 clear_bit(ATH10K_FLAG_HW_CRYPTO_DISABLED, &ar->dev_flags);
2265 break;
2266 case ATH10K_CRYPT_MODE_SW:
2267 if (!test_bit(ATH10K_FW_FEATURE_RAW_MODE_SUPPORT,
2268 fw_file->fw_features)) {
2269 ath10k_err(ar, "cryptmode > 0 requires raw mode support from firmware");
2270 return -EINVAL;
2271 }
2272
2273 set_bit(ATH10K_FLAG_RAW_MODE, &ar->dev_flags);
2274 set_bit(ATH10K_FLAG_HW_CRYPTO_DISABLED, &ar->dev_flags);
2275 break;
2276 default:
2277 ath10k_info(ar, "invalid cryptmode: %d\n",
2278 ath10k_cryptmode_param);
2279 return -EINVAL;
2280 }
2281
2282 ar->htt.max_num_amsdu = ATH10K_HTT_MAX_NUM_AMSDU_DEFAULT;
2283 ar->htt.max_num_ampdu = ATH10K_HTT_MAX_NUM_AMPDU_DEFAULT;
2284
2285 if (rawmode) {
2286 if (!test_bit(ATH10K_FW_FEATURE_RAW_MODE_SUPPORT,
2287 fw_file->fw_features)) {
2288 ath10k_err(ar, "rawmode = 1 requires support from firmware");
2289 return -EINVAL;
2290 }
2291 set_bit(ATH10K_FLAG_RAW_MODE, &ar->dev_flags);
2292 }
2293
2294 if (test_bit(ATH10K_FLAG_RAW_MODE, &ar->dev_flags)) {
2295 ar->wmi.rx_decap_mode = ATH10K_HW_TXRX_RAW;
2296
2297 /* Workaround:
2298 *
2299 * Firmware A-MSDU aggregation breaks with RAW Tx encap mode
2300 * and causes enormous performance issues (malformed frames,
2301 * etc).
2302 *
2303 * Disabling A-MSDU makes RAW mode stable with heavy traffic
2304 * albeit a bit slower compared to regular operation.
2305 */
2306 ar->htt.max_num_amsdu = 1;
2307 }
2308
2309 /* Backwards compatibility for firmwares without
2310 * ATH10K_FW_IE_WMI_OP_VERSION.
2311 */
2312 if (fw_file->wmi_op_version == ATH10K_FW_WMI_OP_VERSION_UNSET) {
2313 if (test_bit(ATH10K_FW_FEATURE_WMI_10X, fw_file->fw_features)) {
2314 if (test_bit(ATH10K_FW_FEATURE_WMI_10_2,
2315 fw_file->fw_features))
2316 fw_file->wmi_op_version = ATH10K_FW_WMI_OP_VERSION_10_2;
2317 else
2318 fw_file->wmi_op_version = ATH10K_FW_WMI_OP_VERSION_10_1;
2319 } else {
2320 fw_file->wmi_op_version = ATH10K_FW_WMI_OP_VERSION_MAIN;
2321 }
2322 }
2323
2324 switch (fw_file->wmi_op_version) {
2325 case ATH10K_FW_WMI_OP_VERSION_MAIN:
2326 max_num_peers = TARGET_NUM_PEERS;
2327 ar->max_num_stations = TARGET_NUM_STATIONS;
2328 ar->max_num_vdevs = TARGET_NUM_VDEVS;
2329 ar->htt.max_num_pending_tx = TARGET_NUM_MSDU_DESC;
2330 ar->fw_stats_req_mask = WMI_STAT_PDEV | WMI_STAT_VDEV |
2331 WMI_STAT_PEER;
2332 ar->max_spatial_stream = WMI_MAX_SPATIAL_STREAM;
2333 break;
2334 case ATH10K_FW_WMI_OP_VERSION_10_1:
2335 case ATH10K_FW_WMI_OP_VERSION_10_2:
2336 case ATH10K_FW_WMI_OP_VERSION_10_2_4:
2337 if (ath10k_peer_stats_enabled(ar)) {
2338 max_num_peers = TARGET_10X_TX_STATS_NUM_PEERS;
2339 ar->max_num_stations = TARGET_10X_TX_STATS_NUM_STATIONS;
2340 } else {
2341 max_num_peers = TARGET_10X_NUM_PEERS;
2342 ar->max_num_stations = TARGET_10X_NUM_STATIONS;
2343 }
2344 ar->max_num_vdevs = TARGET_10X_NUM_VDEVS;
2345 ar->htt.max_num_pending_tx = TARGET_10X_NUM_MSDU_DESC;
2346 ar->fw_stats_req_mask = WMI_STAT_PEER;
2347 ar->max_spatial_stream = WMI_MAX_SPATIAL_STREAM;
2348 break;
2349 case ATH10K_FW_WMI_OP_VERSION_TLV:
2350 max_num_peers = TARGET_TLV_NUM_PEERS;
2351 ar->max_num_stations = TARGET_TLV_NUM_STATIONS;
2352 ar->max_num_vdevs = TARGET_TLV_NUM_VDEVS;
2353 ar->max_num_tdls_vdevs = TARGET_TLV_NUM_TDLS_VDEVS;
2354 if (ar->hif.bus == ATH10K_BUS_SDIO)
2355 ar->htt.max_num_pending_tx =
2356 TARGET_TLV_NUM_MSDU_DESC_HL;
2357 else
2358 ar->htt.max_num_pending_tx = TARGET_TLV_NUM_MSDU_DESC;
2359 ar->wow.max_num_patterns = TARGET_TLV_NUM_WOW_PATTERNS;
2360 ar->fw_stats_req_mask = WMI_TLV_STAT_PDEV | WMI_TLV_STAT_VDEV |
2361 WMI_TLV_STAT_PEER | WMI_TLV_STAT_PEER_EXTD;
2362 ar->max_spatial_stream = WMI_MAX_SPATIAL_STREAM;
2363 ar->wmi.mgmt_max_num_pending_tx = TARGET_TLV_MGMT_NUM_MSDU_DESC;
2364 break;
2365 case ATH10K_FW_WMI_OP_VERSION_10_4:
2366 max_num_peers = TARGET_10_4_NUM_PEERS;
2367 ar->max_num_stations = TARGET_10_4_NUM_STATIONS;
2368 ar->num_active_peers = TARGET_10_4_ACTIVE_PEERS;
2369 ar->max_num_vdevs = TARGET_10_4_NUM_VDEVS;
2370 ar->num_tids = TARGET_10_4_TGT_NUM_TIDS;
2371 ar->fw_stats_req_mask = WMI_10_4_STAT_PEER |
2372 WMI_10_4_STAT_PEER_EXTD |
2373 WMI_10_4_STAT_VDEV_EXTD;
2374 ar->max_spatial_stream = ar->hw_params.max_spatial_stream;
2375 ar->max_num_tdls_vdevs = TARGET_10_4_NUM_TDLS_VDEVS;
2376
2377 if (test_bit(ATH10K_FW_FEATURE_PEER_FLOW_CONTROL,
2378 fw_file->fw_features))
2379 ar->htt.max_num_pending_tx = TARGET_10_4_NUM_MSDU_DESC_PFC;
2380 else
2381 ar->htt.max_num_pending_tx = TARGET_10_4_NUM_MSDU_DESC;
2382 break;
2383 case ATH10K_FW_WMI_OP_VERSION_UNSET:
2384 case ATH10K_FW_WMI_OP_VERSION_MAX:
2385 default:
2386 WARN_ON(1);
2387 return -EINVAL;
2388 }
2389
2390 if (ar->hw_params.num_peers)
2391 ar->max_num_peers = ar->hw_params.num_peers;
2392 else
2393 ar->max_num_peers = max_num_peers;
2394
2395 /* Backwards compatibility for firmwares without
2396 * ATH10K_FW_IE_HTT_OP_VERSION.
2397 */
2398 if (fw_file->htt_op_version == ATH10K_FW_HTT_OP_VERSION_UNSET) {
2399 switch (fw_file->wmi_op_version) {
2400 case ATH10K_FW_WMI_OP_VERSION_MAIN:
2401 fw_file->htt_op_version = ATH10K_FW_HTT_OP_VERSION_MAIN;
2402 break;
2403 case ATH10K_FW_WMI_OP_VERSION_10_1:
2404 case ATH10K_FW_WMI_OP_VERSION_10_2:
2405 case ATH10K_FW_WMI_OP_VERSION_10_2_4:
2406 fw_file->htt_op_version = ATH10K_FW_HTT_OP_VERSION_10_1;
2407 break;
2408 case ATH10K_FW_WMI_OP_VERSION_TLV:
2409 fw_file->htt_op_version = ATH10K_FW_HTT_OP_VERSION_TLV;
2410 break;
2411 case ATH10K_FW_WMI_OP_VERSION_10_4:
2412 case ATH10K_FW_WMI_OP_VERSION_UNSET:
2413 case ATH10K_FW_WMI_OP_VERSION_MAX:
2414 ath10k_err(ar, "htt op version not found from fw meta data");
2415 return -EINVAL;
2416 }
2417 }
2418
2419 return 0;
2420 }
2421
2422 static int ath10k_core_reset_rx_filter(struct ath10k *ar)
2423 {
2424 int ret;
2425 int vdev_id;
2426 int vdev_type;
2427 int vdev_subtype;
2428 const u8 *vdev_addr;
2429
2430 vdev_id = 0;
2431 vdev_type = WMI_VDEV_TYPE_STA;
2432 vdev_subtype = ath10k_wmi_get_vdev_subtype(ar, WMI_VDEV_SUBTYPE_NONE);
2433 vdev_addr = ar->mac_addr;
2434
2435 ret = ath10k_wmi_vdev_create(ar, vdev_id, vdev_type, vdev_subtype,
2436 vdev_addr);
2437 if (ret) {
2438 ath10k_err(ar, "failed to create dummy vdev: %d\n", ret);
2439 return ret;
2440 }
2441
2442 ret = ath10k_wmi_vdev_delete(ar, vdev_id);
2443 if (ret) {
2444 ath10k_err(ar, "failed to delete dummy vdev: %d\n", ret);
2445 return ret;
2446 }
2447
2448 /* WMI and HTT may use separate HIF pipes and are not guaranteed to be
2449 * serialized properly implicitly.
2450 *
2451 * Moreover (most) WMI commands have no explicit acknowledges. It is
2452 * possible to infer it implicitly by poking firmware with echo
2453 * command - getting a reply means all preceding comments have been
2454 * (mostly) processed.
2455 *
2456 * In case of vdev create/delete this is sufficient.
2457 *
2458 * Without this it's possible to end up with a race when HTT Rx ring is
2459 * started before vdev create/delete hack is complete allowing a short
2460 * window of opportunity to receive (and Tx ACK) a bunch of frames.
2461 */
2462 ret = ath10k_wmi_barrier(ar);
2463 if (ret) {
2464 ath10k_err(ar, "failed to ping firmware: %d\n", ret);
2465 return ret;
2466 }
2467
2468 return 0;
2469 }
2470
2471 static int ath10k_core_compat_services(struct ath10k *ar)
2472 {
2473 struct ath10k_fw_file *fw_file = &ar->normal_mode_fw.fw_file;
2474
2475 /* all 10.x firmware versions support thermal throttling but don't
2476 * advertise the support via service flags so we have to hardcode
2477 * it here
2478 */
2479 switch (fw_file->wmi_op_version) {
2480 case ATH10K_FW_WMI_OP_VERSION_10_1:
2481 case ATH10K_FW_WMI_OP_VERSION_10_2:
2482 case ATH10K_FW_WMI_OP_VERSION_10_2_4:
2483 case ATH10K_FW_WMI_OP_VERSION_10_4:
2484 set_bit(WMI_SERVICE_THERM_THROT, ar->wmi.svc_map);
2485 break;
2486 default:
2487 break;
2488 }
2489
2490 return 0;
2491 }
2492
2493 int ath10k_core_start(struct ath10k *ar, enum ath10k_firmware_mode mode,
2494 const struct ath10k_fw_components *fw)
2495 {
2496 int status;
2497 u32 val;
2498
2499 lockdep_assert_held(&ar->conf_mutex);
2500
2501 clear_bit(ATH10K_FLAG_CRASH_FLUSH, &ar->dev_flags);
2502
2503 ar->running_fw = fw;
2504
2505 if (!test_bit(ATH10K_FW_FEATURE_NON_BMI,
2506 ar->running_fw->fw_file.fw_features)) {
2507 ath10k_bmi_start(ar);
2508
2509 if (ath10k_init_configure_target(ar)) {
2510 status = -EINVAL;
2511 goto err;
2512 }
2513
2514 status = ath10k_download_cal_data(ar);
2515 if (status)
2516 goto err;
2517
2518 /* Some of of qca988x solutions are having global reset issue
2519 * during target initialization. Bypassing PLL setting before
2520 * downloading firmware and letting the SoC run on REF_CLK is
2521 * fixing the problem. Corresponding firmware change is also
2522 * needed to set the clock source once the target is
2523 * initialized.
2524 */
2525 if (test_bit(ATH10K_FW_FEATURE_SUPPORTS_SKIP_CLOCK_INIT,
2526 ar->running_fw->fw_file.fw_features)) {
2527 status = ath10k_bmi_write32(ar, hi_skip_clock_init, 1);
2528 if (status) {
2529 ath10k_err(ar, "could not write to skip_clock_init: %d\n",
2530 status);
2531 goto err;
2532 }
2533 }
2534
2535 status = ath10k_download_fw(ar);
2536 if (status)
2537 goto err;
2538
2539 status = ath10k_init_uart(ar);
2540 if (status)
2541 goto err;
2542
2543 if (ar->hif.bus == ATH10K_BUS_SDIO)
2544 ath10k_init_sdio(ar, mode);
2545 }
2546
2547 ar->htc.htc_ops.target_send_suspend_complete =
2548 ath10k_send_suspend_complete;
2549
2550 status = ath10k_htc_init(ar);
2551 if (status) {
2552 ath10k_err(ar, "could not init HTC (%d)\n", status);
2553 goto err;
2554 }
2555
2556 if (!test_bit(ATH10K_FW_FEATURE_NON_BMI,
2557 ar->running_fw->fw_file.fw_features)) {
2558 status = ath10k_bmi_done(ar);
2559 if (status)
2560 goto err;
2561 }
2562
2563 status = ath10k_wmi_attach(ar);
2564 if (status) {
2565 ath10k_err(ar, "WMI attach failed: %d\n", status);
2566 goto err;
2567 }
2568
2569 status = ath10k_htt_init(ar);
2570 if (status) {
2571 ath10k_err(ar, "failed to init htt: %d\n", status);
2572 goto err_wmi_detach;
2573 }
2574
2575 status = ath10k_htt_tx_start(&ar->htt);
2576 if (status) {
2577 ath10k_err(ar, "failed to alloc htt tx: %d\n", status);
2578 goto err_wmi_detach;
2579 }
2580
2581 /* If firmware indicates Full Rx Reorder support it must be used in a
2582 * slightly different manner. Let HTT code know.
2583 */
2584 ar->htt.rx_ring.in_ord_rx = !!(test_bit(WMI_SERVICE_RX_FULL_REORDER,
2585 ar->wmi.svc_map));
2586
2587 status = ath10k_htt_rx_alloc(&ar->htt);
2588 if (status) {
2589 ath10k_err(ar, "failed to alloc htt rx: %d\n", status);
2590 goto err_htt_tx_detach;
2591 }
2592
2593 status = ath10k_hif_start(ar);
2594 if (status) {
2595 ath10k_err(ar, "could not start HIF: %d\n", status);
2596 goto err_htt_rx_detach;
2597 }
2598
2599 status = ath10k_htc_wait_target(&ar->htc);
2600 if (status) {
2601 ath10k_err(ar, "failed to connect to HTC: %d\n", status);
2602 goto err_hif_stop;
2603 }
2604
2605 status = ath10k_hif_swap_mailbox(ar);
2606 if (status) {
2607 ath10k_err(ar, "failed to swap mailbox: %d\n", status);
2608 goto err_hif_stop;
2609 }
2610
2611 if (mode == ATH10K_FIRMWARE_MODE_NORMAL) {
2612 status = ath10k_htt_connect(&ar->htt);
2613 if (status) {
2614 ath10k_err(ar, "failed to connect htt (%d)\n", status);
2615 goto err_hif_stop;
2616 }
2617 }
2618
2619 status = ath10k_wmi_connect(ar);
2620 if (status) {
2621 ath10k_err(ar, "could not connect wmi: %d\n", status);
2622 goto err_hif_stop;
2623 }
2624
2625 status = ath10k_htc_start(&ar->htc);
2626 if (status) {
2627 ath10k_err(ar, "failed to start htc: %d\n", status);
2628 goto err_hif_stop;
2629 }
2630
2631 if (mode == ATH10K_FIRMWARE_MODE_NORMAL) {
2632 status = ath10k_wmi_wait_for_service_ready(ar);
2633 if (status) {
2634 ath10k_warn(ar, "wmi service ready event not received");
2635 goto err_hif_stop;
2636 }
2637 }
2638
2639 ath10k_dbg(ar, ATH10K_DBG_BOOT, "firmware %s booted\n",
2640 ar->hw->wiphy->fw_version);
2641
2642 if (test_bit(WMI_SERVICE_EXT_RES_CFG_SUPPORT, ar->wmi.svc_map) &&
2643 mode == ATH10K_FIRMWARE_MODE_NORMAL) {
2644 val = 0;
2645 if (ath10k_peer_stats_enabled(ar))
2646 val = WMI_10_4_PEER_STATS;
2647
2648 /* Enable vdev stats by default */
2649 val |= WMI_10_4_VDEV_STATS;
2650
2651 if (test_bit(WMI_SERVICE_BSS_CHANNEL_INFO_64, ar->wmi.svc_map))
2652 val |= WMI_10_4_BSS_CHANNEL_INFO_64;
2653
2654 /* 10.4 firmware supports BT-Coex without reloading firmware
2655 * via pdev param. To support Bluetooth coexistence pdev param,
2656 * WMI_COEX_GPIO_SUPPORT of extended resource config should be
2657 * enabled always.
2658 */
2659 if (test_bit(WMI_SERVICE_COEX_GPIO, ar->wmi.svc_map) &&
2660 test_bit(ATH10K_FW_FEATURE_BTCOEX_PARAM,
2661 ar->running_fw->fw_file.fw_features))
2662 val |= WMI_10_4_COEX_GPIO_SUPPORT;
2663
2664 if (test_bit(WMI_SERVICE_TDLS_EXPLICIT_MODE_ONLY,
2665 ar->wmi.svc_map))
2666 val |= WMI_10_4_TDLS_EXPLICIT_MODE_ONLY;
2667
2668 if (test_bit(WMI_SERVICE_TDLS_UAPSD_BUFFER_STA,
2669 ar->wmi.svc_map))
2670 val |= WMI_10_4_TDLS_UAPSD_BUFFER_STA;
2671
2672 if (test_bit(WMI_SERVICE_TX_DATA_ACK_RSSI,
2673 ar->wmi.svc_map))
2674 val |= WMI_10_4_TX_DATA_ACK_RSSI;
2675
2676 if (test_bit(WMI_SERVICE_REPORT_AIRTIME, ar->wmi.svc_map))
2677 val |= WMI_10_4_REPORT_AIRTIME;
2678
2679 status = ath10k_mac_ext_resource_config(ar, val);
2680 if (status) {
2681 ath10k_err(ar,
2682 "failed to send ext resource cfg command : %d\n",
2683 status);
2684 goto err_hif_stop;
2685 }
2686 }
2687
2688 status = ath10k_wmi_cmd_init(ar);
2689 if (status) {
2690 ath10k_err(ar, "could not send WMI init command (%d)\n",
2691 status);
2692 goto err_hif_stop;
2693 }
2694
2695 status = ath10k_wmi_wait_for_unified_ready(ar);
2696 if (status) {
2697 ath10k_err(ar, "wmi unified ready event not received\n");
2698 goto err_hif_stop;
2699 }
2700
2701 status = ath10k_core_compat_services(ar);
2702 if (status) {
2703 ath10k_err(ar, "compat services failed: %d\n", status);
2704 goto err_hif_stop;
2705 }
2706
2707 status = ath10k_wmi_pdev_set_base_macaddr(ar, ar->mac_addr);
2708 if (status && status != -EOPNOTSUPP) {
2709 ath10k_err(ar,
2710 "failed to set base mac address: %d\n", status);
2711 goto err_hif_stop;
2712 }
2713
2714 /* Some firmware revisions do not properly set up hardware rx filter
2715 * registers.
2716 *
2717 * A known example from QCA9880 and 10.2.4 is that MAC_PCU_ADDR1_MASK
2718 * is filled with 0s instead of 1s allowing HW to respond with ACKs to
2719 * any frames that matches MAC_PCU_RX_FILTER which is also
2720 * misconfigured to accept anything.
2721 *
2722 * The ADDR1 is programmed using internal firmware structure field and
2723 * can't be (easily/sanely) reached from the driver explicitly. It is
2724 * possible to implicitly make it correct by creating a dummy vdev and
2725 * then deleting it.
2726 */
2727 if (ar->hw_params.hw_filter_reset_required &&
2728 mode == ATH10K_FIRMWARE_MODE_NORMAL) {
2729 status = ath10k_core_reset_rx_filter(ar);
2730 if (status) {
2731 ath10k_err(ar,
2732 "failed to reset rx filter: %d\n", status);
2733 goto err_hif_stop;
2734 }
2735 }
2736
2737 status = ath10k_htt_rx_ring_refill(ar);
2738 if (status) {
2739 ath10k_err(ar, "failed to refill htt rx ring: %d\n", status);
2740 goto err_hif_stop;
2741 }
2742
2743 if (ar->max_num_vdevs >= 64)
2744 ar->free_vdev_map = 0xFFFFFFFFFFFFFFFFLL;
2745 else
2746 ar->free_vdev_map = (1LL << ar->max_num_vdevs) - 1;
2747
2748 INIT_LIST_HEAD(&ar->arvifs);
2749
2750 /* we don't care about HTT in UTF mode */
2751 if (mode == ATH10K_FIRMWARE_MODE_NORMAL) {
2752 status = ath10k_htt_setup(&ar->htt);
2753 if (status) {
2754 ath10k_err(ar, "failed to setup htt: %d\n", status);
2755 goto err_hif_stop;
2756 }
2757 }
2758
2759 status = ath10k_debug_start(ar);
2760 if (status)
2761 goto err_hif_stop;
2762
2763 return 0;
2764
2765 err_hif_stop:
2766 ath10k_hif_stop(ar);
2767 err_htt_rx_detach:
2768 ath10k_htt_rx_free(&ar->htt);
2769 err_htt_tx_detach:
2770 ath10k_htt_tx_free(&ar->htt);
2771 err_wmi_detach:
2772 ath10k_wmi_detach(ar);
2773 err:
2774 return status;
2775 }
2776 EXPORT_SYMBOL(ath10k_core_start);
2777
2778 int ath10k_wait_for_suspend(struct ath10k *ar, u32 suspend_opt)
2779 {
2780 int ret;
2781 unsigned long time_left;
2782
2783 reinit_completion(&ar->target_suspend);
2784
2785 ret = ath10k_wmi_pdev_suspend_target(ar, suspend_opt);
2786 if (ret) {
2787 ath10k_warn(ar, "could not suspend target (%d)\n", ret);
2788 return ret;
2789 }
2790
2791 time_left = wait_for_completion_timeout(&ar->target_suspend, 1 * HZ);
2792
2793 if (!time_left) {
2794 ath10k_warn(ar, "suspend timed out - target pause event never came\n");
2795 return -ETIMEDOUT;
2796 }
2797
2798 return 0;
2799 }
2800
2801 void ath10k_core_stop(struct ath10k *ar)
2802 {
2803 lockdep_assert_held(&ar->conf_mutex);
2804 ath10k_debug_stop(ar);
2805
2806 /* try to suspend target */
2807 if (ar->state != ATH10K_STATE_RESTARTING &&
2808 ar->state != ATH10K_STATE_UTF)
2809 ath10k_wait_for_suspend(ar, WMI_PDEV_SUSPEND_AND_DISABLE_INTR);
2810
2811 ath10k_hif_stop(ar);
2812 ath10k_htt_tx_stop(&ar->htt);
2813 ath10k_htt_rx_free(&ar->htt);
2814 ath10k_wmi_detach(ar);
2815 }
2816 EXPORT_SYMBOL(ath10k_core_stop);
2817
2818 /* mac80211 manages fw/hw initialization through start/stop hooks. However in
2819 * order to know what hw capabilities should be advertised to mac80211 it is
2820 * necessary to load the firmware (and tear it down immediately since start
2821 * hook will try to init it again) before registering
2822 */
2823 static int ath10k_core_probe_fw(struct ath10k *ar)
2824 {
2825 struct bmi_target_info target_info;
2826 int ret = 0;
2827
2828 ret = ath10k_hif_power_up(ar, ATH10K_FIRMWARE_MODE_NORMAL);
2829 if (ret) {
2830 ath10k_err(ar, "could not power on hif bus (%d)\n", ret);
2831 return ret;
2832 }
2833
2834 switch (ar->hif.bus) {
2835 case ATH10K_BUS_SDIO:
2836 memset(&target_info, 0, sizeof(target_info));
2837 ret = ath10k_bmi_get_target_info_sdio(ar, &target_info);
2838 if (ret) {
2839 ath10k_err(ar, "could not get target info (%d)\n", ret);
2840 goto err_power_down;
2841 }
2842 ar->target_version = target_info.version;
2843 ar->hw->wiphy->hw_version = target_info.version;
2844 break;
2845 case ATH10K_BUS_PCI:
2846 case ATH10K_BUS_AHB:
2847 case ATH10K_BUS_USB:
2848 memset(&target_info, 0, sizeof(target_info));
2849 ret = ath10k_bmi_get_target_info(ar, &target_info);
2850 if (ret) {
2851 ath10k_err(ar, "could not get target info (%d)\n", ret);
2852 goto err_power_down;
2853 }
2854 ar->target_version = target_info.version;
2855 ar->hw->wiphy->hw_version = target_info.version;
2856 break;
2857 case ATH10K_BUS_SNOC:
2858 memset(&target_info, 0, sizeof(target_info));
2859 ret = ath10k_hif_get_target_info(ar, &target_info);
2860 if (ret) {
2861 ath10k_err(ar, "could not get target info (%d)\n", ret);
2862 goto err_power_down;
2863 }
2864 ar->target_version = target_info.version;
2865 ar->hw->wiphy->hw_version = target_info.version;
2866 break;
2867 default:
2868 ath10k_err(ar, "incorrect hif bus type: %d\n", ar->hif.bus);
2869 }
2870
2871 ret = ath10k_init_hw_params(ar);
2872 if (ret) {
2873 ath10k_err(ar, "could not get hw params (%d)\n", ret);
2874 goto err_power_down;
2875 }
2876
2877 ret = ath10k_core_fetch_firmware_files(ar);
2878 if (ret) {
2879 ath10k_err(ar, "could not fetch firmware files (%d)\n", ret);
2880 goto err_power_down;
2881 }
2882
2883 BUILD_BUG_ON(sizeof(ar->hw->wiphy->fw_version) !=
2884 sizeof(ar->normal_mode_fw.fw_file.fw_version));
2885 memcpy(ar->hw->wiphy->fw_version, ar->normal_mode_fw.fw_file.fw_version,
2886 sizeof(ar->hw->wiphy->fw_version));
2887
2888 ath10k_debug_print_hwfw_info(ar);
2889
2890 if (!test_bit(ATH10K_FW_FEATURE_NON_BMI,
2891 ar->normal_mode_fw.fw_file.fw_features)) {
2892 ret = ath10k_core_pre_cal_download(ar);
2893 if (ret) {
2894 /* pre calibration data download is not necessary
2895 * for all the chipsets. Ignore failures and continue.
2896 */
2897 ath10k_dbg(ar, ATH10K_DBG_BOOT,
2898 "could not load pre cal data: %d\n", ret);
2899 }
2900
2901 ret = ath10k_core_get_board_id_from_otp(ar);
2902 if (ret && ret != -EOPNOTSUPP) {
2903 ath10k_err(ar, "failed to get board id from otp: %d\n",
2904 ret);
2905 goto err_free_firmware_files;
2906 }
2907
2908 ret = ath10k_core_check_smbios(ar);
2909 if (ret)
2910 ath10k_dbg(ar, ATH10K_DBG_BOOT, "SMBIOS bdf variant name not set.\n");
2911
2912 ret = ath10k_core_check_dt(ar);
2913 if (ret)
2914 ath10k_dbg(ar, ATH10K_DBG_BOOT, "DT bdf variant name not set.\n");
2915
2916 ret = ath10k_core_fetch_board_file(ar, ATH10K_BD_IE_BOARD);
2917 if (ret) {
2918 ath10k_err(ar, "failed to fetch board file: %d\n", ret);
2919 goto err_free_firmware_files;
2920 }
2921
2922 ath10k_debug_print_board_info(ar);
2923 }
2924
2925 device_get_mac_address(ar->dev, ar->mac_addr, sizeof(ar->mac_addr));
2926
2927 ret = ath10k_core_init_firmware_features(ar);
2928 if (ret) {
2929 ath10k_err(ar, "fatal problem with firmware features: %d\n",
2930 ret);
2931 goto err_free_firmware_files;
2932 }
2933
2934 if (!test_bit(ATH10K_FW_FEATURE_NON_BMI,
2935 ar->normal_mode_fw.fw_file.fw_features)) {
2936 ret = ath10k_swap_code_seg_init(ar,
2937 &ar->normal_mode_fw.fw_file);
2938 if (ret) {
2939 ath10k_err(ar, "failed to initialize code swap segment: %d\n",
2940 ret);
2941 goto err_free_firmware_files;
2942 }
2943 }
2944
2945 mutex_lock(&ar->conf_mutex);
2946
2947 ret = ath10k_core_start(ar, ATH10K_FIRMWARE_MODE_NORMAL,
2948 &ar->normal_mode_fw);
2949 if (ret) {
2950 ath10k_err(ar, "could not init core (%d)\n", ret);
2951 goto err_unlock;
2952 }
2953
2954 ath10k_debug_print_boot_info(ar);
2955 ath10k_core_stop(ar);
2956
2957 mutex_unlock(&ar->conf_mutex);
2958
2959 ath10k_hif_power_down(ar);
2960 return 0;
2961
2962 err_unlock:
2963 mutex_unlock(&ar->conf_mutex);
2964
2965 err_free_firmware_files:
2966 ath10k_core_free_firmware_files(ar);
2967
2968 err_power_down:
2969 ath10k_hif_power_down(ar);
2970
2971 return ret;
2972 }
2973
2974 static void ath10k_core_register_work(struct work_struct *work)
2975 {
2976 struct ath10k *ar = container_of(work, struct ath10k, register_work);
2977 int status;
2978
2979 /* peer stats are enabled by default */
2980 set_bit(ATH10K_FLAG_PEER_STATS, &ar->dev_flags);
2981
2982 status = ath10k_core_probe_fw(ar);
2983 if (status) {
2984 ath10k_err(ar, "could not probe fw (%d)\n", status);
2985 goto err;
2986 }
2987
2988 status = ath10k_mac_register(ar);
2989 if (status) {
2990 ath10k_err(ar, "could not register to mac80211 (%d)\n", status);
2991 goto err_release_fw;
2992 }
2993
2994 status = ath10k_coredump_register(ar);
2995 if (status) {
2996 ath10k_err(ar, "unable to register coredump\n");
2997 goto err_unregister_mac;
2998 }
2999
3000 status = ath10k_debug_register(ar);
3001 if (status) {
3002 ath10k_err(ar, "unable to initialize debugfs\n");
3003 goto err_unregister_coredump;
3004 }
3005
3006 status = ath10k_spectral_create(ar);
3007 if (status) {
3008 ath10k_err(ar, "failed to initialize spectral\n");
3009 goto err_debug_destroy;
3010 }
3011
3012 status = ath10k_thermal_register(ar);
3013 if (status) {
3014 ath10k_err(ar, "could not register thermal device: %d\n",
3015 status);
3016 goto err_spectral_destroy;
3017 }
3018
3019 set_bit(ATH10K_FLAG_CORE_REGISTERED, &ar->dev_flags);
3020 return;
3021
3022 err_spectral_destroy:
3023 ath10k_spectral_destroy(ar);
3024 err_debug_destroy:
3025 ath10k_debug_destroy(ar);
3026 err_unregister_coredump:
3027 ath10k_coredump_unregister(ar);
3028 err_unregister_mac:
3029 ath10k_mac_unregister(ar);
3030 err_release_fw:
3031 ath10k_core_free_firmware_files(ar);
3032 err:
3033 /* TODO: It's probably a good idea to release device from the driver
3034 * but calling device_release_driver() here will cause a deadlock.
3035 */
3036 return;
3037 }
3038
3039 int ath10k_core_register(struct ath10k *ar,
3040 const struct ath10k_bus_params *bus_params)
3041 {
3042 ar->bus_param = *bus_params;
3043
3044 queue_work(ar->workqueue, &ar->register_work);
3045
3046 return 0;
3047 }
3048 EXPORT_SYMBOL(ath10k_core_register);
3049
3050 void ath10k_core_unregister(struct ath10k *ar)
3051 {
3052 cancel_work_sync(&ar->register_work);
3053
3054 if (!test_bit(ATH10K_FLAG_CORE_REGISTERED, &ar->dev_flags))
3055 return;
3056
3057 ath10k_thermal_unregister(ar);
3058 /* Stop spectral before unregistering from mac80211 to remove the
3059 * relayfs debugfs file cleanly. Otherwise the parent debugfs tree
3060 * would be already be free'd recursively, leading to a double free.
3061 */
3062 ath10k_spectral_destroy(ar);
3063
3064 /* We must unregister from mac80211 before we stop HTC and HIF.
3065 * Otherwise we will fail to submit commands to FW and mac80211 will be
3066 * unhappy about callback failures.
3067 */
3068 ath10k_mac_unregister(ar);
3069
3070 ath10k_testmode_destroy(ar);
3071
3072 ath10k_core_free_firmware_files(ar);
3073 ath10k_core_free_board_files(ar);
3074
3075 ath10k_debug_unregister(ar);
3076 }
3077 EXPORT_SYMBOL(ath10k_core_unregister);
3078
3079 struct ath10k *ath10k_core_create(size_t priv_size, struct device *dev,
3080 enum ath10k_bus bus,
3081 enum ath10k_hw_rev hw_rev,
3082 const struct ath10k_hif_ops *hif_ops)
3083 {
3084 struct ath10k *ar;
3085 int ret;
3086
3087 ar = ath10k_mac_create(priv_size);
3088 if (!ar)
3089 return NULL;
3090
3091 ar->ath_common.priv = ar;
3092 ar->ath_common.hw = ar->hw;
3093 ar->dev = dev;
3094 ar->hw_rev = hw_rev;
3095 ar->hif.ops = hif_ops;
3096 ar->hif.bus = bus;
3097
3098 switch (hw_rev) {
3099 case ATH10K_HW_QCA988X:
3100 case ATH10K_HW_QCA9887:
3101 ar->regs = &qca988x_regs;
3102 ar->hw_ce_regs = &qcax_ce_regs;
3103 ar->hw_values = &qca988x_values;
3104 break;
3105 case ATH10K_HW_QCA6174:
3106 case ATH10K_HW_QCA9377:
3107 ar->regs = &qca6174_regs;
3108 ar->hw_ce_regs = &qcax_ce_regs;
3109 ar->hw_values = &qca6174_values;
3110 break;
3111 case ATH10K_HW_QCA99X0:
3112 case ATH10K_HW_QCA9984:
3113 ar->regs = &qca99x0_regs;
3114 ar->hw_ce_regs = &qcax_ce_regs;
3115 ar->hw_values = &qca99x0_values;
3116 break;
3117 case ATH10K_HW_QCA9888:
3118 ar->regs = &qca99x0_regs;
3119 ar->hw_ce_regs = &qcax_ce_regs;
3120 ar->hw_values = &qca9888_values;
3121 break;
3122 case ATH10K_HW_QCA4019:
3123 ar->regs = &qca4019_regs;
3124 ar->hw_ce_regs = &qcax_ce_regs;
3125 ar->hw_values = &qca4019_values;
3126 break;
3127 case ATH10K_HW_WCN3990:
3128 ar->regs = &wcn3990_regs;
3129 ar->hw_ce_regs = &wcn3990_ce_regs;
3130 ar->hw_values = &wcn3990_values;
3131 break;
3132 default:
3133 ath10k_err(ar, "unsupported core hardware revision %d\n",
3134 hw_rev);
3135 ret = -ENOTSUPP;
3136 goto err_free_mac;
3137 }
3138
3139 init_completion(&ar->scan.started);
3140 init_completion(&ar->scan.completed);
3141 init_completion(&ar->scan.on_channel);
3142 init_completion(&ar->target_suspend);
3143 init_completion(&ar->driver_recovery);
3144 init_completion(&ar->wow.wakeup_completed);
3145
3146 init_completion(&ar->install_key_done);
3147 init_completion(&ar->vdev_setup_done);
3148 init_completion(&ar->thermal.wmi_sync);
3149 init_completion(&ar->bss_survey_done);
3150
3151 INIT_DELAYED_WORK(&ar->scan.timeout, ath10k_scan_timeout_work);
3152
3153 ar->workqueue = create_singlethread_workqueue("ath10k_wq");
3154 if (!ar->workqueue)
3155 goto err_free_mac;
3156
3157 ar->workqueue_aux = create_singlethread_workqueue("ath10k_aux_wq");
3158 if (!ar->workqueue_aux)
3159 goto err_free_wq;
3160
3161 mutex_init(&ar->conf_mutex);
3162 mutex_init(&ar->dump_mutex);
3163 spin_lock_init(&ar->data_lock);
3164
3165 INIT_LIST_HEAD(&ar->peers);
3166 init_waitqueue_head(&ar->peer_mapping_wq);
3167 init_waitqueue_head(&ar->htt.empty_tx_wq);
3168 init_waitqueue_head(&ar->wmi.tx_credits_wq);
3169
3170 init_completion(&ar->offchan_tx_completed);
3171 INIT_WORK(&ar->offchan_tx_work, ath10k_offchan_tx_work);
3172 skb_queue_head_init(&ar->offchan_tx_queue);
3173
3174 INIT_WORK(&ar->wmi_mgmt_tx_work, ath10k_mgmt_over_wmi_tx_work);
3175 skb_queue_head_init(&ar->wmi_mgmt_tx_queue);
3176
3177 INIT_WORK(&ar->register_work, ath10k_core_register_work);
3178 INIT_WORK(&ar->restart_work, ath10k_core_restart);
3179 INIT_WORK(&ar->set_coverage_class_work,
3180 ath10k_core_set_coverage_class_work);
3181
3182 init_dummy_netdev(&ar->napi_dev);
3183
3184 ret = ath10k_coredump_create(ar);
3185 if (ret)
3186 goto err_free_aux_wq;
3187
3188 ret = ath10k_debug_create(ar);
3189 if (ret)
3190 goto err_free_coredump;
3191
3192 return ar;
3193
3194 err_free_coredump:
3195 ath10k_coredump_destroy(ar);
3196
3197 err_free_aux_wq:
3198 destroy_workqueue(ar->workqueue_aux);
3199 err_free_wq:
3200 destroy_workqueue(ar->workqueue);
3201
3202 err_free_mac:
3203 ath10k_mac_destroy(ar);
3204
3205 return NULL;
3206 }
3207 EXPORT_SYMBOL(ath10k_core_create);
3208
3209 void ath10k_core_destroy(struct ath10k *ar)
3210 {
3211 flush_workqueue(ar->workqueue);
3212 destroy_workqueue(ar->workqueue);
3213
3214 flush_workqueue(ar->workqueue_aux);
3215 destroy_workqueue(ar->workqueue_aux);
3216
3217 ath10k_debug_destroy(ar);
3218 ath10k_coredump_destroy(ar);
3219 ath10k_htt_tx_destroy(&ar->htt);
3220 ath10k_wmi_free_host_mem(ar);
3221 ath10k_mac_destroy(ar);
3222 }
3223 EXPORT_SYMBOL(ath10k_core_destroy);
3224
3225 MODULE_AUTHOR("Qualcomm Atheros");
3226 MODULE_DESCRIPTION("Core module for Qualcomm Atheros 802.11ac wireless LAN cards.");
3227 MODULE_LICENSE("Dual BSD/GPL");
Ubuntu Jammy Linux kernel mirror