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1 /*
2 * Copyright (c) 2005-2011 Atheros Communications Inc.
3 * Copyright (c) 2011-2013 Qualcomm Atheros, Inc.
4 *
5 * Permission to use, copy, modify, and/or distribute this software for any
6 * purpose with or without fee is hereby granted, provided that the above
7 * copyright notice and this permission notice appear in all copies.
8 *
9 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
10 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
11 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
12 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
13 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
14 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
15 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
16 */
17
18 #ifndef _CORE_H_
19 #define _CORE_H_
20
21 #include <linux/completion.h>
22 #include <linux/if_ether.h>
23 #include <linux/types.h>
24 #include <linux/pci.h>
25 #include <linux/uuid.h>
26 #include <linux/time.h>
27
28 #include "htt.h"
29 #include "htc.h"
30 #include "hw.h"
31 #include "targaddrs.h"
32 #include "wmi.h"
33 #include "../ath.h"
34 #include "../regd.h"
35 #include "../dfs_pattern_detector.h"
36 #include "spectral.h"
37 #include "thermal.h"
38 #include "wow.h"
39 #include "swap.h"
40
41 #define MS(_v, _f) (((_v) & _f##_MASK) >> _f##_LSB)
42 #define SM(_v, _f) (((_v) << _f##_LSB) & _f##_MASK)
43 #define WO(_f) ((_f##_OFFSET) >> 2)
44
45 #define ATH10K_SCAN_ID 0
46 #define WMI_READY_TIMEOUT (5 * HZ)
47 #define ATH10K_FLUSH_TIMEOUT_HZ (5*HZ)
48 #define ATH10K_CONNECTION_LOSS_HZ (3*HZ)
49 #define ATH10K_NUM_CHANS 39
50
51 /* Antenna noise floor */
52 #define ATH10K_DEFAULT_NOISE_FLOOR -95
53
54 #define ATH10K_MAX_NUM_MGMT_PENDING 128
55
56 /* number of failed packets (20 packets with 16 sw reties each) */
57 #define ATH10K_KICKOUT_THRESHOLD (20 * 16)
58
59 /*
60 * Use insanely high numbers to make sure that the firmware implementation
61 * won't start, we have the same functionality already in hostapd. Unit
62 * is seconds.
63 */
64 #define ATH10K_KEEPALIVE_MIN_IDLE 3747
65 #define ATH10K_KEEPALIVE_MAX_IDLE 3895
66 #define ATH10K_KEEPALIVE_MAX_UNRESPONSIVE 3900
67
68 struct ath10k;
69
70 enum ath10k_bus {
71 ATH10K_BUS_PCI,
72 ATH10K_BUS_AHB,
73 };
74
75 static inline const char *ath10k_bus_str(enum ath10k_bus bus)
76 {
77 switch (bus) {
78 case ATH10K_BUS_PCI:
79 return "pci";
80 case ATH10K_BUS_AHB:
81 return "ahb";
82 }
83
84 return "unknown";
85 }
86
87 enum ath10k_skb_flags {
88 ATH10K_SKB_F_NO_HWCRYPT = BIT(0),
89 ATH10K_SKB_F_DTIM_ZERO = BIT(1),
90 ATH10K_SKB_F_DELIVER_CAB = BIT(2),
91 ATH10K_SKB_F_MGMT = BIT(3),
92 ATH10K_SKB_F_QOS = BIT(4),
93 };
94
95 struct ath10k_skb_cb {
96 dma_addr_t paddr;
97 u8 flags;
98 u8 eid;
99 u16 msdu_id;
100 struct ieee80211_vif *vif;
101 struct ieee80211_txq *txq;
102 } __packed;
103
104 struct ath10k_skb_rxcb {
105 dma_addr_t paddr;
106 struct hlist_node hlist;
107 };
108
109 static inline struct ath10k_skb_cb *ATH10K_SKB_CB(struct sk_buff *skb)
110 {
111 BUILD_BUG_ON(sizeof(struct ath10k_skb_cb) >
112 IEEE80211_TX_INFO_DRIVER_DATA_SIZE);
113 return (struct ath10k_skb_cb *)&IEEE80211_SKB_CB(skb)->driver_data;
114 }
115
116 static inline struct ath10k_skb_rxcb *ATH10K_SKB_RXCB(struct sk_buff *skb)
117 {
118 BUILD_BUG_ON(sizeof(struct ath10k_skb_rxcb) > sizeof(skb->cb));
119 return (struct ath10k_skb_rxcb *)skb->cb;
120 }
121
122 #define ATH10K_RXCB_SKB(rxcb) \
123 container_of((void *)rxcb, struct sk_buff, cb)
124
125 static inline u32 host_interest_item_address(u32 item_offset)
126 {
127 return QCA988X_HOST_INTEREST_ADDRESS + item_offset;
128 }
129
130 struct ath10k_bmi {
131 bool done_sent;
132 };
133
134 struct ath10k_mem_chunk {
135 void *vaddr;
136 dma_addr_t paddr;
137 u32 len;
138 u32 req_id;
139 };
140
141 struct ath10k_wmi {
142 enum ath10k_fw_wmi_op_version op_version;
143 enum ath10k_htc_ep_id eid;
144 struct completion service_ready;
145 struct completion unified_ready;
146 wait_queue_head_t tx_credits_wq;
147 DECLARE_BITMAP(svc_map, WMI_SERVICE_MAX);
148 struct wmi_cmd_map *cmd;
149 struct wmi_vdev_param_map *vdev_param;
150 struct wmi_pdev_param_map *pdev_param;
151 const struct wmi_ops *ops;
152 const struct wmi_peer_flags_map *peer_flags;
153
154 u32 num_mem_chunks;
155 u32 rx_decap_mode;
156 struct ath10k_mem_chunk mem_chunks[WMI_MAX_MEM_REQS];
157 };
158
159 struct ath10k_fw_stats_peer {
160 struct list_head list;
161
162 u8 peer_macaddr[ETH_ALEN];
163 u32 peer_rssi;
164 u32 peer_tx_rate;
165 u32 peer_rx_rate; /* 10x only */
166 u32 rx_duration;
167 };
168
169 struct ath10k_fw_stats_vdev {
170 struct list_head list;
171
172 u32 vdev_id;
173 u32 beacon_snr;
174 u32 data_snr;
175 u32 num_tx_frames[4];
176 u32 num_rx_frames;
177 u32 num_tx_frames_retries[4];
178 u32 num_tx_frames_failures[4];
179 u32 num_rts_fail;
180 u32 num_rts_success;
181 u32 num_rx_err;
182 u32 num_rx_discard;
183 u32 num_tx_not_acked;
184 u32 tx_rate_history[10];
185 u32 beacon_rssi_history[10];
186 };
187
188 struct ath10k_fw_stats_pdev {
189 struct list_head list;
190
191 /* PDEV stats */
192 s32 ch_noise_floor;
193 u32 tx_frame_count;
194 u32 rx_frame_count;
195 u32 rx_clear_count;
196 u32 cycle_count;
197 u32 phy_err_count;
198 u32 chan_tx_power;
199 u32 ack_rx_bad;
200 u32 rts_bad;
201 u32 rts_good;
202 u32 fcs_bad;
203 u32 no_beacons;
204 u32 mib_int_count;
205
206 /* PDEV TX stats */
207 s32 comp_queued;
208 s32 comp_delivered;
209 s32 msdu_enqued;
210 s32 mpdu_enqued;
211 s32 wmm_drop;
212 s32 local_enqued;
213 s32 local_freed;
214 s32 hw_queued;
215 s32 hw_reaped;
216 s32 underrun;
217 u32 hw_paused;
218 s32 tx_abort;
219 s32 mpdus_requed;
220 u32 tx_ko;
221 u32 data_rc;
222 u32 self_triggers;
223 u32 sw_retry_failure;
224 u32 illgl_rate_phy_err;
225 u32 pdev_cont_xretry;
226 u32 pdev_tx_timeout;
227 u32 pdev_resets;
228 u32 phy_underrun;
229 u32 txop_ovf;
230 u32 seq_posted;
231 u32 seq_failed_queueing;
232 u32 seq_completed;
233 u32 seq_restarted;
234 u32 mu_seq_posted;
235 u32 mpdus_sw_flush;
236 u32 mpdus_hw_filter;
237 u32 mpdus_truncated;
238 u32 mpdus_ack_failed;
239 u32 mpdus_expired;
240
241 /* PDEV RX stats */
242 s32 mid_ppdu_route_change;
243 s32 status_rcvd;
244 s32 r0_frags;
245 s32 r1_frags;
246 s32 r2_frags;
247 s32 r3_frags;
248 s32 htt_msdus;
249 s32 htt_mpdus;
250 s32 loc_msdus;
251 s32 loc_mpdus;
252 s32 oversize_amsdu;
253 s32 phy_errs;
254 s32 phy_err_drop;
255 s32 mpdu_errs;
256 s32 rx_ovfl_errs;
257 };
258
259 struct ath10k_fw_stats {
260 struct list_head pdevs;
261 struct list_head vdevs;
262 struct list_head peers;
263 };
264
265 #define ATH10K_TPC_TABLE_TYPE_FLAG 1
266 #define ATH10K_TPC_PREAM_TABLE_END 0xFFFF
267
268 struct ath10k_tpc_table {
269 u32 pream_idx[WMI_TPC_RATE_MAX];
270 u8 rate_code[WMI_TPC_RATE_MAX];
271 char tpc_value[WMI_TPC_RATE_MAX][WMI_TPC_TX_N_CHAIN * WMI_TPC_BUF_SIZE];
272 };
273
274 struct ath10k_tpc_stats {
275 u32 reg_domain;
276 u32 chan_freq;
277 u32 phy_mode;
278 u32 twice_antenna_reduction;
279 u32 twice_max_rd_power;
280 s32 twice_antenna_gain;
281 u32 power_limit;
282 u32 num_tx_chain;
283 u32 ctl;
284 u32 rate_max;
285 u8 flag[WMI_TPC_FLAG];
286 struct ath10k_tpc_table tpc_table[WMI_TPC_FLAG];
287 };
288
289 struct ath10k_dfs_stats {
290 u32 phy_errors;
291 u32 pulses_total;
292 u32 pulses_detected;
293 u32 pulses_discarded;
294 u32 radar_detected;
295 };
296
297 #define ATH10K_MAX_NUM_PEER_IDS (1 << 11) /* htt rx_desc limit */
298
299 struct ath10k_peer {
300 struct list_head list;
301 struct ieee80211_vif *vif;
302 struct ieee80211_sta *sta;
303
304 int vdev_id;
305 u8 addr[ETH_ALEN];
306 DECLARE_BITMAP(peer_ids, ATH10K_MAX_NUM_PEER_IDS);
307
308 /* protected by ar->data_lock */
309 struct ieee80211_key_conf *keys[WMI_MAX_KEY_INDEX + 1];
310 };
311
312 struct ath10k_txq {
313 struct list_head list;
314 unsigned long num_fw_queued;
315 unsigned long num_push_allowed;
316 };
317
318 struct ath10k_sta {
319 struct ath10k_vif *arvif;
320
321 /* the following are protected by ar->data_lock */
322 u32 changed; /* IEEE80211_RC_* */
323 u32 bw;
324 u32 nss;
325 u32 smps;
326 u16 peer_id;
327
328 struct work_struct update_wk;
329
330 #ifdef CONFIG_MAC80211_DEBUGFS
331 /* protected by conf_mutex */
332 bool aggr_mode;
333 u64 rx_duration;
334 #endif
335 };
336
337 #define ATH10K_VDEV_SETUP_TIMEOUT_HZ (5*HZ)
338
339 enum ath10k_beacon_state {
340 ATH10K_BEACON_SCHEDULED = 0,
341 ATH10K_BEACON_SENDING,
342 ATH10K_BEACON_SENT,
343 };
344
345 struct ath10k_vif {
346 struct list_head list;
347
348 u32 vdev_id;
349 u16 peer_id;
350 enum wmi_vdev_type vdev_type;
351 enum wmi_vdev_subtype vdev_subtype;
352 u32 beacon_interval;
353 u32 dtim_period;
354 struct sk_buff *beacon;
355 /* protected by data_lock */
356 enum ath10k_beacon_state beacon_state;
357 void *beacon_buf;
358 dma_addr_t beacon_paddr;
359 unsigned long tx_paused; /* arbitrary values defined by target */
360
361 struct ath10k *ar;
362 struct ieee80211_vif *vif;
363
364 bool is_started;
365 bool is_up;
366 bool spectral_enabled;
367 bool ps;
368 u32 aid;
369 u8 bssid[ETH_ALEN];
370
371 struct ieee80211_key_conf *wep_keys[WMI_MAX_KEY_INDEX + 1];
372 s8 def_wep_key_idx;
373
374 u16 tx_seq_no;
375
376 union {
377 struct {
378 u32 uapsd;
379 } sta;
380 struct {
381 /* 512 stations */
382 u8 tim_bitmap[64];
383 u8 tim_len;
384 u32 ssid_len;
385 u8 ssid[IEEE80211_MAX_SSID_LEN];
386 bool hidden_ssid;
387 /* P2P_IE with NoA attribute for P2P_GO case */
388 u32 noa_len;
389 u8 *noa_data;
390 } ap;
391 } u;
392
393 bool use_cts_prot;
394 bool nohwcrypt;
395 int num_legacy_stations;
396 int txpower;
397 struct wmi_wmm_params_all_arg wmm_params;
398 struct work_struct ap_csa_work;
399 struct delayed_work connection_loss_work;
400 struct cfg80211_bitrate_mask bitrate_mask;
401 };
402
403 struct ath10k_vif_iter {
404 u32 vdev_id;
405 struct ath10k_vif *arvif;
406 };
407
408 /* used for crash-dump storage, protected by data-lock */
409 struct ath10k_fw_crash_data {
410 bool crashed_since_read;
411
412 uuid_le uuid;
413 struct timespec timestamp;
414 __le32 registers[REG_DUMP_COUNT_QCA988X];
415 };
416
417 struct ath10k_debug {
418 struct dentry *debugfs_phy;
419
420 struct ath10k_fw_stats fw_stats;
421 struct completion fw_stats_complete;
422 bool fw_stats_done;
423
424 unsigned long htt_stats_mask;
425 struct delayed_work htt_stats_dwork;
426 struct ath10k_dfs_stats dfs_stats;
427 struct ath_dfs_pool_stats dfs_pool_stats;
428
429 /* used for tpc-dump storage, protected by data-lock */
430 struct ath10k_tpc_stats *tpc_stats;
431
432 struct completion tpc_complete;
433
434 /* protected by conf_mutex */
435 u32 fw_dbglog_mask;
436 u32 fw_dbglog_level;
437 u32 pktlog_filter;
438 u32 reg_addr;
439 u32 nf_cal_period;
440
441 struct ath10k_fw_crash_data *fw_crash_data;
442 };
443
444 enum ath10k_state {
445 ATH10K_STATE_OFF = 0,
446 ATH10K_STATE_ON,
447
448 /* When doing firmware recovery the device is first powered down.
449 * mac80211 is supposed to call in to start() hook later on. It is
450 * however possible that driver unloading and firmware crash overlap.
451 * mac80211 can wait on conf_mutex in stop() while the device is
452 * stopped in ath10k_core_restart() work holding conf_mutex. The state
453 * RESTARTED means that the device is up and mac80211 has started hw
454 * reconfiguration. Once mac80211 is done with the reconfiguration we
455 * set the state to STATE_ON in reconfig_complete(). */
456 ATH10K_STATE_RESTARTING,
457 ATH10K_STATE_RESTARTED,
458
459 /* The device has crashed while restarting hw. This state is like ON
460 * but commands are blocked in HTC and -ECOMM response is given. This
461 * prevents completion timeouts and makes the driver more responsive to
462 * userspace commands. This is also prevents recursive recovery. */
463 ATH10K_STATE_WEDGED,
464
465 /* factory tests */
466 ATH10K_STATE_UTF,
467 };
468
469 enum ath10k_firmware_mode {
470 /* the default mode, standard 802.11 functionality */
471 ATH10K_FIRMWARE_MODE_NORMAL,
472
473 /* factory tests etc */
474 ATH10K_FIRMWARE_MODE_UTF,
475 };
476
477 enum ath10k_fw_features {
478 /* wmi_mgmt_rx_hdr contains extra RSSI information */
479 ATH10K_FW_FEATURE_EXT_WMI_MGMT_RX = 0,
480
481 /* Firmware from 10X branch. Deprecated, don't use in new code. */
482 ATH10K_FW_FEATURE_WMI_10X = 1,
483
484 /* firmware support tx frame management over WMI, otherwise it's HTT */
485 ATH10K_FW_FEATURE_HAS_WMI_MGMT_TX = 2,
486
487 /* Firmware does not support P2P */
488 ATH10K_FW_FEATURE_NO_P2P = 3,
489
490 /* Firmware 10.2 feature bit. The ATH10K_FW_FEATURE_WMI_10X feature
491 * bit is required to be set as well. Deprecated, don't use in new
492 * code.
493 */
494 ATH10K_FW_FEATURE_WMI_10_2 = 4,
495
496 /* Some firmware revisions lack proper multi-interface client powersave
497 * implementation. Enabling PS could result in connection drops,
498 * traffic stalls, etc.
499 */
500 ATH10K_FW_FEATURE_MULTI_VIF_PS_SUPPORT = 5,
501
502 /* Some firmware revisions have an incomplete WoWLAN implementation
503 * despite WMI service bit being advertised. This feature flag is used
504 * to distinguish whether WoWLAN is really supported or not.
505 */
506 ATH10K_FW_FEATURE_WOWLAN_SUPPORT = 6,
507
508 /* Don't trust error code from otp.bin */
509 ATH10K_FW_FEATURE_IGNORE_OTP_RESULT = 7,
510
511 /* Some firmware revisions pad 4th hw address to 4 byte boundary making
512 * it 8 bytes long in Native Wifi Rx decap.
513 */
514 ATH10K_FW_FEATURE_NO_NWIFI_DECAP_4ADDR_PADDING = 8,
515
516 /* Firmware supports bypassing PLL setting on init. */
517 ATH10K_FW_FEATURE_SUPPORTS_SKIP_CLOCK_INIT = 9,
518
519 /* Raw mode support. If supported, FW supports receiving and trasmitting
520 * frames in raw mode.
521 */
522 ATH10K_FW_FEATURE_RAW_MODE_SUPPORT = 10,
523
524 /* Firmware Supports Adaptive CCA*/
525 ATH10K_FW_FEATURE_SUPPORTS_ADAPTIVE_CCA = 11,
526
527 /* Firmware supports management frame protection */
528 ATH10K_FW_FEATURE_MFP_SUPPORT = 12,
529
530 /* Firmware supports pull-push model where host shares it's software
531 * queue state with firmware and firmware generates fetch requests
532 * telling host which queues to dequeue tx from.
533 *
534 * Primary function of this is improved MU-MIMO performance with
535 * multiple clients.
536 */
537 ATH10K_FW_FEATURE_PEER_FLOW_CONTROL = 13,
538
539 /* keep last */
540 ATH10K_FW_FEATURE_COUNT,
541 };
542
543 enum ath10k_dev_flags {
544 /* Indicates that ath10k device is during CAC phase of DFS */
545 ATH10K_CAC_RUNNING,
546 ATH10K_FLAG_CORE_REGISTERED,
547
548 /* Device has crashed and needs to restart. This indicates any pending
549 * waiters should immediately cancel instead of waiting for a time out.
550 */
551 ATH10K_FLAG_CRASH_FLUSH,
552
553 /* Use Raw mode instead of native WiFi Tx/Rx encap mode.
554 * Raw mode supports both hardware and software crypto. Native WiFi only
555 * supports hardware crypto.
556 */
557 ATH10K_FLAG_RAW_MODE,
558
559 /* Disable HW crypto engine */
560 ATH10K_FLAG_HW_CRYPTO_DISABLED,
561
562 /* Bluetooth coexistance enabled */
563 ATH10K_FLAG_BTCOEX,
564
565 /* Per Station statistics service */
566 ATH10K_FLAG_PEER_STATS,
567 };
568
569 enum ath10k_cal_mode {
570 ATH10K_CAL_MODE_FILE,
571 ATH10K_CAL_MODE_OTP,
572 ATH10K_CAL_MODE_DT,
573 ATH10K_PRE_CAL_MODE_FILE,
574 ATH10K_PRE_CAL_MODE_DT,
575 };
576
577 enum ath10k_crypt_mode {
578 /* Only use hardware crypto engine */
579 ATH10K_CRYPT_MODE_HW,
580 /* Only use software crypto engine */
581 ATH10K_CRYPT_MODE_SW,
582 };
583
584 static inline const char *ath10k_cal_mode_str(enum ath10k_cal_mode mode)
585 {
586 switch (mode) {
587 case ATH10K_CAL_MODE_FILE:
588 return "file";
589 case ATH10K_CAL_MODE_OTP:
590 return "otp";
591 case ATH10K_CAL_MODE_DT:
592 return "dt";
593 case ATH10K_PRE_CAL_MODE_FILE:
594 return "pre-cal-file";
595 case ATH10K_PRE_CAL_MODE_DT:
596 return "pre-cal-dt";
597 }
598
599 return "unknown";
600 }
601
602 enum ath10k_scan_state {
603 ATH10K_SCAN_IDLE,
604 ATH10K_SCAN_STARTING,
605 ATH10K_SCAN_RUNNING,
606 ATH10K_SCAN_ABORTING,
607 };
608
609 static inline const char *ath10k_scan_state_str(enum ath10k_scan_state state)
610 {
611 switch (state) {
612 case ATH10K_SCAN_IDLE:
613 return "idle";
614 case ATH10K_SCAN_STARTING:
615 return "starting";
616 case ATH10K_SCAN_RUNNING:
617 return "running";
618 case ATH10K_SCAN_ABORTING:
619 return "aborting";
620 }
621
622 return "unknown";
623 }
624
625 enum ath10k_tx_pause_reason {
626 ATH10K_TX_PAUSE_Q_FULL,
627 ATH10K_TX_PAUSE_MAX,
628 };
629
630 struct ath10k {
631 struct ath_common ath_common;
632 struct ieee80211_hw *hw;
633 struct device *dev;
634 u8 mac_addr[ETH_ALEN];
635
636 enum ath10k_hw_rev hw_rev;
637 u16 dev_id;
638 u32 chip_id;
639 u32 target_version;
640 u8 fw_version_major;
641 u32 fw_version_minor;
642 u16 fw_version_release;
643 u16 fw_version_build;
644 u32 fw_stats_req_mask;
645 u32 phy_capability;
646 u32 hw_min_tx_power;
647 u32 hw_max_tx_power;
648 u32 ht_cap_info;
649 u32 vht_cap_info;
650 u32 num_rf_chains;
651 u32 max_spatial_stream;
652 /* protected by conf_mutex */
653 bool ani_enabled;
654
655 DECLARE_BITMAP(fw_features, ATH10K_FW_FEATURE_COUNT);
656
657 bool p2p;
658
659 struct {
660 enum ath10k_bus bus;
661 const struct ath10k_hif_ops *ops;
662 } hif;
663
664 struct completion target_suspend;
665
666 const struct ath10k_hw_regs *regs;
667 const struct ath10k_hw_values *hw_values;
668 struct ath10k_bmi bmi;
669 struct ath10k_wmi wmi;
670 struct ath10k_htc htc;
671 struct ath10k_htt htt;
672
673 struct ath10k_hw_params {
674 u32 id;
675 u16 dev_id;
676 const char *name;
677 u32 patch_load_addr;
678 int uart_pin;
679 u32 otp_exe_param;
680
681 /* This is true if given HW chip has a quirky Cycle Counter
682 * wraparound which resets to 0x7fffffff instead of 0. All
683 * other CC related counters (e.g. Rx Clear Count) are divided
684 * by 2 so they never wraparound themselves.
685 */
686 bool has_shifted_cc_wraparound;
687
688 /* Some of chip expects fragment descriptor to be continuous
689 * memory for any TX operation. Set continuous_frag_desc flag
690 * for the hardware which have such requirement.
691 */
692 bool continuous_frag_desc;
693
694 u32 channel_counters_freq_hz;
695
696 /* Mgmt tx descriptors threshold for limiting probe response
697 * frames.
698 */
699 u32 max_probe_resp_desc_thres;
700
701 /* The padding bytes's location is different on various chips */
702 enum ath10k_hw_4addr_pad hw_4addr_pad;
703
704 u32 tx_chain_mask;
705 u32 rx_chain_mask;
706 u32 max_spatial_stream;
707 u32 cal_data_len;
708
709 struct ath10k_hw_params_fw {
710 const char *dir;
711 const char *fw;
712 const char *otp;
713 const char *board;
714 size_t board_size;
715 size_t board_ext_size;
716 } fw;
717 } hw_params;
718
719 const struct firmware *board;
720 const void *board_data;
721 size_t board_len;
722
723 const struct firmware *otp;
724 const void *otp_data;
725 size_t otp_len;
726
727 const struct firmware *firmware;
728 const void *firmware_data;
729 size_t firmware_len;
730
731 const struct firmware *pre_cal_file;
732 const struct firmware *cal_file;
733
734 struct {
735 const void *firmware_codeswap_data;
736 size_t firmware_codeswap_len;
737 struct ath10k_swap_code_seg_info *firmware_swap_code_seg_info;
738 } swap;
739
740 struct {
741 u32 vendor;
742 u32 device;
743 u32 subsystem_vendor;
744 u32 subsystem_device;
745
746 bool bmi_ids_valid;
747 u8 bmi_board_id;
748 u8 bmi_chip_id;
749 } id;
750
751 int fw_api;
752 int bd_api;
753 enum ath10k_cal_mode cal_mode;
754
755 struct {
756 struct completion started;
757 struct completion completed;
758 struct completion on_channel;
759 struct delayed_work timeout;
760 enum ath10k_scan_state state;
761 bool is_roc;
762 int vdev_id;
763 int roc_freq;
764 bool roc_notify;
765 } scan;
766
767 struct {
768 struct ieee80211_supported_band sbands[NUM_NL80211_BANDS];
769 } mac;
770
771 /* should never be NULL; needed for regular htt rx */
772 struct ieee80211_channel *rx_channel;
773
774 /* valid during scan; needed for mgmt rx during scan */
775 struct ieee80211_channel *scan_channel;
776
777 /* current operating channel definition */
778 struct cfg80211_chan_def chandef;
779
780 /* currently configured operating channel in firmware */
781 struct ieee80211_channel *tgt_oper_chan;
782
783 unsigned long long free_vdev_map;
784 struct ath10k_vif *monitor_arvif;
785 bool monitor;
786 int monitor_vdev_id;
787 bool monitor_started;
788 unsigned int filter_flags;
789 unsigned long dev_flags;
790 bool dfs_block_radar_events;
791
792 /* protected by conf_mutex */
793 bool radar_enabled;
794 int num_started_vdevs;
795
796 /* Protected by conf-mutex */
797 u8 cfg_tx_chainmask;
798 u8 cfg_rx_chainmask;
799
800 struct completion install_key_done;
801
802 struct completion vdev_setup_done;
803
804 struct workqueue_struct *workqueue;
805 /* Auxiliary workqueue */
806 struct workqueue_struct *workqueue_aux;
807
808 /* prevents concurrent FW reconfiguration */
809 struct mutex conf_mutex;
810
811 /* protects shared structure data */
812 spinlock_t data_lock;
813 /* protects: ar->txqs, artxq->list */
814 spinlock_t txqs_lock;
815
816 struct list_head txqs;
817 struct list_head arvifs;
818 struct list_head peers;
819 struct ath10k_peer *peer_map[ATH10K_MAX_NUM_PEER_IDS];
820 wait_queue_head_t peer_mapping_wq;
821
822 /* protected by conf_mutex */
823 int num_peers;
824 int num_stations;
825
826 int max_num_peers;
827 int max_num_stations;
828 int max_num_vdevs;
829 int max_num_tdls_vdevs;
830 int num_active_peers;
831 int num_tids;
832
833 struct work_struct svc_rdy_work;
834 struct sk_buff *svc_rdy_skb;
835
836 struct work_struct offchan_tx_work;
837 struct sk_buff_head offchan_tx_queue;
838 struct completion offchan_tx_completed;
839 struct sk_buff *offchan_tx_skb;
840
841 struct work_struct wmi_mgmt_tx_work;
842 struct sk_buff_head wmi_mgmt_tx_queue;
843
844 enum ath10k_state state;
845
846 struct work_struct register_work;
847 struct work_struct restart_work;
848
849 /* cycle count is reported twice for each visited channel during scan.
850 * access protected by data_lock */
851 u32 survey_last_rx_clear_count;
852 u32 survey_last_cycle_count;
853 struct survey_info survey[ATH10K_NUM_CHANS];
854
855 /* Channel info events are expected to come in pairs without and with
856 * COMPLETE flag set respectively for each channel visit during scan.
857 *
858 * However there are deviations from this rule. This flag is used to
859 * avoid reporting garbage data.
860 */
861 bool ch_info_can_report_survey;
862
863 struct dfs_pattern_detector *dfs_detector;
864
865 unsigned long tx_paused; /* see ATH10K_TX_PAUSE_ */
866
867 #ifdef CONFIG_ATH10K_DEBUGFS
868 struct ath10k_debug debug;
869 #endif
870
871 struct {
872 /* relay(fs) channel for spectral scan */
873 struct rchan *rfs_chan_spec_scan;
874
875 /* spectral_mode and spec_config are protected by conf_mutex */
876 enum ath10k_spectral_mode mode;
877 struct ath10k_spec_scan config;
878 } spectral;
879
880 struct {
881 /* protected by conf_mutex */
882 const struct firmware *utf;
883 char utf_version[32];
884 const void *utf_firmware_data;
885 size_t utf_firmware_len;
886 DECLARE_BITMAP(orig_fw_features, ATH10K_FW_FEATURE_COUNT);
887 enum ath10k_fw_wmi_op_version orig_wmi_op_version;
888 enum ath10k_fw_wmi_op_version op_version;
889 /* protected by data_lock */
890 bool utf_monitor;
891 } testmode;
892
893 struct {
894 /* protected by data_lock */
895 u32 fw_crash_counter;
896 u32 fw_warm_reset_counter;
897 u32 fw_cold_reset_counter;
898 } stats;
899
900 struct ath10k_thermal thermal;
901 struct ath10k_wow wow;
902
903 /* must be last */
904 u8 drv_priv[0] __aligned(sizeof(void *));
905 };
906
907 static inline bool ath10k_peer_stats_enabled(struct ath10k *ar)
908 {
909 if (test_bit(ATH10K_FLAG_PEER_STATS, &ar->dev_flags) &&
910 test_bit(WMI_SERVICE_PEER_STATS, ar->wmi.svc_map))
911 return true;
912
913 return false;
914 }
915
916 struct ath10k *ath10k_core_create(size_t priv_size, struct device *dev,
917 enum ath10k_bus bus,
918 enum ath10k_hw_rev hw_rev,
919 const struct ath10k_hif_ops *hif_ops);
920 void ath10k_core_destroy(struct ath10k *ar);
921 void ath10k_core_get_fw_features_str(struct ath10k *ar,
922 char *buf,
923 size_t max_len);
924
925 int ath10k_core_start(struct ath10k *ar, enum ath10k_firmware_mode mode);
926 int ath10k_wait_for_suspend(struct ath10k *ar, u32 suspend_opt);
927 void ath10k_core_stop(struct ath10k *ar);
928 int ath10k_core_register(struct ath10k *ar, u32 chip_id);
929 void ath10k_core_unregister(struct ath10k *ar);
930
931 #endif /* _CORE_H_ */