drivers/net/wireless/ath/ath10k/core.h

   1 /*
   2  * Copyright (c) 2005-2011 Atheros Communications Inc.
   3  * Copyright (c) 2011-2013 Qualcomm Atheros, Inc.
   4  *
   5  * Permission to use, copy, modify, and/or distribute this software for any
   6  * purpose with or without fee is hereby granted, provided that the above
   7  * copyright notice and this permission notice appear in all copies.
   8  *
   9  * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
  10  * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
  11  * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
  12  * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
  13  * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
  14  * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
  15  * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
  16  */
  17
  18 #ifndef _CORE_H_
  19 #define _CORE_H_
  20
  21 #include <linux/completion.h>
  22 #include <linux/if_ether.h>
  23 #include <linux/types.h>
  24 #include <linux/pci.h>
  25 #include <linux/uuid.h>
  26 #include <linux/time.h>
  27
  28 #include "htt.h"
  29 #include "htc.h"
  30 #include "hw.h"
  31 #include "targaddrs.h"
  32 #include "wmi.h"
  33 #include "../ath.h"
  34 #include "../regd.h"
  35 #include "../dfs_pattern_detector.h"
  36 #include "spectral.h"
  37 #include "thermal.h"
  38 #include "wow.h"
  39 #include "swap.h"
  40
  41 #define MS(_v, _f) (((_v) & _f##_MASK) >> _f##_LSB)
  42 #define SM(_v, _f) (((_v) << _f##_LSB) & _f##_MASK)
  43 #define WO(_f)      ((_f##_OFFSET) >> 2)
  44
  45 #define ATH10K_SCAN_ID 0
  46 #define WMI_READY_TIMEOUT (5 * HZ)
  47 #define ATH10K_FLUSH_TIMEOUT_HZ (5 * HZ)
  48 #define ATH10K_CONNECTION_LOSS_HZ (3 * HZ)
  49 #define ATH10K_NUM_CHANS 39
  50
  51 /* Antenna noise floor */
  52 #define ATH10K_DEFAULT_NOISE_FLOOR -95
  53
  54 #define ATH10K_MAX_NUM_MGMT_PENDING 128
  55
  56 /* number of failed packets (20 packets with 16 sw reties each) */
  57 #define ATH10K_KICKOUT_THRESHOLD (20 * 16)
  58
  59 /*
  60  * Use insanely high numbers to make sure that the firmware implementation
  61  * won't start, we have the same functionality already in hostapd. Unit
  62  * is seconds.
  63  */
  64 #define ATH10K_KEEPALIVE_MIN_IDLE 3747
  65 #define ATH10K_KEEPALIVE_MAX_IDLE 3895
  66 #define ATH10K_KEEPALIVE_MAX_UNRESPONSIVE 3900
  67
  68 struct ath10k;
  69
  70 enum ath10k_bus {
  71         ATH10K_BUS_PCI,
  72         ATH10K_BUS_AHB,
  73 };
  74
  75 static inline const char *ath10k_bus_str(enum ath10k_bus bus)
  76 {
  77         switch (bus) {
  78         case ATH10K_BUS_PCI:
  79                 return "pci";
  80         case ATH10K_BUS_AHB:
  81                 return "ahb";
  82         }
  83
  84         return "unknown";
  85 }
  86
  87 enum ath10k_skb_flags {
  88         ATH10K_SKB_F_NO_HWCRYPT = BIT(0),
  89         ATH10K_SKB_F_DTIM_ZERO = BIT(1),
  90         ATH10K_SKB_F_DELIVER_CAB = BIT(2),
  91         ATH10K_SKB_F_MGMT = BIT(3),
  92         ATH10K_SKB_F_QOS = BIT(4),
  93 };
  94
  95 struct ath10k_skb_cb {
  96         dma_addr_t paddr;
  97         u8 flags;
  98         u8 eid;
  99         u16 msdu_id;
 100         struct ieee80211_vif *vif;
 101         struct ieee80211_txq *txq;
 102 } __packed;
 103
 104 struct ath10k_skb_rxcb {
 105         dma_addr_t paddr;
 106         struct hlist_node hlist;
 107 };
 108
 109 static inline struct ath10k_skb_cb *ATH10K_SKB_CB(struct sk_buff *skb)
 110 {
 111         BUILD_BUG_ON(sizeof(struct ath10k_skb_cb) >
 112                      IEEE80211_TX_INFO_DRIVER_DATA_SIZE);
 113         return (struct ath10k_skb_cb *)&IEEE80211_SKB_CB(skb)->driver_data;
 114 }
 115
 116 static inline struct ath10k_skb_rxcb *ATH10K_SKB_RXCB(struct sk_buff *skb)
 117 {
 118         BUILD_BUG_ON(sizeof(struct ath10k_skb_rxcb) > sizeof(skb->cb));
 119         return (struct ath10k_skb_rxcb *)skb->cb;
 120 }
 121
 122 #define ATH10K_RXCB_SKB(rxcb) \
 123                 container_of((void *)rxcb, struct sk_buff, cb)
 124
 125 static inline u32 host_interest_item_address(u32 item_offset)
 126 {
 127         return QCA988X_HOST_INTEREST_ADDRESS + item_offset;
 128 }
 129
 130 struct ath10k_bmi {
 131         bool done_sent;
 132 };
 133
 134 struct ath10k_mem_chunk {
 135         void *vaddr;
 136         dma_addr_t paddr;
 137         u32 len;
 138         u32 req_id;
 139 };
 140
 141 struct ath10k_wmi {
 142         enum ath10k_htc_ep_id eid;
 143         struct completion service_ready;
 144         struct completion unified_ready;
 145         wait_queue_head_t tx_credits_wq;
 146         DECLARE_BITMAP(svc_map, WMI_SERVICE_MAX);
 147         struct wmi_cmd_map *cmd;
 148         struct wmi_vdev_param_map *vdev_param;
 149         struct wmi_pdev_param_map *pdev_param;
 150         const struct wmi_ops *ops;
 151         const struct wmi_peer_flags_map *peer_flags;
 152
 153         u32 num_mem_chunks;
 154         u32 rx_decap_mode;
 155         struct ath10k_mem_chunk mem_chunks[WMI_MAX_MEM_REQS];
 156 };
 157
 158 struct ath10k_fw_stats_peer {
 159         struct list_head list;
 160
 161         u8 peer_macaddr[ETH_ALEN];
 162         u32 peer_rssi;
 163         u32 peer_tx_rate;
 164         u32 peer_rx_rate; /* 10x only */
 165         u32 rx_duration;
 166 };
 167
 168 struct ath10k_fw_stats_vdev {
 169         struct list_head list;
 170
 171         u32 vdev_id;
 172         u32 beacon_snr;
 173         u32 data_snr;
 174         u32 num_tx_frames[4];
 175         u32 num_rx_frames;
 176         u32 num_tx_frames_retries[4];
 177         u32 num_tx_frames_failures[4];
 178         u32 num_rts_fail;
 179         u32 num_rts_success;
 180         u32 num_rx_err;
 181         u32 num_rx_discard;
 182         u32 num_tx_not_acked;
 183         u32 tx_rate_history[10];
 184         u32 beacon_rssi_history[10];
 185 };
 186
 187 struct ath10k_fw_stats_pdev {
 188         struct list_head list;
 189
 190         /* PDEV stats */
 191         s32 ch_noise_floor;
 192         u32 tx_frame_count;
 193         u32 rx_frame_count;
 194         u32 rx_clear_count;
 195         u32 cycle_count;
 196         u32 phy_err_count;
 197         u32 chan_tx_power;
 198         u32 ack_rx_bad;
 199         u32 rts_bad;
 200         u32 rts_good;
 201         u32 fcs_bad;
 202         u32 no_beacons;
 203         u32 mib_int_count;
 204
 205         /* PDEV TX stats */
 206         s32 comp_queued;
 207         s32 comp_delivered;
 208         s32 msdu_enqued;
 209         s32 mpdu_enqued;
 210         s32 wmm_drop;
 211         s32 local_enqued;
 212         s32 local_freed;
 213         s32 hw_queued;
 214         s32 hw_reaped;
 215         s32 underrun;
 216         u32 hw_paused;
 217         s32 tx_abort;
 218         s32 mpdus_requed;
 219         u32 tx_ko;
 220         u32 data_rc;
 221         u32 self_triggers;
 222         u32 sw_retry_failure;
 223         u32 illgl_rate_phy_err;
 224         u32 pdev_cont_xretry;
 225         u32 pdev_tx_timeout;
 226         u32 pdev_resets;
 227         u32 phy_underrun;
 228         u32 txop_ovf;
 229         u32 seq_posted;
 230         u32 seq_failed_queueing;
 231         u32 seq_completed;
 232         u32 seq_restarted;
 233         u32 mu_seq_posted;
 234         u32 mpdus_sw_flush;
 235         u32 mpdus_hw_filter;
 236         u32 mpdus_truncated;
 237         u32 mpdus_ack_failed;
 238         u32 mpdus_expired;
 239
 240         /* PDEV RX stats */
 241         s32 mid_ppdu_route_change;
 242         s32 status_rcvd;
 243         s32 r0_frags;
 244         s32 r1_frags;
 245         s32 r2_frags;
 246         s32 r3_frags;
 247         s32 htt_msdus;
 248         s32 htt_mpdus;
 249         s32 loc_msdus;
 250         s32 loc_mpdus;
 251         s32 oversize_amsdu;
 252         s32 phy_errs;
 253         s32 phy_err_drop;
 254         s32 mpdu_errs;
 255         s32 rx_ovfl_errs;
 256 };
 257
 258 struct ath10k_fw_stats {
 259         struct list_head pdevs;
 260         struct list_head vdevs;
 261         struct list_head peers;
 262 };
 263
 264 #define ATH10K_TPC_TABLE_TYPE_FLAG      1
 265 #define ATH10K_TPC_PREAM_TABLE_END      0xFFFF
 266
 267 struct ath10k_tpc_table {
 268         u32 pream_idx[WMI_TPC_RATE_MAX];
 269         u8 rate_code[WMI_TPC_RATE_MAX];
 270         char tpc_value[WMI_TPC_RATE_MAX][WMI_TPC_TX_N_CHAIN * WMI_TPC_BUF_SIZE];
 271 };
 272
 273 struct ath10k_tpc_stats {
 274         u32 reg_domain;
 275         u32 chan_freq;
 276         u32 phy_mode;
 277         u32 twice_antenna_reduction;
 278         u32 twice_max_rd_power;
 279         s32 twice_antenna_gain;
 280         u32 power_limit;
 281         u32 num_tx_chain;
 282         u32 ctl;
 283         u32 rate_max;
 284         u8 flag[WMI_TPC_FLAG];
 285         struct ath10k_tpc_table tpc_table[WMI_TPC_FLAG];
 286 };
 287
 288 struct ath10k_dfs_stats {
 289         u32 phy_errors;
 290         u32 pulses_total;
 291         u32 pulses_detected;
 292         u32 pulses_discarded;
 293         u32 radar_detected;
 294 };
 295
 296 #define ATH10K_MAX_NUM_PEER_IDS (1 << 11) /* htt rx_desc limit */
 297
 298 struct ath10k_peer {
 299         struct list_head list;
 300         struct ieee80211_vif *vif;
 301         struct ieee80211_sta *sta;
 302
 303         int vdev_id;
 304         u8 addr[ETH_ALEN];
 305         DECLARE_BITMAP(peer_ids, ATH10K_MAX_NUM_PEER_IDS);
 306
 307         /* protected by ar->data_lock */
 308         struct ieee80211_key_conf *keys[WMI_MAX_KEY_INDEX + 1];
 309 };
 310
 311 struct ath10k_txq {
 312         struct list_head list;
 313         unsigned long num_fw_queued;
 314         unsigned long num_push_allowed;
 315 };
 316
 317 struct ath10k_sta {
 318         struct ath10k_vif *arvif;
 319
 320         /* the following are protected by ar->data_lock */
 321         u32 changed; /* IEEE80211_RC_* */
 322         u32 bw;
 323         u32 nss;
 324         u32 smps;
 325         u16 peer_id;
 326
 327         struct work_struct update_wk;
 328
 329 #ifdef CONFIG_MAC80211_DEBUGFS
 330         /* protected by conf_mutex */
 331         bool aggr_mode;
 332         u64 rx_duration;
 333 #endif
 334 };
 335
 336 #define ATH10K_VDEV_SETUP_TIMEOUT_HZ (5 * HZ)
 337
 338 enum ath10k_beacon_state {
 339         ATH10K_BEACON_SCHEDULED = 0,
 340         ATH10K_BEACON_SENDING,
 341         ATH10K_BEACON_SENT,
 342 };
 343
 344 struct ath10k_vif {
 345         struct list_head list;
 346
 347         u32 vdev_id;
 348         u16 peer_id;
 349         enum wmi_vdev_type vdev_type;
 350         enum wmi_vdev_subtype vdev_subtype;
 351         u32 beacon_interval;
 352         u32 dtim_period;
 353         struct sk_buff *beacon;
 354         /* protected by data_lock */
 355         enum ath10k_beacon_state beacon_state;
 356         void *beacon_buf;
 357         dma_addr_t beacon_paddr;
 358         unsigned long tx_paused; /* arbitrary values defined by target */
 359
 360         struct ath10k *ar;
 361         struct ieee80211_vif *vif;
 362
 363         bool is_started;
 364         bool is_up;
 365         bool spectral_enabled;
 366         bool ps;
 367         u32 aid;
 368         u8 bssid[ETH_ALEN];
 369
 370         struct ieee80211_key_conf *wep_keys[WMI_MAX_KEY_INDEX + 1];
 371         s8 def_wep_key_idx;
 372
 373         u16 tx_seq_no;
 374
 375         union {
 376                 struct {
 377                         u32 uapsd;
 378                 } sta;
 379                 struct {
 380                         /* 512 stations */
 381                         u8 tim_bitmap[64];
 382                         u8 tim_len;
 383                         u32 ssid_len;
 384                         u8 ssid[IEEE80211_MAX_SSID_LEN];
 385                         bool hidden_ssid;
 386                         /* P2P_IE with NoA attribute for P2P_GO case */
 387                         u32 noa_len;
 388                         u8 *noa_data;
 389                 } ap;
 390         } u;
 391
 392         bool use_cts_prot;
 393         bool nohwcrypt;
 394         int num_legacy_stations;
 395         int txpower;
 396         struct wmi_wmm_params_all_arg wmm_params;
 397         struct work_struct ap_csa_work;
 398         struct delayed_work connection_loss_work;
 399         struct cfg80211_bitrate_mask bitrate_mask;
 400 };
 401
 402 struct ath10k_vif_iter {
 403         u32 vdev_id;
 404         struct ath10k_vif *arvif;
 405 };
 406
 407 /* used for crash-dump storage, protected by data-lock */
 408 struct ath10k_fw_crash_data {
 409         bool crashed_since_read;
 410
 411         uuid_le uuid;
 412         struct timespec timestamp;
 413         __le32 registers[REG_DUMP_COUNT_QCA988X];
 414 };
 415
 416 struct ath10k_debug {
 417         struct dentry *debugfs_phy;
 418
 419         struct ath10k_fw_stats fw_stats;
 420         struct completion fw_stats_complete;
 421         bool fw_stats_done;
 422
 423         unsigned long htt_stats_mask;
 424         struct delayed_work htt_stats_dwork;
 425         struct ath10k_dfs_stats dfs_stats;
 426         struct ath_dfs_pool_stats dfs_pool_stats;
 427
 428         /* used for tpc-dump storage, protected by data-lock */
 429         struct ath10k_tpc_stats *tpc_stats;
 430
 431         struct completion tpc_complete;
 432
 433         /* protected by conf_mutex */
 434         u32 fw_dbglog_mask;
 435         u32 fw_dbglog_level;
 436         u32 pktlog_filter;
 437         u32 reg_addr;
 438         u32 nf_cal_period;
 439
 440         struct ath10k_fw_crash_data *fw_crash_data;
 441 };
 442
 443 enum ath10k_state {
 444         ATH10K_STATE_OFF = 0,
 445         ATH10K_STATE_ON,
 446
 447         /* When doing firmware recovery the device is first powered down.
 448          * mac80211 is supposed to call in to start() hook later on. It is
 449          * however possible that driver unloading and firmware crash overlap.
 450          * mac80211 can wait on conf_mutex in stop() while the device is
 451          * stopped in ath10k_core_restart() work holding conf_mutex. The state
 452          * RESTARTED means that the device is up and mac80211 has started hw
 453          * reconfiguration. Once mac80211 is done with the reconfiguration we
 454          * set the state to STATE_ON in reconfig_complete(). */
 455         ATH10K_STATE_RESTARTING,
 456         ATH10K_STATE_RESTARTED,
 457
 458         /* The device has crashed while restarting hw. This state is like ON
 459          * but commands are blocked in HTC and -ECOMM response is given. This
 460          * prevents completion timeouts and makes the driver more responsive to
 461          * userspace commands. This is also prevents recursive recovery. */
 462         ATH10K_STATE_WEDGED,
 463
 464         /* factory tests */
 465         ATH10K_STATE_UTF,
 466 };
 467
 468 enum ath10k_firmware_mode {
 469         /* the default mode, standard 802.11 functionality */
 470         ATH10K_FIRMWARE_MODE_NORMAL,
 471
 472         /* factory tests etc */
 473         ATH10K_FIRMWARE_MODE_UTF,
 474 };
 475
 476 enum ath10k_fw_features {
 477         /* wmi_mgmt_rx_hdr contains extra RSSI information */
 478         ATH10K_FW_FEATURE_EXT_WMI_MGMT_RX = 0,
 479
 480         /* Firmware from 10X branch. Deprecated, don't use in new code. */
 481         ATH10K_FW_FEATURE_WMI_10X = 1,
 482
 483         /* firmware support tx frame management over WMI, otherwise it's HTT */
 484         ATH10K_FW_FEATURE_HAS_WMI_MGMT_TX = 2,
 485
 486         /* Firmware does not support P2P */
 487         ATH10K_FW_FEATURE_NO_P2P = 3,
 488
 489         /* Firmware 10.2 feature bit. The ATH10K_FW_FEATURE_WMI_10X feature
 490          * bit is required to be set as well. Deprecated, don't use in new
 491          * code.
 492          */
 493         ATH10K_FW_FEATURE_WMI_10_2 = 4,
 494
 495         /* Some firmware revisions lack proper multi-interface client powersave
 496          * implementation. Enabling PS could result in connection drops,
 497          * traffic stalls, etc.
 498          */
 499         ATH10K_FW_FEATURE_MULTI_VIF_PS_SUPPORT = 5,
 500
 501         /* Some firmware revisions have an incomplete WoWLAN implementation
 502          * despite WMI service bit being advertised. This feature flag is used
 503          * to distinguish whether WoWLAN is really supported or not.
 504          */
 505         ATH10K_FW_FEATURE_WOWLAN_SUPPORT = 6,
 506
 507         /* Don't trust error code from otp.bin */
 508         ATH10K_FW_FEATURE_IGNORE_OTP_RESULT = 7,
 509
 510         /* Some firmware revisions pad 4th hw address to 4 byte boundary making
 511          * it 8 bytes long in Native Wifi Rx decap.
 512          */
 513         ATH10K_FW_FEATURE_NO_NWIFI_DECAP_4ADDR_PADDING = 8,
 514
 515         /* Firmware supports bypassing PLL setting on init. */
 516         ATH10K_FW_FEATURE_SUPPORTS_SKIP_CLOCK_INIT = 9,
 517
 518         /* Raw mode support. If supported, FW supports receiving and trasmitting
 519          * frames in raw mode.
 520          */
 521         ATH10K_FW_FEATURE_RAW_MODE_SUPPORT = 10,
 522
 523         /* Firmware Supports Adaptive CCA*/
 524         ATH10K_FW_FEATURE_SUPPORTS_ADAPTIVE_CCA = 11,
 525
 526         /* Firmware supports management frame protection */
 527         ATH10K_FW_FEATURE_MFP_SUPPORT = 12,
 528
 529         /* Firmware supports pull-push model where host shares it's software
 530          * queue state with firmware and firmware generates fetch requests
 531          * telling host which queues to dequeue tx from.
 532          *
 533          * Primary function of this is improved MU-MIMO performance with
 534          * multiple clients.
 535          */
 536         ATH10K_FW_FEATURE_PEER_FLOW_CONTROL = 13,
 537
 538         /* keep last */
 539         ATH10K_FW_FEATURE_COUNT,
 540 };
 541
 542 enum ath10k_dev_flags {
 543         /* Indicates that ath10k device is during CAC phase of DFS */
 544         ATH10K_CAC_RUNNING,
 545         ATH10K_FLAG_CORE_REGISTERED,
 546
 547         /* Device has crashed and needs to restart. This indicates any pending
 548          * waiters should immediately cancel instead of waiting for a time out.
 549          */
 550         ATH10K_FLAG_CRASH_FLUSH,
 551
 552         /* Use Raw mode instead of native WiFi Tx/Rx encap mode.
 553          * Raw mode supports both hardware and software crypto. Native WiFi only
 554          * supports hardware crypto.
 555          */
 556         ATH10K_FLAG_RAW_MODE,
 557
 558         /* Disable HW crypto engine */
 559         ATH10K_FLAG_HW_CRYPTO_DISABLED,
 560
 561         /* Bluetooth coexistance enabled */
 562         ATH10K_FLAG_BTCOEX,
 563
 564         /* Per Station statistics service */
 565         ATH10K_FLAG_PEER_STATS,
 566 };
 567
 568 enum ath10k_cal_mode {
 569         ATH10K_CAL_MODE_FILE,
 570         ATH10K_CAL_MODE_OTP,
 571         ATH10K_CAL_MODE_DT,
 572         ATH10K_PRE_CAL_MODE_FILE,
 573         ATH10K_PRE_CAL_MODE_DT,
 574 };
 575
 576 enum ath10k_crypt_mode {
 577         /* Only use hardware crypto engine */
 578         ATH10K_CRYPT_MODE_HW,
 579         /* Only use software crypto engine */
 580         ATH10K_CRYPT_MODE_SW,
 581 };
 582
 583 static inline const char *ath10k_cal_mode_str(enum ath10k_cal_mode mode)
 584 {
 585         switch (mode) {
 586         case ATH10K_CAL_MODE_FILE:
 587                 return "file";
 588         case ATH10K_CAL_MODE_OTP:
 589                 return "otp";
 590         case ATH10K_CAL_MODE_DT:
 591                 return "dt";
 592         case ATH10K_PRE_CAL_MODE_FILE:
 593                 return "pre-cal-file";
 594         case ATH10K_PRE_CAL_MODE_DT:
 595                 return "pre-cal-dt";
 596         }
 597
 598         return "unknown";
 599 }
 600
 601 enum ath10k_scan_state {
 602         ATH10K_SCAN_IDLE,
 603         ATH10K_SCAN_STARTING,
 604         ATH10K_SCAN_RUNNING,
 605         ATH10K_SCAN_ABORTING,
 606 };
 607
 608 static inline const char *ath10k_scan_state_str(enum ath10k_scan_state state)
 609 {
 610         switch (state) {
 611         case ATH10K_SCAN_IDLE:
 612                 return "idle";
 613         case ATH10K_SCAN_STARTING:
 614                 return "starting";
 615         case ATH10K_SCAN_RUNNING:
 616                 return "running";
 617         case ATH10K_SCAN_ABORTING:
 618                 return "aborting";
 619         }
 620
 621         return "unknown";
 622 }
 623
 624 enum ath10k_tx_pause_reason {
 625         ATH10K_TX_PAUSE_Q_FULL,
 626         ATH10K_TX_PAUSE_MAX,
 627 };
 628
 629 struct ath10k_fw_file {
 630         const struct firmware *firmware;
 631
 632         char fw_version[ETHTOOL_FWVERS_LEN];
 633
 634         DECLARE_BITMAP(fw_features, ATH10K_FW_FEATURE_COUNT);
 635
 636         enum ath10k_fw_wmi_op_version wmi_op_version;
 637         enum ath10k_fw_htt_op_version htt_op_version;
 638
 639         const void *firmware_data;
 640         size_t firmware_len;
 641
 642         const void *otp_data;
 643         size_t otp_len;
 644
 645         const void *codeswap_data;
 646         size_t codeswap_len;
 647 };
 648
 649 struct ath10k_fw_components {
 650         const struct firmware *board;
 651         const void *board_data;
 652         size_t board_len;
 653
 654         struct ath10k_fw_file fw_file;
 655 };
 656
 657 struct ath10k {
 658         struct ath_common ath_common;
 659         struct ieee80211_hw *hw;
 660         struct device *dev;
 661         u8 mac_addr[ETH_ALEN];
 662
 663         enum ath10k_hw_rev hw_rev;
 664         u16 dev_id;
 665         u32 chip_id;
 666         u32 target_version;
 667         u8 fw_version_major;
 668         u32 fw_version_minor;
 669         u16 fw_version_release;
 670         u16 fw_version_build;
 671         u32 fw_stats_req_mask;
 672         u32 phy_capability;
 673         u32 hw_min_tx_power;
 674         u32 hw_max_tx_power;
 675         u32 ht_cap_info;
 676         u32 vht_cap_info;
 677         u32 num_rf_chains;
 678         u32 max_spatial_stream;
 679         /* protected by conf_mutex */
 680         bool ani_enabled;
 681
 682         bool p2p;
 683
 684         struct {
 685                 enum ath10k_bus bus;
 686                 const struct ath10k_hif_ops *ops;
 687         } hif;
 688
 689         struct completion target_suspend;
 690
 691         const struct ath10k_hw_regs *regs;
 692         const struct ath10k_hw_values *hw_values;
 693         struct ath10k_bmi bmi;
 694         struct ath10k_wmi wmi;
 695         struct ath10k_htc htc;
 696         struct ath10k_htt htt;
 697
 698         struct ath10k_hw_params {
 699                 u32 id;
 700                 u16 dev_id;
 701                 const char *name;
 702                 u32 patch_load_addr;
 703                 int uart_pin;
 704                 u32 otp_exe_param;
 705
 706                 /* This is true if given HW chip has a quirky Cycle Counter
 707                  * wraparound which resets to 0x7fffffff instead of 0. All
 708                  * other CC related counters (e.g. Rx Clear Count) are divided
 709                  * by 2 so they never wraparound themselves.
 710                  */
 711                 bool has_shifted_cc_wraparound;
 712
 713                 /* Some of chip expects fragment descriptor to be continuous
 714                  * memory for any TX operation. Set continuous_frag_desc flag
 715                  * for the hardware which have such requirement.
 716                  */
 717                 bool continuous_frag_desc;
 718
 719                 u32 channel_counters_freq_hz;
 720
 721                 /* Mgmt tx descriptors threshold for limiting probe response
 722                  * frames.
 723                  */
 724                 u32 max_probe_resp_desc_thres;
 725
 726                 /* The padding bytes's location is different on various chips */
 727                 enum ath10k_hw_4addr_pad hw_4addr_pad;
 728
 729                 u32 tx_chain_mask;
 730                 u32 rx_chain_mask;
 731                 u32 max_spatial_stream;
 732                 u32 cal_data_len;
 733
 734                 struct ath10k_hw_params_fw {
 735                         const char *dir;
 736                         const char *board;
 737                         size_t board_size;
 738                         size_t board_ext_size;
 739                 } fw;
 740         } hw_params;
 741
 742         /* contains the firmware images used with ATH10K_FIRMWARE_MODE_NORMAL */
 743         struct ath10k_fw_components normal_mode_fw;
 744
 745         /* READ-ONLY images of the running firmware, which can be either
 746          * normal or UTF. Do not modify, release etc!
 747          */
 748         const struct ath10k_fw_components *running_fw;
 749
 750         const struct firmware *pre_cal_file;
 751         const struct firmware *cal_file;
 752
 753         struct {
 754                 struct ath10k_swap_code_seg_info *firmware_swap_code_seg_info;
 755         } swap;
 756
 757         struct {
 758                 u32 vendor;
 759                 u32 device;
 760                 u32 subsystem_vendor;
 761                 u32 subsystem_device;
 762
 763                 bool bmi_ids_valid;
 764                 u8 bmi_board_id;
 765                 u8 bmi_chip_id;
 766         } id;
 767
 768         int fw_api;
 769         int bd_api;
 770         enum ath10k_cal_mode cal_mode;
 771
 772         struct {
 773                 struct completion started;
 774                 struct completion completed;
 775                 struct completion on_channel;
 776                 struct delayed_work timeout;
 777                 enum ath10k_scan_state state;
 778                 bool is_roc;
 779                 int vdev_id;
 780                 int roc_freq;
 781                 bool roc_notify;
 782         } scan;
 783
 784         struct {
 785                 struct ieee80211_supported_band sbands[NUM_NL80211_BANDS];
 786         } mac;
 787
 788         /* should never be NULL; needed for regular htt rx */
 789         struct ieee80211_channel *rx_channel;
 790
 791         /* valid during scan; needed for mgmt rx during scan */
 792         struct ieee80211_channel *scan_channel;
 793
 794         /* current operating channel definition */
 795         struct cfg80211_chan_def chandef;
 796
 797         /* currently configured operating channel in firmware */
 798         struct ieee80211_channel *tgt_oper_chan;
 799
 800         unsigned long long free_vdev_map;
 801         struct ath10k_vif *monitor_arvif;
 802         bool monitor;
 803         int monitor_vdev_id;
 804         bool monitor_started;
 805         unsigned int filter_flags;
 806         unsigned long dev_flags;
 807         bool dfs_block_radar_events;
 808
 809         /* protected by conf_mutex */
 810         bool radar_enabled;
 811         int num_started_vdevs;
 812
 813         /* Protected by conf-mutex */
 814         u8 cfg_tx_chainmask;
 815         u8 cfg_rx_chainmask;
 816
 817         struct completion install_key_done;
 818
 819         struct completion vdev_setup_done;
 820
 821         struct workqueue_struct *workqueue;
 822         /* Auxiliary workqueue */
 823         struct workqueue_struct *workqueue_aux;
 824
 825         /* prevents concurrent FW reconfiguration */
 826         struct mutex conf_mutex;
 827
 828         /* protects shared structure data */
 829         spinlock_t data_lock;
 830         /* protects: ar->txqs, artxq->list */
 831         spinlock_t txqs_lock;
 832
 833         struct list_head txqs;
 834         struct list_head arvifs;
 835         struct list_head peers;
 836         struct ath10k_peer *peer_map[ATH10K_MAX_NUM_PEER_IDS];
 837         wait_queue_head_t peer_mapping_wq;
 838
 839         /* protected by conf_mutex */
 840         int num_peers;
 841         int num_stations;
 842
 843         int max_num_peers;
 844         int max_num_stations;
 845         int max_num_vdevs;
 846         int max_num_tdls_vdevs;
 847         int num_active_peers;
 848         int num_tids;
 849
 850         struct work_struct svc_rdy_work;
 851         struct sk_buff *svc_rdy_skb;
 852
 853         struct work_struct offchan_tx_work;
 854         struct sk_buff_head offchan_tx_queue;
 855         struct completion offchan_tx_completed;
 856         struct sk_buff *offchan_tx_skb;
 857
 858         struct work_struct wmi_mgmt_tx_work;
 859         struct sk_buff_head wmi_mgmt_tx_queue;
 860
 861         enum ath10k_state state;
 862
 863         struct work_struct register_work;
 864         struct work_struct restart_work;
 865
 866         /* cycle count is reported twice for each visited channel during scan.
 867          * access protected by data_lock */
 868         u32 survey_last_rx_clear_count;
 869         u32 survey_last_cycle_count;
 870         struct survey_info survey[ATH10K_NUM_CHANS];
 871
 872         /* Channel info events are expected to come in pairs without and with
 873          * COMPLETE flag set respectively for each channel visit during scan.
 874          *
 875          * However there are deviations from this rule. This flag is used to
 876          * avoid reporting garbage data.
 877          */
 878         bool ch_info_can_report_survey;
 879
 880         struct dfs_pattern_detector *dfs_detector;
 881
 882         unsigned long tx_paused; /* see ATH10K_TX_PAUSE_ */
 883
 884 #ifdef CONFIG_ATH10K_DEBUGFS
 885         struct ath10k_debug debug;
 886 #endif
 887
 888         struct {
 889                 /* relay(fs) channel for spectral scan */
 890                 struct rchan *rfs_chan_spec_scan;
 891
 892                 /* spectral_mode and spec_config are protected by conf_mutex */
 893                 enum ath10k_spectral_mode mode;
 894                 struct ath10k_spec_scan config;
 895         } spectral;
 896
 897         struct {
 898                 /* protected by conf_mutex */
 899                 struct ath10k_fw_components utf_mode_fw;
 900
 901                 /* protected by data_lock */
 902                 bool utf_monitor;
 903         } testmode;
 904
 905         struct {
 906                 /* protected by data_lock */
 907                 u32 fw_crash_counter;
 908                 u32 fw_warm_reset_counter;
 909                 u32 fw_cold_reset_counter;
 910         } stats;
 911
 912         struct ath10k_thermal thermal;
 913         struct ath10k_wow wow;
 914
 915         /* must be last */
 916         u8 drv_priv[0] __aligned(sizeof(void *));
 917 };
 918
 919 static inline bool ath10k_peer_stats_enabled(struct ath10k *ar)
 920 {
 921         if (test_bit(ATH10K_FLAG_PEER_STATS, &ar->dev_flags) &&
 922             test_bit(WMI_SERVICE_PEER_STATS, ar->wmi.svc_map))
 923                 return true;
 924
 925         return false;
 926 }
 927
 928 struct ath10k *ath10k_core_create(size_t priv_size, struct device *dev,
 929                                   enum ath10k_bus bus,
 930                                   enum ath10k_hw_rev hw_rev,
 931                                   const struct ath10k_hif_ops *hif_ops);
 932 void ath10k_core_destroy(struct ath10k *ar);
 933 void ath10k_core_get_fw_features_str(struct ath10k *ar,
 934                                      char *buf,
 935                                      size_t max_len);
 936 int ath10k_core_fetch_firmware_api_n(struct ath10k *ar, const char *name,
 937                                      struct ath10k_fw_file *fw_file);
 938
 939 int ath10k_core_start(struct ath10k *ar, enum ath10k_firmware_mode mode,
 940                       const struct ath10k_fw_components *fw_components);
 941 int ath10k_wait_for_suspend(struct ath10k *ar, u32 suspend_opt);
 942 void ath10k_core_stop(struct ath10k *ar);
 943 int ath10k_core_register(struct ath10k *ar, u32 chip_id);
 944 void ath10k_core_unregister(struct ath10k *ar);
 945
 946 #endif /* _CORE_H_ */