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ath6kl: print firmware capabilities
[mirror_ubuntu-artful-kernel.git] / drivers / net / wireless / ath / ath6kl / init.c
1
2 /*
3 * Copyright (c) 2011 Atheros Communications Inc.
4 * Copyright (c) 2011-2012 Qualcomm Atheros, Inc.
5 *
6 * Permission to use, copy, modify, and/or distribute this software for any
7 * purpose with or without fee is hereby granted, provided that the above
8 * copyright notice and this permission notice appear in all copies.
9 *
10 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
11 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
12 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
13 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
14 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
15 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
16 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
17 */
18
19 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
20
21 #include <linux/moduleparam.h>
22 #include <linux/errno.h>
23 #include <linux/export.h>
24 #include <linux/of.h>
25 #include <linux/mmc/sdio_func.h>
26 #include <linux/vmalloc.h>
27
28 #include "core.h"
29 #include "cfg80211.h"
30 #include "target.h"
31 #include "debug.h"
32 #include "hif-ops.h"
33 #include "htc-ops.h"
34
35 static const struct ath6kl_hw hw_list[] = {
36 {
37 .id = AR6003_HW_2_0_VERSION,
38 .name = "ar6003 hw 2.0",
39 .dataset_patch_addr = 0x57e884,
40 .app_load_addr = 0x543180,
41 .board_ext_data_addr = 0x57e500,
42 .reserved_ram_size = 6912,
43 .refclk_hz = 26000000,
44 .uarttx_pin = 8,
45 .flags = ATH6KL_HW_SDIO_CRC_ERROR_WAR,
46
47 /* hw2.0 needs override address hardcoded */
48 .app_start_override_addr = 0x944C00,
49
50 .fw = {
51 .dir = AR6003_HW_2_0_FW_DIR,
52 .otp = AR6003_HW_2_0_OTP_FILE,
53 .fw = AR6003_HW_2_0_FIRMWARE_FILE,
54 .tcmd = AR6003_HW_2_0_TCMD_FIRMWARE_FILE,
55 .patch = AR6003_HW_2_0_PATCH_FILE,
56 },
57
58 .fw_board = AR6003_HW_2_0_BOARD_DATA_FILE,
59 .fw_default_board = AR6003_HW_2_0_DEFAULT_BOARD_DATA_FILE,
60 },
61 {
62 .id = AR6003_HW_2_1_1_VERSION,
63 .name = "ar6003 hw 2.1.1",
64 .dataset_patch_addr = 0x57ff74,
65 .app_load_addr = 0x1234,
66 .board_ext_data_addr = 0x542330,
67 .reserved_ram_size = 512,
68 .refclk_hz = 26000000,
69 .uarttx_pin = 8,
70 .testscript_addr = 0x57ef74,
71 .flags = ATH6KL_HW_SDIO_CRC_ERROR_WAR,
72
73 .fw = {
74 .dir = AR6003_HW_2_1_1_FW_DIR,
75 .otp = AR6003_HW_2_1_1_OTP_FILE,
76 .fw = AR6003_HW_2_1_1_FIRMWARE_FILE,
77 .tcmd = AR6003_HW_2_1_1_TCMD_FIRMWARE_FILE,
78 .patch = AR6003_HW_2_1_1_PATCH_FILE,
79 .utf = AR6003_HW_2_1_1_UTF_FIRMWARE_FILE,
80 .testscript = AR6003_HW_2_1_1_TESTSCRIPT_FILE,
81 },
82
83 .fw_board = AR6003_HW_2_1_1_BOARD_DATA_FILE,
84 .fw_default_board = AR6003_HW_2_1_1_DEFAULT_BOARD_DATA_FILE,
85 },
86 {
87 .id = AR6004_HW_1_0_VERSION,
88 .name = "ar6004 hw 1.0",
89 .dataset_patch_addr = 0x57e884,
90 .app_load_addr = 0x1234,
91 .board_ext_data_addr = 0x437000,
92 .reserved_ram_size = 19456,
93 .board_addr = 0x433900,
94 .refclk_hz = 26000000,
95 .uarttx_pin = 11,
96 .flags = ATH6KL_HW_64BIT_RATES |
97 ATH6KL_HW_AP_INACTIVITY_MINS,
98
99 .fw = {
100 .dir = AR6004_HW_1_0_FW_DIR,
101 .fw = AR6004_HW_1_0_FIRMWARE_FILE,
102 },
103
104 .fw_board = AR6004_HW_1_0_BOARD_DATA_FILE,
105 .fw_default_board = AR6004_HW_1_0_DEFAULT_BOARD_DATA_FILE,
106 },
107 {
108 .id = AR6004_HW_1_1_VERSION,
109 .name = "ar6004 hw 1.1",
110 .dataset_patch_addr = 0x57e884,
111 .app_load_addr = 0x1234,
112 .board_ext_data_addr = 0x437000,
113 .reserved_ram_size = 11264,
114 .board_addr = 0x43d400,
115 .refclk_hz = 40000000,
116 .uarttx_pin = 11,
117 .flags = ATH6KL_HW_64BIT_RATES |
118 ATH6KL_HW_AP_INACTIVITY_MINS,
119 .fw = {
120 .dir = AR6004_HW_1_1_FW_DIR,
121 .fw = AR6004_HW_1_1_FIRMWARE_FILE,
122 },
123
124 .fw_board = AR6004_HW_1_1_BOARD_DATA_FILE,
125 .fw_default_board = AR6004_HW_1_1_DEFAULT_BOARD_DATA_FILE,
126 },
127 {
128 .id = AR6004_HW_1_2_VERSION,
129 .name = "ar6004 hw 1.2",
130 .dataset_patch_addr = 0x436ecc,
131 .app_load_addr = 0x1234,
132 .board_ext_data_addr = 0x437000,
133 .reserved_ram_size = 9216,
134 .board_addr = 0x435c00,
135 .refclk_hz = 40000000,
136 .uarttx_pin = 11,
137 .flags = ATH6KL_HW_64BIT_RATES |
138 ATH6KL_HW_AP_INACTIVITY_MINS,
139
140 .fw = {
141 .dir = AR6004_HW_1_2_FW_DIR,
142 .fw = AR6004_HW_1_2_FIRMWARE_FILE,
143 },
144 .fw_board = AR6004_HW_1_2_BOARD_DATA_FILE,
145 .fw_default_board = AR6004_HW_1_2_DEFAULT_BOARD_DATA_FILE,
146 },
147 {
148 .id = AR6004_HW_1_3_VERSION,
149 .name = "ar6004 hw 1.3",
150 .dataset_patch_addr = 0x437860,
151 .app_load_addr = 0x1234,
152 .board_ext_data_addr = 0x437000,
153 .reserved_ram_size = 7168,
154 .board_addr = 0x436400,
155 .refclk_hz = 40000000,
156 .uarttx_pin = 11,
157 .flags = ATH6KL_HW_64BIT_RATES |
158 ATH6KL_HW_AP_INACTIVITY_MINS |
159 ATH6KL_HW_MAP_LP_ENDPOINT,
160
161 .fw = {
162 .dir = AR6004_HW_1_3_FW_DIR,
163 .fw = AR6004_HW_1_3_FIRMWARE_FILE,
164 },
165
166 .fw_board = AR6004_HW_1_3_BOARD_DATA_FILE,
167 .fw_default_board = AR6004_HW_1_3_DEFAULT_BOARD_DATA_FILE,
168 },
169 };
170
171 /*
172 * Include definitions here that can be used to tune the WLAN module
173 * behavior. Different customers can tune the behavior as per their needs,
174 * here.
175 */
176
177 /*
178 * This configuration item enable/disable keepalive support.
179 * Keepalive support: In the absence of any data traffic to AP, null
180 * frames will be sent to the AP at periodic interval, to keep the association
181 * active. This configuration item defines the periodic interval.
182 * Use value of zero to disable keepalive support
183 * Default: 60 seconds
184 */
185 #define WLAN_CONFIG_KEEP_ALIVE_INTERVAL 60
186
187 /*
188 * This configuration item sets the value of disconnect timeout
189 * Firmware delays sending the disconnec event to the host for this
190 * timeout after is gets disconnected from the current AP.
191 * If the firmware successly roams within the disconnect timeout
192 * it sends a new connect event
193 */
194 #define WLAN_CONFIG_DISCONNECT_TIMEOUT 10
195
196
197 #define ATH6KL_DATA_OFFSET 64
198 struct sk_buff *ath6kl_buf_alloc(int size)
199 {
200 struct sk_buff *skb;
201 u16 reserved;
202
203 /* Add chacheline space at front and back of buffer */
204 reserved = (2 * L1_CACHE_BYTES) + ATH6KL_DATA_OFFSET +
205 sizeof(struct htc_packet) + ATH6KL_HTC_ALIGN_BYTES;
206 skb = dev_alloc_skb(size + reserved);
207
208 if (skb)
209 skb_reserve(skb, reserved - L1_CACHE_BYTES);
210 return skb;
211 }
212
213 void ath6kl_init_profile_info(struct ath6kl_vif *vif)
214 {
215 vif->ssid_len = 0;
216 memset(vif->ssid, 0, sizeof(vif->ssid));
217
218 vif->dot11_auth_mode = OPEN_AUTH;
219 vif->auth_mode = NONE_AUTH;
220 vif->prwise_crypto = NONE_CRYPT;
221 vif->prwise_crypto_len = 0;
222 vif->grp_crypto = NONE_CRYPT;
223 vif->grp_crypto_len = 0;
224 memset(vif->wep_key_list, 0, sizeof(vif->wep_key_list));
225 memset(vif->req_bssid, 0, sizeof(vif->req_bssid));
226 memset(vif->bssid, 0, sizeof(vif->bssid));
227 vif->bss_ch = 0;
228 }
229
230 static int ath6kl_set_host_app_area(struct ath6kl *ar)
231 {
232 u32 address, data;
233 struct host_app_area host_app_area;
234
235 /* Fetch the address of the host_app_area_s
236 * instance in the host interest area */
237 address = ath6kl_get_hi_item_addr(ar, HI_ITEM(hi_app_host_interest));
238 address = TARG_VTOP(ar->target_type, address);
239
240 if (ath6kl_diag_read32(ar, address, &data))
241 return -EIO;
242
243 address = TARG_VTOP(ar->target_type, data);
244 host_app_area.wmi_protocol_ver = cpu_to_le32(WMI_PROTOCOL_VERSION);
245 if (ath6kl_diag_write(ar, address, (u8 *) &host_app_area,
246 sizeof(struct host_app_area)))
247 return -EIO;
248
249 return 0;
250 }
251
252 static inline void set_ac2_ep_map(struct ath6kl *ar,
253 u8 ac,
254 enum htc_endpoint_id ep)
255 {
256 ar->ac2ep_map[ac] = ep;
257 ar->ep2ac_map[ep] = ac;
258 }
259
260 /* connect to a service */
261 static int ath6kl_connectservice(struct ath6kl *ar,
262 struct htc_service_connect_req *con_req,
263 char *desc)
264 {
265 int status;
266 struct htc_service_connect_resp response;
267
268 memset(&response, 0, sizeof(response));
269
270 status = ath6kl_htc_conn_service(ar->htc_target, con_req, &response);
271 if (status) {
272 ath6kl_err("failed to connect to %s service status:%d\n",
273 desc, status);
274 return status;
275 }
276
277 switch (con_req->svc_id) {
278 case WMI_CONTROL_SVC:
279 if (test_bit(WMI_ENABLED, &ar->flag))
280 ath6kl_wmi_set_control_ep(ar->wmi, response.endpoint);
281 ar->ctrl_ep = response.endpoint;
282 break;
283 case WMI_DATA_BE_SVC:
284 set_ac2_ep_map(ar, WMM_AC_BE, response.endpoint);
285 break;
286 case WMI_DATA_BK_SVC:
287 set_ac2_ep_map(ar, WMM_AC_BK, response.endpoint);
288 break;
289 case WMI_DATA_VI_SVC:
290 set_ac2_ep_map(ar, WMM_AC_VI, response.endpoint);
291 break;
292 case WMI_DATA_VO_SVC:
293 set_ac2_ep_map(ar, WMM_AC_VO, response.endpoint);
294 break;
295 default:
296 ath6kl_err("service id is not mapped %d\n", con_req->svc_id);
297 return -EINVAL;
298 }
299
300 return 0;
301 }
302
303 static int ath6kl_init_service_ep(struct ath6kl *ar)
304 {
305 struct htc_service_connect_req connect;
306
307 memset(&connect, 0, sizeof(connect));
308
309 /* these fields are the same for all service endpoints */
310 connect.ep_cb.tx_comp_multi = ath6kl_tx_complete;
311 connect.ep_cb.rx = ath6kl_rx;
312 connect.ep_cb.rx_refill = ath6kl_rx_refill;
313 connect.ep_cb.tx_full = ath6kl_tx_queue_full;
314
315 /*
316 * Set the max queue depth so that our ath6kl_tx_queue_full handler
317 * gets called.
318 */
319 connect.max_txq_depth = MAX_DEFAULT_SEND_QUEUE_DEPTH;
320 connect.ep_cb.rx_refill_thresh = ATH6KL_MAX_RX_BUFFERS / 4;
321 if (!connect.ep_cb.rx_refill_thresh)
322 connect.ep_cb.rx_refill_thresh++;
323
324 /* connect to control service */
325 connect.svc_id = WMI_CONTROL_SVC;
326 if (ath6kl_connectservice(ar, &connect, "WMI CONTROL"))
327 return -EIO;
328
329 connect.flags |= HTC_FLGS_TX_BNDL_PAD_EN;
330
331 /*
332 * Limit the HTC message size on the send path, although e can
333 * receive A-MSDU frames of 4K, we will only send ethernet-sized
334 * (802.3) frames on the send path.
335 */
336 connect.max_rxmsg_sz = WMI_MAX_TX_DATA_FRAME_LENGTH;
337
338 /*
339 * To reduce the amount of committed memory for larger A_MSDU
340 * frames, use the recv-alloc threshold mechanism for larger
341 * packets.
342 */
343 connect.ep_cb.rx_alloc_thresh = ATH6KL_BUFFER_SIZE;
344 connect.ep_cb.rx_allocthresh = ath6kl_alloc_amsdu_rxbuf;
345
346 /*
347 * For the remaining data services set the connection flag to
348 * reduce dribbling, if configured to do so.
349 */
350 connect.conn_flags |= HTC_CONN_FLGS_REDUCE_CRED_DRIB;
351 connect.conn_flags &= ~HTC_CONN_FLGS_THRESH_MASK;
352 connect.conn_flags |= HTC_CONN_FLGS_THRESH_LVL_HALF;
353
354 connect.svc_id = WMI_DATA_BE_SVC;
355
356 if (ath6kl_connectservice(ar, &connect, "WMI DATA BE"))
357 return -EIO;
358
359 /* connect to back-ground map this to WMI LOW_PRI */
360 connect.svc_id = WMI_DATA_BK_SVC;
361 if (ath6kl_connectservice(ar, &connect, "WMI DATA BK"))
362 return -EIO;
363
364 /* connect to Video service, map this to HI PRI */
365 connect.svc_id = WMI_DATA_VI_SVC;
366 if (ath6kl_connectservice(ar, &connect, "WMI DATA VI"))
367 return -EIO;
368
369 /*
370 * Connect to VO service, this is currently not mapped to a WMI
371 * priority stream due to historical reasons. WMI originally
372 * defined 3 priorities over 3 mailboxes We can change this when
373 * WMI is reworked so that priorities are not dependent on
374 * mailboxes.
375 */
376 connect.svc_id = WMI_DATA_VO_SVC;
377 if (ath6kl_connectservice(ar, &connect, "WMI DATA VO"))
378 return -EIO;
379
380 return 0;
381 }
382
383 void ath6kl_init_control_info(struct ath6kl_vif *vif)
384 {
385 ath6kl_init_profile_info(vif);
386 vif->def_txkey_index = 0;
387 memset(vif->wep_key_list, 0, sizeof(vif->wep_key_list));
388 vif->ch_hint = 0;
389 }
390
391 /*
392 * Set HTC/Mbox operational parameters, this can only be called when the
393 * target is in the BMI phase.
394 */
395 static int ath6kl_set_htc_params(struct ath6kl *ar, u32 mbox_isr_yield_val,
396 u8 htc_ctrl_buf)
397 {
398 int status;
399 u32 blk_size;
400
401 blk_size = ar->mbox_info.block_size;
402
403 if (htc_ctrl_buf)
404 blk_size |= ((u32)htc_ctrl_buf) << 16;
405
406 /* set the host interest area for the block size */
407 status = ath6kl_bmi_write_hi32(ar, hi_mbox_io_block_sz, blk_size);
408 if (status) {
409 ath6kl_err("bmi_write_memory for IO block size failed\n");
410 goto out;
411 }
412
413 ath6kl_dbg(ATH6KL_DBG_TRC, "block size set: %d (target addr:0x%X)\n",
414 blk_size,
415 ath6kl_get_hi_item_addr(ar, HI_ITEM(hi_mbox_io_block_sz)));
416
417 if (mbox_isr_yield_val) {
418 /* set the host interest area for the mbox ISR yield limit */
419 status = ath6kl_bmi_write_hi32(ar, hi_mbox_isr_yield_limit,
420 mbox_isr_yield_val);
421 if (status) {
422 ath6kl_err("bmi_write_memory for yield limit failed\n");
423 goto out;
424 }
425 }
426
427 out:
428 return status;
429 }
430
431 static int ath6kl_target_config_wlan_params(struct ath6kl *ar, int idx)
432 {
433 int ret;
434
435 /*
436 * Configure the device for rx dot11 header rules. "0,0" are the
437 * default values. Required if checksum offload is needed. Set
438 * RxMetaVersion to 2.
439 */
440 ret = ath6kl_wmi_set_rx_frame_format_cmd(ar->wmi, idx,
441 ar->rx_meta_ver, 0, 0);
442 if (ret) {
443 ath6kl_err("unable to set the rx frame format: %d\n", ret);
444 return ret;
445 }
446
447 if (ar->conf_flags & ATH6KL_CONF_IGNORE_PS_FAIL_EVT_IN_SCAN) {
448 ret = ath6kl_wmi_pmparams_cmd(ar->wmi, idx, 0, 1, 0, 0, 1,
449 IGNORE_PS_FAIL_DURING_SCAN);
450 if (ret) {
451 ath6kl_err("unable to set power save fail event policy: %d\n",
452 ret);
453 return ret;
454 }
455 }
456
457 if (!(ar->conf_flags & ATH6KL_CONF_IGNORE_ERP_BARKER)) {
458 ret = ath6kl_wmi_set_lpreamble_cmd(ar->wmi, idx, 0,
459 WMI_FOLLOW_BARKER_IN_ERP);
460 if (ret) {
461 ath6kl_err("unable to set barker preamble policy: %d\n",
462 ret);
463 return ret;
464 }
465 }
466
467 ret = ath6kl_wmi_set_keepalive_cmd(ar->wmi, idx,
468 WLAN_CONFIG_KEEP_ALIVE_INTERVAL);
469 if (ret) {
470 ath6kl_err("unable to set keep alive interval: %d\n", ret);
471 return ret;
472 }
473
474 ret = ath6kl_wmi_disctimeout_cmd(ar->wmi, idx,
475 WLAN_CONFIG_DISCONNECT_TIMEOUT);
476 if (ret) {
477 ath6kl_err("unable to set disconnect timeout: %d\n", ret);
478 return ret;
479 }
480
481 if (!(ar->conf_flags & ATH6KL_CONF_ENABLE_TX_BURST)) {
482 ret = ath6kl_wmi_set_wmm_txop(ar->wmi, idx, WMI_TXOP_DISABLED);
483 if (ret) {
484 ath6kl_err("unable to set txop bursting: %d\n", ret);
485 return ret;
486 }
487 }
488
489 if (ar->p2p && (ar->vif_max == 1 || idx)) {
490 ret = ath6kl_wmi_info_req_cmd(ar->wmi, idx,
491 P2P_FLAG_CAPABILITIES_REQ |
492 P2P_FLAG_MACADDR_REQ |
493 P2P_FLAG_HMODEL_REQ);
494 if (ret) {
495 ath6kl_dbg(ATH6KL_DBG_TRC,
496 "failed to request P2P capabilities (%d) - assuming P2P not supported\n",
497 ret);
498 ar->p2p = false;
499 }
500 }
501
502 if (ar->p2p && (ar->vif_max == 1 || idx)) {
503 /* Enable Probe Request reporting for P2P */
504 ret = ath6kl_wmi_probe_report_req_cmd(ar->wmi, idx, true);
505 if (ret) {
506 ath6kl_dbg(ATH6KL_DBG_TRC,
507 "failed to enable Probe Request reporting (%d)\n",
508 ret);
509 }
510 }
511
512 return ret;
513 }
514
515 int ath6kl_configure_target(struct ath6kl *ar)
516 {
517 u32 param, ram_reserved_size;
518 u8 fw_iftype, fw_mode = 0, fw_submode = 0;
519 int i, status;
520
521 param = !!(ar->conf_flags & ATH6KL_CONF_UART_DEBUG);
522 if (ath6kl_bmi_write_hi32(ar, hi_serial_enable, param)) {
523 ath6kl_err("bmi_write_memory for uart debug failed\n");
524 return -EIO;
525 }
526
527 /*
528 * Note: Even though the firmware interface type is
529 * chosen as BSS_STA for all three interfaces, can
530 * be configured to IBSS/AP as long as the fw submode
531 * remains normal mode (0 - AP, STA and IBSS). But
532 * due to an target assert in firmware only one interface is
533 * configured for now.
534 */
535 fw_iftype = HI_OPTION_FW_MODE_BSS_STA;
536
537 for (i = 0; i < ar->vif_max; i++)
538 fw_mode |= fw_iftype << (i * HI_OPTION_FW_MODE_BITS);
539
540 /*
541 * Submodes when fw does not support dynamic interface
542 * switching:
543 * vif[0] - AP/STA/IBSS
544 * vif[1] - "P2P dev"/"P2P GO"/"P2P Client"
545 * vif[2] - "P2P dev"/"P2P GO"/"P2P Client"
546 * Otherwise, All the interface are initialized to p2p dev.
547 */
548
549 if (test_bit(ATH6KL_FW_CAPABILITY_STA_P2PDEV_DUPLEX,
550 ar->fw_capabilities)) {
551 for (i = 0; i < ar->vif_max; i++)
552 fw_submode |= HI_OPTION_FW_SUBMODE_P2PDEV <<
553 (i * HI_OPTION_FW_SUBMODE_BITS);
554 } else {
555 for (i = 0; i < ar->max_norm_iface; i++)
556 fw_submode |= HI_OPTION_FW_SUBMODE_NONE <<
557 (i * HI_OPTION_FW_SUBMODE_BITS);
558
559 for (i = ar->max_norm_iface; i < ar->vif_max; i++)
560 fw_submode |= HI_OPTION_FW_SUBMODE_P2PDEV <<
561 (i * HI_OPTION_FW_SUBMODE_BITS);
562
563 if (ar->p2p && ar->vif_max == 1)
564 fw_submode = HI_OPTION_FW_SUBMODE_P2PDEV;
565 }
566
567 if (ath6kl_bmi_write_hi32(ar, hi_app_host_interest,
568 HTC_PROTOCOL_VERSION) != 0) {
569 ath6kl_err("bmi_write_memory for htc version failed\n");
570 return -EIO;
571 }
572
573 /* set the firmware mode to STA/IBSS/AP */
574 param = 0;
575
576 if (ath6kl_bmi_read_hi32(ar, hi_option_flag, &param) != 0) {
577 ath6kl_err("bmi_read_memory for setting fwmode failed\n");
578 return -EIO;
579 }
580
581 param |= (ar->vif_max << HI_OPTION_NUM_DEV_SHIFT);
582 param |= fw_mode << HI_OPTION_FW_MODE_SHIFT;
583 param |= fw_submode << HI_OPTION_FW_SUBMODE_SHIFT;
584
585 param |= (0 << HI_OPTION_MAC_ADDR_METHOD_SHIFT);
586 param |= (0 << HI_OPTION_FW_BRIDGE_SHIFT);
587
588 if (ath6kl_bmi_write_hi32(ar, hi_option_flag, param) != 0) {
589 ath6kl_err("bmi_write_memory for setting fwmode failed\n");
590 return -EIO;
591 }
592
593 ath6kl_dbg(ATH6KL_DBG_TRC, "firmware mode set\n");
594
595 /*
596 * Hardcode the address use for the extended board data
597 * Ideally this should be pre-allocate by the OS at boot time
598 * But since it is a new feature and board data is loaded
599 * at init time, we have to workaround this from host.
600 * It is difficult to patch the firmware boot code,
601 * but possible in theory.
602 */
603
604 if (ar->target_type == TARGET_TYPE_AR6003) {
605 param = ar->hw.board_ext_data_addr;
606 ram_reserved_size = ar->hw.reserved_ram_size;
607
608 if (ath6kl_bmi_write_hi32(ar, hi_board_ext_data, param) != 0) {
609 ath6kl_err("bmi_write_memory for hi_board_ext_data failed\n");
610 return -EIO;
611 }
612
613 if (ath6kl_bmi_write_hi32(ar, hi_end_ram_reserve_sz,
614 ram_reserved_size) != 0) {
615 ath6kl_err("bmi_write_memory for hi_end_ram_reserve_sz failed\n");
616 return -EIO;
617 }
618 }
619
620 /* set the block size for the target */
621 if (ath6kl_set_htc_params(ar, MBOX_YIELD_LIMIT, 0))
622 /* use default number of control buffers */
623 return -EIO;
624
625 /* Configure GPIO AR600x UART */
626 status = ath6kl_bmi_write_hi32(ar, hi_dbg_uart_txpin,
627 ar->hw.uarttx_pin);
628 if (status)
629 return status;
630
631 /* Configure target refclk_hz */
632 status = ath6kl_bmi_write_hi32(ar, hi_refclk_hz, ar->hw.refclk_hz);
633 if (status)
634 return status;
635
636 return 0;
637 }
638
639 /* firmware upload */
640 static int ath6kl_get_fw(struct ath6kl *ar, const char *filename,
641 u8 **fw, size_t *fw_len)
642 {
643 const struct firmware *fw_entry;
644 int ret;
645
646 ret = request_firmware(&fw_entry, filename, ar->dev);
647 if (ret)
648 return ret;
649
650 *fw_len = fw_entry->size;
651 *fw = kmemdup(fw_entry->data, fw_entry->size, GFP_KERNEL);
652
653 if (*fw == NULL)
654 ret = -ENOMEM;
655
656 release_firmware(fw_entry);
657
658 return ret;
659 }
660
661 #ifdef CONFIG_OF
662 /*
663 * Check the device tree for a board-id and use it to construct
664 * the pathname to the firmware file. Used (for now) to find a
665 * fallback to the "bdata.bin" file--typically a symlink to the
666 * appropriate board-specific file.
667 */
668 static bool check_device_tree(struct ath6kl *ar)
669 {
670 static const char *board_id_prop = "atheros,board-id";
671 struct device_node *node;
672 char board_filename[64];
673 const char *board_id;
674 int ret;
675
676 for_each_compatible_node(node, NULL, "atheros,ath6kl") {
677 board_id = of_get_property(node, board_id_prop, NULL);
678 if (board_id == NULL) {
679 ath6kl_warn("No \"%s\" property on %s node.\n",
680 board_id_prop, node->name);
681 continue;
682 }
683 snprintf(board_filename, sizeof(board_filename),
684 "%s/bdata.%s.bin", ar->hw.fw.dir, board_id);
685
686 ret = ath6kl_get_fw(ar, board_filename, &ar->fw_board,
687 &ar->fw_board_len);
688 if (ret) {
689 ath6kl_err("Failed to get DT board file %s: %d\n",
690 board_filename, ret);
691 continue;
692 }
693 return true;
694 }
695 return false;
696 }
697 #else
698 static bool check_device_tree(struct ath6kl *ar)
699 {
700 return false;
701 }
702 #endif /* CONFIG_OF */
703
704 static int ath6kl_fetch_board_file(struct ath6kl *ar)
705 {
706 const char *filename;
707 int ret;
708
709 if (ar->fw_board != NULL)
710 return 0;
711
712 if (WARN_ON(ar->hw.fw_board == NULL))
713 return -EINVAL;
714
715 filename = ar->hw.fw_board;
716
717 ret = ath6kl_get_fw(ar, filename, &ar->fw_board,
718 &ar->fw_board_len);
719 if (ret == 0) {
720 /* managed to get proper board file */
721 return 0;
722 }
723
724 if (check_device_tree(ar)) {
725 /* got board file from device tree */
726 return 0;
727 }
728
729 /* there was no proper board file, try to use default instead */
730 ath6kl_warn("Failed to get board file %s (%d), trying to find default board file.\n",
731 filename, ret);
732
733 filename = ar->hw.fw_default_board;
734
735 ret = ath6kl_get_fw(ar, filename, &ar->fw_board,
736 &ar->fw_board_len);
737 if (ret) {
738 ath6kl_err("Failed to get default board file %s: %d\n",
739 filename, ret);
740 return ret;
741 }
742
743 ath6kl_warn("WARNING! No proper board file was not found, instead using a default board file.\n");
744 ath6kl_warn("Most likely your hardware won't work as specified. Install correct board file!\n");
745
746 return 0;
747 }
748
749 static int ath6kl_fetch_otp_file(struct ath6kl *ar)
750 {
751 char filename[100];
752 int ret;
753
754 if (ar->fw_otp != NULL)
755 return 0;
756
757 if (ar->hw.fw.otp == NULL) {
758 ath6kl_dbg(ATH6KL_DBG_BOOT,
759 "no OTP file configured for this hw\n");
760 return 0;
761 }
762
763 snprintf(filename, sizeof(filename), "%s/%s",
764 ar->hw.fw.dir, ar->hw.fw.otp);
765
766 ret = ath6kl_get_fw(ar, filename, &ar->fw_otp,
767 &ar->fw_otp_len);
768 if (ret) {
769 ath6kl_err("Failed to get OTP file %s: %d\n",
770 filename, ret);
771 return ret;
772 }
773
774 return 0;
775 }
776
777 static int ath6kl_fetch_testmode_file(struct ath6kl *ar)
778 {
779 char filename[100];
780 int ret;
781
782 if (ar->testmode == 0)
783 return 0;
784
785 ath6kl_dbg(ATH6KL_DBG_BOOT, "testmode %d\n", ar->testmode);
786
787 if (ar->testmode == 2) {
788 if (ar->hw.fw.utf == NULL) {
789 ath6kl_warn("testmode 2 not supported\n");
790 return -EOPNOTSUPP;
791 }
792
793 snprintf(filename, sizeof(filename), "%s/%s",
794 ar->hw.fw.dir, ar->hw.fw.utf);
795 } else {
796 if (ar->hw.fw.tcmd == NULL) {
797 ath6kl_warn("testmode 1 not supported\n");
798 return -EOPNOTSUPP;
799 }
800
801 snprintf(filename, sizeof(filename), "%s/%s",
802 ar->hw.fw.dir, ar->hw.fw.tcmd);
803 }
804
805 set_bit(TESTMODE, &ar->flag);
806
807 ret = ath6kl_get_fw(ar, filename, &ar->fw, &ar->fw_len);
808 if (ret) {
809 ath6kl_err("Failed to get testmode %d firmware file %s: %d\n",
810 ar->testmode, filename, ret);
811 return ret;
812 }
813
814 return 0;
815 }
816
817 static int ath6kl_fetch_fw_file(struct ath6kl *ar)
818 {
819 char filename[100];
820 int ret;
821
822 if (ar->fw != NULL)
823 return 0;
824
825 /* FIXME: remove WARN_ON() as we won't support FW API 1 for long */
826 if (WARN_ON(ar->hw.fw.fw == NULL))
827 return -EINVAL;
828
829 snprintf(filename, sizeof(filename), "%s/%s",
830 ar->hw.fw.dir, ar->hw.fw.fw);
831
832 ret = ath6kl_get_fw(ar, filename, &ar->fw, &ar->fw_len);
833 if (ret) {
834 ath6kl_err("Failed to get firmware file %s: %d\n",
835 filename, ret);
836 return ret;
837 }
838
839 return 0;
840 }
841
842 static int ath6kl_fetch_patch_file(struct ath6kl *ar)
843 {
844 char filename[100];
845 int ret;
846
847 if (ar->fw_patch != NULL)
848 return 0;
849
850 if (ar->hw.fw.patch == NULL)
851 return 0;
852
853 snprintf(filename, sizeof(filename), "%s/%s",
854 ar->hw.fw.dir, ar->hw.fw.patch);
855
856 ret = ath6kl_get_fw(ar, filename, &ar->fw_patch,
857 &ar->fw_patch_len);
858 if (ret) {
859 ath6kl_err("Failed to get patch file %s: %d\n",
860 filename, ret);
861 return ret;
862 }
863
864 return 0;
865 }
866
867 static int ath6kl_fetch_testscript_file(struct ath6kl *ar)
868 {
869 char filename[100];
870 int ret;
871
872 if (ar->testmode != 2)
873 return 0;
874
875 if (ar->fw_testscript != NULL)
876 return 0;
877
878 if (ar->hw.fw.testscript == NULL)
879 return 0;
880
881 snprintf(filename, sizeof(filename), "%s/%s",
882 ar->hw.fw.dir, ar->hw.fw.testscript);
883
884 ret = ath6kl_get_fw(ar, filename, &ar->fw_testscript,
885 &ar->fw_testscript_len);
886 if (ret) {
887 ath6kl_err("Failed to get testscript file %s: %d\n",
888 filename, ret);
889 return ret;
890 }
891
892 return 0;
893 }
894
895 static int ath6kl_fetch_fw_api1(struct ath6kl *ar)
896 {
897 int ret;
898
899 ret = ath6kl_fetch_otp_file(ar);
900 if (ret)
901 return ret;
902
903 ret = ath6kl_fetch_fw_file(ar);
904 if (ret)
905 return ret;
906
907 ret = ath6kl_fetch_patch_file(ar);
908 if (ret)
909 return ret;
910
911 ret = ath6kl_fetch_testscript_file(ar);
912 if (ret)
913 return ret;
914
915 return 0;
916 }
917
918 static int ath6kl_fetch_fw_apin(struct ath6kl *ar, const char *name)
919 {
920 size_t magic_len, len, ie_len;
921 const struct firmware *fw;
922 struct ath6kl_fw_ie *hdr;
923 char filename[100];
924 const u8 *data;
925 int ret, ie_id, i, index, bit;
926 __le32 *val;
927
928 snprintf(filename, sizeof(filename), "%s/%s", ar->hw.fw.dir, name);
929
930 ret = request_firmware(&fw, filename, ar->dev);
931 if (ret)
932 return ret;
933
934 data = fw->data;
935 len = fw->size;
936
937 /* magic also includes the null byte, check that as well */
938 magic_len = strlen(ATH6KL_FIRMWARE_MAGIC) + 1;
939
940 if (len < magic_len) {
941 ret = -EINVAL;
942 goto out;
943 }
944
945 if (memcmp(data, ATH6KL_FIRMWARE_MAGIC, magic_len) != 0) {
946 ret = -EINVAL;
947 goto out;
948 }
949
950 len -= magic_len;
951 data += magic_len;
952
953 /* loop elements */
954 while (len > sizeof(struct ath6kl_fw_ie)) {
955 /* hdr is unaligned! */
956 hdr = (struct ath6kl_fw_ie *) data;
957
958 ie_id = le32_to_cpup(&hdr->id);
959 ie_len = le32_to_cpup(&hdr->len);
960
961 len -= sizeof(*hdr);
962 data += sizeof(*hdr);
963
964 if (len < ie_len) {
965 ret = -EINVAL;
966 goto out;
967 }
968
969 switch (ie_id) {
970 case ATH6KL_FW_IE_FW_VERSION:
971 strlcpy(ar->wiphy->fw_version, data,
972 sizeof(ar->wiphy->fw_version));
973
974 ath6kl_dbg(ATH6KL_DBG_BOOT,
975 "found fw version %s\n",
976 ar->wiphy->fw_version);
977 break;
978 case ATH6KL_FW_IE_OTP_IMAGE:
979 ath6kl_dbg(ATH6KL_DBG_BOOT, "found otp image ie (%zd B)\n",
980 ie_len);
981
982 ar->fw_otp = kmemdup(data, ie_len, GFP_KERNEL);
983
984 if (ar->fw_otp == NULL) {
985 ret = -ENOMEM;
986 goto out;
987 }
988
989 ar->fw_otp_len = ie_len;
990 break;
991 case ATH6KL_FW_IE_FW_IMAGE:
992 ath6kl_dbg(ATH6KL_DBG_BOOT, "found fw image ie (%zd B)\n",
993 ie_len);
994
995 /* in testmode we already might have a fw file */
996 if (ar->fw != NULL)
997 break;
998
999 ar->fw = vmalloc(ie_len);
1000
1001 if (ar->fw == NULL) {
1002 ret = -ENOMEM;
1003 goto out;
1004 }
1005
1006 memcpy(ar->fw, data, ie_len);
1007 ar->fw_len = ie_len;
1008 break;
1009 case ATH6KL_FW_IE_PATCH_IMAGE:
1010 ath6kl_dbg(ATH6KL_DBG_BOOT, "found patch image ie (%zd B)\n",
1011 ie_len);
1012
1013 ar->fw_patch = kmemdup(data, ie_len, GFP_KERNEL);
1014
1015 if (ar->fw_patch == NULL) {
1016 ret = -ENOMEM;
1017 goto out;
1018 }
1019
1020 ar->fw_patch_len = ie_len;
1021 break;
1022 case ATH6KL_FW_IE_RESERVED_RAM_SIZE:
1023 val = (__le32 *) data;
1024 ar->hw.reserved_ram_size = le32_to_cpup(val);
1025
1026 ath6kl_dbg(ATH6KL_DBG_BOOT,
1027 "found reserved ram size ie 0x%d\n",
1028 ar->hw.reserved_ram_size);
1029 break;
1030 case ATH6KL_FW_IE_CAPABILITIES:
1031 ath6kl_dbg(ATH6KL_DBG_BOOT,
1032 "found firmware capabilities ie (%zd B)\n",
1033 ie_len);
1034
1035 for (i = 0; i < ATH6KL_FW_CAPABILITY_MAX; i++) {
1036 index = i / 8;
1037 bit = i % 8;
1038
1039 if (index == ie_len)
1040 break;
1041
1042 if (data[index] & (1 << bit))
1043 __set_bit(i, ar->fw_capabilities);
1044 }
1045
1046 ath6kl_dbg_dump(ATH6KL_DBG_BOOT, "capabilities", "",
1047 ar->fw_capabilities,
1048 sizeof(ar->fw_capabilities));
1049 break;
1050 case ATH6KL_FW_IE_PATCH_ADDR:
1051 if (ie_len != sizeof(*val))
1052 break;
1053
1054 val = (__le32 *) data;
1055 ar->hw.dataset_patch_addr = le32_to_cpup(val);
1056
1057 ath6kl_dbg(ATH6KL_DBG_BOOT,
1058 "found patch address ie 0x%x\n",
1059 ar->hw.dataset_patch_addr);
1060 break;
1061 case ATH6KL_FW_IE_BOARD_ADDR:
1062 if (ie_len != sizeof(*val))
1063 break;
1064
1065 val = (__le32 *) data;
1066 ar->hw.board_addr = le32_to_cpup(val);
1067
1068 ath6kl_dbg(ATH6KL_DBG_BOOT,
1069 "found board address ie 0x%x\n",
1070 ar->hw.board_addr);
1071 break;
1072 case ATH6KL_FW_IE_VIF_MAX:
1073 if (ie_len != sizeof(*val))
1074 break;
1075
1076 val = (__le32 *) data;
1077 ar->vif_max = min_t(unsigned int, le32_to_cpup(val),
1078 ATH6KL_VIF_MAX);
1079
1080 if (ar->vif_max > 1 && !ar->p2p)
1081 ar->max_norm_iface = 2;
1082
1083 ath6kl_dbg(ATH6KL_DBG_BOOT,
1084 "found vif max ie %d\n", ar->vif_max);
1085 break;
1086 default:
1087 ath6kl_dbg(ATH6KL_DBG_BOOT, "Unknown fw ie: %u\n",
1088 le32_to_cpup(&hdr->id));
1089 break;
1090 }
1091
1092 len -= ie_len;
1093 data += ie_len;
1094 };
1095
1096 ret = 0;
1097 out:
1098 release_firmware(fw);
1099
1100 return ret;
1101 }
1102
1103 int ath6kl_init_fetch_firmwares(struct ath6kl *ar)
1104 {
1105 int ret;
1106
1107 ret = ath6kl_fetch_board_file(ar);
1108 if (ret)
1109 return ret;
1110
1111 ret = ath6kl_fetch_testmode_file(ar);
1112 if (ret)
1113 return ret;
1114
1115 ret = ath6kl_fetch_fw_apin(ar, ATH6KL_FW_API4_FILE);
1116 if (ret == 0) {
1117 ar->fw_api = 4;
1118 goto out;
1119 }
1120
1121 ret = ath6kl_fetch_fw_apin(ar, ATH6KL_FW_API3_FILE);
1122 if (ret == 0) {
1123 ar->fw_api = 3;
1124 goto out;
1125 }
1126
1127 ret = ath6kl_fetch_fw_apin(ar, ATH6KL_FW_API2_FILE);
1128 if (ret == 0) {
1129 ar->fw_api = 2;
1130 goto out;
1131 }
1132
1133 ret = ath6kl_fetch_fw_api1(ar);
1134 if (ret)
1135 return ret;
1136
1137 ar->fw_api = 1;
1138
1139 out:
1140 ath6kl_dbg(ATH6KL_DBG_BOOT, "using fw api %d\n", ar->fw_api);
1141
1142 return 0;
1143 }
1144
1145 static int ath6kl_upload_board_file(struct ath6kl *ar)
1146 {
1147 u32 board_address, board_ext_address, param;
1148 u32 board_data_size, board_ext_data_size;
1149 int ret;
1150
1151 if (WARN_ON(ar->fw_board == NULL))
1152 return -ENOENT;
1153
1154 /*
1155 * Determine where in Target RAM to write Board Data.
1156 * For AR6004, host determine Target RAM address for
1157 * writing board data.
1158 */
1159 if (ar->hw.board_addr != 0) {
1160 board_address = ar->hw.board_addr;
1161 ath6kl_bmi_write_hi32(ar, hi_board_data,
1162 board_address);
1163 } else {
1164 ath6kl_bmi_read_hi32(ar, hi_board_data, &board_address);
1165 }
1166
1167 /* determine where in target ram to write extended board data */
1168 ath6kl_bmi_read_hi32(ar, hi_board_ext_data, &board_ext_address);
1169
1170 if (ar->target_type == TARGET_TYPE_AR6003 &&
1171 board_ext_address == 0) {
1172 ath6kl_err("Failed to get board file target address.\n");
1173 return -EINVAL;
1174 }
1175
1176 switch (ar->target_type) {
1177 case TARGET_TYPE_AR6003:
1178 board_data_size = AR6003_BOARD_DATA_SZ;
1179 board_ext_data_size = AR6003_BOARD_EXT_DATA_SZ;
1180 if (ar->fw_board_len > (board_data_size + board_ext_data_size))
1181 board_ext_data_size = AR6003_BOARD_EXT_DATA_SZ_V2;
1182 break;
1183 case TARGET_TYPE_AR6004:
1184 board_data_size = AR6004_BOARD_DATA_SZ;
1185 board_ext_data_size = AR6004_BOARD_EXT_DATA_SZ;
1186 break;
1187 default:
1188 WARN_ON(1);
1189 return -EINVAL;
1190 break;
1191 }
1192
1193 if (board_ext_address &&
1194 ar->fw_board_len == (board_data_size + board_ext_data_size)) {
1195
1196 /* write extended board data */
1197 ath6kl_dbg(ATH6KL_DBG_BOOT,
1198 "writing extended board data to 0x%x (%d B)\n",
1199 board_ext_address, board_ext_data_size);
1200
1201 ret = ath6kl_bmi_write(ar, board_ext_address,
1202 ar->fw_board + board_data_size,
1203 board_ext_data_size);
1204 if (ret) {
1205 ath6kl_err("Failed to write extended board data: %d\n",
1206 ret);
1207 return ret;
1208 }
1209
1210 /* record that extended board data is initialized */
1211 param = (board_ext_data_size << 16) | 1;
1212
1213 ath6kl_bmi_write_hi32(ar, hi_board_ext_data_config, param);
1214 }
1215
1216 if (ar->fw_board_len < board_data_size) {
1217 ath6kl_err("Too small board file: %zu\n", ar->fw_board_len);
1218 ret = -EINVAL;
1219 return ret;
1220 }
1221
1222 ath6kl_dbg(ATH6KL_DBG_BOOT, "writing board file to 0x%x (%d B)\n",
1223 board_address, board_data_size);
1224
1225 ret = ath6kl_bmi_write(ar, board_address, ar->fw_board,
1226 board_data_size);
1227
1228 if (ret) {
1229 ath6kl_err("Board file bmi write failed: %d\n", ret);
1230 return ret;
1231 }
1232
1233 /* record the fact that Board Data IS initialized */
1234 ath6kl_bmi_write_hi32(ar, hi_board_data_initialized, 1);
1235
1236 return ret;
1237 }
1238
1239 static int ath6kl_upload_otp(struct ath6kl *ar)
1240 {
1241 u32 address, param;
1242 bool from_hw = false;
1243 int ret;
1244
1245 if (ar->fw_otp == NULL)
1246 return 0;
1247
1248 address = ar->hw.app_load_addr;
1249
1250 ath6kl_dbg(ATH6KL_DBG_BOOT, "writing otp to 0x%x (%zd B)\n", address,
1251 ar->fw_otp_len);
1252
1253 ret = ath6kl_bmi_fast_download(ar, address, ar->fw_otp,
1254 ar->fw_otp_len);
1255 if (ret) {
1256 ath6kl_err("Failed to upload OTP file: %d\n", ret);
1257 return ret;
1258 }
1259
1260 /* read firmware start address */
1261 ret = ath6kl_bmi_read_hi32(ar, hi_app_start, &address);
1262
1263 if (ret) {
1264 ath6kl_err("Failed to read hi_app_start: %d\n", ret);
1265 return ret;
1266 }
1267
1268 if (ar->hw.app_start_override_addr == 0) {
1269 ar->hw.app_start_override_addr = address;
1270 from_hw = true;
1271 }
1272
1273 ath6kl_dbg(ATH6KL_DBG_BOOT, "app_start_override_addr%s 0x%x\n",
1274 from_hw ? " (from hw)" : "",
1275 ar->hw.app_start_override_addr);
1276
1277 /* execute the OTP code */
1278 ath6kl_dbg(ATH6KL_DBG_BOOT, "executing OTP at 0x%x\n",
1279 ar->hw.app_start_override_addr);
1280 param = 0;
1281 ath6kl_bmi_execute(ar, ar->hw.app_start_override_addr, &param);
1282
1283 return ret;
1284 }
1285
1286 static int ath6kl_upload_firmware(struct ath6kl *ar)
1287 {
1288 u32 address;
1289 int ret;
1290
1291 if (WARN_ON(ar->fw == NULL))
1292 return 0;
1293
1294 address = ar->hw.app_load_addr;
1295
1296 ath6kl_dbg(ATH6KL_DBG_BOOT, "writing firmware to 0x%x (%zd B)\n",
1297 address, ar->fw_len);
1298
1299 ret = ath6kl_bmi_fast_download(ar, address, ar->fw, ar->fw_len);
1300
1301 if (ret) {
1302 ath6kl_err("Failed to write firmware: %d\n", ret);
1303 return ret;
1304 }
1305
1306 /*
1307 * Set starting address for firmware
1308 * Don't need to setup app_start override addr on AR6004
1309 */
1310 if (ar->target_type != TARGET_TYPE_AR6004) {
1311 address = ar->hw.app_start_override_addr;
1312 ath6kl_bmi_set_app_start(ar, address);
1313 }
1314 return ret;
1315 }
1316
1317 static int ath6kl_upload_patch(struct ath6kl *ar)
1318 {
1319 u32 address;
1320 int ret;
1321
1322 if (ar->fw_patch == NULL)
1323 return 0;
1324
1325 address = ar->hw.dataset_patch_addr;
1326
1327 ath6kl_dbg(ATH6KL_DBG_BOOT, "writing patch to 0x%x (%zd B)\n",
1328 address, ar->fw_patch_len);
1329
1330 ret = ath6kl_bmi_write(ar, address, ar->fw_patch, ar->fw_patch_len);
1331 if (ret) {
1332 ath6kl_err("Failed to write patch file: %d\n", ret);
1333 return ret;
1334 }
1335
1336 ath6kl_bmi_write_hi32(ar, hi_dset_list_head, address);
1337
1338 return 0;
1339 }
1340
1341 static int ath6kl_upload_testscript(struct ath6kl *ar)
1342 {
1343 u32 address;
1344 int ret;
1345
1346 if (ar->testmode != 2)
1347 return 0;
1348
1349 if (ar->fw_testscript == NULL)
1350 return 0;
1351
1352 address = ar->hw.testscript_addr;
1353
1354 ath6kl_dbg(ATH6KL_DBG_BOOT, "writing testscript to 0x%x (%zd B)\n",
1355 address, ar->fw_testscript_len);
1356
1357 ret = ath6kl_bmi_write(ar, address, ar->fw_testscript,
1358 ar->fw_testscript_len);
1359 if (ret) {
1360 ath6kl_err("Failed to write testscript file: %d\n", ret);
1361 return ret;
1362 }
1363
1364 ath6kl_bmi_write_hi32(ar, hi_ota_testscript, address);
1365 ath6kl_bmi_write_hi32(ar, hi_end_ram_reserve_sz, 4096);
1366 ath6kl_bmi_write_hi32(ar, hi_test_apps_related, 1);
1367
1368 return 0;
1369 }
1370
1371 static int ath6kl_init_upload(struct ath6kl *ar)
1372 {
1373 u32 param, options, sleep, address;
1374 int status = 0;
1375
1376 if (ar->target_type != TARGET_TYPE_AR6003 &&
1377 ar->target_type != TARGET_TYPE_AR6004)
1378 return -EINVAL;
1379
1380 /* temporarily disable system sleep */
1381 address = MBOX_BASE_ADDRESS + LOCAL_SCRATCH_ADDRESS;
1382 status = ath6kl_bmi_reg_read(ar, address, &param);
1383 if (status)
1384 return status;
1385
1386 options = param;
1387
1388 param |= ATH6KL_OPTION_SLEEP_DISABLE;
1389 status = ath6kl_bmi_reg_write(ar, address, param);
1390 if (status)
1391 return status;
1392
1393 address = RTC_BASE_ADDRESS + SYSTEM_SLEEP_ADDRESS;
1394 status = ath6kl_bmi_reg_read(ar, address, &param);
1395 if (status)
1396 return status;
1397
1398 sleep = param;
1399
1400 param |= SM(SYSTEM_SLEEP_DISABLE, 1);
1401 status = ath6kl_bmi_reg_write(ar, address, param);
1402 if (status)
1403 return status;
1404
1405 ath6kl_dbg(ATH6KL_DBG_TRC, "old options: %d, old sleep: %d\n",
1406 options, sleep);
1407
1408 /* program analog PLL register */
1409 /* no need to control 40/44MHz clock on AR6004 */
1410 if (ar->target_type != TARGET_TYPE_AR6004) {
1411 status = ath6kl_bmi_reg_write(ar, ATH6KL_ANALOG_PLL_REGISTER,
1412 0xF9104001);
1413
1414 if (status)
1415 return status;
1416
1417 /* Run at 80/88MHz by default */
1418 param = SM(CPU_CLOCK_STANDARD, 1);
1419
1420 address = RTC_BASE_ADDRESS + CPU_CLOCK_ADDRESS;
1421 status = ath6kl_bmi_reg_write(ar, address, param);
1422 if (status)
1423 return status;
1424 }
1425
1426 param = 0;
1427 address = RTC_BASE_ADDRESS + LPO_CAL_ADDRESS;
1428 param = SM(LPO_CAL_ENABLE, 1);
1429 status = ath6kl_bmi_reg_write(ar, address, param);
1430 if (status)
1431 return status;
1432
1433 /* WAR to avoid SDIO CRC err */
1434 if (ar->hw.flags & ATH6KL_HW_SDIO_CRC_ERROR_WAR) {
1435 ath6kl_err("temporary war to avoid sdio crc error\n");
1436
1437 param = 0x28;
1438 address = GPIO_BASE_ADDRESS + GPIO_PIN9_ADDRESS;
1439 status = ath6kl_bmi_reg_write(ar, address, param);
1440 if (status)
1441 return status;
1442
1443 param = 0x20;
1444
1445 address = GPIO_BASE_ADDRESS + GPIO_PIN10_ADDRESS;
1446 status = ath6kl_bmi_reg_write(ar, address, param);
1447 if (status)
1448 return status;
1449
1450 address = GPIO_BASE_ADDRESS + GPIO_PIN11_ADDRESS;
1451 status = ath6kl_bmi_reg_write(ar, address, param);
1452 if (status)
1453 return status;
1454
1455 address = GPIO_BASE_ADDRESS + GPIO_PIN12_ADDRESS;
1456 status = ath6kl_bmi_reg_write(ar, address, param);
1457 if (status)
1458 return status;
1459
1460 address = GPIO_BASE_ADDRESS + GPIO_PIN13_ADDRESS;
1461 status = ath6kl_bmi_reg_write(ar, address, param);
1462 if (status)
1463 return status;
1464 }
1465
1466 /* write EEPROM data to Target RAM */
1467 status = ath6kl_upload_board_file(ar);
1468 if (status)
1469 return status;
1470
1471 /* transfer One time Programmable data */
1472 status = ath6kl_upload_otp(ar);
1473 if (status)
1474 return status;
1475
1476 /* Download Target firmware */
1477 status = ath6kl_upload_firmware(ar);
1478 if (status)
1479 return status;
1480
1481 status = ath6kl_upload_patch(ar);
1482 if (status)
1483 return status;
1484
1485 /* Download the test script */
1486 status = ath6kl_upload_testscript(ar);
1487 if (status)
1488 return status;
1489
1490 /* Restore system sleep */
1491 address = RTC_BASE_ADDRESS + SYSTEM_SLEEP_ADDRESS;
1492 status = ath6kl_bmi_reg_write(ar, address, sleep);
1493 if (status)
1494 return status;
1495
1496 address = MBOX_BASE_ADDRESS + LOCAL_SCRATCH_ADDRESS;
1497 param = options | 0x20;
1498 status = ath6kl_bmi_reg_write(ar, address, param);
1499 if (status)
1500 return status;
1501
1502 return status;
1503 }
1504
1505 int ath6kl_init_hw_params(struct ath6kl *ar)
1506 {
1507 const struct ath6kl_hw *uninitialized_var(hw);
1508 int i;
1509
1510 for (i = 0; i < ARRAY_SIZE(hw_list); i++) {
1511 hw = &hw_list[i];
1512
1513 if (hw->id == ar->version.target_ver)
1514 break;
1515 }
1516
1517 if (i == ARRAY_SIZE(hw_list)) {
1518 ath6kl_err("Unsupported hardware version: 0x%x\n",
1519 ar->version.target_ver);
1520 return -EINVAL;
1521 }
1522
1523 ar->hw = *hw;
1524
1525 ath6kl_dbg(ATH6KL_DBG_BOOT,
1526 "target_ver 0x%x target_type 0x%x dataset_patch 0x%x app_load_addr 0x%x\n",
1527 ar->version.target_ver, ar->target_type,
1528 ar->hw.dataset_patch_addr, ar->hw.app_load_addr);
1529 ath6kl_dbg(ATH6KL_DBG_BOOT,
1530 "app_start_override_addr 0x%x board_ext_data_addr 0x%x reserved_ram_size 0x%x",
1531 ar->hw.app_start_override_addr, ar->hw.board_ext_data_addr,
1532 ar->hw.reserved_ram_size);
1533 ath6kl_dbg(ATH6KL_DBG_BOOT,
1534 "refclk_hz %d uarttx_pin %d",
1535 ar->hw.refclk_hz, ar->hw.uarttx_pin);
1536
1537 return 0;
1538 }
1539
1540 static const char *ath6kl_init_get_hif_name(enum ath6kl_hif_type type)
1541 {
1542 switch (type) {
1543 case ATH6KL_HIF_TYPE_SDIO:
1544 return "sdio";
1545 case ATH6KL_HIF_TYPE_USB:
1546 return "usb";
1547 }
1548
1549 return NULL;
1550 }
1551
1552
1553 static const struct fw_capa_str_map {
1554 int id;
1555 const char *name;
1556 } fw_capa_map[] = {
1557 { ATH6KL_FW_CAPABILITY_HOST_P2P, "host-p2p" },
1558 { ATH6KL_FW_CAPABILITY_SCHED_SCAN, "sched-scan" },
1559 { ATH6KL_FW_CAPABILITY_STA_P2PDEV_DUPLEX, "sta-p2pdev-duplex" },
1560 { ATH6KL_FW_CAPABILITY_INACTIVITY_TIMEOUT, "inactivity-timeout" },
1561 { ATH6KL_FW_CAPABILITY_RSN_CAP_OVERRIDE, "rsn-cap-override" },
1562 { ATH6KL_FW_CAPABILITY_WOW_MULTICAST_FILTER, "wow-mc-filter" },
1563 { ATH6KL_FW_CAPABILITY_BMISS_ENHANCE, "bmiss-enhance" },
1564 { ATH6KL_FW_CAPABILITY_SCHED_SCAN_MATCH_LIST, "sscan-match-list" },
1565 { ATH6KL_FW_CAPABILITY_RSSI_SCAN_THOLD, "rssi-scan-thold" },
1566 { ATH6KL_FW_CAPABILITY_CUSTOM_MAC_ADDR, "custom-mac-addr" },
1567 { ATH6KL_FW_CAPABILITY_TX_ERR_NOTIFY, "tx-err-notify" },
1568 { ATH6KL_FW_CAPABILITY_REGDOMAIN, "regdomain" },
1569 { ATH6KL_FW_CAPABILITY_SCHED_SCAN_V2, "sched-scan-v2" },
1570 { ATH6KL_FW_CAPABILITY_HEART_BEAT_POLL, "hb-poll" },
1571 };
1572
1573 static const char *ath6kl_init_get_fw_capa_name(unsigned int id)
1574 {
1575 int i;
1576
1577 for (i = 0; i < ARRAY_SIZE(fw_capa_map); i++) {
1578 if (fw_capa_map[i].id == id)
1579 return fw_capa_map[i].name;
1580 }
1581
1582 return "<unknown>";
1583 }
1584
1585 static void ath6kl_init_get_fwcaps(struct ath6kl *ar, char *buf, size_t buf_len)
1586 {
1587 u8 *data = (u8 *) ar->fw_capabilities;
1588 size_t trunc_len, len = 0;
1589 int i, index, bit;
1590 char *trunc = "...";
1591
1592 for (i = 0; i < ATH6KL_FW_CAPABILITY_MAX; i++) {
1593 index = i / 8;
1594 bit = i % 8;
1595
1596 if (index >= sizeof(ar->fw_capabilities) * 4)
1597 break;
1598
1599 if (buf_len - len < 4) {
1600 ath6kl_warn("firmware capability buffer too small!\n");
1601
1602 /* add "..." to the end of string */
1603 trunc_len = strlen(trunc) + 1;
1604 strncpy(buf + buf_len - trunc_len, trunc, trunc_len);
1605
1606 return;
1607 }
1608
1609 if (data[index] & (1 << bit)) {
1610 len += scnprintf(buf + len, buf_len - len, "%s,",
1611 ath6kl_init_get_fw_capa_name(i));
1612 }
1613 }
1614
1615 /* overwrite the last comma */
1616 if (len > 0)
1617 len--;
1618
1619 buf[len] = '\0';
1620 }
1621
1622 static int __ath6kl_init_hw_start(struct ath6kl *ar)
1623 {
1624 long timeleft;
1625 int ret, i;
1626 char buf[200];
1627
1628 ath6kl_dbg(ATH6KL_DBG_BOOT, "hw start\n");
1629
1630 ret = ath6kl_hif_power_on(ar);
1631 if (ret)
1632 return ret;
1633
1634 ret = ath6kl_configure_target(ar);
1635 if (ret)
1636 goto err_power_off;
1637
1638 ret = ath6kl_init_upload(ar);
1639 if (ret)
1640 goto err_power_off;
1641
1642 /* Do we need to finish the BMI phase */
1643 ret = ath6kl_bmi_done(ar);
1644 if (ret)
1645 goto err_power_off;
1646
1647 /*
1648 * The reason we have to wait for the target here is that the
1649 * driver layer has to init BMI in order to set the host block
1650 * size.
1651 */
1652 if (ath6kl_htc_wait_target(ar->htc_target)) {
1653 ret = -EIO;
1654 goto err_power_off;
1655 }
1656
1657 if (ath6kl_init_service_ep(ar)) {
1658 ret = -EIO;
1659 goto err_cleanup_scatter;
1660 }
1661
1662 /* setup credit distribution */
1663 ath6kl_htc_credit_setup(ar->htc_target, &ar->credit_state_info);
1664
1665 /* start HTC */
1666 ret = ath6kl_htc_start(ar->htc_target);
1667 if (ret) {
1668 /* FIXME: call this */
1669 ath6kl_cookie_cleanup(ar);
1670 goto err_cleanup_scatter;
1671 }
1672
1673 /* Wait for Wmi event to be ready */
1674 timeleft = wait_event_interruptible_timeout(ar->event_wq,
1675 test_bit(WMI_READY,
1676 &ar->flag),
1677 WMI_TIMEOUT);
1678
1679 ath6kl_dbg(ATH6KL_DBG_BOOT, "firmware booted\n");
1680
1681
1682 if (test_and_clear_bit(FIRST_BOOT, &ar->flag)) {
1683 ath6kl_info("%s %s fw %s api %d%s\n",
1684 ar->hw.name,
1685 ath6kl_init_get_hif_name(ar->hif_type),
1686 ar->wiphy->fw_version,
1687 ar->fw_api,
1688 test_bit(TESTMODE, &ar->flag) ? " testmode" : "");
1689 ath6kl_init_get_fwcaps(ar, buf, sizeof(buf));
1690 ath6kl_info("firmware supports: %s\n", buf);
1691 }
1692
1693 if (ar->version.abi_ver != ATH6KL_ABI_VERSION) {
1694 ath6kl_err("abi version mismatch: host(0x%x), target(0x%x)\n",
1695 ATH6KL_ABI_VERSION, ar->version.abi_ver);
1696 ret = -EIO;
1697 goto err_htc_stop;
1698 }
1699
1700 if (!timeleft || signal_pending(current)) {
1701 ath6kl_err("wmi is not ready or wait was interrupted\n");
1702 ret = -EIO;
1703 goto err_htc_stop;
1704 }
1705
1706 ath6kl_dbg(ATH6KL_DBG_TRC, "%s: wmi is ready\n", __func__);
1707
1708 /* communicate the wmi protocol verision to the target */
1709 /* FIXME: return error */
1710 if ((ath6kl_set_host_app_area(ar)) != 0)
1711 ath6kl_err("unable to set the host app area\n");
1712
1713 for (i = 0; i < ar->vif_max; i++) {
1714 ret = ath6kl_target_config_wlan_params(ar, i);
1715 if (ret)
1716 goto err_htc_stop;
1717 }
1718
1719 return 0;
1720
1721 err_htc_stop:
1722 ath6kl_htc_stop(ar->htc_target);
1723 err_cleanup_scatter:
1724 ath6kl_hif_cleanup_scatter(ar);
1725 err_power_off:
1726 ath6kl_hif_power_off(ar);
1727
1728 return ret;
1729 }
1730
1731 int ath6kl_init_hw_start(struct ath6kl *ar)
1732 {
1733 int err;
1734
1735 err = __ath6kl_init_hw_start(ar);
1736 if (err)
1737 return err;
1738 ar->state = ATH6KL_STATE_ON;
1739 return 0;
1740 }
1741
1742 static int __ath6kl_init_hw_stop(struct ath6kl *ar)
1743 {
1744 int ret;
1745
1746 ath6kl_dbg(ATH6KL_DBG_BOOT, "hw stop\n");
1747
1748 ath6kl_htc_stop(ar->htc_target);
1749
1750 ath6kl_hif_stop(ar);
1751
1752 ath6kl_bmi_reset(ar);
1753
1754 ret = ath6kl_hif_power_off(ar);
1755 if (ret)
1756 ath6kl_warn("failed to power off hif: %d\n", ret);
1757
1758 return 0;
1759 }
1760
1761 int ath6kl_init_hw_stop(struct ath6kl *ar)
1762 {
1763 int err;
1764
1765 err = __ath6kl_init_hw_stop(ar);
1766 if (err)
1767 return err;
1768 ar->state = ATH6KL_STATE_OFF;
1769 return 0;
1770 }
1771
1772 void ath6kl_init_hw_restart(struct ath6kl *ar)
1773 {
1774 clear_bit(WMI_READY, &ar->flag);
1775
1776 ath6kl_cfg80211_stop_all(ar);
1777
1778 if (__ath6kl_init_hw_stop(ar)) {
1779 ath6kl_dbg(ATH6KL_DBG_RECOVERY, "Failed to stop during fw error recovery\n");
1780 return;
1781 }
1782
1783 if (__ath6kl_init_hw_start(ar)) {
1784 ath6kl_dbg(ATH6KL_DBG_RECOVERY, "Failed to restart during fw error recovery\n");
1785 return;
1786 }
1787 }
1788
1789 void ath6kl_stop_txrx(struct ath6kl *ar)
1790 {
1791 struct ath6kl_vif *vif, *tmp_vif;
1792 int i;
1793
1794 set_bit(DESTROY_IN_PROGRESS, &ar->flag);
1795
1796 if (down_interruptible(&ar->sem)) {
1797 ath6kl_err("down_interruptible failed\n");
1798 return;
1799 }
1800
1801 for (i = 0; i < AP_MAX_NUM_STA; i++)
1802 aggr_reset_state(ar->sta_list[i].aggr_conn);
1803
1804 spin_lock_bh(&ar->list_lock);
1805 list_for_each_entry_safe(vif, tmp_vif, &ar->vif_list, list) {
1806 list_del(&vif->list);
1807 spin_unlock_bh(&ar->list_lock);
1808 ath6kl_cfg80211_vif_stop(vif, test_bit(WMI_READY, &ar->flag));
1809 rtnl_lock();
1810 ath6kl_cfg80211_vif_cleanup(vif);
1811 rtnl_unlock();
1812 spin_lock_bh(&ar->list_lock);
1813 }
1814 spin_unlock_bh(&ar->list_lock);
1815
1816 clear_bit(WMI_READY, &ar->flag);
1817
1818 /*
1819 * After wmi_shudown all WMI events will be dropped. We
1820 * need to cleanup the buffers allocated in AP mode and
1821 * give disconnect notification to stack, which usually
1822 * happens in the disconnect_event. Simulate the disconnect
1823 * event by calling the function directly. Sometimes
1824 * disconnect_event will be received when the debug logs
1825 * are collected.
1826 */
1827 ath6kl_wmi_shutdown(ar->wmi);
1828
1829 clear_bit(WMI_ENABLED, &ar->flag);
1830 if (ar->htc_target) {
1831 ath6kl_dbg(ATH6KL_DBG_TRC, "%s: shut down htc\n", __func__);
1832 ath6kl_htc_stop(ar->htc_target);
1833 }
1834
1835 /*
1836 * Try to reset the device if we can. The driver may have been
1837 * configure NOT to reset the target during a debug session.
1838 */
1839 ath6kl_dbg(ATH6KL_DBG_TRC,
1840 "attempting to reset target on instance destroy\n");
1841 ath6kl_reset_device(ar, ar->target_type, true, true);
1842
1843 up(&ar->sem);
1844 }
1845 EXPORT_SYMBOL(ath6kl_stop_txrx);
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