drivers/net/wireless/ath/ath9k/ani.c

   1 /*
   2  * Copyright (c) 2008-2011 Atheros Communications Inc.
   3  *
   4  * Permission to use, copy, modify, and/or distribute this software for any
   5  * purpose with or without fee is hereby granted, provided that the above
   6  * copyright notice and this permission notice appear in all copies.
   7  *
   8  * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
   9  * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
  10  * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
  11  * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
  12  * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
  13  * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
  14  * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
  15  */
  16
  17 #include <linux/kernel.h>
  18 #include <linux/export.h>
  19 #include "hw.h"
  20 #include "hw-ops.h"
  21
  22 struct ani_ofdm_level_entry {
  23         int spur_immunity_level;
  24         int fir_step_level;
  25         int ofdm_weak_signal_on;
  26 };
  27
  28 /* values here are relative to the INI */
  29
  30 /*
  31  * Legend:
  32  *
  33  * SI: Spur immunity
  34  * FS: FIR Step
  35  * WS: OFDM / CCK Weak Signal detection
  36  * MRC-CCK: Maximal Ratio Combining for CCK
  37  */
  38
  39 static const struct ani_ofdm_level_entry ofdm_level_table[] = {
  40         /* SI  FS  WS */
  41         {  0,  0,  1  }, /* lvl 0 */
  42         {  1,  1,  1  }, /* lvl 1 */
  43         {  2,  2,  1  }, /* lvl 2 */
  44         {  3,  2,  1  }, /* lvl 3  (default) */
  45         {  4,  3,  1  }, /* lvl 4 */
  46         {  5,  4,  1  }, /* lvl 5 */
  47         {  6,  5,  1  }, /* lvl 6 */
  48         {  7,  6,  1  }, /* lvl 7 */
  49         {  7,  6,  0  }, /* lvl 8 */
  50         {  7,  7,  0  }  /* lvl 9 */
  51 };
  52 #define ATH9K_ANI_OFDM_NUM_LEVEL \
  53         ARRAY_SIZE(ofdm_level_table)
  54 #define ATH9K_ANI_OFDM_MAX_LEVEL \
  55         (ATH9K_ANI_OFDM_NUM_LEVEL-1)
  56 #define ATH9K_ANI_OFDM_DEF_LEVEL \
  57         3 /* default level - matches the INI settings */
  58
  59 /*
  60  * MRC (Maximal Ratio Combining) has always been used with multi-antenna ofdm.
  61  * With OFDM for single stream you just add up all antenna inputs, you're
  62  * only interested in what you get after FFT. Signal aligment is also not
  63  * required for OFDM because any phase difference adds up in the frequency
  64  * domain.
  65  *
  66  * MRC requires extra work for use with CCK. You need to align the antenna
  67  * signals from the different antenna before you can add the signals together.
  68  * You need aligment of signals as CCK is in time domain, so addition can cancel
  69  * your signal completely if phase is 180 degrees (think of adding sine waves).
  70  * You also need to remove noise before the addition and this is where ANI
  71  * MRC CCK comes into play. One of the antenna inputs may be stronger but
  72  * lower SNR, so just adding after alignment can be dangerous.
  73  *
  74  * Regardless of alignment in time, the antenna signals add constructively after
  75  * FFT and improve your reception. For more information:
  76  *
  77  * http://en.wikipedia.org/wiki/Maximal-ratio_combining
  78  */
  79
  80 struct ani_cck_level_entry {
  81         int fir_step_level;
  82         int mrc_cck_on;
  83 };
  84
  85 static const struct ani_cck_level_entry cck_level_table[] = {
  86         /* FS  MRC-CCK  */
  87         {  0,  1  }, /* lvl 0 */
  88         {  1,  1  }, /* lvl 1 */
  89         {  2,  1  }, /* lvl 2  (default) */
  90         {  3,  1  }, /* lvl 3 */
  91         {  4,  0  }, /* lvl 4 */
  92         {  5,  0  }, /* lvl 5 */
  93         {  6,  0  }, /* lvl 6 */
  94         {  6,  0  }, /* lvl 7 (only for high rssi) */
  95         {  7,  0  }  /* lvl 8 (only for high rssi) */
  96 };
  97
  98 #define ATH9K_ANI_CCK_NUM_LEVEL \
  99         ARRAY_SIZE(cck_level_table)
 100 #define ATH9K_ANI_CCK_MAX_LEVEL \
 101         (ATH9K_ANI_CCK_NUM_LEVEL-1)
 102 #define ATH9K_ANI_CCK_MAX_LEVEL_LOW_RSSI \
 103         (ATH9K_ANI_CCK_NUM_LEVEL-3)
 104 #define ATH9K_ANI_CCK_DEF_LEVEL \
 105         2 /* default level - matches the INI settings */
 106
 107 static void ath9k_hw_update_mibstats(struct ath_hw *ah,
 108                                      struct ath9k_mib_stats *stats)
 109 {
 110         stats->ackrcv_bad += REG_READ(ah, AR_ACK_FAIL);
 111         stats->rts_bad += REG_READ(ah, AR_RTS_FAIL);
 112         stats->fcs_bad += REG_READ(ah, AR_FCS_FAIL);
 113         stats->rts_good += REG_READ(ah, AR_RTS_OK);
 114         stats->beacons += REG_READ(ah, AR_BEACON_CNT);
 115 }
 116
 117 static void ath9k_ani_restart(struct ath_hw *ah)
 118 {
 119         struct ar5416AniState *aniState;
 120
 121         if (!DO_ANI(ah))
 122                 return;
 123
 124         aniState = &ah->curchan->ani;
 125         aniState->listenTime = 0;
 126
 127         ENABLE_REGWRITE_BUFFER(ah);
 128
 129         REG_WRITE(ah, AR_PHY_ERR_1, 0);
 130         REG_WRITE(ah, AR_PHY_ERR_2, 0);
 131         REG_WRITE(ah, AR_PHY_ERR_MASK_1, AR_PHY_ERR_OFDM_TIMING);
 132         REG_WRITE(ah, AR_PHY_ERR_MASK_2, AR_PHY_ERR_CCK_TIMING);
 133
 134         REGWRITE_BUFFER_FLUSH(ah);
 135
 136         ath9k_hw_update_mibstats(ah, &ah->ah_mibStats);
 137
 138         aniState->ofdmPhyErrCount = 0;
 139         aniState->cckPhyErrCount = 0;
 140 }
 141
 142 /* Adjust the OFDM Noise Immunity Level */
 143 static void ath9k_hw_set_ofdm_nil(struct ath_hw *ah, u8 immunityLevel,
 144                                   bool scan)
 145 {
 146         struct ar5416AniState *aniState = &ah->curchan->ani;
 147         struct ath_common *common = ath9k_hw_common(ah);
 148         const struct ani_ofdm_level_entry *entry_ofdm;
 149         const struct ani_cck_level_entry *entry_cck;
 150         bool weak_sig;
 151
 152         ath_dbg(common, ANI, "**** ofdmlevel %d=>%d, rssi=%d[lo=%d hi=%d]\n",
 153                 aniState->ofdmNoiseImmunityLevel,
 154                 immunityLevel, BEACON_RSSI(ah),
 155                 aniState->rssiThrLow, aniState->rssiThrHigh);
 156
 157         if (!scan)
 158                 aniState->ofdmNoiseImmunityLevel = immunityLevel;
 159
 160         entry_ofdm = &ofdm_level_table[aniState->ofdmNoiseImmunityLevel];
 161         entry_cck = &cck_level_table[aniState->cckNoiseImmunityLevel];
 162
 163         if (aniState->spurImmunityLevel != entry_ofdm->spur_immunity_level)
 164                 ath9k_hw_ani_control(ah,
 165                                      ATH9K_ANI_SPUR_IMMUNITY_LEVEL,
 166                                      entry_ofdm->spur_immunity_level);
 167
 168         if (aniState->firstepLevel != entry_ofdm->fir_step_level &&
 169             entry_ofdm->fir_step_level >= entry_cck->fir_step_level)
 170                 ath9k_hw_ani_control(ah,
 171                                      ATH9K_ANI_FIRSTEP_LEVEL,
 172                                      entry_ofdm->fir_step_level);
 173
 174         weak_sig = entry_ofdm->ofdm_weak_signal_on;
 175         if (ah->opmode == NL80211_IFTYPE_STATION &&
 176             BEACON_RSSI(ah) <= aniState->rssiThrHigh)
 177                 weak_sig = true;
 178
 179         if (aniState->ofdmWeakSigDetect != weak_sig)
 180                         ath9k_hw_ani_control(ah,
 181                                 ATH9K_ANI_OFDM_WEAK_SIGNAL_DETECTION,
 182                                 entry_ofdm->ofdm_weak_signal_on);
 183
 184         if (aniState->ofdmNoiseImmunityLevel >= ATH9K_ANI_OFDM_DEF_LEVEL) {
 185                 ah->config.ofdm_trig_high = ATH9K_ANI_OFDM_TRIG_HIGH;
 186                 ah->config.ofdm_trig_low = ATH9K_ANI_OFDM_TRIG_LOW_ABOVE_INI;
 187         } else {
 188                 ah->config.ofdm_trig_high = ATH9K_ANI_OFDM_TRIG_HIGH_BELOW_INI;
 189                 ah->config.ofdm_trig_low = ATH9K_ANI_OFDM_TRIG_LOW;
 190         }
 191 }
 192
 193 static void ath9k_hw_ani_ofdm_err_trigger(struct ath_hw *ah)
 194 {
 195         struct ar5416AniState *aniState;
 196
 197         if (!DO_ANI(ah))
 198                 return;
 199
 200         aniState = &ah->curchan->ani;
 201
 202         if (aniState->ofdmNoiseImmunityLevel < ATH9K_ANI_OFDM_MAX_LEVEL)
 203                 ath9k_hw_set_ofdm_nil(ah, aniState->ofdmNoiseImmunityLevel + 1, false);
 204 }
 205
 206 /*
 207  * Set the ANI settings to match an CCK level.
 208  */
 209 static void ath9k_hw_set_cck_nil(struct ath_hw *ah, u_int8_t immunityLevel,
 210                                  bool scan)
 211 {
 212         struct ar5416AniState *aniState = &ah->curchan->ani;
 213         struct ath_common *common = ath9k_hw_common(ah);
 214         const struct ani_ofdm_level_entry *entry_ofdm;
 215         const struct ani_cck_level_entry *entry_cck;
 216
 217         ath_dbg(common, ANI, "**** ccklevel %d=>%d, rssi=%d[lo=%d hi=%d]\n",
 218                 aniState->cckNoiseImmunityLevel, immunityLevel,
 219                 BEACON_RSSI(ah), aniState->rssiThrLow,
 220                 aniState->rssiThrHigh);
 221
 222         if (ah->opmode == NL80211_IFTYPE_STATION &&
 223             BEACON_RSSI(ah) <= aniState->rssiThrLow &&
 224             immunityLevel > ATH9K_ANI_CCK_MAX_LEVEL_LOW_RSSI)
 225                 immunityLevel = ATH9K_ANI_CCK_MAX_LEVEL_LOW_RSSI;
 226
 227         if (!scan)
 228                 aniState->cckNoiseImmunityLevel = immunityLevel;
 229
 230         entry_ofdm = &ofdm_level_table[aniState->ofdmNoiseImmunityLevel];
 231         entry_cck = &cck_level_table[aniState->cckNoiseImmunityLevel];
 232
 233         if (aniState->firstepLevel != entry_cck->fir_step_level &&
 234             entry_cck->fir_step_level >= entry_ofdm->fir_step_level)
 235                 ath9k_hw_ani_control(ah,
 236                                      ATH9K_ANI_FIRSTEP_LEVEL,
 237                                      entry_cck->fir_step_level);
 238
 239         /* Skip MRC CCK for pre AR9003 families */
 240         if (!AR_SREV_9300_20_OR_LATER(ah) || AR_SREV_9485(ah))
 241                 return;
 242
 243         if (aniState->mrcCCK != entry_cck->mrc_cck_on)
 244                 ath9k_hw_ani_control(ah,
 245                                      ATH9K_ANI_MRC_CCK,
 246                                      entry_cck->mrc_cck_on);
 247 }
 248
 249 static void ath9k_hw_ani_cck_err_trigger(struct ath_hw *ah)
 250 {
 251         struct ar5416AniState *aniState;
 252
 253         if (!DO_ANI(ah))
 254                 return;
 255
 256         aniState = &ah->curchan->ani;
 257
 258         if (aniState->cckNoiseImmunityLevel < ATH9K_ANI_CCK_MAX_LEVEL)
 259                 ath9k_hw_set_cck_nil(ah, aniState->cckNoiseImmunityLevel + 1,
 260                                      false);
 261 }
 262
 263 /*
 264  * only lower either OFDM or CCK errors per turn
 265  * we lower the other one next time
 266  */
 267 static void ath9k_hw_ani_lower_immunity(struct ath_hw *ah)
 268 {
 269         struct ar5416AniState *aniState;
 270
 271         aniState = &ah->curchan->ani;
 272
 273         /* lower OFDM noise immunity */
 274         if (aniState->ofdmNoiseImmunityLevel > 0 &&
 275             (aniState->ofdmsTurn || aniState->cckNoiseImmunityLevel == 0)) {
 276                 ath9k_hw_set_ofdm_nil(ah, aniState->ofdmNoiseImmunityLevel - 1,
 277                                       false);
 278                 return;
 279         }
 280
 281         /* lower CCK noise immunity */
 282         if (aniState->cckNoiseImmunityLevel > 0)
 283                 ath9k_hw_set_cck_nil(ah, aniState->cckNoiseImmunityLevel - 1,
 284                                      false);
 285 }
 286
 287 /*
 288  * Restore the ANI parameters in the HAL and reset the statistics.
 289  * This routine should be called for every hardware reset and for
 290  * every channel change.
 291  */
 292 void ath9k_ani_reset(struct ath_hw *ah, bool is_scanning)
 293 {
 294         struct ar5416AniState *aniState = &ah->curchan->ani;
 295         struct ath9k_channel *chan = ah->curchan;
 296         struct ath_common *common = ath9k_hw_common(ah);
 297         int ofdm_nil, cck_nil;
 298
 299         if (!DO_ANI(ah))
 300                 return;
 301
 302         BUG_ON(aniState == NULL);
 303         ah->stats.ast_ani_reset++;
 304
 305         /* only allow a subset of functions in AP mode */
 306         if (ah->opmode == NL80211_IFTYPE_AP) {
 307                 if (IS_CHAN_2GHZ(chan)) {
 308                         ah->ani_function = (ATH9K_ANI_SPUR_IMMUNITY_LEVEL |
 309                                             ATH9K_ANI_FIRSTEP_LEVEL);
 310                         if (AR_SREV_9300_20_OR_LATER(ah))
 311                                 ah->ani_function |= ATH9K_ANI_MRC_CCK;
 312                 } else
 313                         ah->ani_function = 0;
 314         }
 315
 316         /* always allow mode (on/off) to be controlled */
 317         ah->ani_function |= ATH9K_ANI_MODE;
 318
 319         ofdm_nil = max_t(int, ATH9K_ANI_OFDM_DEF_LEVEL,
 320                          aniState->ofdmNoiseImmunityLevel);
 321         cck_nil = max_t(int, ATH9K_ANI_CCK_DEF_LEVEL,
 322                          aniState->cckNoiseImmunityLevel);
 323
 324         if (is_scanning ||
 325             (ah->opmode != NL80211_IFTYPE_STATION &&
 326              ah->opmode != NL80211_IFTYPE_ADHOC)) {
 327                 /*
 328                  * If we're scanning or in AP mode, the defaults (ini)
 329                  * should be in place. For an AP we assume the historical
 330                  * levels for this channel are probably outdated so start
 331                  * from defaults instead.
 332                  */
 333                 if (aniState->ofdmNoiseImmunityLevel !=
 334                     ATH9K_ANI_OFDM_DEF_LEVEL ||
 335                     aniState->cckNoiseImmunityLevel !=
 336                     ATH9K_ANI_CCK_DEF_LEVEL) {
 337                         ath_dbg(common, ANI,
 338                                 "Restore defaults: opmode %u chan %d Mhz/0x%x is_scanning=%d ofdm:%d cck:%d\n",
 339                                 ah->opmode,
 340                                 chan->channel,
 341                                 chan->channelFlags,
 342                                 is_scanning,
 343                                 aniState->ofdmNoiseImmunityLevel,
 344                                 aniState->cckNoiseImmunityLevel);
 345
 346                         ofdm_nil = ATH9K_ANI_OFDM_DEF_LEVEL;
 347                         cck_nil = ATH9K_ANI_CCK_DEF_LEVEL;
 348                 }
 349         } else {
 350                 /*
 351                  * restore historical levels for this channel
 352                  */
 353                 ath_dbg(common, ANI,
 354                         "Restore history: opmode %u chan %d Mhz/0x%x is_scanning=%d ofdm:%d cck:%d\n",
 355                         ah->opmode,
 356                         chan->channel,
 357                         chan->channelFlags,
 358                         is_scanning,
 359                         aniState->ofdmNoiseImmunityLevel,
 360                         aniState->cckNoiseImmunityLevel);
 361         }
 362         ath9k_hw_set_ofdm_nil(ah, ofdm_nil, is_scanning);
 363         ath9k_hw_set_cck_nil(ah, cck_nil, is_scanning);
 364
 365         /*
 366          * enable phy counters if hw supports or if not, enable phy
 367          * interrupts (so we can count each one)
 368          */
 369         ath9k_ani_restart(ah);
 370
 371         ENABLE_REGWRITE_BUFFER(ah);
 372
 373         REG_WRITE(ah, AR_PHY_ERR_MASK_1, AR_PHY_ERR_OFDM_TIMING);
 374         REG_WRITE(ah, AR_PHY_ERR_MASK_2, AR_PHY_ERR_CCK_TIMING);
 375
 376         REGWRITE_BUFFER_FLUSH(ah);
 377 }
 378
 379 static bool ath9k_hw_ani_read_counters(struct ath_hw *ah)
 380 {
 381         struct ath_common *common = ath9k_hw_common(ah);
 382         struct ar5416AniState *aniState = &ah->curchan->ani;
 383         u32 phyCnt1, phyCnt2;
 384         int32_t listenTime;
 385
 386         ath_hw_cycle_counters_update(common);
 387         listenTime = ath_hw_get_listen_time(common);
 388
 389         if (listenTime <= 0) {
 390                 ah->stats.ast_ani_lneg_or_lzero++;
 391                 ath9k_ani_restart(ah);
 392                 return false;
 393         }
 394
 395         aniState->listenTime += listenTime;
 396
 397         ath9k_hw_update_mibstats(ah, &ah->ah_mibStats);
 398
 399         phyCnt1 = REG_READ(ah, AR_PHY_ERR_1);
 400         phyCnt2 = REG_READ(ah, AR_PHY_ERR_2);
 401
 402         ah->stats.ast_ani_ofdmerrs += phyCnt1 - aniState->ofdmPhyErrCount;
 403         aniState->ofdmPhyErrCount = phyCnt1;
 404
 405         ah->stats.ast_ani_cckerrs += phyCnt2 - aniState->cckPhyErrCount;
 406         aniState->cckPhyErrCount = phyCnt2;
 407
 408         return true;
 409 }
 410
 411 void ath9k_hw_ani_monitor(struct ath_hw *ah, struct ath9k_channel *chan)
 412 {
 413         struct ar5416AniState *aniState;
 414         struct ath_common *common = ath9k_hw_common(ah);
 415         u32 ofdmPhyErrRate, cckPhyErrRate;
 416
 417         if (!DO_ANI(ah))
 418                 return;
 419
 420         aniState = &ah->curchan->ani;
 421         if (WARN_ON(!aniState))
 422                 return;
 423
 424         if (!ath9k_hw_ani_read_counters(ah))
 425                 return;
 426
 427         ofdmPhyErrRate = aniState->ofdmPhyErrCount * 1000 /
 428                          aniState->listenTime;
 429         cckPhyErrRate =  aniState->cckPhyErrCount * 1000 /
 430                          aniState->listenTime;
 431
 432         ath_dbg(common, ANI,
 433                 "listenTime=%d OFDM:%d errs=%d/s CCK:%d errs=%d/s ofdm_turn=%d\n",
 434                 aniState->listenTime,
 435                 aniState->ofdmNoiseImmunityLevel,
 436                 ofdmPhyErrRate, aniState->cckNoiseImmunityLevel,
 437                 cckPhyErrRate, aniState->ofdmsTurn);
 438
 439         if (aniState->listenTime > ah->aniperiod) {
 440                 if (cckPhyErrRate < ah->config.cck_trig_low &&
 441                     ofdmPhyErrRate < ah->config.ofdm_trig_low) {
 442                         ath9k_hw_ani_lower_immunity(ah);
 443                         aniState->ofdmsTurn = !aniState->ofdmsTurn;
 444                 } else if (ofdmPhyErrRate > ah->config.ofdm_trig_high) {
 445                         ath9k_hw_ani_ofdm_err_trigger(ah);
 446                         aniState->ofdmsTurn = false;
 447                 } else if (cckPhyErrRate > ah->config.cck_trig_high) {
 448                         ath9k_hw_ani_cck_err_trigger(ah);
 449                         aniState->ofdmsTurn = true;
 450                 }
 451                 ath9k_ani_restart(ah);
 452         }
 453 }
 454 EXPORT_SYMBOL(ath9k_hw_ani_monitor);
 455
 456 void ath9k_enable_mib_counters(struct ath_hw *ah)
 457 {
 458         struct ath_common *common = ath9k_hw_common(ah);
 459
 460         ath_dbg(common, ANI, "Enable MIB counters\n");
 461
 462         ath9k_hw_update_mibstats(ah, &ah->ah_mibStats);
 463
 464         ENABLE_REGWRITE_BUFFER(ah);
 465
 466         REG_WRITE(ah, AR_FILT_OFDM, 0);
 467         REG_WRITE(ah, AR_FILT_CCK, 0);
 468         REG_WRITE(ah, AR_MIBC,
 469                   ~(AR_MIBC_COW | AR_MIBC_FMC | AR_MIBC_CMC | AR_MIBC_MCS)
 470                   & 0x0f);
 471         REG_WRITE(ah, AR_PHY_ERR_MASK_1, AR_PHY_ERR_OFDM_TIMING);
 472         REG_WRITE(ah, AR_PHY_ERR_MASK_2, AR_PHY_ERR_CCK_TIMING);
 473
 474         REGWRITE_BUFFER_FLUSH(ah);
 475 }
 476
 477 /* Freeze the MIB counters, get the stats and then clear them */
 478 void ath9k_hw_disable_mib_counters(struct ath_hw *ah)
 479 {
 480         struct ath_common *common = ath9k_hw_common(ah);
 481
 482         ath_dbg(common, ANI, "Disable MIB counters\n");
 483
 484         REG_WRITE(ah, AR_MIBC, AR_MIBC_FMC);
 485         ath9k_hw_update_mibstats(ah, &ah->ah_mibStats);
 486         REG_WRITE(ah, AR_MIBC, AR_MIBC_CMC);
 487         REG_WRITE(ah, AR_FILT_OFDM, 0);
 488         REG_WRITE(ah, AR_FILT_CCK, 0);
 489 }
 490 EXPORT_SYMBOL(ath9k_hw_disable_mib_counters);
 491
 492 void ath9k_hw_ani_setup(struct ath_hw *ah)
 493 {
 494         int i;
 495
 496         static const int totalSizeDesired[] = { -55, -55, -55, -55, -62 };
 497         static const int coarseHigh[] = { -14, -14, -14, -14, -12 };
 498         static const int coarseLow[] = { -64, -64, -64, -64, -70 };
 499         static const int firpwr[] = { -78, -78, -78, -78, -80 };
 500
 501         for (i = 0; i < 5; i++) {
 502                 ah->totalSizeDesired[i] = totalSizeDesired[i];
 503                 ah->coarse_high[i] = coarseHigh[i];
 504                 ah->coarse_low[i] = coarseLow[i];
 505                 ah->firpwr[i] = firpwr[i];
 506         }
 507 }
 508
 509 void ath9k_hw_ani_init(struct ath_hw *ah)
 510 {
 511         struct ath_common *common = ath9k_hw_common(ah);
 512         int i;
 513
 514         ath_dbg(common, ANI, "Initialize ANI\n");
 515
 516         ah->config.ofdm_trig_high = ATH9K_ANI_OFDM_TRIG_HIGH;
 517         ah->config.ofdm_trig_low = ATH9K_ANI_OFDM_TRIG_LOW;
 518
 519         ah->config.cck_trig_high = ATH9K_ANI_CCK_TRIG_HIGH;
 520         ah->config.cck_trig_low = ATH9K_ANI_CCK_TRIG_LOW;
 521
 522         for (i = 0; i < ARRAY_SIZE(ah->channels); i++) {
 523                 struct ath9k_channel *chan = &ah->channels[i];
 524                 struct ar5416AniState *ani = &chan->ani;
 525
 526                 ani->spurImmunityLevel = ATH9K_ANI_SPUR_IMMUNE_LVL;
 527
 528                 ani->firstepLevel = ATH9K_ANI_FIRSTEP_LVL;
 529
 530                 ani->mrcCCK = AR_SREV_9300_20_OR_LATER(ah) ? true : false;
 531
 532                 ani->ofdmsTurn = true;
 533
 534                 ani->rssiThrHigh = ATH9K_ANI_RSSI_THR_HIGH;
 535                 ani->rssiThrLow = ATH9K_ANI_RSSI_THR_LOW;
 536                 ani->ofdmWeakSigDetect = ATH9K_ANI_USE_OFDM_WEAK_SIG;
 537                 ani->cckNoiseImmunityLevel = ATH9K_ANI_CCK_DEF_LEVEL;
 538                 ani->ofdmNoiseImmunityLevel = ATH9K_ANI_OFDM_DEF_LEVEL;
 539         }
 540
 541         /*
 542          * since we expect some ongoing maintenance on the tables, let's sanity
 543          * check here default level should not modify INI setting.
 544          */
 545         ah->aniperiod = ATH9K_ANI_PERIOD;
 546         ah->config.ani_poll_interval = ATH9K_ANI_POLLINTERVAL;
 547
 548         if (ah->config.enable_ani)
 549                 ah->proc_phyerr |= HAL_PROCESS_ANI;
 550
 551         ath9k_ani_restart(ah);
 552         ath9k_enable_mib_counters(ah);
 553 }