2 * Copyright (c) 2008-2011 Atheros Communications Inc.
4 * Permission to use, copy, modify, and/or distribute this software for any
5 * purpose with or without fee is hereby granted, provided that the above
6 * copyright notice and this permission notice appear in all copies.
8 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
9 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
10 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
11 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
12 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
13 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
14 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
20 #include <linux/etherdevice.h>
21 #include <linux/device.h>
22 #include <linux/interrupt.h>
23 #include <linux/leds.h>
24 #include <linux/completion.h>
32 * Header for the ath9k.ko driver core *only* -- hw code nor any other driver
33 * should rely on this file or its contents.
38 /* Macro to expand scalars to 64-bit objects */
40 #define ito64(x) (sizeof(x) == 1) ? \
41 (((unsigned long long int)(x)) & (0xff)) : \
43 (((unsigned long long int)(x)) & 0xffff) : \
45 (((unsigned long long int)(x)) & 0xffffffff) : \
46 (unsigned long long int)(x))
48 /* increment with wrap-around */
49 #define INCR(_l, _sz) do { \
51 (_l) &= ((_sz) - 1); \
54 /* decrement with wrap-around */
55 #define DECR(_l, _sz) do { \
57 (_l) &= ((_sz) - 1); \
60 #define TSF_TO_TU(_h,_l) \
61 ((((u32)(_h)) << 22) | (((u32)(_l)) >> 10))
63 #define ATH_TXQ_SETUP(sc, i) ((sc)->tx.txqsetup & (1<<i))
70 /*************************/
71 /* Descriptor Management */
72 /*************************/
74 #define ATH_TXBUF_RESET(_bf) do { \
75 (_bf)->bf_stale = false; \
76 (_bf)->bf_lastbf = NULL; \
77 (_bf)->bf_next = NULL; \
78 memset(&((_bf)->bf_state), 0, \
79 sizeof(struct ath_buf_state)); \
82 #define ATH_RXBUF_RESET(_bf) do { \
83 (_bf)->bf_stale = false; \
87 * enum buffer_type - Buffer type flags
89 * @BUF_AMPDU: This buffer is an ampdu, as part of an aggregate (during TX)
90 * @BUF_AGGR: Indicates whether the buffer can be aggregated
91 * (used in aggregation scheduling)
98 #define bf_isampdu(bf) (bf->bf_state.bf_type & BUF_AMPDU)
99 #define bf_isaggr(bf) (bf->bf_state.bf_type & BUF_AGGR)
101 #define ATH_TXSTATUS_RING_SIZE 512
103 #define DS2PHYS(_dd, _ds) \
104 ((_dd)->dd_desc_paddr + ((caddr_t)(_ds) - (caddr_t)(_dd)->dd_desc))
105 #define ATH_DESC_4KB_BOUND_CHECK(_daddr) ((((_daddr) & 0xFFF) > 0xF7F) ? 1 : 0)
106 #define ATH_DESC_4KB_BOUND_NUM_SKIPPED(_len) ((_len) / 4096)
110 dma_addr_t dd_desc_paddr
;
112 struct ath_buf
*dd_bufptr
;
115 int ath_descdma_setup(struct ath_softc
*sc
, struct ath_descdma
*dd
,
116 struct list_head
*head
, const char *name
,
117 int nbuf
, int ndesc
, bool is_tx
);
118 void ath_descdma_cleanup(struct ath_softc
*sc
, struct ath_descdma
*dd
,
119 struct list_head
*head
);
125 #define ATH_RXBUF 512
126 #define ATH_TXBUF 512
127 #define ATH_TXBUF_RESERVE 5
128 #define ATH_MAX_QDEPTH (ATH_TXBUF / 4 - ATH_TXBUF_RESERVE)
129 #define ATH_TXMAXTRY 13
131 #define TID_TO_WME_AC(_tid) \
132 ((((_tid) == 0) || ((_tid) == 3)) ? WME_AC_BE : \
133 (((_tid) == 1) || ((_tid) == 2)) ? WME_AC_BK : \
134 (((_tid) == 4) || ((_tid) == 5)) ? WME_AC_VI : \
137 #define ATH_AGGR_DELIM_SZ 4
138 #define ATH_AGGR_MINPLEN 256 /* in bytes, minimum packet length */
139 /* number of delimiters for encryption padding */
140 #define ATH_AGGR_ENCRYPTDELIM 10
141 /* minimum h/w qdepth to be sustained to maximize aggregation */
142 #define ATH_AGGR_MIN_QDEPTH 2
143 #define ATH_AMPDU_SUBFRAME_DEFAULT 32
145 #define IEEE80211_SEQ_SEQ_SHIFT 4
146 #define IEEE80211_SEQ_MAX 4096
147 #define IEEE80211_WEP_IVLEN 3
148 #define IEEE80211_WEP_KIDLEN 1
149 #define IEEE80211_WEP_CRCLEN 4
150 #define IEEE80211_MAX_MPDU_LEN (3840 + FCS_LEN + \
151 (IEEE80211_WEP_IVLEN + \
152 IEEE80211_WEP_KIDLEN + \
153 IEEE80211_WEP_CRCLEN))
155 /* return whether a bit at index _n in bitmap _bm is set
156 * _sz is the size of the bitmap */
157 #define ATH_BA_ISSET(_bm, _n) (((_n) < (WME_BA_BMP_SIZE)) && \
158 ((_bm)[(_n) >> 5] & (1 << ((_n) & 31))))
160 /* return block-ack bitmap index given sequence and starting sequence */
161 #define ATH_BA_INDEX(_st, _seq) (((_seq) - (_st)) & (IEEE80211_SEQ_MAX - 1))
163 /* return the seqno for _start + _offset */
164 #define ATH_BA_INDEX2SEQ(_seq, _offset) (((_seq) + (_offset)) & (IEEE80211_SEQ_MAX - 1))
166 /* returns delimiter padding required given the packet length */
167 #define ATH_AGGR_GET_NDELIM(_len) \
168 (((_len) >= ATH_AGGR_MINPLEN) ? 0 : \
169 DIV_ROUND_UP(ATH_AGGR_MINPLEN - (_len), ATH_AGGR_DELIM_SZ))
171 #define BAW_WITHIN(_start, _bawsz, _seqno) \
172 ((((_seqno) - (_start)) & 4095) < (_bawsz))
174 #define ATH_AN_2_TID(_an, _tidno) (&(_an)->tid[(_tidno)])
176 #define ATH_TX_COMPLETE_POLL_INT 1000
178 enum ATH_AGGR_STATUS
{
184 #define ATH_TXFIFO_DEPTH 8
186 int mac80211_qnum
; /* mac80211 queue number, -1 means not mac80211 Q */
187 u32 axq_qnum
; /* ath9k hardware queue number */
189 struct list_head axq_q
;
194 bool axq_tx_inprogress
;
195 struct list_head axq_acq
;
196 struct list_head txq_fifo
[ATH_TXFIFO_DEPTH
];
200 struct sk_buff_head complete_q
;
206 struct list_head list
;
207 struct list_head tid_q
;
208 bool clear_ps_filter
;
211 struct ath_frame_info
{
214 enum ath9k_key_type keytype
;
220 struct ath_buf_state
{
225 unsigned long bfs_paprd_timestamp
;
229 struct list_head list
;
230 struct ath_buf
*bf_lastbf
; /* last buf of this unit (a frame or
232 struct ath_buf
*bf_next
; /* next subframe in the aggregate */
233 struct sk_buff
*bf_mpdu
; /* enclosing frame structure */
234 void *bf_desc
; /* virtual addr of desc */
235 dma_addr_t bf_daddr
; /* physical addr of desc */
236 dma_addr_t bf_buf_addr
; /* physical addr of data buffer, for DMA */
238 struct ath_buf_state bf_state
;
242 struct list_head list
;
243 struct sk_buff_head buf_q
;
245 struct ath_atx_ac
*ac
;
246 unsigned long tx_buf
[BITS_TO_LONGS(ATH_TID_MAX_BUFS
)];
252 int baw_head
; /* first un-acked tx buffer */
253 int baw_tail
; /* next unused tx buffer slot */
260 #ifdef CONFIG_ATH9K_DEBUGFS
261 struct list_head list
; /* for sc->nodes */
263 struct ieee80211_sta
*sta
; /* station struct we're part of */
264 struct ieee80211_vif
*vif
; /* interface with which we're associated */
265 struct ath_atx_tid tid
[WME_NUM_TID
];
266 struct ath_atx_ac ac
[WME_NUM_AC
];
275 #define AGGR_CLEANUP BIT(1)
276 #define AGGR_ADDBA_COMPLETE BIT(2)
277 #define AGGR_ADDBA_PROGRESS BIT(3)
279 struct ath_tx_control
{
285 #define ATH_TX_ERROR 0x01
288 * @txq_map: Index is mac80211 queue number. This is
289 * not necessarily the same as the hardware queue number
295 spinlock_t txbuflock
;
296 struct list_head txbuf
;
297 struct ath_txq txq
[ATH9K_NUM_TX_QUEUES
];
298 struct ath_descdma txdma
;
299 struct ath_txq
*txq_map
[WME_NUM_AC
];
303 struct sk_buff_head rx_fifo
;
312 unsigned int rxfilter
;
313 spinlock_t rxbuflock
;
314 struct list_head rxbuf
;
315 struct ath_descdma rxdma
;
316 struct ath_buf
*rx_bufptr
;
317 struct ath_rx_edma rx_edma
[ATH9K_RX_QUEUE_MAX
];
319 struct sk_buff
*frag
;
322 int ath_startrecv(struct ath_softc
*sc
);
323 bool ath_stoprecv(struct ath_softc
*sc
);
324 void ath_flushrecv(struct ath_softc
*sc
);
325 u32
ath_calcrxfilter(struct ath_softc
*sc
);
326 int ath_rx_init(struct ath_softc
*sc
, int nbufs
);
327 void ath_rx_cleanup(struct ath_softc
*sc
);
328 int ath_rx_tasklet(struct ath_softc
*sc
, int flush
, bool hp
);
329 struct ath_txq
*ath_txq_setup(struct ath_softc
*sc
, int qtype
, int subtype
);
330 void ath_txq_lock(struct ath_softc
*sc
, struct ath_txq
*txq
);
331 void ath_txq_unlock(struct ath_softc
*sc
, struct ath_txq
*txq
);
332 void ath_txq_unlock_complete(struct ath_softc
*sc
, struct ath_txq
*txq
);
333 void ath_tx_cleanupq(struct ath_softc
*sc
, struct ath_txq
*txq
);
334 bool ath_drain_all_txq(struct ath_softc
*sc
, bool retry_tx
);
335 void ath_draintxq(struct ath_softc
*sc
,
336 struct ath_txq
*txq
, bool retry_tx
);
337 void ath_tx_node_init(struct ath_softc
*sc
, struct ath_node
*an
);
338 void ath_tx_node_cleanup(struct ath_softc
*sc
, struct ath_node
*an
);
339 void ath_txq_schedule(struct ath_softc
*sc
, struct ath_txq
*txq
);
340 int ath_tx_init(struct ath_softc
*sc
, int nbufs
);
341 void ath_tx_cleanup(struct ath_softc
*sc
);
342 int ath_txq_update(struct ath_softc
*sc
, int qnum
,
343 struct ath9k_tx_queue_info
*q
);
344 int ath_tx_start(struct ieee80211_hw
*hw
, struct sk_buff
*skb
,
345 struct ath_tx_control
*txctl
);
346 void ath_tx_tasklet(struct ath_softc
*sc
);
347 void ath_tx_edma_tasklet(struct ath_softc
*sc
);
348 int ath_tx_aggr_start(struct ath_softc
*sc
, struct ieee80211_sta
*sta
,
350 void ath_tx_aggr_stop(struct ath_softc
*sc
, struct ieee80211_sta
*sta
, u16 tid
);
351 void ath_tx_aggr_resume(struct ath_softc
*sc
, struct ieee80211_sta
*sta
, u16 tid
);
353 void ath_tx_aggr_wakeup(struct ath_softc
*sc
, struct ath_node
*an
);
354 void ath_tx_aggr_sleep(struct ieee80211_sta
*sta
, struct ath_softc
*sc
,
355 struct ath_node
*an
);
363 bool is_bslot_active
, primary_sta_vif
;
364 __le64 tsf_adjust
; /* TSF adjustment for staggered beacons */
365 struct ath_buf
*av_bcbuf
;
368 /*******************/
369 /* Beacon Handling */
370 /*******************/
373 * Regardless of the number of beacons we stagger, (i.e. regardless of the
374 * number of BSSIDs) if a given beacon does not go out even after waiting this
375 * number of beacon intervals, the game's up.
377 #define BSTUCK_THRESH 9
379 #define ATH_DEFAULT_BINTVAL 100 /* TU */
380 #define ATH_DEFAULT_BMISS_LIMIT 10
381 #define IEEE80211_MS_TO_TU(x) (((x) * 1000) / 1024)
383 struct ath_beacon_config
{
393 OK
, /* no change needed */
394 UPDATE
, /* update pending */
395 COMMIT
/* beacon sent, commit change */
396 } updateslot
; /* slot time update fsm */
402 struct ieee80211_vif
*bslot
[ATH_BCBUF
];
405 struct ath9k_tx_queue_info beacon_qi
;
406 struct ath_descdma bdma
;
407 struct ath_txq
*cabq
;
408 struct list_head bbuf
;
414 void ath_beacon_tasklet(unsigned long data
);
415 void ath_beacon_config(struct ath_softc
*sc
, struct ieee80211_vif
*vif
);
416 int ath_beacon_alloc(struct ath_softc
*sc
, struct ieee80211_vif
*vif
);
417 void ath_beacon_return(struct ath_softc
*sc
, struct ath_vif
*avp
);
418 int ath_beaconq_config(struct ath_softc
*sc
);
419 void ath_set_beacon(struct ath_softc
*sc
);
420 void ath9k_set_beaconing_status(struct ath_softc
*sc
, bool status
);
422 /*******************/
423 /* Link Monitoring */
424 /*******************/
426 #define ATH_STA_SHORT_CALINTERVAL 1000 /* 1 second */
427 #define ATH_AP_SHORT_CALINTERVAL 100 /* 100 ms */
428 #define ATH_ANI_POLLINTERVAL_OLD 100 /* 100 ms */
429 #define ATH_ANI_POLLINTERVAL_NEW 1000 /* 1000 ms */
430 #define ATH_LONG_CALINTERVAL_INT 1000 /* 1000 ms */
431 #define ATH_LONG_CALINTERVAL 30000 /* 30 seconds */
432 #define ATH_RESTART_CALINTERVAL 1200000 /* 20 minutes */
434 #define ATH_PAPRD_TIMEOUT 100 /* msecs */
435 #define ATH_PLL_WORK_INTERVAL 100
437 void ath_tx_complete_poll_work(struct work_struct
*work
);
438 void ath_reset_work(struct work_struct
*work
);
439 void ath_hw_check(struct work_struct
*work
);
440 void ath_hw_pll_work(struct work_struct
*work
);
441 void ath_rx_poll(unsigned long data
);
442 void ath_start_rx_poll(struct ath_softc
*sc
, u8 nbeacon
);
443 void ath_paprd_calibrate(struct work_struct
*work
);
444 void ath_ani_calibrate(unsigned long data
);
445 void ath_start_ani(struct ath_common
*common
);
446 int ath_update_survey_stats(struct ath_softc
*sc
);
447 void ath_update_survey_nf(struct ath_softc
*sc
, int channel
);
454 BT_OP_PRIORITY_DETECTED
,
459 bool hw_timer_enabled
;
460 spinlock_t btcoex_lock
;
461 struct timer_list period_timer
; /* Timer for BT period */
463 unsigned long bt_priority_time
;
464 unsigned long op_flags
;
465 int bt_stomp_type
; /* Types of BT stomping */
466 u32 btcoex_no_stomp
; /* in usec */
467 u32 btcoex_period
; /* in usec */
468 u32 btscan_no_stomp
; /* in usec */
471 struct ath_gen_timer
*no_stomp_timer
; /* Timer for no BT stomping */
472 struct ath_mci_profile mci
;
475 #ifdef CONFIG_ATH9K_BTCOEX_SUPPORT
476 int ath9k_init_btcoex(struct ath_softc
*sc
);
477 void ath9k_deinit_btcoex(struct ath_softc
*sc
);
478 void ath9k_start_btcoex(struct ath_softc
*sc
);
479 void ath9k_stop_btcoex(struct ath_softc
*sc
);
480 void ath9k_btcoex_timer_resume(struct ath_softc
*sc
);
481 void ath9k_btcoex_timer_pause(struct ath_softc
*sc
);
482 void ath9k_btcoex_handle_interrupt(struct ath_softc
*sc
, u32 status
);
483 u16
ath9k_btcoex_aggr_limit(struct ath_softc
*sc
, u32 max_4ms_framelen
);
484 void ath9k_btcoex_stop_gen_timer(struct ath_softc
*sc
);
486 static inline int ath9k_init_btcoex(struct ath_softc
*sc
)
490 static inline void ath9k_deinit_btcoex(struct ath_softc
*sc
)
493 static inline void ath9k_start_btcoex(struct ath_softc
*sc
)
496 static inline void ath9k_stop_btcoex(struct ath_softc
*sc
)
499 static inline void ath9k_btcoex_handle_interrupt(struct ath_softc
*sc
,
503 static inline u16
ath9k_btcoex_aggr_limit(struct ath_softc
*sc
,
504 u32 max_4ms_framelen
)
508 static inline void ath9k_btcoex_stop_gen_timer(struct ath_softc
*sc
)
511 #endif /* CONFIG_ATH9K_BTCOEX_SUPPORT */
513 struct ath9k_wow_pattern
{
514 u8 pattern_bytes
[MAX_PATTERN_SIZE
];
515 u8 mask_bytes
[MAX_PATTERN_SIZE
];
519 /********************/
521 /********************/
523 #define ATH_LED_PIN_DEF 1
524 #define ATH_LED_PIN_9287 8
525 #define ATH_LED_PIN_9300 10
526 #define ATH_LED_PIN_9485 6
527 #define ATH_LED_PIN_9462 4
529 #ifdef CONFIG_MAC80211_LEDS
530 void ath_init_leds(struct ath_softc
*sc
);
531 void ath_deinit_leds(struct ath_softc
*sc
);
533 static inline void ath_init_leds(struct ath_softc
*sc
)
537 static inline void ath_deinit_leds(struct ath_softc
*sc
)
542 /*******************************/
543 /* Antenna diversity/combining */
544 /*******************************/
546 #define ATH_ANT_RX_CURRENT_SHIFT 4
547 #define ATH_ANT_RX_MAIN_SHIFT 2
548 #define ATH_ANT_RX_MASK 0x3
550 #define ATH_ANT_DIV_COMB_SHORT_SCAN_INTR 50
551 #define ATH_ANT_DIV_COMB_SHORT_SCAN_PKTCOUNT 0x100
552 #define ATH_ANT_DIV_COMB_MAX_PKTCOUNT 0x200
553 #define ATH_ANT_DIV_COMB_INIT_COUNT 95
554 #define ATH_ANT_DIV_COMB_MAX_COUNT 100
555 #define ATH_ANT_DIV_COMB_ALT_ANT_RATIO 30
556 #define ATH_ANT_DIV_COMB_ALT_ANT_RATIO2 20
558 #define ATH_ANT_DIV_COMB_LNA1_LNA2_SWITCH_DELTA -1
559 #define ATH_ANT_DIV_COMB_LNA1_DELTA_HI -4
560 #define ATH_ANT_DIV_COMB_LNA1_DELTA_MID -2
561 #define ATH_ANT_DIV_COMB_LNA1_DELTA_LOW 2
563 enum ath9k_ant_div_comb_lna_conf
{
564 ATH_ANT_DIV_COMB_LNA1_MINUS_LNA2
,
565 ATH_ANT_DIV_COMB_LNA2
,
566 ATH_ANT_DIV_COMB_LNA1
,
567 ATH_ANT_DIV_COMB_LNA1_PLUS_LNA2
,
570 struct ath_ant_comb
{
589 enum ath9k_ant_div_comb_lna_conf first_quick_scan_conf
;
590 enum ath9k_ant_div_comb_lna_conf second_quick_scan_conf
;
595 unsigned long scan_start_time
;
598 void ath_ant_comb_scan(struct ath_softc
*sc
, struct ath_rx_status
*rs
);
599 void ath_ant_comb_update(struct ath_softc
*sc
);
601 /********************/
602 /* Main driver core */
603 /********************/
606 * Default cache line size, in bytes.
607 * Used when PCI device not fully initialized by bootrom/BIOS
609 #define DEFAULT_CACHELINE 32
610 #define ATH_REGCLASSIDS_MAX 10
611 #define ATH_CABQ_READY_TIME 80 /* % of beacon interval */
612 #define ATH_MAX_SW_RETRIES 30
613 #define ATH_CHAN_MAX 255
615 #define ATH_TXPOWER_MAX 100 /* .5 dBm units */
616 #define ATH_RATE_DUMMY_MARKER 0
628 /* Powersave flags */
629 #define PS_WAIT_FOR_BEACON BIT(0)
630 #define PS_WAIT_FOR_CAB BIT(1)
631 #define PS_WAIT_FOR_PSPOLL_DATA BIT(2)
632 #define PS_WAIT_FOR_TX_ACK BIT(3)
633 #define PS_BEACON_SYNC BIT(4)
635 struct ath_rate_table
;
637 struct ath9k_vif_iter_data
{
638 const u8
*hw_macaddr
; /* phy's hardware address, set
639 * before starting iteration for
642 u8 mask
[ETH_ALEN
]; /* bssid mask */
643 int naps
; /* number of AP vifs */
644 int nmeshes
; /* number of mesh vifs */
645 int nstations
; /* number of station vifs */
646 int nwds
; /* number of WDS vifs */
647 int nadhocs
; /* number of adhoc vifs */
651 struct ieee80211_hw
*hw
;
654 struct survey_info
*cur_survey
;
655 struct survey_info survey
[ATH9K_NUM_CHANNELS
];
657 struct tasklet_struct intr_tq
;
658 struct tasklet_struct bcon_tasklet
;
659 struct ath_hw
*sc_ah
;
662 spinlock_t sc_serial_rw
;
663 spinlock_t sc_pm_lock
;
664 spinlock_t sc_pcu_lock
;
666 struct work_struct paprd_work
;
667 struct work_struct hw_check_work
;
668 struct work_struct hw_reset_work
;
669 struct completion paprd_complete
;
671 unsigned int hw_busy_count
;
672 unsigned long sc_flags
;
675 u16 ps_flags
; /* PS_* */
681 unsigned long ps_usecount
;
683 struct ath_config config
;
686 struct ath_beacon beacon
;
687 struct ieee80211_supported_band sbands
[IEEE80211_NUM_BANDS
];
689 #ifdef CONFIG_MAC80211_LEDS
692 struct led_classdev led_cdev
;
695 struct ath9k_hw_cal_data caldata
;
698 #ifdef CONFIG_ATH9K_DEBUGFS
699 struct ath9k_debug debug
;
700 spinlock_t nodes_lock
;
701 struct list_head nodes
; /* basically, stations */
702 unsigned int tx_complete_poll_work_seen
;
704 struct ath_beacon_config cur_beacon_conf
;
705 struct delayed_work tx_complete_work
;
706 struct delayed_work hw_pll_work
;
707 struct timer_list rx_poll_timer
;
709 #ifdef CONFIG_ATH9K_BTCOEX_SUPPORT
710 struct ath_btcoex btcoex
;
711 struct ath_mci_coex mci_coex
;
712 struct work_struct mci_work
;
715 struct ath_descdma txsdma
;
717 struct ath_ant_comb ant_comb
;
719 struct dfs_pattern_detector
*dfs_detector
;
722 #ifdef CONFIG_PM_SLEEP
723 atomic_t wow_got_bmiss_intr
;
724 atomic_t wow_sleep_proc_intr
; /* in the middle of WoW sleep ? */
725 u32 wow_intr_before_sleep
;
729 void ath9k_tasklet(unsigned long data
);
730 int ath_cabq_update(struct ath_softc
*);
732 static inline void ath_read_cachesize(struct ath_common
*common
, int *csz
)
734 common
->bus_ops
->read_cachesize(common
, csz
);
737 extern struct ieee80211_ops ath9k_ops
;
738 extern int ath9k_modparam_nohwcrypt
;
739 extern int led_blink
;
740 extern bool is_ath9k_unloaded
;
742 u8
ath9k_parse_mpdudensity(u8 mpdudensity
);
743 irqreturn_t
ath_isr(int irq
, void *dev
);
744 int ath9k_init_device(u16 devid
, struct ath_softc
*sc
,
745 const struct ath_bus_ops
*bus_ops
);
746 void ath9k_deinit_device(struct ath_softc
*sc
);
747 void ath9k_set_hw_capab(struct ath_softc
*sc
, struct ieee80211_hw
*hw
);
748 void ath9k_reload_chainmask_settings(struct ath_softc
*sc
);
750 bool ath9k_uses_beacons(int type
);
752 #ifdef CONFIG_ATH9K_PCI
753 int ath_pci_init(void);
754 void ath_pci_exit(void);
756 static inline int ath_pci_init(void) { return 0; };
757 static inline void ath_pci_exit(void) {};
760 #ifdef CONFIG_ATH9K_AHB
761 int ath_ahb_init(void);
762 void ath_ahb_exit(void);
764 static inline int ath_ahb_init(void) { return 0; };
765 static inline void ath_ahb_exit(void) {};
768 void ath9k_ps_wakeup(struct ath_softc
*sc
);
769 void ath9k_ps_restore(struct ath_softc
*sc
);
771 u8
ath_txchainmask_reduction(struct ath_softc
*sc
, u8 chainmask
, u32 rate
);
773 void ath_start_rfkill_poll(struct ath_softc
*sc
);
774 extern void ath9k_rfkill_poll_state(struct ieee80211_hw
*hw
);
775 void ath9k_calculate_iter_data(struct ieee80211_hw
*hw
,
776 struct ieee80211_vif
*vif
,
777 struct ath9k_vif_iter_data
*iter_data
);