drivers/net/wireless/ath/ath9k/ath9k.h

   1 /*
   2  * Copyright (c) 2008-2009 Atheros Communications Inc.
   3  *
   4  * Permission to use, copy, modify, and/or distribute this software for any
   5  * purpose with or without fee is hereby granted, provided that the above
   6  * copyright notice and this permission notice appear in all copies.
   7  *
   8  * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
   9  * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
  10  * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
  11  * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
  12  * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
  13  * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
  14  * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
  15  */
  16
  17 #ifndef ATH9K_H
  18 #define ATH9K_H
  19
  20 #include <linux/etherdevice.h>
  21 #include <linux/device.h>
  22 #include <linux/leds.h>
  23
  24 #include "debug.h"
  25 #include "common.h"
  26
  27 /*
  28  * Header for the ath9k.ko driver core *only* -- hw code nor any other driver
  29  * should rely on this file or its contents.
  30  */
  31
  32 struct ath_node;
  33
  34 /* Macro to expand scalars to 64-bit objects */
  35
  36 #define ito64(x) (sizeof(x) == 1) ?                     \
  37         (((unsigned long long int)(x)) & (0xff)) :      \
  38         (sizeof(x) == 2) ?                              \
  39         (((unsigned long long int)(x)) & 0xffff) :      \
  40         ((sizeof(x) == 4) ?                             \
  41          (((unsigned long long int)(x)) & 0xffffffff) : \
  42          (unsigned long long int)(x))
  43
  44 /* increment with wrap-around */
  45 #define INCR(_l, _sz)   do {                    \
  46                 (_l)++;                         \
  47                 (_l) &= ((_sz) - 1);            \
  48         } while (0)
  49
  50 /* decrement with wrap-around */
  51 #define DECR(_l,  _sz)  do {                    \
  52                 (_l)--;                         \
  53                 (_l) &= ((_sz) - 1);            \
  54         } while (0)
  55
  56 #define A_MAX(a, b) ((a) > (b) ? (a) : (b))
  57
  58 #define TSF_TO_TU(_h,_l) \
  59         ((((u32)(_h)) << 22) | (((u32)(_l)) >> 10))
  60
  61 #define ATH_TXQ_SETUP(sc, i)        ((sc)->tx.txqsetup & (1<<i))
  62
  63 struct ath_config {
  64         u32 ath_aggr_prot;
  65         u16 txpowlimit;
  66         u8 cabqReadytime;
  67 };
  68
  69 /*************************/
  70 /* Descriptor Management */
  71 /*************************/
  72
  73 #define ATH_TXBUF_RESET(_bf) do {                               \
  74                 (_bf)->bf_stale = false;                        \
  75                 (_bf)->bf_lastbf = NULL;                        \
  76                 (_bf)->bf_next = NULL;                          \
  77                 memset(&((_bf)->bf_state), 0,                   \
  78                        sizeof(struct ath_buf_state));           \
  79         } while (0)
  80
  81 #define ATH_RXBUF_RESET(_bf) do {               \
  82                 (_bf)->bf_stale = false;        \
  83         } while (0)
  84
  85 /**
  86  * enum buffer_type - Buffer type flags
  87  *
  88  * @BUF_HT: Send this buffer using HT capabilities
  89  * @BUF_AMPDU: This buffer is an ampdu, as part of an aggregate (during TX)
  90  * @BUF_AGGR: Indicates whether the buffer can be aggregated
  91  *      (used in aggregation scheduling)
  92  * @BUF_RETRY: Indicates whether the buffer is retried
  93  * @BUF_XRETRY: To denote excessive retries of the buffer
  94  */
  95 enum buffer_type {
  96         BUF_HT                  = BIT(1),
  97         BUF_AMPDU               = BIT(2),
  98         BUF_AGGR                = BIT(3),
  99         BUF_RETRY               = BIT(4),
 100         BUF_XRETRY              = BIT(5),
 101 };
 102
 103 #define bf_nframes              bf_state.bfs_nframes
 104 #define bf_al                   bf_state.bfs_al
 105 #define bf_frmlen               bf_state.bfs_frmlen
 106 #define bf_retries              bf_state.bfs_retries
 107 #define bf_seqno                bf_state.bfs_seqno
 108 #define bf_tidno                bf_state.bfs_tidno
 109 #define bf_keyix                bf_state.bfs_keyix
 110 #define bf_keytype              bf_state.bfs_keytype
 111 #define bf_isht(bf)             (bf->bf_state.bf_type & BUF_HT)
 112 #define bf_isampdu(bf)          (bf->bf_state.bf_type & BUF_AMPDU)
 113 #define bf_isaggr(bf)           (bf->bf_state.bf_type & BUF_AGGR)
 114 #define bf_isretried(bf)        (bf->bf_state.bf_type & BUF_RETRY)
 115 #define bf_isxretried(bf)       (bf->bf_state.bf_type & BUF_XRETRY)
 116
 117 struct ath_descdma {
 118         struct ath_desc *dd_desc;
 119         dma_addr_t dd_desc_paddr;
 120         u32 dd_desc_len;
 121         struct ath_buf *dd_bufptr;
 122 };
 123
 124 int ath_descdma_setup(struct ath_softc *sc, struct ath_descdma *dd,
 125                       struct list_head *head, const char *name,
 126                       int nbuf, int ndesc);
 127 void ath_descdma_cleanup(struct ath_softc *sc, struct ath_descdma *dd,
 128                          struct list_head *head);
 129
 130 /***********/
 131 /* RX / TX */
 132 /***********/
 133
 134 #define ATH_MAX_ANTENNA         3
 135 #define ATH_RXBUF               512
 136 #define ATH_TXBUF               512
 137 #define ATH_TXMAXTRY            13
 138 #define ATH_MGT_TXMAXTRY        4
 139
 140 #define TID_TO_WME_AC(_tid)                             \
 141         ((((_tid) == 0) || ((_tid) == 3)) ? WME_AC_BE : \
 142          (((_tid) == 1) || ((_tid) == 2)) ? WME_AC_BK : \
 143          (((_tid) == 4) || ((_tid) == 5)) ? WME_AC_VI : \
 144          WME_AC_VO)
 145
 146 #define ADDBA_EXCHANGE_ATTEMPTS    10
 147 #define ATH_AGGR_DELIM_SZ          4
 148 #define ATH_AGGR_MINPLEN           256 /* in bytes, minimum packet length */
 149 /* number of delimiters for encryption padding */
 150 #define ATH_AGGR_ENCRYPTDELIM      10
 151 /* minimum h/w qdepth to be sustained to maximize aggregation */
 152 #define ATH_AGGR_MIN_QDEPTH        2
 153 #define ATH_AMPDU_SUBFRAME_DEFAULT 32
 154
 155 #define IEEE80211_SEQ_SEQ_SHIFT    4
 156 #define IEEE80211_SEQ_MAX          4096
 157 #define IEEE80211_WEP_IVLEN        3
 158 #define IEEE80211_WEP_KIDLEN       1
 159 #define IEEE80211_WEP_CRCLEN       4
 160 #define IEEE80211_MAX_MPDU_LEN     (3840 + FCS_LEN +            \
 161                                     (IEEE80211_WEP_IVLEN +      \
 162                                      IEEE80211_WEP_KIDLEN +     \
 163                                      IEEE80211_WEP_CRCLEN))
 164
 165 /* return whether a bit at index _n in bitmap _bm is set
 166  * _sz is the size of the bitmap  */
 167 #define ATH_BA_ISSET(_bm, _n)  (((_n) < (WME_BA_BMP_SIZE)) &&           \
 168                                 ((_bm)[(_n) >> 5] & (1 << ((_n) & 31))))
 169
 170 /* return block-ack bitmap index given sequence and starting sequence */
 171 #define ATH_BA_INDEX(_st, _seq) (((_seq) - (_st)) & (IEEE80211_SEQ_MAX - 1))
 172
 173 /* returns delimiter padding required given the packet length */
 174 #define ATH_AGGR_GET_NDELIM(_len)                                       \
 175         (((((_len) + ATH_AGGR_DELIM_SZ) < ATH_AGGR_MINPLEN) ?           \
 176           (ATH_AGGR_MINPLEN - (_len) - ATH_AGGR_DELIM_SZ) : 0) >> 2)
 177
 178 #define BAW_WITHIN(_start, _bawsz, _seqno) \
 179         ((((_seqno) - (_start)) & 4095) < (_bawsz))
 180
 181 #define ATH_AN_2_TID(_an, _tidno)  (&(_an)->tid[(_tidno)])
 182
 183 #define ATH_TX_COMPLETE_POLL_INT        1000
 184
 185 enum ATH_AGGR_STATUS {
 186         ATH_AGGR_DONE,
 187         ATH_AGGR_BAW_CLOSED,
 188         ATH_AGGR_LIMITED,
 189 };
 190
 191 struct ath_txq {
 192         u32 axq_qnum;
 193         u32 *axq_link;
 194         struct list_head axq_q;
 195         spinlock_t axq_lock;
 196         u32 axq_depth;
 197         bool stopped;
 198         bool axq_tx_inprogress;
 199         struct list_head axq_acq;
 200 };
 201
 202 #define AGGR_CLEANUP         BIT(1)
 203 #define AGGR_ADDBA_COMPLETE  BIT(2)
 204 #define AGGR_ADDBA_PROGRESS  BIT(3)
 205
 206 struct ath_tx_control {
 207         struct ath_txq *txq;
 208         int if_id;
 209         enum ath9k_internal_frame_type frame_type;
 210 };
 211
 212 #define ATH_TX_ERROR        0x01
 213 #define ATH_TX_XRETRY       0x02
 214 #define ATH_TX_BAR          0x04
 215
 216 struct ath_tx {
 217         u16 seq_no;
 218         u32 txqsetup;
 219         int hwq_map[ATH9K_WME_AC_VO+1];
 220         spinlock_t txbuflock;
 221         struct list_head txbuf;
 222         struct ath_txq txq[ATH9K_NUM_TX_QUEUES];
 223         struct ath_descdma txdma;
 224 };
 225
 226 struct ath_rx_edma {
 227         struct sk_buff_head rx_fifo;
 228         struct sk_buff_head rx_buffers;
 229         u32 rx_fifo_hwsize;
 230 };
 231
 232 struct ath_rx {
 233         u8 defant;
 234         u8 rxotherant;
 235         u32 *rxlink;
 236         unsigned int rxfilter;
 237         spinlock_t rxflushlock;
 238         spinlock_t rxbuflock;
 239         struct list_head rxbuf;
 240         struct ath_descdma rxdma;
 241         struct ath_buf *rx_bufptr;
 242         struct ath_rx_edma rx_edma[ATH9K_RX_QUEUE_MAX];
 243 };
 244
 245 int ath_startrecv(struct ath_softc *sc);
 246 bool ath_stoprecv(struct ath_softc *sc);
 247 void ath_flushrecv(struct ath_softc *sc);
 248 u32 ath_calcrxfilter(struct ath_softc *sc);
 249 int ath_rx_init(struct ath_softc *sc, int nbufs);
 250 void ath_rx_cleanup(struct ath_softc *sc);
 251 int ath_rx_tasklet(struct ath_softc *sc, int flush, bool hp);
 252 struct ath_txq *ath_txq_setup(struct ath_softc *sc, int qtype, int subtype);
 253 void ath_tx_cleanupq(struct ath_softc *sc, struct ath_txq *txq);
 254 int ath_tx_setup(struct ath_softc *sc, int haltype);
 255 void ath_drain_all_txq(struct ath_softc *sc, bool retry_tx);
 256 void ath_draintxq(struct ath_softc *sc,
 257                      struct ath_txq *txq, bool retry_tx);
 258 void ath_tx_node_init(struct ath_softc *sc, struct ath_node *an);
 259 void ath_tx_node_cleanup(struct ath_softc *sc, struct ath_node *an);
 260 void ath_txq_schedule(struct ath_softc *sc, struct ath_txq *txq);
 261 int ath_tx_init(struct ath_softc *sc, int nbufs);
 262 void ath_tx_cleanup(struct ath_softc *sc);
 263 struct ath_txq *ath_test_get_txq(struct ath_softc *sc, struct sk_buff *skb);
 264 int ath_txq_update(struct ath_softc *sc, int qnum,
 265                    struct ath9k_tx_queue_info *q);
 266 int ath_tx_start(struct ieee80211_hw *hw, struct sk_buff *skb,
 267                  struct ath_tx_control *txctl);
 268 void ath_tx_tasklet(struct ath_softc *sc);
 269 void ath_tx_cabq(struct ieee80211_hw *hw, struct sk_buff *skb);
 270 bool ath_tx_aggr_check(struct ath_softc *sc, struct ath_node *an, u8 tidno);
 271 void ath_tx_aggr_start(struct ath_softc *sc, struct ieee80211_sta *sta,
 272                        u16 tid, u16 *ssn);
 273 void ath_tx_aggr_stop(struct ath_softc *sc, struct ieee80211_sta *sta, u16 tid);
 274 void ath_tx_aggr_resume(struct ath_softc *sc, struct ieee80211_sta *sta, u16 tid);
 275 void ath9k_enable_ps(struct ath_softc *sc);
 276
 277 /********/
 278 /* VIFs */
 279 /********/
 280
 281 struct ath_vif {
 282         int av_bslot;
 283         __le64 tsf_adjust; /* TSF adjustment for staggered beacons */
 284         enum nl80211_iftype av_opmode;
 285         struct ath_buf *av_bcbuf;
 286         struct ath_tx_control av_btxctl;
 287         u8 bssid[ETH_ALEN]; /* current BSSID from config_interface */
 288 };
 289
 290 /*******************/
 291 /* Beacon Handling */
 292 /*******************/
 293
 294 /*
 295  * Regardless of the number of beacons we stagger, (i.e. regardless of the
 296  * number of BSSIDs) if a given beacon does not go out even after waiting this
 297  * number of beacon intervals, the game's up.
 298  */
 299 #define BSTUCK_THRESH                   (9 * ATH_BCBUF)
 300 #define ATH_BCBUF                       4
 301 #define ATH_DEFAULT_BINTVAL             100 /* TU */
 302 #define ATH_DEFAULT_BMISS_LIMIT         10
 303 #define IEEE80211_MS_TO_TU(x)           (((x) * 1000) / 1024)
 304
 305 struct ath_beacon_config {
 306         u16 beacon_interval;
 307         u16 listen_interval;
 308         u16 dtim_period;
 309         u16 bmiss_timeout;
 310         u8 dtim_count;
 311 };
 312
 313 struct ath_beacon {
 314         enum {
 315                 OK,             /* no change needed */
 316                 UPDATE,         /* update pending */
 317                 COMMIT          /* beacon sent, commit change */
 318         } updateslot;           /* slot time update fsm */
 319
 320         u32 beaconq;
 321         u32 bmisscnt;
 322         u32 ast_be_xmit;
 323         u64 bc_tstamp;
 324         struct ieee80211_vif *bslot[ATH_BCBUF];
 325         struct ath_wiphy *bslot_aphy[ATH_BCBUF];
 326         int slottime;
 327         int slotupdate;
 328         struct ath9k_tx_queue_info beacon_qi;
 329         struct ath_descdma bdma;
 330         struct ath_txq *cabq;
 331         struct list_head bbuf;
 332 };
 333
 334 void ath_beacon_tasklet(unsigned long data);
 335 void ath_beacon_config(struct ath_softc *sc, struct ieee80211_vif *vif);
 336 int ath_beacon_alloc(struct ath_wiphy *aphy, struct ieee80211_vif *vif);
 337 void ath_beacon_return(struct ath_softc *sc, struct ath_vif *avp);
 338 int ath_beaconq_config(struct ath_softc *sc);
 339
 340 /*******/
 341 /* ANI */
 342 /*******/
 343
 344 #define ATH_STA_SHORT_CALINTERVAL 1000    /* 1 second */
 345 #define ATH_AP_SHORT_CALINTERVAL  100     /* 100 ms */
 346 #define ATH_ANI_POLLINTERVAL      100     /* 100 ms */
 347 #define ATH_LONG_CALINTERVAL      30000   /* 30 seconds */
 348 #define ATH_RESTART_CALINTERVAL   1200000 /* 20 minutes */
 349
 350 void ath_ani_calibrate(unsigned long data);
 351
 352 /**********/
 353 /* BTCOEX */
 354 /**********/
 355
 356 /* Defines the BT AR_BT_COEX_WGHT used */
 357 enum ath_stomp_type {
 358         ATH_BTCOEX_NO_STOMP,
 359         ATH_BTCOEX_STOMP_ALL,
 360         ATH_BTCOEX_STOMP_LOW,
 361         ATH_BTCOEX_STOMP_NONE
 362 };
 363
 364 struct ath_btcoex {
 365         bool hw_timer_enabled;
 366         spinlock_t btcoex_lock;
 367         struct timer_list period_timer; /* Timer for BT period */
 368         u32 bt_priority_cnt;
 369         unsigned long bt_priority_time;
 370         int bt_stomp_type; /* Types of BT stomping */
 371         u32 btcoex_no_stomp; /* in usec */
 372         u32 btcoex_period; /* in usec */
 373         u32 btscan_no_stomp; /* in usec */
 374         struct ath_gen_timer *no_stomp_timer; /* Timer for no BT stomping */
 375 };
 376
 377 int ath_init_btcoex_timer(struct ath_softc *sc);
 378 void ath9k_btcoex_timer_resume(struct ath_softc *sc);
 379 void ath9k_btcoex_timer_pause(struct ath_softc *sc);
 380
 381 /********************/
 382 /*   LED Control    */
 383 /********************/
 384
 385 #define ATH_LED_PIN_DEF                 1
 386 #define ATH_LED_PIN_9287                8
 387 #define ATH_LED_ON_DURATION_IDLE        350     /* in msecs */
 388 #define ATH_LED_OFF_DURATION_IDLE       250     /* in msecs */
 389
 390 enum ath_led_type {
 391         ATH_LED_RADIO,
 392         ATH_LED_ASSOC,
 393         ATH_LED_TX,
 394         ATH_LED_RX
 395 };
 396
 397 struct ath_led {
 398         struct ath_softc *sc;
 399         struct led_classdev led_cdev;
 400         enum ath_led_type led_type;
 401         char name[32];
 402         bool registered;
 403 };
 404
 405 void ath_init_leds(struct ath_softc *sc);
 406 void ath_deinit_leds(struct ath_softc *sc);
 407
 408 /********************/
 409 /* Main driver core */
 410 /********************/
 411
 412 /*
 413  * Default cache line size, in bytes.
 414  * Used when PCI device not fully initialized by bootrom/BIOS
 415 */
 416 #define DEFAULT_CACHELINE       32
 417 #define ATH_REGCLASSIDS_MAX     10
 418 #define ATH_CABQ_READY_TIME     80      /* % of beacon interval */
 419 #define ATH_MAX_SW_RETRIES      10
 420 #define ATH_CHAN_MAX            255
 421 #define IEEE80211_WEP_NKID      4       /* number of key ids */
 422
 423 #define ATH_TXPOWER_MAX         100     /* .5 dBm units */
 424 #define ATH_RATE_DUMMY_MARKER   0
 425
 426 #define SC_OP_INVALID                BIT(0)
 427 #define SC_OP_BEACONS                BIT(1)
 428 #define SC_OP_RXAGGR                 BIT(2)
 429 #define SC_OP_TXAGGR                 BIT(3)
 430 #define SC_OP_FULL_RESET             BIT(4)
 431 #define SC_OP_PREAMBLE_SHORT         BIT(5)
 432 #define SC_OP_PROTECT_ENABLE         BIT(6)
 433 #define SC_OP_RXFLUSH                BIT(7)
 434 #define SC_OP_LED_ASSOCIATED         BIT(8)
 435 #define SC_OP_LED_ON                 BIT(9)
 436 #define SC_OP_SCANNING               BIT(10)
 437 #define SC_OP_TSF_RESET              BIT(11)
 438 #define SC_OP_BT_PRIORITY_DETECTED   BIT(12)
 439 #define SC_OP_BT_SCAN                BIT(13)
 440
 441 /* Powersave flags */
 442 #define PS_WAIT_FOR_BEACON        BIT(0)
 443 #define PS_WAIT_FOR_CAB           BIT(1)
 444 #define PS_WAIT_FOR_PSPOLL_DATA   BIT(2)
 445 #define PS_WAIT_FOR_TX_ACK        BIT(3)
 446 #define PS_BEACON_SYNC            BIT(4)
 447 #define PS_NULLFUNC_COMPLETED     BIT(5)
 448 #define PS_ENABLED                BIT(6)
 449
 450 struct ath_wiphy;
 451 struct ath_rate_table;
 452
 453 struct ath_softc {
 454         struct ieee80211_hw *hw;
 455         struct device *dev;
 456
 457         spinlock_t wiphy_lock; /* spinlock to protect ath_wiphy data */
 458         struct ath_wiphy *pri_wiphy;
 459         struct ath_wiphy **sec_wiphy; /* secondary wiphys (virtual radios); may
 460                                        * have NULL entries */
 461         int num_sec_wiphy; /* number of sec_wiphy pointers in the array */
 462         int chan_idx;
 463         int chan_is_ht;
 464         struct ath_wiphy *next_wiphy;
 465         struct work_struct chan_work;
 466         int wiphy_select_failures;
 467         unsigned long wiphy_select_first_fail;
 468         struct delayed_work wiphy_work;
 469         unsigned long wiphy_scheduler_int;
 470         int wiphy_scheduler_index;
 471
 472         struct tasklet_struct intr_tq;
 473         struct tasklet_struct bcon_tasklet;
 474         struct ath_hw *sc_ah;
 475         void __iomem *mem;
 476         int irq;
 477         spinlock_t sc_resetlock;
 478         spinlock_t sc_serial_rw;
 479         spinlock_t sc_pm_lock;
 480         struct mutex mutex;
 481
 482         u32 intrstatus;
 483         u32 sc_flags; /* SC_OP_* */
 484         u16 ps_flags; /* PS_* */
 485         u16 curtxpow;
 486         u8 nbcnvifs;
 487         u16 nvifs;
 488         bool ps_enabled;
 489         bool ps_idle;
 490         unsigned long ps_usecount;
 491
 492         struct ath_config config;
 493         struct ath_rx rx;
 494         struct ath_tx tx;
 495         struct ath_beacon beacon;
 496         const struct ath_rate_table *cur_rate_table;
 497         enum wireless_mode cur_rate_mode;
 498         struct ieee80211_supported_band sbands[IEEE80211_NUM_BANDS];
 499
 500         struct ath_led radio_led;
 501         struct ath_led assoc_led;
 502         struct ath_led tx_led;
 503         struct ath_led rx_led;
 504         struct delayed_work ath_led_blink_work;
 505         int led_on_duration;
 506         int led_off_duration;
 507         int led_on_cnt;
 508         int led_off_cnt;
 509
 510         int beacon_interval;
 511
 512 #ifdef CONFIG_ATH9K_DEBUGFS
 513         struct ath9k_debug debug;
 514 #endif
 515         struct ath_beacon_config cur_beacon_conf;
 516         struct delayed_work tx_complete_work;
 517         struct ath_btcoex btcoex;
 518 };
 519
 520 struct ath_wiphy {
 521         struct ath_softc *sc; /* shared for all virtual wiphys */
 522         struct ieee80211_hw *hw;
 523         enum ath_wiphy_state {
 524                 ATH_WIPHY_INACTIVE,
 525                 ATH_WIPHY_ACTIVE,
 526                 ATH_WIPHY_PAUSING,
 527                 ATH_WIPHY_PAUSED,
 528                 ATH_WIPHY_SCAN,
 529         } state;
 530         bool idle;
 531         int chan_idx;
 532         int chan_is_ht;
 533 };
 534
 535 void ath9k_tasklet(unsigned long data);
 536 int ath_reset(struct ath_softc *sc, bool retry_tx);
 537 int ath_get_hal_qnum(u16 queue, struct ath_softc *sc);
 538 int ath_get_mac80211_qnum(u32 queue, struct ath_softc *sc);
 539 int ath_cabq_update(struct ath_softc *);
 540
 541 static inline void ath_read_cachesize(struct ath_common *common, int *csz)
 542 {
 543         common->bus_ops->read_cachesize(common, csz);
 544 }
 545
 546 extern struct ieee80211_ops ath9k_ops;
 547 extern int modparam_nohwcrypt;
 548
 549 irqreturn_t ath_isr(int irq, void *dev);
 550 int ath9k_init_device(u16 devid, struct ath_softc *sc, u16 subsysid,
 551                     const struct ath_bus_ops *bus_ops);
 552 void ath9k_deinit_device(struct ath_softc *sc);
 553 const char *ath_mac_bb_name(u32 mac_bb_version);
 554 const char *ath_rf_name(u16 rf_version);
 555 void ath9k_set_hw_capab(struct ath_softc *sc, struct ieee80211_hw *hw);
 556 void ath9k_update_ichannel(struct ath_softc *sc, struct ieee80211_hw *hw,
 557                            struct ath9k_channel *ichan);
 558 void ath_update_chainmask(struct ath_softc *sc, int is_ht);
 559 int ath_set_channel(struct ath_softc *sc, struct ieee80211_hw *hw,
 560                     struct ath9k_channel *hchan);
 561
 562 void ath_radio_enable(struct ath_softc *sc, struct ieee80211_hw *hw);
 563 void ath_radio_disable(struct ath_softc *sc, struct ieee80211_hw *hw);
 564 bool ath9k_setpower(struct ath_softc *sc, enum ath9k_power_mode mode);
 565
 566 #ifdef CONFIG_PCI
 567 int ath_pci_init(void);
 568 void ath_pci_exit(void);
 569 #else
 570 static inline int ath_pci_init(void) { return 0; };
 571 static inline void ath_pci_exit(void) {};
 572 #endif
 573
 574 #ifdef CONFIG_ATHEROS_AR71XX
 575 int ath_ahb_init(void);
 576 void ath_ahb_exit(void);
 577 #else
 578 static inline int ath_ahb_init(void) { return 0; };
 579 static inline void ath_ahb_exit(void) {};
 580 #endif
 581
 582 void ath9k_ps_wakeup(struct ath_softc *sc);
 583 void ath9k_ps_restore(struct ath_softc *sc);
 584
 585 void ath9k_set_bssid_mask(struct ieee80211_hw *hw);
 586 int ath9k_wiphy_add(struct ath_softc *sc);
 587 int ath9k_wiphy_del(struct ath_wiphy *aphy);
 588 void ath9k_tx_status(struct ieee80211_hw *hw, struct sk_buff *skb);
 589 int ath9k_wiphy_pause(struct ath_wiphy *aphy);
 590 int ath9k_wiphy_unpause(struct ath_wiphy *aphy);
 591 int ath9k_wiphy_select(struct ath_wiphy *aphy);
 592 void ath9k_wiphy_set_scheduler(struct ath_softc *sc, unsigned int msec_int);
 593 void ath9k_wiphy_chan_work(struct work_struct *work);
 594 bool ath9k_wiphy_started(struct ath_softc *sc);
 595 void ath9k_wiphy_pause_all_forced(struct ath_softc *sc,
 596                                   struct ath_wiphy *selected);
 597 bool ath9k_wiphy_scanning(struct ath_softc *sc);
 598 void ath9k_wiphy_work(struct work_struct *work);
 599 bool ath9k_all_wiphys_idle(struct ath_softc *sc);
 600 void ath9k_set_wiphy_idle(struct ath_wiphy *aphy, bool idle);
 601
 602 void ath_mac80211_stop_queue(struct ath_softc *sc, u16 skb_queue);
 603 void ath_mac80211_start_queue(struct ath_softc *sc, u16 skb_queue);
 604
 605 int ath_tx_get_qnum(struct ath_softc *sc, int qtype, int haltype);
 606
 607 void ath_start_rfkill_poll(struct ath_softc *sc);
 608 extern void ath9k_rfkill_poll_state(struct ieee80211_hw *hw);
 609
 610 #endif /* ATH9K_H */