2 * Copyright (c) 2008-2009 Atheros Communications Inc.
4 * Permission to use, copy, modify, and/or distribute this software for any
5 * purpose with or without fee is hereby granted, provided that the above
6 * copyright notice and this permission notice appear in all copies.
8 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
9 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
10 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
11 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
12 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
13 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
14 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
20 #include <linux/etherdevice.h>
21 #include <linux/device.h>
22 #include <linux/leds.h>
29 * Header for the ath9k.ko driver core *only* -- hw code nor any other driver
30 * should rely on this file or its contents.
35 /* Macro to expand scalars to 64-bit objects */
37 #define ito64(x) (sizeof(x) == 8) ? \
38 (((unsigned long long int)(x)) & (0xff)) : \
40 (((unsigned long long int)(x)) & 0xffff) : \
41 ((sizeof(x) == 32) ? \
42 (((unsigned long long int)(x)) & 0xffffffff) : \
43 (unsigned long long int)(x))
45 /* increment with wrap-around */
46 #define INCR(_l, _sz) do { \
48 (_l) &= ((_sz) - 1); \
51 /* decrement with wrap-around */
52 #define DECR(_l, _sz) do { \
54 (_l) &= ((_sz) - 1); \
57 #define A_MAX(a, b) ((a) > (b) ? (a) : (b))
59 #define TSF_TO_TU(_h,_l) \
60 ((((u32)(_h)) << 22) | (((u32)(_l)) >> 10))
62 #define ATH_TXQ_SETUP(sc, i) ((sc)->tx.txqsetup & (1<<i))
70 /*************************/
71 /* Descriptor Management */
72 /*************************/
74 #define ATH_TXBUF_RESET(_bf) do { \
75 (_bf)->bf_stale = false; \
76 (_bf)->bf_lastbf = NULL; \
77 (_bf)->bf_next = NULL; \
78 memset(&((_bf)->bf_state), 0, \
79 sizeof(struct ath_buf_state)); \
82 #define ATH_RXBUF_RESET(_bf) do { \
83 (_bf)->bf_stale = false; \
87 * enum buffer_type - Buffer type flags
89 * @BUF_HT: Send this buffer using HT capabilities
90 * @BUF_AMPDU: This buffer is an ampdu, as part of an aggregate (during TX)
91 * @BUF_AGGR: Indicates whether the buffer can be aggregated
92 * (used in aggregation scheduling)
93 * @BUF_RETRY: Indicates whether the buffer is retried
94 * @BUF_XRETRY: To denote excessive retries of the buffer
104 #define bf_nframes bf_state.bfs_nframes
105 #define bf_al bf_state.bfs_al
106 #define bf_frmlen bf_state.bfs_frmlen
107 #define bf_retries bf_state.bfs_retries
108 #define bf_seqno bf_state.bfs_seqno
109 #define bf_tidno bf_state.bfs_tidno
110 #define bf_keyix bf_state.bfs_keyix
111 #define bf_keytype bf_state.bfs_keytype
112 #define bf_isht(bf) (bf->bf_state.bf_type & BUF_HT)
113 #define bf_isampdu(bf) (bf->bf_state.bf_type & BUF_AMPDU)
114 #define bf_isaggr(bf) (bf->bf_state.bf_type & BUF_AGGR)
115 #define bf_isretried(bf) (bf->bf_state.bf_type & BUF_RETRY)
116 #define bf_isxretried(bf) (bf->bf_state.bf_type & BUF_XRETRY)
119 struct ath_desc
*dd_desc
;
120 dma_addr_t dd_desc_paddr
;
122 struct ath_buf
*dd_bufptr
;
125 int ath_descdma_setup(struct ath_softc
*sc
, struct ath_descdma
*dd
,
126 struct list_head
*head
, const char *name
,
127 int nbuf
, int ndesc
);
128 void ath_descdma_cleanup(struct ath_softc
*sc
, struct ath_descdma
*dd
,
129 struct list_head
*head
);
135 #define ATH_MAX_ANTENNA 3
136 #define ATH_RXBUF 512
137 #define ATH_TXBUF 512
138 #define ATH_TXMAXTRY 13
139 #define ATH_MGT_TXMAXTRY 4
141 #define TID_TO_WME_AC(_tid) \
142 ((((_tid) == 0) || ((_tid) == 3)) ? WME_AC_BE : \
143 (((_tid) == 1) || ((_tid) == 2)) ? WME_AC_BK : \
144 (((_tid) == 4) || ((_tid) == 5)) ? WME_AC_VI : \
147 #define ADDBA_EXCHANGE_ATTEMPTS 10
148 #define ATH_AGGR_DELIM_SZ 4
149 #define ATH_AGGR_MINPLEN 256 /* in bytes, minimum packet length */
150 /* number of delimiters for encryption padding */
151 #define ATH_AGGR_ENCRYPTDELIM 10
152 /* minimum h/w qdepth to be sustained to maximize aggregation */
153 #define ATH_AGGR_MIN_QDEPTH 2
154 #define ATH_AMPDU_SUBFRAME_DEFAULT 32
156 #define IEEE80211_SEQ_SEQ_SHIFT 4
157 #define IEEE80211_SEQ_MAX 4096
158 #define IEEE80211_WEP_IVLEN 3
159 #define IEEE80211_WEP_KIDLEN 1
160 #define IEEE80211_WEP_CRCLEN 4
161 #define IEEE80211_MAX_MPDU_LEN (3840 + FCS_LEN + \
162 (IEEE80211_WEP_IVLEN + \
163 IEEE80211_WEP_KIDLEN + \
164 IEEE80211_WEP_CRCLEN))
166 /* return whether a bit at index _n in bitmap _bm is set
167 * _sz is the size of the bitmap */
168 #define ATH_BA_ISSET(_bm, _n) (((_n) < (WME_BA_BMP_SIZE)) && \
169 ((_bm)[(_n) >> 5] & (1 << ((_n) & 31))))
171 /* return block-ack bitmap index given sequence and starting sequence */
172 #define ATH_BA_INDEX(_st, _seq) (((_seq) - (_st)) & (IEEE80211_SEQ_MAX - 1))
174 /* returns delimiter padding required given the packet length */
175 #define ATH_AGGR_GET_NDELIM(_len) \
176 (((((_len) + ATH_AGGR_DELIM_SZ) < ATH_AGGR_MINPLEN) ? \
177 (ATH_AGGR_MINPLEN - (_len) - ATH_AGGR_DELIM_SZ) : 0) >> 2)
179 #define BAW_WITHIN(_start, _bawsz, _seqno) \
180 ((((_seqno) - (_start)) & 4095) < (_bawsz))
182 #define ATH_DS_BA_SEQ(_ds) ((_ds)->ds_us.tx.ts_seqnum)
183 #define ATH_DS_BA_BITMAP(_ds) (&(_ds)->ds_us.tx.ba_low)
184 #define ATH_DS_TX_BA(_ds) ((_ds)->ds_us.tx.ts_flags & ATH9K_TX_BA)
185 #define ATH_AN_2_TID(_an, _tidno) (&(_an)->tid[(_tidno)])
187 #define ATH_TX_COMPLETE_POLL_INT 1000
189 enum ATH_AGGR_STATUS
{
198 struct list_head axq_q
;
202 bool axq_tx_inprogress
;
203 struct list_head axq_acq
;
206 #define AGGR_CLEANUP BIT(1)
207 #define AGGR_ADDBA_COMPLETE BIT(2)
208 #define AGGR_ADDBA_PROGRESS BIT(3)
210 struct ath_tx_control
{
213 enum ath9k_internal_frame_type frame_type
;
216 #define ATH_TX_ERROR 0x01
217 #define ATH_TX_XRETRY 0x02
218 #define ATH_TX_BAR 0x04
223 int hwq_map
[ATH9K_WME_AC_VO
+1];
224 spinlock_t txbuflock
;
225 struct list_head txbuf
;
226 struct ath_txq txq
[ATH9K_NUM_TX_QUEUES
];
227 struct ath_descdma txdma
;
234 unsigned int rxfilter
;
235 spinlock_t rxflushlock
;
236 spinlock_t rxbuflock
;
237 struct list_head rxbuf
;
238 struct ath_descdma rxdma
;
241 int ath_startrecv(struct ath_softc
*sc
);
242 bool ath_stoprecv(struct ath_softc
*sc
);
243 void ath_flushrecv(struct ath_softc
*sc
);
244 u32
ath_calcrxfilter(struct ath_softc
*sc
);
245 int ath_rx_init(struct ath_softc
*sc
, int nbufs
);
246 void ath_rx_cleanup(struct ath_softc
*sc
);
247 int ath_rx_tasklet(struct ath_softc
*sc
, int flush
);
248 struct ath_txq
*ath_txq_setup(struct ath_softc
*sc
, int qtype
, int subtype
);
249 void ath_tx_cleanupq(struct ath_softc
*sc
, struct ath_txq
*txq
);
250 int ath_tx_setup(struct ath_softc
*sc
, int haltype
);
251 void ath_drain_all_txq(struct ath_softc
*sc
, bool retry_tx
);
252 void ath_draintxq(struct ath_softc
*sc
,
253 struct ath_txq
*txq
, bool retry_tx
);
254 void ath_tx_node_init(struct ath_softc
*sc
, struct ath_node
*an
);
255 void ath_tx_node_cleanup(struct ath_softc
*sc
, struct ath_node
*an
);
256 void ath_txq_schedule(struct ath_softc
*sc
, struct ath_txq
*txq
);
257 int ath_tx_init(struct ath_softc
*sc
, int nbufs
);
258 void ath_tx_cleanup(struct ath_softc
*sc
);
259 struct ath_txq
*ath_test_get_txq(struct ath_softc
*sc
, struct sk_buff
*skb
);
260 int ath_txq_update(struct ath_softc
*sc
, int qnum
,
261 struct ath9k_tx_queue_info
*q
);
262 int ath_tx_start(struct ieee80211_hw
*hw
, struct sk_buff
*skb
,
263 struct ath_tx_control
*txctl
);
264 void ath_tx_tasklet(struct ath_softc
*sc
);
265 void ath_tx_cabq(struct ieee80211_hw
*hw
, struct sk_buff
*skb
);
266 bool ath_tx_aggr_check(struct ath_softc
*sc
, struct ath_node
*an
, u8 tidno
);
267 void ath_tx_aggr_start(struct ath_softc
*sc
, struct ieee80211_sta
*sta
,
269 void ath_tx_aggr_stop(struct ath_softc
*sc
, struct ieee80211_sta
*sta
, u16 tid
);
270 void ath_tx_aggr_resume(struct ath_softc
*sc
, struct ieee80211_sta
*sta
, u16 tid
);
278 __le64 tsf_adjust
; /* TSF adjustment for staggered beacons */
279 enum nl80211_iftype av_opmode
;
280 struct ath_buf
*av_bcbuf
;
281 struct ath_tx_control av_btxctl
;
282 u8 bssid
[ETH_ALEN
]; /* current BSSID from config_interface */
285 /*******************/
286 /* Beacon Handling */
287 /*******************/
290 * Regardless of the number of beacons we stagger, (i.e. regardless of the
291 * number of BSSIDs) if a given beacon does not go out even after waiting this
292 * number of beacon intervals, the game's up.
294 #define BSTUCK_THRESH (9 * ATH_BCBUF)
296 #define ATH_DEFAULT_BINTVAL 100 /* TU */
297 #define ATH_DEFAULT_BMISS_LIMIT 10
298 #define IEEE80211_MS_TO_TU(x) (((x) * 1000) / 1024)
300 struct ath_beacon_config
{
310 OK
, /* no change needed */
311 UPDATE
, /* update pending */
312 COMMIT
/* beacon sent, commit change */
313 } updateslot
; /* slot time update fsm */
319 struct ieee80211_vif
*bslot
[ATH_BCBUF
];
320 struct ath_wiphy
*bslot_aphy
[ATH_BCBUF
];
323 struct ath9k_tx_queue_info beacon_qi
;
324 struct ath_descdma bdma
;
325 struct ath_txq
*cabq
;
326 struct list_head bbuf
;
329 void ath_beacon_tasklet(unsigned long data
);
330 void ath_beacon_config(struct ath_softc
*sc
, struct ieee80211_vif
*vif
);
331 int ath_beacon_alloc(struct ath_wiphy
*aphy
, struct ieee80211_vif
*vif
);
332 void ath_beacon_return(struct ath_softc
*sc
, struct ath_vif
*avp
);
338 #define ATH_STA_SHORT_CALINTERVAL 1000 /* 1 second */
339 #define ATH_AP_SHORT_CALINTERVAL 100 /* 100 ms */
340 #define ATH_ANI_POLLINTERVAL 100 /* 100 ms */
341 #define ATH_LONG_CALINTERVAL 30000 /* 30 seconds */
342 #define ATH_RESTART_CALINTERVAL 1200000 /* 20 minutes */
344 /* Defines the BT AR_BT_COEX_WGHT used */
345 enum ath_stomp_type
{
347 ATH_BTCOEX_STOMP_ALL
,
348 ATH_BTCOEX_STOMP_LOW
,
349 ATH_BTCOEX_STOMP_NONE
353 bool hw_timer_enabled
;
354 spinlock_t btcoex_lock
;
355 struct timer_list period_timer
; /* Timer for BT period */
357 unsigned long bt_priority_time
;
358 int bt_stomp_type
; /* Types of BT stomping */
359 u32 btcoex_no_stomp
; /* in usec */
360 u32 btcoex_period
; /* in usec */
361 struct ath_gen_timer
*no_stomp_timer
; /* Timer for no BT stomping */
364 /********************/
366 /********************/
368 #define ATH_LED_PIN_DEF 1
369 #define ATH_LED_PIN_9287 8
370 #define ATH_LED_ON_DURATION_IDLE 350 /* in msecs */
371 #define ATH_LED_OFF_DURATION_IDLE 250 /* in msecs */
381 struct ath_softc
*sc
;
382 struct led_classdev led_cdev
;
383 enum ath_led_type led_type
;
388 /********************/
389 /* Main driver core */
390 /********************/
393 * Default cache line size, in bytes.
394 * Used when PCI device not fully initialized by bootrom/BIOS
396 #define DEFAULT_CACHELINE 32
397 #define ATH_REGCLASSIDS_MAX 10
398 #define ATH_CABQ_READY_TIME 80 /* % of beacon interval */
399 #define ATH_MAX_SW_RETRIES 10
400 #define ATH_CHAN_MAX 255
401 #define IEEE80211_WEP_NKID 4 /* number of key ids */
403 #define ATH_TXPOWER_MAX 100 /* .5 dBm units */
404 #define ATH_RATE_DUMMY_MARKER 0
406 #define SC_OP_INVALID BIT(0)
407 #define SC_OP_BEACONS BIT(1)
408 #define SC_OP_RXAGGR BIT(2)
409 #define SC_OP_TXAGGR BIT(3)
410 #define SC_OP_FULL_RESET BIT(4)
411 #define SC_OP_PREAMBLE_SHORT BIT(5)
412 #define SC_OP_PROTECT_ENABLE BIT(6)
413 #define SC_OP_RXFLUSH BIT(7)
414 #define SC_OP_LED_ASSOCIATED BIT(8)
415 #define SC_OP_WAIT_FOR_BEACON BIT(12)
416 #define SC_OP_LED_ON BIT(13)
417 #define SC_OP_SCANNING BIT(14)
418 #define SC_OP_TSF_RESET BIT(15)
419 #define SC_OP_WAIT_FOR_CAB BIT(16)
420 #define SC_OP_WAIT_FOR_PSPOLL_DATA BIT(17)
421 #define SC_OP_WAIT_FOR_TX_ACK BIT(18)
422 #define SC_OP_BEACON_SYNC BIT(19)
423 #define SC_OP_BT_PRIORITY_DETECTED BIT(21)
428 struct ieee80211_hw
*hw
;
431 spinlock_t wiphy_lock
; /* spinlock to protect ath_wiphy data */
432 struct ath_wiphy
*pri_wiphy
;
433 struct ath_wiphy
**sec_wiphy
; /* secondary wiphys (virtual radios); may
434 * have NULL entries */
435 int num_sec_wiphy
; /* number of sec_wiphy pointers in the array */
438 struct ath_wiphy
*next_wiphy
;
439 struct work_struct chan_work
;
440 int wiphy_select_failures
;
441 unsigned long wiphy_select_first_fail
;
442 struct delayed_work wiphy_work
;
443 unsigned long wiphy_scheduler_int
;
444 int wiphy_scheduler_index
;
446 struct tasklet_struct intr_tq
;
447 struct tasklet_struct bcon_tasklet
;
448 struct ath_hw
*sc_ah
;
451 spinlock_t sc_resetlock
;
452 spinlock_t sc_serial_rw
;
454 spinlock_t sc_pm_lock
;
458 u32 sc_flags
; /* SC_OP_* */
463 unsigned long ps_usecount
;
464 enum ath9k_int imask
;
466 struct ath_config config
;
469 struct ath_beacon beacon
;
470 struct ieee80211_rate rates
[IEEE80211_NUM_BANDS
][ATH_RATE_MAX
];
471 const struct ath_rate_table
*hw_rate_table
[ATH9K_MODE_MAX
];
472 const struct ath_rate_table
*cur_rate_table
;
473 struct ieee80211_supported_band sbands
[IEEE80211_NUM_BANDS
];
475 struct ath_led radio_led
;
476 struct ath_led assoc_led
;
477 struct ath_led tx_led
;
478 struct ath_led rx_led
;
479 struct delayed_work ath_led_blink_work
;
481 int led_off_duration
;
487 #ifdef CONFIG_ATH9K_DEBUG
488 struct ath9k_debug debug
;
490 struct ath_beacon_config cur_beacon_conf
;
491 struct delayed_work tx_complete_work
;
492 struct ath_btcoex btcoex
;
496 struct ath_softc
*sc
; /* shared for all virtual wiphys */
497 struct ieee80211_hw
*hw
;
498 enum ath_wiphy_state
{
510 int ath_reset(struct ath_softc
*sc
, bool retry_tx
);
511 int ath_get_hal_qnum(u16 queue
, struct ath_softc
*sc
);
512 int ath_get_mac80211_qnum(u32 queue
, struct ath_softc
*sc
);
513 int ath_cabq_update(struct ath_softc
*);
515 static inline void ath_read_cachesize(struct ath_common
*common
, int *csz
)
517 common
->bus_ops
->read_cachesize(common
, csz
);
520 static inline void ath_bus_cleanup(struct ath_common
*common
)
522 common
->bus_ops
->cleanup(common
);
525 extern struct ieee80211_ops ath9k_ops
;
527 irqreturn_t
ath_isr(int irq
, void *dev
);
528 void ath_cleanup(struct ath_softc
*sc
);
529 int ath_init_device(u16 devid
, struct ath_softc
*sc
, u16 subsysid
,
530 const struct ath_bus_ops
*bus_ops
);
531 void ath_detach(struct ath_softc
*sc
);
532 const char *ath_mac_bb_name(u32 mac_bb_version
);
533 const char *ath_rf_name(u16 rf_version
);
534 void ath_set_hw_capab(struct ath_softc
*sc
, struct ieee80211_hw
*hw
);
535 void ath9k_update_ichannel(struct ath_softc
*sc
, struct ieee80211_hw
*hw
,
536 struct ath9k_channel
*ichan
);
537 void ath_update_chainmask(struct ath_softc
*sc
, int is_ht
);
538 int ath_set_channel(struct ath_softc
*sc
, struct ieee80211_hw
*hw
,
539 struct ath9k_channel
*hchan
);
541 void ath_radio_enable(struct ath_softc
*sc
, struct ieee80211_hw
*hw
);
542 void ath_radio_disable(struct ath_softc
*sc
, struct ieee80211_hw
*hw
);
545 int ath_pci_init(void);
546 void ath_pci_exit(void);
548 static inline int ath_pci_init(void) { return 0; };
549 static inline void ath_pci_exit(void) {};
552 #ifdef CONFIG_ATHEROS_AR71XX
553 int ath_ahb_init(void);
554 void ath_ahb_exit(void);
556 static inline int ath_ahb_init(void) { return 0; };
557 static inline void ath_ahb_exit(void) {};
560 void ath9k_ps_wakeup(struct ath_softc
*sc
);
561 void ath9k_ps_restore(struct ath_softc
*sc
);
563 void ath9k_set_bssid_mask(struct ieee80211_hw
*hw
);
564 int ath9k_wiphy_add(struct ath_softc
*sc
);
565 int ath9k_wiphy_del(struct ath_wiphy
*aphy
);
566 void ath9k_tx_status(struct ieee80211_hw
*hw
, struct sk_buff
*skb
);
567 int ath9k_wiphy_pause(struct ath_wiphy
*aphy
);
568 int ath9k_wiphy_unpause(struct ath_wiphy
*aphy
);
569 int ath9k_wiphy_select(struct ath_wiphy
*aphy
);
570 void ath9k_wiphy_set_scheduler(struct ath_softc
*sc
, unsigned int msec_int
);
571 void ath9k_wiphy_chan_work(struct work_struct
*work
);
572 bool ath9k_wiphy_started(struct ath_softc
*sc
);
573 void ath9k_wiphy_pause_all_forced(struct ath_softc
*sc
,
574 struct ath_wiphy
*selected
);
575 bool ath9k_wiphy_scanning(struct ath_softc
*sc
);
576 void ath9k_wiphy_work(struct work_struct
*work
);
577 bool ath9k_all_wiphys_idle(struct ath_softc
*sc
);
578 void ath9k_set_wiphy_idle(struct ath_wiphy
*aphy
, bool idle
);
580 void ath_mac80211_stop_queue(struct ath_softc
*sc
, u16 skb_queue
);
581 void ath_mac80211_start_queue(struct ath_softc
*sc
, u16 skb_queue
);
583 int ath_tx_get_qnum(struct ath_softc
*sc
, int qtype
, int haltype
);