]> git.proxmox.com Git - mirror_ubuntu-jammy-kernel.git/blob - drivers/net/wireless/ath/ath9k/main.c
projects / mirror_ubuntu-jammy-kernel.git / blob
? search:


248e5b24acfaeb2dbbf7fa0bf9177303d68ace69
[mirror_ubuntu-jammy-kernel.git] / drivers / net / wireless / ath / ath9k / main.c
1 /*
2 * Copyright (c) 2008-2011 Atheros Communications Inc.
3 *
4 * Permission to use, copy, modify, and/or distribute this software for any
5 * purpose with or without fee is hereby granted, provided that the above
6 * copyright notice and this permission notice appear in all copies.
7 *
8 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
9 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
10 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
11 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
12 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
13 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
14 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
15 */
16
17 #include <linux/nl80211.h>
18 #include <linux/delay.h>
19 #include "ath9k.h"
20 #include "btcoex.h"
21
22 u8 ath9k_parse_mpdudensity(u8 mpdudensity)
23 {
24 /*
25 * 802.11n D2.0 defined values for "Minimum MPDU Start Spacing":
26 * 0 for no restriction
27 * 1 for 1/4 us
28 * 2 for 1/2 us
29 * 3 for 1 us
30 * 4 for 2 us
31 * 5 for 4 us
32 * 6 for 8 us
33 * 7 for 16 us
34 */
35 switch (mpdudensity) {
36 case 0:
37 return 0;
38 case 1:
39 case 2:
40 case 3:
41 /* Our lower layer calculations limit our precision to
42 1 microsecond */
43 return 1;
44 case 4:
45 return 2;
46 case 5:
47 return 4;
48 case 6:
49 return 8;
50 case 7:
51 return 16;
52 default:
53 return 0;
54 }
55 }
56
57 static bool ath9k_has_pending_frames(struct ath_softc *sc, struct ath_txq *txq)
58 {
59 bool pending = false;
60
61 spin_lock_bh(&txq->axq_lock);
62
63 if (txq->axq_depth || !list_empty(&txq->axq_acq))
64 pending = true;
65
66 spin_unlock_bh(&txq->axq_lock);
67 return pending;
68 }
69
70 static bool ath9k_setpower(struct ath_softc *sc, enum ath9k_power_mode mode)
71 {
72 unsigned long flags;
73 bool ret;
74
75 spin_lock_irqsave(&sc->sc_pm_lock, flags);
76 ret = ath9k_hw_setpower(sc->sc_ah, mode);
77 spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
78
79 return ret;
80 }
81
82 void ath9k_ps_wakeup(struct ath_softc *sc)
83 {
84 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
85 unsigned long flags;
86 enum ath9k_power_mode power_mode;
87
88 spin_lock_irqsave(&sc->sc_pm_lock, flags);
89 if (++sc->ps_usecount != 1)
90 goto unlock;
91
92 power_mode = sc->sc_ah->power_mode;
93 ath9k_hw_setpower(sc->sc_ah, ATH9K_PM_AWAKE);
94
95 /*
96 * While the hardware is asleep, the cycle counters contain no
97 * useful data. Better clear them now so that they don't mess up
98 * survey data results.
99 */
100 if (power_mode != ATH9K_PM_AWAKE) {
101 spin_lock(&common->cc_lock);
102 ath_hw_cycle_counters_update(common);
103 memset(&common->cc_survey, 0, sizeof(common->cc_survey));
104 memset(&common->cc_ani, 0, sizeof(common->cc_ani));
105 spin_unlock(&common->cc_lock);
106 }
107
108 unlock:
109 spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
110 }
111
112 void ath9k_ps_restore(struct ath_softc *sc)
113 {
114 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
115 enum ath9k_power_mode mode;
116 unsigned long flags;
117 bool reset;
118
119 spin_lock_irqsave(&sc->sc_pm_lock, flags);
120 if (--sc->ps_usecount != 0)
121 goto unlock;
122
123 if (sc->ps_idle) {
124 ath9k_hw_setrxabort(sc->sc_ah, 1);
125 ath9k_hw_stopdmarecv(sc->sc_ah, &reset);
126 mode = ATH9K_PM_FULL_SLEEP;
127 } else if (sc->ps_enabled &&
128 !(sc->ps_flags & (PS_WAIT_FOR_BEACON |
129 PS_WAIT_FOR_CAB |
130 PS_WAIT_FOR_PSPOLL_DATA |
131 PS_WAIT_FOR_TX_ACK))) {
132 mode = ATH9K_PM_NETWORK_SLEEP;
133 if (ath9k_hw_btcoex_is_enabled(sc->sc_ah))
134 ath9k_btcoex_stop_gen_timer(sc);
135 } else {
136 goto unlock;
137 }
138
139 spin_lock(&common->cc_lock);
140 ath_hw_cycle_counters_update(common);
141 spin_unlock(&common->cc_lock);
142
143 ath9k_hw_setpower(sc->sc_ah, mode);
144
145 unlock:
146 spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
147 }
148
149 static void __ath_cancel_work(struct ath_softc *sc)
150 {
151 cancel_work_sync(&sc->paprd_work);
152 cancel_work_sync(&sc->hw_check_work);
153 cancel_delayed_work_sync(&sc->tx_complete_work);
154 cancel_delayed_work_sync(&sc->hw_pll_work);
155
156 #ifdef CONFIG_ATH9K_BTCOEX_SUPPORT
157 if (ath9k_hw_mci_is_enabled(sc->sc_ah))
158 cancel_work_sync(&sc->mci_work);
159 #endif
160 }
161
162 static void ath_cancel_work(struct ath_softc *sc)
163 {
164 __ath_cancel_work(sc);
165 cancel_work_sync(&sc->hw_reset_work);
166 }
167
168 static void ath_restart_work(struct ath_softc *sc)
169 {
170 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
171
172 ieee80211_queue_delayed_work(sc->hw, &sc->tx_complete_work, 0);
173
174 if (AR_SREV_9340(sc->sc_ah) || AR_SREV_9485(sc->sc_ah) ||
175 AR_SREV_9550(sc->sc_ah))
176 ieee80211_queue_delayed_work(sc->hw, &sc->hw_pll_work,
177 msecs_to_jiffies(ATH_PLL_WORK_INTERVAL));
178
179 ath_start_rx_poll(sc, 3);
180
181 if (!common->disable_ani)
182 ath_start_ani(common);
183 }
184
185 static bool ath_prepare_reset(struct ath_softc *sc, bool retry_tx, bool flush)
186 {
187 struct ath_hw *ah = sc->sc_ah;
188 struct ath_common *common = ath9k_hw_common(ah);
189 bool ret = true;
190
191 ieee80211_stop_queues(sc->hw);
192
193 sc->hw_busy_count = 0;
194 del_timer_sync(&common->ani.timer);
195 del_timer_sync(&sc->rx_poll_timer);
196
197 ath9k_debug_samp_bb_mac(sc);
198 ath9k_hw_disable_interrupts(ah);
199
200 if (!ath_stoprecv(sc))
201 ret = false;
202
203 if (!ath_drain_all_txq(sc, retry_tx))
204 ret = false;
205
206 if (!flush) {
207 if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)
208 ath_rx_tasklet(sc, 1, true);
209 ath_rx_tasklet(sc, 1, false);
210 } else {
211 ath_flushrecv(sc);
212 }
213
214 return ret;
215 }
216
217 static bool ath_complete_reset(struct ath_softc *sc, bool start)
218 {
219 struct ath_hw *ah = sc->sc_ah;
220 struct ath_common *common = ath9k_hw_common(ah);
221 unsigned long flags;
222
223 if (ath_startrecv(sc) != 0) {
224 ath_err(common, "Unable to restart recv logic\n");
225 return false;
226 }
227
228 ath9k_cmn_update_txpow(ah, sc->curtxpow,
229 sc->config.txpowlimit, &sc->curtxpow);
230
231 clear_bit(SC_OP_HW_RESET, &sc->sc_flags);
232 ath9k_hw_set_interrupts(ah);
233 ath9k_hw_enable_interrupts(ah);
234
235 if (!(sc->hw->conf.flags & IEEE80211_CONF_OFFCHANNEL) && start) {
236 if (!test_bit(SC_OP_BEACONS, &sc->sc_flags))
237 goto work;
238
239 ath_set_beacon(sc);
240
241 if (ah->opmode == NL80211_IFTYPE_STATION &&
242 test_bit(SC_OP_PRIM_STA_VIF, &sc->sc_flags)) {
243 spin_lock_irqsave(&sc->sc_pm_lock, flags);
244 sc->ps_flags |= PS_BEACON_SYNC | PS_WAIT_FOR_BEACON;
245 spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
246 }
247 work:
248 ath_restart_work(sc);
249 }
250
251 if ((ah->caps.hw_caps & ATH9K_HW_CAP_ANT_DIV_COMB) && sc->ant_rx != 3)
252 ath_ant_comb_update(sc);
253
254 ieee80211_wake_queues(sc->hw);
255
256 return true;
257 }
258
259 static int ath_reset_internal(struct ath_softc *sc, struct ath9k_channel *hchan,
260 bool retry_tx)
261 {
262 struct ath_hw *ah = sc->sc_ah;
263 struct ath_common *common = ath9k_hw_common(ah);
264 struct ath9k_hw_cal_data *caldata = NULL;
265 bool fastcc = true;
266 bool flush = false;
267 int r;
268
269 __ath_cancel_work(sc);
270
271 spin_lock_bh(&sc->sc_pcu_lock);
272
273 if (!(sc->hw->conf.flags & IEEE80211_CONF_OFFCHANNEL)) {
274 fastcc = false;
275 caldata = &sc->caldata;
276 }
277
278 if (!hchan) {
279 fastcc = false;
280 flush = true;
281 hchan = ah->curchan;
282 }
283
284 if (!ath_prepare_reset(sc, retry_tx, flush))
285 fastcc = false;
286
287 ath_dbg(common, CONFIG, "Reset to %u MHz, HT40: %d fastcc: %d\n",
288 hchan->channel, IS_CHAN_HT40(hchan), fastcc);
289
290 r = ath9k_hw_reset(ah, hchan, caldata, fastcc);
291 if (r) {
292 ath_err(common,
293 "Unable to reset channel, reset status %d\n", r);
294 goto out;
295 }
296
297 if (!ath_complete_reset(sc, true))
298 r = -EIO;
299
300 out:
301 spin_unlock_bh(&sc->sc_pcu_lock);
302 return r;
303 }
304
305
306 /*
307 * Set/change channels. If the channel is really being changed, it's done
308 * by reseting the chip. To accomplish this we must first cleanup any pending
309 * DMA, then restart stuff.
310 */
311 static int ath_set_channel(struct ath_softc *sc, struct ieee80211_hw *hw,
312 struct ath9k_channel *hchan)
313 {
314 int r;
315
316 if (test_bit(SC_OP_INVALID, &sc->sc_flags))
317 return -EIO;
318
319 r = ath_reset_internal(sc, hchan, false);
320
321 return r;
322 }
323
324 static void ath_node_attach(struct ath_softc *sc, struct ieee80211_sta *sta,
325 struct ieee80211_vif *vif)
326 {
327 struct ath_node *an;
328 u8 density;
329 an = (struct ath_node *)sta->drv_priv;
330
331 #ifdef CONFIG_ATH9K_DEBUGFS
332 spin_lock(&sc->nodes_lock);
333 list_add(&an->list, &sc->nodes);
334 spin_unlock(&sc->nodes_lock);
335 #endif
336 an->sta = sta;
337 an->vif = vif;
338
339 if (sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_HT) {
340 ath_tx_node_init(sc, an);
341 an->maxampdu = 1 << (IEEE80211_HT_MAX_AMPDU_FACTOR +
342 sta->ht_cap.ampdu_factor);
343 density = ath9k_parse_mpdudensity(sta->ht_cap.ampdu_density);
344 an->mpdudensity = density;
345 }
346 }
347
348 static void ath_node_detach(struct ath_softc *sc, struct ieee80211_sta *sta)
349 {
350 struct ath_node *an = (struct ath_node *)sta->drv_priv;
351
352 #ifdef CONFIG_ATH9K_DEBUGFS
353 spin_lock(&sc->nodes_lock);
354 list_del(&an->list);
355 spin_unlock(&sc->nodes_lock);
356 an->sta = NULL;
357 #endif
358
359 if (sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_HT)
360 ath_tx_node_cleanup(sc, an);
361 }
362
363 void ath9k_tasklet(unsigned long data)
364 {
365 struct ath_softc *sc = (struct ath_softc *)data;
366 struct ath_hw *ah = sc->sc_ah;
367 struct ath_common *common = ath9k_hw_common(ah);
368 unsigned long flags;
369 u32 status = sc->intrstatus;
370 u32 rxmask;
371
372 ath9k_ps_wakeup(sc);
373 spin_lock(&sc->sc_pcu_lock);
374
375 if ((status & ATH9K_INT_FATAL) ||
376 (status & ATH9K_INT_BB_WATCHDOG)) {
377 #ifdef CONFIG_ATH9K_DEBUGFS
378 enum ath_reset_type type;
379
380 if (status & ATH9K_INT_FATAL)
381 type = RESET_TYPE_FATAL_INT;
382 else
383 type = RESET_TYPE_BB_WATCHDOG;
384
385 RESET_STAT_INC(sc, type);
386 #endif
387 set_bit(SC_OP_HW_RESET, &sc->sc_flags);
388 ieee80211_queue_work(sc->hw, &sc->hw_reset_work);
389 goto out;
390 }
391
392 spin_lock_irqsave(&sc->sc_pm_lock, flags);
393 if ((status & ATH9K_INT_TSFOOR) && sc->ps_enabled) {
394 /*
395 * TSF sync does not look correct; remain awake to sync with
396 * the next Beacon.
397 */
398 ath_dbg(common, PS, "TSFOOR - Sync with next Beacon\n");
399 sc->ps_flags |= PS_WAIT_FOR_BEACON | PS_BEACON_SYNC;
400 }
401 spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
402
403 if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)
404 rxmask = (ATH9K_INT_RXHP | ATH9K_INT_RXLP | ATH9K_INT_RXEOL |
405 ATH9K_INT_RXORN);
406 else
407 rxmask = (ATH9K_INT_RX | ATH9K_INT_RXEOL | ATH9K_INT_RXORN);
408
409 if (status & rxmask) {
410 /* Check for high priority Rx first */
411 if ((ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) &&
412 (status & ATH9K_INT_RXHP))
413 ath_rx_tasklet(sc, 0, true);
414
415 ath_rx_tasklet(sc, 0, false);
416 }
417
418 if (status & ATH9K_INT_TX) {
419 if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)
420 ath_tx_edma_tasklet(sc);
421 else
422 ath_tx_tasklet(sc);
423 }
424
425 ath9k_btcoex_handle_interrupt(sc, status);
426
427 out:
428 /* re-enable hardware interrupt */
429 ath9k_hw_enable_interrupts(ah);
430
431 spin_unlock(&sc->sc_pcu_lock);
432 ath9k_ps_restore(sc);
433 }
434
435 irqreturn_t ath_isr(int irq, void *dev)
436 {
437 #define SCHED_INTR ( \
438 ATH9K_INT_FATAL | \
439 ATH9K_INT_BB_WATCHDOG | \
440 ATH9K_INT_RXORN | \
441 ATH9K_INT_RXEOL | \
442 ATH9K_INT_RX | \
443 ATH9K_INT_RXLP | \
444 ATH9K_INT_RXHP | \
445 ATH9K_INT_TX | \
446 ATH9K_INT_BMISS | \
447 ATH9K_INT_CST | \
448 ATH9K_INT_TSFOOR | \
449 ATH9K_INT_GENTIMER | \
450 ATH9K_INT_MCI)
451
452 struct ath_softc *sc = dev;
453 struct ath_hw *ah = sc->sc_ah;
454 struct ath_common *common = ath9k_hw_common(ah);
455 enum ath9k_int status;
456 bool sched = false;
457
458 /*
459 * The hardware is not ready/present, don't
460 * touch anything. Note this can happen early
461 * on if the IRQ is shared.
462 */
463 if (test_bit(SC_OP_INVALID, &sc->sc_flags))
464 return IRQ_NONE;
465
466 /* shared irq, not for us */
467
468 if (!ath9k_hw_intrpend(ah))
469 return IRQ_NONE;
470
471 if(test_bit(SC_OP_HW_RESET, &sc->sc_flags))
472 return IRQ_HANDLED;
473
474 /*
475 * Figure out the reason(s) for the interrupt. Note
476 * that the hal returns a pseudo-ISR that may include
477 * bits we haven't explicitly enabled so we mask the
478 * value to insure we only process bits we requested.
479 */
480 ath9k_hw_getisr(ah, &status); /* NB: clears ISR too */
481 status &= ah->imask; /* discard unasked-for bits */
482
483 /*
484 * If there are no status bits set, then this interrupt was not
485 * for me (should have been caught above).
486 */
487 if (!status)
488 return IRQ_NONE;
489
490 /* Cache the status */
491 sc->intrstatus = status;
492
493 if (status & SCHED_INTR)
494 sched = true;
495
496 /*
497 * If a FATAL or RXORN interrupt is received, we have to reset the
498 * chip immediately.
499 */
500 if ((status & ATH9K_INT_FATAL) || ((status & ATH9K_INT_RXORN) &&
501 !(ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)))
502 goto chip_reset;
503
504 if ((ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) &&
505 (status & ATH9K_INT_BB_WATCHDOG)) {
506
507 spin_lock(&common->cc_lock);
508 ath_hw_cycle_counters_update(common);
509 ar9003_hw_bb_watchdog_dbg_info(ah);
510 spin_unlock(&common->cc_lock);
511
512 goto chip_reset;
513 }
514
515 if (status & ATH9K_INT_SWBA)
516 tasklet_schedule(&sc->bcon_tasklet);
517
518 if (status & ATH9K_INT_TXURN)
519 ath9k_hw_updatetxtriglevel(ah, true);
520
521 if (status & ATH9K_INT_RXEOL) {
522 ah->imask &= ~(ATH9K_INT_RXEOL | ATH9K_INT_RXORN);
523 ath9k_hw_set_interrupts(ah);
524 }
525
526 if (!(ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP))
527 if (status & ATH9K_INT_TIM_TIMER) {
528 if (ATH_DBG_WARN_ON_ONCE(sc->ps_idle))
529 goto chip_reset;
530 /* Clear RxAbort bit so that we can
531 * receive frames */
532 ath9k_setpower(sc, ATH9K_PM_AWAKE);
533 spin_lock(&sc->sc_pm_lock);
534 ath9k_hw_setrxabort(sc->sc_ah, 0);
535 sc->ps_flags |= PS_WAIT_FOR_BEACON;
536 spin_unlock(&sc->sc_pm_lock);
537 }
538
539 chip_reset:
540
541 ath_debug_stat_interrupt(sc, status);
542
543 if (sched) {
544 /* turn off every interrupt */
545 ath9k_hw_disable_interrupts(ah);
546 tasklet_schedule(&sc->intr_tq);
547 }
548
549 return IRQ_HANDLED;
550
551 #undef SCHED_INTR
552 }
553
554 static int ath_reset(struct ath_softc *sc, bool retry_tx)
555 {
556 int r;
557
558 ath9k_ps_wakeup(sc);
559
560 r = ath_reset_internal(sc, NULL, retry_tx);
561
562 if (retry_tx) {
563 int i;
564 for (i = 0; i < ATH9K_NUM_TX_QUEUES; i++) {
565 if (ATH_TXQ_SETUP(sc, i)) {
566 spin_lock_bh(&sc->tx.txq[i].axq_lock);
567 ath_txq_schedule(sc, &sc->tx.txq[i]);
568 spin_unlock_bh(&sc->tx.txq[i].axq_lock);
569 }
570 }
571 }
572
573 ath9k_ps_restore(sc);
574
575 return r;
576 }
577
578 void ath_reset_work(struct work_struct *work)
579 {
580 struct ath_softc *sc = container_of(work, struct ath_softc, hw_reset_work);
581
582 ath_reset(sc, true);
583 }
584
585 /**********************/
586 /* mac80211 callbacks */
587 /**********************/
588
589 static int ath9k_start(struct ieee80211_hw *hw)
590 {
591 struct ath_softc *sc = hw->priv;
592 struct ath_hw *ah = sc->sc_ah;
593 struct ath_common *common = ath9k_hw_common(ah);
594 struct ieee80211_channel *curchan = hw->conf.channel;
595 struct ath9k_channel *init_channel;
596 int r;
597
598 ath_dbg(common, CONFIG,
599 "Starting driver with initial channel: %d MHz\n",
600 curchan->center_freq);
601
602 ath9k_ps_wakeup(sc);
603 mutex_lock(&sc->mutex);
604
605 init_channel = ath9k_cmn_get_curchannel(hw, ah);
606
607 /* Reset SERDES registers */
608 ath9k_hw_configpcipowersave(ah, false);
609
610 /*
611 * The basic interface to setting the hardware in a good
612 * state is ``reset''. On return the hardware is known to
613 * be powered up and with interrupts disabled. This must
614 * be followed by initialization of the appropriate bits
615 * and then setup of the interrupt mask.
616 */
617 spin_lock_bh(&sc->sc_pcu_lock);
618
619 atomic_set(&ah->intr_ref_cnt, -1);
620
621 r = ath9k_hw_reset(ah, init_channel, ah->caldata, false);
622 if (r) {
623 ath_err(common,
624 "Unable to reset hardware; reset status %d (freq %u MHz)\n",
625 r, curchan->center_freq);
626 spin_unlock_bh(&sc->sc_pcu_lock);
627 goto mutex_unlock;
628 }
629
630 /* Setup our intr mask. */
631 ah->imask = ATH9K_INT_TX | ATH9K_INT_RXEOL |
632 ATH9K_INT_RXORN | ATH9K_INT_FATAL |
633 ATH9K_INT_GLOBAL;
634
635 if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)
636 ah->imask |= ATH9K_INT_RXHP |
637 ATH9K_INT_RXLP |
638 ATH9K_INT_BB_WATCHDOG;
639 else
640 ah->imask |= ATH9K_INT_RX;
641
642 ah->imask |= ATH9K_INT_GTT;
643
644 if (ah->caps.hw_caps & ATH9K_HW_CAP_HT)
645 ah->imask |= ATH9K_INT_CST;
646
647 ath_mci_enable(sc);
648
649 clear_bit(SC_OP_INVALID, &sc->sc_flags);
650 sc->sc_ah->is_monitoring = false;
651
652 if (!ath_complete_reset(sc, false)) {
653 r = -EIO;
654 spin_unlock_bh(&sc->sc_pcu_lock);
655 goto mutex_unlock;
656 }
657
658 if (ah->led_pin >= 0) {
659 ath9k_hw_cfg_output(ah, ah->led_pin,
660 AR_GPIO_OUTPUT_MUX_AS_OUTPUT);
661 ath9k_hw_set_gpio(ah, ah->led_pin, 0);
662 }
663
664 /*
665 * Reset key cache to sane defaults (all entries cleared) instead of
666 * semi-random values after suspend/resume.
667 */
668 ath9k_cmn_init_crypto(sc->sc_ah);
669
670 spin_unlock_bh(&sc->sc_pcu_lock);
671
672 if (ah->caps.pcie_lcr_extsync_en && common->bus_ops->extn_synch_en)
673 common->bus_ops->extn_synch_en(common);
674
675 mutex_unlock:
676 mutex_unlock(&sc->mutex);
677
678 ath9k_ps_restore(sc);
679
680 return r;
681 }
682
683 static void ath9k_tx(struct ieee80211_hw *hw, struct sk_buff *skb)
684 {
685 struct ath_softc *sc = hw->priv;
686 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
687 struct ath_tx_control txctl;
688 struct ieee80211_hdr *hdr = (struct ieee80211_hdr *) skb->data;
689 unsigned long flags;
690
691 if (sc->ps_enabled) {
692 /*
693 * mac80211 does not set PM field for normal data frames, so we
694 * need to update that based on the current PS mode.
695 */
696 if (ieee80211_is_data(hdr->frame_control) &&
697 !ieee80211_is_nullfunc(hdr->frame_control) &&
698 !ieee80211_has_pm(hdr->frame_control)) {
699 ath_dbg(common, PS,
700 "Add PM=1 for a TX frame while in PS mode\n");
701 hdr->frame_control |= cpu_to_le16(IEEE80211_FCTL_PM);
702 }
703 }
704
705 if (unlikely(sc->sc_ah->power_mode == ATH9K_PM_NETWORK_SLEEP)) {
706 /*
707 * We are using PS-Poll and mac80211 can request TX while in
708 * power save mode. Need to wake up hardware for the TX to be
709 * completed and if needed, also for RX of buffered frames.
710 */
711 ath9k_ps_wakeup(sc);
712 spin_lock_irqsave(&sc->sc_pm_lock, flags);
713 if (!(sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP))
714 ath9k_hw_setrxabort(sc->sc_ah, 0);
715 if (ieee80211_is_pspoll(hdr->frame_control)) {
716 ath_dbg(common, PS,
717 "Sending PS-Poll to pick a buffered frame\n");
718 sc->ps_flags |= PS_WAIT_FOR_PSPOLL_DATA;
719 } else {
720 ath_dbg(common, PS, "Wake up to complete TX\n");
721 sc->ps_flags |= PS_WAIT_FOR_TX_ACK;
722 }
723 /*
724 * The actual restore operation will happen only after
725 * the ps_flags bit is cleared. We are just dropping
726 * the ps_usecount here.
727 */
728 spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
729 ath9k_ps_restore(sc);
730 }
731
732 /*
733 * Cannot tx while the hardware is in full sleep, it first needs a full
734 * chip reset to recover from that
735 */
736 if (unlikely(sc->sc_ah->power_mode == ATH9K_PM_FULL_SLEEP)) {
737 ath_err(common, "TX while HW is in FULL_SLEEP mode\n");
738 goto exit;
739 }
740
741 memset(&txctl, 0, sizeof(struct ath_tx_control));
742 txctl.txq = sc->tx.txq_map[skb_get_queue_mapping(skb)];
743
744 ath_dbg(common, XMIT, "transmitting packet, skb: %p\n", skb);
745
746 if (ath_tx_start(hw, skb, &txctl) != 0) {
747 ath_dbg(common, XMIT, "TX failed\n");
748 TX_STAT_INC(txctl.txq->axq_qnum, txfailed);
749 goto exit;
750 }
751
752 return;
753 exit:
754 dev_kfree_skb_any(skb);
755 }
756
757 static void ath9k_stop(struct ieee80211_hw *hw)
758 {
759 struct ath_softc *sc = hw->priv;
760 struct ath_hw *ah = sc->sc_ah;
761 struct ath_common *common = ath9k_hw_common(ah);
762 bool prev_idle;
763
764 mutex_lock(&sc->mutex);
765
766 ath_cancel_work(sc);
767 del_timer_sync(&sc->rx_poll_timer);
768
769 if (test_bit(SC_OP_INVALID, &sc->sc_flags)) {
770 ath_dbg(common, ANY, "Device not present\n");
771 mutex_unlock(&sc->mutex);
772 return;
773 }
774
775 /* Ensure HW is awake when we try to shut it down. */
776 ath9k_ps_wakeup(sc);
777
778 spin_lock_bh(&sc->sc_pcu_lock);
779
780 /* prevent tasklets to enable interrupts once we disable them */
781 ah->imask &= ~ATH9K_INT_GLOBAL;
782
783 /* make sure h/w will not generate any interrupt
784 * before setting the invalid flag. */
785 ath9k_hw_disable_interrupts(ah);
786
787 spin_unlock_bh(&sc->sc_pcu_lock);
788
789 /* we can now sync irq and kill any running tasklets, since we already
790 * disabled interrupts and not holding a spin lock */
791 synchronize_irq(sc->irq);
792 tasklet_kill(&sc->intr_tq);
793 tasklet_kill(&sc->bcon_tasklet);
794
795 prev_idle = sc->ps_idle;
796 sc->ps_idle = true;
797
798 spin_lock_bh(&sc->sc_pcu_lock);
799
800 if (ah->led_pin >= 0) {
801 ath9k_hw_set_gpio(ah, ah->led_pin, 1);
802 ath9k_hw_cfg_gpio_input(ah, ah->led_pin);
803 }
804
805 ath_prepare_reset(sc, false, true);
806
807 if (sc->rx.frag) {
808 dev_kfree_skb_any(sc->rx.frag);
809 sc->rx.frag = NULL;
810 }
811
812 if (!ah->curchan)
813 ah->curchan = ath9k_cmn_get_curchannel(hw, ah);
814
815 ath9k_hw_reset(ah, ah->curchan, ah->caldata, false);
816 ath9k_hw_phy_disable(ah);
817
818 ath9k_hw_configpcipowersave(ah, true);
819
820 spin_unlock_bh(&sc->sc_pcu_lock);
821
822 ath9k_ps_restore(sc);
823
824 set_bit(SC_OP_INVALID, &sc->sc_flags);
825 sc->ps_idle = prev_idle;
826
827 mutex_unlock(&sc->mutex);
828
829 ath_dbg(common, CONFIG, "Driver halt\n");
830 }
831
832 bool ath9k_uses_beacons(int type)
833 {
834 switch (type) {
835 case NL80211_IFTYPE_AP:
836 case NL80211_IFTYPE_ADHOC:
837 case NL80211_IFTYPE_MESH_POINT:
838 return true;
839 default:
840 return false;
841 }
842 }
843
844 static void ath9k_reclaim_beacon(struct ath_softc *sc,
845 struct ieee80211_vif *vif)
846 {
847 struct ath_vif *avp = (void *)vif->drv_priv;
848
849 ath9k_set_beaconing_status(sc, false);
850 ath_beacon_return(sc, avp);
851 ath9k_set_beaconing_status(sc, true);
852 }
853
854 static void ath9k_vif_iter(void *data, u8 *mac, struct ieee80211_vif *vif)
855 {
856 struct ath9k_vif_iter_data *iter_data = data;
857 int i;
858
859 if (iter_data->hw_macaddr)
860 for (i = 0; i < ETH_ALEN; i++)
861 iter_data->mask[i] &=
862 ~(iter_data->hw_macaddr[i] ^ mac[i]);
863
864 switch (vif->type) {
865 case NL80211_IFTYPE_AP:
866 iter_data->naps++;
867 break;
868 case NL80211_IFTYPE_STATION:
869 iter_data->nstations++;
870 break;
871 case NL80211_IFTYPE_ADHOC:
872 iter_data->nadhocs++;
873 break;
874 case NL80211_IFTYPE_MESH_POINT:
875 iter_data->nmeshes++;
876 break;
877 case NL80211_IFTYPE_WDS:
878 iter_data->nwds++;
879 break;
880 default:
881 break;
882 }
883 }
884
885 /* Called with sc->mutex held. */
886 void ath9k_calculate_iter_data(struct ieee80211_hw *hw,
887 struct ieee80211_vif *vif,
888 struct ath9k_vif_iter_data *iter_data)
889 {
890 struct ath_softc *sc = hw->priv;
891 struct ath_hw *ah = sc->sc_ah;
892 struct ath_common *common = ath9k_hw_common(ah);
893
894 /*
895 * Use the hardware MAC address as reference, the hardware uses it
896 * together with the BSSID mask when matching addresses.
897 */
898 memset(iter_data, 0, sizeof(*iter_data));
899 iter_data->hw_macaddr = common->macaddr;
900 memset(&iter_data->mask, 0xff, ETH_ALEN);
901
902 if (vif)
903 ath9k_vif_iter(iter_data, vif->addr, vif);
904
905 /* Get list of all active MAC addresses */
906 ieee80211_iterate_active_interfaces_atomic(sc->hw, ath9k_vif_iter,
907 iter_data);
908 }
909
910 /* Called with sc->mutex held. */
911 static void ath9k_calculate_summary_state(struct ieee80211_hw *hw,
912 struct ieee80211_vif *vif)
913 {
914 struct ath_softc *sc = hw->priv;
915 struct ath_hw *ah = sc->sc_ah;
916 struct ath_common *common = ath9k_hw_common(ah);
917 struct ath9k_vif_iter_data iter_data;
918
919 ath9k_calculate_iter_data(hw, vif, &iter_data);
920
921 /* Set BSSID mask. */
922 memcpy(common->bssidmask, iter_data.mask, ETH_ALEN);
923 ath_hw_setbssidmask(common);
924
925 /* Set op-mode & TSF */
926 if (iter_data.naps > 0) {
927 ath9k_hw_set_tsfadjust(ah, 1);
928 set_bit(SC_OP_TSF_RESET, &sc->sc_flags);
929 ah->opmode = NL80211_IFTYPE_AP;
930 } else {
931 ath9k_hw_set_tsfadjust(ah, 0);
932 clear_bit(SC_OP_TSF_RESET, &sc->sc_flags);
933
934 if (iter_data.nmeshes)
935 ah->opmode = NL80211_IFTYPE_MESH_POINT;
936 else if (iter_data.nwds)
937 ah->opmode = NL80211_IFTYPE_AP;
938 else if (iter_data.nadhocs)
939 ah->opmode = NL80211_IFTYPE_ADHOC;
940 else
941 ah->opmode = NL80211_IFTYPE_STATION;
942 }
943
944 /*
945 * Enable MIB interrupts when there are hardware phy counters.
946 */
947 if ((iter_data.nstations + iter_data.nadhocs + iter_data.nmeshes) > 0)
948 ah->imask |= ATH9K_INT_TSFOOR;
949 else
950 ah->imask &= ~ATH9K_INT_TSFOOR;
951
952 ath9k_hw_set_interrupts(ah);
953
954 /* Set up ANI */
955 if (iter_data.naps > 0) {
956 sc->sc_ah->stats.avgbrssi = ATH_RSSI_DUMMY_MARKER;
957
958 if (!common->disable_ani) {
959 set_bit(SC_OP_ANI_RUN, &sc->sc_flags);
960 ath_start_ani(common);
961 }
962
963 } else {
964 clear_bit(SC_OP_ANI_RUN, &sc->sc_flags);
965 del_timer_sync(&common->ani.timer);
966 }
967 }
968
969 /* Called with sc->mutex held, vif counts set up properly. */
970 static void ath9k_do_vif_add_setup(struct ieee80211_hw *hw,
971 struct ieee80211_vif *vif)
972 {
973 struct ath_softc *sc = hw->priv;
974
975 ath9k_calculate_summary_state(hw, vif);
976
977 if (ath9k_uses_beacons(vif->type)) {
978 /* Reserve a beacon slot for the vif */
979 ath9k_set_beaconing_status(sc, false);
980 ath_beacon_alloc(sc, vif);
981 ath9k_set_beaconing_status(sc, true);
982 }
983 }
984
985 static int ath9k_add_interface(struct ieee80211_hw *hw,
986 struct ieee80211_vif *vif)
987 {
988 struct ath_softc *sc = hw->priv;
989 struct ath_hw *ah = sc->sc_ah;
990 struct ath_common *common = ath9k_hw_common(ah);
991 int ret = 0;
992
993 ath9k_ps_wakeup(sc);
994 mutex_lock(&sc->mutex);
995
996 switch (vif->type) {
997 case NL80211_IFTYPE_STATION:
998 case NL80211_IFTYPE_WDS:
999 case NL80211_IFTYPE_ADHOC:
1000 case NL80211_IFTYPE_AP:
1001 case NL80211_IFTYPE_MESH_POINT:
1002 break;
1003 default:
1004 ath_err(common, "Interface type %d not yet supported\n",
1005 vif->type);
1006 ret = -EOPNOTSUPP;
1007 goto out;
1008 }
1009
1010 if (ath9k_uses_beacons(vif->type)) {
1011 if (sc->nbcnvifs >= ATH_BCBUF) {
1012 ath_err(common, "Not enough beacon buffers when adding"
1013 " new interface of type: %i\n",
1014 vif->type);
1015 ret = -ENOBUFS;
1016 goto out;
1017 }
1018 }
1019
1020 ath_dbg(common, CONFIG, "Attach a VIF of type: %d\n", vif->type);
1021
1022 sc->nvifs++;
1023
1024 ath9k_do_vif_add_setup(hw, vif);
1025 out:
1026 mutex_unlock(&sc->mutex);
1027 ath9k_ps_restore(sc);
1028 return ret;
1029 }
1030
1031 static int ath9k_change_interface(struct ieee80211_hw *hw,
1032 struct ieee80211_vif *vif,
1033 enum nl80211_iftype new_type,
1034 bool p2p)
1035 {
1036 struct ath_softc *sc = hw->priv;
1037 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1038 int ret = 0;
1039
1040 ath_dbg(common, CONFIG, "Change Interface\n");
1041 mutex_lock(&sc->mutex);
1042 ath9k_ps_wakeup(sc);
1043
1044 if (ath9k_uses_beacons(new_type) &&
1045 !ath9k_uses_beacons(vif->type)) {
1046 if (sc->nbcnvifs >= ATH_BCBUF) {
1047 ath_err(common, "No beacon slot available\n");
1048 ret = -ENOBUFS;
1049 goto out;
1050 }
1051 }
1052
1053 /* Clean up old vif stuff */
1054 if (ath9k_uses_beacons(vif->type))
1055 ath9k_reclaim_beacon(sc, vif);
1056
1057 /* Add new settings */
1058 vif->type = new_type;
1059 vif->p2p = p2p;
1060
1061 ath9k_do_vif_add_setup(hw, vif);
1062 out:
1063 ath9k_ps_restore(sc);
1064 mutex_unlock(&sc->mutex);
1065 return ret;
1066 }
1067
1068 static void ath9k_remove_interface(struct ieee80211_hw *hw,
1069 struct ieee80211_vif *vif)
1070 {
1071 struct ath_softc *sc = hw->priv;
1072 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1073
1074 ath_dbg(common, CONFIG, "Detach Interface\n");
1075
1076 ath9k_ps_wakeup(sc);
1077 mutex_lock(&sc->mutex);
1078
1079 sc->nvifs--;
1080
1081 /* Reclaim beacon resources */
1082 if (ath9k_uses_beacons(vif->type))
1083 ath9k_reclaim_beacon(sc, vif);
1084
1085 ath9k_calculate_summary_state(hw, NULL);
1086
1087 mutex_unlock(&sc->mutex);
1088 ath9k_ps_restore(sc);
1089 }
1090
1091 static void ath9k_enable_ps(struct ath_softc *sc)
1092 {
1093 struct ath_hw *ah = sc->sc_ah;
1094 struct ath_common *common = ath9k_hw_common(ah);
1095
1096 sc->ps_enabled = true;
1097 if (!(ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP)) {
1098 if ((ah->imask & ATH9K_INT_TIM_TIMER) == 0) {
1099 ah->imask |= ATH9K_INT_TIM_TIMER;
1100 ath9k_hw_set_interrupts(ah);
1101 }
1102 ath9k_hw_setrxabort(ah, 1);
1103 }
1104 ath_dbg(common, PS, "PowerSave enabled\n");
1105 }
1106
1107 static void ath9k_disable_ps(struct ath_softc *sc)
1108 {
1109 struct ath_hw *ah = sc->sc_ah;
1110 struct ath_common *common = ath9k_hw_common(ah);
1111
1112 sc->ps_enabled = false;
1113 ath9k_hw_setpower(ah, ATH9K_PM_AWAKE);
1114 if (!(ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP)) {
1115 ath9k_hw_setrxabort(ah, 0);
1116 sc->ps_flags &= ~(PS_WAIT_FOR_BEACON |
1117 PS_WAIT_FOR_CAB |
1118 PS_WAIT_FOR_PSPOLL_DATA |
1119 PS_WAIT_FOR_TX_ACK);
1120 if (ah->imask & ATH9K_INT_TIM_TIMER) {
1121 ah->imask &= ~ATH9K_INT_TIM_TIMER;
1122 ath9k_hw_set_interrupts(ah);
1123 }
1124 }
1125 ath_dbg(common, PS, "PowerSave disabled\n");
1126 }
1127
1128 static int ath9k_config(struct ieee80211_hw *hw, u32 changed)
1129 {
1130 struct ath_softc *sc = hw->priv;
1131 struct ath_hw *ah = sc->sc_ah;
1132 struct ath_common *common = ath9k_hw_common(ah);
1133 struct ieee80211_conf *conf = &hw->conf;
1134 bool reset_channel = false;
1135
1136 ath9k_ps_wakeup(sc);
1137 mutex_lock(&sc->mutex);
1138
1139 if (changed & IEEE80211_CONF_CHANGE_IDLE) {
1140 sc->ps_idle = !!(conf->flags & IEEE80211_CONF_IDLE);
1141 if (sc->ps_idle) {
1142 ath_cancel_work(sc);
1143 ath9k_stop_btcoex(sc);
1144 } else {
1145 ath9k_start_btcoex(sc);
1146 /*
1147 * The chip needs a reset to properly wake up from
1148 * full sleep
1149 */
1150 reset_channel = ah->chip_fullsleep;
1151 }
1152 }
1153
1154 /*
1155 * We just prepare to enable PS. We have to wait until our AP has
1156 * ACK'd our null data frame to disable RX otherwise we'll ignore
1157 * those ACKs and end up retransmitting the same null data frames.
1158 * IEEE80211_CONF_CHANGE_PS is only passed by mac80211 for STA mode.
1159 */
1160 if (changed & IEEE80211_CONF_CHANGE_PS) {
1161 unsigned long flags;
1162 spin_lock_irqsave(&sc->sc_pm_lock, flags);
1163 if (conf->flags & IEEE80211_CONF_PS)
1164 ath9k_enable_ps(sc);
1165 else
1166 ath9k_disable_ps(sc);
1167 spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
1168 }
1169
1170 if (changed & IEEE80211_CONF_CHANGE_MONITOR) {
1171 if (conf->flags & IEEE80211_CONF_MONITOR) {
1172 ath_dbg(common, CONFIG, "Monitor mode is enabled\n");
1173 sc->sc_ah->is_monitoring = true;
1174 } else {
1175 ath_dbg(common, CONFIG, "Monitor mode is disabled\n");
1176 sc->sc_ah->is_monitoring = false;
1177 }
1178 }
1179
1180 if ((changed & IEEE80211_CONF_CHANGE_CHANNEL) || reset_channel) {
1181 struct ieee80211_channel *curchan = hw->conf.channel;
1182 int pos = curchan->hw_value;
1183 int old_pos = -1;
1184 unsigned long flags;
1185
1186 if (ah->curchan)
1187 old_pos = ah->curchan - &ah->channels[0];
1188
1189 ath_dbg(common, CONFIG, "Set channel: %d MHz type: %d\n",
1190 curchan->center_freq, conf->channel_type);
1191
1192 /* update survey stats for the old channel before switching */
1193 spin_lock_irqsave(&common->cc_lock, flags);
1194 ath_update_survey_stats(sc);
1195 spin_unlock_irqrestore(&common->cc_lock, flags);
1196
1197 /*
1198 * Preserve the current channel values, before updating
1199 * the same channel
1200 */
1201 if (ah->curchan && (old_pos == pos))
1202 ath9k_hw_getnf(ah, ah->curchan);
1203
1204 ath9k_cmn_update_ichannel(&sc->sc_ah->channels[pos],
1205 curchan, conf->channel_type);
1206
1207 /*
1208 * If the operating channel changes, change the survey in-use flags
1209 * along with it.
1210 * Reset the survey data for the new channel, unless we're switching
1211 * back to the operating channel from an off-channel operation.
1212 */
1213 if (!(hw->conf.flags & IEEE80211_CONF_OFFCHANNEL) &&
1214 sc->cur_survey != &sc->survey[pos]) {
1215
1216 if (sc->cur_survey)
1217 sc->cur_survey->filled &= ~SURVEY_INFO_IN_USE;
1218
1219 sc->cur_survey = &sc->survey[pos];
1220
1221 memset(sc->cur_survey, 0, sizeof(struct survey_info));
1222 sc->cur_survey->filled |= SURVEY_INFO_IN_USE;
1223 } else if (!(sc->survey[pos].filled & SURVEY_INFO_IN_USE)) {
1224 memset(&sc->survey[pos], 0, sizeof(struct survey_info));
1225 }
1226
1227 if (ath_set_channel(sc, hw, &sc->sc_ah->channels[pos]) < 0) {
1228 ath_err(common, "Unable to set channel\n");
1229 mutex_unlock(&sc->mutex);
1230 ath9k_ps_restore(sc);
1231 return -EINVAL;
1232 }
1233
1234 /*
1235 * The most recent snapshot of channel->noisefloor for the old
1236 * channel is only available after the hardware reset. Copy it to
1237 * the survey stats now.
1238 */
1239 if (old_pos >= 0)
1240 ath_update_survey_nf(sc, old_pos);
1241 }
1242
1243 if (changed & IEEE80211_CONF_CHANGE_POWER) {
1244 ath_dbg(common, CONFIG, "Set power: %d\n", conf->power_level);
1245 sc->config.txpowlimit = 2 * conf->power_level;
1246 ath9k_cmn_update_txpow(ah, sc->curtxpow,
1247 sc->config.txpowlimit, &sc->curtxpow);
1248 }
1249
1250 mutex_unlock(&sc->mutex);
1251 ath9k_ps_restore(sc);
1252
1253 return 0;
1254 }
1255
1256 #define SUPPORTED_FILTERS \
1257 (FIF_PROMISC_IN_BSS | \
1258 FIF_ALLMULTI | \
1259 FIF_CONTROL | \
1260 FIF_PSPOLL | \
1261 FIF_OTHER_BSS | \
1262 FIF_BCN_PRBRESP_PROMISC | \
1263 FIF_PROBE_REQ | \
1264 FIF_FCSFAIL)
1265
1266 /* FIXME: sc->sc_full_reset ? */
1267 static void ath9k_configure_filter(struct ieee80211_hw *hw,
1268 unsigned int changed_flags,
1269 unsigned int *total_flags,
1270 u64 multicast)
1271 {
1272 struct ath_softc *sc = hw->priv;
1273 u32 rfilt;
1274
1275 changed_flags &= SUPPORTED_FILTERS;
1276 *total_flags &= SUPPORTED_FILTERS;
1277
1278 sc->rx.rxfilter = *total_flags;
1279 ath9k_ps_wakeup(sc);
1280 rfilt = ath_calcrxfilter(sc);
1281 ath9k_hw_setrxfilter(sc->sc_ah, rfilt);
1282 ath9k_ps_restore(sc);
1283
1284 ath_dbg(ath9k_hw_common(sc->sc_ah), CONFIG, "Set HW RX filter: 0x%x\n",
1285 rfilt);
1286 }
1287
1288 static int ath9k_sta_add(struct ieee80211_hw *hw,
1289 struct ieee80211_vif *vif,
1290 struct ieee80211_sta *sta)
1291 {
1292 struct ath_softc *sc = hw->priv;
1293 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1294 struct ath_node *an = (struct ath_node *) sta->drv_priv;
1295 struct ieee80211_key_conf ps_key = { };
1296
1297 ath_node_attach(sc, sta, vif);
1298
1299 if (vif->type != NL80211_IFTYPE_AP &&
1300 vif->type != NL80211_IFTYPE_AP_VLAN)
1301 return 0;
1302
1303 an->ps_key = ath_key_config(common, vif, sta, &ps_key);
1304
1305 return 0;
1306 }
1307
1308 static void ath9k_del_ps_key(struct ath_softc *sc,
1309 struct ieee80211_vif *vif,
1310 struct ieee80211_sta *sta)
1311 {
1312 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1313 struct ath_node *an = (struct ath_node *) sta->drv_priv;
1314 struct ieee80211_key_conf ps_key = { .hw_key_idx = an->ps_key };
1315
1316 if (!an->ps_key)
1317 return;
1318
1319 ath_key_delete(common, &ps_key);
1320 }
1321
1322 static int ath9k_sta_remove(struct ieee80211_hw *hw,
1323 struct ieee80211_vif *vif,
1324 struct ieee80211_sta *sta)
1325 {
1326 struct ath_softc *sc = hw->priv;
1327
1328 ath9k_del_ps_key(sc, vif, sta);
1329 ath_node_detach(sc, sta);
1330
1331 return 0;
1332 }
1333
1334 static void ath9k_sta_notify(struct ieee80211_hw *hw,
1335 struct ieee80211_vif *vif,
1336 enum sta_notify_cmd cmd,
1337 struct ieee80211_sta *sta)
1338 {
1339 struct ath_softc *sc = hw->priv;
1340 struct ath_node *an = (struct ath_node *) sta->drv_priv;
1341
1342 if (!sta->ht_cap.ht_supported)
1343 return;
1344
1345 switch (cmd) {
1346 case STA_NOTIFY_SLEEP:
1347 an->sleeping = true;
1348 ath_tx_aggr_sleep(sta, sc, an);
1349 break;
1350 case STA_NOTIFY_AWAKE:
1351 an->sleeping = false;
1352 ath_tx_aggr_wakeup(sc, an);
1353 break;
1354 }
1355 }
1356
1357 static int ath9k_conf_tx(struct ieee80211_hw *hw,
1358 struct ieee80211_vif *vif, u16 queue,
1359 const struct ieee80211_tx_queue_params *params)
1360 {
1361 struct ath_softc *sc = hw->priv;
1362 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1363 struct ath_txq *txq;
1364 struct ath9k_tx_queue_info qi;
1365 int ret = 0;
1366
1367 if (queue >= WME_NUM_AC)
1368 return 0;
1369
1370 txq = sc->tx.txq_map[queue];
1371
1372 ath9k_ps_wakeup(sc);
1373 mutex_lock(&sc->mutex);
1374
1375 memset(&qi, 0, sizeof(struct ath9k_tx_queue_info));
1376
1377 qi.tqi_aifs = params->aifs;
1378 qi.tqi_cwmin = params->cw_min;
1379 qi.tqi_cwmax = params->cw_max;
1380 qi.tqi_burstTime = params->txop;
1381
1382 ath_dbg(common, CONFIG,
1383 "Configure tx [queue/halq] [%d/%d], aifs: %d, cw_min: %d, cw_max: %d, txop: %d\n",
1384 queue, txq->axq_qnum, params->aifs, params->cw_min,
1385 params->cw_max, params->txop);
1386
1387 ret = ath_txq_update(sc, txq->axq_qnum, &qi);
1388 if (ret)
1389 ath_err(common, "TXQ Update failed\n");
1390
1391 if (sc->sc_ah->opmode == NL80211_IFTYPE_ADHOC)
1392 if (queue == WME_AC_BE && !ret)
1393 ath_beaconq_config(sc);
1394
1395 mutex_unlock(&sc->mutex);
1396 ath9k_ps_restore(sc);
1397
1398 return ret;
1399 }
1400
1401 static int ath9k_set_key(struct ieee80211_hw *hw,
1402 enum set_key_cmd cmd,
1403 struct ieee80211_vif *vif,
1404 struct ieee80211_sta *sta,
1405 struct ieee80211_key_conf *key)
1406 {
1407 struct ath_softc *sc = hw->priv;
1408 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1409 int ret = 0;
1410
1411 if (ath9k_modparam_nohwcrypt)
1412 return -ENOSPC;
1413
1414 if ((vif->type == NL80211_IFTYPE_ADHOC ||
1415 vif->type == NL80211_IFTYPE_MESH_POINT) &&
1416 (key->cipher == WLAN_CIPHER_SUITE_TKIP ||
1417 key->cipher == WLAN_CIPHER_SUITE_CCMP) &&
1418 !(key->flags & IEEE80211_KEY_FLAG_PAIRWISE)) {
1419 /*
1420 * For now, disable hw crypto for the RSN IBSS group keys. This
1421 * could be optimized in the future to use a modified key cache
1422 * design to support per-STA RX GTK, but until that gets
1423 * implemented, use of software crypto for group addressed
1424 * frames is a acceptable to allow RSN IBSS to be used.
1425 */
1426 return -EOPNOTSUPP;
1427 }
1428
1429 mutex_lock(&sc->mutex);
1430 ath9k_ps_wakeup(sc);
1431 ath_dbg(common, CONFIG, "Set HW Key\n");
1432
1433 switch (cmd) {
1434 case SET_KEY:
1435 if (sta)
1436 ath9k_del_ps_key(sc, vif, sta);
1437
1438 ret = ath_key_config(common, vif, sta, key);
1439 if (ret >= 0) {
1440 key->hw_key_idx = ret;
1441 /* push IV and Michael MIC generation to stack */
1442 key->flags |= IEEE80211_KEY_FLAG_GENERATE_IV;
1443 if (key->cipher == WLAN_CIPHER_SUITE_TKIP)
1444 key->flags |= IEEE80211_KEY_FLAG_GENERATE_MMIC;
1445 if (sc->sc_ah->sw_mgmt_crypto &&
1446 key->cipher == WLAN_CIPHER_SUITE_CCMP)
1447 key->flags |= IEEE80211_KEY_FLAG_SW_MGMT;
1448 ret = 0;
1449 }
1450 break;
1451 case DISABLE_KEY:
1452 ath_key_delete(common, key);
1453 break;
1454 default:
1455 ret = -EINVAL;
1456 }
1457
1458 ath9k_ps_restore(sc);
1459 mutex_unlock(&sc->mutex);
1460
1461 return ret;
1462 }
1463 static void ath9k_bss_iter(void *data, u8 *mac, struct ieee80211_vif *vif)
1464 {
1465 struct ath_softc *sc = data;
1466 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1467 struct ieee80211_bss_conf *bss_conf = &vif->bss_conf;
1468 struct ath_vif *avp = (void *)vif->drv_priv;
1469 unsigned long flags;
1470 /*
1471 * Skip iteration if primary station vif's bss info
1472 * was not changed
1473 */
1474 if (test_bit(SC_OP_PRIM_STA_VIF, &sc->sc_flags))
1475 return;
1476
1477 if (bss_conf->assoc) {
1478 set_bit(SC_OP_PRIM_STA_VIF, &sc->sc_flags);
1479 avp->primary_sta_vif = true;
1480 memcpy(common->curbssid, bss_conf->bssid, ETH_ALEN);
1481 common->curaid = bss_conf->aid;
1482 ath9k_hw_write_associd(sc->sc_ah);
1483 ath_dbg(common, CONFIG, "Bss Info ASSOC %d, bssid: %pM\n",
1484 bss_conf->aid, common->curbssid);
1485 ath_beacon_config(sc, vif);
1486 /*
1487 * Request a re-configuration of Beacon related timers
1488 * on the receipt of the first Beacon frame (i.e.,
1489 * after time sync with the AP).
1490 */
1491 spin_lock_irqsave(&sc->sc_pm_lock, flags);
1492 sc->ps_flags |= PS_BEACON_SYNC | PS_WAIT_FOR_BEACON;
1493 spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
1494
1495 /* Reset rssi stats */
1496 sc->last_rssi = ATH_RSSI_DUMMY_MARKER;
1497 sc->sc_ah->stats.avgbrssi = ATH_RSSI_DUMMY_MARKER;
1498
1499 ath_start_rx_poll(sc, 3);
1500
1501 if (!common->disable_ani) {
1502 set_bit(SC_OP_ANI_RUN, &sc->sc_flags);
1503 ath_start_ani(common);
1504 }
1505
1506 }
1507 }
1508
1509 static void ath9k_config_bss(struct ath_softc *sc, struct ieee80211_vif *vif)
1510 {
1511 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1512 struct ieee80211_bss_conf *bss_conf = &vif->bss_conf;
1513 struct ath_vif *avp = (void *)vif->drv_priv;
1514
1515 if (sc->sc_ah->opmode != NL80211_IFTYPE_STATION)
1516 return;
1517
1518 /* Reconfigure bss info */
1519 if (avp->primary_sta_vif && !bss_conf->assoc) {
1520 ath_dbg(common, CONFIG, "Bss Info DISASSOC %d, bssid %pM\n",
1521 common->curaid, common->curbssid);
1522 clear_bit(SC_OP_PRIM_STA_VIF, &sc->sc_flags);
1523 clear_bit(SC_OP_BEACONS, &sc->sc_flags);
1524 avp->primary_sta_vif = false;
1525 memset(common->curbssid, 0, ETH_ALEN);
1526 common->curaid = 0;
1527 }
1528
1529 ieee80211_iterate_active_interfaces_atomic(
1530 sc->hw, ath9k_bss_iter, sc);
1531
1532 /*
1533 * None of station vifs are associated.
1534 * Clear bssid & aid
1535 */
1536 if (!test_bit(SC_OP_PRIM_STA_VIF, &sc->sc_flags)) {
1537 ath9k_hw_write_associd(sc->sc_ah);
1538 clear_bit(SC_OP_ANI_RUN, &sc->sc_flags);
1539 del_timer_sync(&common->ani.timer);
1540 del_timer_sync(&sc->rx_poll_timer);
1541 memset(&sc->caldata, 0, sizeof(sc->caldata));
1542 }
1543 }
1544
1545 static void ath9k_bss_info_changed(struct ieee80211_hw *hw,
1546 struct ieee80211_vif *vif,
1547 struct ieee80211_bss_conf *bss_conf,
1548 u32 changed)
1549 {
1550 struct ath_softc *sc = hw->priv;
1551 struct ath_hw *ah = sc->sc_ah;
1552 struct ath_common *common = ath9k_hw_common(ah);
1553 struct ath_vif *avp = (void *)vif->drv_priv;
1554 int slottime;
1555
1556 ath9k_ps_wakeup(sc);
1557 mutex_lock(&sc->mutex);
1558
1559 if (changed & BSS_CHANGED_ASSOC) {
1560 ath9k_config_bss(sc, vif);
1561
1562 ath_dbg(common, CONFIG, "BSSID: %pM aid: 0x%x\n",
1563 common->curbssid, common->curaid);
1564 }
1565
1566 if (changed & BSS_CHANGED_IBSS) {
1567 /* There can be only one vif available */
1568 memcpy(common->curbssid, bss_conf->bssid, ETH_ALEN);
1569 common->curaid = bss_conf->aid;
1570 ath9k_hw_write_associd(sc->sc_ah);
1571
1572 if (bss_conf->ibss_joined) {
1573 sc->sc_ah->stats.avgbrssi = ATH_RSSI_DUMMY_MARKER;
1574
1575 if (!common->disable_ani) {
1576 set_bit(SC_OP_ANI_RUN, &sc->sc_flags);
1577 ath_start_ani(common);
1578 }
1579
1580 } else {
1581 clear_bit(SC_OP_ANI_RUN, &sc->sc_flags);
1582 del_timer_sync(&common->ani.timer);
1583 del_timer_sync(&sc->rx_poll_timer);
1584 }
1585 }
1586
1587 /*
1588 * In case of AP mode, the HW TSF has to be reset
1589 * when the beacon interval changes.
1590 */
1591 if ((changed & BSS_CHANGED_BEACON_INT) &&
1592 (vif->type == NL80211_IFTYPE_AP))
1593 set_bit(SC_OP_TSF_RESET, &sc->sc_flags);
1594
1595 /* Configure beaconing (AP, IBSS, MESH) */
1596 if (ath9k_uses_beacons(vif->type) &&
1597 ((changed & BSS_CHANGED_BEACON) ||
1598 (changed & BSS_CHANGED_BEACON_ENABLED) ||
1599 (changed & BSS_CHANGED_BEACON_INT))) {
1600 ath9k_set_beaconing_status(sc, false);
1601 if (bss_conf->enable_beacon)
1602 ath_beacon_alloc(sc, vif);
1603 else
1604 avp->is_bslot_active = false;
1605 ath_beacon_config(sc, vif);
1606 ath9k_set_beaconing_status(sc, true);
1607 }
1608
1609 if (changed & BSS_CHANGED_ERP_SLOT) {
1610 if (bss_conf->use_short_slot)
1611 slottime = 9;
1612 else
1613 slottime = 20;
1614 if (vif->type == NL80211_IFTYPE_AP) {
1615 /*
1616 * Defer update, so that connected stations can adjust
1617 * their settings at the same time.
1618 * See beacon.c for more details
1619 */
1620 sc->beacon.slottime = slottime;
1621 sc->beacon.updateslot = UPDATE;
1622 } else {
1623 ah->slottime = slottime;
1624 ath9k_hw_init_global_settings(ah);
1625 }
1626 }
1627
1628 mutex_unlock(&sc->mutex);
1629 ath9k_ps_restore(sc);
1630 }
1631
1632 static u64 ath9k_get_tsf(struct ieee80211_hw *hw, struct ieee80211_vif *vif)
1633 {
1634 struct ath_softc *sc = hw->priv;
1635 u64 tsf;
1636
1637 mutex_lock(&sc->mutex);
1638 ath9k_ps_wakeup(sc);
1639 tsf = ath9k_hw_gettsf64(sc->sc_ah);
1640 ath9k_ps_restore(sc);
1641 mutex_unlock(&sc->mutex);
1642
1643 return tsf;
1644 }
1645
1646 static void ath9k_set_tsf(struct ieee80211_hw *hw,
1647 struct ieee80211_vif *vif,
1648 u64 tsf)
1649 {
1650 struct ath_softc *sc = hw->priv;
1651
1652 mutex_lock(&sc->mutex);
1653 ath9k_ps_wakeup(sc);
1654 ath9k_hw_settsf64(sc->sc_ah, tsf);
1655 ath9k_ps_restore(sc);
1656 mutex_unlock(&sc->mutex);
1657 }
1658
1659 static void ath9k_reset_tsf(struct ieee80211_hw *hw, struct ieee80211_vif *vif)
1660 {
1661 struct ath_softc *sc = hw->priv;
1662
1663 mutex_lock(&sc->mutex);
1664
1665 ath9k_ps_wakeup(sc);
1666 ath9k_hw_reset_tsf(sc->sc_ah);
1667 ath9k_ps_restore(sc);
1668
1669 mutex_unlock(&sc->mutex);
1670 }
1671
1672 static int ath9k_ampdu_action(struct ieee80211_hw *hw,
1673 struct ieee80211_vif *vif,
1674 enum ieee80211_ampdu_mlme_action action,
1675 struct ieee80211_sta *sta,
1676 u16 tid, u16 *ssn, u8 buf_size)
1677 {
1678 struct ath_softc *sc = hw->priv;
1679 int ret = 0;
1680
1681 local_bh_disable();
1682
1683 switch (action) {
1684 case IEEE80211_AMPDU_RX_START:
1685 break;
1686 case IEEE80211_AMPDU_RX_STOP:
1687 break;
1688 case IEEE80211_AMPDU_TX_START:
1689 ath9k_ps_wakeup(sc);
1690 ret = ath_tx_aggr_start(sc, sta, tid, ssn);
1691 if (!ret)
1692 ieee80211_start_tx_ba_cb_irqsafe(vif, sta->addr, tid);
1693 ath9k_ps_restore(sc);
1694 break;
1695 case IEEE80211_AMPDU_TX_STOP:
1696 ath9k_ps_wakeup(sc);
1697 ath_tx_aggr_stop(sc, sta, tid);
1698 ieee80211_stop_tx_ba_cb_irqsafe(vif, sta->addr, tid);
1699 ath9k_ps_restore(sc);
1700 break;
1701 case IEEE80211_AMPDU_TX_OPERATIONAL:
1702 ath9k_ps_wakeup(sc);
1703 ath_tx_aggr_resume(sc, sta, tid);
1704 ath9k_ps_restore(sc);
1705 break;
1706 default:
1707 ath_err(ath9k_hw_common(sc->sc_ah), "Unknown AMPDU action\n");
1708 }
1709
1710 local_bh_enable();
1711
1712 return ret;
1713 }
1714
1715 static int ath9k_get_survey(struct ieee80211_hw *hw, int idx,
1716 struct survey_info *survey)
1717 {
1718 struct ath_softc *sc = hw->priv;
1719 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1720 struct ieee80211_supported_band *sband;
1721 struct ieee80211_channel *chan;
1722 unsigned long flags;
1723 int pos;
1724
1725 spin_lock_irqsave(&common->cc_lock, flags);
1726 if (idx == 0)
1727 ath_update_survey_stats(sc);
1728
1729 sband = hw->wiphy->bands[IEEE80211_BAND_2GHZ];
1730 if (sband && idx >= sband->n_channels) {
1731 idx -= sband->n_channels;
1732 sband = NULL;
1733 }
1734
1735 if (!sband)
1736 sband = hw->wiphy->bands[IEEE80211_BAND_5GHZ];
1737
1738 if (!sband || idx >= sband->n_channels) {
1739 spin_unlock_irqrestore(&common->cc_lock, flags);
1740 return -ENOENT;
1741 }
1742
1743 chan = &sband->channels[idx];
1744 pos = chan->hw_value;
1745 memcpy(survey, &sc->survey[pos], sizeof(*survey));
1746 survey->channel = chan;
1747 spin_unlock_irqrestore(&common->cc_lock, flags);
1748
1749 return 0;
1750 }
1751
1752 static void ath9k_set_coverage_class(struct ieee80211_hw *hw, u8 coverage_class)
1753 {
1754 struct ath_softc *sc = hw->priv;
1755 struct ath_hw *ah = sc->sc_ah;
1756
1757 mutex_lock(&sc->mutex);
1758 ah->coverage_class = coverage_class;
1759
1760 ath9k_ps_wakeup(sc);
1761 ath9k_hw_init_global_settings(ah);
1762 ath9k_ps_restore(sc);
1763
1764 mutex_unlock(&sc->mutex);
1765 }
1766
1767 static void ath9k_flush(struct ieee80211_hw *hw, bool drop)
1768 {
1769 struct ath_softc *sc = hw->priv;
1770 struct ath_hw *ah = sc->sc_ah;
1771 struct ath_common *common = ath9k_hw_common(ah);
1772 int timeout = 200; /* ms */
1773 int i, j;
1774 bool drain_txq;
1775
1776 mutex_lock(&sc->mutex);
1777 cancel_delayed_work_sync(&sc->tx_complete_work);
1778
1779 if (ah->ah_flags & AH_UNPLUGGED) {
1780 ath_dbg(common, ANY, "Device has been unplugged!\n");
1781 mutex_unlock(&sc->mutex);
1782 return;
1783 }
1784
1785 if (test_bit(SC_OP_INVALID, &sc->sc_flags)) {
1786 ath_dbg(common, ANY, "Device not present\n");
1787 mutex_unlock(&sc->mutex);
1788 return;
1789 }
1790
1791 for (j = 0; j < timeout; j++) {
1792 bool npend = false;
1793
1794 if (j)
1795 usleep_range(1000, 2000);
1796
1797 for (i = 0; i < ATH9K_NUM_TX_QUEUES; i++) {
1798 if (!ATH_TXQ_SETUP(sc, i))
1799 continue;
1800
1801 npend = ath9k_has_pending_frames(sc, &sc->tx.txq[i]);
1802
1803 if (npend)
1804 break;
1805 }
1806
1807 if (!npend)
1808 break;
1809 }
1810
1811 if (drop) {
1812 ath9k_ps_wakeup(sc);
1813 spin_lock_bh(&sc->sc_pcu_lock);
1814 drain_txq = ath_drain_all_txq(sc, false);
1815 spin_unlock_bh(&sc->sc_pcu_lock);
1816
1817 if (!drain_txq)
1818 ath_reset(sc, false);
1819
1820 ath9k_ps_restore(sc);
1821 ieee80211_wake_queues(hw);
1822 }
1823
1824 ieee80211_queue_delayed_work(hw, &sc->tx_complete_work, 0);
1825 mutex_unlock(&sc->mutex);
1826 }
1827
1828 static bool ath9k_tx_frames_pending(struct ieee80211_hw *hw)
1829 {
1830 struct ath_softc *sc = hw->priv;
1831 int i;
1832
1833 for (i = 0; i < ATH9K_NUM_TX_QUEUES; i++) {
1834 if (!ATH_TXQ_SETUP(sc, i))
1835 continue;
1836
1837 if (ath9k_has_pending_frames(sc, &sc->tx.txq[i]))
1838 return true;
1839 }
1840 return false;
1841 }
1842
1843 static int ath9k_tx_last_beacon(struct ieee80211_hw *hw)
1844 {
1845 struct ath_softc *sc = hw->priv;
1846 struct ath_hw *ah = sc->sc_ah;
1847 struct ieee80211_vif *vif;
1848 struct ath_vif *avp;
1849 struct ath_buf *bf;
1850 struct ath_tx_status ts;
1851 bool edma = !!(ah->caps.hw_caps & ATH9K_HW_CAP_EDMA);
1852 int status;
1853
1854 vif = sc->beacon.bslot[0];
1855 if (!vif)
1856 return 0;
1857
1858 avp = (void *)vif->drv_priv;
1859 if (!avp->is_bslot_active)
1860 return 0;
1861
1862 if (!sc->beacon.tx_processed && !edma) {
1863 tasklet_disable(&sc->bcon_tasklet);
1864
1865 bf = avp->av_bcbuf;
1866 if (!bf || !bf->bf_mpdu)
1867 goto skip;
1868
1869 status = ath9k_hw_txprocdesc(ah, bf->bf_desc, &ts);
1870 if (status == -EINPROGRESS)
1871 goto skip;
1872
1873 sc->beacon.tx_processed = true;
1874 sc->beacon.tx_last = !(ts.ts_status & ATH9K_TXERR_MASK);
1875
1876 skip:
1877 tasklet_enable(&sc->bcon_tasklet);
1878 }
1879
1880 return sc->beacon.tx_last;
1881 }
1882
1883 static int ath9k_get_stats(struct ieee80211_hw *hw,
1884 struct ieee80211_low_level_stats *stats)
1885 {
1886 struct ath_softc *sc = hw->priv;
1887 struct ath_hw *ah = sc->sc_ah;
1888 struct ath9k_mib_stats *mib_stats = &ah->ah_mibStats;
1889
1890 stats->dot11ACKFailureCount = mib_stats->ackrcv_bad;
1891 stats->dot11RTSFailureCount = mib_stats->rts_bad;
1892 stats->dot11FCSErrorCount = mib_stats->fcs_bad;
1893 stats->dot11RTSSuccessCount = mib_stats->rts_good;
1894 return 0;
1895 }
1896
1897 static u32 fill_chainmask(u32 cap, u32 new)
1898 {
1899 u32 filled = 0;
1900 int i;
1901
1902 for (i = 0; cap && new; i++, cap >>= 1) {
1903 if (!(cap & BIT(0)))
1904 continue;
1905
1906 if (new & BIT(0))
1907 filled |= BIT(i);
1908
1909 new >>= 1;
1910 }
1911
1912 return filled;
1913 }
1914
1915 static int ath9k_set_antenna(struct ieee80211_hw *hw, u32 tx_ant, u32 rx_ant)
1916 {
1917 struct ath_softc *sc = hw->priv;
1918 struct ath_hw *ah = sc->sc_ah;
1919
1920 if (!rx_ant || !tx_ant)
1921 return -EINVAL;
1922
1923 sc->ant_rx = rx_ant;
1924 sc->ant_tx = tx_ant;
1925
1926 if (ah->caps.rx_chainmask == 1)
1927 return 0;
1928
1929 /* AR9100 runs into calibration issues if not all rx chains are enabled */
1930 if (AR_SREV_9100(ah))
1931 ah->rxchainmask = 0x7;
1932 else
1933 ah->rxchainmask = fill_chainmask(ah->caps.rx_chainmask, rx_ant);
1934
1935 ah->txchainmask = fill_chainmask(ah->caps.tx_chainmask, tx_ant);
1936 ath9k_reload_chainmask_settings(sc);
1937
1938 return 0;
1939 }
1940
1941 static int ath9k_get_antenna(struct ieee80211_hw *hw, u32 *tx_ant, u32 *rx_ant)
1942 {
1943 struct ath_softc *sc = hw->priv;
1944
1945 *tx_ant = sc->ant_tx;
1946 *rx_ant = sc->ant_rx;
1947 return 0;
1948 }
1949
1950 #ifdef CONFIG_ATH9K_DEBUGFS
1951
1952 /* Ethtool support for get-stats */
1953
1954 #define AMKSTR(nm) #nm "_BE", #nm "_BK", #nm "_VI", #nm "_VO"
1955 static const char ath9k_gstrings_stats[][ETH_GSTRING_LEN] = {
1956 "tx_pkts_nic",
1957 "tx_bytes_nic",
1958 "rx_pkts_nic",
1959 "rx_bytes_nic",
1960 AMKSTR(d_tx_pkts),
1961 AMKSTR(d_tx_bytes),
1962 AMKSTR(d_tx_mpdus_queued),
1963 AMKSTR(d_tx_mpdus_completed),
1964 AMKSTR(d_tx_mpdu_xretries),
1965 AMKSTR(d_tx_aggregates),
1966 AMKSTR(d_tx_ampdus_queued_hw),
1967 AMKSTR(d_tx_ampdus_queued_sw),
1968 AMKSTR(d_tx_ampdus_completed),
1969 AMKSTR(d_tx_ampdu_retries),
1970 AMKSTR(d_tx_ampdu_xretries),
1971 AMKSTR(d_tx_fifo_underrun),
1972 AMKSTR(d_tx_op_exceeded),
1973 AMKSTR(d_tx_timer_expiry),
1974 AMKSTR(d_tx_desc_cfg_err),
1975 AMKSTR(d_tx_data_underrun),
1976 AMKSTR(d_tx_delim_underrun),
1977
1978 "d_rx_decrypt_crc_err",
1979 "d_rx_phy_err",
1980 "d_rx_mic_err",
1981 "d_rx_pre_delim_crc_err",
1982 "d_rx_post_delim_crc_err",
1983 "d_rx_decrypt_busy_err",
1984
1985 "d_rx_phyerr_radar",
1986 "d_rx_phyerr_ofdm_timing",
1987 "d_rx_phyerr_cck_timing",
1988
1989 };
1990 #define ATH9K_SSTATS_LEN ARRAY_SIZE(ath9k_gstrings_stats)
1991
1992 static void ath9k_get_et_strings(struct ieee80211_hw *hw,
1993 struct ieee80211_vif *vif,
1994 u32 sset, u8 *data)
1995 {
1996 if (sset == ETH_SS_STATS)
1997 memcpy(data, *ath9k_gstrings_stats,
1998 sizeof(ath9k_gstrings_stats));
1999 }
2000
2001 static int ath9k_get_et_sset_count(struct ieee80211_hw *hw,
2002 struct ieee80211_vif *vif, int sset)
2003 {
2004 if (sset == ETH_SS_STATS)
2005 return ATH9K_SSTATS_LEN;
2006 return 0;
2007 }
2008
2009 #define PR_QNUM(_n) (sc->tx.txq_map[_n]->axq_qnum)
2010 #define AWDATA(elem) \
2011 do { \
2012 data[i++] = sc->debug.stats.txstats[PR_QNUM(WME_AC_BE)].elem; \
2013 data[i++] = sc->debug.stats.txstats[PR_QNUM(WME_AC_BK)].elem; \
2014 data[i++] = sc->debug.stats.txstats[PR_QNUM(WME_AC_VI)].elem; \
2015 data[i++] = sc->debug.stats.txstats[PR_QNUM(WME_AC_VO)].elem; \
2016 } while (0)
2017
2018 #define AWDATA_RX(elem) \
2019 do { \
2020 data[i++] = sc->debug.stats.rxstats.elem; \
2021 } while (0)
2022
2023 static void ath9k_get_et_stats(struct ieee80211_hw *hw,
2024 struct ieee80211_vif *vif,
2025 struct ethtool_stats *stats, u64 *data)
2026 {
2027 struct ath_softc *sc = hw->priv;
2028 int i = 0;
2029
2030 data[i++] = (sc->debug.stats.txstats[PR_QNUM(WME_AC_BE)].tx_pkts_all +
2031 sc->debug.stats.txstats[PR_QNUM(WME_AC_BK)].tx_pkts_all +
2032 sc->debug.stats.txstats[PR_QNUM(WME_AC_VI)].tx_pkts_all +
2033 sc->debug.stats.txstats[PR_QNUM(WME_AC_VO)].tx_pkts_all);
2034 data[i++] = (sc->debug.stats.txstats[PR_QNUM(WME_AC_BE)].tx_bytes_all +
2035 sc->debug.stats.txstats[PR_QNUM(WME_AC_BK)].tx_bytes_all +
2036 sc->debug.stats.txstats[PR_QNUM(WME_AC_VI)].tx_bytes_all +
2037 sc->debug.stats.txstats[PR_QNUM(WME_AC_VO)].tx_bytes_all);
2038 AWDATA_RX(rx_pkts_all);
2039 AWDATA_RX(rx_bytes_all);
2040
2041 AWDATA(tx_pkts_all);
2042 AWDATA(tx_bytes_all);
2043 AWDATA(queued);
2044 AWDATA(completed);
2045 AWDATA(xretries);
2046 AWDATA(a_aggr);
2047 AWDATA(a_queued_hw);
2048 AWDATA(a_queued_sw);
2049 AWDATA(a_completed);
2050 AWDATA(a_retries);
2051 AWDATA(a_xretries);
2052 AWDATA(fifo_underrun);
2053 AWDATA(xtxop);
2054 AWDATA(timer_exp);
2055 AWDATA(desc_cfg_err);
2056 AWDATA(data_underrun);
2057 AWDATA(delim_underrun);
2058
2059 AWDATA_RX(decrypt_crc_err);
2060 AWDATA_RX(phy_err);
2061 AWDATA_RX(mic_err);
2062 AWDATA_RX(pre_delim_crc_err);
2063 AWDATA_RX(post_delim_crc_err);
2064 AWDATA_RX(decrypt_busy_err);
2065
2066 AWDATA_RX(phy_err_stats[ATH9K_PHYERR_RADAR]);
2067 AWDATA_RX(phy_err_stats[ATH9K_PHYERR_OFDM_TIMING]);
2068 AWDATA_RX(phy_err_stats[ATH9K_PHYERR_CCK_TIMING]);
2069
2070 WARN_ON(i != ATH9K_SSTATS_LEN);
2071 }
2072
2073 /* End of ethtool get-stats functions */
2074
2075 #endif
2076
2077
2078 struct ieee80211_ops ath9k_ops = {
2079 .tx = ath9k_tx,
2080 .start = ath9k_start,
2081 .stop = ath9k_stop,
2082 .add_interface = ath9k_add_interface,
2083 .change_interface = ath9k_change_interface,
2084 .remove_interface = ath9k_remove_interface,
2085 .config = ath9k_config,
2086 .configure_filter = ath9k_configure_filter,
2087 .sta_add = ath9k_sta_add,
2088 .sta_remove = ath9k_sta_remove,
2089 .sta_notify = ath9k_sta_notify,
2090 .conf_tx = ath9k_conf_tx,
2091 .bss_info_changed = ath9k_bss_info_changed,
2092 .set_key = ath9k_set_key,
2093 .get_tsf = ath9k_get_tsf,
2094 .set_tsf = ath9k_set_tsf,
2095 .reset_tsf = ath9k_reset_tsf,
2096 .ampdu_action = ath9k_ampdu_action,
2097 .get_survey = ath9k_get_survey,
2098 .rfkill_poll = ath9k_rfkill_poll_state,
2099 .set_coverage_class = ath9k_set_coverage_class,
2100 .flush = ath9k_flush,
2101 .tx_frames_pending = ath9k_tx_frames_pending,
2102 .tx_last_beacon = ath9k_tx_last_beacon,
2103 .get_stats = ath9k_get_stats,
2104 .set_antenna = ath9k_set_antenna,
2105 .get_antenna = ath9k_get_antenna,
2106
2107 #ifdef CONFIG_ATH9K_DEBUGFS
2108 .get_et_sset_count = ath9k_get_et_sset_count,
2109 .get_et_stats = ath9k_get_et_stats,
2110 .get_et_strings = ath9k_get_et_strings,
2111 #endif
2112 };
Ubuntu Jammy Linux kernel mirror