2 * Copyright (c) 2008-2011 Atheros Communications Inc.
4 * Permission to use, copy, modify, and/or distribute this software for any
5 * purpose with or without fee is hereby granted, provided that the above
6 * copyright notice and this permission notice appear in all copies.
8 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
9 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
10 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
11 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
12 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
13 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
14 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
17 #include <linux/nl80211.h>
18 #include <linux/delay.h>
22 u8
ath9k_parse_mpdudensity(u8 mpdudensity
)
25 * 802.11n D2.0 defined values for "Minimum MPDU Start Spacing":
26 * 0 for no restriction
35 switch (mpdudensity
) {
41 /* Our lower layer calculations limit our precision to
57 static bool ath9k_has_pending_frames(struct ath_softc
*sc
, struct ath_txq
*txq
)
61 spin_lock_bh(&txq
->axq_lock
);
63 if (txq
->axq_depth
|| !list_empty(&txq
->axq_acq
))
66 spin_unlock_bh(&txq
->axq_lock
);
70 static bool ath9k_setpower(struct ath_softc
*sc
, enum ath9k_power_mode mode
)
75 spin_lock_irqsave(&sc
->sc_pm_lock
, flags
);
76 ret
= ath9k_hw_setpower(sc
->sc_ah
, mode
);
77 spin_unlock_irqrestore(&sc
->sc_pm_lock
, flags
);
82 void ath9k_ps_wakeup(struct ath_softc
*sc
)
84 struct ath_common
*common
= ath9k_hw_common(sc
->sc_ah
);
86 enum ath9k_power_mode power_mode
;
88 spin_lock_irqsave(&sc
->sc_pm_lock
, flags
);
89 if (++sc
->ps_usecount
!= 1)
92 power_mode
= sc
->sc_ah
->power_mode
;
93 ath9k_hw_setpower(sc
->sc_ah
, ATH9K_PM_AWAKE
);
96 * While the hardware is asleep, the cycle counters contain no
97 * useful data. Better clear them now so that they don't mess up
98 * survey data results.
100 if (power_mode
!= ATH9K_PM_AWAKE
) {
101 spin_lock(&common
->cc_lock
);
102 ath_hw_cycle_counters_update(common
);
103 memset(&common
->cc_survey
, 0, sizeof(common
->cc_survey
));
104 memset(&common
->cc_ani
, 0, sizeof(common
->cc_ani
));
105 spin_unlock(&common
->cc_lock
);
109 spin_unlock_irqrestore(&sc
->sc_pm_lock
, flags
);
112 void ath9k_ps_restore(struct ath_softc
*sc
)
114 struct ath_common
*common
= ath9k_hw_common(sc
->sc_ah
);
115 enum ath9k_power_mode mode
;
119 spin_lock_irqsave(&sc
->sc_pm_lock
, flags
);
120 if (--sc
->ps_usecount
!= 0)
124 ath9k_hw_setrxabort(sc
->sc_ah
, 1);
125 ath9k_hw_stopdmarecv(sc
->sc_ah
, &reset
);
126 mode
= ATH9K_PM_FULL_SLEEP
;
127 } else if (sc
->ps_enabled
&&
128 !(sc
->ps_flags
& (PS_WAIT_FOR_BEACON
|
130 PS_WAIT_FOR_PSPOLL_DATA
|
131 PS_WAIT_FOR_TX_ACK
))) {
132 mode
= ATH9K_PM_NETWORK_SLEEP
;
133 if (ath9k_hw_btcoex_is_enabled(sc
->sc_ah
))
134 ath9k_btcoex_stop_gen_timer(sc
);
139 spin_lock(&common
->cc_lock
);
140 ath_hw_cycle_counters_update(common
);
141 spin_unlock(&common
->cc_lock
);
143 ath9k_hw_setpower(sc
->sc_ah
, mode
);
146 spin_unlock_irqrestore(&sc
->sc_pm_lock
, flags
);
149 static void __ath_cancel_work(struct ath_softc
*sc
)
151 cancel_work_sync(&sc
->paprd_work
);
152 cancel_work_sync(&sc
->hw_check_work
);
153 cancel_delayed_work_sync(&sc
->tx_complete_work
);
154 cancel_delayed_work_sync(&sc
->hw_pll_work
);
156 #ifdef CONFIG_ATH9K_BTCOEX_SUPPORT
157 if (ath9k_hw_mci_is_enabled(sc
->sc_ah
))
158 cancel_work_sync(&sc
->mci_work
);
162 static void ath_cancel_work(struct ath_softc
*sc
)
164 __ath_cancel_work(sc
);
165 cancel_work_sync(&sc
->hw_reset_work
);
168 static void ath_restart_work(struct ath_softc
*sc
)
170 struct ath_common
*common
= ath9k_hw_common(sc
->sc_ah
);
172 ieee80211_queue_delayed_work(sc
->hw
, &sc
->tx_complete_work
, 0);
174 if (AR_SREV_9340(sc
->sc_ah
) || AR_SREV_9485(sc
->sc_ah
) ||
175 AR_SREV_9550(sc
->sc_ah
))
176 ieee80211_queue_delayed_work(sc
->hw
, &sc
->hw_pll_work
,
177 msecs_to_jiffies(ATH_PLL_WORK_INTERVAL
));
179 ath_start_rx_poll(sc
, 3);
181 if (!common
->disable_ani
)
182 ath_start_ani(common
);
185 static bool ath_prepare_reset(struct ath_softc
*sc
, bool retry_tx
, bool flush
)
187 struct ath_hw
*ah
= sc
->sc_ah
;
188 struct ath_common
*common
= ath9k_hw_common(ah
);
191 ieee80211_stop_queues(sc
->hw
);
193 sc
->hw_busy_count
= 0;
194 del_timer_sync(&common
->ani
.timer
);
195 del_timer_sync(&sc
->rx_poll_timer
);
197 ath9k_debug_samp_bb_mac(sc
);
198 ath9k_hw_disable_interrupts(ah
);
200 if (!ath_stoprecv(sc
))
203 if (!ath_drain_all_txq(sc
, retry_tx
))
207 if (ah
->caps
.hw_caps
& ATH9K_HW_CAP_EDMA
)
208 ath_rx_tasklet(sc
, 1, true);
209 ath_rx_tasklet(sc
, 1, false);
217 static bool ath_complete_reset(struct ath_softc
*sc
, bool start
)
219 struct ath_hw
*ah
= sc
->sc_ah
;
220 struct ath_common
*common
= ath9k_hw_common(ah
);
223 if (ath_startrecv(sc
) != 0) {
224 ath_err(common
, "Unable to restart recv logic\n");
228 ath9k_cmn_update_txpow(ah
, sc
->curtxpow
,
229 sc
->config
.txpowlimit
, &sc
->curtxpow
);
231 clear_bit(SC_OP_HW_RESET
, &sc
->sc_flags
);
232 ath9k_hw_set_interrupts(ah
);
233 ath9k_hw_enable_interrupts(ah
);
235 if (!(sc
->hw
->conf
.flags
& IEEE80211_CONF_OFFCHANNEL
) && start
) {
236 if (!test_bit(SC_OP_BEACONS
, &sc
->sc_flags
))
241 if (ah
->opmode
== NL80211_IFTYPE_STATION
&&
242 test_bit(SC_OP_PRIM_STA_VIF
, &sc
->sc_flags
)) {
243 spin_lock_irqsave(&sc
->sc_pm_lock
, flags
);
244 sc
->ps_flags
|= PS_BEACON_SYNC
| PS_WAIT_FOR_BEACON
;
245 spin_unlock_irqrestore(&sc
->sc_pm_lock
, flags
);
248 ath_restart_work(sc
);
251 if ((ah
->caps
.hw_caps
& ATH9K_HW_CAP_ANT_DIV_COMB
) && sc
->ant_rx
!= 3)
252 ath_ant_comb_update(sc
);
254 ieee80211_wake_queues(sc
->hw
);
259 static int ath_reset_internal(struct ath_softc
*sc
, struct ath9k_channel
*hchan
,
262 struct ath_hw
*ah
= sc
->sc_ah
;
263 struct ath_common
*common
= ath9k_hw_common(ah
);
264 struct ath9k_hw_cal_data
*caldata
= NULL
;
269 __ath_cancel_work(sc
);
271 spin_lock_bh(&sc
->sc_pcu_lock
);
273 if (!(sc
->hw
->conf
.flags
& IEEE80211_CONF_OFFCHANNEL
)) {
275 caldata
= &sc
->caldata
;
284 if (!ath_prepare_reset(sc
, retry_tx
, flush
))
287 ath_dbg(common
, CONFIG
, "Reset to %u MHz, HT40: %d fastcc: %d\n",
288 hchan
->channel
, IS_CHAN_HT40(hchan
), fastcc
);
290 r
= ath9k_hw_reset(ah
, hchan
, caldata
, fastcc
);
293 "Unable to reset channel, reset status %d\n", r
);
297 if (!ath_complete_reset(sc
, true))
301 spin_unlock_bh(&sc
->sc_pcu_lock
);
307 * Set/change channels. If the channel is really being changed, it's done
308 * by reseting the chip. To accomplish this we must first cleanup any pending
309 * DMA, then restart stuff.
311 static int ath_set_channel(struct ath_softc
*sc
, struct ieee80211_hw
*hw
,
312 struct ath9k_channel
*hchan
)
316 if (test_bit(SC_OP_INVALID
, &sc
->sc_flags
))
319 r
= ath_reset_internal(sc
, hchan
, false);
324 static void ath_node_attach(struct ath_softc
*sc
, struct ieee80211_sta
*sta
,
325 struct ieee80211_vif
*vif
)
329 an
= (struct ath_node
*)sta
->drv_priv
;
331 #ifdef CONFIG_ATH9K_DEBUGFS
332 spin_lock(&sc
->nodes_lock
);
333 list_add(&an
->list
, &sc
->nodes
);
334 spin_unlock(&sc
->nodes_lock
);
339 if (sc
->sc_ah
->caps
.hw_caps
& ATH9K_HW_CAP_HT
) {
340 ath_tx_node_init(sc
, an
);
341 an
->maxampdu
= 1 << (IEEE80211_HT_MAX_AMPDU_FACTOR
+
342 sta
->ht_cap
.ampdu_factor
);
343 density
= ath9k_parse_mpdudensity(sta
->ht_cap
.ampdu_density
);
344 an
->mpdudensity
= density
;
348 static void ath_node_detach(struct ath_softc
*sc
, struct ieee80211_sta
*sta
)
350 struct ath_node
*an
= (struct ath_node
*)sta
->drv_priv
;
352 #ifdef CONFIG_ATH9K_DEBUGFS
353 spin_lock(&sc
->nodes_lock
);
355 spin_unlock(&sc
->nodes_lock
);
359 if (sc
->sc_ah
->caps
.hw_caps
& ATH9K_HW_CAP_HT
)
360 ath_tx_node_cleanup(sc
, an
);
363 void ath9k_tasklet(unsigned long data
)
365 struct ath_softc
*sc
= (struct ath_softc
*)data
;
366 struct ath_hw
*ah
= sc
->sc_ah
;
367 struct ath_common
*common
= ath9k_hw_common(ah
);
369 u32 status
= sc
->intrstatus
;
373 spin_lock(&sc
->sc_pcu_lock
);
375 if ((status
& ATH9K_INT_FATAL
) ||
376 (status
& ATH9K_INT_BB_WATCHDOG
)) {
377 #ifdef CONFIG_ATH9K_DEBUGFS
378 enum ath_reset_type type
;
380 if (status
& ATH9K_INT_FATAL
)
381 type
= RESET_TYPE_FATAL_INT
;
383 type
= RESET_TYPE_BB_WATCHDOG
;
385 RESET_STAT_INC(sc
, type
);
387 set_bit(SC_OP_HW_RESET
, &sc
->sc_flags
);
388 ieee80211_queue_work(sc
->hw
, &sc
->hw_reset_work
);
392 spin_lock_irqsave(&sc
->sc_pm_lock
, flags
);
393 if ((status
& ATH9K_INT_TSFOOR
) && sc
->ps_enabled
) {
395 * TSF sync does not look correct; remain awake to sync with
398 ath_dbg(common
, PS
, "TSFOOR - Sync with next Beacon\n");
399 sc
->ps_flags
|= PS_WAIT_FOR_BEACON
| PS_BEACON_SYNC
;
401 spin_unlock_irqrestore(&sc
->sc_pm_lock
, flags
);
403 if (ah
->caps
.hw_caps
& ATH9K_HW_CAP_EDMA
)
404 rxmask
= (ATH9K_INT_RXHP
| ATH9K_INT_RXLP
| ATH9K_INT_RXEOL
|
407 rxmask
= (ATH9K_INT_RX
| ATH9K_INT_RXEOL
| ATH9K_INT_RXORN
);
409 if (status
& rxmask
) {
410 /* Check for high priority Rx first */
411 if ((ah
->caps
.hw_caps
& ATH9K_HW_CAP_EDMA
) &&
412 (status
& ATH9K_INT_RXHP
))
413 ath_rx_tasklet(sc
, 0, true);
415 ath_rx_tasklet(sc
, 0, false);
418 if (status
& ATH9K_INT_TX
) {
419 if (ah
->caps
.hw_caps
& ATH9K_HW_CAP_EDMA
)
420 ath_tx_edma_tasklet(sc
);
425 ath9k_btcoex_handle_interrupt(sc
, status
);
428 /* re-enable hardware interrupt */
429 ath9k_hw_enable_interrupts(ah
);
431 spin_unlock(&sc
->sc_pcu_lock
);
432 ath9k_ps_restore(sc
);
435 irqreturn_t
ath_isr(int irq
, void *dev
)
437 #define SCHED_INTR ( \
439 ATH9K_INT_BB_WATCHDOG | \
449 ATH9K_INT_GENTIMER | \
452 struct ath_softc
*sc
= dev
;
453 struct ath_hw
*ah
= sc
->sc_ah
;
454 struct ath_common
*common
= ath9k_hw_common(ah
);
455 enum ath9k_int status
;
459 * The hardware is not ready/present, don't
460 * touch anything. Note this can happen early
461 * on if the IRQ is shared.
463 if (test_bit(SC_OP_INVALID
, &sc
->sc_flags
))
466 /* shared irq, not for us */
468 if (!ath9k_hw_intrpend(ah
))
471 if(test_bit(SC_OP_HW_RESET
, &sc
->sc_flags
))
475 * Figure out the reason(s) for the interrupt. Note
476 * that the hal returns a pseudo-ISR that may include
477 * bits we haven't explicitly enabled so we mask the
478 * value to insure we only process bits we requested.
480 ath9k_hw_getisr(ah
, &status
); /* NB: clears ISR too */
481 status
&= ah
->imask
; /* discard unasked-for bits */
484 * If there are no status bits set, then this interrupt was not
485 * for me (should have been caught above).
490 /* Cache the status */
491 sc
->intrstatus
= status
;
493 if (status
& SCHED_INTR
)
497 * If a FATAL or RXORN interrupt is received, we have to reset the
500 if ((status
& ATH9K_INT_FATAL
) || ((status
& ATH9K_INT_RXORN
) &&
501 !(ah
->caps
.hw_caps
& ATH9K_HW_CAP_EDMA
)))
504 if ((ah
->caps
.hw_caps
& ATH9K_HW_CAP_EDMA
) &&
505 (status
& ATH9K_INT_BB_WATCHDOG
)) {
507 spin_lock(&common
->cc_lock
);
508 ath_hw_cycle_counters_update(common
);
509 ar9003_hw_bb_watchdog_dbg_info(ah
);
510 spin_unlock(&common
->cc_lock
);
515 if (status
& ATH9K_INT_SWBA
)
516 tasklet_schedule(&sc
->bcon_tasklet
);
518 if (status
& ATH9K_INT_TXURN
)
519 ath9k_hw_updatetxtriglevel(ah
, true);
521 if (status
& ATH9K_INT_RXEOL
) {
522 ah
->imask
&= ~(ATH9K_INT_RXEOL
| ATH9K_INT_RXORN
);
523 ath9k_hw_set_interrupts(ah
);
526 if (!(ah
->caps
.hw_caps
& ATH9K_HW_CAP_AUTOSLEEP
))
527 if (status
& ATH9K_INT_TIM_TIMER
) {
528 if (ATH_DBG_WARN_ON_ONCE(sc
->ps_idle
))
530 /* Clear RxAbort bit so that we can
532 ath9k_setpower(sc
, ATH9K_PM_AWAKE
);
533 spin_lock(&sc
->sc_pm_lock
);
534 ath9k_hw_setrxabort(sc
->sc_ah
, 0);
535 sc
->ps_flags
|= PS_WAIT_FOR_BEACON
;
536 spin_unlock(&sc
->sc_pm_lock
);
541 ath_debug_stat_interrupt(sc
, status
);
544 /* turn off every interrupt */
545 ath9k_hw_disable_interrupts(ah
);
546 tasklet_schedule(&sc
->intr_tq
);
554 static int ath_reset(struct ath_softc
*sc
, bool retry_tx
)
560 r
= ath_reset_internal(sc
, NULL
, retry_tx
);
564 for (i
= 0; i
< ATH9K_NUM_TX_QUEUES
; i
++) {
565 if (ATH_TXQ_SETUP(sc
, i
)) {
566 spin_lock_bh(&sc
->tx
.txq
[i
].axq_lock
);
567 ath_txq_schedule(sc
, &sc
->tx
.txq
[i
]);
568 spin_unlock_bh(&sc
->tx
.txq
[i
].axq_lock
);
573 ath9k_ps_restore(sc
);
578 void ath_reset_work(struct work_struct
*work
)
580 struct ath_softc
*sc
= container_of(work
, struct ath_softc
, hw_reset_work
);
585 /**********************/
586 /* mac80211 callbacks */
587 /**********************/
589 static int ath9k_start(struct ieee80211_hw
*hw
)
591 struct ath_softc
*sc
= hw
->priv
;
592 struct ath_hw
*ah
= sc
->sc_ah
;
593 struct ath_common
*common
= ath9k_hw_common(ah
);
594 struct ieee80211_channel
*curchan
= hw
->conf
.channel
;
595 struct ath9k_channel
*init_channel
;
598 ath_dbg(common
, CONFIG
,
599 "Starting driver with initial channel: %d MHz\n",
600 curchan
->center_freq
);
603 mutex_lock(&sc
->mutex
);
605 init_channel
= ath9k_cmn_get_curchannel(hw
, ah
);
607 /* Reset SERDES registers */
608 ath9k_hw_configpcipowersave(ah
, false);
611 * The basic interface to setting the hardware in a good
612 * state is ``reset''. On return the hardware is known to
613 * be powered up and with interrupts disabled. This must
614 * be followed by initialization of the appropriate bits
615 * and then setup of the interrupt mask.
617 spin_lock_bh(&sc
->sc_pcu_lock
);
619 atomic_set(&ah
->intr_ref_cnt
, -1);
621 r
= ath9k_hw_reset(ah
, init_channel
, ah
->caldata
, false);
624 "Unable to reset hardware; reset status %d (freq %u MHz)\n",
625 r
, curchan
->center_freq
);
626 spin_unlock_bh(&sc
->sc_pcu_lock
);
630 /* Setup our intr mask. */
631 ah
->imask
= ATH9K_INT_TX
| ATH9K_INT_RXEOL
|
632 ATH9K_INT_RXORN
| ATH9K_INT_FATAL
|
635 if (ah
->caps
.hw_caps
& ATH9K_HW_CAP_EDMA
)
636 ah
->imask
|= ATH9K_INT_RXHP
|
638 ATH9K_INT_BB_WATCHDOG
;
640 ah
->imask
|= ATH9K_INT_RX
;
642 ah
->imask
|= ATH9K_INT_GTT
;
644 if (ah
->caps
.hw_caps
& ATH9K_HW_CAP_HT
)
645 ah
->imask
|= ATH9K_INT_CST
;
649 clear_bit(SC_OP_INVALID
, &sc
->sc_flags
);
650 sc
->sc_ah
->is_monitoring
= false;
652 if (!ath_complete_reset(sc
, false)) {
654 spin_unlock_bh(&sc
->sc_pcu_lock
);
658 if (ah
->led_pin
>= 0) {
659 ath9k_hw_cfg_output(ah
, ah
->led_pin
,
660 AR_GPIO_OUTPUT_MUX_AS_OUTPUT
);
661 ath9k_hw_set_gpio(ah
, ah
->led_pin
, 0);
665 * Reset key cache to sane defaults (all entries cleared) instead of
666 * semi-random values after suspend/resume.
668 ath9k_cmn_init_crypto(sc
->sc_ah
);
670 spin_unlock_bh(&sc
->sc_pcu_lock
);
672 if (ah
->caps
.pcie_lcr_extsync_en
&& common
->bus_ops
->extn_synch_en
)
673 common
->bus_ops
->extn_synch_en(common
);
676 mutex_unlock(&sc
->mutex
);
678 ath9k_ps_restore(sc
);
683 static void ath9k_tx(struct ieee80211_hw
*hw
, struct sk_buff
*skb
)
685 struct ath_softc
*sc
= hw
->priv
;
686 struct ath_common
*common
= ath9k_hw_common(sc
->sc_ah
);
687 struct ath_tx_control txctl
;
688 struct ieee80211_hdr
*hdr
= (struct ieee80211_hdr
*) skb
->data
;
691 if (sc
->ps_enabled
) {
693 * mac80211 does not set PM field for normal data frames, so we
694 * need to update that based on the current PS mode.
696 if (ieee80211_is_data(hdr
->frame_control
) &&
697 !ieee80211_is_nullfunc(hdr
->frame_control
) &&
698 !ieee80211_has_pm(hdr
->frame_control
)) {
700 "Add PM=1 for a TX frame while in PS mode\n");
701 hdr
->frame_control
|= cpu_to_le16(IEEE80211_FCTL_PM
);
705 if (unlikely(sc
->sc_ah
->power_mode
== ATH9K_PM_NETWORK_SLEEP
)) {
707 * We are using PS-Poll and mac80211 can request TX while in
708 * power save mode. Need to wake up hardware for the TX to be
709 * completed and if needed, also for RX of buffered frames.
712 spin_lock_irqsave(&sc
->sc_pm_lock
, flags
);
713 if (!(sc
->sc_ah
->caps
.hw_caps
& ATH9K_HW_CAP_AUTOSLEEP
))
714 ath9k_hw_setrxabort(sc
->sc_ah
, 0);
715 if (ieee80211_is_pspoll(hdr
->frame_control
)) {
717 "Sending PS-Poll to pick a buffered frame\n");
718 sc
->ps_flags
|= PS_WAIT_FOR_PSPOLL_DATA
;
720 ath_dbg(common
, PS
, "Wake up to complete TX\n");
721 sc
->ps_flags
|= PS_WAIT_FOR_TX_ACK
;
724 * The actual restore operation will happen only after
725 * the ps_flags bit is cleared. We are just dropping
726 * the ps_usecount here.
728 spin_unlock_irqrestore(&sc
->sc_pm_lock
, flags
);
729 ath9k_ps_restore(sc
);
733 * Cannot tx while the hardware is in full sleep, it first needs a full
734 * chip reset to recover from that
736 if (unlikely(sc
->sc_ah
->power_mode
== ATH9K_PM_FULL_SLEEP
)) {
737 ath_err(common
, "TX while HW is in FULL_SLEEP mode\n");
741 memset(&txctl
, 0, sizeof(struct ath_tx_control
));
742 txctl
.txq
= sc
->tx
.txq_map
[skb_get_queue_mapping(skb
)];
744 ath_dbg(common
, XMIT
, "transmitting packet, skb: %p\n", skb
);
746 if (ath_tx_start(hw
, skb
, &txctl
) != 0) {
747 ath_dbg(common
, XMIT
, "TX failed\n");
748 TX_STAT_INC(txctl
.txq
->axq_qnum
, txfailed
);
754 dev_kfree_skb_any(skb
);
757 static void ath9k_stop(struct ieee80211_hw
*hw
)
759 struct ath_softc
*sc
= hw
->priv
;
760 struct ath_hw
*ah
= sc
->sc_ah
;
761 struct ath_common
*common
= ath9k_hw_common(ah
);
764 mutex_lock(&sc
->mutex
);
767 del_timer_sync(&sc
->rx_poll_timer
);
769 if (test_bit(SC_OP_INVALID
, &sc
->sc_flags
)) {
770 ath_dbg(common
, ANY
, "Device not present\n");
771 mutex_unlock(&sc
->mutex
);
775 /* Ensure HW is awake when we try to shut it down. */
778 spin_lock_bh(&sc
->sc_pcu_lock
);
780 /* prevent tasklets to enable interrupts once we disable them */
781 ah
->imask
&= ~ATH9K_INT_GLOBAL
;
783 /* make sure h/w will not generate any interrupt
784 * before setting the invalid flag. */
785 ath9k_hw_disable_interrupts(ah
);
787 spin_unlock_bh(&sc
->sc_pcu_lock
);
789 /* we can now sync irq and kill any running tasklets, since we already
790 * disabled interrupts and not holding a spin lock */
791 synchronize_irq(sc
->irq
);
792 tasklet_kill(&sc
->intr_tq
);
793 tasklet_kill(&sc
->bcon_tasklet
);
795 prev_idle
= sc
->ps_idle
;
798 spin_lock_bh(&sc
->sc_pcu_lock
);
800 if (ah
->led_pin
>= 0) {
801 ath9k_hw_set_gpio(ah
, ah
->led_pin
, 1);
802 ath9k_hw_cfg_gpio_input(ah
, ah
->led_pin
);
805 ath_prepare_reset(sc
, false, true);
808 dev_kfree_skb_any(sc
->rx
.frag
);
813 ah
->curchan
= ath9k_cmn_get_curchannel(hw
, ah
);
815 ath9k_hw_reset(ah
, ah
->curchan
, ah
->caldata
, false);
816 ath9k_hw_phy_disable(ah
);
818 ath9k_hw_configpcipowersave(ah
, true);
820 spin_unlock_bh(&sc
->sc_pcu_lock
);
822 ath9k_ps_restore(sc
);
824 set_bit(SC_OP_INVALID
, &sc
->sc_flags
);
825 sc
->ps_idle
= prev_idle
;
827 mutex_unlock(&sc
->mutex
);
829 ath_dbg(common
, CONFIG
, "Driver halt\n");
832 bool ath9k_uses_beacons(int type
)
835 case NL80211_IFTYPE_AP
:
836 case NL80211_IFTYPE_ADHOC
:
837 case NL80211_IFTYPE_MESH_POINT
:
844 static void ath9k_reclaim_beacon(struct ath_softc
*sc
,
845 struct ieee80211_vif
*vif
)
847 struct ath_vif
*avp
= (void *)vif
->drv_priv
;
849 ath9k_set_beaconing_status(sc
, false);
850 ath_beacon_return(sc
, avp
);
851 ath9k_set_beaconing_status(sc
, true);
854 static void ath9k_vif_iter(void *data
, u8
*mac
, struct ieee80211_vif
*vif
)
856 struct ath9k_vif_iter_data
*iter_data
= data
;
859 if (iter_data
->hw_macaddr
)
860 for (i
= 0; i
< ETH_ALEN
; i
++)
861 iter_data
->mask
[i
] &=
862 ~(iter_data
->hw_macaddr
[i
] ^ mac
[i
]);
865 case NL80211_IFTYPE_AP
:
868 case NL80211_IFTYPE_STATION
:
869 iter_data
->nstations
++;
871 case NL80211_IFTYPE_ADHOC
:
872 iter_data
->nadhocs
++;
874 case NL80211_IFTYPE_MESH_POINT
:
875 iter_data
->nmeshes
++;
877 case NL80211_IFTYPE_WDS
:
885 /* Called with sc->mutex held. */
886 void ath9k_calculate_iter_data(struct ieee80211_hw
*hw
,
887 struct ieee80211_vif
*vif
,
888 struct ath9k_vif_iter_data
*iter_data
)
890 struct ath_softc
*sc
= hw
->priv
;
891 struct ath_hw
*ah
= sc
->sc_ah
;
892 struct ath_common
*common
= ath9k_hw_common(ah
);
895 * Use the hardware MAC address as reference, the hardware uses it
896 * together with the BSSID mask when matching addresses.
898 memset(iter_data
, 0, sizeof(*iter_data
));
899 iter_data
->hw_macaddr
= common
->macaddr
;
900 memset(&iter_data
->mask
, 0xff, ETH_ALEN
);
903 ath9k_vif_iter(iter_data
, vif
->addr
, vif
);
905 /* Get list of all active MAC addresses */
906 ieee80211_iterate_active_interfaces_atomic(sc
->hw
, ath9k_vif_iter
,
910 /* Called with sc->mutex held. */
911 static void ath9k_calculate_summary_state(struct ieee80211_hw
*hw
,
912 struct ieee80211_vif
*vif
)
914 struct ath_softc
*sc
= hw
->priv
;
915 struct ath_hw
*ah
= sc
->sc_ah
;
916 struct ath_common
*common
= ath9k_hw_common(ah
);
917 struct ath9k_vif_iter_data iter_data
;
919 ath9k_calculate_iter_data(hw
, vif
, &iter_data
);
921 /* Set BSSID mask. */
922 memcpy(common
->bssidmask
, iter_data
.mask
, ETH_ALEN
);
923 ath_hw_setbssidmask(common
);
925 /* Set op-mode & TSF */
926 if (iter_data
.naps
> 0) {
927 ath9k_hw_set_tsfadjust(ah
, 1);
928 set_bit(SC_OP_TSF_RESET
, &sc
->sc_flags
);
929 ah
->opmode
= NL80211_IFTYPE_AP
;
931 ath9k_hw_set_tsfadjust(ah
, 0);
932 clear_bit(SC_OP_TSF_RESET
, &sc
->sc_flags
);
934 if (iter_data
.nmeshes
)
935 ah
->opmode
= NL80211_IFTYPE_MESH_POINT
;
936 else if (iter_data
.nwds
)
937 ah
->opmode
= NL80211_IFTYPE_AP
;
938 else if (iter_data
.nadhocs
)
939 ah
->opmode
= NL80211_IFTYPE_ADHOC
;
941 ah
->opmode
= NL80211_IFTYPE_STATION
;
945 * Enable MIB interrupts when there are hardware phy counters.
947 if ((iter_data
.nstations
+ iter_data
.nadhocs
+ iter_data
.nmeshes
) > 0)
948 ah
->imask
|= ATH9K_INT_TSFOOR
;
950 ah
->imask
&= ~ATH9K_INT_TSFOOR
;
952 ath9k_hw_set_interrupts(ah
);
955 if (iter_data
.naps
> 0) {
956 sc
->sc_ah
->stats
.avgbrssi
= ATH_RSSI_DUMMY_MARKER
;
958 if (!common
->disable_ani
) {
959 set_bit(SC_OP_ANI_RUN
, &sc
->sc_flags
);
960 ath_start_ani(common
);
964 clear_bit(SC_OP_ANI_RUN
, &sc
->sc_flags
);
965 del_timer_sync(&common
->ani
.timer
);
969 /* Called with sc->mutex held, vif counts set up properly. */
970 static void ath9k_do_vif_add_setup(struct ieee80211_hw
*hw
,
971 struct ieee80211_vif
*vif
)
973 struct ath_softc
*sc
= hw
->priv
;
975 ath9k_calculate_summary_state(hw
, vif
);
977 if (ath9k_uses_beacons(vif
->type
)) {
978 /* Reserve a beacon slot for the vif */
979 ath9k_set_beaconing_status(sc
, false);
980 ath_beacon_alloc(sc
, vif
);
981 ath9k_set_beaconing_status(sc
, true);
985 static int ath9k_add_interface(struct ieee80211_hw
*hw
,
986 struct ieee80211_vif
*vif
)
988 struct ath_softc
*sc
= hw
->priv
;
989 struct ath_hw
*ah
= sc
->sc_ah
;
990 struct ath_common
*common
= ath9k_hw_common(ah
);
994 mutex_lock(&sc
->mutex
);
997 case NL80211_IFTYPE_STATION
:
998 case NL80211_IFTYPE_WDS
:
999 case NL80211_IFTYPE_ADHOC
:
1000 case NL80211_IFTYPE_AP
:
1001 case NL80211_IFTYPE_MESH_POINT
:
1004 ath_err(common
, "Interface type %d not yet supported\n",
1010 if (ath9k_uses_beacons(vif
->type
)) {
1011 if (sc
->nbcnvifs
>= ATH_BCBUF
) {
1012 ath_err(common
, "Not enough beacon buffers when adding"
1013 " new interface of type: %i\n",
1020 ath_dbg(common
, CONFIG
, "Attach a VIF of type: %d\n", vif
->type
);
1024 ath9k_do_vif_add_setup(hw
, vif
);
1026 mutex_unlock(&sc
->mutex
);
1027 ath9k_ps_restore(sc
);
1031 static int ath9k_change_interface(struct ieee80211_hw
*hw
,
1032 struct ieee80211_vif
*vif
,
1033 enum nl80211_iftype new_type
,
1036 struct ath_softc
*sc
= hw
->priv
;
1037 struct ath_common
*common
= ath9k_hw_common(sc
->sc_ah
);
1040 ath_dbg(common
, CONFIG
, "Change Interface\n");
1041 mutex_lock(&sc
->mutex
);
1042 ath9k_ps_wakeup(sc
);
1044 if (ath9k_uses_beacons(new_type
) &&
1045 !ath9k_uses_beacons(vif
->type
)) {
1046 if (sc
->nbcnvifs
>= ATH_BCBUF
) {
1047 ath_err(common
, "No beacon slot available\n");
1053 /* Clean up old vif stuff */
1054 if (ath9k_uses_beacons(vif
->type
))
1055 ath9k_reclaim_beacon(sc
, vif
);
1057 /* Add new settings */
1058 vif
->type
= new_type
;
1061 ath9k_do_vif_add_setup(hw
, vif
);
1063 ath9k_ps_restore(sc
);
1064 mutex_unlock(&sc
->mutex
);
1068 static void ath9k_remove_interface(struct ieee80211_hw
*hw
,
1069 struct ieee80211_vif
*vif
)
1071 struct ath_softc
*sc
= hw
->priv
;
1072 struct ath_common
*common
= ath9k_hw_common(sc
->sc_ah
);
1074 ath_dbg(common
, CONFIG
, "Detach Interface\n");
1076 ath9k_ps_wakeup(sc
);
1077 mutex_lock(&sc
->mutex
);
1081 /* Reclaim beacon resources */
1082 if (ath9k_uses_beacons(vif
->type
))
1083 ath9k_reclaim_beacon(sc
, vif
);
1085 ath9k_calculate_summary_state(hw
, NULL
);
1087 mutex_unlock(&sc
->mutex
);
1088 ath9k_ps_restore(sc
);
1091 static void ath9k_enable_ps(struct ath_softc
*sc
)
1093 struct ath_hw
*ah
= sc
->sc_ah
;
1094 struct ath_common
*common
= ath9k_hw_common(ah
);
1096 sc
->ps_enabled
= true;
1097 if (!(ah
->caps
.hw_caps
& ATH9K_HW_CAP_AUTOSLEEP
)) {
1098 if ((ah
->imask
& ATH9K_INT_TIM_TIMER
) == 0) {
1099 ah
->imask
|= ATH9K_INT_TIM_TIMER
;
1100 ath9k_hw_set_interrupts(ah
);
1102 ath9k_hw_setrxabort(ah
, 1);
1104 ath_dbg(common
, PS
, "PowerSave enabled\n");
1107 static void ath9k_disable_ps(struct ath_softc
*sc
)
1109 struct ath_hw
*ah
= sc
->sc_ah
;
1110 struct ath_common
*common
= ath9k_hw_common(ah
);
1112 sc
->ps_enabled
= false;
1113 ath9k_hw_setpower(ah
, ATH9K_PM_AWAKE
);
1114 if (!(ah
->caps
.hw_caps
& ATH9K_HW_CAP_AUTOSLEEP
)) {
1115 ath9k_hw_setrxabort(ah
, 0);
1116 sc
->ps_flags
&= ~(PS_WAIT_FOR_BEACON
|
1118 PS_WAIT_FOR_PSPOLL_DATA
|
1119 PS_WAIT_FOR_TX_ACK
);
1120 if (ah
->imask
& ATH9K_INT_TIM_TIMER
) {
1121 ah
->imask
&= ~ATH9K_INT_TIM_TIMER
;
1122 ath9k_hw_set_interrupts(ah
);
1125 ath_dbg(common
, PS
, "PowerSave disabled\n");
1128 static int ath9k_config(struct ieee80211_hw
*hw
, u32 changed
)
1130 struct ath_softc
*sc
= hw
->priv
;
1131 struct ath_hw
*ah
= sc
->sc_ah
;
1132 struct ath_common
*common
= ath9k_hw_common(ah
);
1133 struct ieee80211_conf
*conf
= &hw
->conf
;
1134 bool reset_channel
= false;
1136 ath9k_ps_wakeup(sc
);
1137 mutex_lock(&sc
->mutex
);
1139 if (changed
& IEEE80211_CONF_CHANGE_IDLE
) {
1140 sc
->ps_idle
= !!(conf
->flags
& IEEE80211_CONF_IDLE
);
1142 ath_cancel_work(sc
);
1143 ath9k_stop_btcoex(sc
);
1145 ath9k_start_btcoex(sc
);
1147 * The chip needs a reset to properly wake up from
1150 reset_channel
= ah
->chip_fullsleep
;
1155 * We just prepare to enable PS. We have to wait until our AP has
1156 * ACK'd our null data frame to disable RX otherwise we'll ignore
1157 * those ACKs and end up retransmitting the same null data frames.
1158 * IEEE80211_CONF_CHANGE_PS is only passed by mac80211 for STA mode.
1160 if (changed
& IEEE80211_CONF_CHANGE_PS
) {
1161 unsigned long flags
;
1162 spin_lock_irqsave(&sc
->sc_pm_lock
, flags
);
1163 if (conf
->flags
& IEEE80211_CONF_PS
)
1164 ath9k_enable_ps(sc
);
1166 ath9k_disable_ps(sc
);
1167 spin_unlock_irqrestore(&sc
->sc_pm_lock
, flags
);
1170 if (changed
& IEEE80211_CONF_CHANGE_MONITOR
) {
1171 if (conf
->flags
& IEEE80211_CONF_MONITOR
) {
1172 ath_dbg(common
, CONFIG
, "Monitor mode is enabled\n");
1173 sc
->sc_ah
->is_monitoring
= true;
1175 ath_dbg(common
, CONFIG
, "Monitor mode is disabled\n");
1176 sc
->sc_ah
->is_monitoring
= false;
1180 if ((changed
& IEEE80211_CONF_CHANGE_CHANNEL
) || reset_channel
) {
1181 struct ieee80211_channel
*curchan
= hw
->conf
.channel
;
1182 int pos
= curchan
->hw_value
;
1184 unsigned long flags
;
1187 old_pos
= ah
->curchan
- &ah
->channels
[0];
1189 ath_dbg(common
, CONFIG
, "Set channel: %d MHz type: %d\n",
1190 curchan
->center_freq
, conf
->channel_type
);
1192 /* update survey stats for the old channel before switching */
1193 spin_lock_irqsave(&common
->cc_lock
, flags
);
1194 ath_update_survey_stats(sc
);
1195 spin_unlock_irqrestore(&common
->cc_lock
, flags
);
1198 * Preserve the current channel values, before updating
1201 if (ah
->curchan
&& (old_pos
== pos
))
1202 ath9k_hw_getnf(ah
, ah
->curchan
);
1204 ath9k_cmn_update_ichannel(&sc
->sc_ah
->channels
[pos
],
1205 curchan
, conf
->channel_type
);
1208 * If the operating channel changes, change the survey in-use flags
1210 * Reset the survey data for the new channel, unless we're switching
1211 * back to the operating channel from an off-channel operation.
1213 if (!(hw
->conf
.flags
& IEEE80211_CONF_OFFCHANNEL
) &&
1214 sc
->cur_survey
!= &sc
->survey
[pos
]) {
1217 sc
->cur_survey
->filled
&= ~SURVEY_INFO_IN_USE
;
1219 sc
->cur_survey
= &sc
->survey
[pos
];
1221 memset(sc
->cur_survey
, 0, sizeof(struct survey_info
));
1222 sc
->cur_survey
->filled
|= SURVEY_INFO_IN_USE
;
1223 } else if (!(sc
->survey
[pos
].filled
& SURVEY_INFO_IN_USE
)) {
1224 memset(&sc
->survey
[pos
], 0, sizeof(struct survey_info
));
1227 if (ath_set_channel(sc
, hw
, &sc
->sc_ah
->channels
[pos
]) < 0) {
1228 ath_err(common
, "Unable to set channel\n");
1229 mutex_unlock(&sc
->mutex
);
1230 ath9k_ps_restore(sc
);
1235 * The most recent snapshot of channel->noisefloor for the old
1236 * channel is only available after the hardware reset. Copy it to
1237 * the survey stats now.
1240 ath_update_survey_nf(sc
, old_pos
);
1243 if (changed
& IEEE80211_CONF_CHANGE_POWER
) {
1244 ath_dbg(common
, CONFIG
, "Set power: %d\n", conf
->power_level
);
1245 sc
->config
.txpowlimit
= 2 * conf
->power_level
;
1246 ath9k_cmn_update_txpow(ah
, sc
->curtxpow
,
1247 sc
->config
.txpowlimit
, &sc
->curtxpow
);
1250 mutex_unlock(&sc
->mutex
);
1251 ath9k_ps_restore(sc
);
1256 #define SUPPORTED_FILTERS \
1257 (FIF_PROMISC_IN_BSS | \
1262 FIF_BCN_PRBRESP_PROMISC | \
1266 /* FIXME: sc->sc_full_reset ? */
1267 static void ath9k_configure_filter(struct ieee80211_hw
*hw
,
1268 unsigned int changed_flags
,
1269 unsigned int *total_flags
,
1272 struct ath_softc
*sc
= hw
->priv
;
1275 changed_flags
&= SUPPORTED_FILTERS
;
1276 *total_flags
&= SUPPORTED_FILTERS
;
1278 sc
->rx
.rxfilter
= *total_flags
;
1279 ath9k_ps_wakeup(sc
);
1280 rfilt
= ath_calcrxfilter(sc
);
1281 ath9k_hw_setrxfilter(sc
->sc_ah
, rfilt
);
1282 ath9k_ps_restore(sc
);
1284 ath_dbg(ath9k_hw_common(sc
->sc_ah
), CONFIG
, "Set HW RX filter: 0x%x\n",
1288 static int ath9k_sta_add(struct ieee80211_hw
*hw
,
1289 struct ieee80211_vif
*vif
,
1290 struct ieee80211_sta
*sta
)
1292 struct ath_softc
*sc
= hw
->priv
;
1293 struct ath_common
*common
= ath9k_hw_common(sc
->sc_ah
);
1294 struct ath_node
*an
= (struct ath_node
*) sta
->drv_priv
;
1295 struct ieee80211_key_conf ps_key
= { };
1297 ath_node_attach(sc
, sta
, vif
);
1299 if (vif
->type
!= NL80211_IFTYPE_AP
&&
1300 vif
->type
!= NL80211_IFTYPE_AP_VLAN
)
1303 an
->ps_key
= ath_key_config(common
, vif
, sta
, &ps_key
);
1308 static void ath9k_del_ps_key(struct ath_softc
*sc
,
1309 struct ieee80211_vif
*vif
,
1310 struct ieee80211_sta
*sta
)
1312 struct ath_common
*common
= ath9k_hw_common(sc
->sc_ah
);
1313 struct ath_node
*an
= (struct ath_node
*) sta
->drv_priv
;
1314 struct ieee80211_key_conf ps_key
= { .hw_key_idx
= an
->ps_key
};
1319 ath_key_delete(common
, &ps_key
);
1322 static int ath9k_sta_remove(struct ieee80211_hw
*hw
,
1323 struct ieee80211_vif
*vif
,
1324 struct ieee80211_sta
*sta
)
1326 struct ath_softc
*sc
= hw
->priv
;
1328 ath9k_del_ps_key(sc
, vif
, sta
);
1329 ath_node_detach(sc
, sta
);
1334 static void ath9k_sta_notify(struct ieee80211_hw
*hw
,
1335 struct ieee80211_vif
*vif
,
1336 enum sta_notify_cmd cmd
,
1337 struct ieee80211_sta
*sta
)
1339 struct ath_softc
*sc
= hw
->priv
;
1340 struct ath_node
*an
= (struct ath_node
*) sta
->drv_priv
;
1342 if (!sta
->ht_cap
.ht_supported
)
1346 case STA_NOTIFY_SLEEP
:
1347 an
->sleeping
= true;
1348 ath_tx_aggr_sleep(sta
, sc
, an
);
1350 case STA_NOTIFY_AWAKE
:
1351 an
->sleeping
= false;
1352 ath_tx_aggr_wakeup(sc
, an
);
1357 static int ath9k_conf_tx(struct ieee80211_hw
*hw
,
1358 struct ieee80211_vif
*vif
, u16 queue
,
1359 const struct ieee80211_tx_queue_params
*params
)
1361 struct ath_softc
*sc
= hw
->priv
;
1362 struct ath_common
*common
= ath9k_hw_common(sc
->sc_ah
);
1363 struct ath_txq
*txq
;
1364 struct ath9k_tx_queue_info qi
;
1367 if (queue
>= WME_NUM_AC
)
1370 txq
= sc
->tx
.txq_map
[queue
];
1372 ath9k_ps_wakeup(sc
);
1373 mutex_lock(&sc
->mutex
);
1375 memset(&qi
, 0, sizeof(struct ath9k_tx_queue_info
));
1377 qi
.tqi_aifs
= params
->aifs
;
1378 qi
.tqi_cwmin
= params
->cw_min
;
1379 qi
.tqi_cwmax
= params
->cw_max
;
1380 qi
.tqi_burstTime
= params
->txop
;
1382 ath_dbg(common
, CONFIG
,
1383 "Configure tx [queue/halq] [%d/%d], aifs: %d, cw_min: %d, cw_max: %d, txop: %d\n",
1384 queue
, txq
->axq_qnum
, params
->aifs
, params
->cw_min
,
1385 params
->cw_max
, params
->txop
);
1387 ret
= ath_txq_update(sc
, txq
->axq_qnum
, &qi
);
1389 ath_err(common
, "TXQ Update failed\n");
1391 if (sc
->sc_ah
->opmode
== NL80211_IFTYPE_ADHOC
)
1392 if (queue
== WME_AC_BE
&& !ret
)
1393 ath_beaconq_config(sc
);
1395 mutex_unlock(&sc
->mutex
);
1396 ath9k_ps_restore(sc
);
1401 static int ath9k_set_key(struct ieee80211_hw
*hw
,
1402 enum set_key_cmd cmd
,
1403 struct ieee80211_vif
*vif
,
1404 struct ieee80211_sta
*sta
,
1405 struct ieee80211_key_conf
*key
)
1407 struct ath_softc
*sc
= hw
->priv
;
1408 struct ath_common
*common
= ath9k_hw_common(sc
->sc_ah
);
1411 if (ath9k_modparam_nohwcrypt
)
1414 if ((vif
->type
== NL80211_IFTYPE_ADHOC
||
1415 vif
->type
== NL80211_IFTYPE_MESH_POINT
) &&
1416 (key
->cipher
== WLAN_CIPHER_SUITE_TKIP
||
1417 key
->cipher
== WLAN_CIPHER_SUITE_CCMP
) &&
1418 !(key
->flags
& IEEE80211_KEY_FLAG_PAIRWISE
)) {
1420 * For now, disable hw crypto for the RSN IBSS group keys. This
1421 * could be optimized in the future to use a modified key cache
1422 * design to support per-STA RX GTK, but until that gets
1423 * implemented, use of software crypto for group addressed
1424 * frames is a acceptable to allow RSN IBSS to be used.
1429 mutex_lock(&sc
->mutex
);
1430 ath9k_ps_wakeup(sc
);
1431 ath_dbg(common
, CONFIG
, "Set HW Key\n");
1436 ath9k_del_ps_key(sc
, vif
, sta
);
1438 ret
= ath_key_config(common
, vif
, sta
, key
);
1440 key
->hw_key_idx
= ret
;
1441 /* push IV and Michael MIC generation to stack */
1442 key
->flags
|= IEEE80211_KEY_FLAG_GENERATE_IV
;
1443 if (key
->cipher
== WLAN_CIPHER_SUITE_TKIP
)
1444 key
->flags
|= IEEE80211_KEY_FLAG_GENERATE_MMIC
;
1445 if (sc
->sc_ah
->sw_mgmt_crypto
&&
1446 key
->cipher
== WLAN_CIPHER_SUITE_CCMP
)
1447 key
->flags
|= IEEE80211_KEY_FLAG_SW_MGMT
;
1452 ath_key_delete(common
, key
);
1458 ath9k_ps_restore(sc
);
1459 mutex_unlock(&sc
->mutex
);
1463 static void ath9k_bss_iter(void *data
, u8
*mac
, struct ieee80211_vif
*vif
)
1465 struct ath_softc
*sc
= data
;
1466 struct ath_common
*common
= ath9k_hw_common(sc
->sc_ah
);
1467 struct ieee80211_bss_conf
*bss_conf
= &vif
->bss_conf
;
1468 struct ath_vif
*avp
= (void *)vif
->drv_priv
;
1469 unsigned long flags
;
1471 * Skip iteration if primary station vif's bss info
1474 if (test_bit(SC_OP_PRIM_STA_VIF
, &sc
->sc_flags
))
1477 if (bss_conf
->assoc
) {
1478 set_bit(SC_OP_PRIM_STA_VIF
, &sc
->sc_flags
);
1479 avp
->primary_sta_vif
= true;
1480 memcpy(common
->curbssid
, bss_conf
->bssid
, ETH_ALEN
);
1481 common
->curaid
= bss_conf
->aid
;
1482 ath9k_hw_write_associd(sc
->sc_ah
);
1483 ath_dbg(common
, CONFIG
, "Bss Info ASSOC %d, bssid: %pM\n",
1484 bss_conf
->aid
, common
->curbssid
);
1485 ath_beacon_config(sc
, vif
);
1487 * Request a re-configuration of Beacon related timers
1488 * on the receipt of the first Beacon frame (i.e.,
1489 * after time sync with the AP).
1491 spin_lock_irqsave(&sc
->sc_pm_lock
, flags
);
1492 sc
->ps_flags
|= PS_BEACON_SYNC
| PS_WAIT_FOR_BEACON
;
1493 spin_unlock_irqrestore(&sc
->sc_pm_lock
, flags
);
1495 /* Reset rssi stats */
1496 sc
->last_rssi
= ATH_RSSI_DUMMY_MARKER
;
1497 sc
->sc_ah
->stats
.avgbrssi
= ATH_RSSI_DUMMY_MARKER
;
1499 ath_start_rx_poll(sc
, 3);
1501 if (!common
->disable_ani
) {
1502 set_bit(SC_OP_ANI_RUN
, &sc
->sc_flags
);
1503 ath_start_ani(common
);
1509 static void ath9k_config_bss(struct ath_softc
*sc
, struct ieee80211_vif
*vif
)
1511 struct ath_common
*common
= ath9k_hw_common(sc
->sc_ah
);
1512 struct ieee80211_bss_conf
*bss_conf
= &vif
->bss_conf
;
1513 struct ath_vif
*avp
= (void *)vif
->drv_priv
;
1515 if (sc
->sc_ah
->opmode
!= NL80211_IFTYPE_STATION
)
1518 /* Reconfigure bss info */
1519 if (avp
->primary_sta_vif
&& !bss_conf
->assoc
) {
1520 ath_dbg(common
, CONFIG
, "Bss Info DISASSOC %d, bssid %pM\n",
1521 common
->curaid
, common
->curbssid
);
1522 clear_bit(SC_OP_PRIM_STA_VIF
, &sc
->sc_flags
);
1523 clear_bit(SC_OP_BEACONS
, &sc
->sc_flags
);
1524 avp
->primary_sta_vif
= false;
1525 memset(common
->curbssid
, 0, ETH_ALEN
);
1529 ieee80211_iterate_active_interfaces_atomic(
1530 sc
->hw
, ath9k_bss_iter
, sc
);
1533 * None of station vifs are associated.
1536 if (!test_bit(SC_OP_PRIM_STA_VIF
, &sc
->sc_flags
)) {
1537 ath9k_hw_write_associd(sc
->sc_ah
);
1538 clear_bit(SC_OP_ANI_RUN
, &sc
->sc_flags
);
1539 del_timer_sync(&common
->ani
.timer
);
1540 del_timer_sync(&sc
->rx_poll_timer
);
1541 memset(&sc
->caldata
, 0, sizeof(sc
->caldata
));
1545 static void ath9k_bss_info_changed(struct ieee80211_hw
*hw
,
1546 struct ieee80211_vif
*vif
,
1547 struct ieee80211_bss_conf
*bss_conf
,
1550 struct ath_softc
*sc
= hw
->priv
;
1551 struct ath_hw
*ah
= sc
->sc_ah
;
1552 struct ath_common
*common
= ath9k_hw_common(ah
);
1553 struct ath_vif
*avp
= (void *)vif
->drv_priv
;
1556 ath9k_ps_wakeup(sc
);
1557 mutex_lock(&sc
->mutex
);
1559 if (changed
& BSS_CHANGED_ASSOC
) {
1560 ath9k_config_bss(sc
, vif
);
1562 ath_dbg(common
, CONFIG
, "BSSID: %pM aid: 0x%x\n",
1563 common
->curbssid
, common
->curaid
);
1566 if (changed
& BSS_CHANGED_IBSS
) {
1567 /* There can be only one vif available */
1568 memcpy(common
->curbssid
, bss_conf
->bssid
, ETH_ALEN
);
1569 common
->curaid
= bss_conf
->aid
;
1570 ath9k_hw_write_associd(sc
->sc_ah
);
1572 if (bss_conf
->ibss_joined
) {
1573 sc
->sc_ah
->stats
.avgbrssi
= ATH_RSSI_DUMMY_MARKER
;
1575 if (!common
->disable_ani
) {
1576 set_bit(SC_OP_ANI_RUN
, &sc
->sc_flags
);
1577 ath_start_ani(common
);
1581 clear_bit(SC_OP_ANI_RUN
, &sc
->sc_flags
);
1582 del_timer_sync(&common
->ani
.timer
);
1583 del_timer_sync(&sc
->rx_poll_timer
);
1588 * In case of AP mode, the HW TSF has to be reset
1589 * when the beacon interval changes.
1591 if ((changed
& BSS_CHANGED_BEACON_INT
) &&
1592 (vif
->type
== NL80211_IFTYPE_AP
))
1593 set_bit(SC_OP_TSF_RESET
, &sc
->sc_flags
);
1595 /* Configure beaconing (AP, IBSS, MESH) */
1596 if (ath9k_uses_beacons(vif
->type
) &&
1597 ((changed
& BSS_CHANGED_BEACON
) ||
1598 (changed
& BSS_CHANGED_BEACON_ENABLED
) ||
1599 (changed
& BSS_CHANGED_BEACON_INT
))) {
1600 ath9k_set_beaconing_status(sc
, false);
1601 if (bss_conf
->enable_beacon
)
1602 ath_beacon_alloc(sc
, vif
);
1604 avp
->is_bslot_active
= false;
1605 ath_beacon_config(sc
, vif
);
1606 ath9k_set_beaconing_status(sc
, true);
1609 if (changed
& BSS_CHANGED_ERP_SLOT
) {
1610 if (bss_conf
->use_short_slot
)
1614 if (vif
->type
== NL80211_IFTYPE_AP
) {
1616 * Defer update, so that connected stations can adjust
1617 * their settings at the same time.
1618 * See beacon.c for more details
1620 sc
->beacon
.slottime
= slottime
;
1621 sc
->beacon
.updateslot
= UPDATE
;
1623 ah
->slottime
= slottime
;
1624 ath9k_hw_init_global_settings(ah
);
1628 mutex_unlock(&sc
->mutex
);
1629 ath9k_ps_restore(sc
);
1632 static u64
ath9k_get_tsf(struct ieee80211_hw
*hw
, struct ieee80211_vif
*vif
)
1634 struct ath_softc
*sc
= hw
->priv
;
1637 mutex_lock(&sc
->mutex
);
1638 ath9k_ps_wakeup(sc
);
1639 tsf
= ath9k_hw_gettsf64(sc
->sc_ah
);
1640 ath9k_ps_restore(sc
);
1641 mutex_unlock(&sc
->mutex
);
1646 static void ath9k_set_tsf(struct ieee80211_hw
*hw
,
1647 struct ieee80211_vif
*vif
,
1650 struct ath_softc
*sc
= hw
->priv
;
1652 mutex_lock(&sc
->mutex
);
1653 ath9k_ps_wakeup(sc
);
1654 ath9k_hw_settsf64(sc
->sc_ah
, tsf
);
1655 ath9k_ps_restore(sc
);
1656 mutex_unlock(&sc
->mutex
);
1659 static void ath9k_reset_tsf(struct ieee80211_hw
*hw
, struct ieee80211_vif
*vif
)
1661 struct ath_softc
*sc
= hw
->priv
;
1663 mutex_lock(&sc
->mutex
);
1665 ath9k_ps_wakeup(sc
);
1666 ath9k_hw_reset_tsf(sc
->sc_ah
);
1667 ath9k_ps_restore(sc
);
1669 mutex_unlock(&sc
->mutex
);
1672 static int ath9k_ampdu_action(struct ieee80211_hw
*hw
,
1673 struct ieee80211_vif
*vif
,
1674 enum ieee80211_ampdu_mlme_action action
,
1675 struct ieee80211_sta
*sta
,
1676 u16 tid
, u16
*ssn
, u8 buf_size
)
1678 struct ath_softc
*sc
= hw
->priv
;
1684 case IEEE80211_AMPDU_RX_START
:
1686 case IEEE80211_AMPDU_RX_STOP
:
1688 case IEEE80211_AMPDU_TX_START
:
1689 ath9k_ps_wakeup(sc
);
1690 ret
= ath_tx_aggr_start(sc
, sta
, tid
, ssn
);
1692 ieee80211_start_tx_ba_cb_irqsafe(vif
, sta
->addr
, tid
);
1693 ath9k_ps_restore(sc
);
1695 case IEEE80211_AMPDU_TX_STOP
:
1696 ath9k_ps_wakeup(sc
);
1697 ath_tx_aggr_stop(sc
, sta
, tid
);
1698 ieee80211_stop_tx_ba_cb_irqsafe(vif
, sta
->addr
, tid
);
1699 ath9k_ps_restore(sc
);
1701 case IEEE80211_AMPDU_TX_OPERATIONAL
:
1702 ath9k_ps_wakeup(sc
);
1703 ath_tx_aggr_resume(sc
, sta
, tid
);
1704 ath9k_ps_restore(sc
);
1707 ath_err(ath9k_hw_common(sc
->sc_ah
), "Unknown AMPDU action\n");
1715 static int ath9k_get_survey(struct ieee80211_hw
*hw
, int idx
,
1716 struct survey_info
*survey
)
1718 struct ath_softc
*sc
= hw
->priv
;
1719 struct ath_common
*common
= ath9k_hw_common(sc
->sc_ah
);
1720 struct ieee80211_supported_band
*sband
;
1721 struct ieee80211_channel
*chan
;
1722 unsigned long flags
;
1725 spin_lock_irqsave(&common
->cc_lock
, flags
);
1727 ath_update_survey_stats(sc
);
1729 sband
= hw
->wiphy
->bands
[IEEE80211_BAND_2GHZ
];
1730 if (sband
&& idx
>= sband
->n_channels
) {
1731 idx
-= sband
->n_channels
;
1736 sband
= hw
->wiphy
->bands
[IEEE80211_BAND_5GHZ
];
1738 if (!sband
|| idx
>= sband
->n_channels
) {
1739 spin_unlock_irqrestore(&common
->cc_lock
, flags
);
1743 chan
= &sband
->channels
[idx
];
1744 pos
= chan
->hw_value
;
1745 memcpy(survey
, &sc
->survey
[pos
], sizeof(*survey
));
1746 survey
->channel
= chan
;
1747 spin_unlock_irqrestore(&common
->cc_lock
, flags
);
1752 static void ath9k_set_coverage_class(struct ieee80211_hw
*hw
, u8 coverage_class
)
1754 struct ath_softc
*sc
= hw
->priv
;
1755 struct ath_hw
*ah
= sc
->sc_ah
;
1757 mutex_lock(&sc
->mutex
);
1758 ah
->coverage_class
= coverage_class
;
1760 ath9k_ps_wakeup(sc
);
1761 ath9k_hw_init_global_settings(ah
);
1762 ath9k_ps_restore(sc
);
1764 mutex_unlock(&sc
->mutex
);
1767 static void ath9k_flush(struct ieee80211_hw
*hw
, bool drop
)
1769 struct ath_softc
*sc
= hw
->priv
;
1770 struct ath_hw
*ah
= sc
->sc_ah
;
1771 struct ath_common
*common
= ath9k_hw_common(ah
);
1772 int timeout
= 200; /* ms */
1776 mutex_lock(&sc
->mutex
);
1777 cancel_delayed_work_sync(&sc
->tx_complete_work
);
1779 if (ah
->ah_flags
& AH_UNPLUGGED
) {
1780 ath_dbg(common
, ANY
, "Device has been unplugged!\n");
1781 mutex_unlock(&sc
->mutex
);
1785 if (test_bit(SC_OP_INVALID
, &sc
->sc_flags
)) {
1786 ath_dbg(common
, ANY
, "Device not present\n");
1787 mutex_unlock(&sc
->mutex
);
1791 for (j
= 0; j
< timeout
; j
++) {
1795 usleep_range(1000, 2000);
1797 for (i
= 0; i
< ATH9K_NUM_TX_QUEUES
; i
++) {
1798 if (!ATH_TXQ_SETUP(sc
, i
))
1801 npend
= ath9k_has_pending_frames(sc
, &sc
->tx
.txq
[i
]);
1812 ath9k_ps_wakeup(sc
);
1813 spin_lock_bh(&sc
->sc_pcu_lock
);
1814 drain_txq
= ath_drain_all_txq(sc
, false);
1815 spin_unlock_bh(&sc
->sc_pcu_lock
);
1818 ath_reset(sc
, false);
1820 ath9k_ps_restore(sc
);
1821 ieee80211_wake_queues(hw
);
1824 ieee80211_queue_delayed_work(hw
, &sc
->tx_complete_work
, 0);
1825 mutex_unlock(&sc
->mutex
);
1828 static bool ath9k_tx_frames_pending(struct ieee80211_hw
*hw
)
1830 struct ath_softc
*sc
= hw
->priv
;
1833 for (i
= 0; i
< ATH9K_NUM_TX_QUEUES
; i
++) {
1834 if (!ATH_TXQ_SETUP(sc
, i
))
1837 if (ath9k_has_pending_frames(sc
, &sc
->tx
.txq
[i
]))
1843 static int ath9k_tx_last_beacon(struct ieee80211_hw
*hw
)
1845 struct ath_softc
*sc
= hw
->priv
;
1846 struct ath_hw
*ah
= sc
->sc_ah
;
1847 struct ieee80211_vif
*vif
;
1848 struct ath_vif
*avp
;
1850 struct ath_tx_status ts
;
1851 bool edma
= !!(ah
->caps
.hw_caps
& ATH9K_HW_CAP_EDMA
);
1854 vif
= sc
->beacon
.bslot
[0];
1858 avp
= (void *)vif
->drv_priv
;
1859 if (!avp
->is_bslot_active
)
1862 if (!sc
->beacon
.tx_processed
&& !edma
) {
1863 tasklet_disable(&sc
->bcon_tasklet
);
1866 if (!bf
|| !bf
->bf_mpdu
)
1869 status
= ath9k_hw_txprocdesc(ah
, bf
->bf_desc
, &ts
);
1870 if (status
== -EINPROGRESS
)
1873 sc
->beacon
.tx_processed
= true;
1874 sc
->beacon
.tx_last
= !(ts
.ts_status
& ATH9K_TXERR_MASK
);
1877 tasklet_enable(&sc
->bcon_tasklet
);
1880 return sc
->beacon
.tx_last
;
1883 static int ath9k_get_stats(struct ieee80211_hw
*hw
,
1884 struct ieee80211_low_level_stats
*stats
)
1886 struct ath_softc
*sc
= hw
->priv
;
1887 struct ath_hw
*ah
= sc
->sc_ah
;
1888 struct ath9k_mib_stats
*mib_stats
= &ah
->ah_mibStats
;
1890 stats
->dot11ACKFailureCount
= mib_stats
->ackrcv_bad
;
1891 stats
->dot11RTSFailureCount
= mib_stats
->rts_bad
;
1892 stats
->dot11FCSErrorCount
= mib_stats
->fcs_bad
;
1893 stats
->dot11RTSSuccessCount
= mib_stats
->rts_good
;
1897 static u32
fill_chainmask(u32 cap
, u32
new)
1902 for (i
= 0; cap
&& new; i
++, cap
>>= 1) {
1903 if (!(cap
& BIT(0)))
1915 static int ath9k_set_antenna(struct ieee80211_hw
*hw
, u32 tx_ant
, u32 rx_ant
)
1917 struct ath_softc
*sc
= hw
->priv
;
1918 struct ath_hw
*ah
= sc
->sc_ah
;
1920 if (!rx_ant
|| !tx_ant
)
1923 sc
->ant_rx
= rx_ant
;
1924 sc
->ant_tx
= tx_ant
;
1926 if (ah
->caps
.rx_chainmask
== 1)
1929 /* AR9100 runs into calibration issues if not all rx chains are enabled */
1930 if (AR_SREV_9100(ah
))
1931 ah
->rxchainmask
= 0x7;
1933 ah
->rxchainmask
= fill_chainmask(ah
->caps
.rx_chainmask
, rx_ant
);
1935 ah
->txchainmask
= fill_chainmask(ah
->caps
.tx_chainmask
, tx_ant
);
1936 ath9k_reload_chainmask_settings(sc
);
1941 static int ath9k_get_antenna(struct ieee80211_hw
*hw
, u32
*tx_ant
, u32
*rx_ant
)
1943 struct ath_softc
*sc
= hw
->priv
;
1945 *tx_ant
= sc
->ant_tx
;
1946 *rx_ant
= sc
->ant_rx
;
1950 #ifdef CONFIG_ATH9K_DEBUGFS
1952 /* Ethtool support for get-stats */
1954 #define AMKSTR(nm) #nm "_BE", #nm "_BK", #nm "_VI", #nm "_VO"
1955 static const char ath9k_gstrings_stats
[][ETH_GSTRING_LEN
] = {
1962 AMKSTR(d_tx_mpdus_queued
),
1963 AMKSTR(d_tx_mpdus_completed
),
1964 AMKSTR(d_tx_mpdu_xretries
),
1965 AMKSTR(d_tx_aggregates
),
1966 AMKSTR(d_tx_ampdus_queued_hw
),
1967 AMKSTR(d_tx_ampdus_queued_sw
),
1968 AMKSTR(d_tx_ampdus_completed
),
1969 AMKSTR(d_tx_ampdu_retries
),
1970 AMKSTR(d_tx_ampdu_xretries
),
1971 AMKSTR(d_tx_fifo_underrun
),
1972 AMKSTR(d_tx_op_exceeded
),
1973 AMKSTR(d_tx_timer_expiry
),
1974 AMKSTR(d_tx_desc_cfg_err
),
1975 AMKSTR(d_tx_data_underrun
),
1976 AMKSTR(d_tx_delim_underrun
),
1978 "d_rx_decrypt_crc_err",
1981 "d_rx_pre_delim_crc_err",
1982 "d_rx_post_delim_crc_err",
1983 "d_rx_decrypt_busy_err",
1985 "d_rx_phyerr_radar",
1986 "d_rx_phyerr_ofdm_timing",
1987 "d_rx_phyerr_cck_timing",
1990 #define ATH9K_SSTATS_LEN ARRAY_SIZE(ath9k_gstrings_stats)
1992 static void ath9k_get_et_strings(struct ieee80211_hw
*hw
,
1993 struct ieee80211_vif
*vif
,
1996 if (sset
== ETH_SS_STATS
)
1997 memcpy(data
, *ath9k_gstrings_stats
,
1998 sizeof(ath9k_gstrings_stats
));
2001 static int ath9k_get_et_sset_count(struct ieee80211_hw
*hw
,
2002 struct ieee80211_vif
*vif
, int sset
)
2004 if (sset
== ETH_SS_STATS
)
2005 return ATH9K_SSTATS_LEN
;
2009 #define PR_QNUM(_n) (sc->tx.txq_map[_n]->axq_qnum)
2010 #define AWDATA(elem) \
2012 data[i++] = sc->debug.stats.txstats[PR_QNUM(WME_AC_BE)].elem; \
2013 data[i++] = sc->debug.stats.txstats[PR_QNUM(WME_AC_BK)].elem; \
2014 data[i++] = sc->debug.stats.txstats[PR_QNUM(WME_AC_VI)].elem; \
2015 data[i++] = sc->debug.stats.txstats[PR_QNUM(WME_AC_VO)].elem; \
2018 #define AWDATA_RX(elem) \
2020 data[i++] = sc->debug.stats.rxstats.elem; \
2023 static void ath9k_get_et_stats(struct ieee80211_hw
*hw
,
2024 struct ieee80211_vif
*vif
,
2025 struct ethtool_stats
*stats
, u64
*data
)
2027 struct ath_softc
*sc
= hw
->priv
;
2030 data
[i
++] = (sc
->debug
.stats
.txstats
[PR_QNUM(WME_AC_BE
)].tx_pkts_all
+
2031 sc
->debug
.stats
.txstats
[PR_QNUM(WME_AC_BK
)].tx_pkts_all
+
2032 sc
->debug
.stats
.txstats
[PR_QNUM(WME_AC_VI
)].tx_pkts_all
+
2033 sc
->debug
.stats
.txstats
[PR_QNUM(WME_AC_VO
)].tx_pkts_all
);
2034 data
[i
++] = (sc
->debug
.stats
.txstats
[PR_QNUM(WME_AC_BE
)].tx_bytes_all
+
2035 sc
->debug
.stats
.txstats
[PR_QNUM(WME_AC_BK
)].tx_bytes_all
+
2036 sc
->debug
.stats
.txstats
[PR_QNUM(WME_AC_VI
)].tx_bytes_all
+
2037 sc
->debug
.stats
.txstats
[PR_QNUM(WME_AC_VO
)].tx_bytes_all
);
2038 AWDATA_RX(rx_pkts_all
);
2039 AWDATA_RX(rx_bytes_all
);
2041 AWDATA(tx_pkts_all
);
2042 AWDATA(tx_bytes_all
);
2047 AWDATA(a_queued_hw
);
2048 AWDATA(a_queued_sw
);
2049 AWDATA(a_completed
);
2052 AWDATA(fifo_underrun
);
2055 AWDATA(desc_cfg_err
);
2056 AWDATA(data_underrun
);
2057 AWDATA(delim_underrun
);
2059 AWDATA_RX(decrypt_crc_err
);
2062 AWDATA_RX(pre_delim_crc_err
);
2063 AWDATA_RX(post_delim_crc_err
);
2064 AWDATA_RX(decrypt_busy_err
);
2066 AWDATA_RX(phy_err_stats
[ATH9K_PHYERR_RADAR
]);
2067 AWDATA_RX(phy_err_stats
[ATH9K_PHYERR_OFDM_TIMING
]);
2068 AWDATA_RX(phy_err_stats
[ATH9K_PHYERR_CCK_TIMING
]);
2070 WARN_ON(i
!= ATH9K_SSTATS_LEN
);
2073 /* End of ethtool get-stats functions */
2078 struct ieee80211_ops ath9k_ops
= {
2080 .start
= ath9k_start
,
2082 .add_interface
= ath9k_add_interface
,
2083 .change_interface
= ath9k_change_interface
,
2084 .remove_interface
= ath9k_remove_interface
,
2085 .config
= ath9k_config
,
2086 .configure_filter
= ath9k_configure_filter
,
2087 .sta_add
= ath9k_sta_add
,
2088 .sta_remove
= ath9k_sta_remove
,
2089 .sta_notify
= ath9k_sta_notify
,
2090 .conf_tx
= ath9k_conf_tx
,
2091 .bss_info_changed
= ath9k_bss_info_changed
,
2092 .set_key
= ath9k_set_key
,
2093 .get_tsf
= ath9k_get_tsf
,
2094 .set_tsf
= ath9k_set_tsf
,
2095 .reset_tsf
= ath9k_reset_tsf
,
2096 .ampdu_action
= ath9k_ampdu_action
,
2097 .get_survey
= ath9k_get_survey
,
2098 .rfkill_poll
= ath9k_rfkill_poll_state
,
2099 .set_coverage_class
= ath9k_set_coverage_class
,
2100 .flush
= ath9k_flush
,
2101 .tx_frames_pending
= ath9k_tx_frames_pending
,
2102 .tx_last_beacon
= ath9k_tx_last_beacon
,
2103 .get_stats
= ath9k_get_stats
,
2104 .set_antenna
= ath9k_set_antenna
,
2105 .get_antenna
= ath9k_get_antenna
,
2107 #ifdef CONFIG_ATH9K_DEBUGFS
2108 .get_et_sset_count
= ath9k_get_et_sset_count
,
2109 .get_et_stats
= ath9k_get_et_stats
,
2110 .get_et_strings
= ath9k_get_et_strings
,