]> git.proxmox.com Git - mirror_ubuntu-bionic-kernel.git/blob - drivers/net/wireless/ath/ath9k/main.c
projects / mirror_ubuntu-bionic-kernel.git / blob
? search:
summary | shortlog | log | commit | commitdiff | tree
blame | history | raw | HEAD
ath9k: reduce the likelihood of baseband hang check false positives
[mirror_ubuntu-bionic-kernel.git] / drivers / net / wireless / ath / ath9k / main.c
1 /*
2 * Copyright (c) 2008-2009 Atheros Communications Inc.
3 *
4 * Permission to use, copy, modify, and/or distribute this software for any
5 * purpose with or without fee is hereby granted, provided that the above
6 * copyright notice and this permission notice appear in all copies.
7 *
8 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
9 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
10 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
11 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
12 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
13 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
14 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
15 */
16
17 #include <linux/nl80211.h>
18 #include "ath9k.h"
19 #include "btcoex.h"
20
21 static void ath_update_txpow(struct ath_softc *sc)
22 {
23 struct ath_hw *ah = sc->sc_ah;
24
25 if (sc->curtxpow != sc->config.txpowlimit) {
26 ath9k_hw_set_txpowerlimit(ah, sc->config.txpowlimit, false);
27 /* read back in case value is clamped */
28 sc->curtxpow = ath9k_hw_regulatory(ah)->power_limit;
29 }
30 }
31
32 static u8 parse_mpdudensity(u8 mpdudensity)
33 {
34 /*
35 * 802.11n D2.0 defined values for "Minimum MPDU Start Spacing":
36 * 0 for no restriction
37 * 1 for 1/4 us
38 * 2 for 1/2 us
39 * 3 for 1 us
40 * 4 for 2 us
41 * 5 for 4 us
42 * 6 for 8 us
43 * 7 for 16 us
44 */
45 switch (mpdudensity) {
46 case 0:
47 return 0;
48 case 1:
49 case 2:
50 case 3:
51 /* Our lower layer calculations limit our precision to
52 1 microsecond */
53 return 1;
54 case 4:
55 return 2;
56 case 5:
57 return 4;
58 case 6:
59 return 8;
60 case 7:
61 return 16;
62 default:
63 return 0;
64 }
65 }
66
67 static struct ath9k_channel *ath_get_curchannel(struct ath_softc *sc,
68 struct ieee80211_hw *hw)
69 {
70 struct ieee80211_channel *curchan = hw->conf.channel;
71 struct ath9k_channel *channel;
72 u8 chan_idx;
73
74 chan_idx = curchan->hw_value;
75 channel = &sc->sc_ah->channels[chan_idx];
76 ath9k_update_ichannel(sc, hw, channel);
77 return channel;
78 }
79
80 bool ath9k_setpower(struct ath_softc *sc, enum ath9k_power_mode mode)
81 {
82 unsigned long flags;
83 bool ret;
84
85 spin_lock_irqsave(&sc->sc_pm_lock, flags);
86 ret = ath9k_hw_setpower(sc->sc_ah, mode);
87 spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
88
89 return ret;
90 }
91
92 void ath9k_ps_wakeup(struct ath_softc *sc)
93 {
94 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
95 unsigned long flags;
96 enum ath9k_power_mode power_mode;
97
98 spin_lock_irqsave(&sc->sc_pm_lock, flags);
99 if (++sc->ps_usecount != 1)
100 goto unlock;
101
102 power_mode = sc->sc_ah->power_mode;
103 ath9k_hw_setpower(sc->sc_ah, ATH9K_PM_AWAKE);
104
105 /*
106 * While the hardware is asleep, the cycle counters contain no
107 * useful data. Better clear them now so that they don't mess up
108 * survey data results.
109 */
110 if (power_mode != ATH9K_PM_AWAKE) {
111 spin_lock(&common->cc_lock);
112 ath_hw_cycle_counters_update(common);
113 memset(&common->cc_survey, 0, sizeof(common->cc_survey));
114 spin_unlock(&common->cc_lock);
115 }
116
117 unlock:
118 spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
119 }
120
121 void ath9k_ps_restore(struct ath_softc *sc)
122 {
123 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
124 unsigned long flags;
125
126 spin_lock_irqsave(&sc->sc_pm_lock, flags);
127 if (--sc->ps_usecount != 0)
128 goto unlock;
129
130 spin_lock(&common->cc_lock);
131 ath_hw_cycle_counters_update(common);
132 spin_unlock(&common->cc_lock);
133
134 if (sc->ps_idle)
135 ath9k_hw_setpower(sc->sc_ah, ATH9K_PM_FULL_SLEEP);
136 else if (sc->ps_enabled &&
137 !(sc->ps_flags & (PS_WAIT_FOR_BEACON |
138 PS_WAIT_FOR_CAB |
139 PS_WAIT_FOR_PSPOLL_DATA |
140 PS_WAIT_FOR_TX_ACK)))
141 ath9k_hw_setpower(sc->sc_ah, ATH9K_PM_NETWORK_SLEEP);
142
143 unlock:
144 spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
145 }
146
147 static void ath_start_ani(struct ath_common *common)
148 {
149 struct ath_hw *ah = common->ah;
150 unsigned long timestamp = jiffies_to_msecs(jiffies);
151 struct ath_softc *sc = (struct ath_softc *) common->priv;
152
153 if (!(sc->sc_flags & SC_OP_ANI_RUN))
154 return;
155
156 if (sc->sc_flags & SC_OP_OFFCHANNEL)
157 return;
158
159 common->ani.longcal_timer = timestamp;
160 common->ani.shortcal_timer = timestamp;
161 common->ani.checkani_timer = timestamp;
162
163 mod_timer(&common->ani.timer,
164 jiffies +
165 msecs_to_jiffies((u32)ah->config.ani_poll_interval));
166 }
167
168 static void ath_update_survey_nf(struct ath_softc *sc, int channel)
169 {
170 struct ath_hw *ah = sc->sc_ah;
171 struct ath9k_channel *chan = &ah->channels[channel];
172 struct survey_info *survey = &sc->survey[channel];
173
174 if (chan->noisefloor) {
175 survey->filled |= SURVEY_INFO_NOISE_DBM;
176 survey->noise = chan->noisefloor;
177 }
178 }
179
180 static void ath_update_survey_stats(struct ath_softc *sc)
181 {
182 struct ath_hw *ah = sc->sc_ah;
183 struct ath_common *common = ath9k_hw_common(ah);
184 int pos = ah->curchan - &ah->channels[0];
185 struct survey_info *survey = &sc->survey[pos];
186 struct ath_cycle_counters *cc = &common->cc_survey;
187 unsigned int div = common->clockrate * 1000;
188
189 if (!ah->curchan)
190 return;
191
192 if (ah->power_mode == ATH9K_PM_AWAKE)
193 ath_hw_cycle_counters_update(common);
194
195 if (cc->cycles > 0) {
196 survey->filled |= SURVEY_INFO_CHANNEL_TIME |
197 SURVEY_INFO_CHANNEL_TIME_BUSY |
198 SURVEY_INFO_CHANNEL_TIME_RX |
199 SURVEY_INFO_CHANNEL_TIME_TX;
200 survey->channel_time += cc->cycles / div;
201 survey->channel_time_busy += cc->rx_busy / div;
202 survey->channel_time_rx += cc->rx_frame / div;
203 survey->channel_time_tx += cc->tx_frame / div;
204 }
205 memset(cc, 0, sizeof(*cc));
206
207 ath_update_survey_nf(sc, pos);
208 }
209
210 /*
211 * Set/change channels. If the channel is really being changed, it's done
212 * by reseting the chip. To accomplish this we must first cleanup any pending
213 * DMA, then restart stuff.
214 */
215 int ath_set_channel(struct ath_softc *sc, struct ieee80211_hw *hw,
216 struct ath9k_channel *hchan)
217 {
218 struct ath_wiphy *aphy = hw->priv;
219 struct ath_hw *ah = sc->sc_ah;
220 struct ath_common *common = ath9k_hw_common(ah);
221 struct ieee80211_conf *conf = &common->hw->conf;
222 bool fastcc = true, stopped;
223 struct ieee80211_channel *channel = hw->conf.channel;
224 struct ath9k_hw_cal_data *caldata = NULL;
225 int r;
226
227 if (sc->sc_flags & SC_OP_INVALID)
228 return -EIO;
229
230 del_timer_sync(&common->ani.timer);
231 cancel_work_sync(&sc->paprd_work);
232 cancel_work_sync(&sc->hw_check_work);
233 cancel_delayed_work_sync(&sc->tx_complete_work);
234
235 ath9k_ps_wakeup(sc);
236
237 spin_lock_bh(&sc->sc_pcu_lock);
238
239 /*
240 * This is only performed if the channel settings have
241 * actually changed.
242 *
243 * To switch channels clear any pending DMA operations;
244 * wait long enough for the RX fifo to drain, reset the
245 * hardware at the new frequency, and then re-enable
246 * the relevant bits of the h/w.
247 */
248 ath9k_hw_disable_interrupts(ah);
249 stopped = ath_drain_all_txq(sc, false);
250
251 if (!ath_stoprecv(sc))
252 stopped = false;
253
254 if (!ath9k_hw_check_alive(ah))
255 stopped = false;
256
257 /* XXX: do not flush receive queue here. We don't want
258 * to flush data frames already in queue because of
259 * changing channel. */
260
261 if (!stopped || !(sc->sc_flags & SC_OP_OFFCHANNEL))
262 fastcc = false;
263
264 if (!(sc->sc_flags & SC_OP_OFFCHANNEL))
265 caldata = &aphy->caldata;
266
267 ath_dbg(common, ATH_DBG_CONFIG,
268 "(%u MHz) -> (%u MHz), conf_is_ht40: %d fastcc: %d\n",
269 sc->sc_ah->curchan->channel,
270 channel->center_freq, conf_is_ht40(conf),
271 fastcc);
272
273 r = ath9k_hw_reset(ah, hchan, caldata, fastcc);
274 if (r) {
275 ath_err(common,
276 "Unable to reset channel (%u MHz), reset status %d\n",
277 channel->center_freq, r);
278 goto ps_restore;
279 }
280
281 if (ath_startrecv(sc) != 0) {
282 ath_err(common, "Unable to restart recv logic\n");
283 r = -EIO;
284 goto ps_restore;
285 }
286
287 ath_update_txpow(sc);
288 ath9k_hw_set_interrupts(ah, ah->imask);
289
290 if (!(sc->sc_flags & (SC_OP_OFFCHANNEL))) {
291 if (sc->sc_flags & SC_OP_BEACONS)
292 ath_beacon_config(sc, NULL);
293 ieee80211_queue_delayed_work(sc->hw, &sc->tx_complete_work, 0);
294 ath_start_ani(common);
295 }
296
297 ps_restore:
298 spin_unlock_bh(&sc->sc_pcu_lock);
299
300 ath9k_ps_restore(sc);
301 return r;
302 }
303
304 static void ath_paprd_activate(struct ath_softc *sc)
305 {
306 struct ath_hw *ah = sc->sc_ah;
307 struct ath9k_hw_cal_data *caldata = ah->caldata;
308 struct ath_common *common = ath9k_hw_common(ah);
309 int chain;
310
311 if (!caldata || !caldata->paprd_done)
312 return;
313
314 ath9k_ps_wakeup(sc);
315 ar9003_paprd_enable(ah, false);
316 for (chain = 0; chain < AR9300_MAX_CHAINS; chain++) {
317 if (!(common->tx_chainmask & BIT(chain)))
318 continue;
319
320 ar9003_paprd_populate_single_table(ah, caldata, chain);
321 }
322
323 ar9003_paprd_enable(ah, true);
324 ath9k_ps_restore(sc);
325 }
326
327 static bool ath_paprd_send_frame(struct ath_softc *sc, struct sk_buff *skb, int chain)
328 {
329 struct ieee80211_hw *hw = sc->hw;
330 struct ieee80211_tx_info *tx_info = IEEE80211_SKB_CB(skb);
331 struct ath_tx_control txctl;
332 int time_left;
333
334 memset(&txctl, 0, sizeof(txctl));
335 txctl.txq = sc->tx.txq_map[WME_AC_BE];
336
337 memset(tx_info, 0, sizeof(*tx_info));
338 tx_info->band = hw->conf.channel->band;
339 tx_info->flags |= IEEE80211_TX_CTL_NO_ACK;
340 tx_info->control.rates[0].idx = 0;
341 tx_info->control.rates[0].count = 1;
342 tx_info->control.rates[0].flags = IEEE80211_TX_RC_MCS;
343 tx_info->control.rates[1].idx = -1;
344
345 init_completion(&sc->paprd_complete);
346 sc->paprd_pending = true;
347 txctl.paprd = BIT(chain);
348 if (ath_tx_start(hw, skb, &txctl) != 0)
349 return false;
350
351 time_left = wait_for_completion_timeout(&sc->paprd_complete,
352 msecs_to_jiffies(ATH_PAPRD_TIMEOUT));
353 sc->paprd_pending = false;
354
355 if (!time_left)
356 ath_dbg(ath9k_hw_common(sc->sc_ah), ATH_DBG_CALIBRATE,
357 "Timeout waiting for paprd training on TX chain %d\n",
358 chain);
359
360 return !!time_left;
361 }
362
363 void ath_paprd_calibrate(struct work_struct *work)
364 {
365 struct ath_softc *sc = container_of(work, struct ath_softc, paprd_work);
366 struct ieee80211_hw *hw = sc->hw;
367 struct ath_hw *ah = sc->sc_ah;
368 struct ieee80211_hdr *hdr;
369 struct sk_buff *skb = NULL;
370 struct ath9k_hw_cal_data *caldata = ah->caldata;
371 struct ath_common *common = ath9k_hw_common(ah);
372 int ftype;
373 int chain_ok = 0;
374 int chain;
375 int len = 1800;
376
377 if (!caldata)
378 return;
379
380 if (ar9003_paprd_init_table(ah) < 0)
381 return;
382
383 skb = alloc_skb(len, GFP_KERNEL);
384 if (!skb)
385 return;
386
387 skb_put(skb, len);
388 memset(skb->data, 0, len);
389 hdr = (struct ieee80211_hdr *)skb->data;
390 ftype = IEEE80211_FTYPE_DATA | IEEE80211_STYPE_NULLFUNC;
391 hdr->frame_control = cpu_to_le16(ftype);
392 hdr->duration_id = cpu_to_le16(10);
393 memcpy(hdr->addr1, hw->wiphy->perm_addr, ETH_ALEN);
394 memcpy(hdr->addr2, hw->wiphy->perm_addr, ETH_ALEN);
395 memcpy(hdr->addr3, hw->wiphy->perm_addr, ETH_ALEN);
396
397 ath9k_ps_wakeup(sc);
398 for (chain = 0; chain < AR9300_MAX_CHAINS; chain++) {
399 if (!(common->tx_chainmask & BIT(chain)))
400 continue;
401
402 chain_ok = 0;
403
404 ath_dbg(common, ATH_DBG_CALIBRATE,
405 "Sending PAPRD frame for thermal measurement "
406 "on chain %d\n", chain);
407 if (!ath_paprd_send_frame(sc, skb, chain))
408 goto fail_paprd;
409
410 ar9003_paprd_setup_gain_table(ah, chain);
411
412 ath_dbg(common, ATH_DBG_CALIBRATE,
413 "Sending PAPRD training frame on chain %d\n", chain);
414 if (!ath_paprd_send_frame(sc, skb, chain))
415 goto fail_paprd;
416
417 if (!ar9003_paprd_is_done(ah))
418 break;
419
420 if (ar9003_paprd_create_curve(ah, caldata, chain) != 0)
421 break;
422
423 chain_ok = 1;
424 }
425 kfree_skb(skb);
426
427 if (chain_ok) {
428 caldata->paprd_done = true;
429 ath_paprd_activate(sc);
430 }
431
432 fail_paprd:
433 ath9k_ps_restore(sc);
434 }
435
436 /*
437 * This routine performs the periodic noise floor calibration function
438 * that is used to adjust and optimize the chip performance. This
439 * takes environmental changes (location, temperature) into account.
440 * When the task is complete, it reschedules itself depending on the
441 * appropriate interval that was calculated.
442 */
443 void ath_ani_calibrate(unsigned long data)
444 {
445 struct ath_softc *sc = (struct ath_softc *)data;
446 struct ath_hw *ah = sc->sc_ah;
447 struct ath_common *common = ath9k_hw_common(ah);
448 bool longcal = false;
449 bool shortcal = false;
450 bool aniflag = false;
451 unsigned int timestamp = jiffies_to_msecs(jiffies);
452 u32 cal_interval, short_cal_interval, long_cal_interval;
453 unsigned long flags;
454
455 if (ah->caldata && ah->caldata->nfcal_interference)
456 long_cal_interval = ATH_LONG_CALINTERVAL_INT;
457 else
458 long_cal_interval = ATH_LONG_CALINTERVAL;
459
460 short_cal_interval = (ah->opmode == NL80211_IFTYPE_AP) ?
461 ATH_AP_SHORT_CALINTERVAL : ATH_STA_SHORT_CALINTERVAL;
462
463 /* Only calibrate if awake */
464 if (sc->sc_ah->power_mode != ATH9K_PM_AWAKE)
465 goto set_timer;
466
467 ath9k_ps_wakeup(sc);
468
469 /* Long calibration runs independently of short calibration. */
470 if ((timestamp - common->ani.longcal_timer) >= long_cal_interval) {
471 longcal = true;
472 ath_dbg(common, ATH_DBG_ANI, "longcal @%lu\n", jiffies);
473 common->ani.longcal_timer = timestamp;
474 }
475
476 /* Short calibration applies only while caldone is false */
477 if (!common->ani.caldone) {
478 if ((timestamp - common->ani.shortcal_timer) >= short_cal_interval) {
479 shortcal = true;
480 ath_dbg(common, ATH_DBG_ANI,
481 "shortcal @%lu\n", jiffies);
482 common->ani.shortcal_timer = timestamp;
483 common->ani.resetcal_timer = timestamp;
484 }
485 } else {
486 if ((timestamp - common->ani.resetcal_timer) >=
487 ATH_RESTART_CALINTERVAL) {
488 common->ani.caldone = ath9k_hw_reset_calvalid(ah);
489 if (common->ani.caldone)
490 common->ani.resetcal_timer = timestamp;
491 }
492 }
493
494 /* Verify whether we must check ANI */
495 if ((timestamp - common->ani.checkani_timer) >=
496 ah->config.ani_poll_interval) {
497 aniflag = true;
498 common->ani.checkani_timer = timestamp;
499 }
500
501 /* Skip all processing if there's nothing to do. */
502 if (longcal || shortcal || aniflag) {
503 /* Call ANI routine if necessary */
504 if (aniflag) {
505 spin_lock_irqsave(&common->cc_lock, flags);
506 ath9k_hw_ani_monitor(ah, ah->curchan);
507 ath_update_survey_stats(sc);
508 spin_unlock_irqrestore(&common->cc_lock, flags);
509 }
510
511 /* Perform calibration if necessary */
512 if (longcal || shortcal) {
513 common->ani.caldone =
514 ath9k_hw_calibrate(ah,
515 ah->curchan,
516 common->rx_chainmask,
517 longcal);
518 }
519 }
520
521 ath9k_ps_restore(sc);
522
523 set_timer:
524 /*
525 * Set timer interval based on previous results.
526 * The interval must be the shortest necessary to satisfy ANI,
527 * short calibration and long calibration.
528 */
529 cal_interval = ATH_LONG_CALINTERVAL;
530 if (sc->sc_ah->config.enable_ani)
531 cal_interval = min(cal_interval,
532 (u32)ah->config.ani_poll_interval);
533 if (!common->ani.caldone)
534 cal_interval = min(cal_interval, (u32)short_cal_interval);
535
536 mod_timer(&common->ani.timer, jiffies + msecs_to_jiffies(cal_interval));
537 if ((sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_PAPRD) && ah->caldata) {
538 if (!ah->caldata->paprd_done)
539 ieee80211_queue_work(sc->hw, &sc->paprd_work);
540 else if (!ah->paprd_table_write_done)
541 ath_paprd_activate(sc);
542 }
543 }
544
545 static void ath_node_attach(struct ath_softc *sc, struct ieee80211_sta *sta)
546 {
547 struct ath_node *an;
548 struct ath_hw *ah = sc->sc_ah;
549 an = (struct ath_node *)sta->drv_priv;
550
551 if ((ah->caps.hw_caps) & ATH9K_HW_CAP_APM)
552 sc->sc_flags |= SC_OP_ENABLE_APM;
553
554 if (sc->sc_flags & SC_OP_TXAGGR) {
555 ath_tx_node_init(sc, an);
556 an->maxampdu = 1 << (IEEE80211_HT_MAX_AMPDU_FACTOR +
557 sta->ht_cap.ampdu_factor);
558 an->mpdudensity = parse_mpdudensity(sta->ht_cap.ampdu_density);
559 }
560 }
561
562 static void ath_node_detach(struct ath_softc *sc, struct ieee80211_sta *sta)
563 {
564 struct ath_node *an = (struct ath_node *)sta->drv_priv;
565
566 if (sc->sc_flags & SC_OP_TXAGGR)
567 ath_tx_node_cleanup(sc, an);
568 }
569
570 void ath_hw_check(struct work_struct *work)
571 {
572 struct ath_softc *sc = container_of(work, struct ath_softc, hw_check_work);
573 int i;
574
575 ath9k_ps_wakeup(sc);
576
577 for (i = 0; i < 3; i++) {
578 if (ath9k_hw_check_alive(sc->sc_ah))
579 goto out;
580
581 msleep(1);
582 }
583 ath_reset(sc, true);
584
585 out:
586 ath9k_ps_restore(sc);
587 }
588
589 void ath9k_tasklet(unsigned long data)
590 {
591 struct ath_softc *sc = (struct ath_softc *)data;
592 struct ath_hw *ah = sc->sc_ah;
593 struct ath_common *common = ath9k_hw_common(ah);
594
595 u32 status = sc->intrstatus;
596 u32 rxmask;
597
598 ath9k_ps_wakeup(sc);
599
600 if (status & ATH9K_INT_FATAL) {
601 ath_reset(sc, true);
602 ath9k_ps_restore(sc);
603 return;
604 }
605
606 spin_lock(&sc->sc_pcu_lock);
607
608 /*
609 * Only run the baseband hang check if beacons stop working in AP or
610 * IBSS mode, because it has a high false positive rate. For station
611 * mode it should not be necessary, since the upper layers will detect
612 * this through a beacon miss automatically and the following channel
613 * change will trigger a hardware reset anyway
614 */
615 if (ath9k_hw_numtxpending(ah, sc->beacon.beaconq) != 0 &&
616 !ath9k_hw_check_alive(ah))
617 ieee80211_queue_work(sc->hw, &sc->hw_check_work);
618
619 if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)
620 rxmask = (ATH9K_INT_RXHP | ATH9K_INT_RXLP | ATH9K_INT_RXEOL |
621 ATH9K_INT_RXORN);
622 else
623 rxmask = (ATH9K_INT_RX | ATH9K_INT_RXEOL | ATH9K_INT_RXORN);
624
625 if (status & rxmask) {
626 /* Check for high priority Rx first */
627 if ((ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) &&
628 (status & ATH9K_INT_RXHP))
629 ath_rx_tasklet(sc, 0, true);
630
631 ath_rx_tasklet(sc, 0, false);
632 }
633
634 if (status & ATH9K_INT_TX) {
635 if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)
636 ath_tx_edma_tasklet(sc);
637 else
638 ath_tx_tasklet(sc);
639 }
640
641 if ((status & ATH9K_INT_TSFOOR) && sc->ps_enabled) {
642 /*
643 * TSF sync does not look correct; remain awake to sync with
644 * the next Beacon.
645 */
646 ath_dbg(common, ATH_DBG_PS,
647 "TSFOOR - Sync with next Beacon\n");
648 sc->ps_flags |= PS_WAIT_FOR_BEACON | PS_BEACON_SYNC;
649 }
650
651 if (ah->btcoex_hw.scheme == ATH_BTCOEX_CFG_3WIRE)
652 if (status & ATH9K_INT_GENTIMER)
653 ath_gen_timer_isr(sc->sc_ah);
654
655 /* re-enable hardware interrupt */
656 ath9k_hw_enable_interrupts(ah);
657
658 spin_unlock(&sc->sc_pcu_lock);
659 ath9k_ps_restore(sc);
660 }
661
662 irqreturn_t ath_isr(int irq, void *dev)
663 {
664 #define SCHED_INTR ( \
665 ATH9K_INT_FATAL | \
666 ATH9K_INT_RXORN | \
667 ATH9K_INT_RXEOL | \
668 ATH9K_INT_RX | \
669 ATH9K_INT_RXLP | \
670 ATH9K_INT_RXHP | \
671 ATH9K_INT_TX | \
672 ATH9K_INT_BMISS | \
673 ATH9K_INT_CST | \
674 ATH9K_INT_TSFOOR | \
675 ATH9K_INT_GENTIMER)
676
677 struct ath_softc *sc = dev;
678 struct ath_hw *ah = sc->sc_ah;
679 struct ath_common *common = ath9k_hw_common(ah);
680 enum ath9k_int status;
681 bool sched = false;
682
683 /*
684 * The hardware is not ready/present, don't
685 * touch anything. Note this can happen early
686 * on if the IRQ is shared.
687 */
688 if (sc->sc_flags & SC_OP_INVALID)
689 return IRQ_NONE;
690
691
692 /* shared irq, not for us */
693
694 if (!ath9k_hw_intrpend(ah))
695 return IRQ_NONE;
696
697 /*
698 * Figure out the reason(s) for the interrupt. Note
699 * that the hal returns a pseudo-ISR that may include
700 * bits we haven't explicitly enabled so we mask the
701 * value to insure we only process bits we requested.
702 */
703 ath9k_hw_getisr(ah, &status); /* NB: clears ISR too */
704 status &= ah->imask; /* discard unasked-for bits */
705
706 /*
707 * If there are no status bits set, then this interrupt was not
708 * for me (should have been caught above).
709 */
710 if (!status)
711 return IRQ_NONE;
712
713 /* Cache the status */
714 sc->intrstatus = status;
715
716 if (status & SCHED_INTR)
717 sched = true;
718
719 /*
720 * If a FATAL or RXORN interrupt is received, we have to reset the
721 * chip immediately.
722 */
723 if ((status & ATH9K_INT_FATAL) || ((status & ATH9K_INT_RXORN) &&
724 !(ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)))
725 goto chip_reset;
726
727 if ((ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) &&
728 (status & ATH9K_INT_BB_WATCHDOG)) {
729
730 spin_lock(&common->cc_lock);
731 ath_hw_cycle_counters_update(common);
732 ar9003_hw_bb_watchdog_dbg_info(ah);
733 spin_unlock(&common->cc_lock);
734
735 goto chip_reset;
736 }
737
738 if (status & ATH9K_INT_SWBA)
739 tasklet_schedule(&sc->bcon_tasklet);
740
741 if (status & ATH9K_INT_TXURN)
742 ath9k_hw_updatetxtriglevel(ah, true);
743
744 if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) {
745 if (status & ATH9K_INT_RXEOL) {
746 ah->imask &= ~(ATH9K_INT_RXEOL | ATH9K_INT_RXORN);
747 ath9k_hw_set_interrupts(ah, ah->imask);
748 }
749 }
750
751 if (status & ATH9K_INT_MIB) {
752 /*
753 * Disable interrupts until we service the MIB
754 * interrupt; otherwise it will continue to
755 * fire.
756 */
757 ath9k_hw_disable_interrupts(ah);
758 /*
759 * Let the hal handle the event. We assume
760 * it will clear whatever condition caused
761 * the interrupt.
762 */
763 spin_lock(&common->cc_lock);
764 ath9k_hw_proc_mib_event(ah);
765 spin_unlock(&common->cc_lock);
766 ath9k_hw_enable_interrupts(ah);
767 }
768
769 if (!(ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP))
770 if (status & ATH9K_INT_TIM_TIMER) {
771 if (ATH_DBG_WARN_ON_ONCE(sc->ps_idle))
772 goto chip_reset;
773 /* Clear RxAbort bit so that we can
774 * receive frames */
775 ath9k_setpower(sc, ATH9K_PM_AWAKE);
776 ath9k_hw_setrxabort(sc->sc_ah, 0);
777 sc->ps_flags |= PS_WAIT_FOR_BEACON;
778 }
779
780 chip_reset:
781
782 ath_debug_stat_interrupt(sc, status);
783
784 if (sched) {
785 /* turn off every interrupt */
786 ath9k_hw_disable_interrupts(ah);
787 tasklet_schedule(&sc->intr_tq);
788 }
789
790 return IRQ_HANDLED;
791
792 #undef SCHED_INTR
793 }
794
795 static u32 ath_get_extchanmode(struct ath_softc *sc,
796 struct ieee80211_channel *chan,
797 enum nl80211_channel_type channel_type)
798 {
799 u32 chanmode = 0;
800
801 switch (chan->band) {
802 case IEEE80211_BAND_2GHZ:
803 switch(channel_type) {
804 case NL80211_CHAN_NO_HT:
805 case NL80211_CHAN_HT20:
806 chanmode = CHANNEL_G_HT20;
807 break;
808 case NL80211_CHAN_HT40PLUS:
809 chanmode = CHANNEL_G_HT40PLUS;
810 break;
811 case NL80211_CHAN_HT40MINUS:
812 chanmode = CHANNEL_G_HT40MINUS;
813 break;
814 }
815 break;
816 case IEEE80211_BAND_5GHZ:
817 switch(channel_type) {
818 case NL80211_CHAN_NO_HT:
819 case NL80211_CHAN_HT20:
820 chanmode = CHANNEL_A_HT20;
821 break;
822 case NL80211_CHAN_HT40PLUS:
823 chanmode = CHANNEL_A_HT40PLUS;
824 break;
825 case NL80211_CHAN_HT40MINUS:
826 chanmode = CHANNEL_A_HT40MINUS;
827 break;
828 }
829 break;
830 default:
831 break;
832 }
833
834 return chanmode;
835 }
836
837 static void ath9k_bss_assoc_info(struct ath_softc *sc,
838 struct ieee80211_hw *hw,
839 struct ieee80211_vif *vif,
840 struct ieee80211_bss_conf *bss_conf)
841 {
842 struct ath_wiphy *aphy = hw->priv;
843 struct ath_hw *ah = sc->sc_ah;
844 struct ath_common *common = ath9k_hw_common(ah);
845
846 if (bss_conf->assoc) {
847 ath_dbg(common, ATH_DBG_CONFIG,
848 "Bss Info ASSOC %d, bssid: %pM\n",
849 bss_conf->aid, common->curbssid);
850
851 /* New association, store aid */
852 common->curaid = bss_conf->aid;
853 ath9k_hw_write_associd(ah);
854
855 /*
856 * Request a re-configuration of Beacon related timers
857 * on the receipt of the first Beacon frame (i.e.,
858 * after time sync with the AP).
859 */
860 sc->ps_flags |= PS_BEACON_SYNC;
861
862 /* Configure the beacon */
863 ath_beacon_config(sc, vif);
864
865 /* Reset rssi stats */
866 aphy->last_rssi = ATH_RSSI_DUMMY_MARKER;
867 sc->sc_ah->stats.avgbrssi = ATH_RSSI_DUMMY_MARKER;
868
869 sc->sc_flags |= SC_OP_ANI_RUN;
870 ath_start_ani(common);
871 } else {
872 ath_dbg(common, ATH_DBG_CONFIG, "Bss Info DISASSOC\n");
873 common->curaid = 0;
874 /* Stop ANI */
875 sc->sc_flags &= ~SC_OP_ANI_RUN;
876 del_timer_sync(&common->ani.timer);
877 }
878 }
879
880 void ath_radio_enable(struct ath_softc *sc, struct ieee80211_hw *hw)
881 {
882 struct ath_hw *ah = sc->sc_ah;
883 struct ath_common *common = ath9k_hw_common(ah);
884 struct ieee80211_channel *channel = hw->conf.channel;
885 int r;
886
887 ath9k_ps_wakeup(sc);
888 spin_lock_bh(&sc->sc_pcu_lock);
889
890 ath9k_hw_configpcipowersave(ah, 0, 0);
891
892 if (!ah->curchan)
893 ah->curchan = ath_get_curchannel(sc, sc->hw);
894
895 r = ath9k_hw_reset(ah, ah->curchan, ah->caldata, false);
896 if (r) {
897 ath_err(common,
898 "Unable to reset channel (%u MHz), reset status %d\n",
899 channel->center_freq, r);
900 }
901
902 ath_update_txpow(sc);
903 if (ath_startrecv(sc) != 0) {
904 ath_err(common, "Unable to restart recv logic\n");
905 goto out;
906 }
907 if (sc->sc_flags & SC_OP_BEACONS)
908 ath_beacon_config(sc, NULL); /* restart beacons */
909
910 /* Re-Enable interrupts */
911 ath9k_hw_set_interrupts(ah, ah->imask);
912
913 /* Enable LED */
914 ath9k_hw_cfg_output(ah, ah->led_pin,
915 AR_GPIO_OUTPUT_MUX_AS_OUTPUT);
916 ath9k_hw_set_gpio(ah, ah->led_pin, 0);
917
918 ieee80211_wake_queues(hw);
919 out:
920 spin_unlock_bh(&sc->sc_pcu_lock);
921
922 ath9k_ps_restore(sc);
923 }
924
925 void ath_radio_disable(struct ath_softc *sc, struct ieee80211_hw *hw)
926 {
927 struct ath_hw *ah = sc->sc_ah;
928 struct ieee80211_channel *channel = hw->conf.channel;
929 int r;
930
931 ath9k_ps_wakeup(sc);
932 spin_lock_bh(&sc->sc_pcu_lock);
933
934 ieee80211_stop_queues(hw);
935
936 /*
937 * Keep the LED on when the radio is disabled
938 * during idle unassociated state.
939 */
940 if (!sc->ps_idle) {
941 ath9k_hw_set_gpio(ah, ah->led_pin, 1);
942 ath9k_hw_cfg_gpio_input(ah, ah->led_pin);
943 }
944
945 /* Disable interrupts */
946 ath9k_hw_disable_interrupts(ah);
947
948 ath_drain_all_txq(sc, false); /* clear pending tx frames */
949
950 ath_stoprecv(sc); /* turn off frame recv */
951 ath_flushrecv(sc); /* flush recv queue */
952
953 if (!ah->curchan)
954 ah->curchan = ath_get_curchannel(sc, hw);
955
956 r = ath9k_hw_reset(ah, ah->curchan, ah->caldata, false);
957 if (r) {
958 ath_err(ath9k_hw_common(sc->sc_ah),
959 "Unable to reset channel (%u MHz), reset status %d\n",
960 channel->center_freq, r);
961 }
962
963 ath9k_hw_phy_disable(ah);
964
965 ath9k_hw_configpcipowersave(ah, 1, 1);
966
967 spin_unlock_bh(&sc->sc_pcu_lock);
968 ath9k_ps_restore(sc);
969
970 ath9k_setpower(sc, ATH9K_PM_FULL_SLEEP);
971 }
972
973 int ath_reset(struct ath_softc *sc, bool retry_tx)
974 {
975 struct ath_hw *ah = sc->sc_ah;
976 struct ath_common *common = ath9k_hw_common(ah);
977 struct ieee80211_hw *hw = sc->hw;
978 int r;
979
980 /* Stop ANI */
981 del_timer_sync(&common->ani.timer);
982
983 spin_lock_bh(&sc->sc_pcu_lock);
984
985 ieee80211_stop_queues(hw);
986
987 ath9k_hw_disable_interrupts(ah);
988 ath_drain_all_txq(sc, retry_tx);
989
990 ath_stoprecv(sc);
991 ath_flushrecv(sc);
992
993 r = ath9k_hw_reset(ah, sc->sc_ah->curchan, ah->caldata, false);
994 if (r)
995 ath_err(common,
996 "Unable to reset hardware; reset status %d\n", r);
997
998 if (ath_startrecv(sc) != 0)
999 ath_err(common, "Unable to start recv logic\n");
1000
1001 /*
1002 * We may be doing a reset in response to a request
1003 * that changes the channel so update any state that
1004 * might change as a result.
1005 */
1006 ath_update_txpow(sc);
1007
1008 if ((sc->sc_flags & SC_OP_BEACONS) || !(sc->sc_flags & (SC_OP_OFFCHANNEL)))
1009 ath_beacon_config(sc, NULL); /* restart beacons */
1010
1011 ath9k_hw_set_interrupts(ah, ah->imask);
1012
1013 if (retry_tx) {
1014 int i;
1015 for (i = 0; i < ATH9K_NUM_TX_QUEUES; i++) {
1016 if (ATH_TXQ_SETUP(sc, i)) {
1017 spin_lock_bh(&sc->tx.txq[i].axq_lock);
1018 ath_txq_schedule(sc, &sc->tx.txq[i]);
1019 spin_unlock_bh(&sc->tx.txq[i].axq_lock);
1020 }
1021 }
1022 }
1023
1024 ieee80211_wake_queues(hw);
1025 spin_unlock_bh(&sc->sc_pcu_lock);
1026
1027 /* Start ANI */
1028 ath_start_ani(common);
1029
1030 return r;
1031 }
1032
1033 /* XXX: Remove me once we don't depend on ath9k_channel for all
1034 * this redundant data */
1035 void ath9k_update_ichannel(struct ath_softc *sc, struct ieee80211_hw *hw,
1036 struct ath9k_channel *ichan)
1037 {
1038 struct ieee80211_channel *chan = hw->conf.channel;
1039 struct ieee80211_conf *conf = &hw->conf;
1040
1041 ichan->channel = chan->center_freq;
1042 ichan->chan = chan;
1043
1044 if (chan->band == IEEE80211_BAND_2GHZ) {
1045 ichan->chanmode = CHANNEL_G;
1046 ichan->channelFlags = CHANNEL_2GHZ | CHANNEL_OFDM | CHANNEL_G;
1047 } else {
1048 ichan->chanmode = CHANNEL_A;
1049 ichan->channelFlags = CHANNEL_5GHZ | CHANNEL_OFDM;
1050 }
1051
1052 if (conf_is_ht(conf))
1053 ichan->chanmode = ath_get_extchanmode(sc, chan,
1054 conf->channel_type);
1055 }
1056
1057 /**********************/
1058 /* mac80211 callbacks */
1059 /**********************/
1060
1061 static int ath9k_start(struct ieee80211_hw *hw)
1062 {
1063 struct ath_wiphy *aphy = hw->priv;
1064 struct ath_softc *sc = aphy->sc;
1065 struct ath_hw *ah = sc->sc_ah;
1066 struct ath_common *common = ath9k_hw_common(ah);
1067 struct ieee80211_channel *curchan = hw->conf.channel;
1068 struct ath9k_channel *init_channel;
1069 int r;
1070
1071 ath_dbg(common, ATH_DBG_CONFIG,
1072 "Starting driver with initial channel: %d MHz\n",
1073 curchan->center_freq);
1074
1075 mutex_lock(&sc->mutex);
1076
1077 if (ath9k_wiphy_started(sc)) {
1078 if (sc->chan_idx == curchan->hw_value) {
1079 /*
1080 * Already on the operational channel, the new wiphy
1081 * can be marked active.
1082 */
1083 aphy->state = ATH_WIPHY_ACTIVE;
1084 ieee80211_wake_queues(hw);
1085 } else {
1086 /*
1087 * Another wiphy is on another channel, start the new
1088 * wiphy in paused state.
1089 */
1090 aphy->state = ATH_WIPHY_PAUSED;
1091 ieee80211_stop_queues(hw);
1092 }
1093 mutex_unlock(&sc->mutex);
1094 return 0;
1095 }
1096 aphy->state = ATH_WIPHY_ACTIVE;
1097
1098 /* setup initial channel */
1099
1100 sc->chan_idx = curchan->hw_value;
1101
1102 init_channel = ath_get_curchannel(sc, hw);
1103
1104 /* Reset SERDES registers */
1105 ath9k_hw_configpcipowersave(ah, 0, 0);
1106
1107 /*
1108 * The basic interface to setting the hardware in a good
1109 * state is ``reset''. On return the hardware is known to
1110 * be powered up and with interrupts disabled. This must
1111 * be followed by initialization of the appropriate bits
1112 * and then setup of the interrupt mask.
1113 */
1114 spin_lock_bh(&sc->sc_pcu_lock);
1115 r = ath9k_hw_reset(ah, init_channel, ah->caldata, false);
1116 if (r) {
1117 ath_err(common,
1118 "Unable to reset hardware; reset status %d (freq %u MHz)\n",
1119 r, curchan->center_freq);
1120 spin_unlock_bh(&sc->sc_pcu_lock);
1121 goto mutex_unlock;
1122 }
1123
1124 /*
1125 * This is needed only to setup initial state
1126 * but it's best done after a reset.
1127 */
1128 ath_update_txpow(sc);
1129
1130 /*
1131 * Setup the hardware after reset:
1132 * The receive engine is set going.
1133 * Frame transmit is handled entirely
1134 * in the frame output path; there's nothing to do
1135 * here except setup the interrupt mask.
1136 */
1137 if (ath_startrecv(sc) != 0) {
1138 ath_err(common, "Unable to start recv logic\n");
1139 r = -EIO;
1140 spin_unlock_bh(&sc->sc_pcu_lock);
1141 goto mutex_unlock;
1142 }
1143 spin_unlock_bh(&sc->sc_pcu_lock);
1144
1145 /* Setup our intr mask. */
1146 ah->imask = ATH9K_INT_TX | ATH9K_INT_RXEOL |
1147 ATH9K_INT_RXORN | ATH9K_INT_FATAL |
1148 ATH9K_INT_GLOBAL;
1149
1150 if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)
1151 ah->imask |= ATH9K_INT_RXHP |
1152 ATH9K_INT_RXLP |
1153 ATH9K_INT_BB_WATCHDOG;
1154 else
1155 ah->imask |= ATH9K_INT_RX;
1156
1157 ah->imask |= ATH9K_INT_GTT;
1158
1159 if (ah->caps.hw_caps & ATH9K_HW_CAP_HT)
1160 ah->imask |= ATH9K_INT_CST;
1161
1162 sc->sc_flags &= ~SC_OP_INVALID;
1163 sc->sc_ah->is_monitoring = false;
1164
1165 /* Disable BMISS interrupt when we're not associated */
1166 ah->imask &= ~(ATH9K_INT_SWBA | ATH9K_INT_BMISS);
1167 ath9k_hw_set_interrupts(ah, ah->imask);
1168
1169 ieee80211_wake_queues(hw);
1170
1171 ieee80211_queue_delayed_work(sc->hw, &sc->tx_complete_work, 0);
1172
1173 if ((ah->btcoex_hw.scheme != ATH_BTCOEX_CFG_NONE) &&
1174 !ah->btcoex_hw.enabled) {
1175 ath9k_hw_btcoex_set_weight(ah, AR_BT_COEX_WGHT,
1176 AR_STOMP_LOW_WLAN_WGHT);
1177 ath9k_hw_btcoex_enable(ah);
1178
1179 if (common->bus_ops->bt_coex_prep)
1180 common->bus_ops->bt_coex_prep(common);
1181 if (ah->btcoex_hw.scheme == ATH_BTCOEX_CFG_3WIRE)
1182 ath9k_btcoex_timer_resume(sc);
1183 }
1184
1185 /* User has the option to provide pm-qos value as a module
1186 * parameter rather than using the default value of
1187 * 'ATH9K_PM_QOS_DEFAULT_VALUE'.
1188 */
1189 pm_qos_update_request(&sc->pm_qos_req, ath9k_pm_qos_value);
1190
1191 if (ah->caps.pcie_lcr_extsync_en && common->bus_ops->extn_synch_en)
1192 common->bus_ops->extn_synch_en(common);
1193
1194 mutex_unlock:
1195 mutex_unlock(&sc->mutex);
1196
1197 return r;
1198 }
1199
1200 static int ath9k_tx(struct ieee80211_hw *hw,
1201 struct sk_buff *skb)
1202 {
1203 struct ath_wiphy *aphy = hw->priv;
1204 struct ath_softc *sc = aphy->sc;
1205 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1206 struct ath_tx_control txctl;
1207 struct ieee80211_hdr *hdr = (struct ieee80211_hdr *) skb->data;
1208
1209 if (aphy->state != ATH_WIPHY_ACTIVE && aphy->state != ATH_WIPHY_SCAN) {
1210 ath_dbg(common, ATH_DBG_XMIT,
1211 "ath9k: %s: TX in unexpected wiphy state %d\n",
1212 wiphy_name(hw->wiphy), aphy->state);
1213 goto exit;
1214 }
1215
1216 if (sc->ps_enabled) {
1217 /*
1218 * mac80211 does not set PM field for normal data frames, so we
1219 * need to update that based on the current PS mode.
1220 */
1221 if (ieee80211_is_data(hdr->frame_control) &&
1222 !ieee80211_is_nullfunc(hdr->frame_control) &&
1223 !ieee80211_has_pm(hdr->frame_control)) {
1224 ath_dbg(common, ATH_DBG_PS,
1225 "Add PM=1 for a TX frame while in PS mode\n");
1226 hdr->frame_control |= cpu_to_le16(IEEE80211_FCTL_PM);
1227 }
1228 }
1229
1230 if (unlikely(sc->sc_ah->power_mode != ATH9K_PM_AWAKE)) {
1231 /*
1232 * We are using PS-Poll and mac80211 can request TX while in
1233 * power save mode. Need to wake up hardware for the TX to be
1234 * completed and if needed, also for RX of buffered frames.
1235 */
1236 ath9k_ps_wakeup(sc);
1237 if (!(sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP))
1238 ath9k_hw_setrxabort(sc->sc_ah, 0);
1239 if (ieee80211_is_pspoll(hdr->frame_control)) {
1240 ath_dbg(common, ATH_DBG_PS,
1241 "Sending PS-Poll to pick a buffered frame\n");
1242 sc->ps_flags |= PS_WAIT_FOR_PSPOLL_DATA;
1243 } else {
1244 ath_dbg(common, ATH_DBG_PS,
1245 "Wake up to complete TX\n");
1246 sc->ps_flags |= PS_WAIT_FOR_TX_ACK;
1247 }
1248 /*
1249 * The actual restore operation will happen only after
1250 * the sc_flags bit is cleared. We are just dropping
1251 * the ps_usecount here.
1252 */
1253 ath9k_ps_restore(sc);
1254 }
1255
1256 memset(&txctl, 0, sizeof(struct ath_tx_control));
1257 txctl.txq = sc->tx.txq_map[skb_get_queue_mapping(skb)];
1258
1259 ath_dbg(common, ATH_DBG_XMIT, "transmitting packet, skb: %p\n", skb);
1260
1261 if (ath_tx_start(hw, skb, &txctl) != 0) {
1262 ath_dbg(common, ATH_DBG_XMIT, "TX failed\n");
1263 goto exit;
1264 }
1265
1266 return 0;
1267 exit:
1268 dev_kfree_skb_any(skb);
1269 return 0;
1270 }
1271
1272 static void ath9k_stop(struct ieee80211_hw *hw)
1273 {
1274 struct ath_wiphy *aphy = hw->priv;
1275 struct ath_softc *sc = aphy->sc;
1276 struct ath_hw *ah = sc->sc_ah;
1277 struct ath_common *common = ath9k_hw_common(ah);
1278 int i;
1279
1280 mutex_lock(&sc->mutex);
1281
1282 aphy->state = ATH_WIPHY_INACTIVE;
1283
1284 if (led_blink)
1285 cancel_delayed_work_sync(&sc->ath_led_blink_work);
1286
1287 cancel_delayed_work_sync(&sc->tx_complete_work);
1288 cancel_work_sync(&sc->paprd_work);
1289 cancel_work_sync(&sc->hw_check_work);
1290
1291 for (i = 0; i < sc->num_sec_wiphy; i++) {
1292 if (sc->sec_wiphy[i])
1293 break;
1294 }
1295
1296 if (i == sc->num_sec_wiphy) {
1297 cancel_delayed_work_sync(&sc->wiphy_work);
1298 cancel_work_sync(&sc->chan_work);
1299 }
1300
1301 if (sc->sc_flags & SC_OP_INVALID) {
1302 ath_dbg(common, ATH_DBG_ANY, "Device not present\n");
1303 mutex_unlock(&sc->mutex);
1304 return;
1305 }
1306
1307 if (ath9k_wiphy_started(sc)) {
1308 mutex_unlock(&sc->mutex);
1309 return; /* another wiphy still in use */
1310 }
1311
1312 /* Ensure HW is awake when we try to shut it down. */
1313 ath9k_ps_wakeup(sc);
1314
1315 if (ah->btcoex_hw.enabled) {
1316 ath9k_hw_btcoex_disable(ah);
1317 if (ah->btcoex_hw.scheme == ATH_BTCOEX_CFG_3WIRE)
1318 ath9k_btcoex_timer_pause(sc);
1319 }
1320
1321 spin_lock_bh(&sc->sc_pcu_lock);
1322
1323 /* make sure h/w will not generate any interrupt
1324 * before setting the invalid flag. */
1325 ath9k_hw_disable_interrupts(ah);
1326
1327 if (!(sc->sc_flags & SC_OP_INVALID)) {
1328 ath_drain_all_txq(sc, false);
1329 ath_stoprecv(sc);
1330 ath9k_hw_phy_disable(ah);
1331 } else
1332 sc->rx.rxlink = NULL;
1333
1334 /* disable HAL and put h/w to sleep */
1335 ath9k_hw_disable(ah);
1336 ath9k_hw_configpcipowersave(ah, 1, 1);
1337
1338 spin_unlock_bh(&sc->sc_pcu_lock);
1339
1340 ath9k_ps_restore(sc);
1341
1342 sc->ps_idle = true;
1343 ath9k_set_wiphy_idle(aphy, true);
1344 ath_radio_disable(sc, hw);
1345
1346 sc->sc_flags |= SC_OP_INVALID;
1347
1348 pm_qos_update_request(&sc->pm_qos_req, PM_QOS_DEFAULT_VALUE);
1349
1350 mutex_unlock(&sc->mutex);
1351
1352 ath_dbg(common, ATH_DBG_CONFIG, "Driver halt\n");
1353 }
1354
1355 static int ath9k_add_interface(struct ieee80211_hw *hw,
1356 struct ieee80211_vif *vif)
1357 {
1358 struct ath_wiphy *aphy = hw->priv;
1359 struct ath_softc *sc = aphy->sc;
1360 struct ath_hw *ah = sc->sc_ah;
1361 struct ath_common *common = ath9k_hw_common(ah);
1362 struct ath_vif *avp = (void *)vif->drv_priv;
1363 enum nl80211_iftype ic_opmode = NL80211_IFTYPE_UNSPECIFIED;
1364 int ret = 0;
1365
1366 mutex_lock(&sc->mutex);
1367
1368 switch (vif->type) {
1369 case NL80211_IFTYPE_STATION:
1370 ic_opmode = NL80211_IFTYPE_STATION;
1371 break;
1372 case NL80211_IFTYPE_WDS:
1373 ic_opmode = NL80211_IFTYPE_WDS;
1374 break;
1375 case NL80211_IFTYPE_ADHOC:
1376 case NL80211_IFTYPE_AP:
1377 case NL80211_IFTYPE_MESH_POINT:
1378 if (sc->nbcnvifs >= ATH_BCBUF) {
1379 ret = -ENOBUFS;
1380 goto out;
1381 }
1382 ic_opmode = vif->type;
1383 break;
1384 default:
1385 ath_err(common, "Interface type %d not yet supported\n",
1386 vif->type);
1387 ret = -EOPNOTSUPP;
1388 goto out;
1389 }
1390
1391 ath_dbg(common, ATH_DBG_CONFIG,
1392 "Attach a VIF of type: %d\n", ic_opmode);
1393
1394 /* Set the VIF opmode */
1395 avp->av_opmode = ic_opmode;
1396 avp->av_bslot = -1;
1397
1398 sc->nvifs++;
1399
1400 ath9k_set_bssid_mask(hw, vif);
1401
1402 if (sc->nvifs > 1)
1403 goto out; /* skip global settings for secondary vif */
1404
1405 if (ic_opmode == NL80211_IFTYPE_AP) {
1406 ath9k_hw_set_tsfadjust(ah, 1);
1407 sc->sc_flags |= SC_OP_TSF_RESET;
1408 }
1409
1410 /* Set the device opmode */
1411 ah->opmode = ic_opmode;
1412
1413 /*
1414 * Enable MIB interrupts when there are hardware phy counters.
1415 * Note we only do this (at the moment) for station mode.
1416 */
1417 if ((vif->type == NL80211_IFTYPE_STATION) ||
1418 (vif->type == NL80211_IFTYPE_ADHOC) ||
1419 (vif->type == NL80211_IFTYPE_MESH_POINT)) {
1420 if (ah->config.enable_ani)
1421 ah->imask |= ATH9K_INT_MIB;
1422 ah->imask |= ATH9K_INT_TSFOOR;
1423 }
1424
1425 ath9k_hw_set_interrupts(ah, ah->imask);
1426
1427 if (vif->type == NL80211_IFTYPE_AP ||
1428 vif->type == NL80211_IFTYPE_ADHOC) {
1429 sc->sc_flags |= SC_OP_ANI_RUN;
1430 ath_start_ani(common);
1431 }
1432
1433 out:
1434 mutex_unlock(&sc->mutex);
1435 return ret;
1436 }
1437
1438 static void ath9k_reclaim_beacon(struct ath_softc *sc,
1439 struct ieee80211_vif *vif)
1440 {
1441 struct ath_vif *avp = (void *)vif->drv_priv;
1442
1443 /* Disable SWBA interrupt */
1444 sc->sc_ah->imask &= ~ATH9K_INT_SWBA;
1445 ath9k_ps_wakeup(sc);
1446 ath9k_hw_set_interrupts(sc->sc_ah, sc->sc_ah->imask);
1447 ath9k_hw_stoptxdma(sc->sc_ah, sc->beacon.beaconq);
1448 tasklet_kill(&sc->bcon_tasklet);
1449 ath9k_ps_restore(sc);
1450
1451 ath_beacon_return(sc, avp);
1452 sc->sc_flags &= ~SC_OP_BEACONS;
1453
1454 if (sc->nbcnvifs > 0) {
1455 /* Re-enable beaconing */
1456 sc->sc_ah->imask |= ATH9K_INT_SWBA;
1457 ath9k_ps_wakeup(sc);
1458 ath9k_hw_set_interrupts(sc->sc_ah, sc->sc_ah->imask);
1459 ath9k_ps_restore(sc);
1460 }
1461 }
1462
1463 static int ath9k_change_interface(struct ieee80211_hw *hw,
1464 struct ieee80211_vif *vif,
1465 enum nl80211_iftype new_type,
1466 bool p2p)
1467 {
1468 struct ath_wiphy *aphy = hw->priv;
1469 struct ath_softc *sc = aphy->sc;
1470 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1471 int ret = 0;
1472
1473 ath_dbg(common, ATH_DBG_CONFIG, "Change Interface\n");
1474 mutex_lock(&sc->mutex);
1475
1476 switch (new_type) {
1477 case NL80211_IFTYPE_AP:
1478 case NL80211_IFTYPE_ADHOC:
1479 if (sc->nbcnvifs >= ATH_BCBUF) {
1480 ath_err(common, "No beacon slot available\n");
1481 ret = -ENOBUFS;
1482 goto out;
1483 }
1484 break;
1485 case NL80211_IFTYPE_STATION:
1486 /* Stop ANI */
1487 sc->sc_flags &= ~SC_OP_ANI_RUN;
1488 del_timer_sync(&common->ani.timer);
1489 if ((vif->type == NL80211_IFTYPE_AP) ||
1490 (vif->type == NL80211_IFTYPE_ADHOC))
1491 ath9k_reclaim_beacon(sc, vif);
1492 break;
1493 default:
1494 ath_err(common, "Interface type %d not yet supported\n",
1495 vif->type);
1496 ret = -ENOTSUPP;
1497 goto out;
1498 }
1499 vif->type = new_type;
1500 vif->p2p = p2p;
1501
1502 out:
1503 mutex_unlock(&sc->mutex);
1504 return ret;
1505 }
1506
1507 static void ath9k_remove_interface(struct ieee80211_hw *hw,
1508 struct ieee80211_vif *vif)
1509 {
1510 struct ath_wiphy *aphy = hw->priv;
1511 struct ath_softc *sc = aphy->sc;
1512 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1513
1514 ath_dbg(common, ATH_DBG_CONFIG, "Detach Interface\n");
1515
1516 mutex_lock(&sc->mutex);
1517
1518 /* Stop ANI */
1519 sc->sc_flags &= ~SC_OP_ANI_RUN;
1520 del_timer_sync(&common->ani.timer);
1521
1522 /* Reclaim beacon resources */
1523 if ((sc->sc_ah->opmode == NL80211_IFTYPE_AP) ||
1524 (sc->sc_ah->opmode == NL80211_IFTYPE_ADHOC) ||
1525 (sc->sc_ah->opmode == NL80211_IFTYPE_MESH_POINT))
1526 ath9k_reclaim_beacon(sc, vif);
1527
1528 sc->nvifs--;
1529
1530 mutex_unlock(&sc->mutex);
1531 }
1532
1533 static void ath9k_enable_ps(struct ath_softc *sc)
1534 {
1535 struct ath_hw *ah = sc->sc_ah;
1536
1537 sc->ps_enabled = true;
1538 if (!(ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP)) {
1539 if ((ah->imask & ATH9K_INT_TIM_TIMER) == 0) {
1540 ah->imask |= ATH9K_INT_TIM_TIMER;
1541 ath9k_hw_set_interrupts(ah, ah->imask);
1542 }
1543 ath9k_hw_setrxabort(ah, 1);
1544 }
1545 }
1546
1547 static void ath9k_disable_ps(struct ath_softc *sc)
1548 {
1549 struct ath_hw *ah = sc->sc_ah;
1550
1551 sc->ps_enabled = false;
1552 ath9k_hw_setpower(ah, ATH9K_PM_AWAKE);
1553 if (!(ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP)) {
1554 ath9k_hw_setrxabort(ah, 0);
1555 sc->ps_flags &= ~(PS_WAIT_FOR_BEACON |
1556 PS_WAIT_FOR_CAB |
1557 PS_WAIT_FOR_PSPOLL_DATA |
1558 PS_WAIT_FOR_TX_ACK);
1559 if (ah->imask & ATH9K_INT_TIM_TIMER) {
1560 ah->imask &= ~ATH9K_INT_TIM_TIMER;
1561 ath9k_hw_set_interrupts(ah, ah->imask);
1562 }
1563 }
1564
1565 }
1566
1567 static int ath9k_config(struct ieee80211_hw *hw, u32 changed)
1568 {
1569 struct ath_wiphy *aphy = hw->priv;
1570 struct ath_softc *sc = aphy->sc;
1571 struct ath_hw *ah = sc->sc_ah;
1572 struct ath_common *common = ath9k_hw_common(ah);
1573 struct ieee80211_conf *conf = &hw->conf;
1574 bool disable_radio;
1575
1576 mutex_lock(&sc->mutex);
1577
1578 /*
1579 * Leave this as the first check because we need to turn on the
1580 * radio if it was disabled before prior to processing the rest
1581 * of the changes. Likewise we must only disable the radio towards
1582 * the end.
1583 */
1584 if (changed & IEEE80211_CONF_CHANGE_IDLE) {
1585 bool enable_radio;
1586 bool all_wiphys_idle;
1587 bool idle = !!(conf->flags & IEEE80211_CONF_IDLE);
1588
1589 spin_lock_bh(&sc->wiphy_lock);
1590 all_wiphys_idle = ath9k_all_wiphys_idle(sc);
1591 ath9k_set_wiphy_idle(aphy, idle);
1592
1593 enable_radio = (!idle && all_wiphys_idle);
1594
1595 /*
1596 * After we unlock here its possible another wiphy
1597 * can be re-renabled so to account for that we will
1598 * only disable the radio toward the end of this routine
1599 * if by then all wiphys are still idle.
1600 */
1601 spin_unlock_bh(&sc->wiphy_lock);
1602
1603 if (enable_radio) {
1604 sc->ps_idle = false;
1605 ath_radio_enable(sc, hw);
1606 ath_dbg(common, ATH_DBG_CONFIG,
1607 "not-idle: enabling radio\n");
1608 }
1609 }
1610
1611 /*
1612 * We just prepare to enable PS. We have to wait until our AP has
1613 * ACK'd our null data frame to disable RX otherwise we'll ignore
1614 * those ACKs and end up retransmitting the same null data frames.
1615 * IEEE80211_CONF_CHANGE_PS is only passed by mac80211 for STA mode.
1616 */
1617 if (changed & IEEE80211_CONF_CHANGE_PS) {
1618 unsigned long flags;
1619 spin_lock_irqsave(&sc->sc_pm_lock, flags);
1620 if (conf->flags & IEEE80211_CONF_PS)
1621 ath9k_enable_ps(sc);
1622 else
1623 ath9k_disable_ps(sc);
1624 spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
1625 }
1626
1627 if (changed & IEEE80211_CONF_CHANGE_MONITOR) {
1628 if (conf->flags & IEEE80211_CONF_MONITOR) {
1629 ath_dbg(common, ATH_DBG_CONFIG,
1630 "Monitor mode is enabled\n");
1631 sc->sc_ah->is_monitoring = true;
1632 } else {
1633 ath_dbg(common, ATH_DBG_CONFIG,
1634 "Monitor mode is disabled\n");
1635 sc->sc_ah->is_monitoring = false;
1636 }
1637 }
1638
1639 if (changed & IEEE80211_CONF_CHANGE_CHANNEL) {
1640 struct ieee80211_channel *curchan = hw->conf.channel;
1641 int pos = curchan->hw_value;
1642 int old_pos = -1;
1643 unsigned long flags;
1644
1645 if (ah->curchan)
1646 old_pos = ah->curchan - &ah->channels[0];
1647
1648 aphy->chan_idx = pos;
1649 aphy->chan_is_ht = conf_is_ht(conf);
1650 if (hw->conf.flags & IEEE80211_CONF_OFFCHANNEL)
1651 sc->sc_flags |= SC_OP_OFFCHANNEL;
1652 else
1653 sc->sc_flags &= ~SC_OP_OFFCHANNEL;
1654
1655 if (aphy->state == ATH_WIPHY_SCAN ||
1656 aphy->state == ATH_WIPHY_ACTIVE)
1657 ath9k_wiphy_pause_all_forced(sc, aphy);
1658 else {
1659 /*
1660 * Do not change operational channel based on a paused
1661 * wiphy changes.
1662 */
1663 goto skip_chan_change;
1664 }
1665
1666 ath_dbg(common, ATH_DBG_CONFIG, "Set channel: %d MHz\n",
1667 curchan->center_freq);
1668
1669 /* XXX: remove me eventualy */
1670 ath9k_update_ichannel(sc, hw, &sc->sc_ah->channels[pos]);
1671
1672 /* update survey stats for the old channel before switching */
1673 spin_lock_irqsave(&common->cc_lock, flags);
1674 ath_update_survey_stats(sc);
1675 spin_unlock_irqrestore(&common->cc_lock, flags);
1676
1677 /*
1678 * If the operating channel changes, change the survey in-use flags
1679 * along with it.
1680 * Reset the survey data for the new channel, unless we're switching
1681 * back to the operating channel from an off-channel operation.
1682 */
1683 if (!(hw->conf.flags & IEEE80211_CONF_OFFCHANNEL) &&
1684 sc->cur_survey != &sc->survey[pos]) {
1685
1686 if (sc->cur_survey)
1687 sc->cur_survey->filled &= ~SURVEY_INFO_IN_USE;
1688
1689 sc->cur_survey = &sc->survey[pos];
1690
1691 memset(sc->cur_survey, 0, sizeof(struct survey_info));
1692 sc->cur_survey->filled |= SURVEY_INFO_IN_USE;
1693 } else if (!(sc->survey[pos].filled & SURVEY_INFO_IN_USE)) {
1694 memset(&sc->survey[pos], 0, sizeof(struct survey_info));
1695 }
1696
1697 if (ath_set_channel(sc, hw, &sc->sc_ah->channels[pos]) < 0) {
1698 ath_err(common, "Unable to set channel\n");
1699 mutex_unlock(&sc->mutex);
1700 return -EINVAL;
1701 }
1702
1703 /*
1704 * The most recent snapshot of channel->noisefloor for the old
1705 * channel is only available after the hardware reset. Copy it to
1706 * the survey stats now.
1707 */
1708 if (old_pos >= 0)
1709 ath_update_survey_nf(sc, old_pos);
1710 }
1711
1712 skip_chan_change:
1713 if (changed & IEEE80211_CONF_CHANGE_POWER) {
1714 sc->config.txpowlimit = 2 * conf->power_level;
1715 ath_update_txpow(sc);
1716 }
1717
1718 spin_lock_bh(&sc->wiphy_lock);
1719 disable_radio = ath9k_all_wiphys_idle(sc);
1720 spin_unlock_bh(&sc->wiphy_lock);
1721
1722 if (disable_radio) {
1723 ath_dbg(common, ATH_DBG_CONFIG, "idle: disabling radio\n");
1724 sc->ps_idle = true;
1725 ath_radio_disable(sc, hw);
1726 }
1727
1728 mutex_unlock(&sc->mutex);
1729
1730 return 0;
1731 }
1732
1733 #define SUPPORTED_FILTERS \
1734 (FIF_PROMISC_IN_BSS | \
1735 FIF_ALLMULTI | \
1736 FIF_CONTROL | \
1737 FIF_PSPOLL | \
1738 FIF_OTHER_BSS | \
1739 FIF_BCN_PRBRESP_PROMISC | \
1740 FIF_PROBE_REQ | \
1741 FIF_FCSFAIL)
1742
1743 /* FIXME: sc->sc_full_reset ? */
1744 static void ath9k_configure_filter(struct ieee80211_hw *hw,
1745 unsigned int changed_flags,
1746 unsigned int *total_flags,
1747 u64 multicast)
1748 {
1749 struct ath_wiphy *aphy = hw->priv;
1750 struct ath_softc *sc = aphy->sc;
1751 u32 rfilt;
1752
1753 changed_flags &= SUPPORTED_FILTERS;
1754 *total_flags &= SUPPORTED_FILTERS;
1755
1756 sc->rx.rxfilter = *total_flags;
1757 ath9k_ps_wakeup(sc);
1758 rfilt = ath_calcrxfilter(sc);
1759 ath9k_hw_setrxfilter(sc->sc_ah, rfilt);
1760 ath9k_ps_restore(sc);
1761
1762 ath_dbg(ath9k_hw_common(sc->sc_ah), ATH_DBG_CONFIG,
1763 "Set HW RX filter: 0x%x\n", rfilt);
1764 }
1765
1766 static int ath9k_sta_add(struct ieee80211_hw *hw,
1767 struct ieee80211_vif *vif,
1768 struct ieee80211_sta *sta)
1769 {
1770 struct ath_wiphy *aphy = hw->priv;
1771 struct ath_softc *sc = aphy->sc;
1772
1773 ath_node_attach(sc, sta);
1774
1775 return 0;
1776 }
1777
1778 static int ath9k_sta_remove(struct ieee80211_hw *hw,
1779 struct ieee80211_vif *vif,
1780 struct ieee80211_sta *sta)
1781 {
1782 struct ath_wiphy *aphy = hw->priv;
1783 struct ath_softc *sc = aphy->sc;
1784
1785 ath_node_detach(sc, sta);
1786
1787 return 0;
1788 }
1789
1790 static int ath9k_conf_tx(struct ieee80211_hw *hw, u16 queue,
1791 const struct ieee80211_tx_queue_params *params)
1792 {
1793 struct ath_wiphy *aphy = hw->priv;
1794 struct ath_softc *sc = aphy->sc;
1795 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1796 struct ath_txq *txq;
1797 struct ath9k_tx_queue_info qi;
1798 int ret = 0;
1799
1800 if (queue >= WME_NUM_AC)
1801 return 0;
1802
1803 txq = sc->tx.txq_map[queue];
1804
1805 mutex_lock(&sc->mutex);
1806
1807 memset(&qi, 0, sizeof(struct ath9k_tx_queue_info));
1808
1809 qi.tqi_aifs = params->aifs;
1810 qi.tqi_cwmin = params->cw_min;
1811 qi.tqi_cwmax = params->cw_max;
1812 qi.tqi_burstTime = params->txop;
1813
1814 ath_dbg(common, ATH_DBG_CONFIG,
1815 "Configure tx [queue/halq] [%d/%d], aifs: %d, cw_min: %d, cw_max: %d, txop: %d\n",
1816 queue, txq->axq_qnum, params->aifs, params->cw_min,
1817 params->cw_max, params->txop);
1818
1819 ret = ath_txq_update(sc, txq->axq_qnum, &qi);
1820 if (ret)
1821 ath_err(common, "TXQ Update failed\n");
1822
1823 if (sc->sc_ah->opmode == NL80211_IFTYPE_ADHOC)
1824 if (queue == WME_AC_BE && !ret)
1825 ath_beaconq_config(sc);
1826
1827 mutex_unlock(&sc->mutex);
1828
1829 return ret;
1830 }
1831
1832 static int ath9k_set_key(struct ieee80211_hw *hw,
1833 enum set_key_cmd cmd,
1834 struct ieee80211_vif *vif,
1835 struct ieee80211_sta *sta,
1836 struct ieee80211_key_conf *key)
1837 {
1838 struct ath_wiphy *aphy = hw->priv;
1839 struct ath_softc *sc = aphy->sc;
1840 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1841 int ret = 0;
1842
1843 if (ath9k_modparam_nohwcrypt)
1844 return -ENOSPC;
1845
1846 mutex_lock(&sc->mutex);
1847 ath9k_ps_wakeup(sc);
1848 ath_dbg(common, ATH_DBG_CONFIG, "Set HW Key\n");
1849
1850 switch (cmd) {
1851 case SET_KEY:
1852 ret = ath_key_config(common, vif, sta, key);
1853 if (ret >= 0) {
1854 key->hw_key_idx = ret;
1855 /* push IV and Michael MIC generation to stack */
1856 key->flags |= IEEE80211_KEY_FLAG_GENERATE_IV;
1857 if (key->cipher == WLAN_CIPHER_SUITE_TKIP)
1858 key->flags |= IEEE80211_KEY_FLAG_GENERATE_MMIC;
1859 if (sc->sc_ah->sw_mgmt_crypto &&
1860 key->cipher == WLAN_CIPHER_SUITE_CCMP)
1861 key->flags |= IEEE80211_KEY_FLAG_SW_MGMT;
1862 ret = 0;
1863 }
1864 break;
1865 case DISABLE_KEY:
1866 ath_key_delete(common, key);
1867 break;
1868 default:
1869 ret = -EINVAL;
1870 }
1871
1872 ath9k_ps_restore(sc);
1873 mutex_unlock(&sc->mutex);
1874
1875 return ret;
1876 }
1877
1878 static void ath9k_bss_info_changed(struct ieee80211_hw *hw,
1879 struct ieee80211_vif *vif,
1880 struct ieee80211_bss_conf *bss_conf,
1881 u32 changed)
1882 {
1883 struct ath_wiphy *aphy = hw->priv;
1884 struct ath_softc *sc = aphy->sc;
1885 struct ath_hw *ah = sc->sc_ah;
1886 struct ath_common *common = ath9k_hw_common(ah);
1887 struct ath_vif *avp = (void *)vif->drv_priv;
1888 int slottime;
1889 int error;
1890
1891 mutex_lock(&sc->mutex);
1892
1893 if (changed & BSS_CHANGED_BSSID) {
1894 /* Set BSSID */
1895 memcpy(common->curbssid, bss_conf->bssid, ETH_ALEN);
1896 memcpy(avp->bssid, bss_conf->bssid, ETH_ALEN);
1897 common->curaid = 0;
1898 ath9k_hw_write_associd(ah);
1899
1900 /* Set aggregation protection mode parameters */
1901 sc->config.ath_aggr_prot = 0;
1902
1903 ath_dbg(common, ATH_DBG_CONFIG, "BSSID: %pM aid: 0x%x\n",
1904 common->curbssid, common->curaid);
1905
1906 /* need to reconfigure the beacon */
1907 sc->sc_flags &= ~SC_OP_BEACONS ;
1908 }
1909
1910 /* Enable transmission of beacons (AP, IBSS, MESH) */
1911 if ((changed & BSS_CHANGED_BEACON) ||
1912 ((changed & BSS_CHANGED_BEACON_ENABLED) && bss_conf->enable_beacon)) {
1913 ath9k_hw_stoptxdma(sc->sc_ah, sc->beacon.beaconq);
1914 error = ath_beacon_alloc(aphy, vif);
1915 if (!error)
1916 ath_beacon_config(sc, vif);
1917 }
1918
1919 if (changed & BSS_CHANGED_ERP_SLOT) {
1920 if (bss_conf->use_short_slot)
1921 slottime = 9;
1922 else
1923 slottime = 20;
1924 if (vif->type == NL80211_IFTYPE_AP) {
1925 /*
1926 * Defer update, so that connected stations can adjust
1927 * their settings at the same time.
1928 * See beacon.c for more details
1929 */
1930 sc->beacon.slottime = slottime;
1931 sc->beacon.updateslot = UPDATE;
1932 } else {
1933 ah->slottime = slottime;
1934 ath9k_hw_init_global_settings(ah);
1935 }
1936 }
1937
1938 /* Disable transmission of beacons */
1939 if ((changed & BSS_CHANGED_BEACON_ENABLED) && !bss_conf->enable_beacon)
1940 ath9k_hw_stoptxdma(sc->sc_ah, sc->beacon.beaconq);
1941
1942 if (changed & BSS_CHANGED_BEACON_INT) {
1943 sc->beacon_interval = bss_conf->beacon_int;
1944 /*
1945 * In case of AP mode, the HW TSF has to be reset
1946 * when the beacon interval changes.
1947 */
1948 if (vif->type == NL80211_IFTYPE_AP) {
1949 sc->sc_flags |= SC_OP_TSF_RESET;
1950 ath9k_hw_stoptxdma(sc->sc_ah, sc->beacon.beaconq);
1951 error = ath_beacon_alloc(aphy, vif);
1952 if (!error)
1953 ath_beacon_config(sc, vif);
1954 } else {
1955 ath_beacon_config(sc, vif);
1956 }
1957 }
1958
1959 if (changed & BSS_CHANGED_ERP_PREAMBLE) {
1960 ath_dbg(common, ATH_DBG_CONFIG, "BSS Changed PREAMBLE %d\n",
1961 bss_conf->use_short_preamble);
1962 if (bss_conf->use_short_preamble)
1963 sc->sc_flags |= SC_OP_PREAMBLE_SHORT;
1964 else
1965 sc->sc_flags &= ~SC_OP_PREAMBLE_SHORT;
1966 }
1967
1968 if (changed & BSS_CHANGED_ERP_CTS_PROT) {
1969 ath_dbg(common, ATH_DBG_CONFIG, "BSS Changed CTS PROT %d\n",
1970 bss_conf->use_cts_prot);
1971 if (bss_conf->use_cts_prot &&
1972 hw->conf.channel->band != IEEE80211_BAND_5GHZ)
1973 sc->sc_flags |= SC_OP_PROTECT_ENABLE;
1974 else
1975 sc->sc_flags &= ~SC_OP_PROTECT_ENABLE;
1976 }
1977
1978 if (changed & BSS_CHANGED_ASSOC) {
1979 ath_dbg(common, ATH_DBG_CONFIG, "BSS Changed ASSOC %d\n",
1980 bss_conf->assoc);
1981 ath9k_bss_assoc_info(sc, hw, vif, bss_conf);
1982 }
1983
1984 mutex_unlock(&sc->mutex);
1985 }
1986
1987 static u64 ath9k_get_tsf(struct ieee80211_hw *hw)
1988 {
1989 u64 tsf;
1990 struct ath_wiphy *aphy = hw->priv;
1991 struct ath_softc *sc = aphy->sc;
1992
1993 mutex_lock(&sc->mutex);
1994 ath9k_ps_wakeup(sc);
1995 tsf = ath9k_hw_gettsf64(sc->sc_ah);
1996 ath9k_ps_restore(sc);
1997 mutex_unlock(&sc->mutex);
1998
1999 return tsf;
2000 }
2001
2002 static void ath9k_set_tsf(struct ieee80211_hw *hw, u64 tsf)
2003 {
2004 struct ath_wiphy *aphy = hw->priv;
2005 struct ath_softc *sc = aphy->sc;
2006
2007 mutex_lock(&sc->mutex);
2008 ath9k_ps_wakeup(sc);
2009 ath9k_hw_settsf64(sc->sc_ah, tsf);
2010 ath9k_ps_restore(sc);
2011 mutex_unlock(&sc->mutex);
2012 }
2013
2014 static void ath9k_reset_tsf(struct ieee80211_hw *hw)
2015 {
2016 struct ath_wiphy *aphy = hw->priv;
2017 struct ath_softc *sc = aphy->sc;
2018
2019 mutex_lock(&sc->mutex);
2020
2021 ath9k_ps_wakeup(sc);
2022 ath9k_hw_reset_tsf(sc->sc_ah);
2023 ath9k_ps_restore(sc);
2024
2025 mutex_unlock(&sc->mutex);
2026 }
2027
2028 static int ath9k_ampdu_action(struct ieee80211_hw *hw,
2029 struct ieee80211_vif *vif,
2030 enum ieee80211_ampdu_mlme_action action,
2031 struct ieee80211_sta *sta,
2032 u16 tid, u16 *ssn)
2033 {
2034 struct ath_wiphy *aphy = hw->priv;
2035 struct ath_softc *sc = aphy->sc;
2036 int ret = 0;
2037
2038 local_bh_disable();
2039
2040 switch (action) {
2041 case IEEE80211_AMPDU_RX_START:
2042 if (!(sc->sc_flags & SC_OP_RXAGGR))
2043 ret = -ENOTSUPP;
2044 break;
2045 case IEEE80211_AMPDU_RX_STOP:
2046 break;
2047 case IEEE80211_AMPDU_TX_START:
2048 if (!(sc->sc_flags & SC_OP_TXAGGR))
2049 return -EOPNOTSUPP;
2050
2051 ath9k_ps_wakeup(sc);
2052 ret = ath_tx_aggr_start(sc, sta, tid, ssn);
2053 if (!ret)
2054 ieee80211_start_tx_ba_cb_irqsafe(vif, sta->addr, tid);
2055 ath9k_ps_restore(sc);
2056 break;
2057 case IEEE80211_AMPDU_TX_STOP:
2058 ath9k_ps_wakeup(sc);
2059 ath_tx_aggr_stop(sc, sta, tid);
2060 ieee80211_stop_tx_ba_cb_irqsafe(vif, sta->addr, tid);
2061 ath9k_ps_restore(sc);
2062 break;
2063 case IEEE80211_AMPDU_TX_OPERATIONAL:
2064 ath9k_ps_wakeup(sc);
2065 ath_tx_aggr_resume(sc, sta, tid);
2066 ath9k_ps_restore(sc);
2067 break;
2068 default:
2069 ath_err(ath9k_hw_common(sc->sc_ah), "Unknown AMPDU action\n");
2070 }
2071
2072 local_bh_enable();
2073
2074 return ret;
2075 }
2076
2077 static int ath9k_get_survey(struct ieee80211_hw *hw, int idx,
2078 struct survey_info *survey)
2079 {
2080 struct ath_wiphy *aphy = hw->priv;
2081 struct ath_softc *sc = aphy->sc;
2082 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
2083 struct ieee80211_supported_band *sband;
2084 struct ieee80211_channel *chan;
2085 unsigned long flags;
2086 int pos;
2087
2088 spin_lock_irqsave(&common->cc_lock, flags);
2089 if (idx == 0)
2090 ath_update_survey_stats(sc);
2091
2092 sband = hw->wiphy->bands[IEEE80211_BAND_2GHZ];
2093 if (sband && idx >= sband->n_channels) {
2094 idx -= sband->n_channels;
2095 sband = NULL;
2096 }
2097
2098 if (!sband)
2099 sband = hw->wiphy->bands[IEEE80211_BAND_5GHZ];
2100
2101 if (!sband || idx >= sband->n_channels) {
2102 spin_unlock_irqrestore(&common->cc_lock, flags);
2103 return -ENOENT;
2104 }
2105
2106 chan = &sband->channels[idx];
2107 pos = chan->hw_value;
2108 memcpy(survey, &sc->survey[pos], sizeof(*survey));
2109 survey->channel = chan;
2110 spin_unlock_irqrestore(&common->cc_lock, flags);
2111
2112 return 0;
2113 }
2114
2115 static void ath9k_sw_scan_start(struct ieee80211_hw *hw)
2116 {
2117 struct ath_wiphy *aphy = hw->priv;
2118 struct ath_softc *sc = aphy->sc;
2119
2120 mutex_lock(&sc->mutex);
2121 if (ath9k_wiphy_scanning(sc)) {
2122 /*
2123 * There is a race here in mac80211 but fixing it requires
2124 * we revisit how we handle the scan complete callback.
2125 * After mac80211 fixes we will not have configured hardware
2126 * to the home channel nor would we have configured the RX
2127 * filter yet.
2128 */
2129 mutex_unlock(&sc->mutex);
2130 return;
2131 }
2132
2133 aphy->state = ATH_WIPHY_SCAN;
2134 ath9k_wiphy_pause_all_forced(sc, aphy);
2135 mutex_unlock(&sc->mutex);
2136 }
2137
2138 /*
2139 * XXX: this requires a revisit after the driver
2140 * scan_complete gets moved to another place/removed in mac80211.
2141 */
2142 static void ath9k_sw_scan_complete(struct ieee80211_hw *hw)
2143 {
2144 struct ath_wiphy *aphy = hw->priv;
2145 struct ath_softc *sc = aphy->sc;
2146
2147 mutex_lock(&sc->mutex);
2148 aphy->state = ATH_WIPHY_ACTIVE;
2149 mutex_unlock(&sc->mutex);
2150 }
2151
2152 static void ath9k_set_coverage_class(struct ieee80211_hw *hw, u8 coverage_class)
2153 {
2154 struct ath_wiphy *aphy = hw->priv;
2155 struct ath_softc *sc = aphy->sc;
2156 struct ath_hw *ah = sc->sc_ah;
2157
2158 mutex_lock(&sc->mutex);
2159 ah->coverage_class = coverage_class;
2160 ath9k_hw_init_global_settings(ah);
2161 mutex_unlock(&sc->mutex);
2162 }
2163
2164 struct ieee80211_ops ath9k_ops = {
2165 .tx = ath9k_tx,
2166 .start = ath9k_start,
2167 .stop = ath9k_stop,
2168 .add_interface = ath9k_add_interface,
2169 .change_interface = ath9k_change_interface,
2170 .remove_interface = ath9k_remove_interface,
2171 .config = ath9k_config,
2172 .configure_filter = ath9k_configure_filter,
2173 .sta_add = ath9k_sta_add,
2174 .sta_remove = ath9k_sta_remove,
2175 .conf_tx = ath9k_conf_tx,
2176 .bss_info_changed = ath9k_bss_info_changed,
2177 .set_key = ath9k_set_key,
2178 .get_tsf = ath9k_get_tsf,
2179 .set_tsf = ath9k_set_tsf,
2180 .reset_tsf = ath9k_reset_tsf,
2181 .ampdu_action = ath9k_ampdu_action,
2182 .get_survey = ath9k_get_survey,
2183 .sw_scan_start = ath9k_sw_scan_start,
2184 .sw_scan_complete = ath9k_sw_scan_complete,
2185 .rfkill_poll = ath9k_rfkill_poll_state,
2186 .set_coverage_class = ath9k_set_coverage_class,
2187 };
ubuntu-bionic-kernel mirror