2 * Copyright (c) 2008-2009 Atheros Communications Inc.
4 * Permission to use, copy, modify, and/or distribute this software for any
5 * purpose with or without fee is hereby granted, provided that the above
6 * copyright notice and this permission notice appear in all copies.
8 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
9 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
10 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
11 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
12 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
13 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
14 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
17 #include <linux/nl80211.h>
21 static void ath_update_txpow(struct ath_softc
*sc
)
23 struct ath_hw
*ah
= sc
->sc_ah
;
25 if (sc
->curtxpow
!= sc
->config
.txpowlimit
) {
26 ath9k_hw_set_txpowerlimit(ah
, sc
->config
.txpowlimit
, false);
27 /* read back in case value is clamped */
28 sc
->curtxpow
= ath9k_hw_regulatory(ah
)->power_limit
;
32 static u8
parse_mpdudensity(u8 mpdudensity
)
35 * 802.11n D2.0 defined values for "Minimum MPDU Start Spacing":
36 * 0 for no restriction
45 switch (mpdudensity
) {
51 /* Our lower layer calculations limit our precision to
67 static struct ath9k_channel
*ath_get_curchannel(struct ath_softc
*sc
,
68 struct ieee80211_hw
*hw
)
70 struct ieee80211_channel
*curchan
= hw
->conf
.channel
;
71 struct ath9k_channel
*channel
;
74 chan_idx
= curchan
->hw_value
;
75 channel
= &sc
->sc_ah
->channels
[chan_idx
];
76 ath9k_update_ichannel(sc
, hw
, channel
);
80 bool ath9k_setpower(struct ath_softc
*sc
, enum ath9k_power_mode mode
)
85 spin_lock_irqsave(&sc
->sc_pm_lock
, flags
);
86 ret
= ath9k_hw_setpower(sc
->sc_ah
, mode
);
87 spin_unlock_irqrestore(&sc
->sc_pm_lock
, flags
);
92 void ath9k_ps_wakeup(struct ath_softc
*sc
)
94 struct ath_common
*common
= ath9k_hw_common(sc
->sc_ah
);
96 enum ath9k_power_mode power_mode
;
98 spin_lock_irqsave(&sc
->sc_pm_lock
, flags
);
99 if (++sc
->ps_usecount
!= 1)
102 power_mode
= sc
->sc_ah
->power_mode
;
103 ath9k_hw_setpower(sc
->sc_ah
, ATH9K_PM_AWAKE
);
106 * While the hardware is asleep, the cycle counters contain no
107 * useful data. Better clear them now so that they don't mess up
108 * survey data results.
110 if (power_mode
!= ATH9K_PM_AWAKE
) {
111 spin_lock(&common
->cc_lock
);
112 ath_hw_cycle_counters_update(common
);
113 memset(&common
->cc_survey
, 0, sizeof(common
->cc_survey
));
114 spin_unlock(&common
->cc_lock
);
118 spin_unlock_irqrestore(&sc
->sc_pm_lock
, flags
);
121 void ath9k_ps_restore(struct ath_softc
*sc
)
123 struct ath_common
*common
= ath9k_hw_common(sc
->sc_ah
);
126 spin_lock_irqsave(&sc
->sc_pm_lock
, flags
);
127 if (--sc
->ps_usecount
!= 0)
130 spin_lock(&common
->cc_lock
);
131 ath_hw_cycle_counters_update(common
);
132 spin_unlock(&common
->cc_lock
);
135 ath9k_hw_setpower(sc
->sc_ah
, ATH9K_PM_FULL_SLEEP
);
136 else if (sc
->ps_enabled
&&
137 !(sc
->ps_flags
& (PS_WAIT_FOR_BEACON
|
139 PS_WAIT_FOR_PSPOLL_DATA
|
140 PS_WAIT_FOR_TX_ACK
)))
141 ath9k_hw_setpower(sc
->sc_ah
, ATH9K_PM_NETWORK_SLEEP
);
144 spin_unlock_irqrestore(&sc
->sc_pm_lock
, flags
);
147 static void ath_start_ani(struct ath_common
*common
)
149 struct ath_hw
*ah
= common
->ah
;
150 unsigned long timestamp
= jiffies_to_msecs(jiffies
);
151 struct ath_softc
*sc
= (struct ath_softc
*) common
->priv
;
153 if (!(sc
->sc_flags
& SC_OP_ANI_RUN
))
156 if (sc
->sc_flags
& SC_OP_OFFCHANNEL
)
159 common
->ani
.longcal_timer
= timestamp
;
160 common
->ani
.shortcal_timer
= timestamp
;
161 common
->ani
.checkani_timer
= timestamp
;
163 mod_timer(&common
->ani
.timer
,
165 msecs_to_jiffies((u32
)ah
->config
.ani_poll_interval
));
168 static void ath_update_survey_nf(struct ath_softc
*sc
, int channel
)
170 struct ath_hw
*ah
= sc
->sc_ah
;
171 struct ath9k_channel
*chan
= &ah
->channels
[channel
];
172 struct survey_info
*survey
= &sc
->survey
[channel
];
174 if (chan
->noisefloor
) {
175 survey
->filled
|= SURVEY_INFO_NOISE_DBM
;
176 survey
->noise
= chan
->noisefloor
;
180 static void ath_update_survey_stats(struct ath_softc
*sc
)
182 struct ath_hw
*ah
= sc
->sc_ah
;
183 struct ath_common
*common
= ath9k_hw_common(ah
);
184 int pos
= ah
->curchan
- &ah
->channels
[0];
185 struct survey_info
*survey
= &sc
->survey
[pos
];
186 struct ath_cycle_counters
*cc
= &common
->cc_survey
;
187 unsigned int div
= common
->clockrate
* 1000;
192 if (ah
->power_mode
== ATH9K_PM_AWAKE
)
193 ath_hw_cycle_counters_update(common
);
195 if (cc
->cycles
> 0) {
196 survey
->filled
|= SURVEY_INFO_CHANNEL_TIME
|
197 SURVEY_INFO_CHANNEL_TIME_BUSY
|
198 SURVEY_INFO_CHANNEL_TIME_RX
|
199 SURVEY_INFO_CHANNEL_TIME_TX
;
200 survey
->channel_time
+= cc
->cycles
/ div
;
201 survey
->channel_time_busy
+= cc
->rx_busy
/ div
;
202 survey
->channel_time_rx
+= cc
->rx_frame
/ div
;
203 survey
->channel_time_tx
+= cc
->tx_frame
/ div
;
205 memset(cc
, 0, sizeof(*cc
));
207 ath_update_survey_nf(sc
, pos
);
211 * Set/change channels. If the channel is really being changed, it's done
212 * by reseting the chip. To accomplish this we must first cleanup any pending
213 * DMA, then restart stuff.
215 int ath_set_channel(struct ath_softc
*sc
, struct ieee80211_hw
*hw
,
216 struct ath9k_channel
*hchan
)
218 struct ath_wiphy
*aphy
= hw
->priv
;
219 struct ath_hw
*ah
= sc
->sc_ah
;
220 struct ath_common
*common
= ath9k_hw_common(ah
);
221 struct ieee80211_conf
*conf
= &common
->hw
->conf
;
222 bool fastcc
= true, stopped
;
223 struct ieee80211_channel
*channel
= hw
->conf
.channel
;
224 struct ath9k_hw_cal_data
*caldata
= NULL
;
227 if (sc
->sc_flags
& SC_OP_INVALID
)
230 del_timer_sync(&common
->ani
.timer
);
231 cancel_work_sync(&sc
->paprd_work
);
232 cancel_work_sync(&sc
->hw_check_work
);
233 cancel_delayed_work_sync(&sc
->tx_complete_work
);
237 spin_lock_bh(&sc
->sc_pcu_lock
);
240 * This is only performed if the channel settings have
243 * To switch channels clear any pending DMA operations;
244 * wait long enough for the RX fifo to drain, reset the
245 * hardware at the new frequency, and then re-enable
246 * the relevant bits of the h/w.
248 ath9k_hw_disable_interrupts(ah
);
249 stopped
= ath_drain_all_txq(sc
, false);
251 if (!ath_stoprecv(sc
))
254 /* XXX: do not flush receive queue here. We don't want
255 * to flush data frames already in queue because of
256 * changing channel. */
258 if (!stopped
|| !(sc
->sc_flags
& SC_OP_OFFCHANNEL
))
261 if (!(sc
->sc_flags
& SC_OP_OFFCHANNEL
))
262 caldata
= &aphy
->caldata
;
264 ath_dbg(common
, ATH_DBG_CONFIG
,
265 "(%u MHz) -> (%u MHz), conf_is_ht40: %d fastcc: %d\n",
266 sc
->sc_ah
->curchan
->channel
,
267 channel
->center_freq
, conf_is_ht40(conf
),
270 r
= ath9k_hw_reset(ah
, hchan
, caldata
, fastcc
);
273 "Unable to reset channel (%u MHz), reset status %d\n",
274 channel
->center_freq
, r
);
278 if (ath_startrecv(sc
) != 0) {
279 ath_err(common
, "Unable to restart recv logic\n");
284 ath_update_txpow(sc
);
285 ath9k_hw_set_interrupts(ah
, ah
->imask
);
287 if (!(sc
->sc_flags
& (SC_OP_OFFCHANNEL
))) {
288 ath_beacon_config(sc
, NULL
);
289 ieee80211_queue_delayed_work(sc
->hw
, &sc
->tx_complete_work
, 0);
290 ath_start_ani(common
);
294 spin_unlock_bh(&sc
->sc_pcu_lock
);
296 ath9k_ps_restore(sc
);
300 static void ath_paprd_activate(struct ath_softc
*sc
)
302 struct ath_hw
*ah
= sc
->sc_ah
;
303 struct ath9k_hw_cal_data
*caldata
= ah
->caldata
;
304 struct ath_common
*common
= ath9k_hw_common(ah
);
307 if (!caldata
|| !caldata
->paprd_done
)
311 ar9003_paprd_enable(ah
, false);
312 for (chain
= 0; chain
< AR9300_MAX_CHAINS
; chain
++) {
313 if (!(common
->tx_chainmask
& BIT(chain
)))
316 ar9003_paprd_populate_single_table(ah
, caldata
, chain
);
319 ar9003_paprd_enable(ah
, true);
320 ath9k_ps_restore(sc
);
323 void ath_paprd_calibrate(struct work_struct
*work
)
325 struct ath_softc
*sc
= container_of(work
, struct ath_softc
, paprd_work
);
326 struct ieee80211_hw
*hw
= sc
->hw
;
327 struct ath_hw
*ah
= sc
->sc_ah
;
328 struct ieee80211_hdr
*hdr
;
329 struct sk_buff
*skb
= NULL
;
330 struct ieee80211_tx_info
*tx_info
;
331 int band
= hw
->conf
.channel
->band
;
332 struct ieee80211_supported_band
*sband
= &sc
->sbands
[band
];
333 struct ath_tx_control txctl
;
334 struct ath9k_hw_cal_data
*caldata
= ah
->caldata
;
335 struct ath_common
*common
= ath9k_hw_common(ah
);
346 skb
= alloc_skb(len
, GFP_KERNEL
);
350 tx_info
= IEEE80211_SKB_CB(skb
);
353 memset(skb
->data
, 0, len
);
354 hdr
= (struct ieee80211_hdr
*)skb
->data
;
355 ftype
= IEEE80211_FTYPE_DATA
| IEEE80211_STYPE_NULLFUNC
;
356 hdr
->frame_control
= cpu_to_le16(ftype
);
357 hdr
->duration_id
= cpu_to_le16(10);
358 memcpy(hdr
->addr1
, hw
->wiphy
->perm_addr
, ETH_ALEN
);
359 memcpy(hdr
->addr2
, hw
->wiphy
->perm_addr
, ETH_ALEN
);
360 memcpy(hdr
->addr3
, hw
->wiphy
->perm_addr
, ETH_ALEN
);
362 memset(&txctl
, 0, sizeof(txctl
));
363 txctl
.txq
= sc
->tx
.txq_map
[WME_AC_BE
];
366 ar9003_paprd_init_table(ah
);
367 for (chain
= 0; chain
< AR9300_MAX_CHAINS
; chain
++) {
368 if (!(common
->tx_chainmask
& BIT(chain
)))
372 memset(tx_info
, 0, sizeof(*tx_info
));
373 tx_info
->band
= band
;
375 for (i
= 0; i
< 4; i
++) {
376 tx_info
->control
.rates
[i
].idx
= sband
->n_bitrates
- 1;
377 tx_info
->control
.rates
[i
].count
= 6;
380 init_completion(&sc
->paprd_complete
);
381 sc
->paprd_pending
= true;
382 ar9003_paprd_setup_gain_table(ah
, chain
);
383 txctl
.paprd
= BIT(chain
);
384 if (ath_tx_start(hw
, skb
, &txctl
) != 0)
387 time_left
= wait_for_completion_timeout(&sc
->paprd_complete
,
388 msecs_to_jiffies(ATH_PAPRD_TIMEOUT
));
389 sc
->paprd_pending
= false;
391 ath_dbg(ath9k_hw_common(ah
), ATH_DBG_CALIBRATE
,
392 "Timeout waiting for paprd training on TX chain %d\n",
397 if (!ar9003_paprd_is_done(ah
))
400 if (ar9003_paprd_create_curve(ah
, caldata
, chain
) != 0)
408 caldata
->paprd_done
= true;
409 ath_paprd_activate(sc
);
413 ath9k_ps_restore(sc
);
417 * This routine performs the periodic noise floor calibration function
418 * that is used to adjust and optimize the chip performance. This
419 * takes environmental changes (location, temperature) into account.
420 * When the task is complete, it reschedules itself depending on the
421 * appropriate interval that was calculated.
423 void ath_ani_calibrate(unsigned long data
)
425 struct ath_softc
*sc
= (struct ath_softc
*)data
;
426 struct ath_hw
*ah
= sc
->sc_ah
;
427 struct ath_common
*common
= ath9k_hw_common(ah
);
428 bool longcal
= false;
429 bool shortcal
= false;
430 bool aniflag
= false;
431 unsigned int timestamp
= jiffies_to_msecs(jiffies
);
432 u32 cal_interval
, short_cal_interval
, long_cal_interval
;
435 if (ah
->caldata
&& ah
->caldata
->nfcal_interference
)
436 long_cal_interval
= ATH_LONG_CALINTERVAL_INT
;
438 long_cal_interval
= ATH_LONG_CALINTERVAL
;
440 short_cal_interval
= (ah
->opmode
== NL80211_IFTYPE_AP
) ?
441 ATH_AP_SHORT_CALINTERVAL
: ATH_STA_SHORT_CALINTERVAL
;
443 /* Only calibrate if awake */
444 if (sc
->sc_ah
->power_mode
!= ATH9K_PM_AWAKE
)
449 /* Long calibration runs independently of short calibration. */
450 if ((timestamp
- common
->ani
.longcal_timer
) >= long_cal_interval
) {
452 ath_dbg(common
, ATH_DBG_ANI
, "longcal @%lu\n", jiffies
);
453 common
->ani
.longcal_timer
= timestamp
;
456 /* Short calibration applies only while caldone is false */
457 if (!common
->ani
.caldone
) {
458 if ((timestamp
- common
->ani
.shortcal_timer
) >= short_cal_interval
) {
460 ath_dbg(common
, ATH_DBG_ANI
,
461 "shortcal @%lu\n", jiffies
);
462 common
->ani
.shortcal_timer
= timestamp
;
463 common
->ani
.resetcal_timer
= timestamp
;
466 if ((timestamp
- common
->ani
.resetcal_timer
) >=
467 ATH_RESTART_CALINTERVAL
) {
468 common
->ani
.caldone
= ath9k_hw_reset_calvalid(ah
);
469 if (common
->ani
.caldone
)
470 common
->ani
.resetcal_timer
= timestamp
;
474 /* Verify whether we must check ANI */
475 if ((timestamp
- common
->ani
.checkani_timer
) >=
476 ah
->config
.ani_poll_interval
) {
478 common
->ani
.checkani_timer
= timestamp
;
481 /* Skip all processing if there's nothing to do. */
482 if (longcal
|| shortcal
|| aniflag
) {
483 /* Call ANI routine if necessary */
485 spin_lock_irqsave(&common
->cc_lock
, flags
);
486 ath9k_hw_ani_monitor(ah
, ah
->curchan
);
487 ath_update_survey_stats(sc
);
488 spin_unlock_irqrestore(&common
->cc_lock
, flags
);
491 /* Perform calibration if necessary */
492 if (longcal
|| shortcal
) {
493 common
->ani
.caldone
=
494 ath9k_hw_calibrate(ah
,
496 common
->rx_chainmask
,
501 ath9k_ps_restore(sc
);
505 * Set timer interval based on previous results.
506 * The interval must be the shortest necessary to satisfy ANI,
507 * short calibration and long calibration.
509 cal_interval
= ATH_LONG_CALINTERVAL
;
510 if (sc
->sc_ah
->config
.enable_ani
)
511 cal_interval
= min(cal_interval
,
512 (u32
)ah
->config
.ani_poll_interval
);
513 if (!common
->ani
.caldone
)
514 cal_interval
= min(cal_interval
, (u32
)short_cal_interval
);
516 mod_timer(&common
->ani
.timer
, jiffies
+ msecs_to_jiffies(cal_interval
));
517 if ((sc
->sc_ah
->caps
.hw_caps
& ATH9K_HW_CAP_PAPRD
) && ah
->caldata
) {
518 if (!ah
->caldata
->paprd_done
)
519 ieee80211_queue_work(sc
->hw
, &sc
->paprd_work
);
521 ath_paprd_activate(sc
);
526 * Update tx/rx chainmask. For legacy association,
527 * hard code chainmask to 1x1, for 11n association, use
528 * the chainmask configuration, for bt coexistence, use
529 * the chainmask configuration even in legacy mode.
531 void ath_update_chainmask(struct ath_softc
*sc
, int is_ht
)
533 struct ath_hw
*ah
= sc
->sc_ah
;
534 struct ath_common
*common
= ath9k_hw_common(ah
);
536 if ((sc
->sc_flags
& SC_OP_OFFCHANNEL
) || is_ht
||
537 (ah
->btcoex_hw
.scheme
!= ATH_BTCOEX_CFG_NONE
)) {
538 common
->tx_chainmask
= ah
->caps
.tx_chainmask
;
539 common
->rx_chainmask
= ah
->caps
.rx_chainmask
;
541 common
->tx_chainmask
= 1;
542 common
->rx_chainmask
= 1;
545 ath_dbg(common
, ATH_DBG_CONFIG
,
546 "tx chmask: %d, rx chmask: %d\n",
547 common
->tx_chainmask
,
548 common
->rx_chainmask
);
551 static void ath_node_attach(struct ath_softc
*sc
, struct ieee80211_sta
*sta
)
554 struct ath_hw
*ah
= sc
->sc_ah
;
555 an
= (struct ath_node
*)sta
->drv_priv
;
557 if ((ah
->caps
.hw_caps
) & ATH9K_HW_CAP_APM
)
558 sc
->sc_flags
|= SC_OP_ENABLE_APM
;
560 if (sc
->sc_flags
& SC_OP_TXAGGR
) {
561 ath_tx_node_init(sc
, an
);
562 an
->maxampdu
= 1 << (IEEE80211_HT_MAX_AMPDU_FACTOR
+
563 sta
->ht_cap
.ampdu_factor
);
564 an
->mpdudensity
= parse_mpdudensity(sta
->ht_cap
.ampdu_density
);
568 static void ath_node_detach(struct ath_softc
*sc
, struct ieee80211_sta
*sta
)
570 struct ath_node
*an
= (struct ath_node
*)sta
->drv_priv
;
572 if (sc
->sc_flags
& SC_OP_TXAGGR
)
573 ath_tx_node_cleanup(sc
, an
);
576 void ath_hw_check(struct work_struct
*work
)
578 struct ath_softc
*sc
= container_of(work
, struct ath_softc
, hw_check_work
);
583 for (i
= 0; i
< 3; i
++) {
584 if (ath9k_hw_check_alive(sc
->sc_ah
))
592 ath9k_ps_restore(sc
);
595 void ath9k_tasklet(unsigned long data
)
597 struct ath_softc
*sc
= (struct ath_softc
*)data
;
598 struct ath_hw
*ah
= sc
->sc_ah
;
599 struct ath_common
*common
= ath9k_hw_common(ah
);
601 u32 status
= sc
->intrstatus
;
606 if (status
& ATH9K_INT_FATAL
) {
608 ath9k_ps_restore(sc
);
612 spin_lock_bh(&sc
->sc_pcu_lock
);
614 if (!ath9k_hw_check_alive(ah
))
615 ieee80211_queue_work(sc
->hw
, &sc
->hw_check_work
);
617 if (ah
->caps
.hw_caps
& ATH9K_HW_CAP_EDMA
)
618 rxmask
= (ATH9K_INT_RXHP
| ATH9K_INT_RXLP
| ATH9K_INT_RXEOL
|
621 rxmask
= (ATH9K_INT_RX
| ATH9K_INT_RXEOL
| ATH9K_INT_RXORN
);
623 if (status
& rxmask
) {
624 /* Check for high priority Rx first */
625 if ((ah
->caps
.hw_caps
& ATH9K_HW_CAP_EDMA
) &&
626 (status
& ATH9K_INT_RXHP
))
627 ath_rx_tasklet(sc
, 0, true);
629 ath_rx_tasklet(sc
, 0, false);
632 if (status
& ATH9K_INT_TX
) {
633 if (ah
->caps
.hw_caps
& ATH9K_HW_CAP_EDMA
)
634 ath_tx_edma_tasklet(sc
);
639 if ((status
& ATH9K_INT_TSFOOR
) && sc
->ps_enabled
) {
641 * TSF sync does not look correct; remain awake to sync with
644 ath_dbg(common
, ATH_DBG_PS
,
645 "TSFOOR - Sync with next Beacon\n");
646 sc
->ps_flags
|= PS_WAIT_FOR_BEACON
| PS_BEACON_SYNC
;
649 if (ah
->btcoex_hw
.scheme
== ATH_BTCOEX_CFG_3WIRE
)
650 if (status
& ATH9K_INT_GENTIMER
)
651 ath_gen_timer_isr(sc
->sc_ah
);
653 /* re-enable hardware interrupt */
654 ath9k_hw_enable_interrupts(ah
);
656 spin_unlock_bh(&sc
->sc_pcu_lock
);
657 ath9k_ps_restore(sc
);
660 irqreturn_t
ath_isr(int irq
, void *dev
)
662 #define SCHED_INTR ( \
675 struct ath_softc
*sc
= dev
;
676 struct ath_hw
*ah
= sc
->sc_ah
;
677 struct ath_common
*common
= ath9k_hw_common(ah
);
678 enum ath9k_int status
;
682 * The hardware is not ready/present, don't
683 * touch anything. Note this can happen early
684 * on if the IRQ is shared.
686 if (sc
->sc_flags
& SC_OP_INVALID
)
690 /* shared irq, not for us */
692 if (!ath9k_hw_intrpend(ah
))
696 * Figure out the reason(s) for the interrupt. Note
697 * that the hal returns a pseudo-ISR that may include
698 * bits we haven't explicitly enabled so we mask the
699 * value to insure we only process bits we requested.
701 ath9k_hw_getisr(ah
, &status
); /* NB: clears ISR too */
702 status
&= ah
->imask
; /* discard unasked-for bits */
705 * If there are no status bits set, then this interrupt was not
706 * for me (should have been caught above).
711 /* Cache the status */
712 sc
->intrstatus
= status
;
714 if (status
& SCHED_INTR
)
718 * If a FATAL or RXORN interrupt is received, we have to reset the
721 if ((status
& ATH9K_INT_FATAL
) || ((status
& ATH9K_INT_RXORN
) &&
722 !(ah
->caps
.hw_caps
& ATH9K_HW_CAP_EDMA
)))
725 if ((ah
->caps
.hw_caps
& ATH9K_HW_CAP_EDMA
) &&
726 (status
& ATH9K_INT_BB_WATCHDOG
)) {
728 spin_lock(&common
->cc_lock
);
729 ath_hw_cycle_counters_update(common
);
730 ar9003_hw_bb_watchdog_dbg_info(ah
);
731 spin_unlock(&common
->cc_lock
);
736 if (status
& ATH9K_INT_SWBA
)
737 tasklet_schedule(&sc
->bcon_tasklet
);
739 if (status
& ATH9K_INT_TXURN
)
740 ath9k_hw_updatetxtriglevel(ah
, true);
742 if (ah
->caps
.hw_caps
& ATH9K_HW_CAP_EDMA
) {
743 if (status
& ATH9K_INT_RXEOL
) {
744 ah
->imask
&= ~(ATH9K_INT_RXEOL
| ATH9K_INT_RXORN
);
745 ath9k_hw_set_interrupts(ah
, ah
->imask
);
749 if (status
& ATH9K_INT_MIB
) {
751 * Disable interrupts until we service the MIB
752 * interrupt; otherwise it will continue to
755 ath9k_hw_disable_interrupts(ah
);
757 * Let the hal handle the event. We assume
758 * it will clear whatever condition caused
761 spin_lock(&common
->cc_lock
);
762 ath9k_hw_proc_mib_event(ah
);
763 spin_unlock(&common
->cc_lock
);
764 ath9k_hw_enable_interrupts(ah
);
767 if (!(ah
->caps
.hw_caps
& ATH9K_HW_CAP_AUTOSLEEP
))
768 if (status
& ATH9K_INT_TIM_TIMER
) {
769 if (ATH_DBG_WARN_ON_ONCE(sc
->ps_idle
))
771 /* Clear RxAbort bit so that we can
773 ath9k_setpower(sc
, ATH9K_PM_AWAKE
);
774 ath9k_hw_setrxabort(sc
->sc_ah
, 0);
775 sc
->ps_flags
|= PS_WAIT_FOR_BEACON
;
780 ath_debug_stat_interrupt(sc
, status
);
783 /* turn off every interrupt */
784 ath9k_hw_disable_interrupts(ah
);
785 tasklet_schedule(&sc
->intr_tq
);
793 static u32
ath_get_extchanmode(struct ath_softc
*sc
,
794 struct ieee80211_channel
*chan
,
795 enum nl80211_channel_type channel_type
)
799 switch (chan
->band
) {
800 case IEEE80211_BAND_2GHZ
:
801 switch(channel_type
) {
802 case NL80211_CHAN_NO_HT
:
803 case NL80211_CHAN_HT20
:
804 chanmode
= CHANNEL_G_HT20
;
806 case NL80211_CHAN_HT40PLUS
:
807 chanmode
= CHANNEL_G_HT40PLUS
;
809 case NL80211_CHAN_HT40MINUS
:
810 chanmode
= CHANNEL_G_HT40MINUS
;
814 case IEEE80211_BAND_5GHZ
:
815 switch(channel_type
) {
816 case NL80211_CHAN_NO_HT
:
817 case NL80211_CHAN_HT20
:
818 chanmode
= CHANNEL_A_HT20
;
820 case NL80211_CHAN_HT40PLUS
:
821 chanmode
= CHANNEL_A_HT40PLUS
;
823 case NL80211_CHAN_HT40MINUS
:
824 chanmode
= CHANNEL_A_HT40MINUS
;
835 static void ath9k_bss_assoc_info(struct ath_softc
*sc
,
836 struct ieee80211_hw
*hw
,
837 struct ieee80211_vif
*vif
,
838 struct ieee80211_bss_conf
*bss_conf
)
840 struct ath_wiphy
*aphy
= hw
->priv
;
841 struct ath_hw
*ah
= sc
->sc_ah
;
842 struct ath_common
*common
= ath9k_hw_common(ah
);
844 if (bss_conf
->assoc
) {
845 ath_dbg(common
, ATH_DBG_CONFIG
,
846 "Bss Info ASSOC %d, bssid: %pM\n",
847 bss_conf
->aid
, common
->curbssid
);
849 /* New association, store aid */
850 common
->curaid
= bss_conf
->aid
;
851 ath9k_hw_write_associd(ah
);
854 * Request a re-configuration of Beacon related timers
855 * on the receipt of the first Beacon frame (i.e.,
856 * after time sync with the AP).
858 sc
->ps_flags
|= PS_BEACON_SYNC
;
860 /* Configure the beacon */
861 ath_beacon_config(sc
, vif
);
863 /* Reset rssi stats */
864 aphy
->last_rssi
= ATH_RSSI_DUMMY_MARKER
;
865 sc
->sc_ah
->stats
.avgbrssi
= ATH_RSSI_DUMMY_MARKER
;
867 sc
->sc_flags
|= SC_OP_ANI_RUN
;
868 ath_start_ani(common
);
870 ath_dbg(common
, ATH_DBG_CONFIG
, "Bss Info DISASSOC\n");
873 sc
->sc_flags
&= ~SC_OP_ANI_RUN
;
874 del_timer_sync(&common
->ani
.timer
);
878 void ath_radio_enable(struct ath_softc
*sc
, struct ieee80211_hw
*hw
)
880 struct ath_hw
*ah
= sc
->sc_ah
;
881 struct ath_common
*common
= ath9k_hw_common(ah
);
882 struct ieee80211_channel
*channel
= hw
->conf
.channel
;
886 spin_lock_bh(&sc
->sc_pcu_lock
);
888 ath9k_hw_configpcipowersave(ah
, 0, 0);
891 ah
->curchan
= ath_get_curchannel(sc
, sc
->hw
);
893 r
= ath9k_hw_reset(ah
, ah
->curchan
, ah
->caldata
, false);
896 "Unable to reset channel (%u MHz), reset status %d\n",
897 channel
->center_freq
, r
);
900 ath_update_txpow(sc
);
901 if (ath_startrecv(sc
) != 0) {
902 ath_err(common
, "Unable to restart recv logic\n");
903 spin_unlock_bh(&sc
->sc_pcu_lock
);
906 if (sc
->sc_flags
& SC_OP_BEACONS
)
907 ath_beacon_config(sc
, NULL
); /* restart beacons */
909 /* Re-Enable interrupts */
910 ath9k_hw_set_interrupts(ah
, ah
->imask
);
913 ath9k_hw_cfg_output(ah
, ah
->led_pin
,
914 AR_GPIO_OUTPUT_MUX_AS_OUTPUT
);
915 ath9k_hw_set_gpio(ah
, ah
->led_pin
, 0);
917 ieee80211_wake_queues(hw
);
918 spin_unlock_bh(&sc
->sc_pcu_lock
);
920 ath9k_ps_restore(sc
);
923 void ath_radio_disable(struct ath_softc
*sc
, struct ieee80211_hw
*hw
)
925 struct ath_hw
*ah
= sc
->sc_ah
;
926 struct ieee80211_channel
*channel
= hw
->conf
.channel
;
930 spin_lock_bh(&sc
->sc_pcu_lock
);
932 ieee80211_stop_queues(hw
);
935 * Keep the LED on when the radio is disabled
936 * during idle unassociated state.
939 ath9k_hw_set_gpio(ah
, ah
->led_pin
, 1);
940 ath9k_hw_cfg_gpio_input(ah
, ah
->led_pin
);
943 /* Disable interrupts */
944 ath9k_hw_disable_interrupts(ah
);
946 ath_drain_all_txq(sc
, false); /* clear pending tx frames */
948 ath_stoprecv(sc
); /* turn off frame recv */
949 ath_flushrecv(sc
); /* flush recv queue */
952 ah
->curchan
= ath_get_curchannel(sc
, hw
);
954 r
= ath9k_hw_reset(ah
, ah
->curchan
, ah
->caldata
, false);
956 ath_err(ath9k_hw_common(sc
->sc_ah
),
957 "Unable to reset channel (%u MHz), reset status %d\n",
958 channel
->center_freq
, r
);
961 ath9k_hw_phy_disable(ah
);
963 ath9k_hw_configpcipowersave(ah
, 1, 1);
965 spin_unlock_bh(&sc
->sc_pcu_lock
);
966 ath9k_ps_restore(sc
);
968 ath9k_setpower(sc
, ATH9K_PM_FULL_SLEEP
);
971 int ath_reset(struct ath_softc
*sc
, bool retry_tx
)
973 struct ath_hw
*ah
= sc
->sc_ah
;
974 struct ath_common
*common
= ath9k_hw_common(ah
);
975 struct ieee80211_hw
*hw
= sc
->hw
;
979 del_timer_sync(&common
->ani
.timer
);
981 spin_lock_bh(&sc
->sc_pcu_lock
);
983 ieee80211_stop_queues(hw
);
985 ath9k_hw_disable_interrupts(ah
);
986 ath_drain_all_txq(sc
, retry_tx
);
991 r
= ath9k_hw_reset(ah
, sc
->sc_ah
->curchan
, ah
->caldata
, false);
994 "Unable to reset hardware; reset status %d\n", r
);
996 if (ath_startrecv(sc
) != 0)
997 ath_err(common
, "Unable to start recv logic\n");
1000 * We may be doing a reset in response to a request
1001 * that changes the channel so update any state that
1002 * might change as a result.
1004 ath_update_txpow(sc
);
1006 if ((sc
->sc_flags
& SC_OP_BEACONS
) || !(sc
->sc_flags
& (SC_OP_OFFCHANNEL
)))
1007 ath_beacon_config(sc
, NULL
); /* restart beacons */
1009 ath9k_hw_set_interrupts(ah
, ah
->imask
);
1013 for (i
= 0; i
< ATH9K_NUM_TX_QUEUES
; i
++) {
1014 if (ATH_TXQ_SETUP(sc
, i
)) {
1015 spin_lock_bh(&sc
->tx
.txq
[i
].axq_lock
);
1016 ath_txq_schedule(sc
, &sc
->tx
.txq
[i
]);
1017 spin_unlock_bh(&sc
->tx
.txq
[i
].axq_lock
);
1022 ieee80211_wake_queues(hw
);
1023 spin_unlock_bh(&sc
->sc_pcu_lock
);
1026 ath_start_ani(common
);
1031 /* XXX: Remove me once we don't depend on ath9k_channel for all
1032 * this redundant data */
1033 void ath9k_update_ichannel(struct ath_softc
*sc
, struct ieee80211_hw
*hw
,
1034 struct ath9k_channel
*ichan
)
1036 struct ieee80211_channel
*chan
= hw
->conf
.channel
;
1037 struct ieee80211_conf
*conf
= &hw
->conf
;
1039 ichan
->channel
= chan
->center_freq
;
1042 if (chan
->band
== IEEE80211_BAND_2GHZ
) {
1043 ichan
->chanmode
= CHANNEL_G
;
1044 ichan
->channelFlags
= CHANNEL_2GHZ
| CHANNEL_OFDM
| CHANNEL_G
;
1046 ichan
->chanmode
= CHANNEL_A
;
1047 ichan
->channelFlags
= CHANNEL_5GHZ
| CHANNEL_OFDM
;
1050 if (conf_is_ht(conf
))
1051 ichan
->chanmode
= ath_get_extchanmode(sc
, chan
,
1052 conf
->channel_type
);
1055 /**********************/
1056 /* mac80211 callbacks */
1057 /**********************/
1059 static int ath9k_start(struct ieee80211_hw
*hw
)
1061 struct ath_wiphy
*aphy
= hw
->priv
;
1062 struct ath_softc
*sc
= aphy
->sc
;
1063 struct ath_hw
*ah
= sc
->sc_ah
;
1064 struct ath_common
*common
= ath9k_hw_common(ah
);
1065 struct ieee80211_channel
*curchan
= hw
->conf
.channel
;
1066 struct ath9k_channel
*init_channel
;
1069 ath_dbg(common
, ATH_DBG_CONFIG
,
1070 "Starting driver with initial channel: %d MHz\n",
1071 curchan
->center_freq
);
1073 mutex_lock(&sc
->mutex
);
1075 if (ath9k_wiphy_started(sc
)) {
1076 if (sc
->chan_idx
== curchan
->hw_value
) {
1078 * Already on the operational channel, the new wiphy
1079 * can be marked active.
1081 aphy
->state
= ATH_WIPHY_ACTIVE
;
1082 ieee80211_wake_queues(hw
);
1085 * Another wiphy is on another channel, start the new
1086 * wiphy in paused state.
1088 aphy
->state
= ATH_WIPHY_PAUSED
;
1089 ieee80211_stop_queues(hw
);
1091 mutex_unlock(&sc
->mutex
);
1094 aphy
->state
= ATH_WIPHY_ACTIVE
;
1096 /* setup initial channel */
1098 sc
->chan_idx
= curchan
->hw_value
;
1100 init_channel
= ath_get_curchannel(sc
, hw
);
1102 /* Reset SERDES registers */
1103 ath9k_hw_configpcipowersave(ah
, 0, 0);
1106 * The basic interface to setting the hardware in a good
1107 * state is ``reset''. On return the hardware is known to
1108 * be powered up and with interrupts disabled. This must
1109 * be followed by initialization of the appropriate bits
1110 * and then setup of the interrupt mask.
1112 spin_lock_bh(&sc
->sc_pcu_lock
);
1113 r
= ath9k_hw_reset(ah
, init_channel
, ah
->caldata
, false);
1116 "Unable to reset hardware; reset status %d (freq %u MHz)\n",
1117 r
, curchan
->center_freq
);
1118 spin_unlock_bh(&sc
->sc_pcu_lock
);
1123 * This is needed only to setup initial state
1124 * but it's best done after a reset.
1126 ath_update_txpow(sc
);
1129 * Setup the hardware after reset:
1130 * The receive engine is set going.
1131 * Frame transmit is handled entirely
1132 * in the frame output path; there's nothing to do
1133 * here except setup the interrupt mask.
1135 if (ath_startrecv(sc
) != 0) {
1136 ath_err(common
, "Unable to start recv logic\n");
1138 spin_unlock_bh(&sc
->sc_pcu_lock
);
1141 spin_unlock_bh(&sc
->sc_pcu_lock
);
1143 /* Setup our intr mask. */
1144 ah
->imask
= ATH9K_INT_TX
| ATH9K_INT_RXEOL
|
1145 ATH9K_INT_RXORN
| ATH9K_INT_FATAL
|
1148 if (ah
->caps
.hw_caps
& ATH9K_HW_CAP_EDMA
)
1149 ah
->imask
|= ATH9K_INT_RXHP
|
1151 ATH9K_INT_BB_WATCHDOG
;
1153 ah
->imask
|= ATH9K_INT_RX
;
1155 ah
->imask
|= ATH9K_INT_GTT
;
1157 if (ah
->caps
.hw_caps
& ATH9K_HW_CAP_HT
)
1158 ah
->imask
|= ATH9K_INT_CST
;
1160 sc
->sc_flags
&= ~SC_OP_INVALID
;
1161 sc
->sc_ah
->is_monitoring
= false;
1163 /* Disable BMISS interrupt when we're not associated */
1164 ah
->imask
&= ~(ATH9K_INT_SWBA
| ATH9K_INT_BMISS
);
1165 ath9k_hw_set_interrupts(ah
, ah
->imask
);
1167 ieee80211_wake_queues(hw
);
1169 ieee80211_queue_delayed_work(sc
->hw
, &sc
->tx_complete_work
, 0);
1171 if ((ah
->btcoex_hw
.scheme
!= ATH_BTCOEX_CFG_NONE
) &&
1172 !ah
->btcoex_hw
.enabled
) {
1173 ath9k_hw_btcoex_set_weight(ah
, AR_BT_COEX_WGHT
,
1174 AR_STOMP_LOW_WLAN_WGHT
);
1175 ath9k_hw_btcoex_enable(ah
);
1177 if (common
->bus_ops
->bt_coex_prep
)
1178 common
->bus_ops
->bt_coex_prep(common
);
1179 if (ah
->btcoex_hw
.scheme
== ATH_BTCOEX_CFG_3WIRE
)
1180 ath9k_btcoex_timer_resume(sc
);
1183 pm_qos_update_request(&sc
->pm_qos_req
, 55);
1185 if (ah
->caps
.pcie_lcr_extsync_en
&& common
->bus_ops
->extn_synch_en
)
1186 common
->bus_ops
->extn_synch_en(common
);
1189 mutex_unlock(&sc
->mutex
);
1194 static int ath9k_tx(struct ieee80211_hw
*hw
,
1195 struct sk_buff
*skb
)
1197 struct ath_wiphy
*aphy
= hw
->priv
;
1198 struct ath_softc
*sc
= aphy
->sc
;
1199 struct ath_common
*common
= ath9k_hw_common(sc
->sc_ah
);
1200 struct ath_tx_control txctl
;
1201 struct ieee80211_hdr
*hdr
= (struct ieee80211_hdr
*) skb
->data
;
1203 if (aphy
->state
!= ATH_WIPHY_ACTIVE
&& aphy
->state
!= ATH_WIPHY_SCAN
) {
1204 ath_dbg(common
, ATH_DBG_XMIT
,
1205 "ath9k: %s: TX in unexpected wiphy state %d\n",
1206 wiphy_name(hw
->wiphy
), aphy
->state
);
1210 if (sc
->ps_enabled
) {
1212 * mac80211 does not set PM field for normal data frames, so we
1213 * need to update that based on the current PS mode.
1215 if (ieee80211_is_data(hdr
->frame_control
) &&
1216 !ieee80211_is_nullfunc(hdr
->frame_control
) &&
1217 !ieee80211_has_pm(hdr
->frame_control
)) {
1218 ath_dbg(common
, ATH_DBG_PS
,
1219 "Add PM=1 for a TX frame while in PS mode\n");
1220 hdr
->frame_control
|= cpu_to_le16(IEEE80211_FCTL_PM
);
1224 if (unlikely(sc
->sc_ah
->power_mode
!= ATH9K_PM_AWAKE
)) {
1226 * We are using PS-Poll and mac80211 can request TX while in
1227 * power save mode. Need to wake up hardware for the TX to be
1228 * completed and if needed, also for RX of buffered frames.
1230 ath9k_ps_wakeup(sc
);
1231 if (!(sc
->sc_ah
->caps
.hw_caps
& ATH9K_HW_CAP_AUTOSLEEP
))
1232 ath9k_hw_setrxabort(sc
->sc_ah
, 0);
1233 if (ieee80211_is_pspoll(hdr
->frame_control
)) {
1234 ath_dbg(common
, ATH_DBG_PS
,
1235 "Sending PS-Poll to pick a buffered frame\n");
1236 sc
->ps_flags
|= PS_WAIT_FOR_PSPOLL_DATA
;
1238 ath_dbg(common
, ATH_DBG_PS
,
1239 "Wake up to complete TX\n");
1240 sc
->ps_flags
|= PS_WAIT_FOR_TX_ACK
;
1243 * The actual restore operation will happen only after
1244 * the sc_flags bit is cleared. We are just dropping
1245 * the ps_usecount here.
1247 ath9k_ps_restore(sc
);
1250 memset(&txctl
, 0, sizeof(struct ath_tx_control
));
1251 txctl
.txq
= sc
->tx
.txq_map
[skb_get_queue_mapping(skb
)];
1253 ath_dbg(common
, ATH_DBG_XMIT
, "transmitting packet, skb: %p\n", skb
);
1255 if (ath_tx_start(hw
, skb
, &txctl
) != 0) {
1256 ath_dbg(common
, ATH_DBG_XMIT
, "TX failed\n");
1262 dev_kfree_skb_any(skb
);
1266 static void ath9k_stop(struct ieee80211_hw
*hw
)
1268 struct ath_wiphy
*aphy
= hw
->priv
;
1269 struct ath_softc
*sc
= aphy
->sc
;
1270 struct ath_hw
*ah
= sc
->sc_ah
;
1271 struct ath_common
*common
= ath9k_hw_common(ah
);
1274 mutex_lock(&sc
->mutex
);
1276 aphy
->state
= ATH_WIPHY_INACTIVE
;
1279 cancel_delayed_work_sync(&sc
->ath_led_blink_work
);
1281 cancel_delayed_work_sync(&sc
->tx_complete_work
);
1282 cancel_work_sync(&sc
->paprd_work
);
1283 cancel_work_sync(&sc
->hw_check_work
);
1285 for (i
= 0; i
< sc
->num_sec_wiphy
; i
++) {
1286 if (sc
->sec_wiphy
[i
])
1290 if (i
== sc
->num_sec_wiphy
) {
1291 cancel_delayed_work_sync(&sc
->wiphy_work
);
1292 cancel_work_sync(&sc
->chan_work
);
1295 if (sc
->sc_flags
& SC_OP_INVALID
) {
1296 ath_dbg(common
, ATH_DBG_ANY
, "Device not present\n");
1297 mutex_unlock(&sc
->mutex
);
1301 if (ath9k_wiphy_started(sc
)) {
1302 mutex_unlock(&sc
->mutex
);
1303 return; /* another wiphy still in use */
1306 /* Ensure HW is awake when we try to shut it down. */
1307 ath9k_ps_wakeup(sc
);
1309 if (ah
->btcoex_hw
.enabled
) {
1310 ath9k_hw_btcoex_disable(ah
);
1311 if (ah
->btcoex_hw
.scheme
== ATH_BTCOEX_CFG_3WIRE
)
1312 ath9k_btcoex_timer_pause(sc
);
1315 spin_lock_bh(&sc
->sc_pcu_lock
);
1317 /* make sure h/w will not generate any interrupt
1318 * before setting the invalid flag. */
1319 ath9k_hw_disable_interrupts(ah
);
1321 if (!(sc
->sc_flags
& SC_OP_INVALID
)) {
1322 ath_drain_all_txq(sc
, false);
1324 ath9k_hw_phy_disable(ah
);
1326 sc
->rx
.rxlink
= NULL
;
1328 /* disable HAL and put h/w to sleep */
1329 ath9k_hw_disable(ah
);
1330 ath9k_hw_configpcipowersave(ah
, 1, 1);
1332 spin_unlock_bh(&sc
->sc_pcu_lock
);
1334 ath9k_ps_restore(sc
);
1336 /* Finally, put the chip in FULL SLEEP mode */
1337 ath9k_setpower(sc
, ATH9K_PM_FULL_SLEEP
);
1339 sc
->sc_flags
|= SC_OP_INVALID
;
1341 pm_qos_update_request(&sc
->pm_qos_req
, PM_QOS_DEFAULT_VALUE
);
1343 mutex_unlock(&sc
->mutex
);
1345 ath_dbg(common
, ATH_DBG_CONFIG
, "Driver halt\n");
1348 static int ath9k_add_interface(struct ieee80211_hw
*hw
,
1349 struct ieee80211_vif
*vif
)
1351 struct ath_wiphy
*aphy
= hw
->priv
;
1352 struct ath_softc
*sc
= aphy
->sc
;
1353 struct ath_hw
*ah
= sc
->sc_ah
;
1354 struct ath_common
*common
= ath9k_hw_common(ah
);
1355 struct ath_vif
*avp
= (void *)vif
->drv_priv
;
1356 enum nl80211_iftype ic_opmode
= NL80211_IFTYPE_UNSPECIFIED
;
1359 mutex_lock(&sc
->mutex
);
1361 switch (vif
->type
) {
1362 case NL80211_IFTYPE_STATION
:
1363 ic_opmode
= NL80211_IFTYPE_STATION
;
1365 case NL80211_IFTYPE_WDS
:
1366 ic_opmode
= NL80211_IFTYPE_WDS
;
1368 case NL80211_IFTYPE_ADHOC
:
1369 case NL80211_IFTYPE_AP
:
1370 case NL80211_IFTYPE_MESH_POINT
:
1371 if (sc
->nbcnvifs
>= ATH_BCBUF
) {
1375 ic_opmode
= vif
->type
;
1378 ath_err(common
, "Interface type %d not yet supported\n",
1384 ath_dbg(common
, ATH_DBG_CONFIG
,
1385 "Attach a VIF of type: %d\n", ic_opmode
);
1387 /* Set the VIF opmode */
1388 avp
->av_opmode
= ic_opmode
;
1393 ath9k_set_bssid_mask(hw
, vif
);
1396 goto out
; /* skip global settings for secondary vif */
1398 if (ic_opmode
== NL80211_IFTYPE_AP
) {
1399 ath9k_hw_set_tsfadjust(ah
, 1);
1400 sc
->sc_flags
|= SC_OP_TSF_RESET
;
1403 /* Set the device opmode */
1404 ah
->opmode
= ic_opmode
;
1407 * Enable MIB interrupts when there are hardware phy counters.
1408 * Note we only do this (at the moment) for station mode.
1410 if ((vif
->type
== NL80211_IFTYPE_STATION
) ||
1411 (vif
->type
== NL80211_IFTYPE_ADHOC
) ||
1412 (vif
->type
== NL80211_IFTYPE_MESH_POINT
)) {
1413 if (ah
->config
.enable_ani
)
1414 ah
->imask
|= ATH9K_INT_MIB
;
1415 ah
->imask
|= ATH9K_INT_TSFOOR
;
1418 ath9k_hw_set_interrupts(ah
, ah
->imask
);
1420 if (vif
->type
== NL80211_IFTYPE_AP
||
1421 vif
->type
== NL80211_IFTYPE_ADHOC
) {
1422 sc
->sc_flags
|= SC_OP_ANI_RUN
;
1423 ath_start_ani(common
);
1427 mutex_unlock(&sc
->mutex
);
1431 static void ath9k_remove_interface(struct ieee80211_hw
*hw
,
1432 struct ieee80211_vif
*vif
)
1434 struct ath_wiphy
*aphy
= hw
->priv
;
1435 struct ath_softc
*sc
= aphy
->sc
;
1436 struct ath_common
*common
= ath9k_hw_common(sc
->sc_ah
);
1437 struct ath_vif
*avp
= (void *)vif
->drv_priv
;
1439 ath_dbg(common
, ATH_DBG_CONFIG
, "Detach Interface\n");
1441 mutex_lock(&sc
->mutex
);
1444 sc
->sc_flags
&= ~SC_OP_ANI_RUN
;
1445 del_timer_sync(&common
->ani
.timer
);
1447 /* Reclaim beacon resources */
1448 if ((sc
->sc_ah
->opmode
== NL80211_IFTYPE_AP
) ||
1449 (sc
->sc_ah
->opmode
== NL80211_IFTYPE_ADHOC
) ||
1450 (sc
->sc_ah
->opmode
== NL80211_IFTYPE_MESH_POINT
)) {
1451 /* Disable SWBA interrupt */
1452 sc
->sc_ah
->imask
&= ~ATH9K_INT_SWBA
;
1453 ath9k_ps_wakeup(sc
);
1454 ath9k_hw_set_interrupts(sc
->sc_ah
, sc
->sc_ah
->imask
);
1455 ath9k_hw_stoptxdma(sc
->sc_ah
, sc
->beacon
.beaconq
);
1456 ath9k_ps_restore(sc
);
1457 tasklet_kill(&sc
->bcon_tasklet
);
1460 ath_beacon_return(sc
, avp
);
1461 sc
->sc_flags
&= ~SC_OP_BEACONS
;
1464 /* Re-enable SWBA interrupt */
1465 sc
->sc_ah
->imask
|= ATH9K_INT_SWBA
;
1466 ath9k_ps_wakeup(sc
);
1467 ath9k_hw_set_interrupts(sc
->sc_ah
, sc
->sc_ah
->imask
);
1468 ath9k_ps_restore(sc
);
1473 mutex_unlock(&sc
->mutex
);
1476 static void ath9k_enable_ps(struct ath_softc
*sc
)
1478 struct ath_hw
*ah
= sc
->sc_ah
;
1480 sc
->ps_enabled
= true;
1481 if (!(ah
->caps
.hw_caps
& ATH9K_HW_CAP_AUTOSLEEP
)) {
1482 if ((ah
->imask
& ATH9K_INT_TIM_TIMER
) == 0) {
1483 ah
->imask
|= ATH9K_INT_TIM_TIMER
;
1484 ath9k_hw_set_interrupts(ah
, ah
->imask
);
1486 ath9k_hw_setrxabort(ah
, 1);
1490 static void ath9k_disable_ps(struct ath_softc
*sc
)
1492 struct ath_hw
*ah
= sc
->sc_ah
;
1494 sc
->ps_enabled
= false;
1495 ath9k_hw_setpower(ah
, ATH9K_PM_AWAKE
);
1496 if (!(ah
->caps
.hw_caps
& ATH9K_HW_CAP_AUTOSLEEP
)) {
1497 ath9k_hw_setrxabort(ah
, 0);
1498 sc
->ps_flags
&= ~(PS_WAIT_FOR_BEACON
|
1500 PS_WAIT_FOR_PSPOLL_DATA
|
1501 PS_WAIT_FOR_TX_ACK
);
1502 if (ah
->imask
& ATH9K_INT_TIM_TIMER
) {
1503 ah
->imask
&= ~ATH9K_INT_TIM_TIMER
;
1504 ath9k_hw_set_interrupts(ah
, ah
->imask
);
1510 static int ath9k_config(struct ieee80211_hw
*hw
, u32 changed
)
1512 struct ath_wiphy
*aphy
= hw
->priv
;
1513 struct ath_softc
*sc
= aphy
->sc
;
1514 struct ath_hw
*ah
= sc
->sc_ah
;
1515 struct ath_common
*common
= ath9k_hw_common(ah
);
1516 struct ieee80211_conf
*conf
= &hw
->conf
;
1519 mutex_lock(&sc
->mutex
);
1522 * Leave this as the first check because we need to turn on the
1523 * radio if it was disabled before prior to processing the rest
1524 * of the changes. Likewise we must only disable the radio towards
1527 if (changed
& IEEE80211_CONF_CHANGE_IDLE
) {
1529 bool all_wiphys_idle
;
1530 bool idle
= !!(conf
->flags
& IEEE80211_CONF_IDLE
);
1532 spin_lock_bh(&sc
->wiphy_lock
);
1533 all_wiphys_idle
= ath9k_all_wiphys_idle(sc
);
1534 ath9k_set_wiphy_idle(aphy
, idle
);
1536 enable_radio
= (!idle
&& all_wiphys_idle
);
1539 * After we unlock here its possible another wiphy
1540 * can be re-renabled so to account for that we will
1541 * only disable the radio toward the end of this routine
1542 * if by then all wiphys are still idle.
1544 spin_unlock_bh(&sc
->wiphy_lock
);
1547 sc
->ps_idle
= false;
1548 ath_radio_enable(sc
, hw
);
1549 ath_dbg(common
, ATH_DBG_CONFIG
,
1550 "not-idle: enabling radio\n");
1555 * We just prepare to enable PS. We have to wait until our AP has
1556 * ACK'd our null data frame to disable RX otherwise we'll ignore
1557 * those ACKs and end up retransmitting the same null data frames.
1558 * IEEE80211_CONF_CHANGE_PS is only passed by mac80211 for STA mode.
1560 if (changed
& IEEE80211_CONF_CHANGE_PS
) {
1561 unsigned long flags
;
1562 spin_lock_irqsave(&sc
->sc_pm_lock
, flags
);
1563 if (conf
->flags
& IEEE80211_CONF_PS
)
1564 ath9k_enable_ps(sc
);
1566 ath9k_disable_ps(sc
);
1567 spin_unlock_irqrestore(&sc
->sc_pm_lock
, flags
);
1570 if (changed
& IEEE80211_CONF_CHANGE_MONITOR
) {
1571 if (conf
->flags
& IEEE80211_CONF_MONITOR
) {
1572 ath_dbg(common
, ATH_DBG_CONFIG
,
1573 "Monitor mode is enabled\n");
1574 sc
->sc_ah
->is_monitoring
= true;
1576 ath_dbg(common
, ATH_DBG_CONFIG
,
1577 "Monitor mode is disabled\n");
1578 sc
->sc_ah
->is_monitoring
= false;
1582 if (changed
& IEEE80211_CONF_CHANGE_CHANNEL
) {
1583 struct ieee80211_channel
*curchan
= hw
->conf
.channel
;
1584 int pos
= curchan
->hw_value
;
1586 unsigned long flags
;
1589 old_pos
= ah
->curchan
- &ah
->channels
[0];
1591 aphy
->chan_idx
= pos
;
1592 aphy
->chan_is_ht
= conf_is_ht(conf
);
1593 if (hw
->conf
.flags
& IEEE80211_CONF_OFFCHANNEL
)
1594 sc
->sc_flags
|= SC_OP_OFFCHANNEL
;
1596 sc
->sc_flags
&= ~SC_OP_OFFCHANNEL
;
1598 if (aphy
->state
== ATH_WIPHY_SCAN
||
1599 aphy
->state
== ATH_WIPHY_ACTIVE
)
1600 ath9k_wiphy_pause_all_forced(sc
, aphy
);
1603 * Do not change operational channel based on a paused
1606 goto skip_chan_change
;
1609 ath_dbg(common
, ATH_DBG_CONFIG
, "Set channel: %d MHz\n",
1610 curchan
->center_freq
);
1612 /* XXX: remove me eventualy */
1613 ath9k_update_ichannel(sc
, hw
, &sc
->sc_ah
->channels
[pos
]);
1615 ath_update_chainmask(sc
, conf_is_ht(conf
));
1617 /* update survey stats for the old channel before switching */
1618 spin_lock_irqsave(&common
->cc_lock
, flags
);
1619 ath_update_survey_stats(sc
);
1620 spin_unlock_irqrestore(&common
->cc_lock
, flags
);
1623 * If the operating channel changes, change the survey in-use flags
1625 * Reset the survey data for the new channel, unless we're switching
1626 * back to the operating channel from an off-channel operation.
1628 if (!(hw
->conf
.flags
& IEEE80211_CONF_OFFCHANNEL
) &&
1629 sc
->cur_survey
!= &sc
->survey
[pos
]) {
1632 sc
->cur_survey
->filled
&= ~SURVEY_INFO_IN_USE
;
1634 sc
->cur_survey
= &sc
->survey
[pos
];
1636 memset(sc
->cur_survey
, 0, sizeof(struct survey_info
));
1637 sc
->cur_survey
->filled
|= SURVEY_INFO_IN_USE
;
1638 } else if (!(sc
->survey
[pos
].filled
& SURVEY_INFO_IN_USE
)) {
1639 memset(&sc
->survey
[pos
], 0, sizeof(struct survey_info
));
1642 if (ath_set_channel(sc
, hw
, &sc
->sc_ah
->channels
[pos
]) < 0) {
1643 ath_err(common
, "Unable to set channel\n");
1644 mutex_unlock(&sc
->mutex
);
1649 * The most recent snapshot of channel->noisefloor for the old
1650 * channel is only available after the hardware reset. Copy it to
1651 * the survey stats now.
1654 ath_update_survey_nf(sc
, old_pos
);
1658 if (changed
& IEEE80211_CONF_CHANGE_POWER
) {
1659 sc
->config
.txpowlimit
= 2 * conf
->power_level
;
1660 ath_update_txpow(sc
);
1663 spin_lock_bh(&sc
->wiphy_lock
);
1664 disable_radio
= ath9k_all_wiphys_idle(sc
);
1665 spin_unlock_bh(&sc
->wiphy_lock
);
1667 if (disable_radio
) {
1668 ath_dbg(common
, ATH_DBG_CONFIG
, "idle: disabling radio\n");
1670 ath_radio_disable(sc
, hw
);
1673 mutex_unlock(&sc
->mutex
);
1678 #define SUPPORTED_FILTERS \
1679 (FIF_PROMISC_IN_BSS | \
1684 FIF_BCN_PRBRESP_PROMISC | \
1688 /* FIXME: sc->sc_full_reset ? */
1689 static void ath9k_configure_filter(struct ieee80211_hw
*hw
,
1690 unsigned int changed_flags
,
1691 unsigned int *total_flags
,
1694 struct ath_wiphy
*aphy
= hw
->priv
;
1695 struct ath_softc
*sc
= aphy
->sc
;
1698 changed_flags
&= SUPPORTED_FILTERS
;
1699 *total_flags
&= SUPPORTED_FILTERS
;
1701 sc
->rx
.rxfilter
= *total_flags
;
1702 ath9k_ps_wakeup(sc
);
1703 rfilt
= ath_calcrxfilter(sc
);
1704 ath9k_hw_setrxfilter(sc
->sc_ah
, rfilt
);
1705 ath9k_ps_restore(sc
);
1707 ath_dbg(ath9k_hw_common(sc
->sc_ah
), ATH_DBG_CONFIG
,
1708 "Set HW RX filter: 0x%x\n", rfilt
);
1711 static int ath9k_sta_add(struct ieee80211_hw
*hw
,
1712 struct ieee80211_vif
*vif
,
1713 struct ieee80211_sta
*sta
)
1715 struct ath_wiphy
*aphy
= hw
->priv
;
1716 struct ath_softc
*sc
= aphy
->sc
;
1718 ath_node_attach(sc
, sta
);
1723 static int ath9k_sta_remove(struct ieee80211_hw
*hw
,
1724 struct ieee80211_vif
*vif
,
1725 struct ieee80211_sta
*sta
)
1727 struct ath_wiphy
*aphy
= hw
->priv
;
1728 struct ath_softc
*sc
= aphy
->sc
;
1730 ath_node_detach(sc
, sta
);
1735 static int ath9k_conf_tx(struct ieee80211_hw
*hw
, u16 queue
,
1736 const struct ieee80211_tx_queue_params
*params
)
1738 struct ath_wiphy
*aphy
= hw
->priv
;
1739 struct ath_softc
*sc
= aphy
->sc
;
1740 struct ath_common
*common
= ath9k_hw_common(sc
->sc_ah
);
1741 struct ath_txq
*txq
;
1742 struct ath9k_tx_queue_info qi
;
1745 if (queue
>= WME_NUM_AC
)
1748 txq
= sc
->tx
.txq_map
[queue
];
1750 mutex_lock(&sc
->mutex
);
1752 memset(&qi
, 0, sizeof(struct ath9k_tx_queue_info
));
1754 qi
.tqi_aifs
= params
->aifs
;
1755 qi
.tqi_cwmin
= params
->cw_min
;
1756 qi
.tqi_cwmax
= params
->cw_max
;
1757 qi
.tqi_burstTime
= params
->txop
;
1759 ath_dbg(common
, ATH_DBG_CONFIG
,
1760 "Configure tx [queue/halq] [%d/%d], aifs: %d, cw_min: %d, cw_max: %d, txop: %d\n",
1761 queue
, txq
->axq_qnum
, params
->aifs
, params
->cw_min
,
1762 params
->cw_max
, params
->txop
);
1764 ret
= ath_txq_update(sc
, txq
->axq_qnum
, &qi
);
1766 ath_err(common
, "TXQ Update failed\n");
1768 if (sc
->sc_ah
->opmode
== NL80211_IFTYPE_ADHOC
)
1769 if (queue
== WME_AC_BE
&& !ret
)
1770 ath_beaconq_config(sc
);
1772 mutex_unlock(&sc
->mutex
);
1777 static int ath9k_set_key(struct ieee80211_hw
*hw
,
1778 enum set_key_cmd cmd
,
1779 struct ieee80211_vif
*vif
,
1780 struct ieee80211_sta
*sta
,
1781 struct ieee80211_key_conf
*key
)
1783 struct ath_wiphy
*aphy
= hw
->priv
;
1784 struct ath_softc
*sc
= aphy
->sc
;
1785 struct ath_common
*common
= ath9k_hw_common(sc
->sc_ah
);
1788 if (modparam_nohwcrypt
)
1791 mutex_lock(&sc
->mutex
);
1792 ath9k_ps_wakeup(sc
);
1793 ath_dbg(common
, ATH_DBG_CONFIG
, "Set HW Key\n");
1797 ret
= ath_key_config(common
, vif
, sta
, key
);
1799 key
->hw_key_idx
= ret
;
1800 /* push IV and Michael MIC generation to stack */
1801 key
->flags
|= IEEE80211_KEY_FLAG_GENERATE_IV
;
1802 if (key
->cipher
== WLAN_CIPHER_SUITE_TKIP
)
1803 key
->flags
|= IEEE80211_KEY_FLAG_GENERATE_MMIC
;
1804 if (sc
->sc_ah
->sw_mgmt_crypto
&&
1805 key
->cipher
== WLAN_CIPHER_SUITE_CCMP
)
1806 key
->flags
|= IEEE80211_KEY_FLAG_SW_MGMT
;
1811 ath_key_delete(common
, key
);
1817 ath9k_ps_restore(sc
);
1818 mutex_unlock(&sc
->mutex
);
1823 static void ath9k_bss_info_changed(struct ieee80211_hw
*hw
,
1824 struct ieee80211_vif
*vif
,
1825 struct ieee80211_bss_conf
*bss_conf
,
1828 struct ath_wiphy
*aphy
= hw
->priv
;
1829 struct ath_softc
*sc
= aphy
->sc
;
1830 struct ath_hw
*ah
= sc
->sc_ah
;
1831 struct ath_common
*common
= ath9k_hw_common(ah
);
1832 struct ath_vif
*avp
= (void *)vif
->drv_priv
;
1836 mutex_lock(&sc
->mutex
);
1838 if (changed
& BSS_CHANGED_BSSID
) {
1840 memcpy(common
->curbssid
, bss_conf
->bssid
, ETH_ALEN
);
1841 memcpy(avp
->bssid
, bss_conf
->bssid
, ETH_ALEN
);
1843 ath9k_hw_write_associd(ah
);
1845 /* Set aggregation protection mode parameters */
1846 sc
->config
.ath_aggr_prot
= 0;
1848 /* Only legacy IBSS for now */
1849 if (vif
->type
== NL80211_IFTYPE_ADHOC
)
1850 ath_update_chainmask(sc
, 0);
1852 ath_dbg(common
, ATH_DBG_CONFIG
, "BSSID: %pM aid: 0x%x\n",
1853 common
->curbssid
, common
->curaid
);
1855 /* need to reconfigure the beacon */
1856 sc
->sc_flags
&= ~SC_OP_BEACONS
;
1859 /* Enable transmission of beacons (AP, IBSS, MESH) */
1860 if ((changed
& BSS_CHANGED_BEACON
) ||
1861 ((changed
& BSS_CHANGED_BEACON_ENABLED
) && bss_conf
->enable_beacon
)) {
1862 ath9k_hw_stoptxdma(sc
->sc_ah
, sc
->beacon
.beaconq
);
1863 error
= ath_beacon_alloc(aphy
, vif
);
1865 ath_beacon_config(sc
, vif
);
1868 if (changed
& BSS_CHANGED_ERP_SLOT
) {
1869 if (bss_conf
->use_short_slot
)
1873 if (vif
->type
== NL80211_IFTYPE_AP
) {
1875 * Defer update, so that connected stations can adjust
1876 * their settings at the same time.
1877 * See beacon.c for more details
1879 sc
->beacon
.slottime
= slottime
;
1880 sc
->beacon
.updateslot
= UPDATE
;
1882 ah
->slottime
= slottime
;
1883 ath9k_hw_init_global_settings(ah
);
1887 /* Disable transmission of beacons */
1888 if ((changed
& BSS_CHANGED_BEACON_ENABLED
) && !bss_conf
->enable_beacon
)
1889 ath9k_hw_stoptxdma(sc
->sc_ah
, sc
->beacon
.beaconq
);
1891 if (changed
& BSS_CHANGED_BEACON_INT
) {
1892 sc
->beacon_interval
= bss_conf
->beacon_int
;
1894 * In case of AP mode, the HW TSF has to be reset
1895 * when the beacon interval changes.
1897 if (vif
->type
== NL80211_IFTYPE_AP
) {
1898 sc
->sc_flags
|= SC_OP_TSF_RESET
;
1899 ath9k_hw_stoptxdma(sc
->sc_ah
, sc
->beacon
.beaconq
);
1900 error
= ath_beacon_alloc(aphy
, vif
);
1902 ath_beacon_config(sc
, vif
);
1904 ath_beacon_config(sc
, vif
);
1908 if (changed
& BSS_CHANGED_ERP_PREAMBLE
) {
1909 ath_dbg(common
, ATH_DBG_CONFIG
, "BSS Changed PREAMBLE %d\n",
1910 bss_conf
->use_short_preamble
);
1911 if (bss_conf
->use_short_preamble
)
1912 sc
->sc_flags
|= SC_OP_PREAMBLE_SHORT
;
1914 sc
->sc_flags
&= ~SC_OP_PREAMBLE_SHORT
;
1917 if (changed
& BSS_CHANGED_ERP_CTS_PROT
) {
1918 ath_dbg(common
, ATH_DBG_CONFIG
, "BSS Changed CTS PROT %d\n",
1919 bss_conf
->use_cts_prot
);
1920 if (bss_conf
->use_cts_prot
&&
1921 hw
->conf
.channel
->band
!= IEEE80211_BAND_5GHZ
)
1922 sc
->sc_flags
|= SC_OP_PROTECT_ENABLE
;
1924 sc
->sc_flags
&= ~SC_OP_PROTECT_ENABLE
;
1927 if (changed
& BSS_CHANGED_ASSOC
) {
1928 ath_dbg(common
, ATH_DBG_CONFIG
, "BSS Changed ASSOC %d\n",
1930 ath9k_bss_assoc_info(sc
, hw
, vif
, bss_conf
);
1933 mutex_unlock(&sc
->mutex
);
1936 static u64
ath9k_get_tsf(struct ieee80211_hw
*hw
)
1939 struct ath_wiphy
*aphy
= hw
->priv
;
1940 struct ath_softc
*sc
= aphy
->sc
;
1942 mutex_lock(&sc
->mutex
);
1943 tsf
= ath9k_hw_gettsf64(sc
->sc_ah
);
1944 mutex_unlock(&sc
->mutex
);
1949 static void ath9k_set_tsf(struct ieee80211_hw
*hw
, u64 tsf
)
1951 struct ath_wiphy
*aphy
= hw
->priv
;
1952 struct ath_softc
*sc
= aphy
->sc
;
1954 mutex_lock(&sc
->mutex
);
1955 ath9k_hw_settsf64(sc
->sc_ah
, tsf
);
1956 mutex_unlock(&sc
->mutex
);
1959 static void ath9k_reset_tsf(struct ieee80211_hw
*hw
)
1961 struct ath_wiphy
*aphy
= hw
->priv
;
1962 struct ath_softc
*sc
= aphy
->sc
;
1964 mutex_lock(&sc
->mutex
);
1966 ath9k_ps_wakeup(sc
);
1967 ath9k_hw_reset_tsf(sc
->sc_ah
);
1968 ath9k_ps_restore(sc
);
1970 mutex_unlock(&sc
->mutex
);
1973 static int ath9k_ampdu_action(struct ieee80211_hw
*hw
,
1974 struct ieee80211_vif
*vif
,
1975 enum ieee80211_ampdu_mlme_action action
,
1976 struct ieee80211_sta
*sta
,
1979 struct ath_wiphy
*aphy
= hw
->priv
;
1980 struct ath_softc
*sc
= aphy
->sc
;
1986 case IEEE80211_AMPDU_RX_START
:
1987 if (!(sc
->sc_flags
& SC_OP_RXAGGR
))
1990 case IEEE80211_AMPDU_RX_STOP
:
1992 case IEEE80211_AMPDU_TX_START
:
1993 if (!(sc
->sc_flags
& SC_OP_TXAGGR
))
1996 ath9k_ps_wakeup(sc
);
1997 ret
= ath_tx_aggr_start(sc
, sta
, tid
, ssn
);
1999 ieee80211_start_tx_ba_cb_irqsafe(vif
, sta
->addr
, tid
);
2000 ath9k_ps_restore(sc
);
2002 case IEEE80211_AMPDU_TX_STOP
:
2003 ath9k_ps_wakeup(sc
);
2004 ath_tx_aggr_stop(sc
, sta
, tid
);
2005 ieee80211_stop_tx_ba_cb_irqsafe(vif
, sta
->addr
, tid
);
2006 ath9k_ps_restore(sc
);
2008 case IEEE80211_AMPDU_TX_OPERATIONAL
:
2009 ath9k_ps_wakeup(sc
);
2010 ath_tx_aggr_resume(sc
, sta
, tid
);
2011 ath9k_ps_restore(sc
);
2014 ath_err(ath9k_hw_common(sc
->sc_ah
), "Unknown AMPDU action\n");
2022 static int ath9k_get_survey(struct ieee80211_hw
*hw
, int idx
,
2023 struct survey_info
*survey
)
2025 struct ath_wiphy
*aphy
= hw
->priv
;
2026 struct ath_softc
*sc
= aphy
->sc
;
2027 struct ath_common
*common
= ath9k_hw_common(sc
->sc_ah
);
2028 struct ieee80211_supported_band
*sband
;
2029 struct ieee80211_channel
*chan
;
2030 unsigned long flags
;
2033 spin_lock_irqsave(&common
->cc_lock
, flags
);
2035 ath_update_survey_stats(sc
);
2037 sband
= hw
->wiphy
->bands
[IEEE80211_BAND_2GHZ
];
2038 if (sband
&& idx
>= sband
->n_channels
) {
2039 idx
-= sband
->n_channels
;
2044 sband
= hw
->wiphy
->bands
[IEEE80211_BAND_5GHZ
];
2046 if (!sband
|| idx
>= sband
->n_channels
) {
2047 spin_unlock_irqrestore(&common
->cc_lock
, flags
);
2051 chan
= &sband
->channels
[idx
];
2052 pos
= chan
->hw_value
;
2053 memcpy(survey
, &sc
->survey
[pos
], sizeof(*survey
));
2054 survey
->channel
= chan
;
2055 spin_unlock_irqrestore(&common
->cc_lock
, flags
);
2060 static void ath9k_sw_scan_start(struct ieee80211_hw
*hw
)
2062 struct ath_wiphy
*aphy
= hw
->priv
;
2063 struct ath_softc
*sc
= aphy
->sc
;
2065 mutex_lock(&sc
->mutex
);
2066 if (ath9k_wiphy_scanning(sc
)) {
2068 * There is a race here in mac80211 but fixing it requires
2069 * we revisit how we handle the scan complete callback.
2070 * After mac80211 fixes we will not have configured hardware
2071 * to the home channel nor would we have configured the RX
2074 mutex_unlock(&sc
->mutex
);
2078 aphy
->state
= ATH_WIPHY_SCAN
;
2079 ath9k_wiphy_pause_all_forced(sc
, aphy
);
2080 mutex_unlock(&sc
->mutex
);
2084 * XXX: this requires a revisit after the driver
2085 * scan_complete gets moved to another place/removed in mac80211.
2087 static void ath9k_sw_scan_complete(struct ieee80211_hw
*hw
)
2089 struct ath_wiphy
*aphy
= hw
->priv
;
2090 struct ath_softc
*sc
= aphy
->sc
;
2092 mutex_lock(&sc
->mutex
);
2093 aphy
->state
= ATH_WIPHY_ACTIVE
;
2094 mutex_unlock(&sc
->mutex
);
2097 static void ath9k_set_coverage_class(struct ieee80211_hw
*hw
, u8 coverage_class
)
2099 struct ath_wiphy
*aphy
= hw
->priv
;
2100 struct ath_softc
*sc
= aphy
->sc
;
2101 struct ath_hw
*ah
= sc
->sc_ah
;
2103 mutex_lock(&sc
->mutex
);
2104 ah
->coverage_class
= coverage_class
;
2105 ath9k_hw_init_global_settings(ah
);
2106 mutex_unlock(&sc
->mutex
);
2109 struct ieee80211_ops ath9k_ops
= {
2111 .start
= ath9k_start
,
2113 .add_interface
= ath9k_add_interface
,
2114 .remove_interface
= ath9k_remove_interface
,
2115 .config
= ath9k_config
,
2116 .configure_filter
= ath9k_configure_filter
,
2117 .sta_add
= ath9k_sta_add
,
2118 .sta_remove
= ath9k_sta_remove
,
2119 .conf_tx
= ath9k_conf_tx
,
2120 .bss_info_changed
= ath9k_bss_info_changed
,
2121 .set_key
= ath9k_set_key
,
2122 .get_tsf
= ath9k_get_tsf
,
2123 .set_tsf
= ath9k_set_tsf
,
2124 .reset_tsf
= ath9k_reset_tsf
,
2125 .ampdu_action
= ath9k_ampdu_action
,
2126 .get_survey
= ath9k_get_survey
,
2127 .sw_scan_start
= ath9k_sw_scan_start
,
2128 .sw_scan_complete
= ath9k_sw_scan_complete
,
2129 .rfkill_poll
= ath9k_rfkill_poll_state
,
2130 .set_coverage_class
= ath9k_set_coverage_class
,