2 * Copyright (c) 2008-2011 Atheros Communications Inc.
4 * Permission to use, copy, modify, and/or distribute this software for any
5 * purpose with or without fee is hereby granted, provided that the above
6 * copyright notice and this permission notice appear in all copies.
8 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
9 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
10 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
11 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
12 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
13 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
14 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
17 #include <linux/dma-mapping.h>
19 #include "ar9003_mac.h"
21 #define SKB_CB_ATHBUF(__skb) (*((struct ath_buf **)__skb->cb))
23 static inline bool ath_is_alt_ant_ratio_better(int alt_ratio
, int maxdelta
,
24 int mindelta
, int main_rssi_avg
,
25 int alt_rssi_avg
, int pkt_count
)
27 return (((alt_ratio
>= ATH_ANT_DIV_COMB_ALT_ANT_RATIO2
) &&
28 (alt_rssi_avg
> main_rssi_avg
+ maxdelta
)) ||
29 (alt_rssi_avg
> main_rssi_avg
+ mindelta
)) && (pkt_count
> 50);
32 static inline bool ath_ant_div_comb_alt_check(u8 div_group
, int alt_ratio
,
33 int curr_main_set
, int curr_alt_set
,
34 int alt_rssi_avg
, int main_rssi_avg
)
39 if (alt_ratio
> ATH_ANT_DIV_COMB_ALT_ANT_RATIO
)
44 if ((((curr_main_set
== ATH_ANT_DIV_COMB_LNA2
) &&
45 (curr_alt_set
== ATH_ANT_DIV_COMB_LNA1
) &&
46 (alt_rssi_avg
>= (main_rssi_avg
- 5))) ||
47 ((curr_main_set
== ATH_ANT_DIV_COMB_LNA1
) &&
48 (curr_alt_set
== ATH_ANT_DIV_COMB_LNA2
) &&
49 (alt_rssi_avg
>= (main_rssi_avg
- 2)))) &&
60 static inline bool ath9k_check_auto_sleep(struct ath_softc
*sc
)
62 return sc
->ps_enabled
&&
63 (sc
->sc_ah
->caps
.hw_caps
& ATH9K_HW_CAP_AUTOSLEEP
);
67 * Setup and link descriptors.
69 * 11N: we can no longer afford to self link the last descriptor.
70 * MAC acknowledges BA status as long as it copies frames to host
71 * buffer (or rx fifo). This can incorrectly acknowledge packets
72 * to a sender if last desc is self-linked.
74 static void ath_rx_buf_link(struct ath_softc
*sc
, struct ath_buf
*bf
)
76 struct ath_hw
*ah
= sc
->sc_ah
;
77 struct ath_common
*common
= ath9k_hw_common(ah
);
84 ds
->ds_link
= 0; /* link to null */
85 ds
->ds_data
= bf
->bf_buf_addr
;
87 /* virtual addr of the beginning of the buffer. */
90 ds
->ds_vdata
= skb
->data
;
93 * setup rx descriptors. The rx_bufsize here tells the hardware
94 * how much data it can DMA to us and that we are prepared
97 ath9k_hw_setuprxdesc(ah
, ds
,
101 if (sc
->rx
.rxlink
== NULL
)
102 ath9k_hw_putrxbuf(ah
, bf
->bf_daddr
);
104 *sc
->rx
.rxlink
= bf
->bf_daddr
;
106 sc
->rx
.rxlink
= &ds
->ds_link
;
109 static void ath_setdefantenna(struct ath_softc
*sc
, u32 antenna
)
111 /* XXX block beacon interrupts */
112 ath9k_hw_setantenna(sc
->sc_ah
, antenna
);
113 sc
->rx
.defant
= antenna
;
114 sc
->rx
.rxotherant
= 0;
117 static void ath_opmode_init(struct ath_softc
*sc
)
119 struct ath_hw
*ah
= sc
->sc_ah
;
120 struct ath_common
*common
= ath9k_hw_common(ah
);
124 /* configure rx filter */
125 rfilt
= ath_calcrxfilter(sc
);
126 ath9k_hw_setrxfilter(ah
, rfilt
);
128 /* configure bssid mask */
129 ath_hw_setbssidmask(common
);
131 /* configure operational mode */
132 ath9k_hw_setopmode(ah
);
134 /* calculate and install multicast filter */
135 mfilt
[0] = mfilt
[1] = ~0;
136 ath9k_hw_setmcastfilter(ah
, mfilt
[0], mfilt
[1]);
139 static bool ath_rx_edma_buf_link(struct ath_softc
*sc
,
140 enum ath9k_rx_qtype qtype
)
142 struct ath_hw
*ah
= sc
->sc_ah
;
143 struct ath_rx_edma
*rx_edma
;
147 rx_edma
= &sc
->rx
.rx_edma
[qtype
];
148 if (skb_queue_len(&rx_edma
->rx_fifo
) >= rx_edma
->rx_fifo_hwsize
)
151 bf
= list_first_entry(&sc
->rx
.rxbuf
, struct ath_buf
, list
);
152 list_del_init(&bf
->list
);
157 memset(skb
->data
, 0, ah
->caps
.rx_status_len
);
158 dma_sync_single_for_device(sc
->dev
, bf
->bf_buf_addr
,
159 ah
->caps
.rx_status_len
, DMA_TO_DEVICE
);
161 SKB_CB_ATHBUF(skb
) = bf
;
162 ath9k_hw_addrxbuf_edma(ah
, bf
->bf_buf_addr
, qtype
);
163 skb_queue_tail(&rx_edma
->rx_fifo
, skb
);
168 static void ath_rx_addbuffer_edma(struct ath_softc
*sc
,
169 enum ath9k_rx_qtype qtype
, int size
)
171 struct ath_common
*common
= ath9k_hw_common(sc
->sc_ah
);
174 if (list_empty(&sc
->rx
.rxbuf
)) {
175 ath_dbg(common
, ATH_DBG_QUEUE
, "No free rx buf available\n");
179 while (!list_empty(&sc
->rx
.rxbuf
)) {
182 if (!ath_rx_edma_buf_link(sc
, qtype
))
190 static void ath_rx_remove_buffer(struct ath_softc
*sc
,
191 enum ath9k_rx_qtype qtype
)
194 struct ath_rx_edma
*rx_edma
;
197 rx_edma
= &sc
->rx
.rx_edma
[qtype
];
199 while ((skb
= skb_dequeue(&rx_edma
->rx_fifo
)) != NULL
) {
200 bf
= SKB_CB_ATHBUF(skb
);
202 list_add_tail(&bf
->list
, &sc
->rx
.rxbuf
);
206 static void ath_rx_edma_cleanup(struct ath_softc
*sc
)
208 struct ath_hw
*ah
= sc
->sc_ah
;
209 struct ath_common
*common
= ath9k_hw_common(ah
);
212 ath_rx_remove_buffer(sc
, ATH9K_RX_QUEUE_LP
);
213 ath_rx_remove_buffer(sc
, ATH9K_RX_QUEUE_HP
);
215 list_for_each_entry(bf
, &sc
->rx
.rxbuf
, list
) {
217 dma_unmap_single(sc
->dev
, bf
->bf_buf_addr
,
220 dev_kfree_skb_any(bf
->bf_mpdu
);
226 INIT_LIST_HEAD(&sc
->rx
.rxbuf
);
228 kfree(sc
->rx
.rx_bufptr
);
229 sc
->rx
.rx_bufptr
= NULL
;
232 static void ath_rx_edma_init_queue(struct ath_rx_edma
*rx_edma
, int size
)
234 skb_queue_head_init(&rx_edma
->rx_fifo
);
235 skb_queue_head_init(&rx_edma
->rx_buffers
);
236 rx_edma
->rx_fifo_hwsize
= size
;
239 static int ath_rx_edma_init(struct ath_softc
*sc
, int nbufs
)
241 struct ath_common
*common
= ath9k_hw_common(sc
->sc_ah
);
242 struct ath_hw
*ah
= sc
->sc_ah
;
248 ath9k_hw_set_rx_bufsize(ah
, common
->rx_bufsize
-
249 ah
->caps
.rx_status_len
);
251 ath_rx_edma_init_queue(&sc
->rx
.rx_edma
[ATH9K_RX_QUEUE_LP
],
252 ah
->caps
.rx_lp_qdepth
);
253 ath_rx_edma_init_queue(&sc
->rx
.rx_edma
[ATH9K_RX_QUEUE_HP
],
254 ah
->caps
.rx_hp_qdepth
);
256 size
= sizeof(struct ath_buf
) * nbufs
;
257 bf
= kzalloc(size
, GFP_KERNEL
);
261 INIT_LIST_HEAD(&sc
->rx
.rxbuf
);
262 sc
->rx
.rx_bufptr
= bf
;
264 for (i
= 0; i
< nbufs
; i
++, bf
++) {
265 skb
= ath_rxbuf_alloc(common
, common
->rx_bufsize
, GFP_KERNEL
);
271 memset(skb
->data
, 0, common
->rx_bufsize
);
274 bf
->bf_buf_addr
= dma_map_single(sc
->dev
, skb
->data
,
277 if (unlikely(dma_mapping_error(sc
->dev
,
279 dev_kfree_skb_any(skb
);
283 "dma_mapping_error() on RX init\n");
288 list_add_tail(&bf
->list
, &sc
->rx
.rxbuf
);
294 ath_rx_edma_cleanup(sc
);
298 static void ath_edma_start_recv(struct ath_softc
*sc
)
300 spin_lock_bh(&sc
->rx
.rxbuflock
);
302 ath9k_hw_rxena(sc
->sc_ah
);
304 ath_rx_addbuffer_edma(sc
, ATH9K_RX_QUEUE_HP
,
305 sc
->rx
.rx_edma
[ATH9K_RX_QUEUE_HP
].rx_fifo_hwsize
);
307 ath_rx_addbuffer_edma(sc
, ATH9K_RX_QUEUE_LP
,
308 sc
->rx
.rx_edma
[ATH9K_RX_QUEUE_LP
].rx_fifo_hwsize
);
312 ath9k_hw_startpcureceive(sc
->sc_ah
, (sc
->sc_flags
& SC_OP_OFFCHANNEL
));
314 spin_unlock_bh(&sc
->rx
.rxbuflock
);
317 static void ath_edma_stop_recv(struct ath_softc
*sc
)
319 ath_rx_remove_buffer(sc
, ATH9K_RX_QUEUE_HP
);
320 ath_rx_remove_buffer(sc
, ATH9K_RX_QUEUE_LP
);
323 int ath_rx_init(struct ath_softc
*sc
, int nbufs
)
325 struct ath_common
*common
= ath9k_hw_common(sc
->sc_ah
);
330 spin_lock_init(&sc
->sc_pcu_lock
);
331 sc
->sc_flags
&= ~SC_OP_RXFLUSH
;
332 spin_lock_init(&sc
->rx
.rxbuflock
);
334 common
->rx_bufsize
= IEEE80211_MAX_MPDU_LEN
/ 2 +
335 sc
->sc_ah
->caps
.rx_status_len
;
337 if (sc
->sc_ah
->caps
.hw_caps
& ATH9K_HW_CAP_EDMA
) {
338 return ath_rx_edma_init(sc
, nbufs
);
340 ath_dbg(common
, ATH_DBG_CONFIG
, "cachelsz %u rxbufsize %u\n",
341 common
->cachelsz
, common
->rx_bufsize
);
343 /* Initialize rx descriptors */
345 error
= ath_descdma_setup(sc
, &sc
->rx
.rxdma
, &sc
->rx
.rxbuf
,
349 "failed to allocate rx descriptors: %d\n",
354 list_for_each_entry(bf
, &sc
->rx
.rxbuf
, list
) {
355 skb
= ath_rxbuf_alloc(common
, common
->rx_bufsize
,
363 bf
->bf_buf_addr
= dma_map_single(sc
->dev
, skb
->data
,
366 if (unlikely(dma_mapping_error(sc
->dev
,
368 dev_kfree_skb_any(skb
);
372 "dma_mapping_error() on RX init\n");
377 sc
->rx
.rxlink
= NULL
;
387 void ath_rx_cleanup(struct ath_softc
*sc
)
389 struct ath_hw
*ah
= sc
->sc_ah
;
390 struct ath_common
*common
= ath9k_hw_common(ah
);
394 if (sc
->sc_ah
->caps
.hw_caps
& ATH9K_HW_CAP_EDMA
) {
395 ath_rx_edma_cleanup(sc
);
398 list_for_each_entry(bf
, &sc
->rx
.rxbuf
, list
) {
401 dma_unmap_single(sc
->dev
, bf
->bf_buf_addr
,
410 if (sc
->rx
.rxdma
.dd_desc_len
!= 0)
411 ath_descdma_cleanup(sc
, &sc
->rx
.rxdma
, &sc
->rx
.rxbuf
);
416 * Calculate the receive filter according to the
417 * operating mode and state:
419 * o always accept unicast, broadcast, and multicast traffic
420 * o maintain current state of phy error reception (the hal
421 * may enable phy error frames for noise immunity work)
422 * o probe request frames are accepted only when operating in
423 * hostap, adhoc, or monitor modes
424 * o enable promiscuous mode according to the interface state
426 * - when operating in adhoc mode so the 802.11 layer creates
427 * node table entries for peers,
428 * - when operating in station mode for collecting rssi data when
429 * the station is otherwise quiet, or
430 * - when operating as a repeater so we see repeater-sta beacons
434 u32
ath_calcrxfilter(struct ath_softc
*sc
)
438 rfilt
= ATH9K_RX_FILTER_UCAST
| ATH9K_RX_FILTER_BCAST
439 | ATH9K_RX_FILTER_MCAST
;
441 if (sc
->rx
.rxfilter
& FIF_PROBE_REQ
)
442 rfilt
|= ATH9K_RX_FILTER_PROBEREQ
;
445 * Set promiscuous mode when FIF_PROMISC_IN_BSS is enabled for station
446 * mode interface or when in monitor mode. AP mode does not need this
447 * since it receives all in-BSS frames anyway.
449 if (sc
->sc_ah
->is_monitoring
)
450 rfilt
|= ATH9K_RX_FILTER_PROM
;
452 if (sc
->rx
.rxfilter
& FIF_CONTROL
)
453 rfilt
|= ATH9K_RX_FILTER_CONTROL
;
455 if ((sc
->sc_ah
->opmode
== NL80211_IFTYPE_STATION
) &&
457 !(sc
->rx
.rxfilter
& FIF_BCN_PRBRESP_PROMISC
))
458 rfilt
|= ATH9K_RX_FILTER_MYBEACON
;
460 rfilt
|= ATH9K_RX_FILTER_BEACON
;
462 if ((sc
->sc_ah
->opmode
== NL80211_IFTYPE_AP
) ||
463 (sc
->rx
.rxfilter
& FIF_PSPOLL
))
464 rfilt
|= ATH9K_RX_FILTER_PSPOLL
;
466 if (conf_is_ht(&sc
->hw
->conf
))
467 rfilt
|= ATH9K_RX_FILTER_COMP_BAR
;
469 if (sc
->nvifs
> 1 || (sc
->rx
.rxfilter
& FIF_OTHER_BSS
)) {
470 /* The following may also be needed for other older chips */
471 if (sc
->sc_ah
->hw_version
.macVersion
== AR_SREV_VERSION_9160
)
472 rfilt
|= ATH9K_RX_FILTER_PROM
;
473 rfilt
|= ATH9K_RX_FILTER_MCAST_BCAST_ALL
;
478 #undef RX_FILTER_PRESERVE
481 int ath_startrecv(struct ath_softc
*sc
)
483 struct ath_hw
*ah
= sc
->sc_ah
;
484 struct ath_buf
*bf
, *tbf
;
486 if (ah
->caps
.hw_caps
& ATH9K_HW_CAP_EDMA
) {
487 ath_edma_start_recv(sc
);
491 spin_lock_bh(&sc
->rx
.rxbuflock
);
492 if (list_empty(&sc
->rx
.rxbuf
))
495 sc
->rx
.rxlink
= NULL
;
496 list_for_each_entry_safe(bf
, tbf
, &sc
->rx
.rxbuf
, list
) {
497 ath_rx_buf_link(sc
, bf
);
500 /* We could have deleted elements so the list may be empty now */
501 if (list_empty(&sc
->rx
.rxbuf
))
504 bf
= list_first_entry(&sc
->rx
.rxbuf
, struct ath_buf
, list
);
505 ath9k_hw_putrxbuf(ah
, bf
->bf_daddr
);
510 ath9k_hw_startpcureceive(ah
, (sc
->sc_flags
& SC_OP_OFFCHANNEL
));
512 spin_unlock_bh(&sc
->rx
.rxbuflock
);
517 bool ath_stoprecv(struct ath_softc
*sc
)
519 struct ath_hw
*ah
= sc
->sc_ah
;
520 bool stopped
, reset
= false;
522 spin_lock_bh(&sc
->rx
.rxbuflock
);
523 ath9k_hw_abortpcurecv(ah
);
524 ath9k_hw_setrxfilter(ah
, 0);
525 stopped
= ath9k_hw_stopdmarecv(ah
, &reset
);
527 if (sc
->sc_ah
->caps
.hw_caps
& ATH9K_HW_CAP_EDMA
)
528 ath_edma_stop_recv(sc
);
530 sc
->rx
.rxlink
= NULL
;
531 spin_unlock_bh(&sc
->rx
.rxbuflock
);
533 if (!(ah
->ah_flags
& AH_UNPLUGGED
) &&
534 unlikely(!stopped
)) {
535 ath_err(ath9k_hw_common(sc
->sc_ah
),
536 "Could not stop RX, we could be "
537 "confusing the DMA engine when we start RX up\n");
538 ATH_DBG_WARN_ON_ONCE(!stopped
);
540 return stopped
&& !reset
;
543 void ath_flushrecv(struct ath_softc
*sc
)
545 sc
->sc_flags
|= SC_OP_RXFLUSH
;
546 if (sc
->sc_ah
->caps
.hw_caps
& ATH9K_HW_CAP_EDMA
)
547 ath_rx_tasklet(sc
, 1, true);
548 ath_rx_tasklet(sc
, 1, false);
549 sc
->sc_flags
&= ~SC_OP_RXFLUSH
;
552 static bool ath_beacon_dtim_pending_cab(struct sk_buff
*skb
)
554 /* Check whether the Beacon frame has DTIM indicating buffered bc/mc */
555 struct ieee80211_mgmt
*mgmt
;
556 u8
*pos
, *end
, id
, elen
;
557 struct ieee80211_tim_ie
*tim
;
559 mgmt
= (struct ieee80211_mgmt
*)skb
->data
;
560 pos
= mgmt
->u
.beacon
.variable
;
561 end
= skb
->data
+ skb
->len
;
563 while (pos
+ 2 < end
) {
566 if (pos
+ elen
> end
)
569 if (id
== WLAN_EID_TIM
) {
570 if (elen
< sizeof(*tim
))
572 tim
= (struct ieee80211_tim_ie
*) pos
;
573 if (tim
->dtim_count
!= 0)
575 return tim
->bitmap_ctrl
& 0x01;
584 static void ath_rx_ps_beacon(struct ath_softc
*sc
, struct sk_buff
*skb
)
586 struct ath_common
*common
= ath9k_hw_common(sc
->sc_ah
);
588 if (skb
->len
< 24 + 8 + 2 + 2)
591 sc
->ps_flags
&= ~PS_WAIT_FOR_BEACON
;
593 if (sc
->ps_flags
& PS_BEACON_SYNC
) {
594 sc
->ps_flags
&= ~PS_BEACON_SYNC
;
595 ath_dbg(common
, ATH_DBG_PS
,
596 "Reconfigure Beacon timers based on timestamp from the AP\n");
600 if (ath_beacon_dtim_pending_cab(skb
)) {
602 * Remain awake waiting for buffered broadcast/multicast
603 * frames. If the last broadcast/multicast frame is not
604 * received properly, the next beacon frame will work as
605 * a backup trigger for returning into NETWORK SLEEP state,
606 * so we are waiting for it as well.
608 ath_dbg(common
, ATH_DBG_PS
,
609 "Received DTIM beacon indicating buffered broadcast/multicast frame(s)\n");
610 sc
->ps_flags
|= PS_WAIT_FOR_CAB
| PS_WAIT_FOR_BEACON
;
614 if (sc
->ps_flags
& PS_WAIT_FOR_CAB
) {
616 * This can happen if a broadcast frame is dropped or the AP
617 * fails to send a frame indicating that all CAB frames have
620 sc
->ps_flags
&= ~PS_WAIT_FOR_CAB
;
621 ath_dbg(common
, ATH_DBG_PS
,
622 "PS wait for CAB frames timed out\n");
626 static void ath_rx_ps(struct ath_softc
*sc
, struct sk_buff
*skb
, bool mybeacon
)
628 struct ieee80211_hdr
*hdr
;
629 struct ath_common
*common
= ath9k_hw_common(sc
->sc_ah
);
631 hdr
= (struct ieee80211_hdr
*)skb
->data
;
633 /* Process Beacon and CAB receive in PS state */
634 if (((sc
->ps_flags
& PS_WAIT_FOR_BEACON
) || ath9k_check_auto_sleep(sc
))
636 ath_rx_ps_beacon(sc
, skb
);
637 else if ((sc
->ps_flags
& PS_WAIT_FOR_CAB
) &&
638 (ieee80211_is_data(hdr
->frame_control
) ||
639 ieee80211_is_action(hdr
->frame_control
)) &&
640 is_multicast_ether_addr(hdr
->addr1
) &&
641 !ieee80211_has_moredata(hdr
->frame_control
)) {
643 * No more broadcast/multicast frames to be received at this
646 sc
->ps_flags
&= ~(PS_WAIT_FOR_CAB
| PS_WAIT_FOR_BEACON
);
647 ath_dbg(common
, ATH_DBG_PS
,
648 "All PS CAB frames received, back to sleep\n");
649 } else if ((sc
->ps_flags
& PS_WAIT_FOR_PSPOLL_DATA
) &&
650 !is_multicast_ether_addr(hdr
->addr1
) &&
651 !ieee80211_has_morefrags(hdr
->frame_control
)) {
652 sc
->ps_flags
&= ~PS_WAIT_FOR_PSPOLL_DATA
;
653 ath_dbg(common
, ATH_DBG_PS
,
654 "Going back to sleep after having received PS-Poll data (0x%lx)\n",
655 sc
->ps_flags
& (PS_WAIT_FOR_BEACON
|
657 PS_WAIT_FOR_PSPOLL_DATA
|
658 PS_WAIT_FOR_TX_ACK
));
662 static bool ath_edma_get_buffers(struct ath_softc
*sc
,
663 enum ath9k_rx_qtype qtype
)
665 struct ath_rx_edma
*rx_edma
= &sc
->rx
.rx_edma
[qtype
];
666 struct ath_hw
*ah
= sc
->sc_ah
;
667 struct ath_common
*common
= ath9k_hw_common(ah
);
672 skb
= skb_peek(&rx_edma
->rx_fifo
);
676 bf
= SKB_CB_ATHBUF(skb
);
679 dma_sync_single_for_cpu(sc
->dev
, bf
->bf_buf_addr
,
680 common
->rx_bufsize
, DMA_FROM_DEVICE
);
682 ret
= ath9k_hw_process_rxdesc_edma(ah
, NULL
, skb
->data
);
683 if (ret
== -EINPROGRESS
) {
684 /*let device gain the buffer again*/
685 dma_sync_single_for_device(sc
->dev
, bf
->bf_buf_addr
,
686 common
->rx_bufsize
, DMA_FROM_DEVICE
);
690 __skb_unlink(skb
, &rx_edma
->rx_fifo
);
691 if (ret
== -EINVAL
) {
692 /* corrupt descriptor, skip this one and the following one */
693 list_add_tail(&bf
->list
, &sc
->rx
.rxbuf
);
694 ath_rx_edma_buf_link(sc
, qtype
);
695 skb
= skb_peek(&rx_edma
->rx_fifo
);
699 bf
= SKB_CB_ATHBUF(skb
);
702 __skb_unlink(skb
, &rx_edma
->rx_fifo
);
703 list_add_tail(&bf
->list
, &sc
->rx
.rxbuf
);
704 ath_rx_edma_buf_link(sc
, qtype
);
707 skb_queue_tail(&rx_edma
->rx_buffers
, skb
);
712 static struct ath_buf
*ath_edma_get_next_rx_buf(struct ath_softc
*sc
,
713 struct ath_rx_status
*rs
,
714 enum ath9k_rx_qtype qtype
)
716 struct ath_rx_edma
*rx_edma
= &sc
->rx
.rx_edma
[qtype
];
720 while (ath_edma_get_buffers(sc
, qtype
));
721 skb
= __skb_dequeue(&rx_edma
->rx_buffers
);
725 bf
= SKB_CB_ATHBUF(skb
);
726 ath9k_hw_process_rxdesc_edma(sc
->sc_ah
, rs
, skb
->data
);
730 static struct ath_buf
*ath_get_next_rx_buf(struct ath_softc
*sc
,
731 struct ath_rx_status
*rs
)
733 struct ath_hw
*ah
= sc
->sc_ah
;
734 struct ath_common
*common
= ath9k_hw_common(ah
);
739 if (list_empty(&sc
->rx
.rxbuf
)) {
740 sc
->rx
.rxlink
= NULL
;
744 bf
= list_first_entry(&sc
->rx
.rxbuf
, struct ath_buf
, list
);
748 * Must provide the virtual address of the current
749 * descriptor, the physical address, and the virtual
750 * address of the next descriptor in the h/w chain.
751 * This allows the HAL to look ahead to see if the
752 * hardware is done with a descriptor by checking the
753 * done bit in the following descriptor and the address
754 * of the current descriptor the DMA engine is working
755 * on. All this is necessary because of our use of
756 * a self-linked list to avoid rx overruns.
758 ret
= ath9k_hw_rxprocdesc(ah
, ds
, rs
);
759 if (ret
== -EINPROGRESS
) {
760 struct ath_rx_status trs
;
762 struct ath_desc
*tds
;
764 memset(&trs
, 0, sizeof(trs
));
765 if (list_is_last(&bf
->list
, &sc
->rx
.rxbuf
)) {
766 sc
->rx
.rxlink
= NULL
;
770 tbf
= list_entry(bf
->list
.next
, struct ath_buf
, list
);
773 * On some hardware the descriptor status words could
774 * get corrupted, including the done bit. Because of
775 * this, check if the next descriptor's done bit is
778 * If the next descriptor's done bit is set, the current
779 * descriptor has been corrupted. Force s/w to discard
780 * this descriptor and continue...
784 ret
= ath9k_hw_rxprocdesc(ah
, tds
, &trs
);
785 if (ret
== -EINPROGRESS
)
793 * Synchronize the DMA transfer with CPU before
794 * 1. accessing the frame
795 * 2. requeueing the same buffer to h/w
797 dma_sync_single_for_cpu(sc
->dev
, bf
->bf_buf_addr
,
804 /* Assumes you've already done the endian to CPU conversion */
805 static bool ath9k_rx_accept(struct ath_common
*common
,
806 struct ieee80211_hdr
*hdr
,
807 struct ieee80211_rx_status
*rxs
,
808 struct ath_rx_status
*rx_stats
,
811 bool is_mc
, is_valid_tkip
, strip_mic
, mic_error
;
812 struct ath_hw
*ah
= common
->ah
;
814 u8 rx_status_len
= ah
->caps
.rx_status_len
;
816 fc
= hdr
->frame_control
;
818 is_mc
= !!is_multicast_ether_addr(hdr
->addr1
);
819 is_valid_tkip
= rx_stats
->rs_keyix
!= ATH9K_RXKEYIX_INVALID
&&
820 test_bit(rx_stats
->rs_keyix
, common
->tkip_keymap
);
821 strip_mic
= is_valid_tkip
&& ieee80211_is_data(fc
) &&
822 !(rx_stats
->rs_status
&
823 (ATH9K_RXERR_DECRYPT
| ATH9K_RXERR_CRC
| ATH9K_RXERR_MIC
|
824 ATH9K_RXERR_KEYMISS
));
826 if (!rx_stats
->rs_datalen
)
829 * rs_status follows rs_datalen so if rs_datalen is too large
830 * we can take a hint that hardware corrupted it, so ignore
833 if (rx_stats
->rs_datalen
> (common
->rx_bufsize
- rx_status_len
))
836 /* Only use error bits from the last fragment */
837 if (rx_stats
->rs_more
)
840 mic_error
= is_valid_tkip
&& !ieee80211_is_ctl(fc
) &&
841 !ieee80211_has_morefrags(fc
) &&
842 !(le16_to_cpu(hdr
->seq_ctrl
) & IEEE80211_SCTL_FRAG
) &&
843 (rx_stats
->rs_status
& ATH9K_RXERR_MIC
);
846 * The rx_stats->rs_status will not be set until the end of the
847 * chained descriptors so it can be ignored if rs_more is set. The
848 * rs_more will be false at the last element of the chained
851 if (rx_stats
->rs_status
!= 0) {
854 if (rx_stats
->rs_status
& ATH9K_RXERR_CRC
) {
855 rxs
->flag
|= RX_FLAG_FAILED_FCS_CRC
;
858 if (rx_stats
->rs_status
& ATH9K_RXERR_PHY
)
861 if ((rx_stats
->rs_status
& ATH9K_RXERR_DECRYPT
) ||
862 (!is_mc
&& (rx_stats
->rs_status
& ATH9K_RXERR_KEYMISS
))) {
863 *decrypt_error
= true;
868 * Reject error frames with the exception of
869 * decryption and MIC failures. For monitor mode,
870 * we also ignore the CRC error.
872 status_mask
= ATH9K_RXERR_DECRYPT
| ATH9K_RXERR_MIC
|
875 if (ah
->is_monitoring
)
876 status_mask
|= ATH9K_RXERR_CRC
;
878 if (rx_stats
->rs_status
& ~status_mask
)
883 * For unicast frames the MIC error bit can have false positives,
884 * so all MIC error reports need to be validated in software.
885 * False negatives are not common, so skip software verification
886 * if the hardware considers the MIC valid.
889 rxs
->flag
|= RX_FLAG_MMIC_STRIPPED
;
890 else if (is_mc
&& mic_error
)
891 rxs
->flag
|= RX_FLAG_MMIC_ERROR
;
896 static int ath9k_process_rate(struct ath_common
*common
,
897 struct ieee80211_hw
*hw
,
898 struct ath_rx_status
*rx_stats
,
899 struct ieee80211_rx_status
*rxs
)
901 struct ieee80211_supported_band
*sband
;
902 enum ieee80211_band band
;
905 band
= hw
->conf
.channel
->band
;
906 sband
= hw
->wiphy
->bands
[band
];
908 if (rx_stats
->rs_rate
& 0x80) {
910 rxs
->flag
|= RX_FLAG_HT
;
911 if (rx_stats
->rs_flags
& ATH9K_RX_2040
)
912 rxs
->flag
|= RX_FLAG_40MHZ
;
913 if (rx_stats
->rs_flags
& ATH9K_RX_GI
)
914 rxs
->flag
|= RX_FLAG_SHORT_GI
;
915 rxs
->rate_idx
= rx_stats
->rs_rate
& 0x7f;
919 for (i
= 0; i
< sband
->n_bitrates
; i
++) {
920 if (sband
->bitrates
[i
].hw_value
== rx_stats
->rs_rate
) {
924 if (sband
->bitrates
[i
].hw_value_short
== rx_stats
->rs_rate
) {
925 rxs
->flag
|= RX_FLAG_SHORTPRE
;
932 * No valid hardware bitrate found -- we should not get here
933 * because hardware has already validated this frame as OK.
935 ath_dbg(common
, ATH_DBG_ANY
,
936 "unsupported hw bitrate detected 0x%02x using 1 Mbit\n",
942 static void ath9k_process_rssi(struct ath_common
*common
,
943 struct ieee80211_hw
*hw
,
944 struct ieee80211_hdr
*hdr
,
945 struct ath_rx_status
*rx_stats
)
947 struct ath_softc
*sc
= hw
->priv
;
948 struct ath_hw
*ah
= common
->ah
;
951 if (!rx_stats
->is_mybeacon
||
952 ((ah
->opmode
!= NL80211_IFTYPE_STATION
) &&
953 (ah
->opmode
!= NL80211_IFTYPE_ADHOC
)))
956 if (rx_stats
->rs_rssi
!= ATH9K_RSSI_BAD
&& !rx_stats
->rs_moreaggr
)
957 ATH_RSSI_LPF(sc
->last_rssi
, rx_stats
->rs_rssi
);
959 last_rssi
= sc
->last_rssi
;
960 if (likely(last_rssi
!= ATH_RSSI_DUMMY_MARKER
))
961 rx_stats
->rs_rssi
= ATH_EP_RND(last_rssi
,
962 ATH_RSSI_EP_MULTIPLIER
);
963 if (rx_stats
->rs_rssi
< 0)
964 rx_stats
->rs_rssi
= 0;
966 /* Update Beacon RSSI, this is used by ANI. */
967 ah
->stats
.avgbrssi
= rx_stats
->rs_rssi
;
971 * For Decrypt or Demic errors, we only mark packet status here and always push
972 * up the frame up to let mac80211 handle the actual error case, be it no
973 * decryption key or real decryption error. This let us keep statistics there.
975 static int ath9k_rx_skb_preprocess(struct ath_common
*common
,
976 struct ieee80211_hw
*hw
,
977 struct ieee80211_hdr
*hdr
,
978 struct ath_rx_status
*rx_stats
,
979 struct ieee80211_rx_status
*rx_status
,
982 struct ath_hw
*ah
= common
->ah
;
984 memset(rx_status
, 0, sizeof(struct ieee80211_rx_status
));
987 * everything but the rate is checked here, the rate check is done
988 * separately to avoid doing two lookups for a rate for each frame.
990 if (!ath9k_rx_accept(common
, hdr
, rx_status
, rx_stats
, decrypt_error
))
993 /* Only use status info from the last fragment */
994 if (rx_stats
->rs_more
)
997 ath9k_process_rssi(common
, hw
, hdr
, rx_stats
);
999 if (ath9k_process_rate(common
, hw
, rx_stats
, rx_status
))
1002 rx_status
->band
= hw
->conf
.channel
->band
;
1003 rx_status
->freq
= hw
->conf
.channel
->center_freq
;
1004 rx_status
->signal
= ah
->noise
+ rx_stats
->rs_rssi
;
1005 rx_status
->antenna
= rx_stats
->rs_antenna
;
1006 rx_status
->flag
|= RX_FLAG_MACTIME_MPDU
;
1011 static void ath9k_rx_skb_postprocess(struct ath_common
*common
,
1012 struct sk_buff
*skb
,
1013 struct ath_rx_status
*rx_stats
,
1014 struct ieee80211_rx_status
*rxs
,
1017 struct ath_hw
*ah
= common
->ah
;
1018 struct ieee80211_hdr
*hdr
;
1019 int hdrlen
, padpos
, padsize
;
1023 /* see if any padding is done by the hw and remove it */
1024 hdr
= (struct ieee80211_hdr
*) skb
->data
;
1025 hdrlen
= ieee80211_get_hdrlen_from_skb(skb
);
1026 fc
= hdr
->frame_control
;
1027 padpos
= ath9k_cmn_padpos(hdr
->frame_control
);
1029 /* The MAC header is padded to have 32-bit boundary if the
1030 * packet payload is non-zero. The general calculation for
1031 * padsize would take into account odd header lengths:
1032 * padsize = (4 - padpos % 4) % 4; However, since only
1033 * even-length headers are used, padding can only be 0 or 2
1034 * bytes and we can optimize this a bit. In addition, we must
1035 * not try to remove padding from short control frames that do
1036 * not have payload. */
1037 padsize
= padpos
& 3;
1038 if (padsize
&& skb
->len
>=padpos
+padsize
+FCS_LEN
) {
1039 memmove(skb
->data
+ padsize
, skb
->data
, padpos
);
1040 skb_pull(skb
, padsize
);
1043 keyix
= rx_stats
->rs_keyix
;
1045 if (!(keyix
== ATH9K_RXKEYIX_INVALID
) && !decrypt_error
&&
1046 ieee80211_has_protected(fc
)) {
1047 rxs
->flag
|= RX_FLAG_DECRYPTED
;
1048 } else if (ieee80211_has_protected(fc
)
1049 && !decrypt_error
&& skb
->len
>= hdrlen
+ 4) {
1050 keyix
= skb
->data
[hdrlen
+ 3] >> 6;
1052 if (test_bit(keyix
, common
->keymap
))
1053 rxs
->flag
|= RX_FLAG_DECRYPTED
;
1055 if (ah
->sw_mgmt_crypto
&&
1056 (rxs
->flag
& RX_FLAG_DECRYPTED
) &&
1057 ieee80211_is_mgmt(fc
))
1058 /* Use software decrypt for management frames. */
1059 rxs
->flag
&= ~RX_FLAG_DECRYPTED
;
1062 static void ath_lnaconf_alt_good_scan(struct ath_ant_comb
*antcomb
,
1063 struct ath_hw_antcomb_conf ant_conf
,
1066 antcomb
->quick_scan_cnt
= 0;
1068 if (ant_conf
.main_lna_conf
== ATH_ANT_DIV_COMB_LNA2
)
1069 antcomb
->rssi_lna2
= main_rssi_avg
;
1070 else if (ant_conf
.main_lna_conf
== ATH_ANT_DIV_COMB_LNA1
)
1071 antcomb
->rssi_lna1
= main_rssi_avg
;
1073 switch ((ant_conf
.main_lna_conf
<< 4) | ant_conf
.alt_lna_conf
) {
1074 case 0x10: /* LNA2 A-B */
1075 antcomb
->main_conf
= ATH_ANT_DIV_COMB_LNA1_MINUS_LNA2
;
1076 antcomb
->first_quick_scan_conf
=
1077 ATH_ANT_DIV_COMB_LNA1_PLUS_LNA2
;
1078 antcomb
->second_quick_scan_conf
= ATH_ANT_DIV_COMB_LNA1
;
1080 case 0x20: /* LNA1 A-B */
1081 antcomb
->main_conf
= ATH_ANT_DIV_COMB_LNA1_MINUS_LNA2
;
1082 antcomb
->first_quick_scan_conf
=
1083 ATH_ANT_DIV_COMB_LNA1_PLUS_LNA2
;
1084 antcomb
->second_quick_scan_conf
= ATH_ANT_DIV_COMB_LNA2
;
1086 case 0x21: /* LNA1 LNA2 */
1087 antcomb
->main_conf
= ATH_ANT_DIV_COMB_LNA2
;
1088 antcomb
->first_quick_scan_conf
=
1089 ATH_ANT_DIV_COMB_LNA1_MINUS_LNA2
;
1090 antcomb
->second_quick_scan_conf
=
1091 ATH_ANT_DIV_COMB_LNA1_PLUS_LNA2
;
1093 case 0x12: /* LNA2 LNA1 */
1094 antcomb
->main_conf
= ATH_ANT_DIV_COMB_LNA1
;
1095 antcomb
->first_quick_scan_conf
=
1096 ATH_ANT_DIV_COMB_LNA1_MINUS_LNA2
;
1097 antcomb
->second_quick_scan_conf
=
1098 ATH_ANT_DIV_COMB_LNA1_PLUS_LNA2
;
1100 case 0x13: /* LNA2 A+B */
1101 antcomb
->main_conf
= ATH_ANT_DIV_COMB_LNA1_PLUS_LNA2
;
1102 antcomb
->first_quick_scan_conf
=
1103 ATH_ANT_DIV_COMB_LNA1_MINUS_LNA2
;
1104 antcomb
->second_quick_scan_conf
= ATH_ANT_DIV_COMB_LNA1
;
1106 case 0x23: /* LNA1 A+B */
1107 antcomb
->main_conf
= ATH_ANT_DIV_COMB_LNA1_PLUS_LNA2
;
1108 antcomb
->first_quick_scan_conf
=
1109 ATH_ANT_DIV_COMB_LNA1_MINUS_LNA2
;
1110 antcomb
->second_quick_scan_conf
= ATH_ANT_DIV_COMB_LNA2
;
1117 static void ath_select_ant_div_from_quick_scan(struct ath_ant_comb
*antcomb
,
1118 struct ath_hw_antcomb_conf
*div_ant_conf
,
1119 int main_rssi_avg
, int alt_rssi_avg
,
1123 switch (antcomb
->quick_scan_cnt
) {
1125 /* set alt to main, and alt to first conf */
1126 div_ant_conf
->main_lna_conf
= antcomb
->main_conf
;
1127 div_ant_conf
->alt_lna_conf
= antcomb
->first_quick_scan_conf
;
1130 /* set alt to main, and alt to first conf */
1131 div_ant_conf
->main_lna_conf
= antcomb
->main_conf
;
1132 div_ant_conf
->alt_lna_conf
= antcomb
->second_quick_scan_conf
;
1133 antcomb
->rssi_first
= main_rssi_avg
;
1134 antcomb
->rssi_second
= alt_rssi_avg
;
1136 if (antcomb
->main_conf
== ATH_ANT_DIV_COMB_LNA1
) {
1138 if (ath_is_alt_ant_ratio_better(alt_ratio
,
1139 ATH_ANT_DIV_COMB_LNA1_DELTA_HI
,
1140 ATH_ANT_DIV_COMB_LNA1_DELTA_LOW
,
1141 main_rssi_avg
, alt_rssi_avg
,
1142 antcomb
->total_pkt_count
))
1143 antcomb
->first_ratio
= true;
1145 antcomb
->first_ratio
= false;
1146 } else if (antcomb
->main_conf
== ATH_ANT_DIV_COMB_LNA2
) {
1147 if (ath_is_alt_ant_ratio_better(alt_ratio
,
1148 ATH_ANT_DIV_COMB_LNA1_DELTA_MID
,
1149 ATH_ANT_DIV_COMB_LNA1_DELTA_LOW
,
1150 main_rssi_avg
, alt_rssi_avg
,
1151 antcomb
->total_pkt_count
))
1152 antcomb
->first_ratio
= true;
1154 antcomb
->first_ratio
= false;
1156 if ((((alt_ratio
>= ATH_ANT_DIV_COMB_ALT_ANT_RATIO2
) &&
1157 (alt_rssi_avg
> main_rssi_avg
+
1158 ATH_ANT_DIV_COMB_LNA1_DELTA_HI
)) ||
1159 (alt_rssi_avg
> main_rssi_avg
)) &&
1160 (antcomb
->total_pkt_count
> 50))
1161 antcomb
->first_ratio
= true;
1163 antcomb
->first_ratio
= false;
1167 antcomb
->alt_good
= false;
1168 antcomb
->scan_not_start
= false;
1169 antcomb
->scan
= false;
1170 antcomb
->rssi_first
= main_rssi_avg
;
1171 antcomb
->rssi_third
= alt_rssi_avg
;
1173 if (antcomb
->second_quick_scan_conf
== ATH_ANT_DIV_COMB_LNA1
)
1174 antcomb
->rssi_lna1
= alt_rssi_avg
;
1175 else if (antcomb
->second_quick_scan_conf
==
1176 ATH_ANT_DIV_COMB_LNA2
)
1177 antcomb
->rssi_lna2
= alt_rssi_avg
;
1178 else if (antcomb
->second_quick_scan_conf
==
1179 ATH_ANT_DIV_COMB_LNA1_PLUS_LNA2
) {
1180 if (antcomb
->main_conf
== ATH_ANT_DIV_COMB_LNA2
)
1181 antcomb
->rssi_lna2
= main_rssi_avg
;
1182 else if (antcomb
->main_conf
== ATH_ANT_DIV_COMB_LNA1
)
1183 antcomb
->rssi_lna1
= main_rssi_avg
;
1186 if (antcomb
->rssi_lna2
> antcomb
->rssi_lna1
+
1187 ATH_ANT_DIV_COMB_LNA1_LNA2_SWITCH_DELTA
)
1188 div_ant_conf
->main_lna_conf
= ATH_ANT_DIV_COMB_LNA2
;
1190 div_ant_conf
->main_lna_conf
= ATH_ANT_DIV_COMB_LNA1
;
1192 if (antcomb
->main_conf
== ATH_ANT_DIV_COMB_LNA1
) {
1193 if (ath_is_alt_ant_ratio_better(alt_ratio
,
1194 ATH_ANT_DIV_COMB_LNA1_DELTA_HI
,
1195 ATH_ANT_DIV_COMB_LNA1_DELTA_LOW
,
1196 main_rssi_avg
, alt_rssi_avg
,
1197 antcomb
->total_pkt_count
))
1198 antcomb
->second_ratio
= true;
1200 antcomb
->second_ratio
= false;
1201 } else if (antcomb
->main_conf
== ATH_ANT_DIV_COMB_LNA2
) {
1202 if (ath_is_alt_ant_ratio_better(alt_ratio
,
1203 ATH_ANT_DIV_COMB_LNA1_DELTA_MID
,
1204 ATH_ANT_DIV_COMB_LNA1_DELTA_LOW
,
1205 main_rssi_avg
, alt_rssi_avg
,
1206 antcomb
->total_pkt_count
))
1207 antcomb
->second_ratio
= true;
1209 antcomb
->second_ratio
= false;
1211 if ((((alt_ratio
>= ATH_ANT_DIV_COMB_ALT_ANT_RATIO2
) &&
1212 (alt_rssi_avg
> main_rssi_avg
+
1213 ATH_ANT_DIV_COMB_LNA1_DELTA_HI
)) ||
1214 (alt_rssi_avg
> main_rssi_avg
)) &&
1215 (antcomb
->total_pkt_count
> 50))
1216 antcomb
->second_ratio
= true;
1218 antcomb
->second_ratio
= false;
1221 /* set alt to the conf with maximun ratio */
1222 if (antcomb
->first_ratio
&& antcomb
->second_ratio
) {
1223 if (antcomb
->rssi_second
> antcomb
->rssi_third
) {
1225 if ((antcomb
->first_quick_scan_conf
==
1226 ATH_ANT_DIV_COMB_LNA1
) ||
1227 (antcomb
->first_quick_scan_conf
==
1228 ATH_ANT_DIV_COMB_LNA2
))
1229 /* Set alt LNA1 or LNA2*/
1230 if (div_ant_conf
->main_lna_conf
==
1231 ATH_ANT_DIV_COMB_LNA2
)
1232 div_ant_conf
->alt_lna_conf
=
1233 ATH_ANT_DIV_COMB_LNA1
;
1235 div_ant_conf
->alt_lna_conf
=
1236 ATH_ANT_DIV_COMB_LNA2
;
1238 /* Set alt to A+B or A-B */
1239 div_ant_conf
->alt_lna_conf
=
1240 antcomb
->first_quick_scan_conf
;
1241 } else if ((antcomb
->second_quick_scan_conf
==
1242 ATH_ANT_DIV_COMB_LNA1
) ||
1243 (antcomb
->second_quick_scan_conf
==
1244 ATH_ANT_DIV_COMB_LNA2
)) {
1245 /* Set alt LNA1 or LNA2 */
1246 if (div_ant_conf
->main_lna_conf
==
1247 ATH_ANT_DIV_COMB_LNA2
)
1248 div_ant_conf
->alt_lna_conf
=
1249 ATH_ANT_DIV_COMB_LNA1
;
1251 div_ant_conf
->alt_lna_conf
=
1252 ATH_ANT_DIV_COMB_LNA2
;
1254 /* Set alt to A+B or A-B */
1255 div_ant_conf
->alt_lna_conf
=
1256 antcomb
->second_quick_scan_conf
;
1258 } else if (antcomb
->first_ratio
) {
1260 if ((antcomb
->first_quick_scan_conf
==
1261 ATH_ANT_DIV_COMB_LNA1
) ||
1262 (antcomb
->first_quick_scan_conf
==
1263 ATH_ANT_DIV_COMB_LNA2
))
1264 /* Set alt LNA1 or LNA2 */
1265 if (div_ant_conf
->main_lna_conf
==
1266 ATH_ANT_DIV_COMB_LNA2
)
1267 div_ant_conf
->alt_lna_conf
=
1268 ATH_ANT_DIV_COMB_LNA1
;
1270 div_ant_conf
->alt_lna_conf
=
1271 ATH_ANT_DIV_COMB_LNA2
;
1273 /* Set alt to A+B or A-B */
1274 div_ant_conf
->alt_lna_conf
=
1275 antcomb
->first_quick_scan_conf
;
1276 } else if (antcomb
->second_ratio
) {
1278 if ((antcomb
->second_quick_scan_conf
==
1279 ATH_ANT_DIV_COMB_LNA1
) ||
1280 (antcomb
->second_quick_scan_conf
==
1281 ATH_ANT_DIV_COMB_LNA2
))
1282 /* Set alt LNA1 or LNA2 */
1283 if (div_ant_conf
->main_lna_conf
==
1284 ATH_ANT_DIV_COMB_LNA2
)
1285 div_ant_conf
->alt_lna_conf
=
1286 ATH_ANT_DIV_COMB_LNA1
;
1288 div_ant_conf
->alt_lna_conf
=
1289 ATH_ANT_DIV_COMB_LNA2
;
1291 /* Set alt to A+B or A-B */
1292 div_ant_conf
->alt_lna_conf
=
1293 antcomb
->second_quick_scan_conf
;
1295 /* main is largest */
1296 if ((antcomb
->main_conf
== ATH_ANT_DIV_COMB_LNA1
) ||
1297 (antcomb
->main_conf
== ATH_ANT_DIV_COMB_LNA2
))
1298 /* Set alt LNA1 or LNA2 */
1299 if (div_ant_conf
->main_lna_conf
==
1300 ATH_ANT_DIV_COMB_LNA2
)
1301 div_ant_conf
->alt_lna_conf
=
1302 ATH_ANT_DIV_COMB_LNA1
;
1304 div_ant_conf
->alt_lna_conf
=
1305 ATH_ANT_DIV_COMB_LNA2
;
1307 /* Set alt to A+B or A-B */
1308 div_ant_conf
->alt_lna_conf
= antcomb
->main_conf
;
1316 static void ath_ant_div_conf_fast_divbias(struct ath_hw_antcomb_conf
*ant_conf
,
1317 struct ath_ant_comb
*antcomb
, int alt_ratio
)
1319 if (ant_conf
->div_group
== 0) {
1320 /* Adjust the fast_div_bias based on main and alt lna conf */
1321 switch ((ant_conf
->main_lna_conf
<< 4) |
1322 ant_conf
->alt_lna_conf
) {
1323 case 0x01: /* A-B LNA2 */
1324 ant_conf
->fast_div_bias
= 0x3b;
1326 case 0x02: /* A-B LNA1 */
1327 ant_conf
->fast_div_bias
= 0x3d;
1329 case 0x03: /* A-B A+B */
1330 ant_conf
->fast_div_bias
= 0x1;
1332 case 0x10: /* LNA2 A-B */
1333 ant_conf
->fast_div_bias
= 0x7;
1335 case 0x12: /* LNA2 LNA1 */
1336 ant_conf
->fast_div_bias
= 0x2;
1338 case 0x13: /* LNA2 A+B */
1339 ant_conf
->fast_div_bias
= 0x7;
1341 case 0x20: /* LNA1 A-B */
1342 ant_conf
->fast_div_bias
= 0x6;
1344 case 0x21: /* LNA1 LNA2 */
1345 ant_conf
->fast_div_bias
= 0x0;
1347 case 0x23: /* LNA1 A+B */
1348 ant_conf
->fast_div_bias
= 0x6;
1350 case 0x30: /* A+B A-B */
1351 ant_conf
->fast_div_bias
= 0x1;
1353 case 0x31: /* A+B LNA2 */
1354 ant_conf
->fast_div_bias
= 0x3b;
1356 case 0x32: /* A+B LNA1 */
1357 ant_conf
->fast_div_bias
= 0x3d;
1362 } else if (ant_conf
->div_group
== 1) {
1363 /* Adjust the fast_div_bias based on main and alt_lna_conf */
1364 switch ((ant_conf
->main_lna_conf
<< 4) |
1365 ant_conf
->alt_lna_conf
) {
1366 case 0x01: /* A-B LNA2 */
1367 ant_conf
->fast_div_bias
= 0x1;
1368 ant_conf
->main_gaintb
= 0;
1369 ant_conf
->alt_gaintb
= 0;
1371 case 0x02: /* A-B LNA1 */
1372 ant_conf
->fast_div_bias
= 0x1;
1373 ant_conf
->main_gaintb
= 0;
1374 ant_conf
->alt_gaintb
= 0;
1376 case 0x03: /* A-B A+B */
1377 ant_conf
->fast_div_bias
= 0x1;
1378 ant_conf
->main_gaintb
= 0;
1379 ant_conf
->alt_gaintb
= 0;
1381 case 0x10: /* LNA2 A-B */
1382 if (!(antcomb
->scan
) &&
1383 (alt_ratio
> ATH_ANT_DIV_COMB_ALT_ANT_RATIO
))
1384 ant_conf
->fast_div_bias
= 0x3f;
1386 ant_conf
->fast_div_bias
= 0x1;
1387 ant_conf
->main_gaintb
= 0;
1388 ant_conf
->alt_gaintb
= 0;
1390 case 0x12: /* LNA2 LNA1 */
1391 ant_conf
->fast_div_bias
= 0x1;
1392 ant_conf
->main_gaintb
= 0;
1393 ant_conf
->alt_gaintb
= 0;
1395 case 0x13: /* LNA2 A+B */
1396 if (!(antcomb
->scan
) &&
1397 (alt_ratio
> ATH_ANT_DIV_COMB_ALT_ANT_RATIO
))
1398 ant_conf
->fast_div_bias
= 0x3f;
1400 ant_conf
->fast_div_bias
= 0x1;
1401 ant_conf
->main_gaintb
= 0;
1402 ant_conf
->alt_gaintb
= 0;
1404 case 0x20: /* LNA1 A-B */
1405 if (!(antcomb
->scan
) &&
1406 (alt_ratio
> ATH_ANT_DIV_COMB_ALT_ANT_RATIO
))
1407 ant_conf
->fast_div_bias
= 0x3f;
1409 ant_conf
->fast_div_bias
= 0x1;
1410 ant_conf
->main_gaintb
= 0;
1411 ant_conf
->alt_gaintb
= 0;
1413 case 0x21: /* LNA1 LNA2 */
1414 ant_conf
->fast_div_bias
= 0x1;
1415 ant_conf
->main_gaintb
= 0;
1416 ant_conf
->alt_gaintb
= 0;
1418 case 0x23: /* LNA1 A+B */
1419 if (!(antcomb
->scan
) &&
1420 (alt_ratio
> ATH_ANT_DIV_COMB_ALT_ANT_RATIO
))
1421 ant_conf
->fast_div_bias
= 0x3f;
1423 ant_conf
->fast_div_bias
= 0x1;
1424 ant_conf
->main_gaintb
= 0;
1425 ant_conf
->alt_gaintb
= 0;
1427 case 0x30: /* A+B A-B */
1428 ant_conf
->fast_div_bias
= 0x1;
1429 ant_conf
->main_gaintb
= 0;
1430 ant_conf
->alt_gaintb
= 0;
1432 case 0x31: /* A+B LNA2 */
1433 ant_conf
->fast_div_bias
= 0x1;
1434 ant_conf
->main_gaintb
= 0;
1435 ant_conf
->alt_gaintb
= 0;
1437 case 0x32: /* A+B LNA1 */
1438 ant_conf
->fast_div_bias
= 0x1;
1439 ant_conf
->main_gaintb
= 0;
1440 ant_conf
->alt_gaintb
= 0;
1445 } else if (ant_conf
->div_group
== 2) {
1446 /* Adjust the fast_div_bias based on main and alt_lna_conf */
1447 switch ((ant_conf
->main_lna_conf
<< 4) |
1448 ant_conf
->alt_lna_conf
) {
1449 case 0x01: /* A-B LNA2 */
1450 ant_conf
->fast_div_bias
= 0x1;
1451 ant_conf
->main_gaintb
= 0;
1452 ant_conf
->alt_gaintb
= 0;
1454 case 0x02: /* A-B LNA1 */
1455 ant_conf
->fast_div_bias
= 0x1;
1456 ant_conf
->main_gaintb
= 0;
1457 ant_conf
->alt_gaintb
= 0;
1459 case 0x03: /* A-B A+B */
1460 ant_conf
->fast_div_bias
= 0x1;
1461 ant_conf
->main_gaintb
= 0;
1462 ant_conf
->alt_gaintb
= 0;
1464 case 0x10: /* LNA2 A-B */
1465 if (!(antcomb
->scan
) &&
1466 (alt_ratio
> ATH_ANT_DIV_COMB_ALT_ANT_RATIO
))
1467 ant_conf
->fast_div_bias
= 0x1;
1469 ant_conf
->fast_div_bias
= 0x2;
1470 ant_conf
->main_gaintb
= 0;
1471 ant_conf
->alt_gaintb
= 0;
1473 case 0x12: /* LNA2 LNA1 */
1474 ant_conf
->fast_div_bias
= 0x1;
1475 ant_conf
->main_gaintb
= 0;
1476 ant_conf
->alt_gaintb
= 0;
1478 case 0x13: /* LNA2 A+B */
1479 if (!(antcomb
->scan
) &&
1480 (alt_ratio
> ATH_ANT_DIV_COMB_ALT_ANT_RATIO
))
1481 ant_conf
->fast_div_bias
= 0x1;
1483 ant_conf
->fast_div_bias
= 0x2;
1484 ant_conf
->main_gaintb
= 0;
1485 ant_conf
->alt_gaintb
= 0;
1487 case 0x20: /* LNA1 A-B */
1488 if (!(antcomb
->scan
) &&
1489 (alt_ratio
> ATH_ANT_DIV_COMB_ALT_ANT_RATIO
))
1490 ant_conf
->fast_div_bias
= 0x1;
1492 ant_conf
->fast_div_bias
= 0x2;
1493 ant_conf
->main_gaintb
= 0;
1494 ant_conf
->alt_gaintb
= 0;
1496 case 0x21: /* LNA1 LNA2 */
1497 ant_conf
->fast_div_bias
= 0x1;
1498 ant_conf
->main_gaintb
= 0;
1499 ant_conf
->alt_gaintb
= 0;
1501 case 0x23: /* LNA1 A+B */
1502 if (!(antcomb
->scan
) &&
1503 (alt_ratio
> ATH_ANT_DIV_COMB_ALT_ANT_RATIO
))
1504 ant_conf
->fast_div_bias
= 0x1;
1506 ant_conf
->fast_div_bias
= 0x2;
1507 ant_conf
->main_gaintb
= 0;
1508 ant_conf
->alt_gaintb
= 0;
1510 case 0x30: /* A+B A-B */
1511 ant_conf
->fast_div_bias
= 0x1;
1512 ant_conf
->main_gaintb
= 0;
1513 ant_conf
->alt_gaintb
= 0;
1515 case 0x31: /* A+B LNA2 */
1516 ant_conf
->fast_div_bias
= 0x1;
1517 ant_conf
->main_gaintb
= 0;
1518 ant_conf
->alt_gaintb
= 0;
1520 case 0x32: /* A+B LNA1 */
1521 ant_conf
->fast_div_bias
= 0x1;
1522 ant_conf
->main_gaintb
= 0;
1523 ant_conf
->alt_gaintb
= 0;
1531 /* Antenna diversity and combining */
1532 static void ath_ant_comb_scan(struct ath_softc
*sc
, struct ath_rx_status
*rs
)
1534 struct ath_hw_antcomb_conf div_ant_conf
;
1535 struct ath_ant_comb
*antcomb
= &sc
->ant_comb
;
1536 int alt_ratio
= 0, alt_rssi_avg
= 0, main_rssi_avg
= 0, curr_alt_set
;
1538 int main_rssi
= rs
->rs_rssi_ctl0
;
1539 int alt_rssi
= rs
->rs_rssi_ctl1
;
1540 int rx_ant_conf
, main_ant_conf
;
1541 bool short_scan
= false;
1543 rx_ant_conf
= (rs
->rs_rssi_ctl2
>> ATH_ANT_RX_CURRENT_SHIFT
) &
1545 main_ant_conf
= (rs
->rs_rssi_ctl2
>> ATH_ANT_RX_MAIN_SHIFT
) &
1548 /* Record packet only when both main_rssi and alt_rssi is positive */
1549 if (main_rssi
> 0 && alt_rssi
> 0) {
1550 antcomb
->total_pkt_count
++;
1551 antcomb
->main_total_rssi
+= main_rssi
;
1552 antcomb
->alt_total_rssi
+= alt_rssi
;
1553 if (main_ant_conf
== rx_ant_conf
)
1554 antcomb
->main_recv_cnt
++;
1556 antcomb
->alt_recv_cnt
++;
1559 /* Short scan check */
1560 if (antcomb
->scan
&& antcomb
->alt_good
) {
1561 if (time_after(jiffies
, antcomb
->scan_start_time
+
1562 msecs_to_jiffies(ATH_ANT_DIV_COMB_SHORT_SCAN_INTR
)))
1565 if (antcomb
->total_pkt_count
==
1566 ATH_ANT_DIV_COMB_SHORT_SCAN_PKTCOUNT
) {
1567 alt_ratio
= ((antcomb
->alt_recv_cnt
* 100) /
1568 antcomb
->total_pkt_count
);
1569 if (alt_ratio
< ATH_ANT_DIV_COMB_ALT_ANT_RATIO
)
1574 if (((antcomb
->total_pkt_count
< ATH_ANT_DIV_COMB_MAX_PKTCOUNT
) ||
1575 rs
->rs_moreaggr
) && !short_scan
)
1578 if (antcomb
->total_pkt_count
) {
1579 alt_ratio
= ((antcomb
->alt_recv_cnt
* 100) /
1580 antcomb
->total_pkt_count
);
1581 main_rssi_avg
= (antcomb
->main_total_rssi
/
1582 antcomb
->total_pkt_count
);
1583 alt_rssi_avg
= (antcomb
->alt_total_rssi
/
1584 antcomb
->total_pkt_count
);
1588 ath9k_hw_antdiv_comb_conf_get(sc
->sc_ah
, &div_ant_conf
);
1589 curr_alt_set
= div_ant_conf
.alt_lna_conf
;
1590 curr_main_set
= div_ant_conf
.main_lna_conf
;
1594 if (antcomb
->count
== ATH_ANT_DIV_COMB_MAX_COUNT
) {
1595 if (alt_ratio
> ATH_ANT_DIV_COMB_ALT_ANT_RATIO
) {
1596 ath_lnaconf_alt_good_scan(antcomb
, div_ant_conf
,
1598 antcomb
->alt_good
= true;
1600 antcomb
->alt_good
= false;
1604 antcomb
->scan
= true;
1605 antcomb
->scan_not_start
= true;
1608 if (!antcomb
->scan
) {
1609 if (ath_ant_div_comb_alt_check(div_ant_conf
.div_group
,
1610 alt_ratio
, curr_main_set
, curr_alt_set
,
1611 alt_rssi_avg
, main_rssi_avg
)) {
1612 if (curr_alt_set
== ATH_ANT_DIV_COMB_LNA2
) {
1613 /* Switch main and alt LNA */
1614 div_ant_conf
.main_lna_conf
=
1615 ATH_ANT_DIV_COMB_LNA2
;
1616 div_ant_conf
.alt_lna_conf
=
1617 ATH_ANT_DIV_COMB_LNA1
;
1618 } else if (curr_alt_set
== ATH_ANT_DIV_COMB_LNA1
) {
1619 div_ant_conf
.main_lna_conf
=
1620 ATH_ANT_DIV_COMB_LNA1
;
1621 div_ant_conf
.alt_lna_conf
=
1622 ATH_ANT_DIV_COMB_LNA2
;
1626 } else if ((curr_alt_set
!= ATH_ANT_DIV_COMB_LNA1
) &&
1627 (curr_alt_set
!= ATH_ANT_DIV_COMB_LNA2
)) {
1628 /* Set alt to another LNA */
1629 if (curr_main_set
== ATH_ANT_DIV_COMB_LNA2
)
1630 div_ant_conf
.alt_lna_conf
=
1631 ATH_ANT_DIV_COMB_LNA1
;
1632 else if (curr_main_set
== ATH_ANT_DIV_COMB_LNA1
)
1633 div_ant_conf
.alt_lna_conf
=
1634 ATH_ANT_DIV_COMB_LNA2
;
1639 if ((alt_rssi_avg
< (main_rssi_avg
+
1640 div_ant_conf
.lna1_lna2_delta
)))
1644 if (!antcomb
->scan_not_start
) {
1645 switch (curr_alt_set
) {
1646 case ATH_ANT_DIV_COMB_LNA2
:
1647 antcomb
->rssi_lna2
= alt_rssi_avg
;
1648 antcomb
->rssi_lna1
= main_rssi_avg
;
1649 antcomb
->scan
= true;
1651 div_ant_conf
.main_lna_conf
=
1652 ATH_ANT_DIV_COMB_LNA1
;
1653 div_ant_conf
.alt_lna_conf
=
1654 ATH_ANT_DIV_COMB_LNA1_PLUS_LNA2
;
1656 case ATH_ANT_DIV_COMB_LNA1
:
1657 antcomb
->rssi_lna1
= alt_rssi_avg
;
1658 antcomb
->rssi_lna2
= main_rssi_avg
;
1659 antcomb
->scan
= true;
1661 div_ant_conf
.main_lna_conf
= ATH_ANT_DIV_COMB_LNA2
;
1662 div_ant_conf
.alt_lna_conf
=
1663 ATH_ANT_DIV_COMB_LNA1_PLUS_LNA2
;
1665 case ATH_ANT_DIV_COMB_LNA1_PLUS_LNA2
:
1666 antcomb
->rssi_add
= alt_rssi_avg
;
1667 antcomb
->scan
= true;
1669 div_ant_conf
.alt_lna_conf
=
1670 ATH_ANT_DIV_COMB_LNA1_MINUS_LNA2
;
1672 case ATH_ANT_DIV_COMB_LNA1_MINUS_LNA2
:
1673 antcomb
->rssi_sub
= alt_rssi_avg
;
1674 antcomb
->scan
= false;
1675 if (antcomb
->rssi_lna2
>
1676 (antcomb
->rssi_lna1
+
1677 ATH_ANT_DIV_COMB_LNA1_LNA2_SWITCH_DELTA
)) {
1678 /* use LNA2 as main LNA */
1679 if ((antcomb
->rssi_add
> antcomb
->rssi_lna1
) &&
1680 (antcomb
->rssi_add
> antcomb
->rssi_sub
)) {
1682 div_ant_conf
.main_lna_conf
=
1683 ATH_ANT_DIV_COMB_LNA2
;
1684 div_ant_conf
.alt_lna_conf
=
1685 ATH_ANT_DIV_COMB_LNA1_PLUS_LNA2
;
1686 } else if (antcomb
->rssi_sub
>
1687 antcomb
->rssi_lna1
) {
1689 div_ant_conf
.main_lna_conf
=
1690 ATH_ANT_DIV_COMB_LNA2
;
1691 div_ant_conf
.alt_lna_conf
=
1692 ATH_ANT_DIV_COMB_LNA1_MINUS_LNA2
;
1695 div_ant_conf
.main_lna_conf
=
1696 ATH_ANT_DIV_COMB_LNA2
;
1697 div_ant_conf
.alt_lna_conf
=
1698 ATH_ANT_DIV_COMB_LNA1
;
1701 /* use LNA1 as main LNA */
1702 if ((antcomb
->rssi_add
> antcomb
->rssi_lna2
) &&
1703 (antcomb
->rssi_add
> antcomb
->rssi_sub
)) {
1705 div_ant_conf
.main_lna_conf
=
1706 ATH_ANT_DIV_COMB_LNA1
;
1707 div_ant_conf
.alt_lna_conf
=
1708 ATH_ANT_DIV_COMB_LNA1_PLUS_LNA2
;
1709 } else if (antcomb
->rssi_sub
>
1710 antcomb
->rssi_lna1
) {
1712 div_ant_conf
.main_lna_conf
=
1713 ATH_ANT_DIV_COMB_LNA1
;
1714 div_ant_conf
.alt_lna_conf
=
1715 ATH_ANT_DIV_COMB_LNA1_MINUS_LNA2
;
1718 div_ant_conf
.main_lna_conf
=
1719 ATH_ANT_DIV_COMB_LNA1
;
1720 div_ant_conf
.alt_lna_conf
=
1721 ATH_ANT_DIV_COMB_LNA2
;
1729 if (!antcomb
->alt_good
) {
1730 antcomb
->scan_not_start
= false;
1731 /* Set alt to another LNA */
1732 if (curr_main_set
== ATH_ANT_DIV_COMB_LNA2
) {
1733 div_ant_conf
.main_lna_conf
=
1734 ATH_ANT_DIV_COMB_LNA2
;
1735 div_ant_conf
.alt_lna_conf
=
1736 ATH_ANT_DIV_COMB_LNA1
;
1737 } else if (curr_main_set
== ATH_ANT_DIV_COMB_LNA1
) {
1738 div_ant_conf
.main_lna_conf
=
1739 ATH_ANT_DIV_COMB_LNA1
;
1740 div_ant_conf
.alt_lna_conf
=
1741 ATH_ANT_DIV_COMB_LNA2
;
1747 ath_select_ant_div_from_quick_scan(antcomb
, &div_ant_conf
,
1748 main_rssi_avg
, alt_rssi_avg
,
1751 antcomb
->quick_scan_cnt
++;
1754 ath_ant_div_conf_fast_divbias(&div_ant_conf
, antcomb
, alt_ratio
);
1755 ath9k_hw_antdiv_comb_conf_set(sc
->sc_ah
, &div_ant_conf
);
1757 antcomb
->scan_start_time
= jiffies
;
1758 antcomb
->total_pkt_count
= 0;
1759 antcomb
->main_total_rssi
= 0;
1760 antcomb
->alt_total_rssi
= 0;
1761 antcomb
->main_recv_cnt
= 0;
1762 antcomb
->alt_recv_cnt
= 0;
1765 int ath_rx_tasklet(struct ath_softc
*sc
, int flush
, bool hp
)
1768 struct sk_buff
*skb
= NULL
, *requeue_skb
, *hdr_skb
;
1769 struct ieee80211_rx_status
*rxs
;
1770 struct ath_hw
*ah
= sc
->sc_ah
;
1771 struct ath_common
*common
= ath9k_hw_common(ah
);
1772 struct ieee80211_hw
*hw
= sc
->hw
;
1773 struct ieee80211_hdr
*hdr
;
1775 bool decrypt_error
= false;
1776 struct ath_rx_status rs
;
1777 enum ath9k_rx_qtype qtype
;
1778 bool edma
= !!(ah
->caps
.hw_caps
& ATH9K_HW_CAP_EDMA
);
1780 u8 rx_status_len
= ah
->caps
.rx_status_len
;
1783 unsigned long flags
;
1786 dma_type
= DMA_BIDIRECTIONAL
;
1788 dma_type
= DMA_FROM_DEVICE
;
1790 qtype
= hp
? ATH9K_RX_QUEUE_HP
: ATH9K_RX_QUEUE_LP
;
1791 spin_lock_bh(&sc
->rx
.rxbuflock
);
1793 tsf
= ath9k_hw_gettsf64(ah
);
1794 tsf_lower
= tsf
& 0xffffffff;
1797 /* If handling rx interrupt and flush is in progress => exit */
1798 if ((sc
->sc_flags
& SC_OP_RXFLUSH
) && (flush
== 0))
1801 memset(&rs
, 0, sizeof(rs
));
1803 bf
= ath_edma_get_next_rx_buf(sc
, &rs
, qtype
);
1805 bf
= ath_get_next_rx_buf(sc
, &rs
);
1815 * Take frame header from the first fragment and RX status from
1819 hdr_skb
= sc
->rx
.frag
;
1823 hdr
= (struct ieee80211_hdr
*) (hdr_skb
->data
+ rx_status_len
);
1824 rxs
= IEEE80211_SKB_RXCB(hdr_skb
);
1825 if (ieee80211_is_beacon(hdr
->frame_control
) &&
1826 !compare_ether_addr(hdr
->addr3
, common
->curbssid
))
1827 rs
.is_mybeacon
= true;
1829 rs
.is_mybeacon
= false;
1831 ath_debug_stat_rx(sc
, &rs
);
1834 * If we're asked to flush receive queue, directly
1835 * chain it back at the queue without processing it.
1837 if (sc
->sc_flags
& SC_OP_RXFLUSH
)
1838 goto requeue_drop_frag
;
1840 retval
= ath9k_rx_skb_preprocess(common
, hw
, hdr
, &rs
,
1841 rxs
, &decrypt_error
);
1843 goto requeue_drop_frag
;
1845 rxs
->mactime
= (tsf
& ~0xffffffffULL
) | rs
.rs_tstamp
;
1846 if (rs
.rs_tstamp
> tsf_lower
&&
1847 unlikely(rs
.rs_tstamp
- tsf_lower
> 0x10000000))
1848 rxs
->mactime
-= 0x100000000ULL
;
1850 if (rs
.rs_tstamp
< tsf_lower
&&
1851 unlikely(tsf_lower
- rs
.rs_tstamp
> 0x10000000))
1852 rxs
->mactime
+= 0x100000000ULL
;
1854 /* Ensure we always have an skb to requeue once we are done
1855 * processing the current buffer's skb */
1856 requeue_skb
= ath_rxbuf_alloc(common
, common
->rx_bufsize
, GFP_ATOMIC
);
1858 /* If there is no memory we ignore the current RX'd frame,
1859 * tell hardware it can give us a new frame using the old
1860 * skb and put it at the tail of the sc->rx.rxbuf list for
1863 goto requeue_drop_frag
;
1865 /* Unmap the frame */
1866 dma_unmap_single(sc
->dev
, bf
->bf_buf_addr
,
1870 skb_put(skb
, rs
.rs_datalen
+ ah
->caps
.rx_status_len
);
1871 if (ah
->caps
.rx_status_len
)
1872 skb_pull(skb
, ah
->caps
.rx_status_len
);
1875 ath9k_rx_skb_postprocess(common
, hdr_skb
, &rs
,
1876 rxs
, decrypt_error
);
1878 /* We will now give hardware our shiny new allocated skb */
1879 bf
->bf_mpdu
= requeue_skb
;
1880 bf
->bf_buf_addr
= dma_map_single(sc
->dev
, requeue_skb
->data
,
1883 if (unlikely(dma_mapping_error(sc
->dev
,
1884 bf
->bf_buf_addr
))) {
1885 dev_kfree_skb_any(requeue_skb
);
1887 bf
->bf_buf_addr
= 0;
1888 ath_err(common
, "dma_mapping_error() on RX\n");
1889 ieee80211_rx(hw
, skb
);
1895 * rs_more indicates chained descriptors which can be
1896 * used to link buffers together for a sort of
1897 * scatter-gather operation.
1900 /* too many fragments - cannot handle frame */
1901 dev_kfree_skb_any(sc
->rx
.frag
);
1902 dev_kfree_skb_any(skb
);
1910 int space
= skb
->len
- skb_tailroom(hdr_skb
);
1914 if (pskb_expand_head(hdr_skb
, 0, space
, GFP_ATOMIC
) < 0) {
1916 goto requeue_drop_frag
;
1919 skb_copy_from_linear_data(skb
, skb_put(hdr_skb
, skb
->len
),
1921 dev_kfree_skb_any(skb
);
1926 * change the default rx antenna if rx diversity chooses the
1927 * other antenna 3 times in a row.
1929 if (sc
->rx
.defant
!= rs
.rs_antenna
) {
1930 if (++sc
->rx
.rxotherant
>= 3)
1931 ath_setdefantenna(sc
, rs
.rs_antenna
);
1933 sc
->rx
.rxotherant
= 0;
1936 if (rxs
->flag
& RX_FLAG_MMIC_STRIPPED
)
1937 skb_trim(skb
, skb
->len
- 8);
1939 spin_lock_irqsave(&sc
->sc_pm_lock
, flags
);
1941 if ((sc
->ps_flags
& (PS_WAIT_FOR_BEACON
|
1943 PS_WAIT_FOR_PSPOLL_DATA
)) ||
1944 ath9k_check_auto_sleep(sc
))
1945 ath_rx_ps(sc
, skb
, rs
.is_mybeacon
);
1946 spin_unlock_irqrestore(&sc
->sc_pm_lock
, flags
);
1948 if ((ah
->caps
.hw_caps
& ATH9K_HW_CAP_ANT_DIV_COMB
) && sc
->ant_rx
== 3)
1949 ath_ant_comb_scan(sc
, &rs
);
1951 ieee80211_rx(hw
, skb
);
1955 dev_kfree_skb_any(sc
->rx
.frag
);
1960 list_add_tail(&bf
->list
, &sc
->rx
.rxbuf
);
1961 ath_rx_edma_buf_link(sc
, qtype
);
1963 list_move_tail(&bf
->list
, &sc
->rx
.rxbuf
);
1964 ath_rx_buf_link(sc
, bf
);
1970 spin_unlock_bh(&sc
->rx
.rxbuflock
);
1972 if (!(ah
->imask
& ATH9K_INT_RXEOL
)) {
1973 ah
->imask
|= (ATH9K_INT_RXEOL
| ATH9K_INT_RXORN
);
1974 ath9k_hw_set_interrupts(ah
);