drivers/net/wireless/ath/wil6210/wil6210.h

   1 /*
   2  * Copyright (c) 2012-2017 Qualcomm Atheros, Inc.
   3  *
   4  * Permission to use, copy, modify, and/or distribute this software for any
   5  * purpose with or without fee is hereby granted, provided that the above
   6  * copyright notice and this permission notice appear in all copies.
   7  *
   8  * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
   9  * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
  10  * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
  11  * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
  12  * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
  13  * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
  14  * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
  15  */
  16
  17 #ifndef __WIL6210_H__
  18 #define __WIL6210_H__
  19
  20 #include <linux/etherdevice.h>
  21 #include <linux/netdevice.h>
  22 #include <linux/wireless.h>
  23 #include <net/cfg80211.h>
  24 #include <linux/timex.h>
  25 #include <linux/types.h>
  26 #include "wmi.h"
  27 #include "wil_platform.h"
  28
  29 extern bool no_fw_recovery;
  30 extern unsigned int mtu_max;
  31 extern unsigned short rx_ring_overflow_thrsh;
  32 extern int agg_wsize;
  33 extern u32 vring_idle_trsh;
  34 extern bool rx_align_2;
  35 extern bool debug_fw;
  36 extern bool disable_ap_sme;
  37
  38 #define WIL_NAME "wil6210"
  39 #define WIL_FW_NAME_DEFAULT "wil6210.fw" /* code Sparrow B0 */
  40 #define WIL_FW_NAME_SPARROW_PLUS "wil6210_sparrow_plus.fw" /* code Sparrow D0 */
  41 #define WIL_BOARD_FILE_NAME "wil6210.brd" /* board & radio parameters */
  42
  43 #define WIL_DEFAULT_BUS_REQUEST_KBPS 128000 /* ~1Gbps */
  44 #define WIL_MAX_BUS_REQUEST_KBPS 800000 /* ~6.1Gbps */
  45
  46 /**
  47  * extract bits [@b0:@b1] (inclusive) from the value @x
  48  * it should be @b0 <= @b1, or result is incorrect
  49  */
  50 static inline u32 WIL_GET_BITS(u32 x, int b0, int b1)
  51 {
  52         return (x >> b0) & ((1 << (b1 - b0 + 1)) - 1);
  53 }
  54
  55 #define WIL6210_MEM_SIZE (2*1024*1024UL)
  56
  57 #define WIL_TX_Q_LEN_DEFAULT            (4000)
  58 #define WIL_RX_RING_SIZE_ORDER_DEFAULT  (10)
  59 #define WIL_TX_RING_SIZE_ORDER_DEFAULT  (12)
  60 #define WIL_BCAST_RING_SIZE_ORDER_DEFAULT       (7)
  61 #define WIL_BCAST_MCS0_LIMIT            (1024) /* limit for MCS0 frame size */
  62 /* limit ring size in range [32..32k] */
  63 #define WIL_RING_SIZE_ORDER_MIN (5)
  64 #define WIL_RING_SIZE_ORDER_MAX (15)
  65 #define WIL6210_MAX_TX_RINGS    (24) /* HW limit */
  66 #define WIL6210_MAX_CID         (8) /* HW limit */
  67 #define WIL6210_NAPI_BUDGET     (16) /* arbitrary */
  68 #define WIL_MAX_AMPDU_SIZE      (64 * 1024) /* FW/HW limit */
  69 #define WIL_MAX_AGG_WSIZE       (32) /* FW/HW limit */
  70 /* Hardware offload block adds the following:
  71  * 26 bytes - 3-address QoS data header
  72  *  8 bytes - IV + EIV (for GCMP)
  73  *  8 bytes - SNAP
  74  * 16 bytes - MIC (for GCMP)
  75  *  4 bytes - CRC
  76  */
  77 #define WIL_MAX_MPDU_OVERHEAD   (62)
  78
  79 /* Calculate MAC buffer size for the firmware. It includes all overhead,
  80  * as it will go over the air, and need to be 8 byte aligned
  81  */
  82 static inline u32 wil_mtu2macbuf(u32 mtu)
  83 {
  84         return ALIGN(mtu + WIL_MAX_MPDU_OVERHEAD, 8);
  85 }
  86
  87 /* MTU for Ethernet need to take into account 8-byte SNAP header
  88  * to be added when encapsulating Ethernet frame into 802.11
  89  */
  90 #define WIL_MAX_ETH_MTU         (IEEE80211_MAX_DATA_LEN_DMG - 8)
  91 /* Max supported by wil6210 value for interrupt threshold is 5sec. */
  92 #define WIL6210_ITR_TRSH_MAX (5000000)
  93 #define WIL6210_ITR_TX_INTERFRAME_TIMEOUT_DEFAULT (13) /* usec */
  94 #define WIL6210_ITR_RX_INTERFRAME_TIMEOUT_DEFAULT (13) /* usec */
  95 #define WIL6210_ITR_TX_MAX_BURST_DURATION_DEFAULT (500) /* usec */
  96 #define WIL6210_ITR_RX_MAX_BURST_DURATION_DEFAULT (500) /* usec */
  97 #define WIL6210_FW_RECOVERY_RETRIES     (5) /* try to recover this many times */
  98 #define WIL6210_FW_RECOVERY_TO  msecs_to_jiffies(5000)
  99 #define WIL6210_SCAN_TO         msecs_to_jiffies(10000)
 100 #define WIL6210_DISCONNECT_TO_MS (2000)
 101 #define WIL6210_RX_HIGH_TRSH_INIT               (0)
 102 #define WIL6210_RX_HIGH_TRSH_DEFAULT \
 103                                 (1 << (WIL_RX_RING_SIZE_ORDER_DEFAULT - 3))
 104 #define WIL_MAX_DMG_AID 254 /* for DMG only 1-254 allowed (see
 105                              * 802.11REVmc/D5.0, section 9.4.1.8)
 106                              */
 107 /* Hardware definitions begin */
 108
 109 /*
 110  * Mapping
 111  * RGF File      | Host addr    |  FW addr
 112  *               |              |
 113  * user_rgf      | 0x000000     | 0x880000
 114  *  dma_rgf      | 0x001000     | 0x881000
 115  * pcie_rgf      | 0x002000     | 0x882000
 116  *               |              |
 117  */
 118
 119 /* Where various structures placed in host address space */
 120 #define WIL6210_FW_HOST_OFF      (0x880000UL)
 121
 122 #define HOSTADDR(fwaddr)        (fwaddr - WIL6210_FW_HOST_OFF)
 123
 124 /*
 125  * Interrupt control registers block
 126  *
 127  * each interrupt controlled by the same bit in all registers
 128  */
 129 struct RGF_ICR {
 130         u32 ICC; /* Cause Control, RW: 0 - W1C, 1 - COR */
 131         u32 ICR; /* Cause, W1C/COR depending on ICC */
 132         u32 ICM; /* Cause masked (ICR & ~IMV), W1C/COR depending on ICC */
 133         u32 ICS; /* Cause Set, WO */
 134         u32 IMV; /* Mask, RW+S/C */
 135         u32 IMS; /* Mask Set, write 1 to set */
 136         u32 IMC; /* Mask Clear, write 1 to clear */
 137 } __packed;
 138
 139 /* registers - FW addresses */
 140 #define RGF_USER_USAGE_1                (0x880004)
 141 #define RGF_USER_USAGE_6                (0x880018)
 142         #define BIT_USER_OOB_MODE               BIT(31)
 143 #define RGF_USER_HW_MACHINE_STATE       (0x8801dc)
 144         #define HW_MACHINE_BOOT_DONE    (0x3fffffd)
 145 #define RGF_USER_USER_CPU_0             (0x8801e0)
 146         #define BIT_USER_USER_CPU_MAN_RST       BIT(1) /* user_cpu_man_rst */
 147 #define RGF_USER_MAC_CPU_0              (0x8801fc)
 148         #define BIT_USER_MAC_CPU_MAN_RST        BIT(1) /* mac_cpu_man_rst */
 149 #define RGF_USER_USER_SCRATCH_PAD       (0x8802bc)
 150 #define RGF_USER_BL                     (0x880A3C) /* Boot Loader */
 151 #define RGF_USER_FW_REV_ID              (0x880a8c) /* chip revision */
 152 #define RGF_USER_CLKS_CTL_0             (0x880abc)
 153         #define BIT_USER_CLKS_CAR_AHB_SW_SEL    BIT(1) /* ref clk/PLL */
 154         #define BIT_USER_CLKS_RST_PWGD  BIT(11) /* reset on "power good" */
 155 #define RGF_USER_CLKS_CTL_SW_RST_VEC_0  (0x880b04)
 156 #define RGF_USER_CLKS_CTL_SW_RST_VEC_1  (0x880b08)
 157 #define RGF_USER_CLKS_CTL_SW_RST_VEC_2  (0x880b0c)
 158 #define RGF_USER_CLKS_CTL_SW_RST_VEC_3  (0x880b10)
 159 #define RGF_USER_CLKS_CTL_SW_RST_MASK_0 (0x880b14)
 160         #define BIT_HPAL_PERST_FROM_PAD BIT(6)
 161         #define BIT_CAR_PERST_RST       BIT(7)
 162 #define RGF_USER_USER_ICR               (0x880b4c) /* struct RGF_ICR */
 163         #define BIT_USER_USER_ICR_SW_INT_2      BIT(18)
 164 #define RGF_USER_CLKS_CTL_EXT_SW_RST_VEC_0      (0x880c18)
 165 #define RGF_USER_CLKS_CTL_EXT_SW_RST_VEC_1      (0x880c2c)
 166 #define RGF_USER_SPARROW_M_4                    (0x880c50) /* Sparrow */
 167         #define BIT_SPARROW_M_4_SEL_SLEEP_OR_REF        BIT(2)
 168
 169 #define RGF_DMA_EP_TX_ICR               (0x881bb4) /* struct RGF_ICR */
 170         #define BIT_DMA_EP_TX_ICR_TX_DONE       BIT(0)
 171         #define BIT_DMA_EP_TX_ICR_TX_DONE_N(n)  BIT(n+1) /* n = [0..23] */
 172 #define RGF_DMA_EP_RX_ICR               (0x881bd0) /* struct RGF_ICR */
 173         #define BIT_DMA_EP_RX_ICR_RX_DONE       BIT(0)
 174         #define BIT_DMA_EP_RX_ICR_RX_HTRSH      BIT(1)
 175 #define RGF_DMA_EP_MISC_ICR             (0x881bec) /* struct RGF_ICR */
 176         #define BIT_DMA_EP_MISC_ICR_RX_HTRSH    BIT(0)
 177         #define BIT_DMA_EP_MISC_ICR_TX_NO_ACT   BIT(1)
 178         #define BIT_DMA_EP_MISC_ICR_HALP        BIT(27)
 179         #define BIT_DMA_EP_MISC_ICR_FW_INT(n)   BIT(28+n) /* n = [0..3] */
 180
 181 /* Legacy interrupt moderation control (before Sparrow v2)*/
 182 #define RGF_DMA_ITR_CNT_TRSH            (0x881c5c)
 183 #define RGF_DMA_ITR_CNT_DATA            (0x881c60)
 184 #define RGF_DMA_ITR_CNT_CRL             (0x881c64)
 185         #define BIT_DMA_ITR_CNT_CRL_EN          BIT(0)
 186         #define BIT_DMA_ITR_CNT_CRL_EXT_TICK    BIT(1)
 187         #define BIT_DMA_ITR_CNT_CRL_FOREVER     BIT(2)
 188         #define BIT_DMA_ITR_CNT_CRL_CLR         BIT(3)
 189         #define BIT_DMA_ITR_CNT_CRL_REACH_TRSH  BIT(4)
 190
 191 /* Offload control (Sparrow B0+) */
 192 #define RGF_DMA_OFUL_NID_0              (0x881cd4)
 193         #define BIT_DMA_OFUL_NID_0_RX_EXT_TR_EN         BIT(0)
 194         #define BIT_DMA_OFUL_NID_0_TX_EXT_TR_EN         BIT(1)
 195         #define BIT_DMA_OFUL_NID_0_RX_EXT_A3_SRC        BIT(2)
 196         #define BIT_DMA_OFUL_NID_0_TX_EXT_A3_SRC        BIT(3)
 197
 198 /* New (sparrow v2+) interrupt moderation control */
 199 #define RGF_DMA_ITR_TX_DESQ_NO_MOD              (0x881d40)
 200 #define RGF_DMA_ITR_TX_CNT_TRSH                 (0x881d34)
 201 #define RGF_DMA_ITR_TX_CNT_DATA                 (0x881d38)
 202 #define RGF_DMA_ITR_TX_CNT_CTL                  (0x881d3c)
 203         #define BIT_DMA_ITR_TX_CNT_CTL_EN               BIT(0)
 204         #define BIT_DMA_ITR_TX_CNT_CTL_EXT_TIC_SEL      BIT(1)
 205         #define BIT_DMA_ITR_TX_CNT_CTL_FOREVER          BIT(2)
 206         #define BIT_DMA_ITR_TX_CNT_CTL_CLR              BIT(3)
 207         #define BIT_DMA_ITR_TX_CNT_CTL_REACHED_TRESH    BIT(4)
 208         #define BIT_DMA_ITR_TX_CNT_CTL_CROSS_EN         BIT(5)
 209         #define BIT_DMA_ITR_TX_CNT_CTL_FREE_RUNNIG      BIT(6)
 210 #define RGF_DMA_ITR_TX_IDL_CNT_TRSH                     (0x881d60)
 211 #define RGF_DMA_ITR_TX_IDL_CNT_DATA                     (0x881d64)
 212 #define RGF_DMA_ITR_TX_IDL_CNT_CTL                      (0x881d68)
 213         #define BIT_DMA_ITR_TX_IDL_CNT_CTL_EN                   BIT(0)
 214         #define BIT_DMA_ITR_TX_IDL_CNT_CTL_EXT_TIC_SEL          BIT(1)
 215         #define BIT_DMA_ITR_TX_IDL_CNT_CTL_FOREVER              BIT(2)
 216         #define BIT_DMA_ITR_TX_IDL_CNT_CTL_CLR                  BIT(3)
 217         #define BIT_DMA_ITR_TX_IDL_CNT_CTL_REACHED_TRESH        BIT(4)
 218 #define RGF_DMA_ITR_RX_DESQ_NO_MOD              (0x881d50)
 219 #define RGF_DMA_ITR_RX_CNT_TRSH                 (0x881d44)
 220 #define RGF_DMA_ITR_RX_CNT_DATA                 (0x881d48)
 221 #define RGF_DMA_ITR_RX_CNT_CTL                  (0x881d4c)
 222         #define BIT_DMA_ITR_RX_CNT_CTL_EN               BIT(0)
 223         #define BIT_DMA_ITR_RX_CNT_CTL_EXT_TIC_SEL      BIT(1)
 224         #define BIT_DMA_ITR_RX_CNT_CTL_FOREVER          BIT(2)
 225         #define BIT_DMA_ITR_RX_CNT_CTL_CLR              BIT(3)
 226         #define BIT_DMA_ITR_RX_CNT_CTL_REACHED_TRESH    BIT(4)
 227         #define BIT_DMA_ITR_RX_CNT_CTL_CROSS_EN         BIT(5)
 228         #define BIT_DMA_ITR_RX_CNT_CTL_FREE_RUNNIG      BIT(6)
 229 #define RGF_DMA_ITR_RX_IDL_CNT_TRSH                     (0x881d54)
 230 #define RGF_DMA_ITR_RX_IDL_CNT_DATA                     (0x881d58)
 231 #define RGF_DMA_ITR_RX_IDL_CNT_CTL                      (0x881d5c)
 232         #define BIT_DMA_ITR_RX_IDL_CNT_CTL_EN                   BIT(0)
 233         #define BIT_DMA_ITR_RX_IDL_CNT_CTL_EXT_TIC_SEL          BIT(1)
 234         #define BIT_DMA_ITR_RX_IDL_CNT_CTL_FOREVER              BIT(2)
 235         #define BIT_DMA_ITR_RX_IDL_CNT_CTL_CLR                  BIT(3)
 236         #define BIT_DMA_ITR_RX_IDL_CNT_CTL_REACHED_TRESH        BIT(4)
 237
 238 #define RGF_DMA_PSEUDO_CAUSE            (0x881c68)
 239 #define RGF_DMA_PSEUDO_CAUSE_MASK_SW    (0x881c6c)
 240 #define RGF_DMA_PSEUDO_CAUSE_MASK_FW    (0x881c70)
 241         #define BIT_DMA_PSEUDO_CAUSE_RX         BIT(0)
 242         #define BIT_DMA_PSEUDO_CAUSE_TX         BIT(1)
 243         #define BIT_DMA_PSEUDO_CAUSE_MISC       BIT(2)
 244
 245 #define RGF_HP_CTRL                     (0x88265c)
 246 #define RGF_PCIE_LOS_COUNTER_CTL        (0x882dc4)
 247
 248 /* MAC timer, usec, for packet lifetime */
 249 #define RGF_MAC_MTRL_COUNTER_0          (0x886aa8)
 250
 251 #define RGF_CAF_ICR                     (0x88946c) /* struct RGF_ICR */
 252 #define RGF_CAF_OSC_CONTROL             (0x88afa4)
 253         #define BIT_CAF_OSC_XTAL_EN             BIT(0)
 254 #define RGF_CAF_PLL_LOCK_STATUS         (0x88afec)
 255         #define BIT_CAF_OSC_DIG_XTAL_STABLE     BIT(0)
 256
 257 #define RGF_USER_JTAG_DEV_ID    (0x880b34) /* device ID */
 258         #define JTAG_DEV_ID_SPARROW     (0x2632072f)
 259
 260 #define RGF_USER_REVISION_ID            (0x88afe4)
 261 #define RGF_USER_REVISION_ID_MASK       (3)
 262         #define REVISION_ID_SPARROW_B0  (0x0)
 263         #define REVISION_ID_SPARROW_D0  (0x3)
 264
 265 /* crash codes for FW/Ucode stored here */
 266 #define RGF_FW_ASSERT_CODE              (0x91f020)
 267 #define RGF_UCODE_ASSERT_CODE           (0x91f028)
 268
 269 enum {
 270         HW_VER_UNKNOWN,
 271         HW_VER_SPARROW_B0, /* REVISION_ID_SPARROW_B0 */
 272         HW_VER_SPARROW_D0, /* REVISION_ID_SPARROW_D0 */
 273 };
 274
 275 /* popular locations */
 276 #define RGF_MBOX   RGF_USER_USER_SCRATCH_PAD
 277 #define HOST_MBOX   HOSTADDR(RGF_MBOX)
 278 #define SW_INT_MBOX BIT_USER_USER_ICR_SW_INT_2
 279
 280 /* ISR register bits */
 281 #define ISR_MISC_FW_READY       BIT_DMA_EP_MISC_ICR_FW_INT(0)
 282 #define ISR_MISC_MBOX_EVT       BIT_DMA_EP_MISC_ICR_FW_INT(1)
 283 #define ISR_MISC_FW_ERROR       BIT_DMA_EP_MISC_ICR_FW_INT(3)
 284
 285 /* Hardware definitions end */
 286 struct fw_map {
 287         u32 from; /* linker address - from, inclusive */
 288         u32 to;   /* linker address - to, exclusive */
 289         u32 host; /* PCI/Host address - BAR0 + 0x880000 */
 290         const char *name; /* for debugfs */
 291         bool fw; /* true if FW mapping, false if UCODE mapping */
 292 };
 293
 294 /* array size should be in sync with actual definition in the wmi.c */
 295 extern const struct fw_map fw_mapping[10];
 296
 297 /**
 298  * mk_cidxtid - construct @cidxtid field
 299  * @cid: CID value
 300  * @tid: TID value
 301  *
 302  * @cidxtid field encoded as bits 0..3 - CID; 4..7 - TID
 303  */
 304 static inline u8 mk_cidxtid(u8 cid, u8 tid)
 305 {
 306         return ((tid & 0xf) << 4) | (cid & 0xf);
 307 }
 308
 309 /**
 310  * parse_cidxtid - parse @cidxtid field
 311  * @cid: store CID value here
 312  * @tid: store TID value here
 313  *
 314  * @cidxtid field encoded as bits 0..3 - CID; 4..7 - TID
 315  */
 316 static inline void parse_cidxtid(u8 cidxtid, u8 *cid, u8 *tid)
 317 {
 318         *cid = cidxtid & 0xf;
 319         *tid = (cidxtid >> 4) & 0xf;
 320 }
 321
 322 struct wil6210_mbox_ring {
 323         u32 base;
 324         u16 entry_size; /* max. size of mbox entry, incl. all headers */
 325         u16 size;
 326         u32 tail;
 327         u32 head;
 328 } __packed;
 329
 330 struct wil6210_mbox_ring_desc {
 331         __le32 sync;
 332         __le32 addr;
 333 } __packed;
 334
 335 /* at HOST_OFF_WIL6210_MBOX_CTL */
 336 struct wil6210_mbox_ctl {
 337         struct wil6210_mbox_ring tx;
 338         struct wil6210_mbox_ring rx;
 339 } __packed;
 340
 341 struct wil6210_mbox_hdr {
 342         __le16 seq;
 343         __le16 len; /* payload, bytes after this header */
 344         __le16 type;
 345         u8 flags;
 346         u8 reserved;
 347 } __packed;
 348
 349 #define WIL_MBOX_HDR_TYPE_WMI (0)
 350
 351 /* max. value for wil6210_mbox_hdr.len */
 352 #define MAX_MBOXITEM_SIZE   (240)
 353
 354 struct pending_wmi_event {
 355         struct list_head list;
 356         struct {
 357                 struct wil6210_mbox_hdr hdr;
 358                 struct wmi_cmd_hdr wmi;
 359                 u8 data[0];
 360         } __packed event;
 361 };
 362
 363 enum { /* for wil_ctx.mapped_as */
 364         wil_mapped_as_none = 0,
 365         wil_mapped_as_single = 1,
 366         wil_mapped_as_page = 2,
 367 };
 368
 369 /**
 370  * struct wil_ctx - software context for Vring descriptor
 371  */
 372 struct wil_ctx {
 373         struct sk_buff *skb;
 374         u8 nr_frags;
 375         u8 mapped_as;
 376 };
 377
 378 union vring_desc;
 379
 380 struct vring {
 381         dma_addr_t pa;
 382         volatile union vring_desc *va; /* vring_desc[size], WriteBack by DMA */
 383         u16 size; /* number of vring_desc elements */
 384         u32 swtail;
 385         u32 swhead;
 386         u32 hwtail; /* write here to inform hw */
 387         struct wil_ctx *ctx; /* ctx[size] - software context */
 388 };
 389
 390 /**
 391  * Additional data for Tx Vring
 392  */
 393 struct vring_tx_data {
 394         bool dot1x_open;
 395         int enabled;
 396         cycles_t idle, last_idle, begin;
 397         u8 agg_wsize; /* agreed aggregation window, 0 - no agg */
 398         u16 agg_timeout;
 399         u8 agg_amsdu;
 400         bool addba_in_progress; /* if set, agg_xxx is for request in progress */
 401         spinlock_t lock;
 402 };
 403
 404 enum { /* for wil6210_priv.status */
 405         wil_status_fwready = 0, /* FW operational */
 406         wil_status_fwconnecting,
 407         wil_status_fwconnected,
 408         wil_status_dontscan,
 409         wil_status_mbox_ready, /* MBOX structures ready */
 410         wil_status_irqen, /* FIXME: interrupts enabled - for debug */
 411         wil_status_napi_en, /* NAPI enabled protected by wil->mutex */
 412         wil_status_resetting, /* reset in progress */
 413         wil_status_last /* keep last */
 414 };
 415
 416 struct pci_dev;
 417
 418 /**
 419  * struct tid_ampdu_rx - TID aggregation information (Rx).
 420  *
 421  * @reorder_buf: buffer to reorder incoming aggregated MPDUs
 422  * @reorder_time: jiffies when skb was added
 423  * @session_timer: check if peer keeps Tx-ing on the TID (by timeout value)
 424  * @reorder_timer: releases expired frames from the reorder buffer.
 425  * @last_rx: jiffies of last rx activity
 426  * @head_seq_num: head sequence number in reordering buffer.
 427  * @stored_mpdu_num: number of MPDUs in reordering buffer
 428  * @ssn: Starting Sequence Number expected to be aggregated.
 429  * @buf_size: buffer size for incoming A-MPDUs
 430  * @timeout: reset timer value (in TUs).
 431  * @ssn_last_drop: SSN of the last dropped frame
 432  * @total: total number of processed incoming frames
 433  * @drop_dup: duplicate frames dropped for this reorder buffer
 434  * @drop_old: old frames dropped for this reorder buffer
 435  * @dialog_token: dialog token for aggregation session
 436  * @first_time: true when this buffer used 1-st time
 437  */
 438 struct wil_tid_ampdu_rx {
 439         struct sk_buff **reorder_buf;
 440         unsigned long *reorder_time;
 441         struct timer_list session_timer;
 442         struct timer_list reorder_timer;
 443         unsigned long last_rx;
 444         u16 head_seq_num;
 445         u16 stored_mpdu_num;
 446         u16 ssn;
 447         u16 buf_size;
 448         u16 timeout;
 449         u16 ssn_last_drop;
 450         unsigned long long total; /* frames processed */
 451         unsigned long long drop_dup;
 452         unsigned long long drop_old;
 453         u8 dialog_token;
 454         bool first_time; /* is it 1-st time this buffer used? */
 455 };
 456
 457 /**
 458  * struct wil_tid_crypto_rx_single - TID crypto information (Rx).
 459  *
 460  * @pn: GCMP PN for the session
 461  * @key_set: valid key present
 462  */
 463 struct wil_tid_crypto_rx_single {
 464         u8 pn[IEEE80211_GCMP_PN_LEN];
 465         bool key_set;
 466 };
 467
 468 struct wil_tid_crypto_rx {
 469         struct wil_tid_crypto_rx_single key_id[4];
 470 };
 471
 472 struct wil_p2p_info {
 473         struct ieee80211_channel listen_chan;
 474         u8 discovery_started;
 475         u8 p2p_dev_started;
 476         u64 cookie;
 477         struct wireless_dev *pending_listen_wdev;
 478         unsigned int listen_duration;
 479         struct timer_list discovery_timer; /* listen/search duration */
 480         struct work_struct discovery_expired_work; /* listen/search expire */
 481         struct work_struct delayed_listen_work; /* listen after scan done */
 482 };
 483
 484 enum wil_sta_status {
 485         wil_sta_unused = 0,
 486         wil_sta_conn_pending = 1,
 487         wil_sta_connected = 2,
 488 };
 489
 490 #define WIL_STA_TID_NUM (16)
 491 #define WIL_MCS_MAX (12) /* Maximum MCS supported */
 492
 493 struct wil_net_stats {
 494         unsigned long   rx_packets;
 495         unsigned long   tx_packets;
 496         unsigned long   rx_bytes;
 497         unsigned long   tx_bytes;
 498         unsigned long   tx_errors;
 499         unsigned long   rx_dropped;
 500         unsigned long   rx_non_data_frame;
 501         unsigned long   rx_short_frame;
 502         unsigned long   rx_large_frame;
 503         unsigned long   rx_replay;
 504         u16 last_mcs_rx;
 505         u64 rx_per_mcs[WIL_MCS_MAX + 1];
 506 };
 507
 508 /**
 509  * struct wil_sta_info - data for peer
 510  *
 511  * Peer identified by its CID (connection ID)
 512  * NIC performs beam forming for each peer;
 513  * if no beam forming done, frame exchange is not
 514  * possible.
 515  */
 516 struct wil_sta_info {
 517         u8 addr[ETH_ALEN];
 518         enum wil_sta_status status;
 519         struct wil_net_stats stats;
 520         /* Rx BACK */
 521         struct wil_tid_ampdu_rx *tid_rx[WIL_STA_TID_NUM];
 522         spinlock_t tid_rx_lock; /* guarding tid_rx array */
 523         unsigned long tid_rx_timer_expired[BITS_TO_LONGS(WIL_STA_TID_NUM)];
 524         unsigned long tid_rx_stop_requested[BITS_TO_LONGS(WIL_STA_TID_NUM)];
 525         struct wil_tid_crypto_rx tid_crypto_rx[WIL_STA_TID_NUM];
 526         struct wil_tid_crypto_rx group_crypto_rx;
 527         u8 aid; /* 1-254; 0 if unknown/not reported */
 528 };
 529
 530 enum {
 531         fw_recovery_idle = 0,
 532         fw_recovery_pending = 1,
 533         fw_recovery_running = 2,
 534 };
 535
 536 enum {
 537         hw_capability_last
 538 };
 539
 540 struct wil_probe_client_req {
 541         struct list_head list;
 542         u64 cookie;
 543         u8 cid;
 544 };
 545
 546 struct pmc_ctx {
 547         /* alloc, free, and read operations must own the lock */
 548         struct mutex            lock;
 549         struct vring_tx_desc    *pring_va;
 550         dma_addr_t              pring_pa;
 551         struct desc_alloc_info  *descriptors;
 552         int                     last_cmd_status;
 553         int                     num_descriptors;
 554         int                     descriptor_size;
 555 };
 556
 557 struct wil_halp {
 558         struct mutex            lock; /* protect halp ref_cnt */
 559         unsigned int            ref_cnt;
 560         struct completion       comp;
 561 };
 562
 563 struct wil_blob_wrapper {
 564         struct wil6210_priv *wil;
 565         struct debugfs_blob_wrapper blob;
 566 };
 567
 568 #define WIL_LED_MAX_ID                  (2)
 569 #define WIL_LED_INVALID_ID              (0xF)
 570 #define WIL_LED_BLINK_ON_SLOW_MS        (300)
 571 #define WIL_LED_BLINK_OFF_SLOW_MS       (300)
 572 #define WIL_LED_BLINK_ON_MED_MS         (200)
 573 #define WIL_LED_BLINK_OFF_MED_MS        (200)
 574 #define WIL_LED_BLINK_ON_FAST_MS        (100)
 575 #define WIL_LED_BLINK_OFF_FAST_MS       (100)
 576 enum {
 577         WIL_LED_TIME_SLOW = 0,
 578         WIL_LED_TIME_MED,
 579         WIL_LED_TIME_FAST,
 580         WIL_LED_TIME_LAST,
 581 };
 582
 583 struct blink_on_off_time {
 584         u32 on_ms;
 585         u32 off_ms;
 586 };
 587
 588 extern struct blink_on_off_time led_blink_time[WIL_LED_TIME_LAST];
 589 extern u8 led_id;
 590 extern u8 led_polarity;
 591
 592 struct wil6210_priv {
 593         struct pci_dev *pdev;
 594         struct wireless_dev *wdev;
 595         void __iomem *csr;
 596         DECLARE_BITMAP(status, wil_status_last);
 597         u8 fw_version[ETHTOOL_FWVERS_LEN];
 598         u32 hw_version;
 599         u8 chip_revision;
 600         const char *hw_name;
 601         const char *wil_fw_name;
 602         DECLARE_BITMAP(hw_capabilities, hw_capability_last);
 603         DECLARE_BITMAP(fw_capabilities, WMI_FW_CAPABILITY_MAX);
 604         u8 n_mids; /* number of additional MIDs as reported by FW */
 605         u32 recovery_count; /* num of FW recovery attempts in a short time */
 606         u32 recovery_state; /* FW recovery state machine */
 607         unsigned long last_fw_recovery; /* jiffies of last fw recovery */
 608         wait_queue_head_t wq; /* for all wait_event() use */
 609         /* profile */
 610         u32 monitor_flags;
 611         u32 privacy; /* secure connection? */
 612         u8 hidden_ssid; /* relevant in AP mode */
 613         u16 channel; /* relevant in AP mode */
 614         int sinfo_gen;
 615         u32 ap_isolate; /* no intra-BSS communication */
 616         struct cfg80211_bss *bss; /* connected bss, relevant in STA mode */
 617         /* interrupt moderation */
 618         u32 tx_max_burst_duration;
 619         u32 tx_interframe_timeout;
 620         u32 rx_max_burst_duration;
 621         u32 rx_interframe_timeout;
 622         /* cached ISR registers */
 623         u32 isr_misc;
 624         /* mailbox related */
 625         struct mutex wmi_mutex;
 626         struct wil6210_mbox_ctl mbox_ctl;
 627         struct completion wmi_ready;
 628         struct completion wmi_call;
 629         u16 wmi_seq;
 630         u16 reply_id; /**< wait for this WMI event */
 631         void *reply_buf;
 632         u16 reply_size;
 633         struct workqueue_struct *wmi_wq; /* for deferred calls */
 634         struct work_struct wmi_event_worker;
 635         struct workqueue_struct *wq_service;
 636         struct work_struct disconnect_worker;
 637         struct work_struct fw_error_worker;     /* for FW error recovery */
 638         struct timer_list connect_timer;
 639         struct timer_list scan_timer; /* detect scan timeout */
 640         struct list_head pending_wmi_ev;
 641         /*
 642          * protect pending_wmi_ev
 643          * - fill in IRQ from wil6210_irq_misc,
 644          * - consumed in thread by wmi_event_worker
 645          */
 646         spinlock_t wmi_ev_lock;
 647         spinlock_t net_queue_lock; /* guarding stop/wake netif queue */
 648         int net_queue_stopped; /* netif_tx_stop_all_queues invoked */
 649         struct napi_struct napi_rx;
 650         struct napi_struct napi_tx;
 651         /* keep alive */
 652         struct list_head probe_client_pending;
 653         struct mutex probe_client_mutex; /* protect @probe_client_pending */
 654         struct work_struct probe_client_worker;
 655         /* DMA related */
 656         struct vring vring_rx;
 657         struct vring vring_tx[WIL6210_MAX_TX_RINGS];
 658         struct vring_tx_data vring_tx_data[WIL6210_MAX_TX_RINGS];
 659         u8 vring2cid_tid[WIL6210_MAX_TX_RINGS][2]; /* [0] - CID, [1] - TID */
 660         struct wil_sta_info sta[WIL6210_MAX_CID];
 661         int bcast_vring;
 662         bool use_extended_dma_addr; /* indicates whether we are using 48 bits */
 663         /* scan */
 664         struct cfg80211_scan_request *scan_request;
 665
 666         struct mutex mutex; /* for wil6210_priv access in wil_{up|down} */
 667         /* statistics */
 668         atomic_t isr_count_rx, isr_count_tx;
 669         /* debugfs */
 670         struct dentry *debug;
 671         struct wil_blob_wrapper blobs[ARRAY_SIZE(fw_mapping)];
 672         u8 discovery_mode;
 673         u8 abft_len;
 674
 675         void *platform_handle;
 676         struct wil_platform_ops platform_ops;
 677
 678         struct pmc_ctx pmc;
 679
 680         bool pbss;
 681
 682         struct wil_p2p_info p2p;
 683
 684         /* P2P_DEVICE vif */
 685         struct wireless_dev *p2p_wdev;
 686         struct mutex p2p_wdev_mutex; /* protect @p2p_wdev and @scan_request */
 687         struct wireless_dev *radio_wdev;
 688
 689         /* High Access Latency Policy voting */
 690         struct wil_halp halp;
 691
 692 #ifdef CONFIG_PM
 693 #ifdef CONFIG_PM_SLEEP
 694         struct notifier_block pm_notify;
 695 #endif /* CONFIG_PM_SLEEP */
 696 #endif /* CONFIG_PM */
 697 };
 698
 699 #define wil_to_wiphy(i) (i->wdev->wiphy)
 700 #define wil_to_dev(i) (wiphy_dev(wil_to_wiphy(i)))
 701 #define wiphy_to_wil(w) (struct wil6210_priv *)(wiphy_priv(w))
 702 #define wil_to_wdev(i) (i->wdev)
 703 #define wdev_to_wil(w) (struct wil6210_priv *)(wdev_priv(w))
 704 #define wil_to_ndev(i) (wil_to_wdev(i)->netdev)
 705 #define ndev_to_wil(n) (wdev_to_wil(n->ieee80211_ptr))
 706
 707 __printf(2, 3)
 708 void wil_dbg_trace(struct wil6210_priv *wil, const char *fmt, ...);
 709 __printf(2, 3)
 710 void __wil_err(struct wil6210_priv *wil, const char *fmt, ...);
 711 __printf(2, 3)
 712 void __wil_err_ratelimited(struct wil6210_priv *wil, const char *fmt, ...);
 713 __printf(2, 3)
 714 void __wil_info(struct wil6210_priv *wil, const char *fmt, ...);
 715 __printf(2, 3)
 716 void wil_dbg_ratelimited(const struct wil6210_priv *wil, const char *fmt, ...);
 717 #define wil_dbg(wil, fmt, arg...) do { \
 718         netdev_dbg(wil_to_ndev(wil), fmt, ##arg); \
 719         wil_dbg_trace(wil, fmt, ##arg); \
 720 } while (0)
 721
 722 #define wil_dbg_irq(wil, fmt, arg...) wil_dbg(wil, "DBG[ IRQ]" fmt, ##arg)
 723 #define wil_dbg_txrx(wil, fmt, arg...) wil_dbg(wil, "DBG[TXRX]" fmt, ##arg)
 724 #define wil_dbg_wmi(wil, fmt, arg...) wil_dbg(wil, "DBG[ WMI]" fmt, ##arg)
 725 #define wil_dbg_misc(wil, fmt, arg...) wil_dbg(wil, "DBG[MISC]" fmt, ##arg)
 726 #define wil_dbg_pm(wil, fmt, arg...) wil_dbg(wil, "DBG[ PM ]" fmt, ##arg)
 727 #define wil_err(wil, fmt, arg...) __wil_err(wil, "%s: " fmt, __func__, ##arg)
 728 #define wil_info(wil, fmt, arg...) __wil_info(wil, "%s: " fmt, __func__, ##arg)
 729 #define wil_err_ratelimited(wil, fmt, arg...) \
 730         __wil_err_ratelimited(wil, "%s: " fmt, __func__, ##arg)
 731
 732 /* target operations */
 733 /* register read */
 734 static inline u32 wil_r(struct wil6210_priv *wil, u32 reg)
 735 {
 736         return readl(wil->csr + HOSTADDR(reg));
 737 }
 738
 739 /* register write. wmb() to make sure it is completed */
 740 static inline void wil_w(struct wil6210_priv *wil, u32 reg, u32 val)
 741 {
 742         writel(val, wil->csr + HOSTADDR(reg));
 743         wmb(); /* wait for write to propagate to the HW */
 744 }
 745
 746 /* register set = read, OR, write */
 747 static inline void wil_s(struct wil6210_priv *wil, u32 reg, u32 val)
 748 {
 749         wil_w(wil, reg, wil_r(wil, reg) | val);
 750 }
 751
 752 /* register clear = read, AND with inverted, write */
 753 static inline void wil_c(struct wil6210_priv *wil, u32 reg, u32 val)
 754 {
 755         wil_w(wil, reg, wil_r(wil, reg) & ~val);
 756 }
 757
 758 #if defined(CONFIG_DYNAMIC_DEBUG)
 759 #define wil_hex_dump_txrx(prefix_str, prefix_type, rowsize,     \
 760                           groupsize, buf, len, ascii)           \
 761                           print_hex_dump_debug("DBG[TXRX]" prefix_str,\
 762                                          prefix_type, rowsize,  \
 763                                          groupsize, buf, len, ascii)
 764
 765 #define wil_hex_dump_wmi(prefix_str, prefix_type, rowsize,      \
 766                          groupsize, buf, len, ascii)            \
 767                          print_hex_dump_debug("DBG[ WMI]" prefix_str,\
 768                                         prefix_type, rowsize,   \
 769                                         groupsize, buf, len, ascii)
 770
 771 #define wil_hex_dump_misc(prefix_str, prefix_type, rowsize,     \
 772                           groupsize, buf, len, ascii)           \
 773                           print_hex_dump_debug("DBG[MISC]" prefix_str,\
 774                                         prefix_type, rowsize,   \
 775                                         groupsize, buf, len, ascii)
 776 #else /* defined(CONFIG_DYNAMIC_DEBUG) */
 777 static inline
 778 void wil_hex_dump_txrx(const char *prefix_str, int prefix_type, int rowsize,
 779                        int groupsize, const void *buf, size_t len, bool ascii)
 780 {
 781 }
 782
 783 static inline
 784 void wil_hex_dump_wmi(const char *prefix_str, int prefix_type, int rowsize,
 785                       int groupsize, const void *buf, size_t len, bool ascii)
 786 {
 787 }
 788
 789 static inline
 790 void wil_hex_dump_misc(const char *prefix_str, int prefix_type, int rowsize,
 791                        int groupsize, const void *buf, size_t len, bool ascii)
 792 {
 793 }
 794 #endif /* defined(CONFIG_DYNAMIC_DEBUG) */
 795
 796 void wil_memcpy_fromio_32(void *dst, const volatile void __iomem *src,
 797                           size_t count);
 798 void wil_memcpy_toio_32(volatile void __iomem *dst, const void *src,
 799                         size_t count);
 800 void wil_memcpy_fromio_halp_vote(struct wil6210_priv *wil, void *dst,
 801                                  const volatile void __iomem *src,
 802                                  size_t count);
 803 void wil_memcpy_toio_halp_vote(struct wil6210_priv *wil,
 804                                volatile void __iomem *dst,
 805                                const void *src, size_t count);
 806
 807 void *wil_if_alloc(struct device *dev);
 808 void wil_if_free(struct wil6210_priv *wil);
 809 int wil_if_add(struct wil6210_priv *wil);
 810 void wil_if_remove(struct wil6210_priv *wil);
 811 int wil_priv_init(struct wil6210_priv *wil);
 812 void wil_priv_deinit(struct wil6210_priv *wil);
 813 int wil_reset(struct wil6210_priv *wil, bool no_fw);
 814 void wil_fw_error_recovery(struct wil6210_priv *wil);
 815 void wil_set_recovery_state(struct wil6210_priv *wil, int state);
 816 bool wil_is_recovery_blocked(struct wil6210_priv *wil);
 817 int wil_up(struct wil6210_priv *wil);
 818 int __wil_up(struct wil6210_priv *wil);
 819 int wil_down(struct wil6210_priv *wil);
 820 int __wil_down(struct wil6210_priv *wil);
 821 void wil_mbox_ring_le2cpus(struct wil6210_mbox_ring *r);
 822 int wil_find_cid(struct wil6210_priv *wil, const u8 *mac);
 823 void wil_set_ethtoolops(struct net_device *ndev);
 824
 825 void __iomem *wmi_buffer(struct wil6210_priv *wil, __le32 ptr);
 826 void __iomem *wmi_addr(struct wil6210_priv *wil, u32 ptr);
 827 int wmi_read_hdr(struct wil6210_priv *wil, __le32 ptr,
 828                  struct wil6210_mbox_hdr *hdr);
 829 int wmi_send(struct wil6210_priv *wil, u16 cmdid, void *buf, u16 len);
 830 void wmi_recv_cmd(struct wil6210_priv *wil);
 831 int wmi_call(struct wil6210_priv *wil, u16 cmdid, void *buf, u16 len,
 832              u16 reply_id, void *reply, u8 reply_size, int to_msec);
 833 void wmi_event_worker(struct work_struct *work);
 834 void wmi_event_flush(struct wil6210_priv *wil);
 835 int wmi_set_ssid(struct wil6210_priv *wil, u8 ssid_len, const void *ssid);
 836 int wmi_get_ssid(struct wil6210_priv *wil, u8 *ssid_len, void *ssid);
 837 int wmi_set_channel(struct wil6210_priv *wil, int channel);
 838 int wmi_get_channel(struct wil6210_priv *wil, int *channel);
 839 int wmi_del_cipher_key(struct wil6210_priv *wil, u8 key_index,
 840                        const void *mac_addr, int key_usage);
 841 int wmi_add_cipher_key(struct wil6210_priv *wil, u8 key_index,
 842                        const void *mac_addr, int key_len, const void *key,
 843                        int key_usage);
 844 int wmi_echo(struct wil6210_priv *wil);
 845 int wmi_set_ie(struct wil6210_priv *wil, u8 type, u16 ie_len, const void *ie);
 846 int wmi_rx_chain_add(struct wil6210_priv *wil, struct vring *vring);
 847 int wmi_rxon(struct wil6210_priv *wil, bool on);
 848 int wmi_get_temperature(struct wil6210_priv *wil, u32 *t_m, u32 *t_r);
 849 int wmi_disconnect_sta(struct wil6210_priv *wil, const u8 *mac,
 850                        u16 reason, bool full_disconnect, bool del_sta);
 851 int wmi_addba(struct wil6210_priv *wil, u8 ringid, u8 size, u16 timeout);
 852 int wmi_delba_tx(struct wil6210_priv *wil, u8 ringid, u16 reason);
 853 int wmi_delba_rx(struct wil6210_priv *wil, u8 cidxtid, u16 reason);
 854 int wmi_addba_rx_resp(struct wil6210_priv *wil, u8 cid, u8 tid, u8 token,
 855                       u16 status, bool amsdu, u16 agg_wsize, u16 timeout);
 856 int wmi_ps_dev_profile_cfg(struct wil6210_priv *wil,
 857                            enum wmi_ps_profile_type ps_profile);
 858 int wmi_set_mgmt_retry(struct wil6210_priv *wil, u8 retry_short);
 859 int wmi_get_mgmt_retry(struct wil6210_priv *wil, u8 *retry_short);
 860 int wmi_new_sta(struct wil6210_priv *wil, const u8 *mac, u8 aid);
 861 int wil_addba_rx_request(struct wil6210_priv *wil, u8 cidxtid,
 862                          u8 dialog_token, __le16 ba_param_set,
 863                          __le16 ba_timeout, __le16 ba_seq_ctrl);
 864 int wil_addba_tx_request(struct wil6210_priv *wil, u8 ringid, u16 wsize);
 865
 866 void wil6210_clear_irq(struct wil6210_priv *wil);
 867 int wil6210_init_irq(struct wil6210_priv *wil, int irq, bool use_msi);
 868 void wil6210_fini_irq(struct wil6210_priv *wil, int irq);
 869 void wil_mask_irq(struct wil6210_priv *wil);
 870 void wil_unmask_irq(struct wil6210_priv *wil);
 871 void wil_configure_interrupt_moderation(struct wil6210_priv *wil);
 872 void wil_disable_irq(struct wil6210_priv *wil);
 873 void wil_enable_irq(struct wil6210_priv *wil);
 874 void wil6210_mask_halp(struct wil6210_priv *wil);
 875
 876 /* P2P */
 877 bool wil_p2p_is_social_scan(struct cfg80211_scan_request *request);
 878 void wil_p2p_discovery_timer_fn(ulong x);
 879 int wil_p2p_search(struct wil6210_priv *wil,
 880                    struct cfg80211_scan_request *request);
 881 int wil_p2p_listen(struct wil6210_priv *wil, struct wireless_dev *wdev,
 882                    unsigned int duration, struct ieee80211_channel *chan,
 883                    u64 *cookie);
 884 u8 wil_p2p_stop_discovery(struct wil6210_priv *wil);
 885 int wil_p2p_cancel_listen(struct wil6210_priv *wil, u64 cookie);
 886 void wil_p2p_listen_expired(struct work_struct *work);
 887 void wil_p2p_search_expired(struct work_struct *work);
 888 void wil_p2p_stop_radio_operations(struct wil6210_priv *wil);
 889 void wil_p2p_delayed_listen_work(struct work_struct *work);
 890
 891 /* WMI for P2P */
 892 int wmi_p2p_cfg(struct wil6210_priv *wil, int channel, int bi);
 893 int wmi_start_listen(struct wil6210_priv *wil);
 894 int wmi_start_search(struct wil6210_priv *wil);
 895 int wmi_stop_discovery(struct wil6210_priv *wil);
 896
 897 int wil_cfg80211_mgmt_tx(struct wiphy *wiphy, struct wireless_dev *wdev,
 898                          struct cfg80211_mgmt_tx_params *params,
 899                          u64 *cookie);
 900
 901 int wil6210_debugfs_init(struct wil6210_priv *wil);
 902 void wil6210_debugfs_remove(struct wil6210_priv *wil);
 903 int wil_cid_fill_sinfo(struct wil6210_priv *wil, int cid,
 904                        struct station_info *sinfo);
 905
 906 struct wireless_dev *wil_cfg80211_init(struct device *dev);
 907 void wil_wdev_free(struct wil6210_priv *wil);
 908 void wil_p2p_wdev_free(struct wil6210_priv *wil);
 909
 910 int wmi_set_mac_address(struct wil6210_priv *wil, void *addr);
 911 int wmi_pcp_start(struct wil6210_priv *wil, int bi, u8 wmi_nettype,
 912                   u8 chan, u8 hidden_ssid, u8 is_go);
 913 int wmi_pcp_stop(struct wil6210_priv *wil);
 914 int wmi_led_cfg(struct wil6210_priv *wil, bool enable);
 915 int wmi_abort_scan(struct wil6210_priv *wil);
 916 void wil_abort_scan(struct wil6210_priv *wil, bool sync);
 917 void wil6210_bus_request(struct wil6210_priv *wil, u32 kbps);
 918 void wil6210_disconnect(struct wil6210_priv *wil, const u8 *bssid,
 919                         u16 reason_code, bool from_event);
 920 void wil_probe_client_flush(struct wil6210_priv *wil);
 921 void wil_probe_client_worker(struct work_struct *work);
 922
 923 int wil_rx_init(struct wil6210_priv *wil, u16 size);
 924 void wil_rx_fini(struct wil6210_priv *wil);
 925
 926 /* TX API */
 927 int wil_vring_init_tx(struct wil6210_priv *wil, int id, int size,
 928                       int cid, int tid);
 929 void wil_vring_fini_tx(struct wil6210_priv *wil, int id);
 930 int wil_tx_init(struct wil6210_priv *wil, int cid);
 931 int wil_vring_init_bcast(struct wil6210_priv *wil, int id, int size);
 932 int wil_bcast_init(struct wil6210_priv *wil);
 933 void wil_bcast_fini(struct wil6210_priv *wil);
 934
 935 void wil_update_net_queues(struct wil6210_priv *wil, struct vring *vring,
 936                            bool should_stop);
 937 void wil_update_net_queues_bh(struct wil6210_priv *wil, struct vring *vring,
 938                               bool check_stop);
 939 netdev_tx_t wil_start_xmit(struct sk_buff *skb, struct net_device *ndev);
 940 int wil_tx_complete(struct wil6210_priv *wil, int ringid);
 941 void wil6210_unmask_irq_tx(struct wil6210_priv *wil);
 942
 943 /* RX API */
 944 void wil_rx_handle(struct wil6210_priv *wil, int *quota);
 945 void wil6210_unmask_irq_rx(struct wil6210_priv *wil);
 946
 947 int wil_iftype_nl2wmi(enum nl80211_iftype type);
 948
 949 int wil_ioctl(struct wil6210_priv *wil, void __user *data, int cmd);
 950 int wil_request_firmware(struct wil6210_priv *wil, const char *name,
 951                          bool load);
 952 bool wil_fw_verify_file_exists(struct wil6210_priv *wil, const char *name);
 953
 954 int wil_can_suspend(struct wil6210_priv *wil, bool is_runtime);
 955 int wil_suspend(struct wil6210_priv *wil, bool is_runtime);
 956 int wil_resume(struct wil6210_priv *wil, bool is_runtime);
 957
 958 int wil_fw_copy_crash_dump(struct wil6210_priv *wil, void *dest, u32 size);
 959 void wil_fw_core_dump(struct wil6210_priv *wil);
 960
 961 void wil_halp_vote(struct wil6210_priv *wil);
 962 void wil_halp_unvote(struct wil6210_priv *wil);
 963 void wil6210_set_halp(struct wil6210_priv *wil);
 964 void wil6210_clear_halp(struct wil6210_priv *wil);
 965
 966 #endif /* __WIL6210_H__ */