2 * Copyright (c) 2012 Qualcomm Atheros, Inc.
4 * Permission to use, copy, modify, and/or distribute this software for any
5 * purpose with or without fee is hereby granted, provided that the above
6 * copyright notice and this permission notice appear in all copies.
8 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
9 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
10 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
11 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
12 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
13 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
14 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
20 #include <linux/netdevice.h>
21 #include <linux/wireless.h>
22 #include <net/cfg80211.h>
24 #define WIL_NAME "wil6210"
27 * extract bits [@b0:@b1] (inclusive) from the value @x
28 * it should be @b0 <= @b1, or result is incorrect
30 static inline u32
WIL_GET_BITS(u32 x
, int b0
, int b1
)
32 return (x
>> b0
) & ((1 << (b1
- b0
+ 1)) - 1);
35 #define WIL6210_MEM_SIZE (2*1024*1024UL)
37 #define WIL6210_RX_RING_SIZE (128)
38 #define WIL6210_TX_RING_SIZE (128)
39 #define WIL6210_MAX_TX_RINGS (24) /* HW limit */
40 #define WIL6210_MAX_CID (8) /* HW limit */
41 #define WIL6210_NAPI_BUDGET (16) /* arbitrary */
42 #define WIL6210_ITR_TRSH (10000) /* arbitrary - about 15 IRQs/msec */
44 /* Hardware definitions begin */
48 * RGF File | Host addr | FW addr
50 * user_rgf | 0x000000 | 0x880000
51 * dma_rgf | 0x001000 | 0x881000
52 * pcie_rgf | 0x002000 | 0x882000
56 /* Where various structures placed in host address space */
57 #define WIL6210_FW_HOST_OFF (0x880000UL)
59 #define HOSTADDR(fwaddr) (fwaddr - WIL6210_FW_HOST_OFF)
62 * Interrupt control registers block
64 * each interrupt controlled by the same bit in all registers
67 u32 ICC
; /* Cause Control, RW: 0 - W1C, 1 - COR */
68 u32 ICR
; /* Cause, W1C/COR depending on ICC */
69 u32 ICM
; /* Cause masked (ICR & ~IMV), W1C/COR depending on ICC */
70 u32 ICS
; /* Cause Set, WO */
71 u32 IMV
; /* Mask, RW+S/C */
72 u32 IMS
; /* Mask Set, write 1 to set */
73 u32 IMC
; /* Mask Clear, write 1 to clear */
76 /* registers - FW addresses */
77 #define RGF_USER_USER_SCRATCH_PAD (0x8802bc)
78 #define RGF_USER_USER_ICR (0x880b4c) /* struct RGF_ICR */
79 #define BIT_USER_USER_ICR_SW_INT_2 BIT(18)
80 #define RGF_USER_CLKS_CTL_SW_RST_MASK_0 (0x880b14)
81 #define RGF_USER_MAC_CPU_0 (0x8801fc)
82 #define RGF_USER_USER_CPU_0 (0x8801e0)
83 #define RGF_USER_CLKS_CTL_SW_RST_VEC_0 (0x880b04)
84 #define RGF_USER_CLKS_CTL_SW_RST_VEC_1 (0x880b08)
85 #define RGF_USER_CLKS_CTL_SW_RST_VEC_2 (0x880b0c)
86 #define RGF_USER_CLKS_CTL_SW_RST_VEC_3 (0x880b10)
88 #define RGF_DMA_PSEUDO_CAUSE (0x881c68)
89 #define RGF_DMA_PSEUDO_CAUSE_MASK_SW (0x881c6c)
90 #define RGF_DMA_PSEUDO_CAUSE_MASK_FW (0x881c70)
91 #define BIT_DMA_PSEUDO_CAUSE_RX BIT(0)
92 #define BIT_DMA_PSEUDO_CAUSE_TX BIT(1)
93 #define BIT_DMA_PSEUDO_CAUSE_MISC BIT(2)
95 #define RGF_DMA_EP_TX_ICR (0x881bb4) /* struct RGF_ICR */
96 #define BIT_DMA_EP_TX_ICR_TX_DONE BIT(0)
97 #define BIT_DMA_EP_TX_ICR_TX_DONE_N(n) BIT(n+1) /* n = [0..23] */
98 #define RGF_DMA_EP_RX_ICR (0x881bd0) /* struct RGF_ICR */
99 #define BIT_DMA_EP_RX_ICR_RX_DONE BIT(0)
100 #define RGF_DMA_EP_MISC_ICR (0x881bec) /* struct RGF_ICR */
101 #define BIT_DMA_EP_MISC_ICR_RX_HTRSH BIT(0)
102 #define BIT_DMA_EP_MISC_ICR_TX_NO_ACT BIT(1)
103 #define BIT_DMA_EP_MISC_ICR_FW_INT(n) BIT(28+n) /* n = [0..3] */
105 /* Interrupt moderation control */
106 #define RGF_DMA_ITR_CNT_TRSH (0x881c5c)
107 #define RGF_DMA_ITR_CNT_DATA (0x881c60)
108 #define RGF_DMA_ITR_CNT_CRL (0x881C64)
109 #define BIT_DMA_ITR_CNT_CRL_EN BIT(0)
110 #define BIT_DMA_ITR_CNT_CRL_EXT_TICK BIT(1)
111 #define BIT_DMA_ITR_CNT_CRL_FOREVER BIT(2)
112 #define BIT_DMA_ITR_CNT_CRL_CLR BIT(3)
113 #define BIT_DMA_ITR_CNT_CRL_REACH_TRSH BIT(4)
115 /* popular locations */
116 #define HOST_MBOX HOSTADDR(RGF_USER_USER_SCRATCH_PAD)
117 #define HOST_SW_INT (HOSTADDR(RGF_USER_USER_ICR) + \
118 offsetof(struct RGF_ICR, ICS))
119 #define SW_INT_MBOX BIT_USER_USER_ICR_SW_INT_2
121 /* ISR register bits */
122 #define ISR_MISC_FW_READY BIT_DMA_EP_MISC_ICR_FW_INT(0)
123 #define ISR_MISC_MBOX_EVT BIT_DMA_EP_MISC_ICR_FW_INT(1)
124 #define ISR_MISC_FW_ERROR BIT_DMA_EP_MISC_ICR_FW_INT(3)
126 /* Hardware definitions end */
129 * mk_cidxtid - construct @cidxtid field
133 * @cidxtid field encoded as bits 0..3 - CID; 4..7 - TID
135 static inline u8
mk_cidxtid(u8 cid
, u8 tid
)
137 return ((tid
& 0xf) << 4) | (cid
& 0xf);
141 * parse_cidxtid - parse @cidxtid field
142 * @cid: store CID value here
143 * @tid: store TID value here
145 * @cidxtid field encoded as bits 0..3 - CID; 4..7 - TID
147 static inline void parse_cidxtid(u8 cidxtid
, u8
*cid
, u8
*tid
)
149 *cid
= cidxtid
& 0xf;
150 *tid
= (cidxtid
>> 4) & 0xf;
153 struct wil6210_mbox_ring
{
155 u16 entry_size
; /* max. size of mbox entry, incl. all headers */
161 struct wil6210_mbox_ring_desc
{
166 /* at HOST_OFF_WIL6210_MBOX_CTL */
167 struct wil6210_mbox_ctl
{
168 struct wil6210_mbox_ring tx
;
169 struct wil6210_mbox_ring rx
;
172 struct wil6210_mbox_hdr
{
174 __le16 len
; /* payload, bytes after this header */
180 #define WIL_MBOX_HDR_TYPE_WMI (0)
182 /* max. value for wil6210_mbox_hdr.len */
183 #define MAX_MBOXITEM_SIZE (240)
186 * struct wil6210_mbox_hdr_wmi - WMI header
189 * 00 - default, created by FW
190 * 01..0f - WiFi ports, driver to create
193 * @id: command/event ID
194 * @timestamp: FW fills for events, free-running msec timer
196 struct wil6210_mbox_hdr_wmi
{
203 struct pending_wmi_event
{
204 struct list_head list
;
206 struct wil6210_mbox_hdr hdr
;
207 struct wil6210_mbox_hdr_wmi wmi
;
212 enum { /* for wil_ctx.mapped_as */
213 wil_mapped_as_none
= 0,
214 wil_mapped_as_single
= 1,
215 wil_mapped_as_page
= 2,
219 * struct wil_ctx - software context for Vring descriptor
231 volatile union vring_desc
*va
; /* vring_desc[size], WriteBack by DMA */
232 u16 size
; /* number of vring_desc elements */
235 u32 hwtail
; /* write here to inform hw */
236 struct wil_ctx
*ctx
; /* ctx[size] - software context */
239 enum { /* for wil6210_priv.status */
240 wil_status_fwready
= 0,
241 wil_status_fwconnecting
,
242 wil_status_fwconnected
,
244 wil_status_reset_done
,
245 wil_status_irqen
, /* FIXME: interrupts enabled - for debug */
251 * struct tid_ampdu_rx - TID aggregation information (Rx).
253 * @reorder_buf: buffer to reorder incoming aggregated MPDUs
254 * @reorder_time: jiffies when skb was added
255 * @session_timer: check if peer keeps Tx-ing on the TID (by timeout value)
256 * @reorder_timer: releases expired frames from the reorder buffer.
257 * @last_rx: jiffies of last rx activity
258 * @head_seq_num: head sequence number in reordering buffer.
259 * @stored_mpdu_num: number of MPDUs in reordering buffer
260 * @ssn: Starting Sequence Number expected to be aggregated.
261 * @buf_size: buffer size for incoming A-MPDUs
262 * @timeout: reset timer value (in TUs).
263 * @dialog_token: dialog token for aggregation session
264 * @rcu_head: RCU head used for freeing this struct
265 * @reorder_lock: serializes access to reorder buffer, see below.
267 * This structure's lifetime is managed by RCU, assignments to
268 * the array holding it must hold the aggregation mutex.
270 * The @reorder_lock is used to protect the members of this
271 * struct, except for @timeout, @buf_size and @dialog_token,
272 * which are constant across the lifetime of the struct (the
273 * dialog token being used only for debugging).
275 struct wil_tid_ampdu_rx
{
276 spinlock_t reorder_lock
; /* see above */
277 struct sk_buff
**reorder_buf
;
278 unsigned long *reorder_time
;
279 struct timer_list session_timer
;
280 struct timer_list reorder_timer
;
281 unsigned long last_rx
;
290 struct wil6210_stats
{
294 u16 bf_mcs
; /* last BF, used for Tx */
301 enum wil_sta_status
{
303 wil_sta_conn_pending
= 1,
304 wil_sta_connected
= 2,
307 #define WIL_STA_TID_NUM (16)
309 struct wil_net_stats
{
310 unsigned long rx_packets
;
311 unsigned long tx_packets
;
312 unsigned long rx_bytes
;
313 unsigned long tx_bytes
;
314 unsigned long tx_errors
;
315 unsigned long rx_dropped
;
320 * struct wil_sta_info - data for peer
322 * Peer identified by its CID (connection ID)
323 * NIC performs beam forming for each peer;
324 * if no beam forming done, frame exchange is not
327 struct wil_sta_info
{
329 enum wil_sta_status status
;
330 struct wil_net_stats stats
;
331 bool data_port_open
; /* can send any data, not only EAPOL */
333 struct wil_tid_ampdu_rx
*tid_rx
[WIL_STA_TID_NUM
];
334 unsigned long tid_rx_timer_expired
[BITS_TO_LONGS(WIL_STA_TID_NUM
)];
335 unsigned long tid_rx_stop_requested
[BITS_TO_LONGS(WIL_STA_TID_NUM
)];
338 struct wil6210_priv
{
339 struct pci_dev
*pdev
;
341 struct wireless_dev
*wdev
;
345 u8 n_mids
; /* number of additional MIDs as reported by FW */
348 u32 secure_pcp
; /* create secure PCP? */
350 /* cached ISR registers */
352 /* mailbox related */
353 struct mutex wmi_mutex
;
354 struct wil6210_mbox_ctl mbox_ctl
;
355 struct completion wmi_ready
;
357 u16 reply_id
; /**< wait for this WMI event */
360 struct workqueue_struct
*wmi_wq
; /* for deferred calls */
361 struct work_struct wmi_event_worker
;
362 struct workqueue_struct
*wmi_wq_conn
; /* for connect worker */
363 struct work_struct connect_worker
;
364 struct work_struct disconnect_worker
;
365 struct timer_list connect_timer
;
366 int pending_connect_cid
;
367 struct list_head pending_wmi_ev
;
369 * protect pending_wmi_ev
370 * - fill in IRQ from wil6210_irq_misc,
371 * - consumed in thread by wmi_event_worker
373 spinlock_t wmi_ev_lock
;
374 struct napi_struct napi_rx
;
375 struct napi_struct napi_tx
;
377 struct vring vring_rx
;
378 struct vring vring_tx
[WIL6210_MAX_TX_RINGS
];
379 u8 vring2cid_tid
[WIL6210_MAX_TX_RINGS
][2]; /* [0] - CID, [1] - TID */
380 struct wil_sta_info sta
[WIL6210_MAX_CID
];
382 struct cfg80211_scan_request
*scan_request
;
384 struct mutex mutex
; /* for wil6210_priv access in wil_{up|down} */
386 struct wil6210_stats stats
;
388 struct dentry
*debug
;
389 struct debugfs_blob_wrapper fw_code_blob
;
390 struct debugfs_blob_wrapper fw_data_blob
;
391 struct debugfs_blob_wrapper fw_peri_blob
;
392 struct debugfs_blob_wrapper uc_code_blob
;
393 struct debugfs_blob_wrapper uc_data_blob
;
394 struct debugfs_blob_wrapper rgf_blob
;
397 #define wil_to_wiphy(i) (i->wdev->wiphy)
398 #define wil_to_dev(i) (wiphy_dev(wil_to_wiphy(i)))
399 #define wiphy_to_wil(w) (struct wil6210_priv *)(wiphy_priv(w))
400 #define wil_to_wdev(i) (i->wdev)
401 #define wdev_to_wil(w) (struct wil6210_priv *)(wdev_priv(w))
402 #define wil_to_ndev(i) (wil_to_wdev(i)->netdev)
403 #define ndev_to_wil(n) (wdev_to_wil(n->ieee80211_ptr))
405 int wil_dbg_trace(struct wil6210_priv
*wil
, const char *fmt
, ...);
406 int wil_err(struct wil6210_priv
*wil
, const char *fmt
, ...);
407 int wil_info(struct wil6210_priv
*wil
, const char *fmt
, ...);
408 #define wil_dbg(wil, fmt, arg...) do { \
409 netdev_dbg(wil_to_ndev(wil), fmt, ##arg); \
410 wil_dbg_trace(wil, fmt, ##arg); \
413 #define wil_dbg_irq(wil, fmt, arg...) wil_dbg(wil, "DBG[ IRQ]" fmt, ##arg)
414 #define wil_dbg_txrx(wil, fmt, arg...) wil_dbg(wil, "DBG[TXRX]" fmt, ##arg)
415 #define wil_dbg_wmi(wil, fmt, arg...) wil_dbg(wil, "DBG[ WMI]" fmt, ##arg)
416 #define wil_dbg_misc(wil, fmt, arg...) wil_dbg(wil, "DBG[MISC]" fmt, ##arg)
418 #define wil_hex_dump_txrx(prefix_str, prefix_type, rowsize, \
419 groupsize, buf, len, ascii) \
420 print_hex_dump_debug("DBG[TXRX]" prefix_str,\
421 prefix_type, rowsize, \
422 groupsize, buf, len, ascii)
424 #define wil_hex_dump_wmi(prefix_str, prefix_type, rowsize, \
425 groupsize, buf, len, ascii) \
426 print_hex_dump_debug("DBG[ WMI]" prefix_str,\
427 prefix_type, rowsize, \
428 groupsize, buf, len, ascii)
430 void wil_memcpy_fromio_32(void *dst
, const volatile void __iomem
*src
,
432 void wil_memcpy_toio_32(volatile void __iomem
*dst
, const void *src
,
435 void *wil_if_alloc(struct device
*dev
, void __iomem
*csr
);
436 void wil_if_free(struct wil6210_priv
*wil
);
437 int wil_if_add(struct wil6210_priv
*wil
);
438 void wil_if_remove(struct wil6210_priv
*wil
);
439 int wil_priv_init(struct wil6210_priv
*wil
);
440 void wil_priv_deinit(struct wil6210_priv
*wil
);
441 int wil_reset(struct wil6210_priv
*wil
);
442 void wil_link_on(struct wil6210_priv
*wil
);
443 void wil_link_off(struct wil6210_priv
*wil
);
444 int wil_up(struct wil6210_priv
*wil
);
445 int wil_down(struct wil6210_priv
*wil
);
446 void wil_mbox_ring_le2cpus(struct wil6210_mbox_ring
*r
);
447 int wil_find_cid(struct wil6210_priv
*wil
, const u8
*mac
);
449 void __iomem
*wmi_buffer(struct wil6210_priv
*wil
, __le32 ptr
);
450 void __iomem
*wmi_addr(struct wil6210_priv
*wil
, u32 ptr
);
451 int wmi_read_hdr(struct wil6210_priv
*wil
, __le32 ptr
,
452 struct wil6210_mbox_hdr
*hdr
);
453 int wmi_send(struct wil6210_priv
*wil
, u16 cmdid
, void *buf
, u16 len
);
454 void wmi_recv_cmd(struct wil6210_priv
*wil
);
455 int wmi_call(struct wil6210_priv
*wil
, u16 cmdid
, void *buf
, u16 len
,
456 u16 reply_id
, void *reply
, u8 reply_size
, int to_msec
);
457 void wmi_event_worker(struct work_struct
*work
);
458 void wmi_event_flush(struct wil6210_priv
*wil
);
459 int wmi_set_ssid(struct wil6210_priv
*wil
, u8 ssid_len
, const void *ssid
);
460 int wmi_get_ssid(struct wil6210_priv
*wil
, u8
*ssid_len
, void *ssid
);
461 int wmi_set_channel(struct wil6210_priv
*wil
, int channel
);
462 int wmi_get_channel(struct wil6210_priv
*wil
, int *channel
);
463 int wmi_del_cipher_key(struct wil6210_priv
*wil
, u8 key_index
,
464 const void *mac_addr
);
465 int wmi_add_cipher_key(struct wil6210_priv
*wil
, u8 key_index
,
466 const void *mac_addr
, int key_len
, const void *key
);
467 int wmi_echo(struct wil6210_priv
*wil
);
468 int wmi_set_ie(struct wil6210_priv
*wil
, u8 type
, u16 ie_len
, const void *ie
);
469 int wmi_rx_chain_add(struct wil6210_priv
*wil
, struct vring
*vring
);
470 int wmi_p2p_cfg(struct wil6210_priv
*wil
, int channel
);
471 int wmi_rxon(struct wil6210_priv
*wil
, bool on
);
472 int wmi_get_temperature(struct wil6210_priv
*wil
, u32
*t_m
, u32
*t_r
);
473 int wmi_disconnect_sta(struct wil6210_priv
*wil
, const u8
*mac
, u16 reason
);
475 int wil6210_init_irq(struct wil6210_priv
*wil
, int irq
);
476 void wil6210_fini_irq(struct wil6210_priv
*wil
, int irq
);
477 void wil6210_disable_irq(struct wil6210_priv
*wil
);
478 void wil6210_enable_irq(struct wil6210_priv
*wil
);
480 int wil6210_debugfs_init(struct wil6210_priv
*wil
);
481 void wil6210_debugfs_remove(struct wil6210_priv
*wil
);
483 struct wireless_dev
*wil_cfg80211_init(struct device
*dev
);
484 void wil_wdev_free(struct wil6210_priv
*wil
);
486 int wmi_set_mac_address(struct wil6210_priv
*wil
, void *addr
);
487 int wmi_pcp_start(struct wil6210_priv
*wil
, int bi
, u8 wmi_nettype
, u8 chan
);
488 int wmi_pcp_stop(struct wil6210_priv
*wil
);
489 void wil6210_disconnect(struct wil6210_priv
*wil
, void *bssid
);
491 int wil_rx_init(struct wil6210_priv
*wil
);
492 void wil_rx_fini(struct wil6210_priv
*wil
);
495 int wil_vring_init_tx(struct wil6210_priv
*wil
, int id
, int size
,
497 void wil_vring_fini_tx(struct wil6210_priv
*wil
, int id
);
499 netdev_tx_t
wil_start_xmit(struct sk_buff
*skb
, struct net_device
*ndev
);
500 int wil_tx_complete(struct wil6210_priv
*wil
, int ringid
);
501 void wil6210_unmask_irq_tx(struct wil6210_priv
*wil
);
504 void wil_rx_handle(struct wil6210_priv
*wil
, int *quota
);
505 void wil6210_unmask_irq_rx(struct wil6210_priv
*wil
);
507 int wil_iftype_nl2wmi(enum nl80211_iftype type
);
509 #endif /* __WIL6210_H__ */