2 * Copyright (c) 2012-2017 Qualcomm Atheros, Inc.
4 * Permission to use, copy, modify, and/or distribute this software for any
5 * purpose with or without fee is hereby granted, provided that the above
6 * copyright notice and this permission notice appear in all copies.
8 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
9 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
10 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
11 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
12 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
13 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
14 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
20 #include <linux/etherdevice.h>
21 #include <linux/netdevice.h>
22 #include <linux/wireless.h>
23 #include <net/cfg80211.h>
24 #include <linux/timex.h>
25 #include <linux/types.h>
27 #include "wil_platform.h"
29 extern bool no_fw_recovery
;
30 extern unsigned int mtu_max
;
31 extern unsigned short rx_ring_overflow_thrsh
;
33 extern u32 vring_idle_trsh
;
34 extern bool rx_align_2
;
35 extern bool rx_large_buf
;
37 extern bool disable_ap_sme
;
39 #define WIL_NAME "wil6210"
41 #define WIL_FW_NAME_DEFAULT "wil6210.fw"
42 #define WIL_FW_NAME_FTM_DEFAULT "wil6210_ftm.fw"
44 #define WIL_FW_NAME_SPARROW_PLUS "wil6210_sparrow_plus.fw"
45 #define WIL_FW_NAME_FTM_SPARROW_PLUS "wil6210_sparrow_plus_ftm.fw"
47 #define WIL_BOARD_FILE_NAME "wil6210.brd" /* board & radio parameters */
49 #define WIL_DEFAULT_BUS_REQUEST_KBPS 128000 /* ~1Gbps */
50 #define WIL_MAX_BUS_REQUEST_KBPS 800000 /* ~6.1Gbps */
53 * extract bits [@b0:@b1] (inclusive) from the value @x
54 * it should be @b0 <= @b1, or result is incorrect
56 static inline u32
WIL_GET_BITS(u32 x
, int b0
, int b1
)
58 return (x
>> b0
) & ((1 << (b1
- b0
+ 1)) - 1);
61 #define WIL6210_MIN_MEM_SIZE (2 * 1024 * 1024UL)
62 #define WIL6210_MAX_MEM_SIZE (4 * 1024 * 1024UL)
64 #define WIL_TX_Q_LEN_DEFAULT (4000)
65 #define WIL_RX_RING_SIZE_ORDER_DEFAULT (10)
66 #define WIL_TX_RING_SIZE_ORDER_DEFAULT (12)
67 #define WIL_BCAST_RING_SIZE_ORDER_DEFAULT (7)
68 #define WIL_BCAST_MCS0_LIMIT (1024) /* limit for MCS0 frame size */
69 /* limit ring size in range [32..32k] */
70 #define WIL_RING_SIZE_ORDER_MIN (5)
71 #define WIL_RING_SIZE_ORDER_MAX (15)
72 #define WIL6210_MAX_TX_RINGS (24) /* HW limit */
73 #define WIL6210_MAX_CID (8) /* HW limit */
74 #define WIL6210_NAPI_BUDGET (16) /* arbitrary */
75 #define WIL_MAX_AMPDU_SIZE (64 * 1024) /* FW/HW limit */
76 #define WIL_MAX_AGG_WSIZE (32) /* FW/HW limit */
77 /* Hardware offload block adds the following:
78 * 26 bytes - 3-address QoS data header
79 * 8 bytes - IV + EIV (for GCMP)
81 * 16 bytes - MIC (for GCMP)
84 #define WIL_MAX_MPDU_OVERHEAD (62)
86 struct wil_suspend_stats
{
87 unsigned long successful_suspends
;
88 unsigned long failed_suspends
;
89 unsigned long successful_resumes
;
90 unsigned long failed_resumes
;
91 unsigned long rejected_by_device
;
92 unsigned long rejected_by_host
;
93 unsigned long long total_suspend_time
;
94 unsigned long long min_suspend_time
;
95 unsigned long long max_suspend_time
;
96 ktime_t collection_start
;
97 ktime_t suspend_start_time
;
100 /* Calculate MAC buffer size for the firmware. It includes all overhead,
101 * as it will go over the air, and need to be 8 byte aligned
103 static inline u32
wil_mtu2macbuf(u32 mtu
)
105 return ALIGN(mtu
+ WIL_MAX_MPDU_OVERHEAD
, 8);
108 /* MTU for Ethernet need to take into account 8-byte SNAP header
109 * to be added when encapsulating Ethernet frame into 802.11
111 #define WIL_MAX_ETH_MTU (IEEE80211_MAX_DATA_LEN_DMG - 8)
112 /* Max supported by wil6210 value for interrupt threshold is 5sec. */
113 #define WIL6210_ITR_TRSH_MAX (5000000)
114 #define WIL6210_ITR_TX_INTERFRAME_TIMEOUT_DEFAULT (13) /* usec */
115 #define WIL6210_ITR_RX_INTERFRAME_TIMEOUT_DEFAULT (13) /* usec */
116 #define WIL6210_ITR_TX_MAX_BURST_DURATION_DEFAULT (500) /* usec */
117 #define WIL6210_ITR_RX_MAX_BURST_DURATION_DEFAULT (500) /* usec */
118 #define WIL6210_FW_RECOVERY_RETRIES (5) /* try to recover this many times */
119 #define WIL6210_FW_RECOVERY_TO msecs_to_jiffies(5000)
120 #define WIL6210_SCAN_TO msecs_to_jiffies(10000)
121 #define WIL6210_DISCONNECT_TO_MS (2000)
122 #define WIL6210_RX_HIGH_TRSH_INIT (0)
123 #define WIL6210_RX_HIGH_TRSH_DEFAULT \
124 (1 << (WIL_RX_RING_SIZE_ORDER_DEFAULT - 3))
125 #define WIL_MAX_DMG_AID 254 /* for DMG only 1-254 allowed (see
126 * 802.11REVmc/D5.0, section 9.4.1.8)
128 /* Hardware definitions begin */
132 * RGF File | Host addr | FW addr
134 * user_rgf | 0x000000 | 0x880000
135 * dma_rgf | 0x001000 | 0x881000
136 * pcie_rgf | 0x002000 | 0x882000
140 /* Where various structures placed in host address space */
141 #define WIL6210_FW_HOST_OFF (0x880000UL)
143 #define HOSTADDR(fwaddr) (fwaddr - WIL6210_FW_HOST_OFF)
146 * Interrupt control registers block
148 * each interrupt controlled by the same bit in all registers
151 u32 ICC
; /* Cause Control, RW: 0 - W1C, 1 - COR */
152 u32 ICR
; /* Cause, W1C/COR depending on ICC */
153 u32 ICM
; /* Cause masked (ICR & ~IMV), W1C/COR depending on ICC */
154 u32 ICS
; /* Cause Set, WO */
155 u32 IMV
; /* Mask, RW+S/C */
156 u32 IMS
; /* Mask Set, write 1 to set */
157 u32 IMC
; /* Mask Clear, write 1 to clear */
160 /* registers - FW addresses */
161 #define RGF_USER_USAGE_1 (0x880004)
162 #define RGF_USER_USAGE_6 (0x880018)
163 #define BIT_USER_OOB_MODE BIT(31)
164 #define BIT_USER_OOB_R2_MODE BIT(30)
165 #define RGF_USER_HW_MACHINE_STATE (0x8801dc)
166 #define HW_MACHINE_BOOT_DONE (0x3fffffd)
167 #define RGF_USER_USER_CPU_0 (0x8801e0)
168 #define BIT_USER_USER_CPU_MAN_RST BIT(1) /* user_cpu_man_rst */
169 #define RGF_USER_MAC_CPU_0 (0x8801fc)
170 #define BIT_USER_MAC_CPU_MAN_RST BIT(1) /* mac_cpu_man_rst */
171 #define RGF_USER_USER_SCRATCH_PAD (0x8802bc)
172 #define RGF_USER_BL (0x880A3C) /* Boot Loader */
173 #define RGF_USER_FW_REV_ID (0x880a8c) /* chip revision */
174 #define RGF_USER_FW_CALIB_RESULT (0x880a90) /* b0-7:result
177 #define CALIB_RESULT_SIGNATURE (0x11)
178 #define RGF_USER_CLKS_CTL_0 (0x880abc)
179 #define BIT_USER_CLKS_CAR_AHB_SW_SEL BIT(1) /* ref clk/PLL */
180 #define BIT_USER_CLKS_RST_PWGD BIT(11) /* reset on "power good" */
181 #define RGF_USER_CLKS_CTL_SW_RST_VEC_0 (0x880b04)
182 #define RGF_USER_CLKS_CTL_SW_RST_VEC_1 (0x880b08)
183 #define RGF_USER_CLKS_CTL_SW_RST_VEC_2 (0x880b0c)
184 #define RGF_USER_CLKS_CTL_SW_RST_VEC_3 (0x880b10)
185 #define RGF_USER_CLKS_CTL_SW_RST_MASK_0 (0x880b14)
186 #define BIT_HPAL_PERST_FROM_PAD BIT(6)
187 #define BIT_CAR_PERST_RST BIT(7)
188 #define RGF_USER_USER_ICR (0x880b4c) /* struct RGF_ICR */
189 #define BIT_USER_USER_ICR_SW_INT_2 BIT(18)
190 #define RGF_USER_CLKS_CTL_EXT_SW_RST_VEC_0 (0x880c18)
191 #define RGF_USER_CLKS_CTL_EXT_SW_RST_VEC_1 (0x880c2c)
192 #define RGF_USER_SPARROW_M_4 (0x880c50) /* Sparrow */
193 #define BIT_SPARROW_M_4_SEL_SLEEP_OR_REF BIT(2)
195 #define RGF_DMA_EP_TX_ICR (0x881bb4) /* struct RGF_ICR */
196 #define BIT_DMA_EP_TX_ICR_TX_DONE BIT(0)
197 #define BIT_DMA_EP_TX_ICR_TX_DONE_N(n) BIT(n+1) /* n = [0..23] */
198 #define RGF_DMA_EP_RX_ICR (0x881bd0) /* struct RGF_ICR */
199 #define BIT_DMA_EP_RX_ICR_RX_DONE BIT(0)
200 #define BIT_DMA_EP_RX_ICR_RX_HTRSH BIT(1)
201 #define RGF_DMA_EP_MISC_ICR (0x881bec) /* struct RGF_ICR */
202 #define BIT_DMA_EP_MISC_ICR_RX_HTRSH BIT(0)
203 #define BIT_DMA_EP_MISC_ICR_TX_NO_ACT BIT(1)
204 #define BIT_DMA_EP_MISC_ICR_HALP BIT(27)
205 #define BIT_DMA_EP_MISC_ICR_FW_INT(n) BIT(28+n) /* n = [0..3] */
207 /* Legacy interrupt moderation control (before Sparrow v2)*/
208 #define RGF_DMA_ITR_CNT_TRSH (0x881c5c)
209 #define RGF_DMA_ITR_CNT_DATA (0x881c60)
210 #define RGF_DMA_ITR_CNT_CRL (0x881c64)
211 #define BIT_DMA_ITR_CNT_CRL_EN BIT(0)
212 #define BIT_DMA_ITR_CNT_CRL_EXT_TICK BIT(1)
213 #define BIT_DMA_ITR_CNT_CRL_FOREVER BIT(2)
214 #define BIT_DMA_ITR_CNT_CRL_CLR BIT(3)
215 #define BIT_DMA_ITR_CNT_CRL_REACH_TRSH BIT(4)
217 /* Offload control (Sparrow B0+) */
218 #define RGF_DMA_OFUL_NID_0 (0x881cd4)
219 #define BIT_DMA_OFUL_NID_0_RX_EXT_TR_EN BIT(0)
220 #define BIT_DMA_OFUL_NID_0_TX_EXT_TR_EN BIT(1)
221 #define BIT_DMA_OFUL_NID_0_RX_EXT_A3_SRC BIT(2)
222 #define BIT_DMA_OFUL_NID_0_TX_EXT_A3_SRC BIT(3)
224 /* New (sparrow v2+) interrupt moderation control */
225 #define RGF_DMA_ITR_TX_DESQ_NO_MOD (0x881d40)
226 #define RGF_DMA_ITR_TX_CNT_TRSH (0x881d34)
227 #define RGF_DMA_ITR_TX_CNT_DATA (0x881d38)
228 #define RGF_DMA_ITR_TX_CNT_CTL (0x881d3c)
229 #define BIT_DMA_ITR_TX_CNT_CTL_EN BIT(0)
230 #define BIT_DMA_ITR_TX_CNT_CTL_EXT_TIC_SEL BIT(1)
231 #define BIT_DMA_ITR_TX_CNT_CTL_FOREVER BIT(2)
232 #define BIT_DMA_ITR_TX_CNT_CTL_CLR BIT(3)
233 #define BIT_DMA_ITR_TX_CNT_CTL_REACHED_TRESH BIT(4)
234 #define BIT_DMA_ITR_TX_CNT_CTL_CROSS_EN BIT(5)
235 #define BIT_DMA_ITR_TX_CNT_CTL_FREE_RUNNIG BIT(6)
236 #define RGF_DMA_ITR_TX_IDL_CNT_TRSH (0x881d60)
237 #define RGF_DMA_ITR_TX_IDL_CNT_DATA (0x881d64)
238 #define RGF_DMA_ITR_TX_IDL_CNT_CTL (0x881d68)
239 #define BIT_DMA_ITR_TX_IDL_CNT_CTL_EN BIT(0)
240 #define BIT_DMA_ITR_TX_IDL_CNT_CTL_EXT_TIC_SEL BIT(1)
241 #define BIT_DMA_ITR_TX_IDL_CNT_CTL_FOREVER BIT(2)
242 #define BIT_DMA_ITR_TX_IDL_CNT_CTL_CLR BIT(3)
243 #define BIT_DMA_ITR_TX_IDL_CNT_CTL_REACHED_TRESH BIT(4)
244 #define RGF_DMA_ITR_RX_DESQ_NO_MOD (0x881d50)
245 #define RGF_DMA_ITR_RX_CNT_TRSH (0x881d44)
246 #define RGF_DMA_ITR_RX_CNT_DATA (0x881d48)
247 #define RGF_DMA_ITR_RX_CNT_CTL (0x881d4c)
248 #define BIT_DMA_ITR_RX_CNT_CTL_EN BIT(0)
249 #define BIT_DMA_ITR_RX_CNT_CTL_EXT_TIC_SEL BIT(1)
250 #define BIT_DMA_ITR_RX_CNT_CTL_FOREVER BIT(2)
251 #define BIT_DMA_ITR_RX_CNT_CTL_CLR BIT(3)
252 #define BIT_DMA_ITR_RX_CNT_CTL_REACHED_TRESH BIT(4)
253 #define BIT_DMA_ITR_RX_CNT_CTL_CROSS_EN BIT(5)
254 #define BIT_DMA_ITR_RX_CNT_CTL_FREE_RUNNIG BIT(6)
255 #define RGF_DMA_ITR_RX_IDL_CNT_TRSH (0x881d54)
256 #define RGF_DMA_ITR_RX_IDL_CNT_DATA (0x881d58)
257 #define RGF_DMA_ITR_RX_IDL_CNT_CTL (0x881d5c)
258 #define BIT_DMA_ITR_RX_IDL_CNT_CTL_EN BIT(0)
259 #define BIT_DMA_ITR_RX_IDL_CNT_CTL_EXT_TIC_SEL BIT(1)
260 #define BIT_DMA_ITR_RX_IDL_CNT_CTL_FOREVER BIT(2)
261 #define BIT_DMA_ITR_RX_IDL_CNT_CTL_CLR BIT(3)
262 #define BIT_DMA_ITR_RX_IDL_CNT_CTL_REACHED_TRESH BIT(4)
264 #define RGF_DMA_PSEUDO_CAUSE (0x881c68)
265 #define RGF_DMA_PSEUDO_CAUSE_MASK_SW (0x881c6c)
266 #define RGF_DMA_PSEUDO_CAUSE_MASK_FW (0x881c70)
267 #define BIT_DMA_PSEUDO_CAUSE_RX BIT(0)
268 #define BIT_DMA_PSEUDO_CAUSE_TX BIT(1)
269 #define BIT_DMA_PSEUDO_CAUSE_MISC BIT(2)
271 #define RGF_HP_CTRL (0x88265c)
272 #define RGF_PCIE_LOS_COUNTER_CTL (0x882dc4)
274 /* MAC timer, usec, for packet lifetime */
275 #define RGF_MAC_MTRL_COUNTER_0 (0x886aa8)
277 #define RGF_CAF_ICR (0x88946c) /* struct RGF_ICR */
278 #define RGF_CAF_OSC_CONTROL (0x88afa4)
279 #define BIT_CAF_OSC_XTAL_EN BIT(0)
280 #define RGF_CAF_PLL_LOCK_STATUS (0x88afec)
281 #define BIT_CAF_OSC_DIG_XTAL_STABLE BIT(0)
283 #define RGF_USER_JTAG_DEV_ID (0x880b34) /* device ID */
284 #define JTAG_DEV_ID_SPARROW (0x2632072f)
286 #define RGF_USER_REVISION_ID (0x88afe4)
287 #define RGF_USER_REVISION_ID_MASK (3)
288 #define REVISION_ID_SPARROW_B0 (0x0)
289 #define REVISION_ID_SPARROW_D0 (0x3)
291 /* crash codes for FW/Ucode stored here */
292 #define RGF_FW_ASSERT_CODE (0x91f020)
293 #define RGF_UCODE_ASSERT_CODE (0x91f028)
297 HW_VER_SPARROW_B0
, /* REVISION_ID_SPARROW_B0 */
298 HW_VER_SPARROW_D0
, /* REVISION_ID_SPARROW_D0 */
301 /* popular locations */
302 #define RGF_MBOX RGF_USER_USER_SCRATCH_PAD
303 #define HOST_MBOX HOSTADDR(RGF_MBOX)
304 #define SW_INT_MBOX BIT_USER_USER_ICR_SW_INT_2
306 /* ISR register bits */
307 #define ISR_MISC_FW_READY BIT_DMA_EP_MISC_ICR_FW_INT(0)
308 #define ISR_MISC_MBOX_EVT BIT_DMA_EP_MISC_ICR_FW_INT(1)
309 #define ISR_MISC_FW_ERROR BIT_DMA_EP_MISC_ICR_FW_INT(3)
311 #define WIL_DATA_COMPLETION_TO_MS 200
313 /* Hardware definitions end */
315 u32 from
; /* linker address - from, inclusive */
316 u32 to
; /* linker address - to, exclusive */
317 u32 host
; /* PCI/Host address - BAR0 + 0x880000 */
318 const char *name
; /* for debugfs */
319 bool fw
; /* true if FW mapping, false if UCODE mapping */
322 /* array size should be in sync with actual definition in the wmi.c */
323 extern const struct fw_map fw_mapping
[10];
326 * mk_cidxtid - construct @cidxtid field
330 * @cidxtid field encoded as bits 0..3 - CID; 4..7 - TID
332 static inline u8
mk_cidxtid(u8 cid
, u8 tid
)
334 return ((tid
& 0xf) << 4) | (cid
& 0xf);
338 * parse_cidxtid - parse @cidxtid field
339 * @cid: store CID value here
340 * @tid: store TID value here
342 * @cidxtid field encoded as bits 0..3 - CID; 4..7 - TID
344 static inline void parse_cidxtid(u8 cidxtid
, u8
*cid
, u8
*tid
)
346 *cid
= cidxtid
& 0xf;
347 *tid
= (cidxtid
>> 4) & 0xf;
350 struct wil6210_mbox_ring
{
352 u16 entry_size
; /* max. size of mbox entry, incl. all headers */
358 struct wil6210_mbox_ring_desc
{
363 /* at HOST_OFF_WIL6210_MBOX_CTL */
364 struct wil6210_mbox_ctl
{
365 struct wil6210_mbox_ring tx
;
366 struct wil6210_mbox_ring rx
;
369 struct wil6210_mbox_hdr
{
371 __le16 len
; /* payload, bytes after this header */
377 #define WIL_MBOX_HDR_TYPE_WMI (0)
379 /* max. value for wil6210_mbox_hdr.len */
380 #define MAX_MBOXITEM_SIZE (240)
382 struct pending_wmi_event
{
383 struct list_head list
;
385 struct wil6210_mbox_hdr hdr
;
386 struct wmi_cmd_hdr wmi
;
391 enum { /* for wil_ctx.mapped_as */
392 wil_mapped_as_none
= 0,
393 wil_mapped_as_single
= 1,
394 wil_mapped_as_page
= 2,
398 * struct wil_ctx - software context for Vring descriptor
410 volatile union vring_desc
*va
; /* vring_desc[size], WriteBack by DMA */
411 u16 size
; /* number of vring_desc elements */
414 u32 hwtail
; /* write here to inform hw */
415 struct wil_ctx
*ctx
; /* ctx[size] - software context */
419 * Additional data for Tx Vring
421 struct vring_tx_data
{
424 cycles_t idle
, last_idle
, begin
;
425 u8 agg_wsize
; /* agreed aggregation window, 0 - no agg */
428 bool addba_in_progress
; /* if set, agg_xxx is for request in progress */
432 enum { /* for wil6210_priv.status */
433 wil_status_fwready
= 0, /* FW operational */
434 wil_status_fwconnecting
,
435 wil_status_fwconnected
,
437 wil_status_mbox_ready
, /* MBOX structures ready */
438 wil_status_irqen
, /* FIXME: interrupts enabled - for debug */
439 wil_status_napi_en
, /* NAPI enabled protected by wil->mutex */
440 wil_status_resetting
, /* reset in progress */
441 wil_status_suspending
, /* suspend in progress */
442 wil_status_suspended
, /* suspend completed, device is suspended */
443 wil_status_resuming
, /* resume in progress */
444 wil_status_last
/* keep last */
450 * struct tid_ampdu_rx - TID aggregation information (Rx).
452 * @reorder_buf: buffer to reorder incoming aggregated MPDUs
453 * @reorder_time: jiffies when skb was added
454 * @session_timer: check if peer keeps Tx-ing on the TID (by timeout value)
455 * @reorder_timer: releases expired frames from the reorder buffer.
456 * @last_rx: jiffies of last rx activity
457 * @head_seq_num: head sequence number in reordering buffer.
458 * @stored_mpdu_num: number of MPDUs in reordering buffer
459 * @ssn: Starting Sequence Number expected to be aggregated.
460 * @buf_size: buffer size for incoming A-MPDUs
461 * @timeout: reset timer value (in TUs).
462 * @ssn_last_drop: SSN of the last dropped frame
463 * @total: total number of processed incoming frames
464 * @drop_dup: duplicate frames dropped for this reorder buffer
465 * @drop_old: old frames dropped for this reorder buffer
466 * @dialog_token: dialog token for aggregation session
467 * @first_time: true when this buffer used 1-st time
469 struct wil_tid_ampdu_rx
{
470 struct sk_buff
**reorder_buf
;
471 unsigned long *reorder_time
;
472 struct timer_list session_timer
;
473 struct timer_list reorder_timer
;
474 unsigned long last_rx
;
481 unsigned long long total
; /* frames processed */
482 unsigned long long drop_dup
;
483 unsigned long long drop_old
;
485 bool first_time
; /* is it 1-st time this buffer used? */
489 * struct wil_tid_crypto_rx_single - TID crypto information (Rx).
491 * @pn: GCMP PN for the session
492 * @key_set: valid key present
494 struct wil_tid_crypto_rx_single
{
495 u8 pn
[IEEE80211_GCMP_PN_LEN
];
499 struct wil_tid_crypto_rx
{
500 struct wil_tid_crypto_rx_single key_id
[4];
503 struct wil_p2p_info
{
504 struct ieee80211_channel listen_chan
;
505 u8 discovery_started
;
508 struct wireless_dev
*pending_listen_wdev
;
509 unsigned int listen_duration
;
510 struct timer_list discovery_timer
; /* listen/search duration */
511 struct work_struct discovery_expired_work
; /* listen/search expire */
512 struct work_struct delayed_listen_work
; /* listen after scan done */
515 enum wil_sta_status
{
517 wil_sta_conn_pending
= 1,
518 wil_sta_connected
= 2,
521 #define WIL_STA_TID_NUM (16)
522 #define WIL_MCS_MAX (12) /* Maximum MCS supported */
524 struct wil_net_stats
{
525 unsigned long rx_packets
;
526 unsigned long tx_packets
;
527 unsigned long rx_bytes
;
528 unsigned long tx_bytes
;
529 unsigned long tx_errors
;
530 unsigned long rx_dropped
;
531 unsigned long rx_non_data_frame
;
532 unsigned long rx_short_frame
;
533 unsigned long rx_large_frame
;
534 unsigned long rx_replay
;
536 u64 rx_per_mcs
[WIL_MCS_MAX
+ 1];
540 * struct wil_sta_info - data for peer
542 * Peer identified by its CID (connection ID)
543 * NIC performs beam forming for each peer;
544 * if no beam forming done, frame exchange is not
547 struct wil_sta_info
{
549 enum wil_sta_status status
;
550 struct wil_net_stats stats
;
552 struct wil_tid_ampdu_rx
*tid_rx
[WIL_STA_TID_NUM
];
553 spinlock_t tid_rx_lock
; /* guarding tid_rx array */
554 unsigned long tid_rx_timer_expired
[BITS_TO_LONGS(WIL_STA_TID_NUM
)];
555 unsigned long tid_rx_stop_requested
[BITS_TO_LONGS(WIL_STA_TID_NUM
)];
556 struct wil_tid_crypto_rx tid_crypto_rx
[WIL_STA_TID_NUM
];
557 struct wil_tid_crypto_rx group_crypto_rx
;
558 u8 aid
; /* 1-254; 0 if unknown/not reported */
562 fw_recovery_idle
= 0,
563 fw_recovery_pending
= 1,
564 fw_recovery_running
= 2,
571 struct wil_probe_client_req
{
572 struct list_head list
;
578 /* alloc, free, and read operations must own the lock */
580 struct vring_tx_desc
*pring_va
;
582 struct desc_alloc_info
*descriptors
;
589 struct mutex lock
; /* protect halp ref_cnt */
590 unsigned int ref_cnt
;
591 struct completion comp
;
594 struct wil_blob_wrapper
{
595 struct wil6210_priv
*wil
;
596 struct debugfs_blob_wrapper blob
;
599 #define WIL_LED_MAX_ID (2)
600 #define WIL_LED_INVALID_ID (0xF)
601 #define WIL_LED_BLINK_ON_SLOW_MS (300)
602 #define WIL_LED_BLINK_OFF_SLOW_MS (300)
603 #define WIL_LED_BLINK_ON_MED_MS (200)
604 #define WIL_LED_BLINK_OFF_MED_MS (200)
605 #define WIL_LED_BLINK_ON_FAST_MS (100)
606 #define WIL_LED_BLINK_OFF_FAST_MS (100)
608 WIL_LED_TIME_SLOW
= 0,
614 struct blink_on_off_time
{
619 extern struct blink_on_off_time led_blink_time
[WIL_LED_TIME_LAST
];
621 extern u8 led_polarity
;
623 struct wil6210_priv
{
624 struct pci_dev
*pdev
;
626 struct wireless_dev
*wdev
;
628 DECLARE_BITMAP(status
, wil_status_last
);
629 u8 fw_version
[ETHTOOL_FWVERS_LEN
];
633 const char *wil_fw_name
;
634 DECLARE_BITMAP(hw_capabilities
, hw_capability_last
);
635 DECLARE_BITMAP(fw_capabilities
, WMI_FW_CAPABILITY_MAX
);
636 u8 n_mids
; /* number of additional MIDs as reported by FW */
637 u32 recovery_count
; /* num of FW recovery attempts in a short time */
638 u32 recovery_state
; /* FW recovery state machine */
639 unsigned long last_fw_recovery
; /* jiffies of last fw recovery */
640 wait_queue_head_t wq
; /* for all wait_event() use */
643 u32 privacy
; /* secure connection? */
644 u8 hidden_ssid
; /* relevant in AP mode */
645 u16 channel
; /* relevant in AP mode */
647 u32 ap_isolate
; /* no intra-BSS communication */
648 struct cfg80211_bss
*bss
; /* connected bss, relevant in STA mode */
649 int locally_generated_disc
; /* relevant in STA mode */
650 /* interrupt moderation */
651 u32 tx_max_burst_duration
;
652 u32 tx_interframe_timeout
;
653 u32 rx_max_burst_duration
;
654 u32 rx_interframe_timeout
;
655 /* cached ISR registers */
657 /* mailbox related */
658 struct mutex wmi_mutex
;
659 struct wil6210_mbox_ctl mbox_ctl
;
660 struct completion wmi_ready
;
661 struct completion wmi_call
;
663 u16 reply_id
; /**< wait for this WMI event */
666 struct workqueue_struct
*wmi_wq
; /* for deferred calls */
667 struct work_struct wmi_event_worker
;
668 struct workqueue_struct
*wq_service
;
669 struct work_struct disconnect_worker
;
670 struct work_struct fw_error_worker
; /* for FW error recovery */
671 struct timer_list connect_timer
;
672 struct timer_list scan_timer
; /* detect scan timeout */
673 struct list_head pending_wmi_ev
;
675 * protect pending_wmi_ev
676 * - fill in IRQ from wil6210_irq_misc,
677 * - consumed in thread by wmi_event_worker
679 spinlock_t wmi_ev_lock
;
680 spinlock_t net_queue_lock
; /* guarding stop/wake netif queue */
681 int net_queue_stopped
; /* netif_tx_stop_all_queues invoked */
682 struct napi_struct napi_rx
;
683 struct napi_struct napi_tx
;
685 struct list_head probe_client_pending
;
686 struct mutex probe_client_mutex
; /* protect @probe_client_pending */
687 struct work_struct probe_client_worker
;
689 struct vring vring_rx
;
690 unsigned int rx_buf_len
;
691 struct vring vring_tx
[WIL6210_MAX_TX_RINGS
];
692 struct vring_tx_data vring_tx_data
[WIL6210_MAX_TX_RINGS
];
693 u8 vring2cid_tid
[WIL6210_MAX_TX_RINGS
][2]; /* [0] - CID, [1] - TID */
694 struct wil_sta_info sta
[WIL6210_MAX_CID
];
696 bool use_extended_dma_addr
; /* indicates whether we are using 48 bits */
698 struct cfg80211_scan_request
*scan_request
;
700 struct mutex mutex
; /* for wil6210_priv access in wil_{up|down} */
702 atomic_t isr_count_rx
, isr_count_tx
;
704 struct dentry
*debug
;
705 struct wil_blob_wrapper blobs
[ARRAY_SIZE(fw_mapping
)];
709 struct wil_suspend_stats suspend_stats
;
711 void *platform_handle
;
712 struct wil_platform_ops platform_ops
;
713 bool keep_radio_on_during_sleep
;
719 struct wil_p2p_info p2p
;
722 struct wireless_dev
*p2p_wdev
;
723 struct mutex p2p_wdev_mutex
; /* protect @p2p_wdev and @scan_request */
724 struct wireless_dev
*radio_wdev
;
726 /* High Access Latency Policy voting */
727 struct wil_halp halp
;
729 enum wmi_ps_profile_type ps_profile
;
734 #ifdef CONFIG_PM_SLEEP
735 struct notifier_block pm_notify
;
736 #endif /* CONFIG_PM_SLEEP */
737 #endif /* CONFIG_PM */
739 bool suspend_resp_rcvd
;
740 bool suspend_resp_comp
;
741 u32 bus_request_kbps
;
742 u32 bus_request_kbps_pre_suspend
;
745 #define wil_to_wiphy(i) (i->wdev->wiphy)
746 #define wil_to_dev(i) (wiphy_dev(wil_to_wiphy(i)))
747 #define wiphy_to_wil(w) (struct wil6210_priv *)(wiphy_priv(w))
748 #define wil_to_wdev(i) (i->wdev)
749 #define wdev_to_wil(w) (struct wil6210_priv *)(wdev_priv(w))
750 #define wil_to_ndev(i) (wil_to_wdev(i)->netdev)
751 #define ndev_to_wil(n) (wdev_to_wil(n->ieee80211_ptr))
754 void wil_dbg_trace(struct wil6210_priv
*wil
, const char *fmt
, ...);
756 void __wil_err(struct wil6210_priv
*wil
, const char *fmt
, ...);
758 void __wil_err_ratelimited(struct wil6210_priv
*wil
, const char *fmt
, ...);
760 void __wil_info(struct wil6210_priv
*wil
, const char *fmt
, ...);
762 void wil_dbg_ratelimited(const struct wil6210_priv
*wil
, const char *fmt
, ...);
763 #define wil_dbg(wil, fmt, arg...) do { \
764 netdev_dbg(wil_to_ndev(wil), fmt, ##arg); \
765 wil_dbg_trace(wil, fmt, ##arg); \
768 #define wil_dbg_irq(wil, fmt, arg...) wil_dbg(wil, "DBG[ IRQ]" fmt, ##arg)
769 #define wil_dbg_txrx(wil, fmt, arg...) wil_dbg(wil, "DBG[TXRX]" fmt, ##arg)
770 #define wil_dbg_wmi(wil, fmt, arg...) wil_dbg(wil, "DBG[ WMI]" fmt, ##arg)
771 #define wil_dbg_misc(wil, fmt, arg...) wil_dbg(wil, "DBG[MISC]" fmt, ##arg)
772 #define wil_dbg_pm(wil, fmt, arg...) wil_dbg(wil, "DBG[ PM ]" fmt, ##arg)
773 #define wil_err(wil, fmt, arg...) __wil_err(wil, "%s: " fmt, __func__, ##arg)
774 #define wil_info(wil, fmt, arg...) __wil_info(wil, "%s: " fmt, __func__, ##arg)
775 #define wil_err_ratelimited(wil, fmt, arg...) \
776 __wil_err_ratelimited(wil, "%s: " fmt, __func__, ##arg)
778 /* target operations */
780 static inline u32
wil_r(struct wil6210_priv
*wil
, u32 reg
)
782 return readl(wil
->csr
+ HOSTADDR(reg
));
785 /* register write. wmb() to make sure it is completed */
786 static inline void wil_w(struct wil6210_priv
*wil
, u32 reg
, u32 val
)
788 writel(val
, wil
->csr
+ HOSTADDR(reg
));
789 wmb(); /* wait for write to propagate to the HW */
792 /* register set = read, OR, write */
793 static inline void wil_s(struct wil6210_priv
*wil
, u32 reg
, u32 val
)
795 wil_w(wil
, reg
, wil_r(wil
, reg
) | val
);
798 /* register clear = read, AND with inverted, write */
799 static inline void wil_c(struct wil6210_priv
*wil
, u32 reg
, u32 val
)
801 wil_w(wil
, reg
, wil_r(wil
, reg
) & ~val
);
804 #if defined(CONFIG_DYNAMIC_DEBUG)
805 #define wil_hex_dump_txrx(prefix_str, prefix_type, rowsize, \
806 groupsize, buf, len, ascii) \
807 print_hex_dump_debug("DBG[TXRX]" prefix_str,\
808 prefix_type, rowsize, \
809 groupsize, buf, len, ascii)
811 #define wil_hex_dump_wmi(prefix_str, prefix_type, rowsize, \
812 groupsize, buf, len, ascii) \
813 print_hex_dump_debug("DBG[ WMI]" prefix_str,\
814 prefix_type, rowsize, \
815 groupsize, buf, len, ascii)
817 #define wil_hex_dump_misc(prefix_str, prefix_type, rowsize, \
818 groupsize, buf, len, ascii) \
819 print_hex_dump_debug("DBG[MISC]" prefix_str,\
820 prefix_type, rowsize, \
821 groupsize, buf, len, ascii)
822 #else /* defined(CONFIG_DYNAMIC_DEBUG) */
824 void wil_hex_dump_txrx(const char *prefix_str
, int prefix_type
, int rowsize
,
825 int groupsize
, const void *buf
, size_t len
, bool ascii
)
830 void wil_hex_dump_wmi(const char *prefix_str
, int prefix_type
, int rowsize
,
831 int groupsize
, const void *buf
, size_t len
, bool ascii
)
836 void wil_hex_dump_misc(const char *prefix_str
, int prefix_type
, int rowsize
,
837 int groupsize
, const void *buf
, size_t len
, bool ascii
)
840 #endif /* defined(CONFIG_DYNAMIC_DEBUG) */
842 void wil_memcpy_fromio_32(void *dst
, const volatile void __iomem
*src
,
844 void wil_memcpy_toio_32(volatile void __iomem
*dst
, const void *src
,
847 void *wil_if_alloc(struct device
*dev
);
848 void wil_if_free(struct wil6210_priv
*wil
);
849 int wil_if_add(struct wil6210_priv
*wil
);
850 void wil_if_remove(struct wil6210_priv
*wil
);
851 int wil_priv_init(struct wil6210_priv
*wil
);
852 void wil_priv_deinit(struct wil6210_priv
*wil
);
853 int wil_ps_update(struct wil6210_priv
*wil
,
854 enum wmi_ps_profile_type ps_profile
);
855 int wil_reset(struct wil6210_priv
*wil
, bool no_fw
);
856 void wil_fw_error_recovery(struct wil6210_priv
*wil
);
857 void wil_set_recovery_state(struct wil6210_priv
*wil
, int state
);
858 bool wil_is_recovery_blocked(struct wil6210_priv
*wil
);
859 int wil_up(struct wil6210_priv
*wil
);
860 int __wil_up(struct wil6210_priv
*wil
);
861 int wil_down(struct wil6210_priv
*wil
);
862 int __wil_down(struct wil6210_priv
*wil
);
863 void wil_mbox_ring_le2cpus(struct wil6210_mbox_ring
*r
);
864 int wil_find_cid(struct wil6210_priv
*wil
, const u8
*mac
);
865 void wil_set_ethtoolops(struct net_device
*ndev
);
867 void __iomem
*wmi_buffer(struct wil6210_priv
*wil
, __le32 ptr
);
868 void __iomem
*wmi_addr(struct wil6210_priv
*wil
, u32 ptr
);
869 int wmi_read_hdr(struct wil6210_priv
*wil
, __le32 ptr
,
870 struct wil6210_mbox_hdr
*hdr
);
871 int wmi_send(struct wil6210_priv
*wil
, u16 cmdid
, void *buf
, u16 len
);
872 void wmi_recv_cmd(struct wil6210_priv
*wil
);
873 int wmi_call(struct wil6210_priv
*wil
, u16 cmdid
, void *buf
, u16 len
,
874 u16 reply_id
, void *reply
, u8 reply_size
, int to_msec
);
875 void wmi_event_worker(struct work_struct
*work
);
876 void wmi_event_flush(struct wil6210_priv
*wil
);
877 int wmi_set_ssid(struct wil6210_priv
*wil
, u8 ssid_len
, const void *ssid
);
878 int wmi_get_ssid(struct wil6210_priv
*wil
, u8
*ssid_len
, void *ssid
);
879 int wmi_set_channel(struct wil6210_priv
*wil
, int channel
);
880 int wmi_get_channel(struct wil6210_priv
*wil
, int *channel
);
881 int wmi_del_cipher_key(struct wil6210_priv
*wil
, u8 key_index
,
882 const void *mac_addr
, int key_usage
);
883 int wmi_add_cipher_key(struct wil6210_priv
*wil
, u8 key_index
,
884 const void *mac_addr
, int key_len
, const void *key
,
886 int wmi_echo(struct wil6210_priv
*wil
);
887 int wmi_set_ie(struct wil6210_priv
*wil
, u8 type
, u16 ie_len
, const void *ie
);
888 int wmi_rx_chain_add(struct wil6210_priv
*wil
, struct vring
*vring
);
889 int wmi_rxon(struct wil6210_priv
*wil
, bool on
);
890 int wmi_get_temperature(struct wil6210_priv
*wil
, u32
*t_m
, u32
*t_r
);
891 int wmi_disconnect_sta(struct wil6210_priv
*wil
, const u8
*mac
,
892 u16 reason
, bool full_disconnect
, bool del_sta
);
893 int wmi_addba(struct wil6210_priv
*wil
, u8 ringid
, u8 size
, u16 timeout
);
894 int wmi_delba_tx(struct wil6210_priv
*wil
, u8 ringid
, u16 reason
);
895 int wmi_delba_rx(struct wil6210_priv
*wil
, u8 cidxtid
, u16 reason
);
896 int wmi_addba_rx_resp(struct wil6210_priv
*wil
, u8 cid
, u8 tid
, u8 token
,
897 u16 status
, bool amsdu
, u16 agg_wsize
, u16 timeout
);
898 int wmi_ps_dev_profile_cfg(struct wil6210_priv
*wil
,
899 enum wmi_ps_profile_type ps_profile
);
900 int wmi_set_mgmt_retry(struct wil6210_priv
*wil
, u8 retry_short
);
901 int wmi_get_mgmt_retry(struct wil6210_priv
*wil
, u8
*retry_short
);
902 int wmi_new_sta(struct wil6210_priv
*wil
, const u8
*mac
, u8 aid
);
903 int wil_addba_rx_request(struct wil6210_priv
*wil
, u8 cidxtid
,
904 u8 dialog_token
, __le16 ba_param_set
,
905 __le16 ba_timeout
, __le16 ba_seq_ctrl
);
906 int wil_addba_tx_request(struct wil6210_priv
*wil
, u8 ringid
, u16 wsize
);
908 void wil6210_clear_irq(struct wil6210_priv
*wil
);
909 int wil6210_init_irq(struct wil6210_priv
*wil
, int irq
, bool use_msi
);
910 void wil6210_fini_irq(struct wil6210_priv
*wil
, int irq
);
911 void wil_mask_irq(struct wil6210_priv
*wil
);
912 void wil_unmask_irq(struct wil6210_priv
*wil
);
913 void wil_configure_interrupt_moderation(struct wil6210_priv
*wil
);
914 void wil_disable_irq(struct wil6210_priv
*wil
);
915 void wil_enable_irq(struct wil6210_priv
*wil
);
916 void wil6210_mask_halp(struct wil6210_priv
*wil
);
919 bool wil_p2p_is_social_scan(struct cfg80211_scan_request
*request
);
920 void wil_p2p_discovery_timer_fn(ulong x
);
921 int wil_p2p_search(struct wil6210_priv
*wil
,
922 struct cfg80211_scan_request
*request
);
923 int wil_p2p_listen(struct wil6210_priv
*wil
, struct wireless_dev
*wdev
,
924 unsigned int duration
, struct ieee80211_channel
*chan
,
926 u8
wil_p2p_stop_discovery(struct wil6210_priv
*wil
);
927 int wil_p2p_cancel_listen(struct wil6210_priv
*wil
, u64 cookie
);
928 void wil_p2p_listen_expired(struct work_struct
*work
);
929 void wil_p2p_search_expired(struct work_struct
*work
);
930 void wil_p2p_stop_radio_operations(struct wil6210_priv
*wil
);
931 void wil_p2p_delayed_listen_work(struct work_struct
*work
);
934 int wmi_p2p_cfg(struct wil6210_priv
*wil
, int channel
, int bi
);
935 int wmi_start_listen(struct wil6210_priv
*wil
);
936 int wmi_start_search(struct wil6210_priv
*wil
);
937 int wmi_stop_discovery(struct wil6210_priv
*wil
);
939 int wil_cfg80211_mgmt_tx(struct wiphy
*wiphy
, struct wireless_dev
*wdev
,
940 struct cfg80211_mgmt_tx_params
*params
,
943 int wil6210_debugfs_init(struct wil6210_priv
*wil
);
944 void wil6210_debugfs_remove(struct wil6210_priv
*wil
);
945 int wil_cid_fill_sinfo(struct wil6210_priv
*wil
, int cid
,
946 struct station_info
*sinfo
);
948 struct wireless_dev
*wil_cfg80211_init(struct device
*dev
);
949 void wil_wdev_free(struct wil6210_priv
*wil
);
950 void wil_p2p_wdev_free(struct wil6210_priv
*wil
);
952 int wmi_set_mac_address(struct wil6210_priv
*wil
, void *addr
);
953 int wmi_pcp_start(struct wil6210_priv
*wil
, int bi
, u8 wmi_nettype
,
954 u8 chan
, u8 hidden_ssid
, u8 is_go
);
955 int wmi_pcp_stop(struct wil6210_priv
*wil
);
956 int wmi_led_cfg(struct wil6210_priv
*wil
, bool enable
);
957 int wmi_abort_scan(struct wil6210_priv
*wil
);
958 void wil_abort_scan(struct wil6210_priv
*wil
, bool sync
);
959 void wil6210_bus_request(struct wil6210_priv
*wil
, u32 kbps
);
960 void wil6210_disconnect(struct wil6210_priv
*wil
, const u8
*bssid
,
961 u16 reason_code
, bool from_event
);
962 void wil_probe_client_flush(struct wil6210_priv
*wil
);
963 void wil_probe_client_worker(struct work_struct
*work
);
965 int wil_rx_init(struct wil6210_priv
*wil
, u16 size
);
966 void wil_rx_fini(struct wil6210_priv
*wil
);
969 int wil_vring_init_tx(struct wil6210_priv
*wil
, int id
, int size
,
971 void wil_vring_fini_tx(struct wil6210_priv
*wil
, int id
);
972 int wil_tx_init(struct wil6210_priv
*wil
, int cid
);
973 int wil_vring_init_bcast(struct wil6210_priv
*wil
, int id
, int size
);
974 int wil_bcast_init(struct wil6210_priv
*wil
);
975 void wil_bcast_fini(struct wil6210_priv
*wil
);
977 void wil_update_net_queues(struct wil6210_priv
*wil
, struct vring
*vring
,
979 void wil_update_net_queues_bh(struct wil6210_priv
*wil
, struct vring
*vring
,
981 netdev_tx_t
wil_start_xmit(struct sk_buff
*skb
, struct net_device
*ndev
);
982 int wil_tx_complete(struct wil6210_priv
*wil
, int ringid
);
983 void wil6210_unmask_irq_tx(struct wil6210_priv
*wil
);
986 void wil_rx_handle(struct wil6210_priv
*wil
, int *quota
);
987 void wil6210_unmask_irq_rx(struct wil6210_priv
*wil
);
989 int wil_iftype_nl2wmi(enum nl80211_iftype type
);
991 int wil_request_firmware(struct wil6210_priv
*wil
, const char *name
,
993 bool wil_fw_verify_file_exists(struct wil6210_priv
*wil
, const char *name
);
995 int wil_can_suspend(struct wil6210_priv
*wil
, bool is_runtime
);
996 int wil_suspend(struct wil6210_priv
*wil
, bool is_runtime
);
997 int wil_resume(struct wil6210_priv
*wil
, bool is_runtime
);
998 bool wil_is_wmi_idle(struct wil6210_priv
*wil
);
999 int wmi_resume(struct wil6210_priv
*wil
);
1000 int wmi_suspend(struct wil6210_priv
*wil
);
1001 bool wil_is_tx_idle(struct wil6210_priv
*wil
);
1002 bool wil_is_rx_idle(struct wil6210_priv
*wil
);
1004 int wil_fw_copy_crash_dump(struct wil6210_priv
*wil
, void *dest
, u32 size
);
1005 void wil_fw_core_dump(struct wil6210_priv
*wil
);
1007 void wil_halp_vote(struct wil6210_priv
*wil
);
1008 void wil_halp_unvote(struct wil6210_priv
*wil
);
1009 void wil6210_set_halp(struct wil6210_priv
*wil
);
1010 void wil6210_clear_halp(struct wil6210_priv
*wil
);
1012 #endif /* __WIL6210_H__ */