2 * Copyright (c) 2008 Atheros Communications Inc.
4 * Permission to use, copy, modify, and/or distribute this software for any
5 * purpose with or without fee is hereby granted, provided that the above
6 * copyright notice and this permission notice appear in all copies.
8 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
9 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
10 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
11 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
12 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
13 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
14 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
17 /* Implementation of beacon processing. */
19 #include <asm/unaligned.h>
23 * Configure parameters for the beacon queue
25 * This function will modify certain transmit queue properties depending on
26 * the operating mode of the station (AP or AdHoc). Parameters are AIFS
27 * settings and channel width min/max
30 static int ath_beaconq_config(struct ath_softc
*sc
)
32 struct ath_hal
*ah
= sc
->sc_ah
;
33 struct ath9k_tx_queue_info qi
;
35 ath9k_hw_get_txq_props(ah
, sc
->sc_bhalq
, &qi
);
36 if (sc
->sc_opmode
== ATH9K_M_HOSTAP
) {
37 /* Always burst out beacon and CAB traffic. */
42 /* Adhoc mode; important thing is to use 2x cwmin. */
43 qi
.tqi_aifs
= sc
->sc_beacon_qi
.tqi_aifs
;
44 qi
.tqi_cwmin
= 2*sc
->sc_beacon_qi
.tqi_cwmin
;
45 qi
.tqi_cwmax
= sc
->sc_beacon_qi
.tqi_cwmax
;
48 if (!ath9k_hw_set_txq_props(ah
, sc
->sc_bhalq
, &qi
)) {
49 DPRINTF(sc
, ATH_DBG_FATAL
,
50 "%s: unable to update h/w beacon queue parameters\n",
54 ath9k_hw_resettxqueue(ah
, sc
->sc_bhalq
); /* push to h/w */
60 * Setup the beacon frame for transmit.
62 * Associates the beacon frame buffer with a transmit descriptor. Will set
63 * up all required antenna switch parameters, rate codes, and channel flags.
64 * Beacons are always sent out at the lowest rate, and are not retried.
67 static void ath_beacon_setup(struct ath_softc
*sc
,
68 struct ath_vap
*avp
, struct ath_buf
*bf
)
70 struct sk_buff
*skb
= (struct sk_buff
*)bf
->bf_mpdu
;
71 struct ath_hal
*ah
= sc
->sc_ah
;
74 const struct ath9k_rate_table
*rt
;
78 struct ath9k_11n_rate_series series
[4];
80 DPRINTF(sc
, ATH_DBG_BEACON
, "%s: m %p len %u\n",
81 __func__
, skb
, skb
->len
);
83 /* setup descriptors */
86 flags
= ATH9K_TXDESC_NOACK
;
88 if (sc
->sc_opmode
== ATH9K_M_IBSS
&&
89 (ah
->ah_caps
.hw_caps
& ATH9K_HW_CAP_VEOL
)) {
90 ds
->ds_link
= bf
->bf_daddr
; /* self-linked */
91 flags
|= ATH9K_TXDESC_VEOL
;
92 /* Let hardware handle antenna switching. */
97 * Switch antenna every beacon.
98 * Should only switch every beacon period, not for every
100 * XXX assumes two antenna
102 antenna
= ((sc
->ast_be_xmit
/ sc
->sc_nbcnvaps
) & 1 ? 2 : 1);
105 ds
->ds_data
= bf
->bf_buf_addr
;
108 * Calculate rate code.
109 * XXX everything at min xmit rate
112 rt
= sc
->sc_currates
;
113 rate
= rt
->info
[rix
].rateCode
;
114 if (sc
->sc_flags
& ATH_PREAMBLE_SHORT
)
115 rate
|= rt
->info
[rix
].shortPreamble
;
117 ath9k_hw_set11n_txdesc(ah
, ds
118 , skb
->len
+ FCS_LEN
/* frame length */
119 , ATH9K_PKT_TYPE_BEACON
/* Atheros packet type */
120 , avp
->av_btxctl
.txpower
/* txpower XXX */
121 , ATH9K_TXKEYIX_INVALID
/* no encryption */
122 , ATH9K_KEY_TYPE_CLEAR
/* no encryption */
123 , flags
/* no ack, veol for beacons */
126 /* NB: beacon's BufLen must be a multiple of 4 bytes */
127 ath9k_hw_filltxdesc(ah
, ds
128 , roundup(skb
->len
, 4) /* buffer length */
129 , true /* first segment */
130 , true /* last segment */
131 , ds
/* first descriptor */
134 memzero(series
, sizeof(struct ath9k_11n_rate_series
) * 4);
136 series
[0].Rate
= rate
;
137 series
[0].ChSel
= sc
->sc_tx_chainmask
;
138 series
[0].RateFlags
= (ctsrate
) ? ATH9K_RATESERIES_RTS_CTS
: 0;
139 ath9k_hw_set11n_ratescenario(ah
, ds
, ds
, 0,
140 ctsrate
, ctsduration
, series
, 4, 0);
143 /* Move everything from the vap's mcast queue to the hardware cab queue.
144 * Caller must hold mcasq lock and cabq lock
147 static void empty_mcastq_into_cabq(struct ath_hal
*ah
,
148 struct ath_txq
*mcastq
, struct ath_txq
*cabq
)
150 struct ath_buf
*bfmcast
;
152 BUG_ON(list_empty(&mcastq
->axq_q
));
154 bfmcast
= list_first_entry(&mcastq
->axq_q
, struct ath_buf
, list
);
156 /* link the descriptors */
158 ath9k_hw_puttxbuf(ah
, cabq
->axq_qnum
, bfmcast
->bf_daddr
);
160 *cabq
->axq_link
= bfmcast
->bf_daddr
;
162 /* append the private vap mcast list to the cabq */
164 cabq
->axq_depth
+= mcastq
->axq_depth
;
165 cabq
->axq_totalqueued
+= mcastq
->axq_totalqueued
;
166 cabq
->axq_linkbuf
= mcastq
->axq_linkbuf
;
167 cabq
->axq_link
= mcastq
->axq_link
;
168 list_splice_tail_init(&mcastq
->axq_q
, &cabq
->axq_q
);
169 mcastq
->axq_depth
= 0;
170 mcastq
->axq_totalqueued
= 0;
171 mcastq
->axq_linkbuf
= NULL
;
172 mcastq
->axq_link
= NULL
;
175 /* This is only run at DTIM. We move everything from the vap's mcast queue
176 * to the hardware cab queue. Caller must hold the mcastq lock. */
177 static void trigger_mcastq(struct ath_hal
*ah
,
178 struct ath_txq
*mcastq
, struct ath_txq
*cabq
)
180 spin_lock_bh(&cabq
->axq_lock
);
182 if (!list_empty(&mcastq
->axq_q
))
183 empty_mcastq_into_cabq(ah
, mcastq
, cabq
);
185 /* cabq is gated by beacon so it is safe to start here */
186 if (!list_empty(&cabq
->axq_q
))
187 ath9k_hw_txstart(ah
, cabq
->axq_qnum
);
189 spin_unlock_bh(&cabq
->axq_lock
);
193 * Generate beacon frame and queue cab data for a vap.
195 * Updates the contents of the beacon frame. It is assumed that the buffer for
196 * the beacon frame has been allocated in the ATH object, and simply needs to
197 * be filled for this cycle. Also, any CAB (crap after beacon?) traffic will
198 * be added to the beacon frame at this point.
200 static struct ath_buf
*ath_beacon_generate(struct ath_softc
*sc
, int if_id
)
202 struct ath_hal
*ah
= sc
->sc_ah
;
208 int is_beacon_dtim
= 0;
210 struct ath_txq
*cabq
;
211 struct ath_txq
*mcastq
;
212 struct ieee80211_tx_info
*info
;
213 avp
= sc
->sc_vaps
[if_id
];
215 mcastq
= &avp
->av_mcastq
;
220 if (avp
->av_bcbuf
== NULL
) {
221 DPRINTF(sc
, ATH_DBG_BEACON
, "%s: avp=%p av_bcbuf=%p\n",
222 __func__
, avp
, avp
->av_bcbuf
);
226 skb
= (struct sk_buff
*) bf
->bf_mpdu
;
229 * Update dynamic beacon contents. If this returns
230 * non-zero then we need to remap the memory because
231 * the beacon frame changed size (probably because
232 * of the TIM bitmap).
236 info
= IEEE80211_SKB_CB(skb
);
237 if (info
->flags
& IEEE80211_TX_CTL_ASSIGN_SEQ
) {
239 * TODO: make sure the seq# gets assigned properly (vs. other
242 struct ieee80211_hdr
*hdr
= (struct ieee80211_hdr
*) skb
->data
;
244 hdr
->seq_ctrl
&= cpu_to_le16(IEEE80211_SCTL_FRAG
);
245 hdr
->seq_ctrl
|= cpu_to_le16(sc
->seq_no
);
248 /* XXX: spin_lock_bh should not be used here, but sparse bitches
249 * otherwise. We should fix sparse :) */
250 spin_lock_bh(&mcastq
->axq_lock
);
251 mcastq_depth
= avp
->av_mcastq
.axq_depth
;
253 if (ath_update_beacon(sc
, if_id
, &avp
->av_boff
, skb
, mcastq_depth
) ==
255 ath_skb_unmap_single(sc
, skb
, PCI_DMA_TODEVICE
,
256 get_dma_mem_context(bf
, bf_dmacontext
));
257 bf
->bf_buf_addr
= ath_skb_map_single(sc
, skb
, PCI_DMA_TODEVICE
,
258 get_dma_mem_context(bf
, bf_dmacontext
));
260 pci_dma_sync_single_for_cpu(sc
->pdev
,
267 * if the CABQ traffic from previous DTIM is pending and the current
268 * beacon is also a DTIM.
269 * 1) if there is only one vap let the cab traffic continue.
270 * 2) if there are more than one vap and we are using staggered
271 * beacons, then drain the cabq by dropping all the frames in
272 * the cabq so that the current vaps cab traffic can be scheduled.
274 spin_lock_bh(&cabq
->axq_lock
);
275 cabq_depth
= cabq
->axq_depth
;
276 spin_unlock_bh(&cabq
->axq_lock
);
278 is_beacon_dtim
= avp
->av_boff
.bo_tim
[4] & 1;
280 if (mcastq_depth
&& is_beacon_dtim
&& cabq_depth
) {
282 * Unlock the cabq lock as ath_tx_draintxq acquires
283 * the lock again which is a common function and that
284 * acquires txq lock inside.
286 if (sc
->sc_nvaps
> 1) {
287 ath_tx_draintxq(sc
, cabq
, false);
288 DPRINTF(sc
, ATH_DBG_BEACON
,
289 "%s: flush previous cabq traffic\n", __func__
);
293 /* Construct tx descriptor. */
294 ath_beacon_setup(sc
, avp
, bf
);
297 * Enable the CAB queue before the beacon queue to
298 * insure cab frames are triggered by this beacon.
301 trigger_mcastq(ah
, mcastq
, cabq
);
303 spin_unlock_bh(&mcastq
->axq_lock
);
308 * Startup beacon transmission for adhoc mode when they are sent entirely
309 * by the hardware using the self-linked descriptor + veol trick.
312 static void ath_beacon_start_adhoc(struct ath_softc
*sc
, int if_id
)
314 struct ath_hal
*ah
= sc
->sc_ah
;
319 avp
= sc
->sc_vaps
[if_id
];
322 if (avp
->av_bcbuf
== NULL
) {
323 DPRINTF(sc
, ATH_DBG_BEACON
, "%s: avp=%p av_bcbuf=%p\n",
324 __func__
, avp
, avp
!= NULL
? avp
->av_bcbuf
: NULL
);
328 skb
= (struct sk_buff
*) bf
->bf_mpdu
;
330 /* Construct tx descriptor. */
331 ath_beacon_setup(sc
, avp
, bf
);
333 /* NB: caller is known to have already stopped tx dma */
334 ath9k_hw_puttxbuf(ah
, sc
->sc_bhalq
, bf
->bf_daddr
);
335 ath9k_hw_txstart(ah
, sc
->sc_bhalq
);
336 DPRINTF(sc
, ATH_DBG_BEACON
, "%s: TXDP%u = %llx (%p)\n", __func__
,
337 sc
->sc_bhalq
, ito64(bf
->bf_daddr
), bf
->bf_desc
);
341 * Setup a h/w transmit queue for beacons.
343 * This function allocates an information structure (struct ath9k_txq_info)
344 * on the stack, sets some specific parameters (zero out channel width
345 * min/max, and enable aifs). The info structure does not need to be
349 int ath_beaconq_setup(struct ath_hal
*ah
)
351 struct ath9k_tx_queue_info qi
;
353 memzero(&qi
, sizeof(qi
));
357 /* NB: don't enable any interrupts */
358 return ath9k_hw_setuptxqueue(ah
, ATH9K_TX_QUEUE_BEACON
, &qi
);
363 * Allocate and setup an initial beacon frame.
365 * Allocate a beacon state variable for a specific VAP instance created on
366 * the ATH interface. This routine also calculates the beacon "slot" for
367 * staggared beacons in the mBSSID case.
370 int ath_beacon_alloc(struct ath_softc
*sc
, int if_id
)
373 struct ieee80211_hdr
*wh
;
377 avp
= sc
->sc_vaps
[if_id
];
380 /* Allocate a beacon descriptor if we haven't done so. */
381 if (!avp
->av_bcbuf
) {
383 * Allocate beacon state for hostap/ibss. We know
384 * a buffer is available.
387 avp
->av_bcbuf
= list_first_entry(&sc
->sc_bbuf
,
388 struct ath_buf
, list
);
389 list_del(&avp
->av_bcbuf
->list
);
391 if (sc
->sc_opmode
== ATH9K_M_HOSTAP
||
392 !(sc
->sc_ah
->ah_caps
.hw_caps
& ATH9K_HW_CAP_VEOL
)) {
395 * Assign the vap to a beacon xmit slot. As
396 * above, this cannot fail to find one.
399 for (slot
= 0; slot
< ATH_BCBUF
; slot
++)
400 if (sc
->sc_bslot
[slot
] == ATH_IF_ID_ANY
) {
402 * XXX hack, space out slots to better
405 if (slot
+1 < ATH_BCBUF
&&
406 sc
->sc_bslot
[slot
+1] ==
408 avp
->av_bslot
= slot
+1;
411 avp
->av_bslot
= slot
;
412 /* NB: keep looking for a double slot */
414 BUG_ON(sc
->sc_bslot
[avp
->av_bslot
] != ATH_IF_ID_ANY
);
415 sc
->sc_bslot
[avp
->av_bslot
] = if_id
;
420 /* release the previous beacon frame , if it already exists. */
422 if (bf
->bf_mpdu
!= NULL
) {
423 skb
= (struct sk_buff
*)bf
->bf_mpdu
;
424 ath_skb_unmap_single(sc
, skb
, PCI_DMA_TODEVICE
,
425 get_dma_mem_context(bf
, bf_dmacontext
));
426 dev_kfree_skb_any(skb
);
431 * NB: the beacon data buffer must be 32-bit aligned;
432 * we assume the wbuf routines will return us something
433 * with this alignment (perhaps should assert).
434 * FIXME: Fill avp->av_boff.bo_tim,avp->av_btxctl.txpower and
435 * avp->av_btxctl.shortPreamble
437 skb
= ieee80211_beacon_get(sc
->hw
, avp
->av_if_data
);
439 DPRINTF(sc
, ATH_DBG_BEACON
, "%s: cannot get skb\n",
445 * Calculate a TSF adjustment factor required for
446 * staggered beacons. Note that we assume the format
447 * of the beacon frame leaves the tstamp field immediately
448 * following the header.
450 if (avp
->av_bslot
> 0) {
455 /* FIXME: Use default value for now: Sujith */
457 intval
= ATH_DEFAULT_BINTVAL
;
460 * The beacon interval is in TU's; the TSF in usecs.
461 * We figure out how many TU's to add to align the
462 * timestamp then convert to TSF units and handle
463 * byte swapping before writing it in the frame.
464 * The hardware will then add this each time a beacon
465 * frame is sent. Note that we align vap's 1..N
466 * and leave vap 0 untouched. This means vap 0
467 * has a timestamp in one beacon interval while the
468 * others get a timestamp aligned to the next interval.
470 tsfadjust
= (intval
* (ATH_BCBUF
- avp
->av_bslot
)) / ATH_BCBUF
;
471 val
= cpu_to_le64(tsfadjust
<< 10); /* TU->TSF */
473 DPRINTF(sc
, ATH_DBG_BEACON
,
474 "%s: %s beacons, bslot %d intval %u tsfadjust %llu\n",
476 avp
->av_bslot
, intval
, (unsigned long long)tsfadjust
);
478 wh
= (struct ieee80211_hdr
*)skb
->data
;
479 memcpy(&wh
[1], &val
, sizeof(val
));
482 bf
->bf_buf_addr
= ath_skb_map_single(sc
, skb
, PCI_DMA_TODEVICE
,
483 get_dma_mem_context(bf
, bf_dmacontext
));
490 * Reclaim beacon resources and return buffer to the pool.
492 * Checks the VAP to put the beacon frame buffer back to the ATH object
493 * queue, and de-allocates any wbuf frames that were sent as CAB traffic.
496 void ath_beacon_return(struct ath_softc
*sc
, struct ath_vap
*avp
)
498 if (avp
->av_bcbuf
!= NULL
) {
501 if (avp
->av_bslot
!= -1) {
502 sc
->sc_bslot
[avp
->av_bslot
] = ATH_IF_ID_ANY
;
507 if (bf
->bf_mpdu
!= NULL
) {
508 struct sk_buff
*skb
= (struct sk_buff
*)bf
->bf_mpdu
;
509 ath_skb_unmap_single(sc
, skb
, PCI_DMA_TODEVICE
,
510 get_dma_mem_context(bf
, bf_dmacontext
));
511 dev_kfree_skb_any(skb
);
514 list_add_tail(&bf
->list
, &sc
->sc_bbuf
);
516 avp
->av_bcbuf
= NULL
;
521 * Reclaim beacon resources and return buffer to the pool.
523 * This function will free any wbuf frames that are still attached to the
524 * beacon buffers in the ATH object. Note that this does not de-allocate
525 * any wbuf objects that are in the transmit queue and have not yet returned
529 void ath_beacon_free(struct ath_softc
*sc
)
533 list_for_each_entry(bf
, &sc
->sc_bbuf
, list
) {
534 if (bf
->bf_mpdu
!= NULL
) {
535 struct sk_buff
*skb
= (struct sk_buff
*) bf
->bf_mpdu
;
536 ath_skb_unmap_single(sc
, skb
, PCI_DMA_TODEVICE
,
537 get_dma_mem_context(bf
, bf_dmacontext
));
538 dev_kfree_skb_any(skb
);
545 * Tasklet for Sending Beacons
547 * Transmit one or more beacon frames at SWBA. Dynamic updates to the frame
548 * contents are done as needed and the slot time is also adjusted based on
551 * This tasklet is not scheduled, it's called in ISR context.
554 void ath9k_beacon_tasklet(unsigned long data
)
556 #define TSF_TO_TU(_h,_l) \
557 ((((u32)(_h)) << 22) | (((u32)(_l)) >> 10))
559 struct ath_softc
*sc
= (struct ath_softc
*)data
;
560 struct ath_hal
*ah
= sc
->sc_ah
;
561 struct ath_buf
*bf
= NULL
;
564 u32 rx_clear
= 0, rx_frame
= 0, tx_frame
= 0;
566 u32 bc
= 0; /* beacon count */
571 if (sc
->sc_noreset
) {
572 show_cycles
= ath9k_hw_GetMibCycleCountsPct(ah
,
579 * Check if the previous beacon has gone out. If
580 * not don't try to post another, skip this period
581 * and wait for the next. Missed beacons indicate
582 * a problem and should not occur. If we miss too
583 * many consecutive beacons reset the device.
585 if (ath9k_hw_numtxpending(ah
, sc
->sc_bhalq
) != 0) {
587 /* XXX: doth needs the chanchange IE countdown decremented.
588 * We should consider adding a mac80211 call to indicate
589 * a beacon miss so appropriate action could be taken
592 if (sc
->sc_bmisscount
< BSTUCK_THRESH
) {
593 if (sc
->sc_noreset
) {
594 DPRINTF(sc
, ATH_DBG_BEACON
,
595 "%s: missed %u consecutive beacons\n",
596 __func__
, sc
->sc_bmisscount
);
599 * Display cycle counter stats
600 * from HW to aide in debug of
605 "%s: busy times: rx_clear=%d, "
606 "rx_frame=%d, tx_frame=%d\n",
607 __func__
, rx_clear
, rx_frame
,
612 "%s: unable to obtain "
613 "busy times\n", __func__
);
616 DPRINTF(sc
, ATH_DBG_BEACON
,
617 "%s: missed %u consecutive beacons\n",
618 __func__
, sc
->sc_bmisscount
);
620 } else if (sc
->sc_bmisscount
>= BSTUCK_THRESH
) {
621 if (sc
->sc_noreset
) {
622 if (sc
->sc_bmisscount
== BSTUCK_THRESH
) {
625 "%s: beacon is officially "
626 "stuck\n", __func__
);
627 ath9k_hw_dmaRegDump(ah
);
630 DPRINTF(sc
, ATH_DBG_BEACON
,
631 "%s: beacon is officially stuck\n",
633 ath_bstuck_process(sc
);
639 if (sc
->sc_bmisscount
!= 0) {
640 if (sc
->sc_noreset
) {
643 "%s: resume beacon xmit after %u misses\n",
644 __func__
, sc
->sc_bmisscount
);
646 DPRINTF(sc
, ATH_DBG_BEACON
,
647 "%s: resume beacon xmit after %u misses\n",
648 __func__
, sc
->sc_bmisscount
);
650 sc
->sc_bmisscount
= 0;
654 * Generate beacon frames. we are sending frames
655 * staggered so calculate the slot for this frame based
656 * on the tsf to safeguard against missing an swba.
659 /* FIXME: Use default value for now - Sujith */
660 intval
= ATH_DEFAULT_BINTVAL
;
662 tsf
= ath9k_hw_gettsf64(ah
);
663 tsftu
= TSF_TO_TU(tsf
>>32, tsf
);
664 slot
= ((tsftu
% intval
) * ATH_BCBUF
) / intval
;
665 if_id
= sc
->sc_bslot
[(slot
+ 1) % ATH_BCBUF
];
666 DPRINTF(sc
, ATH_DBG_BEACON
,
667 "%s: slot %d [tsf %llu tsftu %u intval %u] if_id %d\n",
668 __func__
, slot
, (unsigned long long) tsf
, tsftu
,
671 if (if_id
!= ATH_IF_ID_ANY
) {
672 bf
= ath_beacon_generate(sc
, if_id
);
674 bfaddr
= bf
->bf_daddr
;
679 * Handle slot time change when a non-ERP station joins/leaves
680 * an 11g network. The 802.11 layer notifies us via callback,
681 * we mark updateslot, then wait one beacon before effecting
682 * the change. This gives associated stations at least one
683 * beacon interval to note the state change.
685 * NB: The slot time change state machine is clocked according
686 * to whether we are bursting or staggering beacons. We
687 * recognize the request to update and record the current
688 * slot then don't transition until that slot is reached
689 * again. If we miss a beacon for that slot then we'll be
690 * slow to transition but we'll be sure at least one beacon
691 * interval has passed. When bursting slot is always left
692 * set to ATH_BCBUF so this check is a noop.
695 if (sc
->sc_updateslot
== UPDATE
) {
696 sc
->sc_updateslot
= COMMIT
; /* commit next beacon */
697 sc
->sc_slotupdate
= slot
;
698 } else if (sc
->sc_updateslot
== COMMIT
&& sc
->sc_slotupdate
== slot
)
699 ath_setslottime(sc
); /* commit change to hardware */
703 * Stop any current dma and put the new frame(s) on the queue.
704 * This should never fail since we check above that no frames
705 * are still pending on the queue.
707 if (!ath9k_hw_stoptxdma(ah
, sc
->sc_bhalq
)) {
708 DPRINTF(sc
, ATH_DBG_FATAL
,
709 "%s: beacon queue %u did not stop?\n",
710 __func__
, sc
->sc_bhalq
);
711 /* NB: the HAL still stops DMA, so proceed */
714 /* NB: cabq traffic should already be queued and primed */
715 ath9k_hw_puttxbuf(ah
, sc
->sc_bhalq
, bfaddr
);
716 ath9k_hw_txstart(ah
, sc
->sc_bhalq
);
718 sc
->ast_be_xmit
+= bc
; /* XXX per-vap? */
724 * Tasklet for Beacon Stuck processing
726 * Processing for Beacon Stuck.
727 * Basically calls the ath_internal_reset function to reset the chip.
730 void ath_bstuck_process(struct ath_softc
*sc
)
732 DPRINTF(sc
, ATH_DBG_BEACON
,
733 "%s: stuck beacon; resetting (bmiss count %u)\n",
734 __func__
, sc
->sc_bmisscount
);
735 ath_internal_reset(sc
);
739 * Configure the beacon and sleep timers.
741 * When operating as an AP this resets the TSF and sets
742 * up the hardware to notify us when we need to issue beacons.
744 * When operating in station mode this sets up the beacon
745 * timers according to the timestamp of the last received
746 * beacon and the current TSF, configures PCF and DTIM
747 * handling, programs the sleep registers so the hardware
748 * will wakeup in time to receive beacons, and configures
749 * the beacon miss handling so we'll receive a BMISS
750 * interrupt when we stop seeing beacons from the AP
751 * we've associated with.
754 void ath_beacon_config(struct ath_softc
*sc
, int if_id
)
756 #define TSF_TO_TU(_h,_l) \
757 ((((u32)(_h)) << 22) | (((u32)(_l)) >> 10))
758 struct ath_hal
*ah
= sc
->sc_ah
;
759 u32 nexttbtt
, intval
;
760 struct ath_beacon_config conf
;
761 enum ath9k_opmode av_opmode
;
763 if (if_id
!= ATH_IF_ID_ANY
)
764 av_opmode
= sc
->sc_vaps
[if_id
]->av_opmode
;
766 av_opmode
= sc
->sc_opmode
;
768 memzero(&conf
, sizeof(struct ath_beacon_config
));
770 /* FIXME: Use default values for now - Sujith */
771 /* Query beacon configuration first */
773 * Protocol stack doesn't support dynamic beacon configuration,
774 * use default configurations.
776 conf
.beacon_interval
= ATH_DEFAULT_BINTVAL
;
777 conf
.listen_interval
= 1;
778 conf
.dtim_period
= conf
.beacon_interval
;
780 conf
.bmiss_timeout
= ATH_DEFAULT_BMISS_LIMIT
* conf
.beacon_interval
;
782 /* extract tstamp from last beacon and convert to TU */
783 nexttbtt
= TSF_TO_TU(get_unaligned_le32(conf
.u
.last_tstamp
+ 4),
784 get_unaligned_le32(conf
.u
.last_tstamp
));
785 /* XXX conditionalize multi-bss support? */
786 if (sc
->sc_opmode
== ATH9K_M_HOSTAP
) {
788 * For multi-bss ap support beacons are either staggered
789 * evenly over N slots or burst together. For the former
790 * arrange for the SWBA to be delivered for each slot.
791 * Slots that are not occupied will generate nothing.
793 /* NB: the beacon interval is kept internally in TU's */
794 intval
= conf
.beacon_interval
& ATH9K_BEACON_PERIOD
;
795 intval
/= ATH_BCBUF
; /* for staggered beacons */
797 intval
= conf
.beacon_interval
& ATH9K_BEACON_PERIOD
;
800 if (nexttbtt
== 0) /* e.g. for ap mode */
802 else if (intval
) /* NB: can be 0 for monitor mode */
803 nexttbtt
= roundup(nexttbtt
, intval
);
804 DPRINTF(sc
, ATH_DBG_BEACON
, "%s: nexttbtt %u intval %u (%u)\n",
805 __func__
, nexttbtt
, intval
, conf
.beacon_interval
);
806 /* Check for ATH9K_M_HOSTAP and sc_nostabeacons for WDS client */
807 if (sc
->sc_opmode
== ATH9K_M_STA
) {
808 struct ath9k_beacon_state bs
;
811 int dtimperiod
, dtimcount
, sleepduration
;
812 int cfpperiod
, cfpcount
;
815 * Setup dtim and cfp parameters according to
816 * last beacon we received (which may be none).
818 dtimperiod
= conf
.dtim_period
;
819 if (dtimperiod
<= 0) /* NB: 0 if not known */
821 dtimcount
= conf
.dtim_count
;
822 if (dtimcount
>= dtimperiod
) /* NB: sanity check */
823 dtimcount
= 0; /* XXX? */
824 cfpperiod
= 1; /* NB: no PCF support yet */
827 sleepduration
= conf
.listen_interval
* intval
;
828 if (sleepduration
<= 0)
829 sleepduration
= intval
;
833 * Pull nexttbtt forward to reflect the current
834 * TSF and calculate dtim+cfp state for the result.
836 tsf
= ath9k_hw_gettsf64(ah
);
837 tsftu
= TSF_TO_TU(tsf
>>32, tsf
) + FUDGE
;
840 if (--dtimcount
< 0) {
841 dtimcount
= dtimperiod
- 1;
843 cfpcount
= cfpperiod
- 1;
845 } while (nexttbtt
< tsftu
);
847 memzero(&bs
, sizeof(bs
));
848 bs
.bs_intval
= intval
;
849 bs
.bs_nexttbtt
= nexttbtt
;
850 bs
.bs_dtimperiod
= dtimperiod
*intval
;
851 bs
.bs_nextdtim
= bs
.bs_nexttbtt
+ dtimcount
*intval
;
852 bs
.bs_cfpperiod
= cfpperiod
*bs
.bs_dtimperiod
;
853 bs
.bs_cfpnext
= bs
.bs_nextdtim
+ cfpcount
*bs
.bs_dtimperiod
;
854 bs
.bs_cfpmaxduration
= 0;
856 * Calculate the number of consecutive beacons to miss
857 * before taking a BMISS interrupt. The configuration
858 * is specified in TU so we only need calculate based
859 * on the beacon interval. Note that we clamp the
860 * result to at most 15 beacons.
862 if (sleepduration
> intval
) {
863 bs
.bs_bmissthreshold
=
864 conf
.listen_interval
*
865 ATH_DEFAULT_BMISS_LIMIT
/ 2;
867 bs
.bs_bmissthreshold
=
868 DIV_ROUND_UP(conf
.bmiss_timeout
, intval
);
869 if (bs
.bs_bmissthreshold
> 15)
870 bs
.bs_bmissthreshold
= 15;
871 else if (bs
.bs_bmissthreshold
<= 0)
872 bs
.bs_bmissthreshold
= 1;
876 * Calculate sleep duration. The configuration is
877 * given in ms. We insure a multiple of the beacon
878 * period is used. Also, if the sleep duration is
879 * greater than the DTIM period then it makes senses
880 * to make it a multiple of that.
885 bs
.bs_sleepduration
=
886 roundup(IEEE80211_MS_TO_TU(100), sleepduration
);
887 if (bs
.bs_sleepduration
> bs
.bs_dtimperiod
)
888 bs
.bs_sleepduration
= bs
.bs_dtimperiod
;
890 DPRINTF(sc
, ATH_DBG_BEACON
,
904 , (unsigned long long)tsf
, tsftu
909 , bs
.bs_bmissthreshold
910 , bs
.bs_sleepduration
912 , bs
.bs_cfpmaxduration
917 ath9k_hw_set_interrupts(ah
, 0);
918 ath9k_hw_set_sta_beacon_timers(ah
, &bs
);
919 sc
->sc_imask
|= ATH9K_INT_BMISS
;
920 ath9k_hw_set_interrupts(ah
, sc
->sc_imask
);
924 ath9k_hw_set_interrupts(ah
, 0);
925 if (nexttbtt
== intval
)
926 intval
|= ATH9K_BEACON_RESET_TSF
;
927 if (sc
->sc_opmode
== ATH9K_M_IBSS
) {
929 * Pull nexttbtt forward to reflect the current
933 if (!(intval
& ATH9K_BEACON_RESET_TSF
)) {
934 tsf
= ath9k_hw_gettsf64(ah
);
935 tsftu
= TSF_TO_TU((u32
)(tsf
>>32),
939 } while (nexttbtt
< tsftu
);
942 DPRINTF(sc
, ATH_DBG_BEACON
,
943 "%s: IBSS nexttbtt %u intval %u (%u)\n",
945 intval
& ~ATH9K_BEACON_RESET_TSF
,
946 conf
.beacon_interval
);
949 * In IBSS mode enable the beacon timers but only
950 * enable SWBA interrupts if we need to manually
951 * prepare beacon frames. Otherwise we use a
952 * self-linked tx descriptor and let the hardware
955 intval
|= ATH9K_BEACON_ENA
;
956 if (!(ah
->ah_caps
.hw_caps
& ATH9K_HW_CAP_VEOL
))
957 sc
->sc_imask
|= ATH9K_INT_SWBA
;
958 ath_beaconq_config(sc
);
959 } else if (sc
->sc_opmode
== ATH9K_M_HOSTAP
) {
961 * In AP mode we enable the beacon timers and
962 * SWBA interrupts to prepare beacon frames.
964 intval
|= ATH9K_BEACON_ENA
;
965 sc
->sc_imask
|= ATH9K_INT_SWBA
; /* beacon prepare */
966 ath_beaconq_config(sc
);
968 ath9k_hw_beaconinit(ah
, nexttbtt
, intval
);
969 sc
->sc_bmisscount
= 0;
970 ath9k_hw_set_interrupts(ah
, sc
->sc_imask
);
972 * When using a self-linked beacon descriptor in
973 * ibss mode load it once here.
975 if (sc
->sc_opmode
== ATH9K_M_IBSS
&&
976 (ah
->ah_caps
.hw_caps
& ATH9K_HW_CAP_VEOL
))
977 ath_beacon_start_adhoc(sc
, 0);
982 /* Function to collect beacon rssi data and resync beacon if necessary */
984 void ath_beacon_sync(struct ath_softc
*sc
, int if_id
)
987 * Resync beacon timers using the tsf of the
988 * beacon frame we just received.
990 ath_beacon_config(sc
, if_id
);