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Merge git://git.kernel.org/pub/scm/linux/kernel/git/jejb/scsi-misc-2.6
[mirror_ubuntu-artful-kernel.git] / drivers / net / wireless / b43legacy / main.c
1 /*
2 *
3 * Broadcom B43legacy wireless driver
4 *
5 * Copyright (c) 2005 Martin Langer <martin-langer@gmx.de>
6 * Copyright (c) 2005-2008 Stefano Brivio <stefano.brivio@polimi.it>
7 * Copyright (c) 2005, 2006 Michael Buesch <mb@bu3sch.de>
8 * Copyright (c) 2005 Danny van Dyk <kugelfang@gentoo.org>
9 * Copyright (c) 2005 Andreas Jaggi <andreas.jaggi@waterwave.ch>
10 * Copyright (c) 2007 Larry Finger <Larry.Finger@lwfinger.net>
11 *
12 * Some parts of the code in this file are derived from the ipw2200
13 * driver Copyright(c) 2003 - 2004 Intel Corporation.
14
15 * This program is free software; you can redistribute it and/or modify
16 * it under the terms of the GNU General Public License as published by
17 * the Free Software Foundation; either version 2 of the License, or
18 * (at your option) any later version.
19 *
20 * This program is distributed in the hope that it will be useful,
21 * but WITHOUT ANY WARRANTY; without even the implied warranty of
22 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
23 * GNU General Public License for more details.
24 *
25 * You should have received a copy of the GNU General Public License
26 * along with this program; see the file COPYING. If not, write to
27 * the Free Software Foundation, Inc., 51 Franklin Steet, Fifth Floor,
28 * Boston, MA 02110-1301, USA.
29 *
30 */
31
32 #include <linux/delay.h>
33 #include <linux/init.h>
34 #include <linux/moduleparam.h>
35 #include <linux/if_arp.h>
36 #include <linux/etherdevice.h>
37 #include <linux/version.h>
38 #include <linux/firmware.h>
39 #include <linux/wireless.h>
40 #include <linux/workqueue.h>
41 #include <linux/skbuff.h>
42 #include <linux/dma-mapping.h>
43 #include <net/dst.h>
44 #include <asm/unaligned.h>
45
46 #include "b43legacy.h"
47 #include "main.h"
48 #include "debugfs.h"
49 #include "phy.h"
50 #include "dma.h"
51 #include "pio.h"
52 #include "sysfs.h"
53 #include "xmit.h"
54 #include "radio.h"
55
56
57 MODULE_DESCRIPTION("Broadcom B43legacy wireless driver");
58 MODULE_AUTHOR("Martin Langer");
59 MODULE_AUTHOR("Stefano Brivio");
60 MODULE_AUTHOR("Michael Buesch");
61 MODULE_LICENSE("GPL");
62
63 MODULE_FIRMWARE(B43legacy_SUPPORTED_FIRMWARE_ID);
64
65 #if defined(CONFIG_B43LEGACY_DMA) && defined(CONFIG_B43LEGACY_PIO)
66 static int modparam_pio;
67 module_param_named(pio, modparam_pio, int, 0444);
68 MODULE_PARM_DESC(pio, "enable(1) / disable(0) PIO mode");
69 #elif defined(CONFIG_B43LEGACY_DMA)
70 # define modparam_pio 0
71 #elif defined(CONFIG_B43LEGACY_PIO)
72 # define modparam_pio 1
73 #endif
74
75 static int modparam_bad_frames_preempt;
76 module_param_named(bad_frames_preempt, modparam_bad_frames_preempt, int, 0444);
77 MODULE_PARM_DESC(bad_frames_preempt, "enable(1) / disable(0) Bad Frames"
78 " Preemption");
79
80 static char modparam_fwpostfix[16];
81 module_param_string(fwpostfix, modparam_fwpostfix, 16, 0444);
82 MODULE_PARM_DESC(fwpostfix, "Postfix for the firmware files to load.");
83
84 /* The following table supports BCM4301, BCM4303 and BCM4306/2 devices. */
85 static const struct ssb_device_id b43legacy_ssb_tbl[] = {
86 SSB_DEVICE(SSB_VENDOR_BROADCOM, SSB_DEV_80211, 2),
87 SSB_DEVICE(SSB_VENDOR_BROADCOM, SSB_DEV_80211, 4),
88 SSB_DEVTABLE_END
89 };
90 MODULE_DEVICE_TABLE(ssb, b43legacy_ssb_tbl);
91
92
93 /* Channel and ratetables are shared for all devices.
94 * They can't be const, because ieee80211 puts some precalculated
95 * data in there. This data is the same for all devices, so we don't
96 * get concurrency issues */
97 #define RATETAB_ENT(_rateid, _flags) \
98 { \
99 .rate = B43legacy_RATE_TO_100KBPS(_rateid), \
100 .val = (_rateid), \
101 .val2 = (_rateid), \
102 .flags = (_flags), \
103 }
104 static struct ieee80211_rate __b43legacy_ratetable[] = {
105 RATETAB_ENT(B43legacy_CCK_RATE_1MB, IEEE80211_RATE_CCK),
106 RATETAB_ENT(B43legacy_CCK_RATE_2MB, IEEE80211_RATE_CCK_2),
107 RATETAB_ENT(B43legacy_CCK_RATE_5MB, IEEE80211_RATE_CCK_2),
108 RATETAB_ENT(B43legacy_CCK_RATE_11MB, IEEE80211_RATE_CCK_2),
109 RATETAB_ENT(B43legacy_OFDM_RATE_6MB, IEEE80211_RATE_OFDM),
110 RATETAB_ENT(B43legacy_OFDM_RATE_9MB, IEEE80211_RATE_OFDM),
111 RATETAB_ENT(B43legacy_OFDM_RATE_12MB, IEEE80211_RATE_OFDM),
112 RATETAB_ENT(B43legacy_OFDM_RATE_18MB, IEEE80211_RATE_OFDM),
113 RATETAB_ENT(B43legacy_OFDM_RATE_24MB, IEEE80211_RATE_OFDM),
114 RATETAB_ENT(B43legacy_OFDM_RATE_36MB, IEEE80211_RATE_OFDM),
115 RATETAB_ENT(B43legacy_OFDM_RATE_48MB, IEEE80211_RATE_OFDM),
116 RATETAB_ENT(B43legacy_OFDM_RATE_54MB, IEEE80211_RATE_OFDM),
117 };
118 #define b43legacy_a_ratetable (__b43legacy_ratetable + 4)
119 #define b43legacy_a_ratetable_size 8
120 #define b43legacy_b_ratetable (__b43legacy_ratetable + 0)
121 #define b43legacy_b_ratetable_size 4
122 #define b43legacy_g_ratetable (__b43legacy_ratetable + 0)
123 #define b43legacy_g_ratetable_size 12
124
125 #define CHANTAB_ENT(_chanid, _freq) \
126 { \
127 .chan = (_chanid), \
128 .freq = (_freq), \
129 .val = (_chanid), \
130 .flag = IEEE80211_CHAN_W_SCAN | \
131 IEEE80211_CHAN_W_ACTIVE_SCAN | \
132 IEEE80211_CHAN_W_IBSS, \
133 .power_level = 0x0A, \
134 .antenna_max = 0xFF, \
135 }
136 static struct ieee80211_channel b43legacy_bg_chantable[] = {
137 CHANTAB_ENT(1, 2412),
138 CHANTAB_ENT(2, 2417),
139 CHANTAB_ENT(3, 2422),
140 CHANTAB_ENT(4, 2427),
141 CHANTAB_ENT(5, 2432),
142 CHANTAB_ENT(6, 2437),
143 CHANTAB_ENT(7, 2442),
144 CHANTAB_ENT(8, 2447),
145 CHANTAB_ENT(9, 2452),
146 CHANTAB_ENT(10, 2457),
147 CHANTAB_ENT(11, 2462),
148 CHANTAB_ENT(12, 2467),
149 CHANTAB_ENT(13, 2472),
150 CHANTAB_ENT(14, 2484),
151 };
152 #define b43legacy_bg_chantable_size ARRAY_SIZE(b43legacy_bg_chantable)
153
154 static void b43legacy_wireless_core_exit(struct b43legacy_wldev *dev);
155 static int b43legacy_wireless_core_init(struct b43legacy_wldev *dev);
156 static void b43legacy_wireless_core_stop(struct b43legacy_wldev *dev);
157 static int b43legacy_wireless_core_start(struct b43legacy_wldev *dev);
158
159
160 static int b43legacy_ratelimit(struct b43legacy_wl *wl)
161 {
162 if (!wl || !wl->current_dev)
163 return 1;
164 if (b43legacy_status(wl->current_dev) < B43legacy_STAT_STARTED)
165 return 1;
166 /* We are up and running.
167 * Ratelimit the messages to avoid DoS over the net. */
168 return net_ratelimit();
169 }
170
171 void b43legacyinfo(struct b43legacy_wl *wl, const char *fmt, ...)
172 {
173 va_list args;
174
175 if (!b43legacy_ratelimit(wl))
176 return;
177 va_start(args, fmt);
178 printk(KERN_INFO "b43legacy-%s: ",
179 (wl && wl->hw) ? wiphy_name(wl->hw->wiphy) : "wlan");
180 vprintk(fmt, args);
181 va_end(args);
182 }
183
184 void b43legacyerr(struct b43legacy_wl *wl, const char *fmt, ...)
185 {
186 va_list args;
187
188 if (!b43legacy_ratelimit(wl))
189 return;
190 va_start(args, fmt);
191 printk(KERN_ERR "b43legacy-%s ERROR: ",
192 (wl && wl->hw) ? wiphy_name(wl->hw->wiphy) : "wlan");
193 vprintk(fmt, args);
194 va_end(args);
195 }
196
197 void b43legacywarn(struct b43legacy_wl *wl, const char *fmt, ...)
198 {
199 va_list args;
200
201 if (!b43legacy_ratelimit(wl))
202 return;
203 va_start(args, fmt);
204 printk(KERN_WARNING "b43legacy-%s warning: ",
205 (wl && wl->hw) ? wiphy_name(wl->hw->wiphy) : "wlan");
206 vprintk(fmt, args);
207 va_end(args);
208 }
209
210 #if B43legacy_DEBUG
211 void b43legacydbg(struct b43legacy_wl *wl, const char *fmt, ...)
212 {
213 va_list args;
214
215 va_start(args, fmt);
216 printk(KERN_DEBUG "b43legacy-%s debug: ",
217 (wl && wl->hw) ? wiphy_name(wl->hw->wiphy) : "wlan");
218 vprintk(fmt, args);
219 va_end(args);
220 }
221 #endif /* DEBUG */
222
223 static void b43legacy_ram_write(struct b43legacy_wldev *dev, u16 offset,
224 u32 val)
225 {
226 u32 status;
227
228 B43legacy_WARN_ON(offset % 4 != 0);
229
230 status = b43legacy_read32(dev, B43legacy_MMIO_MACCTL);
231 if (status & B43legacy_MACCTL_BE)
232 val = swab32(val);
233
234 b43legacy_write32(dev, B43legacy_MMIO_RAM_CONTROL, offset);
235 mmiowb();
236 b43legacy_write32(dev, B43legacy_MMIO_RAM_DATA, val);
237 }
238
239 static inline
240 void b43legacy_shm_control_word(struct b43legacy_wldev *dev,
241 u16 routing, u16 offset)
242 {
243 u32 control;
244
245 /* "offset" is the WORD offset. */
246
247 control = routing;
248 control <<= 16;
249 control |= offset;
250 b43legacy_write32(dev, B43legacy_MMIO_SHM_CONTROL, control);
251 }
252
253 u32 b43legacy_shm_read32(struct b43legacy_wldev *dev,
254 u16 routing, u16 offset)
255 {
256 u32 ret;
257
258 if (routing == B43legacy_SHM_SHARED) {
259 B43legacy_WARN_ON((offset & 0x0001) != 0);
260 if (offset & 0x0003) {
261 /* Unaligned access */
262 b43legacy_shm_control_word(dev, routing, offset >> 2);
263 ret = b43legacy_read16(dev,
264 B43legacy_MMIO_SHM_DATA_UNALIGNED);
265 ret <<= 16;
266 b43legacy_shm_control_word(dev, routing,
267 (offset >> 2) + 1);
268 ret |= b43legacy_read16(dev, B43legacy_MMIO_SHM_DATA);
269
270 return ret;
271 }
272 offset >>= 2;
273 }
274 b43legacy_shm_control_word(dev, routing, offset);
275 ret = b43legacy_read32(dev, B43legacy_MMIO_SHM_DATA);
276
277 return ret;
278 }
279
280 u16 b43legacy_shm_read16(struct b43legacy_wldev *dev,
281 u16 routing, u16 offset)
282 {
283 u16 ret;
284
285 if (routing == B43legacy_SHM_SHARED) {
286 B43legacy_WARN_ON((offset & 0x0001) != 0);
287 if (offset & 0x0003) {
288 /* Unaligned access */
289 b43legacy_shm_control_word(dev, routing, offset >> 2);
290 ret = b43legacy_read16(dev,
291 B43legacy_MMIO_SHM_DATA_UNALIGNED);
292
293 return ret;
294 }
295 offset >>= 2;
296 }
297 b43legacy_shm_control_word(dev, routing, offset);
298 ret = b43legacy_read16(dev, B43legacy_MMIO_SHM_DATA);
299
300 return ret;
301 }
302
303 void b43legacy_shm_write32(struct b43legacy_wldev *dev,
304 u16 routing, u16 offset,
305 u32 value)
306 {
307 if (routing == B43legacy_SHM_SHARED) {
308 B43legacy_WARN_ON((offset & 0x0001) != 0);
309 if (offset & 0x0003) {
310 /* Unaligned access */
311 b43legacy_shm_control_word(dev, routing, offset >> 2);
312 mmiowb();
313 b43legacy_write16(dev,
314 B43legacy_MMIO_SHM_DATA_UNALIGNED,
315 (value >> 16) & 0xffff);
316 mmiowb();
317 b43legacy_shm_control_word(dev, routing,
318 (offset >> 2) + 1);
319 mmiowb();
320 b43legacy_write16(dev, B43legacy_MMIO_SHM_DATA,
321 value & 0xffff);
322 return;
323 }
324 offset >>= 2;
325 }
326 b43legacy_shm_control_word(dev, routing, offset);
327 mmiowb();
328 b43legacy_write32(dev, B43legacy_MMIO_SHM_DATA, value);
329 }
330
331 void b43legacy_shm_write16(struct b43legacy_wldev *dev, u16 routing, u16 offset,
332 u16 value)
333 {
334 if (routing == B43legacy_SHM_SHARED) {
335 B43legacy_WARN_ON((offset & 0x0001) != 0);
336 if (offset & 0x0003) {
337 /* Unaligned access */
338 b43legacy_shm_control_word(dev, routing, offset >> 2);
339 mmiowb();
340 b43legacy_write16(dev,
341 B43legacy_MMIO_SHM_DATA_UNALIGNED,
342 value);
343 return;
344 }
345 offset >>= 2;
346 }
347 b43legacy_shm_control_word(dev, routing, offset);
348 mmiowb();
349 b43legacy_write16(dev, B43legacy_MMIO_SHM_DATA, value);
350 }
351
352 /* Read HostFlags */
353 u32 b43legacy_hf_read(struct b43legacy_wldev *dev)
354 {
355 u32 ret;
356
357 ret = b43legacy_shm_read16(dev, B43legacy_SHM_SHARED,
358 B43legacy_SHM_SH_HOSTFHI);
359 ret <<= 16;
360 ret |= b43legacy_shm_read16(dev, B43legacy_SHM_SHARED,
361 B43legacy_SHM_SH_HOSTFLO);
362
363 return ret;
364 }
365
366 /* Write HostFlags */
367 void b43legacy_hf_write(struct b43legacy_wldev *dev, u32 value)
368 {
369 b43legacy_shm_write16(dev, B43legacy_SHM_SHARED,
370 B43legacy_SHM_SH_HOSTFLO,
371 (value & 0x0000FFFF));
372 b43legacy_shm_write16(dev, B43legacy_SHM_SHARED,
373 B43legacy_SHM_SH_HOSTFHI,
374 ((value & 0xFFFF0000) >> 16));
375 }
376
377 void b43legacy_tsf_read(struct b43legacy_wldev *dev, u64 *tsf)
378 {
379 /* We need to be careful. As we read the TSF from multiple
380 * registers, we should take care of register overflows.
381 * In theory, the whole tsf read process should be atomic.
382 * We try to be atomic here, by restaring the read process,
383 * if any of the high registers changed (overflew).
384 */
385 if (dev->dev->id.revision >= 3) {
386 u32 low;
387 u32 high;
388 u32 high2;
389
390 do {
391 high = b43legacy_read32(dev,
392 B43legacy_MMIO_REV3PLUS_TSF_HIGH);
393 low = b43legacy_read32(dev,
394 B43legacy_MMIO_REV3PLUS_TSF_LOW);
395 high2 = b43legacy_read32(dev,
396 B43legacy_MMIO_REV3PLUS_TSF_HIGH);
397 } while (unlikely(high != high2));
398
399 *tsf = high;
400 *tsf <<= 32;
401 *tsf |= low;
402 } else {
403 u64 tmp;
404 u16 v0;
405 u16 v1;
406 u16 v2;
407 u16 v3;
408 u16 test1;
409 u16 test2;
410 u16 test3;
411
412 do {
413 v3 = b43legacy_read16(dev, B43legacy_MMIO_TSF_3);
414 v2 = b43legacy_read16(dev, B43legacy_MMIO_TSF_2);
415 v1 = b43legacy_read16(dev, B43legacy_MMIO_TSF_1);
416 v0 = b43legacy_read16(dev, B43legacy_MMIO_TSF_0);
417
418 test3 = b43legacy_read16(dev, B43legacy_MMIO_TSF_3);
419 test2 = b43legacy_read16(dev, B43legacy_MMIO_TSF_2);
420 test1 = b43legacy_read16(dev, B43legacy_MMIO_TSF_1);
421 } while (v3 != test3 || v2 != test2 || v1 != test1);
422
423 *tsf = v3;
424 *tsf <<= 48;
425 tmp = v2;
426 tmp <<= 32;
427 *tsf |= tmp;
428 tmp = v1;
429 tmp <<= 16;
430 *tsf |= tmp;
431 *tsf |= v0;
432 }
433 }
434
435 static void b43legacy_time_lock(struct b43legacy_wldev *dev)
436 {
437 u32 status;
438
439 status = b43legacy_read32(dev, B43legacy_MMIO_MACCTL);
440 status |= B43legacy_MACCTL_TBTTHOLD;
441 b43legacy_write32(dev, B43legacy_MMIO_MACCTL, status);
442 mmiowb();
443 }
444
445 static void b43legacy_time_unlock(struct b43legacy_wldev *dev)
446 {
447 u32 status;
448
449 status = b43legacy_read32(dev, B43legacy_MMIO_MACCTL);
450 status &= ~B43legacy_MACCTL_TBTTHOLD;
451 b43legacy_write32(dev, B43legacy_MMIO_MACCTL, status);
452 }
453
454 static void b43legacy_tsf_write_locked(struct b43legacy_wldev *dev, u64 tsf)
455 {
456 /* Be careful with the in-progress timer.
457 * First zero out the low register, so we have a full
458 * register-overflow duration to complete the operation.
459 */
460 if (dev->dev->id.revision >= 3) {
461 u32 lo = (tsf & 0x00000000FFFFFFFFULL);
462 u32 hi = (tsf & 0xFFFFFFFF00000000ULL) >> 32;
463
464 b43legacy_write32(dev, B43legacy_MMIO_REV3PLUS_TSF_LOW, 0);
465 mmiowb();
466 b43legacy_write32(dev, B43legacy_MMIO_REV3PLUS_TSF_HIGH,
467 hi);
468 mmiowb();
469 b43legacy_write32(dev, B43legacy_MMIO_REV3PLUS_TSF_LOW,
470 lo);
471 } else {
472 u16 v0 = (tsf & 0x000000000000FFFFULL);
473 u16 v1 = (tsf & 0x00000000FFFF0000ULL) >> 16;
474 u16 v2 = (tsf & 0x0000FFFF00000000ULL) >> 32;
475 u16 v3 = (tsf & 0xFFFF000000000000ULL) >> 48;
476
477 b43legacy_write16(dev, B43legacy_MMIO_TSF_0, 0);
478 mmiowb();
479 b43legacy_write16(dev, B43legacy_MMIO_TSF_3, v3);
480 mmiowb();
481 b43legacy_write16(dev, B43legacy_MMIO_TSF_2, v2);
482 mmiowb();
483 b43legacy_write16(dev, B43legacy_MMIO_TSF_1, v1);
484 mmiowb();
485 b43legacy_write16(dev, B43legacy_MMIO_TSF_0, v0);
486 }
487 }
488
489 void b43legacy_tsf_write(struct b43legacy_wldev *dev, u64 tsf)
490 {
491 b43legacy_time_lock(dev);
492 b43legacy_tsf_write_locked(dev, tsf);
493 b43legacy_time_unlock(dev);
494 }
495
496 static
497 void b43legacy_macfilter_set(struct b43legacy_wldev *dev,
498 u16 offset, const u8 *mac)
499 {
500 static const u8 zero_addr[ETH_ALEN] = { 0 };
501 u16 data;
502
503 if (!mac)
504 mac = zero_addr;
505
506 offset |= 0x0020;
507 b43legacy_write16(dev, B43legacy_MMIO_MACFILTER_CONTROL, offset);
508
509 data = mac[0];
510 data |= mac[1] << 8;
511 b43legacy_write16(dev, B43legacy_MMIO_MACFILTER_DATA, data);
512 data = mac[2];
513 data |= mac[3] << 8;
514 b43legacy_write16(dev, B43legacy_MMIO_MACFILTER_DATA, data);
515 data = mac[4];
516 data |= mac[5] << 8;
517 b43legacy_write16(dev, B43legacy_MMIO_MACFILTER_DATA, data);
518 }
519
520 static void b43legacy_write_mac_bssid_templates(struct b43legacy_wldev *dev)
521 {
522 static const u8 zero_addr[ETH_ALEN] = { 0 };
523 const u8 *mac = dev->wl->mac_addr;
524 const u8 *bssid = dev->wl->bssid;
525 u8 mac_bssid[ETH_ALEN * 2];
526 int i;
527 u32 tmp;
528
529 if (!bssid)
530 bssid = zero_addr;
531 if (!mac)
532 mac = zero_addr;
533
534 b43legacy_macfilter_set(dev, B43legacy_MACFILTER_BSSID, bssid);
535
536 memcpy(mac_bssid, mac, ETH_ALEN);
537 memcpy(mac_bssid + ETH_ALEN, bssid, ETH_ALEN);
538
539 /* Write our MAC address and BSSID to template ram */
540 for (i = 0; i < ARRAY_SIZE(mac_bssid); i += sizeof(u32)) {
541 tmp = (u32)(mac_bssid[i + 0]);
542 tmp |= (u32)(mac_bssid[i + 1]) << 8;
543 tmp |= (u32)(mac_bssid[i + 2]) << 16;
544 tmp |= (u32)(mac_bssid[i + 3]) << 24;
545 b43legacy_ram_write(dev, 0x20 + i, tmp);
546 b43legacy_ram_write(dev, 0x78 + i, tmp);
547 b43legacy_ram_write(dev, 0x478 + i, tmp);
548 }
549 }
550
551 static void b43legacy_upload_card_macaddress(struct b43legacy_wldev *dev)
552 {
553 b43legacy_write_mac_bssid_templates(dev);
554 b43legacy_macfilter_set(dev, B43legacy_MACFILTER_SELF,
555 dev->wl->mac_addr);
556 }
557
558 static void b43legacy_set_slot_time(struct b43legacy_wldev *dev,
559 u16 slot_time)
560 {
561 /* slot_time is in usec. */
562 if (dev->phy.type != B43legacy_PHYTYPE_G)
563 return;
564 b43legacy_write16(dev, 0x684, 510 + slot_time);
565 b43legacy_shm_write16(dev, B43legacy_SHM_SHARED, 0x0010,
566 slot_time);
567 }
568
569 static void b43legacy_short_slot_timing_enable(struct b43legacy_wldev *dev)
570 {
571 b43legacy_set_slot_time(dev, 9);
572 dev->short_slot = 1;
573 }
574
575 static void b43legacy_short_slot_timing_disable(struct b43legacy_wldev *dev)
576 {
577 b43legacy_set_slot_time(dev, 20);
578 dev->short_slot = 0;
579 }
580
581 /* Enable a Generic IRQ. "mask" is the mask of which IRQs to enable.
582 * Returns the _previously_ enabled IRQ mask.
583 */
584 static inline u32 b43legacy_interrupt_enable(struct b43legacy_wldev *dev,
585 u32 mask)
586 {
587 u32 old_mask;
588
589 old_mask = b43legacy_read32(dev, B43legacy_MMIO_GEN_IRQ_MASK);
590 b43legacy_write32(dev, B43legacy_MMIO_GEN_IRQ_MASK, old_mask |
591 mask);
592
593 return old_mask;
594 }
595
596 /* Disable a Generic IRQ. "mask" is the mask of which IRQs to disable.
597 * Returns the _previously_ enabled IRQ mask.
598 */
599 static inline u32 b43legacy_interrupt_disable(struct b43legacy_wldev *dev,
600 u32 mask)
601 {
602 u32 old_mask;
603
604 old_mask = b43legacy_read32(dev, B43legacy_MMIO_GEN_IRQ_MASK);
605 b43legacy_write32(dev, B43legacy_MMIO_GEN_IRQ_MASK, old_mask & ~mask);
606
607 return old_mask;
608 }
609
610 /* Synchronize IRQ top- and bottom-half.
611 * IRQs must be masked before calling this.
612 * This must not be called with the irq_lock held.
613 */
614 static void b43legacy_synchronize_irq(struct b43legacy_wldev *dev)
615 {
616 synchronize_irq(dev->dev->irq);
617 tasklet_kill(&dev->isr_tasklet);
618 }
619
620 /* DummyTransmission function, as documented on
621 * http://bcm-specs.sipsolutions.net/DummyTransmission
622 */
623 void b43legacy_dummy_transmission(struct b43legacy_wldev *dev)
624 {
625 struct b43legacy_phy *phy = &dev->phy;
626 unsigned int i;
627 unsigned int max_loop;
628 u16 value;
629 u32 buffer[5] = {
630 0x00000000,
631 0x00D40000,
632 0x00000000,
633 0x01000000,
634 0x00000000,
635 };
636
637 switch (phy->type) {
638 case B43legacy_PHYTYPE_B:
639 case B43legacy_PHYTYPE_G:
640 max_loop = 0xFA;
641 buffer[0] = 0x000B846E;
642 break;
643 default:
644 B43legacy_BUG_ON(1);
645 return;
646 }
647
648 for (i = 0; i < 5; i++)
649 b43legacy_ram_write(dev, i * 4, buffer[i]);
650
651 /* dummy read follows */
652 b43legacy_read32(dev, B43legacy_MMIO_MACCTL);
653
654 b43legacy_write16(dev, 0x0568, 0x0000);
655 b43legacy_write16(dev, 0x07C0, 0x0000);
656 b43legacy_write16(dev, 0x050C, 0x0000);
657 b43legacy_write16(dev, 0x0508, 0x0000);
658 b43legacy_write16(dev, 0x050A, 0x0000);
659 b43legacy_write16(dev, 0x054C, 0x0000);
660 b43legacy_write16(dev, 0x056A, 0x0014);
661 b43legacy_write16(dev, 0x0568, 0x0826);
662 b43legacy_write16(dev, 0x0500, 0x0000);
663 b43legacy_write16(dev, 0x0502, 0x0030);
664
665 if (phy->radio_ver == 0x2050 && phy->radio_rev <= 0x5)
666 b43legacy_radio_write16(dev, 0x0051, 0x0017);
667 for (i = 0x00; i < max_loop; i++) {
668 value = b43legacy_read16(dev, 0x050E);
669 if (value & 0x0080)
670 break;
671 udelay(10);
672 }
673 for (i = 0x00; i < 0x0A; i++) {
674 value = b43legacy_read16(dev, 0x050E);
675 if (value & 0x0400)
676 break;
677 udelay(10);
678 }
679 for (i = 0x00; i < 0x0A; i++) {
680 value = b43legacy_read16(dev, 0x0690);
681 if (!(value & 0x0100))
682 break;
683 udelay(10);
684 }
685 if (phy->radio_ver == 0x2050 && phy->radio_rev <= 0x5)
686 b43legacy_radio_write16(dev, 0x0051, 0x0037);
687 }
688
689 /* Turn the Analog ON/OFF */
690 static void b43legacy_switch_analog(struct b43legacy_wldev *dev, int on)
691 {
692 b43legacy_write16(dev, B43legacy_MMIO_PHY0, on ? 0 : 0xF4);
693 }
694
695 void b43legacy_wireless_core_reset(struct b43legacy_wldev *dev, u32 flags)
696 {
697 u32 tmslow;
698 u32 macctl;
699
700 flags |= B43legacy_TMSLOW_PHYCLKEN;
701 flags |= B43legacy_TMSLOW_PHYRESET;
702 ssb_device_enable(dev->dev, flags);
703 msleep(2); /* Wait for the PLL to turn on. */
704
705 /* Now take the PHY out of Reset again */
706 tmslow = ssb_read32(dev->dev, SSB_TMSLOW);
707 tmslow |= SSB_TMSLOW_FGC;
708 tmslow &= ~B43legacy_TMSLOW_PHYRESET;
709 ssb_write32(dev->dev, SSB_TMSLOW, tmslow);
710 ssb_read32(dev->dev, SSB_TMSLOW); /* flush */
711 msleep(1);
712 tmslow &= ~SSB_TMSLOW_FGC;
713 ssb_write32(dev->dev, SSB_TMSLOW, tmslow);
714 ssb_read32(dev->dev, SSB_TMSLOW); /* flush */
715 msleep(1);
716
717 /* Turn Analog ON */
718 b43legacy_switch_analog(dev, 1);
719
720 macctl = b43legacy_read32(dev, B43legacy_MMIO_MACCTL);
721 macctl &= ~B43legacy_MACCTL_GMODE;
722 if (flags & B43legacy_TMSLOW_GMODE) {
723 macctl |= B43legacy_MACCTL_GMODE;
724 dev->phy.gmode = 1;
725 } else
726 dev->phy.gmode = 0;
727 macctl |= B43legacy_MACCTL_IHR_ENABLED;
728 b43legacy_write32(dev, B43legacy_MMIO_MACCTL, macctl);
729 }
730
731 static void handle_irq_transmit_status(struct b43legacy_wldev *dev)
732 {
733 u32 v0;
734 u32 v1;
735 u16 tmp;
736 struct b43legacy_txstatus stat;
737
738 while (1) {
739 v0 = b43legacy_read32(dev, B43legacy_MMIO_XMITSTAT_0);
740 if (!(v0 & 0x00000001))
741 break;
742 v1 = b43legacy_read32(dev, B43legacy_MMIO_XMITSTAT_1);
743
744 stat.cookie = (v0 >> 16);
745 stat.seq = (v1 & 0x0000FFFF);
746 stat.phy_stat = ((v1 & 0x00FF0000) >> 16);
747 tmp = (v0 & 0x0000FFFF);
748 stat.frame_count = ((tmp & 0xF000) >> 12);
749 stat.rts_count = ((tmp & 0x0F00) >> 8);
750 stat.supp_reason = ((tmp & 0x001C) >> 2);
751 stat.pm_indicated = !!(tmp & 0x0080);
752 stat.intermediate = !!(tmp & 0x0040);
753 stat.for_ampdu = !!(tmp & 0x0020);
754 stat.acked = !!(tmp & 0x0002);
755
756 b43legacy_handle_txstatus(dev, &stat);
757 }
758 }
759
760 static void drain_txstatus_queue(struct b43legacy_wldev *dev)
761 {
762 u32 dummy;
763
764 if (dev->dev->id.revision < 5)
765 return;
766 /* Read all entries from the microcode TXstatus FIFO
767 * and throw them away.
768 */
769 while (1) {
770 dummy = b43legacy_read32(dev, B43legacy_MMIO_XMITSTAT_0);
771 if (!(dummy & 0x00000001))
772 break;
773 dummy = b43legacy_read32(dev, B43legacy_MMIO_XMITSTAT_1);
774 }
775 }
776
777 static u32 b43legacy_jssi_read(struct b43legacy_wldev *dev)
778 {
779 u32 val = 0;
780
781 val = b43legacy_shm_read16(dev, B43legacy_SHM_SHARED, 0x40A);
782 val <<= 16;
783 val |= b43legacy_shm_read16(dev, B43legacy_SHM_SHARED, 0x408);
784
785 return val;
786 }
787
788 static void b43legacy_jssi_write(struct b43legacy_wldev *dev, u32 jssi)
789 {
790 b43legacy_shm_write16(dev, B43legacy_SHM_SHARED, 0x408,
791 (jssi & 0x0000FFFF));
792 b43legacy_shm_write16(dev, B43legacy_SHM_SHARED, 0x40A,
793 (jssi & 0xFFFF0000) >> 16);
794 }
795
796 static void b43legacy_generate_noise_sample(struct b43legacy_wldev *dev)
797 {
798 b43legacy_jssi_write(dev, 0x7F7F7F7F);
799 b43legacy_write32(dev, B43legacy_MMIO_MACCMD,
800 b43legacy_read32(dev,
801 B43legacy_MMIO_MACCMD)
802 | (1 << 4));
803 B43legacy_WARN_ON(dev->noisecalc.channel_at_start !=
804 dev->phy.channel);
805 }
806
807 static void b43legacy_calculate_link_quality(struct b43legacy_wldev *dev)
808 {
809 /* Top half of Link Quality calculation. */
810
811 if (dev->noisecalc.calculation_running)
812 return;
813 dev->noisecalc.channel_at_start = dev->phy.channel;
814 dev->noisecalc.calculation_running = 1;
815 dev->noisecalc.nr_samples = 0;
816
817 b43legacy_generate_noise_sample(dev);
818 }
819
820 static void handle_irq_noise(struct b43legacy_wldev *dev)
821 {
822 struct b43legacy_phy *phy = &dev->phy;
823 u16 tmp;
824 u8 noise[4];
825 u8 i;
826 u8 j;
827 s32 average;
828
829 /* Bottom half of Link Quality calculation. */
830
831 B43legacy_WARN_ON(!dev->noisecalc.calculation_running);
832 if (dev->noisecalc.channel_at_start != phy->channel)
833 goto drop_calculation;
834 *((__le32 *)noise) = cpu_to_le32(b43legacy_jssi_read(dev));
835 if (noise[0] == 0x7F || noise[1] == 0x7F ||
836 noise[2] == 0x7F || noise[3] == 0x7F)
837 goto generate_new;
838
839 /* Get the noise samples. */
840 B43legacy_WARN_ON(dev->noisecalc.nr_samples >= 8);
841 i = dev->noisecalc.nr_samples;
842 noise[0] = limit_value(noise[0], 0, ARRAY_SIZE(phy->nrssi_lt) - 1);
843 noise[1] = limit_value(noise[1], 0, ARRAY_SIZE(phy->nrssi_lt) - 1);
844 noise[2] = limit_value(noise[2], 0, ARRAY_SIZE(phy->nrssi_lt) - 1);
845 noise[3] = limit_value(noise[3], 0, ARRAY_SIZE(phy->nrssi_lt) - 1);
846 dev->noisecalc.samples[i][0] = phy->nrssi_lt[noise[0]];
847 dev->noisecalc.samples[i][1] = phy->nrssi_lt[noise[1]];
848 dev->noisecalc.samples[i][2] = phy->nrssi_lt[noise[2]];
849 dev->noisecalc.samples[i][3] = phy->nrssi_lt[noise[3]];
850 dev->noisecalc.nr_samples++;
851 if (dev->noisecalc.nr_samples == 8) {
852 /* Calculate the Link Quality by the noise samples. */
853 average = 0;
854 for (i = 0; i < 8; i++) {
855 for (j = 0; j < 4; j++)
856 average += dev->noisecalc.samples[i][j];
857 }
858 average /= (8 * 4);
859 average *= 125;
860 average += 64;
861 average /= 128;
862 tmp = b43legacy_shm_read16(dev, B43legacy_SHM_SHARED,
863 0x40C);
864 tmp = (tmp / 128) & 0x1F;
865 if (tmp >= 8)
866 average += 2;
867 else
868 average -= 25;
869 if (tmp == 8)
870 average -= 72;
871 else
872 average -= 48;
873
874 dev->stats.link_noise = average;
875 drop_calculation:
876 dev->noisecalc.calculation_running = 0;
877 return;
878 }
879 generate_new:
880 b43legacy_generate_noise_sample(dev);
881 }
882
883 static void handle_irq_tbtt_indication(struct b43legacy_wldev *dev)
884 {
885 if (b43legacy_is_mode(dev->wl, IEEE80211_IF_TYPE_AP)) {
886 /* TODO: PS TBTT */
887 } else {
888 if (1/*FIXME: the last PSpoll frame was sent successfully */)
889 b43legacy_power_saving_ctl_bits(dev, -1, -1);
890 }
891 dev->reg124_set_0x4 = 0;
892 if (b43legacy_is_mode(dev->wl, IEEE80211_IF_TYPE_IBSS))
893 dev->reg124_set_0x4 = 1;
894 }
895
896 static void handle_irq_atim_end(struct b43legacy_wldev *dev)
897 {
898 if (!dev->reg124_set_0x4) /*FIXME rename this variable*/
899 return;
900 b43legacy_write32(dev, B43legacy_MMIO_MACCMD,
901 b43legacy_read32(dev, B43legacy_MMIO_MACCMD)
902 | 0x4);
903 }
904
905 static void handle_irq_pmq(struct b43legacy_wldev *dev)
906 {
907 u32 tmp;
908
909 /* TODO: AP mode. */
910
911 while (1) {
912 tmp = b43legacy_read32(dev, B43legacy_MMIO_PS_STATUS);
913 if (!(tmp & 0x00000008))
914 break;
915 }
916 /* 16bit write is odd, but correct. */
917 b43legacy_write16(dev, B43legacy_MMIO_PS_STATUS, 0x0002);
918 }
919
920 static void b43legacy_write_template_common(struct b43legacy_wldev *dev,
921 const u8 *data, u16 size,
922 u16 ram_offset,
923 u16 shm_size_offset, u8 rate)
924 {
925 u32 i;
926 u32 tmp;
927 struct b43legacy_plcp_hdr4 plcp;
928
929 plcp.data = 0;
930 b43legacy_generate_plcp_hdr(&plcp, size + FCS_LEN, rate);
931 b43legacy_ram_write(dev, ram_offset, le32_to_cpu(plcp.data));
932 ram_offset += sizeof(u32);
933 /* The PLCP is 6 bytes long, but we only wrote 4 bytes, yet.
934 * So leave the first two bytes of the next write blank.
935 */
936 tmp = (u32)(data[0]) << 16;
937 tmp |= (u32)(data[1]) << 24;
938 b43legacy_ram_write(dev, ram_offset, tmp);
939 ram_offset += sizeof(u32);
940 for (i = 2; i < size; i += sizeof(u32)) {
941 tmp = (u32)(data[i + 0]);
942 if (i + 1 < size)
943 tmp |= (u32)(data[i + 1]) << 8;
944 if (i + 2 < size)
945 tmp |= (u32)(data[i + 2]) << 16;
946 if (i + 3 < size)
947 tmp |= (u32)(data[i + 3]) << 24;
948 b43legacy_ram_write(dev, ram_offset + i - 2, tmp);
949 }
950 b43legacy_shm_write16(dev, B43legacy_SHM_SHARED, shm_size_offset,
951 size + sizeof(struct b43legacy_plcp_hdr6));
952 }
953
954 static void b43legacy_write_beacon_template(struct b43legacy_wldev *dev,
955 u16 ram_offset,
956 u16 shm_size_offset, u8 rate)
957 {
958 int len;
959 const u8 *data;
960
961 B43legacy_WARN_ON(!dev->cached_beacon);
962 len = min((size_t)dev->cached_beacon->len,
963 0x200 - sizeof(struct b43legacy_plcp_hdr6));
964 data = (const u8 *)(dev->cached_beacon->data);
965 b43legacy_write_template_common(dev, data,
966 len, ram_offset,
967 shm_size_offset, rate);
968 }
969
970 static void b43legacy_write_probe_resp_plcp(struct b43legacy_wldev *dev,
971 u16 shm_offset, u16 size,
972 u8 rate)
973 {
974 struct b43legacy_plcp_hdr4 plcp;
975 u32 tmp;
976 __le16 dur;
977
978 plcp.data = 0;
979 b43legacy_generate_plcp_hdr(&plcp, size + FCS_LEN, rate);
980 dur = ieee80211_generic_frame_duration(dev->wl->hw,
981 dev->wl->vif,
982 size,
983 B43legacy_RATE_TO_100KBPS(rate));
984 /* Write PLCP in two parts and timing for packet transfer */
985 tmp = le32_to_cpu(plcp.data);
986 b43legacy_shm_write16(dev, B43legacy_SHM_SHARED, shm_offset,
987 tmp & 0xFFFF);
988 b43legacy_shm_write16(dev, B43legacy_SHM_SHARED, shm_offset + 2,
989 tmp >> 16);
990 b43legacy_shm_write16(dev, B43legacy_SHM_SHARED, shm_offset + 6,
991 le16_to_cpu(dur));
992 }
993
994 /* Instead of using custom probe response template, this function
995 * just patches custom beacon template by:
996 * 1) Changing packet type
997 * 2) Patching duration field
998 * 3) Stripping TIM
999 */
1000 static u8 *b43legacy_generate_probe_resp(struct b43legacy_wldev *dev,
1001 u16 *dest_size, u8 rate)
1002 {
1003 const u8 *src_data;
1004 u8 *dest_data;
1005 u16 src_size;
1006 u16 elem_size;
1007 u16 src_pos;
1008 u16 dest_pos;
1009 __le16 dur;
1010 struct ieee80211_hdr *hdr;
1011
1012 B43legacy_WARN_ON(!dev->cached_beacon);
1013 src_size = dev->cached_beacon->len;
1014 src_data = (const u8 *)dev->cached_beacon->data;
1015
1016 if (unlikely(src_size < 0x24)) {
1017 b43legacydbg(dev->wl, "b43legacy_generate_probe_resp: "
1018 "invalid beacon\n");
1019 return NULL;
1020 }
1021
1022 dest_data = kmalloc(src_size, GFP_ATOMIC);
1023 if (unlikely(!dest_data))
1024 return NULL;
1025
1026 /* 0x24 is offset of first variable-len Information-Element
1027 * in beacon frame.
1028 */
1029 memcpy(dest_data, src_data, 0x24);
1030 src_pos = 0x24;
1031 dest_pos = 0x24;
1032 for (; src_pos < src_size - 2; src_pos += elem_size) {
1033 elem_size = src_data[src_pos + 1] + 2;
1034 if (src_data[src_pos] != 0x05) { /* TIM */
1035 memcpy(dest_data + dest_pos, src_data + src_pos,
1036 elem_size);
1037 dest_pos += elem_size;
1038 }
1039 }
1040 *dest_size = dest_pos;
1041 hdr = (struct ieee80211_hdr *)dest_data;
1042
1043 /* Set the frame control. */
1044 hdr->frame_control = cpu_to_le16(IEEE80211_FTYPE_MGMT |
1045 IEEE80211_STYPE_PROBE_RESP);
1046 dur = ieee80211_generic_frame_duration(dev->wl->hw,
1047 dev->wl->vif,
1048 *dest_size,
1049 B43legacy_RATE_TO_100KBPS(rate));
1050 hdr->duration_id = dur;
1051
1052 return dest_data;
1053 }
1054
1055 static void b43legacy_write_probe_resp_template(struct b43legacy_wldev *dev,
1056 u16 ram_offset,
1057 u16 shm_size_offset, u8 rate)
1058 {
1059 u8 *probe_resp_data;
1060 u16 size;
1061
1062 B43legacy_WARN_ON(!dev->cached_beacon);
1063 size = dev->cached_beacon->len;
1064 probe_resp_data = b43legacy_generate_probe_resp(dev, &size, rate);
1065 if (unlikely(!probe_resp_data))
1066 return;
1067
1068 /* Looks like PLCP headers plus packet timings are stored for
1069 * all possible basic rates
1070 */
1071 b43legacy_write_probe_resp_plcp(dev, 0x31A, size,
1072 B43legacy_CCK_RATE_1MB);
1073 b43legacy_write_probe_resp_plcp(dev, 0x32C, size,
1074 B43legacy_CCK_RATE_2MB);
1075 b43legacy_write_probe_resp_plcp(dev, 0x33E, size,
1076 B43legacy_CCK_RATE_5MB);
1077 b43legacy_write_probe_resp_plcp(dev, 0x350, size,
1078 B43legacy_CCK_RATE_11MB);
1079
1080 size = min((size_t)size,
1081 0x200 - sizeof(struct b43legacy_plcp_hdr6));
1082 b43legacy_write_template_common(dev, probe_resp_data,
1083 size, ram_offset,
1084 shm_size_offset, rate);
1085 kfree(probe_resp_data);
1086 }
1087
1088 static int b43legacy_refresh_cached_beacon(struct b43legacy_wldev *dev,
1089 struct sk_buff *beacon)
1090 {
1091 if (dev->cached_beacon)
1092 kfree_skb(dev->cached_beacon);
1093 dev->cached_beacon = beacon;
1094
1095 return 0;
1096 }
1097
1098 static void b43legacy_update_templates(struct b43legacy_wldev *dev)
1099 {
1100 u32 status;
1101
1102 B43legacy_WARN_ON(!dev->cached_beacon);
1103
1104 b43legacy_write_beacon_template(dev, 0x68, 0x18,
1105 B43legacy_CCK_RATE_1MB);
1106 b43legacy_write_beacon_template(dev, 0x468, 0x1A,
1107 B43legacy_CCK_RATE_1MB);
1108 b43legacy_write_probe_resp_template(dev, 0x268, 0x4A,
1109 B43legacy_CCK_RATE_11MB);
1110
1111 status = b43legacy_read32(dev, B43legacy_MMIO_MACCMD);
1112 status |= 0x03;
1113 b43legacy_write32(dev, B43legacy_MMIO_MACCMD, status);
1114 }
1115
1116 static void b43legacy_refresh_templates(struct b43legacy_wldev *dev,
1117 struct sk_buff *beacon)
1118 {
1119 int err;
1120
1121 err = b43legacy_refresh_cached_beacon(dev, beacon);
1122 if (unlikely(err))
1123 return;
1124 b43legacy_update_templates(dev);
1125 }
1126
1127 static void b43legacy_set_ssid(struct b43legacy_wldev *dev,
1128 const u8 *ssid, u8 ssid_len)
1129 {
1130 u32 tmp;
1131 u16 i;
1132 u16 len;
1133
1134 len = min((u16)ssid_len, (u16)0x100);
1135 for (i = 0; i < len; i += sizeof(u32)) {
1136 tmp = (u32)(ssid[i + 0]);
1137 if (i + 1 < len)
1138 tmp |= (u32)(ssid[i + 1]) << 8;
1139 if (i + 2 < len)
1140 tmp |= (u32)(ssid[i + 2]) << 16;
1141 if (i + 3 < len)
1142 tmp |= (u32)(ssid[i + 3]) << 24;
1143 b43legacy_shm_write32(dev, B43legacy_SHM_SHARED,
1144 0x380 + i, tmp);
1145 }
1146 b43legacy_shm_write16(dev, B43legacy_SHM_SHARED,
1147 0x48, len);
1148 }
1149
1150 static void b43legacy_set_beacon_int(struct b43legacy_wldev *dev,
1151 u16 beacon_int)
1152 {
1153 b43legacy_time_lock(dev);
1154 if (dev->dev->id.revision >= 3)
1155 b43legacy_write32(dev, 0x188, (beacon_int << 16));
1156 else {
1157 b43legacy_write16(dev, 0x606, (beacon_int >> 6));
1158 b43legacy_write16(dev, 0x610, beacon_int);
1159 }
1160 b43legacy_time_unlock(dev);
1161 }
1162
1163 static void handle_irq_beacon(struct b43legacy_wldev *dev)
1164 {
1165 u32 status;
1166
1167 if (!b43legacy_is_mode(dev->wl, IEEE80211_IF_TYPE_AP))
1168 return;
1169
1170 dev->irq_savedstate &= ~B43legacy_IRQ_BEACON;
1171 status = b43legacy_read32(dev, B43legacy_MMIO_MACCMD);
1172
1173 if (!dev->cached_beacon || ((status & 0x1) && (status & 0x2))) {
1174 /* ACK beacon IRQ. */
1175 b43legacy_write32(dev, B43legacy_MMIO_GEN_IRQ_REASON,
1176 B43legacy_IRQ_BEACON);
1177 dev->irq_savedstate |= B43legacy_IRQ_BEACON;
1178 if (dev->cached_beacon)
1179 kfree_skb(dev->cached_beacon);
1180 dev->cached_beacon = NULL;
1181 return;
1182 }
1183 if (!(status & 0x1)) {
1184 b43legacy_write_beacon_template(dev, 0x68, 0x18,
1185 B43legacy_CCK_RATE_1MB);
1186 status |= 0x1;
1187 b43legacy_write32(dev, B43legacy_MMIO_MACCMD,
1188 status);
1189 }
1190 if (!(status & 0x2)) {
1191 b43legacy_write_beacon_template(dev, 0x468, 0x1A,
1192 B43legacy_CCK_RATE_1MB);
1193 status |= 0x2;
1194 b43legacy_write32(dev, B43legacy_MMIO_MACCMD,
1195 status);
1196 }
1197 }
1198
1199 static void handle_irq_ucode_debug(struct b43legacy_wldev *dev)
1200 {
1201 }
1202
1203 /* Interrupt handler bottom-half */
1204 static void b43legacy_interrupt_tasklet(struct b43legacy_wldev *dev)
1205 {
1206 u32 reason;
1207 u32 dma_reason[ARRAY_SIZE(dev->dma_reason)];
1208 u32 merged_dma_reason = 0;
1209 int i;
1210 unsigned long flags;
1211
1212 spin_lock_irqsave(&dev->wl->irq_lock, flags);
1213
1214 B43legacy_WARN_ON(b43legacy_status(dev) <
1215 B43legacy_STAT_INITIALIZED);
1216
1217 reason = dev->irq_reason;
1218 for (i = 0; i < ARRAY_SIZE(dma_reason); i++) {
1219 dma_reason[i] = dev->dma_reason[i];
1220 merged_dma_reason |= dma_reason[i];
1221 }
1222
1223 if (unlikely(reason & B43legacy_IRQ_MAC_TXERR))
1224 b43legacyerr(dev->wl, "MAC transmission error\n");
1225
1226 if (unlikely(reason & B43legacy_IRQ_PHY_TXERR)) {
1227 b43legacyerr(dev->wl, "PHY transmission error\n");
1228 rmb();
1229 if (unlikely(atomic_dec_and_test(&dev->phy.txerr_cnt))) {
1230 b43legacyerr(dev->wl, "Too many PHY TX errors, "
1231 "restarting the controller\n");
1232 b43legacy_controller_restart(dev, "PHY TX errors");
1233 }
1234 }
1235
1236 if (unlikely(merged_dma_reason & (B43legacy_DMAIRQ_FATALMASK |
1237 B43legacy_DMAIRQ_NONFATALMASK))) {
1238 if (merged_dma_reason & B43legacy_DMAIRQ_FATALMASK) {
1239 b43legacyerr(dev->wl, "Fatal DMA error: "
1240 "0x%08X, 0x%08X, 0x%08X, "
1241 "0x%08X, 0x%08X, 0x%08X\n",
1242 dma_reason[0], dma_reason[1],
1243 dma_reason[2], dma_reason[3],
1244 dma_reason[4], dma_reason[5]);
1245 b43legacy_controller_restart(dev, "DMA error");
1246 mmiowb();
1247 spin_unlock_irqrestore(&dev->wl->irq_lock, flags);
1248 return;
1249 }
1250 if (merged_dma_reason & B43legacy_DMAIRQ_NONFATALMASK)
1251 b43legacyerr(dev->wl, "DMA error: "
1252 "0x%08X, 0x%08X, 0x%08X, "
1253 "0x%08X, 0x%08X, 0x%08X\n",
1254 dma_reason[0], dma_reason[1],
1255 dma_reason[2], dma_reason[3],
1256 dma_reason[4], dma_reason[5]);
1257 }
1258
1259 if (unlikely(reason & B43legacy_IRQ_UCODE_DEBUG))
1260 handle_irq_ucode_debug(dev);
1261 if (reason & B43legacy_IRQ_TBTT_INDI)
1262 handle_irq_tbtt_indication(dev);
1263 if (reason & B43legacy_IRQ_ATIM_END)
1264 handle_irq_atim_end(dev);
1265 if (reason & B43legacy_IRQ_BEACON)
1266 handle_irq_beacon(dev);
1267 if (reason & B43legacy_IRQ_PMQ)
1268 handle_irq_pmq(dev);
1269 if (reason & B43legacy_IRQ_TXFIFO_FLUSH_OK)
1270 ;/*TODO*/
1271 if (reason & B43legacy_IRQ_NOISESAMPLE_OK)
1272 handle_irq_noise(dev);
1273
1274 /* Check the DMA reason registers for received data. */
1275 if (dma_reason[0] & B43legacy_DMAIRQ_RX_DONE) {
1276 if (b43legacy_using_pio(dev))
1277 b43legacy_pio_rx(dev->pio.queue0);
1278 else
1279 b43legacy_dma_rx(dev->dma.rx_ring0);
1280 }
1281 B43legacy_WARN_ON(dma_reason[1] & B43legacy_DMAIRQ_RX_DONE);
1282 B43legacy_WARN_ON(dma_reason[2] & B43legacy_DMAIRQ_RX_DONE);
1283 if (dma_reason[3] & B43legacy_DMAIRQ_RX_DONE) {
1284 if (b43legacy_using_pio(dev))
1285 b43legacy_pio_rx(dev->pio.queue3);
1286 else
1287 b43legacy_dma_rx(dev->dma.rx_ring3);
1288 }
1289 B43legacy_WARN_ON(dma_reason[4] & B43legacy_DMAIRQ_RX_DONE);
1290 B43legacy_WARN_ON(dma_reason[5] & B43legacy_DMAIRQ_RX_DONE);
1291
1292 if (reason & B43legacy_IRQ_TX_OK)
1293 handle_irq_transmit_status(dev);
1294
1295 b43legacy_interrupt_enable(dev, dev->irq_savedstate);
1296 mmiowb();
1297 spin_unlock_irqrestore(&dev->wl->irq_lock, flags);
1298 }
1299
1300 static void pio_irq_workaround(struct b43legacy_wldev *dev,
1301 u16 base, int queueidx)
1302 {
1303 u16 rxctl;
1304
1305 rxctl = b43legacy_read16(dev, base + B43legacy_PIO_RXCTL);
1306 if (rxctl & B43legacy_PIO_RXCTL_DATAAVAILABLE)
1307 dev->dma_reason[queueidx] |= B43legacy_DMAIRQ_RX_DONE;
1308 else
1309 dev->dma_reason[queueidx] &= ~B43legacy_DMAIRQ_RX_DONE;
1310 }
1311
1312 static void b43legacy_interrupt_ack(struct b43legacy_wldev *dev, u32 reason)
1313 {
1314 if (b43legacy_using_pio(dev) &&
1315 (dev->dev->id.revision < 3) &&
1316 (!(reason & B43legacy_IRQ_PIO_WORKAROUND))) {
1317 /* Apply a PIO specific workaround to the dma_reasons */
1318 pio_irq_workaround(dev, B43legacy_MMIO_PIO1_BASE, 0);
1319 pio_irq_workaround(dev, B43legacy_MMIO_PIO2_BASE, 1);
1320 pio_irq_workaround(dev, B43legacy_MMIO_PIO3_BASE, 2);
1321 pio_irq_workaround(dev, B43legacy_MMIO_PIO4_BASE, 3);
1322 }
1323
1324 b43legacy_write32(dev, B43legacy_MMIO_GEN_IRQ_REASON, reason);
1325
1326 b43legacy_write32(dev, B43legacy_MMIO_DMA0_REASON,
1327 dev->dma_reason[0]);
1328 b43legacy_write32(dev, B43legacy_MMIO_DMA1_REASON,
1329 dev->dma_reason[1]);
1330 b43legacy_write32(dev, B43legacy_MMIO_DMA2_REASON,
1331 dev->dma_reason[2]);
1332 b43legacy_write32(dev, B43legacy_MMIO_DMA3_REASON,
1333 dev->dma_reason[3]);
1334 b43legacy_write32(dev, B43legacy_MMIO_DMA4_REASON,
1335 dev->dma_reason[4]);
1336 b43legacy_write32(dev, B43legacy_MMIO_DMA5_REASON,
1337 dev->dma_reason[5]);
1338 }
1339
1340 /* Interrupt handler top-half */
1341 static irqreturn_t b43legacy_interrupt_handler(int irq, void *dev_id)
1342 {
1343 irqreturn_t ret = IRQ_NONE;
1344 struct b43legacy_wldev *dev = dev_id;
1345 u32 reason;
1346
1347 if (!dev)
1348 return IRQ_NONE;
1349
1350 spin_lock(&dev->wl->irq_lock);
1351
1352 if (b43legacy_status(dev) < B43legacy_STAT_STARTED)
1353 goto out;
1354 reason = b43legacy_read32(dev, B43legacy_MMIO_GEN_IRQ_REASON);
1355 if (reason == 0xffffffff) /* shared IRQ */
1356 goto out;
1357 ret = IRQ_HANDLED;
1358 reason &= b43legacy_read32(dev, B43legacy_MMIO_GEN_IRQ_MASK);
1359 if (!reason)
1360 goto out;
1361
1362 dev->dma_reason[0] = b43legacy_read32(dev,
1363 B43legacy_MMIO_DMA0_REASON)
1364 & 0x0001DC00;
1365 dev->dma_reason[1] = b43legacy_read32(dev,
1366 B43legacy_MMIO_DMA1_REASON)
1367 & 0x0000DC00;
1368 dev->dma_reason[2] = b43legacy_read32(dev,
1369 B43legacy_MMIO_DMA2_REASON)
1370 & 0x0000DC00;
1371 dev->dma_reason[3] = b43legacy_read32(dev,
1372 B43legacy_MMIO_DMA3_REASON)
1373 & 0x0001DC00;
1374 dev->dma_reason[4] = b43legacy_read32(dev,
1375 B43legacy_MMIO_DMA4_REASON)
1376 & 0x0000DC00;
1377 dev->dma_reason[5] = b43legacy_read32(dev,
1378 B43legacy_MMIO_DMA5_REASON)
1379 & 0x0000DC00;
1380
1381 b43legacy_interrupt_ack(dev, reason);
1382 /* disable all IRQs. They are enabled again in the bottom half. */
1383 dev->irq_savedstate = b43legacy_interrupt_disable(dev,
1384 B43legacy_IRQ_ALL);
1385 /* save the reason code and call our bottom half. */
1386 dev->irq_reason = reason;
1387 tasklet_schedule(&dev->isr_tasklet);
1388 out:
1389 mmiowb();
1390 spin_unlock(&dev->wl->irq_lock);
1391
1392 return ret;
1393 }
1394
1395 static void b43legacy_release_firmware(struct b43legacy_wldev *dev)
1396 {
1397 release_firmware(dev->fw.ucode);
1398 dev->fw.ucode = NULL;
1399 release_firmware(dev->fw.pcm);
1400 dev->fw.pcm = NULL;
1401 release_firmware(dev->fw.initvals);
1402 dev->fw.initvals = NULL;
1403 release_firmware(dev->fw.initvals_band);
1404 dev->fw.initvals_band = NULL;
1405 }
1406
1407 static void b43legacy_print_fw_helptext(struct b43legacy_wl *wl)
1408 {
1409 b43legacyerr(wl, "You must go to http://linuxwireless.org/en/users/"
1410 "Drivers/b43#devicefirmware "
1411 "and download the correct firmware (version 3).\n");
1412 }
1413
1414 static int do_request_fw(struct b43legacy_wldev *dev,
1415 const char *name,
1416 const struct firmware **fw)
1417 {
1418 char path[sizeof(modparam_fwpostfix) + 32];
1419 struct b43legacy_fw_header *hdr;
1420 u32 size;
1421 int err;
1422
1423 if (!name)
1424 return 0;
1425
1426 snprintf(path, ARRAY_SIZE(path),
1427 "b43legacy%s/%s.fw",
1428 modparam_fwpostfix, name);
1429 err = request_firmware(fw, path, dev->dev->dev);
1430 if (err) {
1431 b43legacyerr(dev->wl, "Firmware file \"%s\" not found "
1432 "or load failed.\n", path);
1433 return err;
1434 }
1435 if ((*fw)->size < sizeof(struct b43legacy_fw_header))
1436 goto err_format;
1437 hdr = (struct b43legacy_fw_header *)((*fw)->data);
1438 switch (hdr->type) {
1439 case B43legacy_FW_TYPE_UCODE:
1440 case B43legacy_FW_TYPE_PCM:
1441 size = be32_to_cpu(hdr->size);
1442 if (size != (*fw)->size - sizeof(struct b43legacy_fw_header))
1443 goto err_format;
1444 /* fallthrough */
1445 case B43legacy_FW_TYPE_IV:
1446 if (hdr->ver != 1)
1447 goto err_format;
1448 break;
1449 default:
1450 goto err_format;
1451 }
1452
1453 return err;
1454
1455 err_format:
1456 b43legacyerr(dev->wl, "Firmware file \"%s\" format error.\n", path);
1457 return -EPROTO;
1458 }
1459
1460 static int b43legacy_request_firmware(struct b43legacy_wldev *dev)
1461 {
1462 struct b43legacy_firmware *fw = &dev->fw;
1463 const u8 rev = dev->dev->id.revision;
1464 const char *filename;
1465 u32 tmshigh;
1466 int err;
1467
1468 tmshigh = ssb_read32(dev->dev, SSB_TMSHIGH);
1469 if (!fw->ucode) {
1470 if (rev == 2)
1471 filename = "ucode2";
1472 else if (rev == 4)
1473 filename = "ucode4";
1474 else
1475 filename = "ucode5";
1476 err = do_request_fw(dev, filename, &fw->ucode);
1477 if (err)
1478 goto err_load;
1479 }
1480 if (!fw->pcm) {
1481 if (rev < 5)
1482 filename = "pcm4";
1483 else
1484 filename = "pcm5";
1485 err = do_request_fw(dev, filename, &fw->pcm);
1486 if (err)
1487 goto err_load;
1488 }
1489 if (!fw->initvals) {
1490 switch (dev->phy.type) {
1491 case B43legacy_PHYTYPE_B:
1492 case B43legacy_PHYTYPE_G:
1493 if ((rev >= 5) && (rev <= 10))
1494 filename = "b0g0initvals5";
1495 else if (rev == 2 || rev == 4)
1496 filename = "b0g0initvals2";
1497 else
1498 goto err_no_initvals;
1499 break;
1500 default:
1501 goto err_no_initvals;
1502 }
1503 err = do_request_fw(dev, filename, &fw->initvals);
1504 if (err)
1505 goto err_load;
1506 }
1507 if (!fw->initvals_band) {
1508 switch (dev->phy.type) {
1509 case B43legacy_PHYTYPE_B:
1510 case B43legacy_PHYTYPE_G:
1511 if ((rev >= 5) && (rev <= 10))
1512 filename = "b0g0bsinitvals5";
1513 else if (rev >= 11)
1514 filename = NULL;
1515 else if (rev == 2 || rev == 4)
1516 filename = NULL;
1517 else
1518 goto err_no_initvals;
1519 break;
1520 default:
1521 goto err_no_initvals;
1522 }
1523 err = do_request_fw(dev, filename, &fw->initvals_band);
1524 if (err)
1525 goto err_load;
1526 }
1527
1528 return 0;
1529
1530 err_load:
1531 b43legacy_print_fw_helptext(dev->wl);
1532 goto error;
1533
1534 err_no_initvals:
1535 err = -ENODEV;
1536 b43legacyerr(dev->wl, "No Initial Values firmware file for PHY %u, "
1537 "core rev %u\n", dev->phy.type, rev);
1538 goto error;
1539
1540 error:
1541 b43legacy_release_firmware(dev);
1542 return err;
1543 }
1544
1545 static int b43legacy_upload_microcode(struct b43legacy_wldev *dev)
1546 {
1547 const size_t hdr_len = sizeof(struct b43legacy_fw_header);
1548 const __be32 *data;
1549 unsigned int i;
1550 unsigned int len;
1551 u16 fwrev;
1552 u16 fwpatch;
1553 u16 fwdate;
1554 u16 fwtime;
1555 u32 tmp, macctl;
1556 int err = 0;
1557
1558 /* Jump the microcode PSM to offset 0 */
1559 macctl = b43legacy_read32(dev, B43legacy_MMIO_MACCTL);
1560 B43legacy_WARN_ON(macctl & B43legacy_MACCTL_PSM_RUN);
1561 macctl |= B43legacy_MACCTL_PSM_JMP0;
1562 b43legacy_write32(dev, B43legacy_MMIO_MACCTL, macctl);
1563 /* Zero out all microcode PSM registers and shared memory. */
1564 for (i = 0; i < 64; i++)
1565 b43legacy_shm_write16(dev, B43legacy_SHM_WIRELESS, i, 0);
1566 for (i = 0; i < 4096; i += 2)
1567 b43legacy_shm_write16(dev, B43legacy_SHM_SHARED, i, 0);
1568
1569 /* Upload Microcode. */
1570 data = (__be32 *) (dev->fw.ucode->data + hdr_len);
1571 len = (dev->fw.ucode->size - hdr_len) / sizeof(__be32);
1572 b43legacy_shm_control_word(dev,
1573 B43legacy_SHM_UCODE |
1574 B43legacy_SHM_AUTOINC_W,
1575 0x0000);
1576 for (i = 0; i < len; i++) {
1577 b43legacy_write32(dev, B43legacy_MMIO_SHM_DATA,
1578 be32_to_cpu(data[i]));
1579 udelay(10);
1580 }
1581
1582 if (dev->fw.pcm) {
1583 /* Upload PCM data. */
1584 data = (__be32 *) (dev->fw.pcm->data + hdr_len);
1585 len = (dev->fw.pcm->size - hdr_len) / sizeof(__be32);
1586 b43legacy_shm_control_word(dev, B43legacy_SHM_HW, 0x01EA);
1587 b43legacy_write32(dev, B43legacy_MMIO_SHM_DATA, 0x00004000);
1588 /* No need for autoinc bit in SHM_HW */
1589 b43legacy_shm_control_word(dev, B43legacy_SHM_HW, 0x01EB);
1590 for (i = 0; i < len; i++) {
1591 b43legacy_write32(dev, B43legacy_MMIO_SHM_DATA,
1592 be32_to_cpu(data[i]));
1593 udelay(10);
1594 }
1595 }
1596
1597 b43legacy_write32(dev, B43legacy_MMIO_GEN_IRQ_REASON,
1598 B43legacy_IRQ_ALL);
1599
1600 /* Start the microcode PSM */
1601 macctl = b43legacy_read32(dev, B43legacy_MMIO_MACCTL);
1602 macctl &= ~B43legacy_MACCTL_PSM_JMP0;
1603 macctl |= B43legacy_MACCTL_PSM_RUN;
1604 b43legacy_write32(dev, B43legacy_MMIO_MACCTL, macctl);
1605
1606 /* Wait for the microcode to load and respond */
1607 i = 0;
1608 while (1) {
1609 tmp = b43legacy_read32(dev, B43legacy_MMIO_GEN_IRQ_REASON);
1610 if (tmp == B43legacy_IRQ_MAC_SUSPENDED)
1611 break;
1612 i++;
1613 if (i >= B43legacy_IRQWAIT_MAX_RETRIES) {
1614 b43legacyerr(dev->wl, "Microcode not responding\n");
1615 b43legacy_print_fw_helptext(dev->wl);
1616 err = -ENODEV;
1617 goto error;
1618 }
1619 msleep_interruptible(50);
1620 if (signal_pending(current)) {
1621 err = -EINTR;
1622 goto error;
1623 }
1624 }
1625 /* dummy read follows */
1626 b43legacy_read32(dev, B43legacy_MMIO_GEN_IRQ_REASON);
1627
1628 /* Get and check the revisions. */
1629 fwrev = b43legacy_shm_read16(dev, B43legacy_SHM_SHARED,
1630 B43legacy_SHM_SH_UCODEREV);
1631 fwpatch = b43legacy_shm_read16(dev, B43legacy_SHM_SHARED,
1632 B43legacy_SHM_SH_UCODEPATCH);
1633 fwdate = b43legacy_shm_read16(dev, B43legacy_SHM_SHARED,
1634 B43legacy_SHM_SH_UCODEDATE);
1635 fwtime = b43legacy_shm_read16(dev, B43legacy_SHM_SHARED,
1636 B43legacy_SHM_SH_UCODETIME);
1637
1638 if (fwrev > 0x128) {
1639 b43legacyerr(dev->wl, "YOU ARE TRYING TO LOAD V4 FIRMWARE."
1640 " Only firmware from binary drivers version 3.x"
1641 " is supported. You must change your firmware"
1642 " files.\n");
1643 b43legacy_print_fw_helptext(dev->wl);
1644 err = -EOPNOTSUPP;
1645 goto error;
1646 }
1647 b43legacyinfo(dev->wl, "Loading firmware version 0x%X, patch level %u "
1648 "(20%.2i-%.2i-%.2i %.2i:%.2i:%.2i)\n", fwrev, fwpatch,
1649 (fwdate >> 12) & 0xF, (fwdate >> 8) & 0xF, fwdate & 0xFF,
1650 (fwtime >> 11) & 0x1F, (fwtime >> 5) & 0x3F,
1651 fwtime & 0x1F);
1652
1653 dev->fw.rev = fwrev;
1654 dev->fw.patch = fwpatch;
1655
1656 return 0;
1657
1658 error:
1659 macctl = b43legacy_read32(dev, B43legacy_MMIO_MACCTL);
1660 macctl &= ~B43legacy_MACCTL_PSM_RUN;
1661 macctl |= B43legacy_MACCTL_PSM_JMP0;
1662 b43legacy_write32(dev, B43legacy_MMIO_MACCTL, macctl);
1663
1664 return err;
1665 }
1666
1667 static int b43legacy_write_initvals(struct b43legacy_wldev *dev,
1668 const struct b43legacy_iv *ivals,
1669 size_t count,
1670 size_t array_size)
1671 {
1672 const struct b43legacy_iv *iv;
1673 u16 offset;
1674 size_t i;
1675 bool bit32;
1676
1677 BUILD_BUG_ON(sizeof(struct b43legacy_iv) != 6);
1678 iv = ivals;
1679 for (i = 0; i < count; i++) {
1680 if (array_size < sizeof(iv->offset_size))
1681 goto err_format;
1682 array_size -= sizeof(iv->offset_size);
1683 offset = be16_to_cpu(iv->offset_size);
1684 bit32 = !!(offset & B43legacy_IV_32BIT);
1685 offset &= B43legacy_IV_OFFSET_MASK;
1686 if (offset >= 0x1000)
1687 goto err_format;
1688 if (bit32) {
1689 u32 value;
1690
1691 if (array_size < sizeof(iv->data.d32))
1692 goto err_format;
1693 array_size -= sizeof(iv->data.d32);
1694
1695 value = be32_to_cpu(get_unaligned(&iv->data.d32));
1696 b43legacy_write32(dev, offset, value);
1697
1698 iv = (const struct b43legacy_iv *)((const uint8_t *)iv +
1699 sizeof(__be16) +
1700 sizeof(__be32));
1701 } else {
1702 u16 value;
1703
1704 if (array_size < sizeof(iv->data.d16))
1705 goto err_format;
1706 array_size -= sizeof(iv->data.d16);
1707
1708 value = be16_to_cpu(iv->data.d16);
1709 b43legacy_write16(dev, offset, value);
1710
1711 iv = (const struct b43legacy_iv *)((const uint8_t *)iv +
1712 sizeof(__be16) +
1713 sizeof(__be16));
1714 }
1715 }
1716 if (array_size)
1717 goto err_format;
1718
1719 return 0;
1720
1721 err_format:
1722 b43legacyerr(dev->wl, "Initial Values Firmware file-format error.\n");
1723 b43legacy_print_fw_helptext(dev->wl);
1724
1725 return -EPROTO;
1726 }
1727
1728 static int b43legacy_upload_initvals(struct b43legacy_wldev *dev)
1729 {
1730 const size_t hdr_len = sizeof(struct b43legacy_fw_header);
1731 const struct b43legacy_fw_header *hdr;
1732 struct b43legacy_firmware *fw = &dev->fw;
1733 const struct b43legacy_iv *ivals;
1734 size_t count;
1735 int err;
1736
1737 hdr = (const struct b43legacy_fw_header *)(fw->initvals->data);
1738 ivals = (const struct b43legacy_iv *)(fw->initvals->data + hdr_len);
1739 count = be32_to_cpu(hdr->size);
1740 err = b43legacy_write_initvals(dev, ivals, count,
1741 fw->initvals->size - hdr_len);
1742 if (err)
1743 goto out;
1744 if (fw->initvals_band) {
1745 hdr = (const struct b43legacy_fw_header *)
1746 (fw->initvals_band->data);
1747 ivals = (const struct b43legacy_iv *)(fw->initvals_band->data
1748 + hdr_len);
1749 count = be32_to_cpu(hdr->size);
1750 err = b43legacy_write_initvals(dev, ivals, count,
1751 fw->initvals_band->size - hdr_len);
1752 if (err)
1753 goto out;
1754 }
1755 out:
1756
1757 return err;
1758 }
1759
1760 /* Initialize the GPIOs
1761 * http://bcm-specs.sipsolutions.net/GPIO
1762 */
1763 static int b43legacy_gpio_init(struct b43legacy_wldev *dev)
1764 {
1765 struct ssb_bus *bus = dev->dev->bus;
1766 struct ssb_device *gpiodev, *pcidev = NULL;
1767 u32 mask;
1768 u32 set;
1769
1770 b43legacy_write32(dev, B43legacy_MMIO_MACCTL,
1771 b43legacy_read32(dev,
1772 B43legacy_MMIO_MACCTL)
1773 & 0xFFFF3FFF);
1774
1775 b43legacy_write16(dev, B43legacy_MMIO_GPIO_MASK,
1776 b43legacy_read16(dev,
1777 B43legacy_MMIO_GPIO_MASK)
1778 | 0x000F);
1779
1780 mask = 0x0000001F;
1781 set = 0x0000000F;
1782 if (dev->dev->bus->chip_id == 0x4301) {
1783 mask |= 0x0060;
1784 set |= 0x0060;
1785 }
1786 if (dev->dev->bus->sprom.boardflags_lo & B43legacy_BFL_PACTRL) {
1787 b43legacy_write16(dev, B43legacy_MMIO_GPIO_MASK,
1788 b43legacy_read16(dev,
1789 B43legacy_MMIO_GPIO_MASK)
1790 | 0x0200);
1791 mask |= 0x0200;
1792 set |= 0x0200;
1793 }
1794 if (dev->dev->id.revision >= 2)
1795 mask |= 0x0010; /* FIXME: This is redundant. */
1796
1797 #ifdef CONFIG_SSB_DRIVER_PCICORE
1798 pcidev = bus->pcicore.dev;
1799 #endif
1800 gpiodev = bus->chipco.dev ? : pcidev;
1801 if (!gpiodev)
1802 return 0;
1803 ssb_write32(gpiodev, B43legacy_GPIO_CONTROL,
1804 (ssb_read32(gpiodev, B43legacy_GPIO_CONTROL)
1805 & mask) | set);
1806
1807 return 0;
1808 }
1809
1810 /* Turn off all GPIO stuff. Call this on module unload, for example. */
1811 static void b43legacy_gpio_cleanup(struct b43legacy_wldev *dev)
1812 {
1813 struct ssb_bus *bus = dev->dev->bus;
1814 struct ssb_device *gpiodev, *pcidev = NULL;
1815
1816 #ifdef CONFIG_SSB_DRIVER_PCICORE
1817 pcidev = bus->pcicore.dev;
1818 #endif
1819 gpiodev = bus->chipco.dev ? : pcidev;
1820 if (!gpiodev)
1821 return;
1822 ssb_write32(gpiodev, B43legacy_GPIO_CONTROL, 0);
1823 }
1824
1825 /* http://bcm-specs.sipsolutions.net/EnableMac */
1826 void b43legacy_mac_enable(struct b43legacy_wldev *dev)
1827 {
1828 dev->mac_suspended--;
1829 B43legacy_WARN_ON(dev->mac_suspended < 0);
1830 B43legacy_WARN_ON(irqs_disabled());
1831 if (dev->mac_suspended == 0) {
1832 b43legacy_write32(dev, B43legacy_MMIO_MACCTL,
1833 b43legacy_read32(dev,
1834 B43legacy_MMIO_MACCTL)
1835 | B43legacy_MACCTL_ENABLED);
1836 b43legacy_write32(dev, B43legacy_MMIO_GEN_IRQ_REASON,
1837 B43legacy_IRQ_MAC_SUSPENDED);
1838 /* the next two are dummy reads */
1839 b43legacy_read32(dev, B43legacy_MMIO_MACCTL);
1840 b43legacy_read32(dev, B43legacy_MMIO_GEN_IRQ_REASON);
1841 b43legacy_power_saving_ctl_bits(dev, -1, -1);
1842
1843 /* Re-enable IRQs. */
1844 spin_lock_irq(&dev->wl->irq_lock);
1845 b43legacy_interrupt_enable(dev, dev->irq_savedstate);
1846 spin_unlock_irq(&dev->wl->irq_lock);
1847 }
1848 }
1849
1850 /* http://bcm-specs.sipsolutions.net/SuspendMAC */
1851 void b43legacy_mac_suspend(struct b43legacy_wldev *dev)
1852 {
1853 int i;
1854 u32 tmp;
1855
1856 might_sleep();
1857 B43legacy_WARN_ON(irqs_disabled());
1858 B43legacy_WARN_ON(dev->mac_suspended < 0);
1859
1860 if (dev->mac_suspended == 0) {
1861 /* Mask IRQs before suspending MAC. Otherwise
1862 * the MAC stays busy and won't suspend. */
1863 spin_lock_irq(&dev->wl->irq_lock);
1864 tmp = b43legacy_interrupt_disable(dev, B43legacy_IRQ_ALL);
1865 spin_unlock_irq(&dev->wl->irq_lock);
1866 b43legacy_synchronize_irq(dev);
1867 dev->irq_savedstate = tmp;
1868
1869 b43legacy_power_saving_ctl_bits(dev, -1, 1);
1870 b43legacy_write32(dev, B43legacy_MMIO_MACCTL,
1871 b43legacy_read32(dev,
1872 B43legacy_MMIO_MACCTL)
1873 & ~B43legacy_MACCTL_ENABLED);
1874 b43legacy_read32(dev, B43legacy_MMIO_GEN_IRQ_REASON);
1875 for (i = 40; i; i--) {
1876 tmp = b43legacy_read32(dev,
1877 B43legacy_MMIO_GEN_IRQ_REASON);
1878 if (tmp & B43legacy_IRQ_MAC_SUSPENDED)
1879 goto out;
1880 msleep(1);
1881 }
1882 b43legacyerr(dev->wl, "MAC suspend failed\n");
1883 }
1884 out:
1885 dev->mac_suspended++;
1886 }
1887
1888 static void b43legacy_adjust_opmode(struct b43legacy_wldev *dev)
1889 {
1890 struct b43legacy_wl *wl = dev->wl;
1891 u32 ctl;
1892 u16 cfp_pretbtt;
1893
1894 ctl = b43legacy_read32(dev, B43legacy_MMIO_MACCTL);
1895 /* Reset status to STA infrastructure mode. */
1896 ctl &= ~B43legacy_MACCTL_AP;
1897 ctl &= ~B43legacy_MACCTL_KEEP_CTL;
1898 ctl &= ~B43legacy_MACCTL_KEEP_BADPLCP;
1899 ctl &= ~B43legacy_MACCTL_KEEP_BAD;
1900 ctl &= ~B43legacy_MACCTL_PROMISC;
1901 ctl &= ~B43legacy_MACCTL_BEACPROMISC;
1902 ctl |= B43legacy_MACCTL_INFRA;
1903
1904 if (b43legacy_is_mode(wl, IEEE80211_IF_TYPE_AP))
1905 ctl |= B43legacy_MACCTL_AP;
1906 else if (b43legacy_is_mode(wl, IEEE80211_IF_TYPE_IBSS))
1907 ctl &= ~B43legacy_MACCTL_INFRA;
1908
1909 if (wl->filter_flags & FIF_CONTROL)
1910 ctl |= B43legacy_MACCTL_KEEP_CTL;
1911 if (wl->filter_flags & FIF_FCSFAIL)
1912 ctl |= B43legacy_MACCTL_KEEP_BAD;
1913 if (wl->filter_flags & FIF_PLCPFAIL)
1914 ctl |= B43legacy_MACCTL_KEEP_BADPLCP;
1915 if (wl->filter_flags & FIF_PROMISC_IN_BSS)
1916 ctl |= B43legacy_MACCTL_PROMISC;
1917 if (wl->filter_flags & FIF_BCN_PRBRESP_PROMISC)
1918 ctl |= B43legacy_MACCTL_BEACPROMISC;
1919
1920 /* Workaround: On old hardware the HW-MAC-address-filter
1921 * doesn't work properly, so always run promisc in filter
1922 * it in software. */
1923 if (dev->dev->id.revision <= 4)
1924 ctl |= B43legacy_MACCTL_PROMISC;
1925
1926 b43legacy_write32(dev, B43legacy_MMIO_MACCTL, ctl);
1927
1928 cfp_pretbtt = 2;
1929 if ((ctl & B43legacy_MACCTL_INFRA) &&
1930 !(ctl & B43legacy_MACCTL_AP)) {
1931 if (dev->dev->bus->chip_id == 0x4306 &&
1932 dev->dev->bus->chip_rev == 3)
1933 cfp_pretbtt = 100;
1934 else
1935 cfp_pretbtt = 50;
1936 }
1937 b43legacy_write16(dev, 0x612, cfp_pretbtt);
1938 }
1939
1940 static void b43legacy_rate_memory_write(struct b43legacy_wldev *dev,
1941 u16 rate,
1942 int is_ofdm)
1943 {
1944 u16 offset;
1945
1946 if (is_ofdm) {
1947 offset = 0x480;
1948 offset += (b43legacy_plcp_get_ratecode_ofdm(rate) & 0x000F) * 2;
1949 } else {
1950 offset = 0x4C0;
1951 offset += (b43legacy_plcp_get_ratecode_cck(rate) & 0x000F) * 2;
1952 }
1953 b43legacy_shm_write16(dev, B43legacy_SHM_SHARED, offset + 0x20,
1954 b43legacy_shm_read16(dev,
1955 B43legacy_SHM_SHARED, offset));
1956 }
1957
1958 static void b43legacy_rate_memory_init(struct b43legacy_wldev *dev)
1959 {
1960 switch (dev->phy.type) {
1961 case B43legacy_PHYTYPE_G:
1962 b43legacy_rate_memory_write(dev, B43legacy_OFDM_RATE_6MB, 1);
1963 b43legacy_rate_memory_write(dev, B43legacy_OFDM_RATE_12MB, 1);
1964 b43legacy_rate_memory_write(dev, B43legacy_OFDM_RATE_18MB, 1);
1965 b43legacy_rate_memory_write(dev, B43legacy_OFDM_RATE_24MB, 1);
1966 b43legacy_rate_memory_write(dev, B43legacy_OFDM_RATE_36MB, 1);
1967 b43legacy_rate_memory_write(dev, B43legacy_OFDM_RATE_48MB, 1);
1968 b43legacy_rate_memory_write(dev, B43legacy_OFDM_RATE_54MB, 1);
1969 /* fallthrough */
1970 case B43legacy_PHYTYPE_B:
1971 b43legacy_rate_memory_write(dev, B43legacy_CCK_RATE_1MB, 0);
1972 b43legacy_rate_memory_write(dev, B43legacy_CCK_RATE_2MB, 0);
1973 b43legacy_rate_memory_write(dev, B43legacy_CCK_RATE_5MB, 0);
1974 b43legacy_rate_memory_write(dev, B43legacy_CCK_RATE_11MB, 0);
1975 break;
1976 default:
1977 B43legacy_BUG_ON(1);
1978 }
1979 }
1980
1981 /* Set the TX-Antenna for management frames sent by firmware. */
1982 static void b43legacy_mgmtframe_txantenna(struct b43legacy_wldev *dev,
1983 int antenna)
1984 {
1985 u16 ant = 0;
1986 u16 tmp;
1987
1988 switch (antenna) {
1989 case B43legacy_ANTENNA0:
1990 ant |= B43legacy_TX4_PHY_ANT0;
1991 break;
1992 case B43legacy_ANTENNA1:
1993 ant |= B43legacy_TX4_PHY_ANT1;
1994 break;
1995 case B43legacy_ANTENNA_AUTO:
1996 ant |= B43legacy_TX4_PHY_ANTLAST;
1997 break;
1998 default:
1999 B43legacy_BUG_ON(1);
2000 }
2001
2002 /* FIXME We also need to set the other flags of the PHY control
2003 * field somewhere. */
2004
2005 /* For Beacons */
2006 tmp = b43legacy_shm_read16(dev, B43legacy_SHM_SHARED,
2007 B43legacy_SHM_SH_BEACPHYCTL);
2008 tmp = (tmp & ~B43legacy_TX4_PHY_ANT) | ant;
2009 b43legacy_shm_write16(dev, B43legacy_SHM_SHARED,
2010 B43legacy_SHM_SH_BEACPHYCTL, tmp);
2011 /* For ACK/CTS */
2012 tmp = b43legacy_shm_read16(dev, B43legacy_SHM_SHARED,
2013 B43legacy_SHM_SH_ACKCTSPHYCTL);
2014 tmp = (tmp & ~B43legacy_TX4_PHY_ANT) | ant;
2015 b43legacy_shm_write16(dev, B43legacy_SHM_SHARED,
2016 B43legacy_SHM_SH_ACKCTSPHYCTL, tmp);
2017 /* For Probe Resposes */
2018 tmp = b43legacy_shm_read16(dev, B43legacy_SHM_SHARED,
2019 B43legacy_SHM_SH_PRPHYCTL);
2020 tmp = (tmp & ~B43legacy_TX4_PHY_ANT) | ant;
2021 b43legacy_shm_write16(dev, B43legacy_SHM_SHARED,
2022 B43legacy_SHM_SH_PRPHYCTL, tmp);
2023 }
2024
2025 /* This is the opposite of b43legacy_chip_init() */
2026 static void b43legacy_chip_exit(struct b43legacy_wldev *dev)
2027 {
2028 b43legacy_radio_turn_off(dev, 1);
2029 b43legacy_gpio_cleanup(dev);
2030 /* firmware is released later */
2031 }
2032
2033 /* Initialize the chip
2034 * http://bcm-specs.sipsolutions.net/ChipInit
2035 */
2036 static int b43legacy_chip_init(struct b43legacy_wldev *dev)
2037 {
2038 struct b43legacy_phy *phy = &dev->phy;
2039 int err;
2040 int tmp;
2041 u32 value32, macctl;
2042 u16 value16;
2043
2044 /* Initialize the MAC control */
2045 macctl = B43legacy_MACCTL_IHR_ENABLED | B43legacy_MACCTL_SHM_ENABLED;
2046 if (dev->phy.gmode)
2047 macctl |= B43legacy_MACCTL_GMODE;
2048 macctl |= B43legacy_MACCTL_INFRA;
2049 b43legacy_write32(dev, B43legacy_MMIO_MACCTL, macctl);
2050
2051 err = b43legacy_request_firmware(dev);
2052 if (err)
2053 goto out;
2054 err = b43legacy_upload_microcode(dev);
2055 if (err)
2056 goto out; /* firmware is released later */
2057
2058 err = b43legacy_gpio_init(dev);
2059 if (err)
2060 goto out; /* firmware is released later */
2061
2062 err = b43legacy_upload_initvals(dev);
2063 if (err)
2064 goto err_gpio_clean;
2065 b43legacy_radio_turn_on(dev);
2066
2067 b43legacy_write16(dev, 0x03E6, 0x0000);
2068 err = b43legacy_phy_init(dev);
2069 if (err)
2070 goto err_radio_off;
2071
2072 /* Select initial Interference Mitigation. */
2073 tmp = phy->interfmode;
2074 phy->interfmode = B43legacy_INTERFMODE_NONE;
2075 b43legacy_radio_set_interference_mitigation(dev, tmp);
2076
2077 b43legacy_phy_set_antenna_diversity(dev);
2078 b43legacy_mgmtframe_txantenna(dev, B43legacy_ANTENNA_DEFAULT);
2079
2080 if (phy->type == B43legacy_PHYTYPE_B) {
2081 value16 = b43legacy_read16(dev, 0x005E);
2082 value16 |= 0x0004;
2083 b43legacy_write16(dev, 0x005E, value16);
2084 }
2085 b43legacy_write32(dev, 0x0100, 0x01000000);
2086 if (dev->dev->id.revision < 5)
2087 b43legacy_write32(dev, 0x010C, 0x01000000);
2088
2089 value32 = b43legacy_read32(dev, B43legacy_MMIO_MACCTL);
2090 value32 &= ~B43legacy_MACCTL_INFRA;
2091 b43legacy_write32(dev, B43legacy_MMIO_MACCTL, value32);
2092 value32 = b43legacy_read32(dev, B43legacy_MMIO_MACCTL);
2093 value32 |= B43legacy_MACCTL_INFRA;
2094 b43legacy_write32(dev, B43legacy_MMIO_MACCTL, value32);
2095
2096 if (b43legacy_using_pio(dev)) {
2097 b43legacy_write32(dev, 0x0210, 0x00000100);
2098 b43legacy_write32(dev, 0x0230, 0x00000100);
2099 b43legacy_write32(dev, 0x0250, 0x00000100);
2100 b43legacy_write32(dev, 0x0270, 0x00000100);
2101 b43legacy_shm_write16(dev, B43legacy_SHM_SHARED, 0x0034,
2102 0x0000);
2103 }
2104
2105 /* Probe Response Timeout value */
2106 /* FIXME: Default to 0, has to be set by ioctl probably... :-/ */
2107 b43legacy_shm_write16(dev, B43legacy_SHM_SHARED, 0x0074, 0x0000);
2108
2109 /* Initially set the wireless operation mode. */
2110 b43legacy_adjust_opmode(dev);
2111
2112 if (dev->dev->id.revision < 3) {
2113 b43legacy_write16(dev, 0x060E, 0x0000);
2114 b43legacy_write16(dev, 0x0610, 0x8000);
2115 b43legacy_write16(dev, 0x0604, 0x0000);
2116 b43legacy_write16(dev, 0x0606, 0x0200);
2117 } else {
2118 b43legacy_write32(dev, 0x0188, 0x80000000);
2119 b43legacy_write32(dev, 0x018C, 0x02000000);
2120 }
2121 b43legacy_write32(dev, B43legacy_MMIO_GEN_IRQ_REASON, 0x00004000);
2122 b43legacy_write32(dev, B43legacy_MMIO_DMA0_IRQ_MASK, 0x0001DC00);
2123 b43legacy_write32(dev, B43legacy_MMIO_DMA1_IRQ_MASK, 0x0000DC00);
2124 b43legacy_write32(dev, B43legacy_MMIO_DMA2_IRQ_MASK, 0x0000DC00);
2125 b43legacy_write32(dev, B43legacy_MMIO_DMA3_IRQ_MASK, 0x0001DC00);
2126 b43legacy_write32(dev, B43legacy_MMIO_DMA4_IRQ_MASK, 0x0000DC00);
2127 b43legacy_write32(dev, B43legacy_MMIO_DMA5_IRQ_MASK, 0x0000DC00);
2128
2129 value32 = ssb_read32(dev->dev, SSB_TMSLOW);
2130 value32 |= 0x00100000;
2131 ssb_write32(dev->dev, SSB_TMSLOW, value32);
2132
2133 b43legacy_write16(dev, B43legacy_MMIO_POWERUP_DELAY,
2134 dev->dev->bus->chipco.fast_pwrup_delay);
2135
2136 /* PHY TX errors counter. */
2137 atomic_set(&phy->txerr_cnt, B43legacy_PHY_TX_BADNESS_LIMIT);
2138
2139 B43legacy_WARN_ON(err != 0);
2140 b43legacydbg(dev->wl, "Chip initialized\n");
2141 out:
2142 return err;
2143
2144 err_radio_off:
2145 b43legacy_radio_turn_off(dev, 1);
2146 err_gpio_clean:
2147 b43legacy_gpio_cleanup(dev);
2148 goto out;
2149 }
2150
2151 static void b43legacy_periodic_every120sec(struct b43legacy_wldev *dev)
2152 {
2153 struct b43legacy_phy *phy = &dev->phy;
2154
2155 if (phy->type != B43legacy_PHYTYPE_G || phy->rev < 2)
2156 return;
2157
2158 b43legacy_mac_suspend(dev);
2159 b43legacy_phy_lo_g_measure(dev);
2160 b43legacy_mac_enable(dev);
2161 }
2162
2163 static void b43legacy_periodic_every60sec(struct b43legacy_wldev *dev)
2164 {
2165 b43legacy_phy_lo_mark_all_unused(dev);
2166 if (dev->dev->bus->sprom.boardflags_lo & B43legacy_BFL_RSSI) {
2167 b43legacy_mac_suspend(dev);
2168 b43legacy_calc_nrssi_slope(dev);
2169 b43legacy_mac_enable(dev);
2170 }
2171 }
2172
2173 static void b43legacy_periodic_every30sec(struct b43legacy_wldev *dev)
2174 {
2175 /* Update device statistics. */
2176 b43legacy_calculate_link_quality(dev);
2177 }
2178
2179 static void b43legacy_periodic_every15sec(struct b43legacy_wldev *dev)
2180 {
2181 b43legacy_phy_xmitpower(dev); /* FIXME: unless scanning? */
2182
2183 atomic_set(&dev->phy.txerr_cnt, B43legacy_PHY_TX_BADNESS_LIMIT);
2184 wmb();
2185 }
2186
2187 static void do_periodic_work(struct b43legacy_wldev *dev)
2188 {
2189 unsigned int state;
2190
2191 state = dev->periodic_state;
2192 if (state % 8 == 0)
2193 b43legacy_periodic_every120sec(dev);
2194 if (state % 4 == 0)
2195 b43legacy_periodic_every60sec(dev);
2196 if (state % 2 == 0)
2197 b43legacy_periodic_every30sec(dev);
2198 b43legacy_periodic_every15sec(dev);
2199 }
2200
2201 /* Periodic work locking policy:
2202 * The whole periodic work handler is protected by
2203 * wl->mutex. If another lock is needed somewhere in the
2204 * pwork callchain, it's aquired in-place, where it's needed.
2205 */
2206 static void b43legacy_periodic_work_handler(struct work_struct *work)
2207 {
2208 struct b43legacy_wldev *dev = container_of(work, struct b43legacy_wldev,
2209 periodic_work.work);
2210 struct b43legacy_wl *wl = dev->wl;
2211 unsigned long delay;
2212
2213 mutex_lock(&wl->mutex);
2214
2215 if (unlikely(b43legacy_status(dev) != B43legacy_STAT_STARTED))
2216 goto out;
2217 if (b43legacy_debug(dev, B43legacy_DBG_PWORK_STOP))
2218 goto out_requeue;
2219
2220 do_periodic_work(dev);
2221
2222 dev->periodic_state++;
2223 out_requeue:
2224 if (b43legacy_debug(dev, B43legacy_DBG_PWORK_FAST))
2225 delay = msecs_to_jiffies(50);
2226 else
2227 delay = round_jiffies_relative(HZ * 15);
2228 queue_delayed_work(wl->hw->workqueue, &dev->periodic_work, delay);
2229 out:
2230 mutex_unlock(&wl->mutex);
2231 }
2232
2233 static void b43legacy_periodic_tasks_setup(struct b43legacy_wldev *dev)
2234 {
2235 struct delayed_work *work = &dev->periodic_work;
2236
2237 dev->periodic_state = 0;
2238 INIT_DELAYED_WORK(work, b43legacy_periodic_work_handler);
2239 queue_delayed_work(dev->wl->hw->workqueue, work, 0);
2240 }
2241
2242 /* Validate access to the chip (SHM) */
2243 static int b43legacy_validate_chipaccess(struct b43legacy_wldev *dev)
2244 {
2245 u32 value;
2246 u32 shm_backup;
2247
2248 shm_backup = b43legacy_shm_read32(dev, B43legacy_SHM_SHARED, 0);
2249 b43legacy_shm_write32(dev, B43legacy_SHM_SHARED, 0, 0xAA5555AA);
2250 if (b43legacy_shm_read32(dev, B43legacy_SHM_SHARED, 0) !=
2251 0xAA5555AA)
2252 goto error;
2253 b43legacy_shm_write32(dev, B43legacy_SHM_SHARED, 0, 0x55AAAA55);
2254 if (b43legacy_shm_read32(dev, B43legacy_SHM_SHARED, 0) !=
2255 0x55AAAA55)
2256 goto error;
2257 b43legacy_shm_write32(dev, B43legacy_SHM_SHARED, 0, shm_backup);
2258
2259 value = b43legacy_read32(dev, B43legacy_MMIO_MACCTL);
2260 if ((value | B43legacy_MACCTL_GMODE) !=
2261 (B43legacy_MACCTL_GMODE | B43legacy_MACCTL_IHR_ENABLED))
2262 goto error;
2263
2264 value = b43legacy_read32(dev, B43legacy_MMIO_GEN_IRQ_REASON);
2265 if (value)
2266 goto error;
2267
2268 return 0;
2269 error:
2270 b43legacyerr(dev->wl, "Failed to validate the chipaccess\n");
2271 return -ENODEV;
2272 }
2273
2274 static void b43legacy_security_init(struct b43legacy_wldev *dev)
2275 {
2276 dev->max_nr_keys = (dev->dev->id.revision >= 5) ? 58 : 20;
2277 B43legacy_WARN_ON(dev->max_nr_keys > ARRAY_SIZE(dev->key));
2278 dev->ktp = b43legacy_shm_read16(dev, B43legacy_SHM_SHARED,
2279 0x0056);
2280 /* KTP is a word address, but we address SHM bytewise.
2281 * So multiply by two.
2282 */
2283 dev->ktp *= 2;
2284 if (dev->dev->id.revision >= 5)
2285 /* Number of RCMTA address slots */
2286 b43legacy_write16(dev, B43legacy_MMIO_RCMTA_COUNT,
2287 dev->max_nr_keys - 8);
2288 }
2289
2290 static int b43legacy_rng_read(struct hwrng *rng, u32 *data)
2291 {
2292 struct b43legacy_wl *wl = (struct b43legacy_wl *)rng->priv;
2293 unsigned long flags;
2294
2295 /* Don't take wl->mutex here, as it could deadlock with
2296 * hwrng internal locking. It's not needed to take
2297 * wl->mutex here, anyway. */
2298
2299 spin_lock_irqsave(&wl->irq_lock, flags);
2300 *data = b43legacy_read16(wl->current_dev, B43legacy_MMIO_RNG);
2301 spin_unlock_irqrestore(&wl->irq_lock, flags);
2302
2303 return (sizeof(u16));
2304 }
2305
2306 static void b43legacy_rng_exit(struct b43legacy_wl *wl)
2307 {
2308 if (wl->rng_initialized)
2309 hwrng_unregister(&wl->rng);
2310 }
2311
2312 static int b43legacy_rng_init(struct b43legacy_wl *wl)
2313 {
2314 int err;
2315
2316 snprintf(wl->rng_name, ARRAY_SIZE(wl->rng_name),
2317 "%s_%s", KBUILD_MODNAME, wiphy_name(wl->hw->wiphy));
2318 wl->rng.name = wl->rng_name;
2319 wl->rng.data_read = b43legacy_rng_read;
2320 wl->rng.priv = (unsigned long)wl;
2321 wl->rng_initialized = 1;
2322 err = hwrng_register(&wl->rng);
2323 if (err) {
2324 wl->rng_initialized = 0;
2325 b43legacyerr(wl, "Failed to register the random "
2326 "number generator (%d)\n", err);
2327 }
2328
2329 return err;
2330 }
2331
2332 static int b43legacy_op_tx(struct ieee80211_hw *hw,
2333 struct sk_buff *skb,
2334 struct ieee80211_tx_control *ctl)
2335 {
2336 struct b43legacy_wl *wl = hw_to_b43legacy_wl(hw);
2337 struct b43legacy_wldev *dev = wl->current_dev;
2338 int err = -ENODEV;
2339 unsigned long flags;
2340
2341 if (unlikely(!dev))
2342 goto out;
2343 if (unlikely(b43legacy_status(dev) < B43legacy_STAT_STARTED))
2344 goto out;
2345 /* DMA-TX is done without a global lock. */
2346 if (b43legacy_using_pio(dev)) {
2347 spin_lock_irqsave(&wl->irq_lock, flags);
2348 err = b43legacy_pio_tx(dev, skb, ctl);
2349 spin_unlock_irqrestore(&wl->irq_lock, flags);
2350 } else
2351 err = b43legacy_dma_tx(dev, skb, ctl);
2352 out:
2353 if (unlikely(err))
2354 return NETDEV_TX_BUSY;
2355 return NETDEV_TX_OK;
2356 }
2357
2358 static int b43legacy_op_conf_tx(struct ieee80211_hw *hw,
2359 int queue,
2360 const struct ieee80211_tx_queue_params *params)
2361 {
2362 return 0;
2363 }
2364
2365 static int b43legacy_op_get_tx_stats(struct ieee80211_hw *hw,
2366 struct ieee80211_tx_queue_stats *stats)
2367 {
2368 struct b43legacy_wl *wl = hw_to_b43legacy_wl(hw);
2369 struct b43legacy_wldev *dev = wl->current_dev;
2370 unsigned long flags;
2371 int err = -ENODEV;
2372
2373 if (!dev)
2374 goto out;
2375 spin_lock_irqsave(&wl->irq_lock, flags);
2376 if (likely(b43legacy_status(dev) >= B43legacy_STAT_STARTED)) {
2377 if (b43legacy_using_pio(dev))
2378 b43legacy_pio_get_tx_stats(dev, stats);
2379 else
2380 b43legacy_dma_get_tx_stats(dev, stats);
2381 err = 0;
2382 }
2383 spin_unlock_irqrestore(&wl->irq_lock, flags);
2384 out:
2385 return err;
2386 }
2387
2388 static int b43legacy_op_get_stats(struct ieee80211_hw *hw,
2389 struct ieee80211_low_level_stats *stats)
2390 {
2391 struct b43legacy_wl *wl = hw_to_b43legacy_wl(hw);
2392 unsigned long flags;
2393
2394 spin_lock_irqsave(&wl->irq_lock, flags);
2395 memcpy(stats, &wl->ieee_stats, sizeof(*stats));
2396 spin_unlock_irqrestore(&wl->irq_lock, flags);
2397
2398 return 0;
2399 }
2400
2401 static const char *phymode_to_string(unsigned int phymode)
2402 {
2403 switch (phymode) {
2404 case B43legacy_PHYMODE_B:
2405 return "B";
2406 case B43legacy_PHYMODE_G:
2407 return "G";
2408 default:
2409 B43legacy_BUG_ON(1);
2410 }
2411 return "";
2412 }
2413
2414 static int find_wldev_for_phymode(struct b43legacy_wl *wl,
2415 unsigned int phymode,
2416 struct b43legacy_wldev **dev,
2417 bool *gmode)
2418 {
2419 struct b43legacy_wldev *d;
2420
2421 list_for_each_entry(d, &wl->devlist, list) {
2422 if (d->phy.possible_phymodes & phymode) {
2423 /* Ok, this device supports the PHY-mode.
2424 * Set the gmode bit. */
2425 *gmode = 1;
2426 *dev = d;
2427
2428 return 0;
2429 }
2430 }
2431
2432 return -ESRCH;
2433 }
2434
2435 static void b43legacy_put_phy_into_reset(struct b43legacy_wldev *dev)
2436 {
2437 struct ssb_device *sdev = dev->dev;
2438 u32 tmslow;
2439
2440 tmslow = ssb_read32(sdev, SSB_TMSLOW);
2441 tmslow &= ~B43legacy_TMSLOW_GMODE;
2442 tmslow |= B43legacy_TMSLOW_PHYRESET;
2443 tmslow |= SSB_TMSLOW_FGC;
2444 ssb_write32(sdev, SSB_TMSLOW, tmslow);
2445 msleep(1);
2446
2447 tmslow = ssb_read32(sdev, SSB_TMSLOW);
2448 tmslow &= ~SSB_TMSLOW_FGC;
2449 tmslow |= B43legacy_TMSLOW_PHYRESET;
2450 ssb_write32(sdev, SSB_TMSLOW, tmslow);
2451 msleep(1);
2452 }
2453
2454 /* Expects wl->mutex locked */
2455 static int b43legacy_switch_phymode(struct b43legacy_wl *wl,
2456 unsigned int new_mode)
2457 {
2458 struct b43legacy_wldev *up_dev;
2459 struct b43legacy_wldev *down_dev;
2460 int err;
2461 bool gmode = 0;
2462 int prev_status;
2463
2464 err = find_wldev_for_phymode(wl, new_mode, &up_dev, &gmode);
2465 if (err) {
2466 b43legacyerr(wl, "Could not find a device for %s-PHY mode\n",
2467 phymode_to_string(new_mode));
2468 return err;
2469 }
2470 if ((up_dev == wl->current_dev) &&
2471 (!!wl->current_dev->phy.gmode == !!gmode))
2472 /* This device is already running. */
2473 return 0;
2474 b43legacydbg(wl, "Reconfiguring PHYmode to %s-PHY\n",
2475 phymode_to_string(new_mode));
2476 down_dev = wl->current_dev;
2477
2478 prev_status = b43legacy_status(down_dev);
2479 /* Shutdown the currently running core. */
2480 if (prev_status >= B43legacy_STAT_STARTED)
2481 b43legacy_wireless_core_stop(down_dev);
2482 if (prev_status >= B43legacy_STAT_INITIALIZED)
2483 b43legacy_wireless_core_exit(down_dev);
2484
2485 if (down_dev != up_dev)
2486 /* We switch to a different core, so we put PHY into
2487 * RESET on the old core. */
2488 b43legacy_put_phy_into_reset(down_dev);
2489
2490 /* Now start the new core. */
2491 up_dev->phy.gmode = gmode;
2492 if (prev_status >= B43legacy_STAT_INITIALIZED) {
2493 err = b43legacy_wireless_core_init(up_dev);
2494 if (err) {
2495 b43legacyerr(wl, "Fatal: Could not initialize device"
2496 " for newly selected %s-PHY mode\n",
2497 phymode_to_string(new_mode));
2498 goto init_failure;
2499 }
2500 }
2501 if (prev_status >= B43legacy_STAT_STARTED) {
2502 err = b43legacy_wireless_core_start(up_dev);
2503 if (err) {
2504 b43legacyerr(wl, "Fatal: Coult not start device for "
2505 "newly selected %s-PHY mode\n",
2506 phymode_to_string(new_mode));
2507 b43legacy_wireless_core_exit(up_dev);
2508 goto init_failure;
2509 }
2510 }
2511 B43legacy_WARN_ON(b43legacy_status(up_dev) != prev_status);
2512
2513 b43legacy_shm_write32(up_dev, B43legacy_SHM_SHARED, 0x003E, 0);
2514
2515 wl->current_dev = up_dev;
2516
2517 return 0;
2518 init_failure:
2519 /* Whoops, failed to init the new core. No core is operating now. */
2520 wl->current_dev = NULL;
2521 return err;
2522 }
2523
2524 static int b43legacy_antenna_from_ieee80211(u8 antenna)
2525 {
2526 switch (antenna) {
2527 case 0: /* default/diversity */
2528 return B43legacy_ANTENNA_DEFAULT;
2529 case 1: /* Antenna 0 */
2530 return B43legacy_ANTENNA0;
2531 case 2: /* Antenna 1 */
2532 return B43legacy_ANTENNA1;
2533 default:
2534 return B43legacy_ANTENNA_DEFAULT;
2535 }
2536 }
2537
2538 static int b43legacy_op_dev_config(struct ieee80211_hw *hw,
2539 struct ieee80211_conf *conf)
2540 {
2541 struct b43legacy_wl *wl = hw_to_b43legacy_wl(hw);
2542 struct b43legacy_wldev *dev;
2543 struct b43legacy_phy *phy;
2544 unsigned long flags;
2545 unsigned int new_phymode = 0xFFFF;
2546 int antenna_tx;
2547 int antenna_rx;
2548 int err = 0;
2549 u32 savedirqs;
2550
2551 antenna_tx = b43legacy_antenna_from_ieee80211(conf->antenna_sel_tx);
2552 antenna_rx = b43legacy_antenna_from_ieee80211(conf->antenna_sel_rx);
2553
2554 mutex_lock(&wl->mutex);
2555
2556 /* Switch the PHY mode (if necessary). */
2557 switch (conf->phymode) {
2558 case MODE_IEEE80211B:
2559 new_phymode = B43legacy_PHYMODE_B;
2560 break;
2561 case MODE_IEEE80211G:
2562 new_phymode = B43legacy_PHYMODE_G;
2563 break;
2564 default:
2565 B43legacy_WARN_ON(1);
2566 }
2567 err = b43legacy_switch_phymode(wl, new_phymode);
2568 if (err)
2569 goto out_unlock_mutex;
2570 dev = wl->current_dev;
2571 phy = &dev->phy;
2572
2573 /* Disable IRQs while reconfiguring the device.
2574 * This makes it possible to drop the spinlock throughout
2575 * the reconfiguration process. */
2576 spin_lock_irqsave(&wl->irq_lock, flags);
2577 if (b43legacy_status(dev) < B43legacy_STAT_STARTED) {
2578 spin_unlock_irqrestore(&wl->irq_lock, flags);
2579 goto out_unlock_mutex;
2580 }
2581 savedirqs = b43legacy_interrupt_disable(dev, B43legacy_IRQ_ALL);
2582 spin_unlock_irqrestore(&wl->irq_lock, flags);
2583 b43legacy_synchronize_irq(dev);
2584
2585 /* Switch to the requested channel.
2586 * The firmware takes care of races with the TX handler. */
2587 if (conf->channel_val != phy->channel)
2588 b43legacy_radio_selectchannel(dev, conf->channel_val, 0);
2589
2590 /* Enable/Disable ShortSlot timing. */
2591 if ((!!(conf->flags & IEEE80211_CONF_SHORT_SLOT_TIME))
2592 != dev->short_slot) {
2593 B43legacy_WARN_ON(phy->type != B43legacy_PHYTYPE_G);
2594 if (conf->flags & IEEE80211_CONF_SHORT_SLOT_TIME)
2595 b43legacy_short_slot_timing_enable(dev);
2596 else
2597 b43legacy_short_slot_timing_disable(dev);
2598 }
2599
2600 dev->wl->radiotap_enabled = !!(conf->flags & IEEE80211_CONF_RADIOTAP);
2601
2602 /* Adjust the desired TX power level. */
2603 if (conf->power_level != 0) {
2604 if (conf->power_level != phy->power_level) {
2605 phy->power_level = conf->power_level;
2606 b43legacy_phy_xmitpower(dev);
2607 }
2608 }
2609
2610 /* Antennas for RX and management frame TX. */
2611 b43legacy_mgmtframe_txantenna(dev, antenna_tx);
2612
2613 /* Update templates for AP mode. */
2614 if (b43legacy_is_mode(wl, IEEE80211_IF_TYPE_AP))
2615 b43legacy_set_beacon_int(dev, conf->beacon_int);
2616
2617
2618 if (!!conf->radio_enabled != phy->radio_on) {
2619 if (conf->radio_enabled) {
2620 b43legacy_radio_turn_on(dev);
2621 b43legacyinfo(dev->wl, "Radio turned on by software\n");
2622 if (!dev->radio_hw_enable)
2623 b43legacyinfo(dev->wl, "The hardware RF-kill"
2624 " button still turns the radio"
2625 " physically off. Press the"
2626 " button to turn it on.\n");
2627 } else {
2628 b43legacy_radio_turn_off(dev, 0);
2629 b43legacyinfo(dev->wl, "Radio turned off by"
2630 " software\n");
2631 }
2632 }
2633
2634 spin_lock_irqsave(&wl->irq_lock, flags);
2635 b43legacy_interrupt_enable(dev, savedirqs);
2636 mmiowb();
2637 spin_unlock_irqrestore(&wl->irq_lock, flags);
2638 out_unlock_mutex:
2639 mutex_unlock(&wl->mutex);
2640
2641 return err;
2642 }
2643
2644 static void b43legacy_op_configure_filter(struct ieee80211_hw *hw,
2645 unsigned int changed,
2646 unsigned int *fflags,
2647 int mc_count,
2648 struct dev_addr_list *mc_list)
2649 {
2650 struct b43legacy_wl *wl = hw_to_b43legacy_wl(hw);
2651 struct b43legacy_wldev *dev = wl->current_dev;
2652 unsigned long flags;
2653
2654 if (!dev) {
2655 *fflags = 0;
2656 return;
2657 }
2658
2659 spin_lock_irqsave(&wl->irq_lock, flags);
2660 *fflags &= FIF_PROMISC_IN_BSS |
2661 FIF_ALLMULTI |
2662 FIF_FCSFAIL |
2663 FIF_PLCPFAIL |
2664 FIF_CONTROL |
2665 FIF_OTHER_BSS |
2666 FIF_BCN_PRBRESP_PROMISC;
2667
2668 changed &= FIF_PROMISC_IN_BSS |
2669 FIF_ALLMULTI |
2670 FIF_FCSFAIL |
2671 FIF_PLCPFAIL |
2672 FIF_CONTROL |
2673 FIF_OTHER_BSS |
2674 FIF_BCN_PRBRESP_PROMISC;
2675
2676 wl->filter_flags = *fflags;
2677
2678 if (changed && b43legacy_status(dev) >= B43legacy_STAT_INITIALIZED)
2679 b43legacy_adjust_opmode(dev);
2680 spin_unlock_irqrestore(&wl->irq_lock, flags);
2681 }
2682
2683 static int b43legacy_op_config_interface(struct ieee80211_hw *hw,
2684 struct ieee80211_vif *vif,
2685 struct ieee80211_if_conf *conf)
2686 {
2687 struct b43legacy_wl *wl = hw_to_b43legacy_wl(hw);
2688 struct b43legacy_wldev *dev = wl->current_dev;
2689 unsigned long flags;
2690
2691 if (!dev)
2692 return -ENODEV;
2693 mutex_lock(&wl->mutex);
2694 spin_lock_irqsave(&wl->irq_lock, flags);
2695 B43legacy_WARN_ON(wl->vif != vif);
2696 if (conf->bssid)
2697 memcpy(wl->bssid, conf->bssid, ETH_ALEN);
2698 else
2699 memset(wl->bssid, 0, ETH_ALEN);
2700 if (b43legacy_status(dev) >= B43legacy_STAT_INITIALIZED) {
2701 if (b43legacy_is_mode(wl, IEEE80211_IF_TYPE_AP)) {
2702 B43legacy_WARN_ON(conf->type != IEEE80211_IF_TYPE_AP);
2703 b43legacy_set_ssid(dev, conf->ssid, conf->ssid_len);
2704 if (conf->beacon)
2705 b43legacy_refresh_templates(dev, conf->beacon);
2706 }
2707 b43legacy_write_mac_bssid_templates(dev);
2708 }
2709 spin_unlock_irqrestore(&wl->irq_lock, flags);
2710 mutex_unlock(&wl->mutex);
2711
2712 return 0;
2713 }
2714
2715 /* Locking: wl->mutex */
2716 static void b43legacy_wireless_core_stop(struct b43legacy_wldev *dev)
2717 {
2718 struct b43legacy_wl *wl = dev->wl;
2719 unsigned long flags;
2720
2721 if (b43legacy_status(dev) < B43legacy_STAT_STARTED)
2722 return;
2723
2724 /* Disable and sync interrupts. We must do this before than
2725 * setting the status to INITIALIZED, as the interrupt handler
2726 * won't care about IRQs then. */
2727 spin_lock_irqsave(&wl->irq_lock, flags);
2728 dev->irq_savedstate = b43legacy_interrupt_disable(dev,
2729 B43legacy_IRQ_ALL);
2730 b43legacy_read32(dev, B43legacy_MMIO_GEN_IRQ_MASK); /* flush */
2731 spin_unlock_irqrestore(&wl->irq_lock, flags);
2732 b43legacy_synchronize_irq(dev);
2733
2734 b43legacy_set_status(dev, B43legacy_STAT_INITIALIZED);
2735
2736 mutex_unlock(&wl->mutex);
2737 /* Must unlock as it would otherwise deadlock. No races here.
2738 * Cancel the possibly running self-rearming periodic work. */
2739 cancel_delayed_work_sync(&dev->periodic_work);
2740 mutex_lock(&wl->mutex);
2741
2742 ieee80211_stop_queues(wl->hw); /* FIXME this could cause a deadlock */
2743
2744 b43legacy_mac_suspend(dev);
2745 free_irq(dev->dev->irq, dev);
2746 b43legacydbg(wl, "Wireless interface stopped\n");
2747 }
2748
2749 /* Locking: wl->mutex */
2750 static int b43legacy_wireless_core_start(struct b43legacy_wldev *dev)
2751 {
2752 int err;
2753
2754 B43legacy_WARN_ON(b43legacy_status(dev) != B43legacy_STAT_INITIALIZED);
2755
2756 drain_txstatus_queue(dev);
2757 err = request_irq(dev->dev->irq, b43legacy_interrupt_handler,
2758 IRQF_SHARED, KBUILD_MODNAME, dev);
2759 if (err) {
2760 b43legacyerr(dev->wl, "Cannot request IRQ-%d\n",
2761 dev->dev->irq);
2762 goto out;
2763 }
2764 /* We are ready to run. */
2765 b43legacy_set_status(dev, B43legacy_STAT_STARTED);
2766
2767 /* Start data flow (TX/RX) */
2768 b43legacy_mac_enable(dev);
2769 b43legacy_interrupt_enable(dev, dev->irq_savedstate);
2770 ieee80211_start_queues(dev->wl->hw);
2771
2772 /* Start maintenance work */
2773 b43legacy_periodic_tasks_setup(dev);
2774
2775 b43legacydbg(dev->wl, "Wireless interface started\n");
2776 out:
2777 return err;
2778 }
2779
2780 /* Get PHY and RADIO versioning numbers */
2781 static int b43legacy_phy_versioning(struct b43legacy_wldev *dev)
2782 {
2783 struct b43legacy_phy *phy = &dev->phy;
2784 u32 tmp;
2785 u8 analog_type;
2786 u8 phy_type;
2787 u8 phy_rev;
2788 u16 radio_manuf;
2789 u16 radio_ver;
2790 u16 radio_rev;
2791 int unsupported = 0;
2792
2793 /* Get PHY versioning */
2794 tmp = b43legacy_read16(dev, B43legacy_MMIO_PHY_VER);
2795 analog_type = (tmp & B43legacy_PHYVER_ANALOG)
2796 >> B43legacy_PHYVER_ANALOG_SHIFT;
2797 phy_type = (tmp & B43legacy_PHYVER_TYPE) >> B43legacy_PHYVER_TYPE_SHIFT;
2798 phy_rev = (tmp & B43legacy_PHYVER_VERSION);
2799 switch (phy_type) {
2800 case B43legacy_PHYTYPE_B:
2801 if (phy_rev != 2 && phy_rev != 4
2802 && phy_rev != 6 && phy_rev != 7)
2803 unsupported = 1;
2804 break;
2805 case B43legacy_PHYTYPE_G:
2806 if (phy_rev > 8)
2807 unsupported = 1;
2808 break;
2809 default:
2810 unsupported = 1;
2811 };
2812 if (unsupported) {
2813 b43legacyerr(dev->wl, "FOUND UNSUPPORTED PHY "
2814 "(Analog %u, Type %u, Revision %u)\n",
2815 analog_type, phy_type, phy_rev);
2816 return -EOPNOTSUPP;
2817 }
2818 b43legacydbg(dev->wl, "Found PHY: Analog %u, Type %u, Revision %u\n",
2819 analog_type, phy_type, phy_rev);
2820
2821
2822 /* Get RADIO versioning */
2823 if (dev->dev->bus->chip_id == 0x4317) {
2824 if (dev->dev->bus->chip_rev == 0)
2825 tmp = 0x3205017F;
2826 else if (dev->dev->bus->chip_rev == 1)
2827 tmp = 0x4205017F;
2828 else
2829 tmp = 0x5205017F;
2830 } else {
2831 b43legacy_write16(dev, B43legacy_MMIO_RADIO_CONTROL,
2832 B43legacy_RADIOCTL_ID);
2833 tmp = b43legacy_read16(dev, B43legacy_MMIO_RADIO_DATA_HIGH);
2834 tmp <<= 16;
2835 b43legacy_write16(dev, B43legacy_MMIO_RADIO_CONTROL,
2836 B43legacy_RADIOCTL_ID);
2837 tmp |= b43legacy_read16(dev, B43legacy_MMIO_RADIO_DATA_LOW);
2838 }
2839 radio_manuf = (tmp & 0x00000FFF);
2840 radio_ver = (tmp & 0x0FFFF000) >> 12;
2841 radio_rev = (tmp & 0xF0000000) >> 28;
2842 switch (phy_type) {
2843 case B43legacy_PHYTYPE_B:
2844 if ((radio_ver & 0xFFF0) != 0x2050)
2845 unsupported = 1;
2846 break;
2847 case B43legacy_PHYTYPE_G:
2848 if (radio_ver != 0x2050)
2849 unsupported = 1;
2850 break;
2851 default:
2852 B43legacy_BUG_ON(1);
2853 }
2854 if (unsupported) {
2855 b43legacyerr(dev->wl, "FOUND UNSUPPORTED RADIO "
2856 "(Manuf 0x%X, Version 0x%X, Revision %u)\n",
2857 radio_manuf, radio_ver, radio_rev);
2858 return -EOPNOTSUPP;
2859 }
2860 b43legacydbg(dev->wl, "Found Radio: Manuf 0x%X, Version 0x%X,"
2861 " Revision %u\n", radio_manuf, radio_ver, radio_rev);
2862
2863
2864 phy->radio_manuf = radio_manuf;
2865 phy->radio_ver = radio_ver;
2866 phy->radio_rev = radio_rev;
2867
2868 phy->analog = analog_type;
2869 phy->type = phy_type;
2870 phy->rev = phy_rev;
2871
2872 return 0;
2873 }
2874
2875 static void setup_struct_phy_for_init(struct b43legacy_wldev *dev,
2876 struct b43legacy_phy *phy)
2877 {
2878 struct b43legacy_lopair *lo;
2879 int i;
2880
2881 memset(phy->minlowsig, 0xFF, sizeof(phy->minlowsig));
2882 memset(phy->minlowsigpos, 0, sizeof(phy->minlowsigpos));
2883
2884 /* Assume the radio is enabled. If it's not enabled, the state will
2885 * immediately get fixed on the first periodic work run. */
2886 dev->radio_hw_enable = 1;
2887
2888 phy->savedpctlreg = 0xFFFF;
2889 phy->aci_enable = 0;
2890 phy->aci_wlan_automatic = 0;
2891 phy->aci_hw_rssi = 0;
2892
2893 lo = phy->_lo_pairs;
2894 if (lo)
2895 memset(lo, 0, sizeof(struct b43legacy_lopair) *
2896 B43legacy_LO_COUNT);
2897 phy->max_lb_gain = 0;
2898 phy->trsw_rx_gain = 0;
2899
2900 /* Set default attenuation values. */
2901 phy->bbatt = b43legacy_default_baseband_attenuation(dev);
2902 phy->rfatt = b43legacy_default_radio_attenuation(dev);
2903 phy->txctl1 = b43legacy_default_txctl1(dev);
2904 phy->txpwr_offset = 0;
2905
2906 /* NRSSI */
2907 phy->nrssislope = 0;
2908 for (i = 0; i < ARRAY_SIZE(phy->nrssi); i++)
2909 phy->nrssi[i] = -1000;
2910 for (i = 0; i < ARRAY_SIZE(phy->nrssi_lt); i++)
2911 phy->nrssi_lt[i] = i;
2912
2913 phy->lofcal = 0xFFFF;
2914 phy->initval = 0xFFFF;
2915
2916 phy->interfmode = B43legacy_INTERFMODE_NONE;
2917 phy->channel = 0xFF;
2918 }
2919
2920 static void setup_struct_wldev_for_init(struct b43legacy_wldev *dev)
2921 {
2922 /* Flags */
2923 dev->reg124_set_0x4 = 0;
2924
2925 /* Stats */
2926 memset(&dev->stats, 0, sizeof(dev->stats));
2927
2928 setup_struct_phy_for_init(dev, &dev->phy);
2929
2930 /* IRQ related flags */
2931 dev->irq_reason = 0;
2932 memset(dev->dma_reason, 0, sizeof(dev->dma_reason));
2933 dev->irq_savedstate = B43legacy_IRQ_MASKTEMPLATE;
2934
2935 dev->mac_suspended = 1;
2936
2937 /* Noise calculation context */
2938 memset(&dev->noisecalc, 0, sizeof(dev->noisecalc));
2939 }
2940
2941 static void b43legacy_imcfglo_timeouts_workaround(struct b43legacy_wldev *dev)
2942 {
2943 #ifdef CONFIG_SSB_DRIVER_PCICORE
2944 struct ssb_bus *bus = dev->dev->bus;
2945 u32 tmp;
2946
2947 if (bus->pcicore.dev &&
2948 bus->pcicore.dev->id.coreid == SSB_DEV_PCI &&
2949 bus->pcicore.dev->id.revision <= 5) {
2950 /* IMCFGLO timeouts workaround. */
2951 tmp = ssb_read32(dev->dev, SSB_IMCFGLO);
2952 tmp &= ~SSB_IMCFGLO_REQTO;
2953 tmp &= ~SSB_IMCFGLO_SERTO;
2954 switch (bus->bustype) {
2955 case SSB_BUSTYPE_PCI:
2956 case SSB_BUSTYPE_PCMCIA:
2957 tmp |= 0x32;
2958 break;
2959 case SSB_BUSTYPE_SSB:
2960 tmp |= 0x53;
2961 break;
2962 }
2963 ssb_write32(dev->dev, SSB_IMCFGLO, tmp);
2964 }
2965 #endif /* CONFIG_SSB_DRIVER_PCICORE */
2966 }
2967
2968 /* Write the short and long frame retry limit values. */
2969 static void b43legacy_set_retry_limits(struct b43legacy_wldev *dev,
2970 unsigned int short_retry,
2971 unsigned int long_retry)
2972 {
2973 /* The retry limit is a 4-bit counter. Enforce this to avoid overflowing
2974 * the chip-internal counter. */
2975 short_retry = min(short_retry, (unsigned int)0xF);
2976 long_retry = min(long_retry, (unsigned int)0xF);
2977
2978 b43legacy_shm_write16(dev, B43legacy_SHM_WIRELESS, 0x0006, short_retry);
2979 b43legacy_shm_write16(dev, B43legacy_SHM_WIRELESS, 0x0007, long_retry);
2980 }
2981
2982 /* Shutdown a wireless core */
2983 /* Locking: wl->mutex */
2984 static void b43legacy_wireless_core_exit(struct b43legacy_wldev *dev)
2985 {
2986 struct b43legacy_wl *wl = dev->wl;
2987 struct b43legacy_phy *phy = &dev->phy;
2988 u32 macctl;
2989
2990 B43legacy_WARN_ON(b43legacy_status(dev) > B43legacy_STAT_INITIALIZED);
2991 if (b43legacy_status(dev) != B43legacy_STAT_INITIALIZED)
2992 return;
2993 b43legacy_set_status(dev, B43legacy_STAT_UNINIT);
2994
2995 /* Stop the microcode PSM. */
2996 macctl = b43legacy_read32(dev, B43legacy_MMIO_MACCTL);
2997 macctl &= ~B43legacy_MACCTL_PSM_RUN;
2998 macctl |= B43legacy_MACCTL_PSM_JMP0;
2999 b43legacy_write32(dev, B43legacy_MMIO_MACCTL, macctl);
3000
3001 mutex_unlock(&wl->mutex);
3002 /* Must unlock as it would otherwise deadlock. No races here.
3003 * Cancel possibly pending workqueues. */
3004 cancel_work_sync(&dev->restart_work);
3005 mutex_lock(&wl->mutex);
3006
3007 b43legacy_leds_exit(dev);
3008 b43legacy_rng_exit(dev->wl);
3009 b43legacy_pio_free(dev);
3010 b43legacy_dma_free(dev);
3011 b43legacy_chip_exit(dev);
3012 b43legacy_radio_turn_off(dev, 1);
3013 b43legacy_switch_analog(dev, 0);
3014 if (phy->dyn_tssi_tbl)
3015 kfree(phy->tssi2dbm);
3016 kfree(phy->lo_control);
3017 phy->lo_control = NULL;
3018 ssb_device_disable(dev->dev, 0);
3019 ssb_bus_may_powerdown(dev->dev->bus);
3020 }
3021
3022 static void prepare_phy_data_for_init(struct b43legacy_wldev *dev)
3023 {
3024 struct b43legacy_phy *phy = &dev->phy;
3025 int i;
3026
3027 /* Set default attenuation values. */
3028 phy->bbatt = b43legacy_default_baseband_attenuation(dev);
3029 phy->rfatt = b43legacy_default_radio_attenuation(dev);
3030 phy->txctl1 = b43legacy_default_txctl1(dev);
3031 phy->txctl2 = 0xFFFF;
3032 phy->txpwr_offset = 0;
3033
3034 /* NRSSI */
3035 phy->nrssislope = 0;
3036 for (i = 0; i < ARRAY_SIZE(phy->nrssi); i++)
3037 phy->nrssi[i] = -1000;
3038 for (i = 0; i < ARRAY_SIZE(phy->nrssi_lt); i++)
3039 phy->nrssi_lt[i] = i;
3040
3041 phy->lofcal = 0xFFFF;
3042 phy->initval = 0xFFFF;
3043
3044 phy->aci_enable = 0;
3045 phy->aci_wlan_automatic = 0;
3046 phy->aci_hw_rssi = 0;
3047
3048 phy->antenna_diversity = 0xFFFF;
3049 memset(phy->minlowsig, 0xFF, sizeof(phy->minlowsig));
3050 memset(phy->minlowsigpos, 0, sizeof(phy->minlowsigpos));
3051
3052 /* Flags */
3053 phy->calibrated = 0;
3054
3055 if (phy->_lo_pairs)
3056 memset(phy->_lo_pairs, 0,
3057 sizeof(struct b43legacy_lopair) * B43legacy_LO_COUNT);
3058 memset(phy->loopback_gain, 0, sizeof(phy->loopback_gain));
3059 }
3060
3061 /* Initialize a wireless core */
3062 static int b43legacy_wireless_core_init(struct b43legacy_wldev *dev)
3063 {
3064 struct b43legacy_wl *wl = dev->wl;
3065 struct ssb_bus *bus = dev->dev->bus;
3066 struct b43legacy_phy *phy = &dev->phy;
3067 struct ssb_sprom *sprom = &dev->dev->bus->sprom;
3068 int err;
3069 u32 hf;
3070 u32 tmp;
3071
3072 B43legacy_WARN_ON(b43legacy_status(dev) != B43legacy_STAT_UNINIT);
3073
3074 err = ssb_bus_powerup(bus, 0);
3075 if (err)
3076 goto out;
3077 if (!ssb_device_is_enabled(dev->dev)) {
3078 tmp = phy->gmode ? B43legacy_TMSLOW_GMODE : 0;
3079 b43legacy_wireless_core_reset(dev, tmp);
3080 }
3081
3082 if ((phy->type == B43legacy_PHYTYPE_B) ||
3083 (phy->type == B43legacy_PHYTYPE_G)) {
3084 phy->_lo_pairs = kzalloc(sizeof(struct b43legacy_lopair)
3085 * B43legacy_LO_COUNT,
3086 GFP_KERNEL);
3087 if (!phy->_lo_pairs)
3088 return -ENOMEM;
3089 }
3090 setup_struct_wldev_for_init(dev);
3091
3092 err = b43legacy_phy_init_tssi2dbm_table(dev);
3093 if (err)
3094 goto err_kfree_lo_control;
3095
3096 /* Enable IRQ routing to this device. */
3097 ssb_pcicore_dev_irqvecs_enable(&bus->pcicore, dev->dev);
3098
3099 b43legacy_imcfglo_timeouts_workaround(dev);
3100 prepare_phy_data_for_init(dev);
3101 b43legacy_phy_calibrate(dev);
3102 err = b43legacy_chip_init(dev);
3103 if (err)
3104 goto err_kfree_tssitbl;
3105 b43legacy_shm_write16(dev, B43legacy_SHM_SHARED,
3106 B43legacy_SHM_SH_WLCOREREV,
3107 dev->dev->id.revision);
3108 hf = b43legacy_hf_read(dev);
3109 if (phy->type == B43legacy_PHYTYPE_G) {
3110 hf |= B43legacy_HF_SYMW;
3111 if (phy->rev == 1)
3112 hf |= B43legacy_HF_GDCW;
3113 if (sprom->boardflags_lo & B43legacy_BFL_PACTRL)
3114 hf |= B43legacy_HF_OFDMPABOOST;
3115 } else if (phy->type == B43legacy_PHYTYPE_B) {
3116 hf |= B43legacy_HF_SYMW;
3117 if (phy->rev >= 2 && phy->radio_ver == 0x2050)
3118 hf &= ~B43legacy_HF_GDCW;
3119 }
3120 b43legacy_hf_write(dev, hf);
3121
3122 b43legacy_set_retry_limits(dev,
3123 B43legacy_DEFAULT_SHORT_RETRY_LIMIT,
3124 B43legacy_DEFAULT_LONG_RETRY_LIMIT);
3125
3126 b43legacy_shm_write16(dev, B43legacy_SHM_SHARED,
3127 0x0044, 3);
3128 b43legacy_shm_write16(dev, B43legacy_SHM_SHARED,
3129 0x0046, 2);
3130
3131 /* Disable sending probe responses from firmware.
3132 * Setting the MaxTime to one usec will always trigger
3133 * a timeout, so we never send any probe resp.
3134 * A timeout of zero is infinite. */
3135 b43legacy_shm_write16(dev, B43legacy_SHM_SHARED,
3136 B43legacy_SHM_SH_PRMAXTIME, 1);
3137
3138 b43legacy_rate_memory_init(dev);
3139
3140 /* Minimum Contention Window */
3141 if (phy->type == B43legacy_PHYTYPE_B)
3142 b43legacy_shm_write16(dev, B43legacy_SHM_WIRELESS,
3143 0x0003, 31);
3144 else
3145 b43legacy_shm_write16(dev, B43legacy_SHM_WIRELESS,
3146 0x0003, 15);
3147 /* Maximum Contention Window */
3148 b43legacy_shm_write16(dev, B43legacy_SHM_WIRELESS,
3149 0x0004, 1023);
3150
3151 do {
3152 if (b43legacy_using_pio(dev))
3153 err = b43legacy_pio_init(dev);
3154 else {
3155 err = b43legacy_dma_init(dev);
3156 if (!err)
3157 b43legacy_qos_init(dev);
3158 }
3159 } while (err == -EAGAIN);
3160 if (err)
3161 goto err_chip_exit;
3162
3163 b43legacy_write16(dev, 0x0612, 0x0050);
3164 b43legacy_shm_write16(dev, B43legacy_SHM_SHARED, 0x0416, 0x0050);
3165 b43legacy_shm_write16(dev, B43legacy_SHM_SHARED, 0x0414, 0x01F4);
3166
3167 ssb_bus_powerup(bus, 1); /* Enable dynamic PCTL */
3168 b43legacy_upload_card_macaddress(dev);
3169 b43legacy_security_init(dev);
3170 b43legacy_rng_init(wl);
3171
3172 b43legacy_set_status(dev, B43legacy_STAT_INITIALIZED);
3173
3174 b43legacy_leds_init(dev);
3175 out:
3176 return err;
3177
3178 err_chip_exit:
3179 b43legacy_chip_exit(dev);
3180 err_kfree_tssitbl:
3181 if (phy->dyn_tssi_tbl)
3182 kfree(phy->tssi2dbm);
3183 err_kfree_lo_control:
3184 kfree(phy->lo_control);
3185 phy->lo_control = NULL;
3186 ssb_bus_may_powerdown(bus);
3187 B43legacy_WARN_ON(b43legacy_status(dev) != B43legacy_STAT_UNINIT);
3188 return err;
3189 }
3190
3191 static int b43legacy_op_add_interface(struct ieee80211_hw *hw,
3192 struct ieee80211_if_init_conf *conf)
3193 {
3194 struct b43legacy_wl *wl = hw_to_b43legacy_wl(hw);
3195 struct b43legacy_wldev *dev;
3196 unsigned long flags;
3197 int err = -EOPNOTSUPP;
3198
3199 /* TODO: allow WDS/AP devices to coexist */
3200
3201 if (conf->type != IEEE80211_IF_TYPE_AP &&
3202 conf->type != IEEE80211_IF_TYPE_STA &&
3203 conf->type != IEEE80211_IF_TYPE_WDS &&
3204 conf->type != IEEE80211_IF_TYPE_IBSS)
3205 return -EOPNOTSUPP;
3206
3207 mutex_lock(&wl->mutex);
3208 if (wl->operating)
3209 goto out_mutex_unlock;
3210
3211 b43legacydbg(wl, "Adding Interface type %d\n", conf->type);
3212
3213 dev = wl->current_dev;
3214 wl->operating = 1;
3215 wl->vif = conf->vif;
3216 wl->if_type = conf->type;
3217 memcpy(wl->mac_addr, conf->mac_addr, ETH_ALEN);
3218
3219 spin_lock_irqsave(&wl->irq_lock, flags);
3220 b43legacy_adjust_opmode(dev);
3221 b43legacy_upload_card_macaddress(dev);
3222 spin_unlock_irqrestore(&wl->irq_lock, flags);
3223
3224 err = 0;
3225 out_mutex_unlock:
3226 mutex_unlock(&wl->mutex);
3227
3228 return err;
3229 }
3230
3231 static void b43legacy_op_remove_interface(struct ieee80211_hw *hw,
3232 struct ieee80211_if_init_conf *conf)
3233 {
3234 struct b43legacy_wl *wl = hw_to_b43legacy_wl(hw);
3235 struct b43legacy_wldev *dev = wl->current_dev;
3236 unsigned long flags;
3237
3238 b43legacydbg(wl, "Removing Interface type %d\n", conf->type);
3239
3240 mutex_lock(&wl->mutex);
3241
3242 B43legacy_WARN_ON(!wl->operating);
3243 B43legacy_WARN_ON(wl->vif != conf->vif);
3244 wl->vif = NULL;
3245
3246 wl->operating = 0;
3247
3248 spin_lock_irqsave(&wl->irq_lock, flags);
3249 b43legacy_adjust_opmode(dev);
3250 memset(wl->mac_addr, 0, ETH_ALEN);
3251 b43legacy_upload_card_macaddress(dev);
3252 spin_unlock_irqrestore(&wl->irq_lock, flags);
3253
3254 mutex_unlock(&wl->mutex);
3255 }
3256
3257 static int b43legacy_op_start(struct ieee80211_hw *hw)
3258 {
3259 struct b43legacy_wl *wl = hw_to_b43legacy_wl(hw);
3260 struct b43legacy_wldev *dev = wl->current_dev;
3261 int did_init = 0;
3262 int err = 0;
3263 bool do_rfkill_exit = 0;
3264
3265 /* First register RFkill.
3266 * LEDs that are registered later depend on it. */
3267 b43legacy_rfkill_init(dev);
3268
3269 /* Kill all old instance specific information to make sure
3270 * the card won't use it in the short timeframe between start
3271 * and mac80211 reconfiguring it. */
3272 memset(wl->bssid, 0, ETH_ALEN);
3273 memset(wl->mac_addr, 0, ETH_ALEN);
3274 wl->filter_flags = 0;
3275
3276 mutex_lock(&wl->mutex);
3277
3278 if (b43legacy_status(dev) < B43legacy_STAT_INITIALIZED) {
3279 err = b43legacy_wireless_core_init(dev);
3280 if (err) {
3281 do_rfkill_exit = 1;
3282 goto out_mutex_unlock;
3283 }
3284 did_init = 1;
3285 }
3286
3287 if (b43legacy_status(dev) < B43legacy_STAT_STARTED) {
3288 err = b43legacy_wireless_core_start(dev);
3289 if (err) {
3290 if (did_init)
3291 b43legacy_wireless_core_exit(dev);
3292 do_rfkill_exit = 1;
3293 goto out_mutex_unlock;
3294 }
3295 }
3296
3297 out_mutex_unlock:
3298 mutex_unlock(&wl->mutex);
3299
3300 if (do_rfkill_exit)
3301 b43legacy_rfkill_exit(dev);
3302
3303 return err;
3304 }
3305
3306 static void b43legacy_op_stop(struct ieee80211_hw *hw)
3307 {
3308 struct b43legacy_wl *wl = hw_to_b43legacy_wl(hw);
3309 struct b43legacy_wldev *dev = wl->current_dev;
3310
3311 b43legacy_rfkill_exit(dev);
3312
3313 mutex_lock(&wl->mutex);
3314 if (b43legacy_status(dev) >= B43legacy_STAT_STARTED)
3315 b43legacy_wireless_core_stop(dev);
3316 b43legacy_wireless_core_exit(dev);
3317 mutex_unlock(&wl->mutex);
3318 }
3319
3320 static int b43legacy_op_set_retry_limit(struct ieee80211_hw *hw,
3321 u32 short_retry_limit,
3322 u32 long_retry_limit)
3323 {
3324 struct b43legacy_wl *wl = hw_to_b43legacy_wl(hw);
3325 struct b43legacy_wldev *dev;
3326 int err = 0;
3327
3328 mutex_lock(&wl->mutex);
3329 dev = wl->current_dev;
3330 if (unlikely(!dev ||
3331 (b43legacy_status(dev) < B43legacy_STAT_INITIALIZED))) {
3332 err = -ENODEV;
3333 goto out_unlock;
3334 }
3335 b43legacy_set_retry_limits(dev, short_retry_limit, long_retry_limit);
3336 out_unlock:
3337 mutex_unlock(&wl->mutex);
3338
3339 return err;
3340 }
3341
3342 static const struct ieee80211_ops b43legacy_hw_ops = {
3343 .tx = b43legacy_op_tx,
3344 .conf_tx = b43legacy_op_conf_tx,
3345 .add_interface = b43legacy_op_add_interface,
3346 .remove_interface = b43legacy_op_remove_interface,
3347 .config = b43legacy_op_dev_config,
3348 .config_interface = b43legacy_op_config_interface,
3349 .configure_filter = b43legacy_op_configure_filter,
3350 .get_stats = b43legacy_op_get_stats,
3351 .get_tx_stats = b43legacy_op_get_tx_stats,
3352 .start = b43legacy_op_start,
3353 .stop = b43legacy_op_stop,
3354 .set_retry_limit = b43legacy_op_set_retry_limit,
3355 };
3356
3357 /* Hard-reset the chip. Do not call this directly.
3358 * Use b43legacy_controller_restart()
3359 */
3360 static void b43legacy_chip_reset(struct work_struct *work)
3361 {
3362 struct b43legacy_wldev *dev =
3363 container_of(work, struct b43legacy_wldev, restart_work);
3364 struct b43legacy_wl *wl = dev->wl;
3365 int err = 0;
3366 int prev_status;
3367
3368 mutex_lock(&wl->mutex);
3369
3370 prev_status = b43legacy_status(dev);
3371 /* Bring the device down... */
3372 if (prev_status >= B43legacy_STAT_STARTED)
3373 b43legacy_wireless_core_stop(dev);
3374 if (prev_status >= B43legacy_STAT_INITIALIZED)
3375 b43legacy_wireless_core_exit(dev);
3376
3377 /* ...and up again. */
3378 if (prev_status >= B43legacy_STAT_INITIALIZED) {
3379 err = b43legacy_wireless_core_init(dev);
3380 if (err)
3381 goto out;
3382 }
3383 if (prev_status >= B43legacy_STAT_STARTED) {
3384 err = b43legacy_wireless_core_start(dev);
3385 if (err) {
3386 b43legacy_wireless_core_exit(dev);
3387 goto out;
3388 }
3389 }
3390 out:
3391 mutex_unlock(&wl->mutex);
3392 if (err)
3393 b43legacyerr(wl, "Controller restart FAILED\n");
3394 else
3395 b43legacyinfo(wl, "Controller restarted\n");
3396 }
3397
3398 static int b43legacy_setup_modes(struct b43legacy_wldev *dev,
3399 int have_bphy,
3400 int have_gphy)
3401 {
3402 struct ieee80211_hw *hw = dev->wl->hw;
3403 struct ieee80211_hw_mode *mode;
3404 struct b43legacy_phy *phy = &dev->phy;
3405 int cnt = 0;
3406 int err;
3407
3408 phy->possible_phymodes = 0;
3409 for (; 1; cnt++) {
3410 if (have_bphy) {
3411 B43legacy_WARN_ON(cnt >= B43legacy_MAX_PHYHWMODES);
3412 mode = &phy->hwmodes[cnt];
3413
3414 mode->mode = MODE_IEEE80211B;
3415 mode->num_channels = b43legacy_bg_chantable_size;
3416 mode->channels = b43legacy_bg_chantable;
3417 mode->num_rates = b43legacy_b_ratetable_size;
3418 mode->rates = b43legacy_b_ratetable;
3419 err = ieee80211_register_hwmode(hw, mode);
3420 if (err)
3421 return err;
3422
3423 phy->possible_phymodes |= B43legacy_PHYMODE_B;
3424 have_bphy = 0;
3425 continue;
3426 }
3427 if (have_gphy) {
3428 B43legacy_WARN_ON(cnt >= B43legacy_MAX_PHYHWMODES);
3429 mode = &phy->hwmodes[cnt];
3430
3431 mode->mode = MODE_IEEE80211G;
3432 mode->num_channels = b43legacy_bg_chantable_size;
3433 mode->channels = b43legacy_bg_chantable;
3434 mode->num_rates = b43legacy_g_ratetable_size;
3435 mode->rates = b43legacy_g_ratetable;
3436 err = ieee80211_register_hwmode(hw, mode);
3437 if (err)
3438 return err;
3439
3440 phy->possible_phymodes |= B43legacy_PHYMODE_G;
3441 have_gphy = 0;
3442 continue;
3443 }
3444 break;
3445 }
3446
3447 return 0;
3448 }
3449
3450 static void b43legacy_wireless_core_detach(struct b43legacy_wldev *dev)
3451 {
3452 /* We release firmware that late to not be required to re-request
3453 * is all the time when we reinit the core. */
3454 b43legacy_release_firmware(dev);
3455 }
3456
3457 static int b43legacy_wireless_core_attach(struct b43legacy_wldev *dev)
3458 {
3459 struct b43legacy_wl *wl = dev->wl;
3460 struct ssb_bus *bus = dev->dev->bus;
3461 struct pci_dev *pdev = bus->host_pci;
3462 int err;
3463 int have_bphy = 0;
3464 int have_gphy = 0;
3465 u32 tmp;
3466
3467 /* Do NOT do any device initialization here.
3468 * Do it in wireless_core_init() instead.
3469 * This function is for gathering basic information about the HW, only.
3470 * Also some structs may be set up here. But most likely you want to
3471 * have that in core_init(), too.
3472 */
3473
3474 err = ssb_bus_powerup(bus, 0);
3475 if (err) {
3476 b43legacyerr(wl, "Bus powerup failed\n");
3477 goto out;
3478 }
3479 /* Get the PHY type. */
3480 if (dev->dev->id.revision >= 5) {
3481 u32 tmshigh;
3482
3483 tmshigh = ssb_read32(dev->dev, SSB_TMSHIGH);
3484 have_gphy = !!(tmshigh & B43legacy_TMSHIGH_GPHY);
3485 if (!have_gphy)
3486 have_bphy = 1;
3487 } else if (dev->dev->id.revision == 4)
3488 have_gphy = 1;
3489 else
3490 have_bphy = 1;
3491
3492 dev->phy.gmode = (have_gphy || have_bphy);
3493 tmp = dev->phy.gmode ? B43legacy_TMSLOW_GMODE : 0;
3494 b43legacy_wireless_core_reset(dev, tmp);
3495
3496 err = b43legacy_phy_versioning(dev);
3497 if (err)
3498 goto err_powerdown;
3499 /* Check if this device supports multiband. */
3500 if (!pdev ||
3501 (pdev->device != 0x4312 &&
3502 pdev->device != 0x4319 &&
3503 pdev->device != 0x4324)) {
3504 /* No multiband support. */
3505 have_bphy = 0;
3506 have_gphy = 0;
3507 switch (dev->phy.type) {
3508 case B43legacy_PHYTYPE_B:
3509 have_bphy = 1;
3510 break;
3511 case B43legacy_PHYTYPE_G:
3512 have_gphy = 1;
3513 break;
3514 default:
3515 B43legacy_BUG_ON(1);
3516 }
3517 }
3518 dev->phy.gmode = (have_gphy || have_bphy);
3519 tmp = dev->phy.gmode ? B43legacy_TMSLOW_GMODE : 0;
3520 b43legacy_wireless_core_reset(dev, tmp);
3521
3522 err = b43legacy_validate_chipaccess(dev);
3523 if (err)
3524 goto err_powerdown;
3525 err = b43legacy_setup_modes(dev, have_bphy, have_gphy);
3526 if (err)
3527 goto err_powerdown;
3528
3529 /* Now set some default "current_dev" */
3530 if (!wl->current_dev)
3531 wl->current_dev = dev;
3532 INIT_WORK(&dev->restart_work, b43legacy_chip_reset);
3533
3534 b43legacy_radio_turn_off(dev, 1);
3535 b43legacy_switch_analog(dev, 0);
3536 ssb_device_disable(dev->dev, 0);
3537 ssb_bus_may_powerdown(bus);
3538
3539 out:
3540 return err;
3541
3542 err_powerdown:
3543 ssb_bus_may_powerdown(bus);
3544 return err;
3545 }
3546
3547 static void b43legacy_one_core_detach(struct ssb_device *dev)
3548 {
3549 struct b43legacy_wldev *wldev;
3550 struct b43legacy_wl *wl;
3551
3552 wldev = ssb_get_drvdata(dev);
3553 wl = wldev->wl;
3554 cancel_work_sync(&wldev->restart_work);
3555 b43legacy_debugfs_remove_device(wldev);
3556 b43legacy_wireless_core_detach(wldev);
3557 list_del(&wldev->list);
3558 wl->nr_devs--;
3559 ssb_set_drvdata(dev, NULL);
3560 kfree(wldev);
3561 }
3562
3563 static int b43legacy_one_core_attach(struct ssb_device *dev,
3564 struct b43legacy_wl *wl)
3565 {
3566 struct b43legacy_wldev *wldev;
3567 struct pci_dev *pdev;
3568 int err = -ENOMEM;
3569
3570 if (!list_empty(&wl->devlist)) {
3571 /* We are not the first core on this chip. */
3572 pdev = dev->bus->host_pci;
3573 /* Only special chips support more than one wireless
3574 * core, although some of the other chips have more than
3575 * one wireless core as well. Check for this and
3576 * bail out early.
3577 */
3578 if (!pdev ||
3579 ((pdev->device != 0x4321) &&
3580 (pdev->device != 0x4313) &&
3581 (pdev->device != 0x431A))) {
3582 b43legacydbg(wl, "Ignoring unconnected 802.11 core\n");
3583 return -ENODEV;
3584 }
3585 }
3586
3587 wldev = kzalloc(sizeof(*wldev), GFP_KERNEL);
3588 if (!wldev)
3589 goto out;
3590
3591 wldev->dev = dev;
3592 wldev->wl = wl;
3593 b43legacy_set_status(wldev, B43legacy_STAT_UNINIT);
3594 wldev->bad_frames_preempt = modparam_bad_frames_preempt;
3595 tasklet_init(&wldev->isr_tasklet,
3596 (void (*)(unsigned long))b43legacy_interrupt_tasklet,
3597 (unsigned long)wldev);
3598 if (modparam_pio)
3599 wldev->__using_pio = 1;
3600 INIT_LIST_HEAD(&wldev->list);
3601
3602 err = b43legacy_wireless_core_attach(wldev);
3603 if (err)
3604 goto err_kfree_wldev;
3605
3606 list_add(&wldev->list, &wl->devlist);
3607 wl->nr_devs++;
3608 ssb_set_drvdata(dev, wldev);
3609 b43legacy_debugfs_add_device(wldev);
3610 out:
3611 return err;
3612
3613 err_kfree_wldev:
3614 kfree(wldev);
3615 return err;
3616 }
3617
3618 static void b43legacy_sprom_fixup(struct ssb_bus *bus)
3619 {
3620 /* boardflags workarounds */
3621 if (bus->boardinfo.vendor == PCI_VENDOR_ID_APPLE &&
3622 bus->boardinfo.type == 0x4E &&
3623 bus->boardinfo.rev > 0x40)
3624 bus->sprom.boardflags_lo |= B43legacy_BFL_PACTRL;
3625 }
3626
3627 static void b43legacy_wireless_exit(struct ssb_device *dev,
3628 struct b43legacy_wl *wl)
3629 {
3630 struct ieee80211_hw *hw = wl->hw;
3631
3632 ssb_set_devtypedata(dev, NULL);
3633 ieee80211_free_hw(hw);
3634 }
3635
3636 static int b43legacy_wireless_init(struct ssb_device *dev)
3637 {
3638 struct ssb_sprom *sprom = &dev->bus->sprom;
3639 struct ieee80211_hw *hw;
3640 struct b43legacy_wl *wl;
3641 int err = -ENOMEM;
3642
3643 b43legacy_sprom_fixup(dev->bus);
3644
3645 hw = ieee80211_alloc_hw(sizeof(*wl), &b43legacy_hw_ops);
3646 if (!hw) {
3647 b43legacyerr(NULL, "Could not allocate ieee80211 device\n");
3648 goto out;
3649 }
3650
3651 /* fill hw info */
3652 hw->flags = IEEE80211_HW_HOST_GEN_BEACON_TEMPLATE |
3653 IEEE80211_HW_RX_INCLUDES_FCS;
3654 hw->max_signal = 100;
3655 hw->max_rssi = -110;
3656 hw->max_noise = -110;
3657 hw->queues = 1; /* FIXME: hardware has more queues */
3658 SET_IEEE80211_DEV(hw, dev->dev);
3659 if (is_valid_ether_addr(sprom->et1mac))
3660 SET_IEEE80211_PERM_ADDR(hw, sprom->et1mac);
3661 else
3662 SET_IEEE80211_PERM_ADDR(hw, sprom->il0mac);
3663
3664 /* Get and initialize struct b43legacy_wl */
3665 wl = hw_to_b43legacy_wl(hw);
3666 memset(wl, 0, sizeof(*wl));
3667 wl->hw = hw;
3668 spin_lock_init(&wl->irq_lock);
3669 spin_lock_init(&wl->leds_lock);
3670 mutex_init(&wl->mutex);
3671 INIT_LIST_HEAD(&wl->devlist);
3672
3673 ssb_set_devtypedata(dev, wl);
3674 b43legacyinfo(wl, "Broadcom %04X WLAN found\n", dev->bus->chip_id);
3675 err = 0;
3676 out:
3677 return err;
3678 }
3679
3680 static int b43legacy_probe(struct ssb_device *dev,
3681 const struct ssb_device_id *id)
3682 {
3683 struct b43legacy_wl *wl;
3684 int err;
3685 int first = 0;
3686
3687 wl = ssb_get_devtypedata(dev);
3688 if (!wl) {
3689 /* Probing the first core - setup common struct b43legacy_wl */
3690 first = 1;
3691 err = b43legacy_wireless_init(dev);
3692 if (err)
3693 goto out;
3694 wl = ssb_get_devtypedata(dev);
3695 B43legacy_WARN_ON(!wl);
3696 }
3697 err = b43legacy_one_core_attach(dev, wl);
3698 if (err)
3699 goto err_wireless_exit;
3700
3701 if (first) {
3702 err = ieee80211_register_hw(wl->hw);
3703 if (err)
3704 goto err_one_core_detach;
3705 }
3706
3707 out:
3708 return err;
3709
3710 err_one_core_detach:
3711 b43legacy_one_core_detach(dev);
3712 err_wireless_exit:
3713 if (first)
3714 b43legacy_wireless_exit(dev, wl);
3715 return err;
3716 }
3717
3718 static void b43legacy_remove(struct ssb_device *dev)
3719 {
3720 struct b43legacy_wl *wl = ssb_get_devtypedata(dev);
3721 struct b43legacy_wldev *wldev = ssb_get_drvdata(dev);
3722
3723 B43legacy_WARN_ON(!wl);
3724 if (wl->current_dev == wldev)
3725 ieee80211_unregister_hw(wl->hw);
3726
3727 b43legacy_one_core_detach(dev);
3728
3729 if (list_empty(&wl->devlist))
3730 /* Last core on the chip unregistered.
3731 * We can destroy common struct b43legacy_wl.
3732 */
3733 b43legacy_wireless_exit(dev, wl);
3734 }
3735
3736 /* Perform a hardware reset. This can be called from any context. */
3737 void b43legacy_controller_restart(struct b43legacy_wldev *dev,
3738 const char *reason)
3739 {
3740 /* Must avoid requeueing, if we are in shutdown. */
3741 if (b43legacy_status(dev) < B43legacy_STAT_INITIALIZED)
3742 return;
3743 b43legacyinfo(dev->wl, "Controller RESET (%s) ...\n", reason);
3744 queue_work(dev->wl->hw->workqueue, &dev->restart_work);
3745 }
3746
3747 #ifdef CONFIG_PM
3748
3749 static int b43legacy_suspend(struct ssb_device *dev, pm_message_t state)
3750 {
3751 struct b43legacy_wldev *wldev = ssb_get_drvdata(dev);
3752 struct b43legacy_wl *wl = wldev->wl;
3753
3754 b43legacydbg(wl, "Suspending...\n");
3755
3756 mutex_lock(&wl->mutex);
3757 wldev->suspend_init_status = b43legacy_status(wldev);
3758 if (wldev->suspend_init_status >= B43legacy_STAT_STARTED)
3759 b43legacy_wireless_core_stop(wldev);
3760 if (wldev->suspend_init_status >= B43legacy_STAT_INITIALIZED)
3761 b43legacy_wireless_core_exit(wldev);
3762 mutex_unlock(&wl->mutex);
3763
3764 b43legacydbg(wl, "Device suspended.\n");
3765
3766 return 0;
3767 }
3768
3769 static int b43legacy_resume(struct ssb_device *dev)
3770 {
3771 struct b43legacy_wldev *wldev = ssb_get_drvdata(dev);
3772 struct b43legacy_wl *wl = wldev->wl;
3773 int err = 0;
3774
3775 b43legacydbg(wl, "Resuming...\n");
3776
3777 mutex_lock(&wl->mutex);
3778 if (wldev->suspend_init_status >= B43legacy_STAT_INITIALIZED) {
3779 err = b43legacy_wireless_core_init(wldev);
3780 if (err) {
3781 b43legacyerr(wl, "Resume failed at core init\n");
3782 goto out;
3783 }
3784 }
3785 if (wldev->suspend_init_status >= B43legacy_STAT_STARTED) {
3786 err = b43legacy_wireless_core_start(wldev);
3787 if (err) {
3788 b43legacy_wireless_core_exit(wldev);
3789 b43legacyerr(wl, "Resume failed at core start\n");
3790 goto out;
3791 }
3792 }
3793 mutex_unlock(&wl->mutex);
3794
3795 b43legacydbg(wl, "Device resumed.\n");
3796 out:
3797 return err;
3798 }
3799
3800 #else /* CONFIG_PM */
3801 # define b43legacy_suspend NULL
3802 # define b43legacy_resume NULL
3803 #endif /* CONFIG_PM */
3804
3805 static struct ssb_driver b43legacy_ssb_driver = {
3806 .name = KBUILD_MODNAME,
3807 .id_table = b43legacy_ssb_tbl,
3808 .probe = b43legacy_probe,
3809 .remove = b43legacy_remove,
3810 .suspend = b43legacy_suspend,
3811 .resume = b43legacy_resume,
3812 };
3813
3814 static void b43legacy_print_driverinfo(void)
3815 {
3816 const char *feat_pci = "", *feat_leds = "", *feat_rfkill = "",
3817 *feat_pio = "", *feat_dma = "";
3818
3819 #ifdef CONFIG_B43LEGACY_PCI_AUTOSELECT
3820 feat_pci = "P";
3821 #endif
3822 #ifdef CONFIG_B43LEGACY_LEDS
3823 feat_leds = "L";
3824 #endif
3825 #ifdef CONFIG_B43LEGACY_RFKILL
3826 feat_rfkill = "R";
3827 #endif
3828 #ifdef CONFIG_B43LEGACY_PIO
3829 feat_pio = "I";
3830 #endif
3831 #ifdef CONFIG_B43LEGACY_DMA
3832 feat_dma = "D";
3833 #endif
3834 printk(KERN_INFO "Broadcom 43xx-legacy driver loaded "
3835 "[ Features: %s%s%s%s%s, Firmware-ID: "
3836 B43legacy_SUPPORTED_FIRMWARE_ID " ]\n",
3837 feat_pci, feat_leds, feat_rfkill, feat_pio, feat_dma);
3838 }
3839
3840 static int __init b43legacy_init(void)
3841 {
3842 int err;
3843
3844 b43legacy_debugfs_init();
3845
3846 err = ssb_driver_register(&b43legacy_ssb_driver);
3847 if (err)
3848 goto err_dfs_exit;
3849
3850 b43legacy_print_driverinfo();
3851
3852 return err;
3853
3854 err_dfs_exit:
3855 b43legacy_debugfs_exit();
3856 return err;
3857 }
3858
3859 static void __exit b43legacy_exit(void)
3860 {
3861 ssb_driver_unregister(&b43legacy_ssb_driver);
3862 b43legacy_debugfs_exit();
3863 }
3864
3865 module_init(b43legacy_init)
3866 module_exit(b43legacy_exit)
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