2 * Copyright (c) 2010 Broadcom Corporation
4 * Permission to use, copy, modify, and/or distribute this software for any
5 * purpose with or without fee is hereby granted, provided that the above
6 * copyright notice and this permission notice appear in all copies.
8 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
9 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
10 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY
11 * SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
12 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION
13 * OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN
14 * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
20 #include <linux/skbuff.h>
26 #define SDIOD_FBR_SIZE 0x100
29 #define SDIO_FUNC_ENABLE_1 0x02
30 #define SDIO_FUNC_ENABLE_2 0x04
33 #define SDIO_FUNC_READY_1 0x02
34 #define SDIO_FUNC_READY_2 0x04
37 #define INTR_STATUS_FUNC1 0x2
38 #define INTR_STATUS_FUNC2 0x4
40 /* Maximum number of I/O funcs */
41 #define SDIOD_MAX_IOFUNCS 7
43 /* mask of register map */
44 #define REG_F0_CCCR_MASK 0xFF
45 #define REG_F1_MISC_MASK 0x1FFFF
47 /* as of sdiod rev 0, supports 3 functions */
48 #define SBSDIO_NUM_FUNCTION 3
50 /* function 0 vendor specific CCCR registers */
51 #define SDIO_CCCR_BRCM_SEPINT 0xf2
53 #define SDIO_SEPINT_MASK 0x01
54 #define SDIO_SEPINT_OE 0x02
55 #define SDIO_SEPINT_ACT_HI 0x04
57 /* function 1 miscellaneous registers */
59 /* sprom command and status */
60 #define SBSDIO_SPROM_CS 0x10000
61 /* sprom info register */
62 #define SBSDIO_SPROM_INFO 0x10001
63 /* sprom indirect access data byte 0 */
64 #define SBSDIO_SPROM_DATA_LOW 0x10002
65 /* sprom indirect access data byte 1 */
66 #define SBSDIO_SPROM_DATA_HIGH 0x10003
67 /* sprom indirect access addr byte 0 */
68 #define SBSDIO_SPROM_ADDR_LOW 0x10004
69 /* sprom indirect access addr byte 0 */
70 #define SBSDIO_SPROM_ADDR_HIGH 0x10005
71 /* xtal_pu (gpio) output */
72 #define SBSDIO_CHIP_CTRL_DATA 0x10006
73 /* xtal_pu (gpio) enable */
74 #define SBSDIO_CHIP_CTRL_EN 0x10007
75 /* rev < 7, watermark for sdio device */
76 #define SBSDIO_WATERMARK 0x10008
77 /* control busy signal generation */
78 #define SBSDIO_DEVICE_CTL 0x10009
80 /* SB Address Window Low (b15) */
81 #define SBSDIO_FUNC1_SBADDRLOW 0x1000A
82 /* SB Address Window Mid (b23:b16) */
83 #define SBSDIO_FUNC1_SBADDRMID 0x1000B
84 /* SB Address Window High (b31:b24) */
85 #define SBSDIO_FUNC1_SBADDRHIGH 0x1000C
86 /* Frame Control (frame term/abort) */
87 #define SBSDIO_FUNC1_FRAMECTRL 0x1000D
88 /* ChipClockCSR (ALP/HT ctl/status) */
89 #define SBSDIO_FUNC1_CHIPCLKCSR 0x1000E
90 /* SdioPullUp (on cmd, d0-d2) */
91 #define SBSDIO_FUNC1_SDIOPULLUP 0x1000F
92 /* Write Frame Byte Count Low */
93 #define SBSDIO_FUNC1_WFRAMEBCLO 0x10019
94 /* Write Frame Byte Count High */
95 #define SBSDIO_FUNC1_WFRAMEBCHI 0x1001A
96 /* Read Frame Byte Count Low */
97 #define SBSDIO_FUNC1_RFRAMEBCLO 0x1001B
98 /* Read Frame Byte Count High */
99 #define SBSDIO_FUNC1_RFRAMEBCHI 0x1001C
101 #define SBSDIO_FUNC1_MISC_REG_START 0x10000 /* f1 misc register start */
102 #define SBSDIO_FUNC1_MISC_REG_LIMIT 0x1001C /* f1 misc register end */
104 /* function 1 OCP space */
106 /* sb offset addr is <= 15 bits, 32k */
107 #define SBSDIO_SB_OFT_ADDR_MASK 0x07FFF
108 #define SBSDIO_SB_OFT_ADDR_LIMIT 0x08000
109 /* with b15, maps to 32-bit SB access */
110 #define SBSDIO_SB_ACCESS_2_4B_FLAG 0x08000
112 /* valid bits in SBSDIO_FUNC1_SBADDRxxx regs */
114 #define SBSDIO_SBADDRLOW_MASK 0x80 /* Valid bits in SBADDRLOW */
115 #define SBSDIO_SBADDRMID_MASK 0xff /* Valid bits in SBADDRMID */
116 #define SBSDIO_SBADDRHIGH_MASK 0xffU /* Valid bits in SBADDRHIGH */
117 /* Address bits from SBADDR regs */
118 #define SBSDIO_SBWINDOW_MASK 0xffff8000
120 #define SDIOH_READ 0 /* Read request */
121 #define SDIOH_WRITE 1 /* Write request */
123 #define SDIOH_DATA_FIX 0 /* Fixed addressing */
124 #define SDIOH_DATA_INC 1 /* Incremental addressing */
126 /* internal return code */
130 /* Packet alignment for most efficient SDIO (can change based on platform) */
131 #define BRCMF_SDALIGN (1 << 6)
133 /* watchdog polling interval in ms */
134 #define BRCMF_WD_POLL_MS 10
144 struct brcmf_sdio_dev
{
145 struct sdio_func
*func
[SDIO_MAX_FUNCS
];
146 u8 num_funcs
; /* Supported funcs on client */
147 u32 func_cis_ptr
[SDIOD_MAX_IOFUNCS
];
148 u32 sbwad
; /* Save backplane window address */
149 bool regfail
; /* status of last reg_r/w call */
151 atomic_t suspend
; /* suspend flag */
152 wait_queue_head_t request_byte_wait
;
153 wait_queue_head_t request_word_wait
;
154 wait_queue_head_t request_chain_wait
;
155 wait_queue_head_t request_buffer_wait
;
157 struct brcmf_bus
*bus_if
;
158 #ifdef CONFIG_BRCMFMAC_SDIO_OOB
159 unsigned int irq
; /* oob interrupt number */
160 unsigned long irq_flags
; /* board specific oob flags */
161 bool irq_en
; /* irq enable flags */
162 spinlock_t irq_en_lock
;
163 bool irq_wake
; /* irq wake enable flags */
164 #endif /* CONFIG_BRCMFMAC_SDIO_OOB */
167 /* Register/deregister interrupt handler. */
168 extern int brcmf_sdio_intr_register(struct brcmf_sdio_dev
*sdiodev
);
169 extern int brcmf_sdio_intr_unregister(struct brcmf_sdio_dev
*sdiodev
);
171 /* Synchronous access to device (client) core registers via CMD53 to F1.
172 * addr: backplane address (i.e. >= regsva from attach)
173 * size: register width in bytes (2 or 4)
174 * data: data for register write
177 brcmf_sdcard_reg_write(struct brcmf_sdio_dev
*sdiodev
, u32 addr
, u32 data
);
179 /* sdio device register access interface */
180 extern u8
brcmf_sdio_regrb(struct brcmf_sdio_dev
*sdiodev
, u32 addr
, int *ret
);
181 extern u32
brcmf_sdio_regrl(struct brcmf_sdio_dev
*sdiodev
, u32 addr
, int *ret
);
182 extern void brcmf_sdio_regwb(struct brcmf_sdio_dev
*sdiodev
, u32 addr
,
184 extern void brcmf_sdio_regwl(struct brcmf_sdio_dev
*sdiodev
, u32 addr
,
187 /* Indicate if last reg read/write failed */
188 extern bool brcmf_sdcard_regfail(struct brcmf_sdio_dev
*sdiodev
);
190 /* Buffer transfer to/from device (client) core via cmd53.
191 * fn: function number
192 * addr: backplane address (i.e. >= regsva from attach)
193 * flags: backplane width, address increment, sync/async
194 * buf: pointer to memory data buffer
195 * nbytes: number of bytes to transfer to/from buf
196 * pkt: pointer to packet associated with buf (if any)
197 * complete: callback function for command completion (async only)
198 * handle: handle for completion callback (first arg in callback)
199 * Returns 0 or error code.
200 * NOTE: Async operation is not currently supported.
203 brcmf_sdcard_send_pkt(struct brcmf_sdio_dev
*sdiodev
, u32 addr
, uint fn
,
204 uint flags
, struct sk_buff
*pkt
);
206 brcmf_sdcard_send_buf(struct brcmf_sdio_dev
*sdiodev
, u32 addr
, uint fn
,
207 uint flags
, u8
*buf
, uint nbytes
);
210 brcmf_sdcard_recv_pkt(struct brcmf_sdio_dev
*sdiodev
, u32 addr
, uint fn
,
211 uint flags
, struct sk_buff
*pkt
);
213 brcmf_sdcard_recv_buf(struct brcmf_sdio_dev
*sdiodev
, u32 addr
, uint fn
,
214 uint flags
, u8
*buf
, uint nbytes
);
216 brcmf_sdcard_recv_chain(struct brcmf_sdio_dev
*sdiodev
, u32 addr
, uint fn
,
217 uint flags
, struct sk_buff_head
*pktq
);
221 /* Four-byte target (backplane) width (vs. two-byte) */
222 #define SDIO_REQ_4BYTE 0x1
223 /* Fixed address (FIFO) (vs. incrementing address) */
224 #define SDIO_REQ_FIXED 0x2
225 /* Async request (vs. sync request) */
226 #define SDIO_REQ_ASYNC 0x4
228 /* Read/write to memory block (F1, no FIFO) via CMD53 (sync only).
229 * rw: read or write (0/1)
230 * addr: direct SDIO address
231 * buf: pointer to memory data buffer
232 * nbytes: number of bytes to transfer to/from buf
233 * Returns 0 or error code.
235 extern int brcmf_sdcard_rwdata(struct brcmf_sdio_dev
*sdiodev
, uint rw
,
236 u32 addr
, u8
*buf
, uint nbytes
);
238 /* Issue an abort to the specified function */
239 extern int brcmf_sdcard_abort(struct brcmf_sdio_dev
*sdiodev
, uint fn
);
241 /* platform specific/high level functions */
242 extern int brcmf_sdio_probe(struct brcmf_sdio_dev
*sdiodev
);
243 extern int brcmf_sdio_remove(struct brcmf_sdio_dev
*sdiodev
);
245 extern int brcmf_sdcard_set_sbaddr_window(struct brcmf_sdio_dev
*sdiodev
,
248 /* attach, return handler on success, NULL if failed.
249 * The handler shall be provided by all subsequent calls. No local cache
250 * cfghdl points to the starting address of pci device mapped memory
252 extern int brcmf_sdioh_attach(struct brcmf_sdio_dev
*sdiodev
);
253 extern void brcmf_sdioh_detach(struct brcmf_sdio_dev
*sdiodev
);
255 /* read or write one byte using cmd52 */
256 extern int brcmf_sdioh_request_byte(struct brcmf_sdio_dev
*sdiodev
, uint rw
,
257 uint fnc
, uint addr
, u8
*byte
);
259 /* read or write 2/4 bytes using cmd53 */
261 brcmf_sdioh_request_word(struct brcmf_sdio_dev
*sdiodev
,
262 uint rw
, uint fnc
, uint addr
,
263 u32
*word
, uint nbyte
);
265 /* read or write any buffer using cmd53 */
267 brcmf_sdioh_request_buffer(struct brcmf_sdio_dev
*sdiodev
,
268 uint fix_inc
, uint rw
, uint fnc_num
, u32 addr
,
269 struct sk_buff
*pkt
);
271 brcmf_sdioh_request_chain(struct brcmf_sdio_dev
*sdiodev
, uint fix_inc
,
272 uint write
, uint func
, uint addr
,
273 struct sk_buff_head
*pktq
);
275 /* Watchdog timer interface for pm ops */
276 extern void brcmf_sdio_wdtmr_enable(struct brcmf_sdio_dev
*sdiodev
,
279 extern void *brcmf_sdbrcm_probe(u32 regsva
, struct brcmf_sdio_dev
*sdiodev
);
280 extern void brcmf_sdbrcm_disconnect(void *ptr
);
281 extern void brcmf_sdbrcm_isr(void *arg
);
283 extern void brcmf_sdbrcm_wd_timer(struct brcmf_sdio
*bus
, uint wdtick
);
284 #endif /* _BRCM_SDH_H_ */