2 * Copyright (c) 2010 Broadcom Corporation
4 * Permission to use, copy, modify, and/or distribute this software for any
5 * purpose with or without fee is hereby granted, provided that the above
6 * copyright notice and this permission notice appear in all copies.
8 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
9 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
10 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY
11 * SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
12 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION
13 * OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN
14 * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
17 #include <linux/types.h>
18 #include <linux/atomic.h>
19 #include <linux/kernel.h>
20 #include <linux/kthread.h>
21 #include <linux/printk.h>
22 #include <linux/pci_ids.h>
23 #include <linux/netdevice.h>
24 #include <linux/interrupt.h>
25 #include <linux/sched/signal.h>
26 #include <linux/mmc/sdio.h>
27 #include <linux/mmc/sdio_ids.h>
28 #include <linux/mmc/sdio_func.h>
29 #include <linux/mmc/card.h>
30 #include <linux/semaphore.h>
31 #include <linux/firmware.h>
32 #include <linux/module.h>
33 #include <linux/bcma/bcma.h>
34 #include <linux/debugfs.h>
35 #include <linux/vmalloc.h>
36 #include <asm/unaligned.h>
38 #include <brcmu_wifi.h>
39 #include <brcmu_utils.h>
40 #include <brcm_hw_ids.h>
49 #define DCMD_RESP_TIMEOUT msecs_to_jiffies(2500)
50 #define CTL_DONE_TIMEOUT msecs_to_jiffies(2500)
54 #define BRCMF_TRAP_INFO_SIZE 80
56 #define CBUF_LEN (128)
58 /* Device console log buffer state */
59 #define CONSOLE_BUFFER_MAX 2024
62 __le32 buf
; /* Can't be pointer on (64-bit) hosts */
65 char *_buf_compat
; /* Redundant pointer for backward compat. */
70 * When there is no UART (e.g. Quickturn),
71 * the host should write a complete
72 * input line directly into cbuf and then write
73 * the length into vcons_in.
74 * This may also be used when there is a real UART
75 * (at risk of conflicting with
76 * the real UART). vcons_out is currently unused.
81 /* Output (logging) buffer
82 * Console output is written to a ring buffer log_buf at index log_idx.
83 * The host may read the output when it sees log_idx advance.
84 * Output will be lost if the output wraps around faster than the host
87 struct rte_log_le log_le
;
89 /* Console input line buffer
90 * Characters are read one at a time into cbuf
91 * until <CR> is received, then
92 * the buffer is processed as a command line.
93 * Also used for virtual UART.
100 #include <chipcommon.h>
104 #include "tracepoint.h"
106 #define TXQLEN 2048 /* bulk tx queue length */
107 #define TXHI (TXQLEN - 256) /* turn on flow control above TXHI */
108 #define TXLOW (TXHI - 256) /* turn off flow control below TXLOW */
111 #define TXRETRIES 2 /* # of retries for tx frames */
113 #define BRCMF_RXBOUND 50 /* Default for max rx frames in
116 #define BRCMF_TXBOUND 20 /* Default for max tx frames in
119 #define BRCMF_TXMINMAX 1 /* Max tx frames if rx still pending */
121 #define MEMBLOCK 2048 /* Block size used for downloading
123 #define MAX_DATA_BUF (32 * 1024) /* Must be large enough to hold
124 biggest possible glom */
126 #define BRCMF_FIRSTREAD (1 << 6)
128 #define BRCMF_CONSOLE 10 /* watchdog interval to poll console */
130 /* SBSDIO_DEVICE_CTL */
132 /* 1: device will assert busy signal when receiving CMD53 */
133 #define SBSDIO_DEVCTL_SETBUSY 0x01
134 /* 1: assertion of sdio interrupt is synchronous to the sdio clock */
135 #define SBSDIO_DEVCTL_SPI_INTR_SYNC 0x02
136 /* 1: mask all interrupts to host except the chipActive (rev 8) */
137 #define SBSDIO_DEVCTL_CA_INT_ONLY 0x04
138 /* 1: isolate internal sdio signals, put external pads in tri-state; requires
139 * sdio bus power cycle to clear (rev 9) */
140 #define SBSDIO_DEVCTL_PADS_ISO 0x08
141 /* Force SD->SB reset mapping (rev 11) */
142 #define SBSDIO_DEVCTL_SB_RST_CTL 0x30
143 /* Determined by CoreControl bit */
144 #define SBSDIO_DEVCTL_RST_CORECTL 0x00
145 /* Force backplane reset */
146 #define SBSDIO_DEVCTL_RST_BPRESET 0x10
147 /* Force no backplane reset */
148 #define SBSDIO_DEVCTL_RST_NOBPRESET 0x20
150 /* direct(mapped) cis space */
152 /* MAPPED common CIS address */
153 #define SBSDIO_CIS_BASE_COMMON 0x1000
154 /* maximum bytes in one CIS */
155 #define SBSDIO_CIS_SIZE_LIMIT 0x200
156 /* cis offset addr is < 17 bits */
157 #define SBSDIO_CIS_OFT_ADDR_MASK 0x1FFFF
159 /* manfid tuple length, include tuple, link bytes */
160 #define SBSDIO_CIS_MANFID_TUPLE_LEN 6
162 #define CORE_BUS_REG(base, field) \
163 (base + offsetof(struct sdpcmd_regs, field))
165 /* SDIO function 1 register CHIPCLKCSR */
166 /* Force ALP request to backplane */
167 #define SBSDIO_FORCE_ALP 0x01
168 /* Force HT request to backplane */
169 #define SBSDIO_FORCE_HT 0x02
170 /* Force ILP request to backplane */
171 #define SBSDIO_FORCE_ILP 0x04
172 /* Make ALP ready (power up xtal) */
173 #define SBSDIO_ALP_AVAIL_REQ 0x08
174 /* Make HT ready (power up PLL) */
175 #define SBSDIO_HT_AVAIL_REQ 0x10
176 /* Squelch clock requests from HW */
177 #define SBSDIO_FORCE_HW_CLKREQ_OFF 0x20
178 /* Status: ALP is ready */
179 #define SBSDIO_ALP_AVAIL 0x40
180 /* Status: HT is ready */
181 #define SBSDIO_HT_AVAIL 0x80
182 #define SBSDIO_CSR_MASK 0x1F
183 #define SBSDIO_AVBITS (SBSDIO_HT_AVAIL | SBSDIO_ALP_AVAIL)
184 #define SBSDIO_ALPAV(regval) ((regval) & SBSDIO_AVBITS)
185 #define SBSDIO_HTAV(regval) (((regval) & SBSDIO_AVBITS) == SBSDIO_AVBITS)
186 #define SBSDIO_ALPONLY(regval) (SBSDIO_ALPAV(regval) && !SBSDIO_HTAV(regval))
187 #define SBSDIO_CLKAV(regval, alponly) \
188 (SBSDIO_ALPAV(regval) && (alponly ? 1 : SBSDIO_HTAV(regval)))
191 #define I_SMB_SW0 (1 << 0) /* To SB Mail S/W interrupt 0 */
192 #define I_SMB_SW1 (1 << 1) /* To SB Mail S/W interrupt 1 */
193 #define I_SMB_SW2 (1 << 2) /* To SB Mail S/W interrupt 2 */
194 #define I_SMB_SW3 (1 << 3) /* To SB Mail S/W interrupt 3 */
195 #define I_SMB_SW_MASK 0x0000000f /* To SB Mail S/W interrupts mask */
196 #define I_SMB_SW_SHIFT 0 /* To SB Mail S/W interrupts shift */
197 #define I_HMB_SW0 (1 << 4) /* To Host Mail S/W interrupt 0 */
198 #define I_HMB_SW1 (1 << 5) /* To Host Mail S/W interrupt 1 */
199 #define I_HMB_SW2 (1 << 6) /* To Host Mail S/W interrupt 2 */
200 #define I_HMB_SW3 (1 << 7) /* To Host Mail S/W interrupt 3 */
201 #define I_HMB_SW_MASK 0x000000f0 /* To Host Mail S/W interrupts mask */
202 #define I_HMB_SW_SHIFT 4 /* To Host Mail S/W interrupts shift */
203 #define I_WR_OOSYNC (1 << 8) /* Write Frame Out Of Sync */
204 #define I_RD_OOSYNC (1 << 9) /* Read Frame Out Of Sync */
205 #define I_PC (1 << 10) /* descriptor error */
206 #define I_PD (1 << 11) /* data error */
207 #define I_DE (1 << 12) /* Descriptor protocol Error */
208 #define I_RU (1 << 13) /* Receive descriptor Underflow */
209 #define I_RO (1 << 14) /* Receive fifo Overflow */
210 #define I_XU (1 << 15) /* Transmit fifo Underflow */
211 #define I_RI (1 << 16) /* Receive Interrupt */
212 #define I_BUSPWR (1 << 17) /* SDIO Bus Power Change (rev 9) */
213 #define I_XMTDATA_AVAIL (1 << 23) /* bits in fifo */
214 #define I_XI (1 << 24) /* Transmit Interrupt */
215 #define I_RF_TERM (1 << 25) /* Read Frame Terminate */
216 #define I_WF_TERM (1 << 26) /* Write Frame Terminate */
217 #define I_PCMCIA_XU (1 << 27) /* PCMCIA Transmit FIFO Underflow */
218 #define I_SBINT (1 << 28) /* sbintstatus Interrupt */
219 #define I_CHIPACTIVE (1 << 29) /* chip from doze to active state */
220 #define I_SRESET (1 << 30) /* CCCR RES interrupt */
221 #define I_IOE2 (1U << 31) /* CCCR IOE2 Bit Changed */
222 #define I_ERRORS (I_PC | I_PD | I_DE | I_RU | I_RO | I_XU)
223 #define I_DMA (I_RI | I_XI | I_ERRORS)
226 #define CC_CISRDY (1 << 0) /* CIS Ready */
227 #define CC_BPRESEN (1 << 1) /* CCCR RES signal */
228 #define CC_F2RDY (1 << 2) /* set CCCR IOR2 bit */
229 #define CC_CLRPADSISO (1 << 3) /* clear SDIO pads isolation */
230 #define CC_XMTDATAAVAIL_MODE (1 << 4)
231 #define CC_XMTDATAAVAIL_CTRL (1 << 5)
234 #define SFC_RF_TERM (1 << 0) /* Read Frame Terminate */
235 #define SFC_WF_TERM (1 << 1) /* Write Frame Terminate */
236 #define SFC_CRC4WOOS (1 << 2) /* CRC error for write out of sync */
237 #define SFC_ABORTALL (1 << 3) /* Abort all in-progress frames */
240 * Software allocation of To SB Mailbox resources
243 /* tosbmailbox bits corresponding to intstatus bits */
244 #define SMB_NAK (1 << 0) /* Frame NAK */
245 #define SMB_INT_ACK (1 << 1) /* Host Interrupt ACK */
246 #define SMB_USE_OOB (1 << 2) /* Use OOB Wakeup */
247 #define SMB_DEV_INT (1 << 3) /* Miscellaneous Interrupt */
249 /* tosbmailboxdata */
250 #define SMB_DATA_VERSION_SHIFT 16 /* host protocol version */
253 * Software allocation of To Host Mailbox resources
257 #define I_HMB_FC_STATE I_HMB_SW0 /* Flow Control State */
258 #define I_HMB_FC_CHANGE I_HMB_SW1 /* Flow Control State Changed */
259 #define I_HMB_FRAME_IND I_HMB_SW2 /* Frame Indication */
260 #define I_HMB_HOST_INT I_HMB_SW3 /* Miscellaneous Interrupt */
262 /* tohostmailboxdata */
263 #define HMB_DATA_NAKHANDLED 1 /* retransmit NAK'd frame */
264 #define HMB_DATA_DEVREADY 2 /* talk to host after enable */
265 #define HMB_DATA_FC 4 /* per prio flowcontrol update flag */
266 #define HMB_DATA_FWREADY 8 /* fw ready for protocol activity */
268 #define HMB_DATA_FCDATA_MASK 0xff000000
269 #define HMB_DATA_FCDATA_SHIFT 24
271 #define HMB_DATA_VERSION_MASK 0x00ff0000
272 #define HMB_DATA_VERSION_SHIFT 16
275 * Software-defined protocol header
278 /* Current protocol version */
279 #define SDPCM_PROT_VERSION 4
282 * Shared structure between dongle and the host.
283 * The structure contains pointers to trap or assert information.
285 #define SDPCM_SHARED_VERSION 0x0003
286 #define SDPCM_SHARED_VERSION_MASK 0x00FF
287 #define SDPCM_SHARED_ASSERT_BUILT 0x0100
288 #define SDPCM_SHARED_ASSERT 0x0200
289 #define SDPCM_SHARED_TRAP 0x0400
291 /* Space for header read, limit for data packets */
292 #define MAX_HDR_READ (1 << 6)
293 #define MAX_RX_DATASZ 2048
295 /* Bump up limit on waiting for HT to account for first startup;
296 * if the image is doing a CRC calculation before programming the PMU
297 * for HT availability, it could take a couple hundred ms more, so
298 * max out at a 1 second (1000000us).
300 #undef PMU_MAX_TRANSITION_DLY
301 #define PMU_MAX_TRANSITION_DLY 1000000
303 /* Value for ChipClockCSR during initial setup */
304 #define BRCMF_INIT_CLKCTL1 (SBSDIO_FORCE_HW_CLKREQ_OFF | \
305 SBSDIO_ALP_AVAIL_REQ)
307 /* Flags for SDH calls */
308 #define F2SYNC (SDIO_REQ_4BYTE | SDIO_REQ_FIXED)
310 #define BRCMF_IDLE_ACTIVE 0 /* Do not request any SD clock change
313 #define BRCMF_IDLE_INTERVAL 1
315 #define KSO_WAIT_US 50
316 #define MAX_KSO_ATTEMPTS (PMU_MAX_TRANSITION_DLY/KSO_WAIT_US)
317 #define BRCMF_SDIO_MAX_ACCESS_ERRORS 5
320 * Conversion of 802.1D priority to precedence level
322 static uint
prio2prec(u32 prio
)
324 return (prio
== PRIO_8021D_NONE
|| prio
== PRIO_8021D_BE
) ?
329 /* Device console log buffer state */
330 struct brcmf_console
{
331 uint count
; /* Poll interval msec counter */
332 uint log_addr
; /* Log struct address (fixed) */
333 struct rte_log_le log_le
; /* Log struct (host copy) */
334 uint bufsize
; /* Size of log buffer */
335 u8
*buf
; /* Log buffer (host copy) */
336 uint last
; /* Last buffer read index */
339 struct brcmf_trap_info
{
353 __le32 r9
; /* sb/v6 */
354 __le32 r10
; /* sl/v7 */
355 __le32 r11
; /* fp/v8 */
363 struct sdpcm_shared
{
367 u32 assert_file_addr
;
369 u32 console_addr
; /* Address of struct rte_console */
375 struct sdpcm_shared_le
{
378 __le32 assert_exp_addr
;
379 __le32 assert_file_addr
;
381 __le32 console_addr
; /* Address of struct rte_console */
382 __le32 msgtrace_addr
;
387 /* dongle SDIO bus specific header info */
388 struct brcmf_sdio_hdrinfo
{
400 * hold counter variables
402 struct brcmf_sdio_count
{
403 uint intrcount
; /* Count of device interrupt callbacks */
404 uint lastintrs
; /* Count as of last watchdog timer */
405 uint pollcnt
; /* Count of active polls */
406 uint regfails
; /* Count of R_REG failures */
407 uint tx_sderrs
; /* Count of tx attempts with sd errors */
408 uint fcqueued
; /* Tx packets that got queued */
409 uint rxrtx
; /* Count of rtx requests (NAK to dongle) */
410 uint rx_toolong
; /* Receive frames too long to receive */
411 uint rxc_errors
; /* SDIO errors when reading control frames */
412 uint rx_hdrfail
; /* SDIO errors on header reads */
413 uint rx_badhdr
; /* Bad received headers (roosync?) */
414 uint rx_badseq
; /* Mismatched rx sequence number */
415 uint fc_rcvd
; /* Number of flow-control events received */
416 uint fc_xoff
; /* Number which turned on flow-control */
417 uint fc_xon
; /* Number which turned off flow-control */
418 uint rxglomfail
; /* Failed deglom attempts */
419 uint rxglomframes
; /* Number of glom frames (superframes) */
420 uint rxglompkts
; /* Number of packets from glom frames */
421 uint f2rxhdrs
; /* Number of header reads */
422 uint f2rxdata
; /* Number of frame data reads */
423 uint f2txdata
; /* Number of f2 frame writes */
424 uint f1regdata
; /* Number of f1 register accesses */
425 uint tickcnt
; /* Number of watchdog been schedule */
426 ulong tx_ctlerrs
; /* Err of sending ctrl frames */
427 ulong tx_ctlpkts
; /* Ctrl frames sent to dongle */
428 ulong rx_ctlerrs
; /* Err of processing rx ctrl frames */
429 ulong rx_ctlpkts
; /* Ctrl frames processed from dongle */
430 ulong rx_readahead_cnt
; /* packets where header read-ahead was used */
433 /* misc chip info needed by some of the routines */
434 /* Private data for SDIO bus interaction */
436 struct brcmf_sdio_dev
*sdiodev
; /* sdio device handler */
437 struct brcmf_chip
*ci
; /* Chip info struct */
439 u32 hostintmask
; /* Copy of Host Interrupt Mask */
440 atomic_t intstatus
; /* Intstatus bits (events) pending */
441 atomic_t fcstate
; /* State of dongle flow-control */
443 uint blocksize
; /* Block size of SDIO transfers */
444 uint roundup
; /* Max roundup limit */
446 struct pktq txq
; /* Queue length used for flow-control */
447 u8 flowcontrol
; /* per prio flow control bitmask */
448 u8 tx_seq
; /* Transmit sequence number (next) */
449 u8 tx_max
; /* Maximum transmit sequence allowed */
451 u8
*hdrbuf
; /* buffer for handling rx frame */
452 u8
*rxhdr
; /* Header of current rx frame (in hdrbuf) */
453 u8 rx_seq
; /* Receive sequence number (expected) */
454 struct brcmf_sdio_hdrinfo cur_read
;
455 /* info of current read frame */
456 bool rxskip
; /* Skip receive (awaiting NAK ACK) */
457 bool rxpending
; /* Data frame pending in dongle */
459 uint rxbound
; /* Rx frames to read before resched */
460 uint txbound
; /* Tx frames to send before resched */
463 struct sk_buff
*glomd
; /* Packet containing glomming descriptor */
464 struct sk_buff_head glom
; /* Packet list for glommed superframe */
466 u8
*rxbuf
; /* Buffer for receiving control packets */
467 uint rxblen
; /* Allocated length of rxbuf */
468 u8
*rxctl
; /* Aligned pointer into rxbuf */
469 u8
*rxctl_orig
; /* pointer for freeing rxctl */
470 uint rxlen
; /* Length of valid data in buffer */
471 spinlock_t rxctl_lock
; /* protection lock for ctrl frame resources */
473 u8 sdpcm_ver
; /* Bus protocol reported by dongle */
475 bool intr
; /* Use interrupts */
476 bool poll
; /* Use polling */
477 atomic_t ipend
; /* Device interrupt is pending */
478 uint spurious
; /* Count of spurious interrupts */
479 uint pollrate
; /* Ticks between device polls */
480 uint polltick
; /* Tick counter */
483 uint console_interval
;
484 struct brcmf_console console
; /* Console output polling support */
485 uint console_addr
; /* Console address from shared struct */
488 uint clkstate
; /* State of sd and backplane clock(s) */
489 s32 idletime
; /* Control for activity timeout */
490 s32 idlecount
; /* Activity timeout counter */
491 s32 idleclock
; /* How to set bus driver when idle */
492 bool rxflow_mode
; /* Rx flow control mode */
493 bool rxflow
; /* Is rx flow control on */
494 bool alp_only
; /* Don't use HT clock (ALP only) */
498 bool ctrl_frame_stat
;
501 spinlock_t txq_lock
; /* protect bus->txq */
502 wait_queue_head_t ctrl_wait
;
503 wait_queue_head_t dcmd_resp_wait
;
505 struct timer_list timer
;
506 struct completion watchdog_wait
;
507 struct task_struct
*watchdog_tsk
;
510 struct workqueue_struct
*brcmf_wq
;
511 struct work_struct datawork
;
515 bool txoff
; /* Transmit flow-controlled */
516 struct brcmf_sdio_count sdcnt
;
517 bool sr_enabled
; /* SaveRestore enabled */
520 u8 tx_hdrlen
; /* sdio bus header length for tx packet */
521 bool txglom
; /* host tx glomming enable flag */
522 u16 head_align
; /* buffer pointer alignment */
523 u16 sgentry_align
; /* scatter-gather buffer alignment */
529 #define CLK_PENDING 2
533 static int qcount
[NUMPRIO
];
536 #define DEFAULT_SDIO_DRIVE_STRENGTH 6 /* in milliamps */
538 #define RETRYCHAN(chan) ((chan) == SDPCM_EVENT_CHANNEL)
540 /* Limit on rounding up frames */
541 static const uint max_roundup
= 512;
543 #ifdef CONFIG_ARCH_DMA_ADDR_T_64BIT
549 enum brcmf_sdio_frmtype
{
550 BRCMF_SDIO_FT_NORMAL
,
555 #define SDIOD_DRVSTR_KEY(chip, pmu) (((chip) << 16) | (pmu))
557 /* SDIO Pad drive strength to select value mappings */
558 struct sdiod_drive_str
{
559 u8 strength
; /* Pad Drive Strength in mA */
560 u8 sel
; /* Chip-specific select value */
563 /* SDIO Drive Strength to sel value table for PMU Rev 11 (1.8V) */
564 static const struct sdiod_drive_str sdiod_drvstr_tab1_1v8
[] = {
575 /* SDIO Drive Strength to sel value table for PMU Rev 13 (1.8v) */
576 static const struct sdiod_drive_str sdiod_drive_strength_tab5_1v8
[] = {
586 /* SDIO Drive Strength to sel value table for PMU Rev 17 (1.8v) */
587 static const struct sdiod_drive_str sdiod_drvstr_tab6_1v8
[] = {
593 /* SDIO Drive Strength to sel value table for 43143 PMU Rev 17 (3.3V) */
594 static const struct sdiod_drive_str sdiod_drvstr_tab2_3v3
[] = {
601 BRCMF_FW_NVRAM_DEF(43143, "brcmfmac43143-sdio.bin", "brcmfmac43143-sdio.txt");
602 BRCMF_FW_NVRAM_DEF(43241B0
, "brcmfmac43241b0-sdio.bin",
603 "brcmfmac43241b0-sdio.txt");
604 BRCMF_FW_NVRAM_DEF(43241B4
, "brcmfmac43241b4-sdio.bin",
605 "brcmfmac43241b4-sdio.txt");
606 BRCMF_FW_NVRAM_DEF(43241B5
, "brcmfmac43241b5-sdio.bin",
607 "brcmfmac43241b5-sdio.txt");
608 BRCMF_FW_NVRAM_DEF(4329, "brcmfmac4329-sdio.bin", "brcmfmac4329-sdio.txt");
609 BRCMF_FW_NVRAM_DEF(4330, "brcmfmac4330-sdio.bin", "brcmfmac4330-sdio.txt");
610 BRCMF_FW_NVRAM_DEF(4334, "brcmfmac4334-sdio.bin", "brcmfmac4334-sdio.txt");
611 BRCMF_FW_NVRAM_DEF(43340, "brcmfmac43340-sdio.bin", "brcmfmac43340-sdio.txt");
612 BRCMF_FW_NVRAM_DEF(4335, "brcmfmac4335-sdio.bin", "brcmfmac4335-sdio.txt");
613 BRCMF_FW_NVRAM_DEF(43362, "brcmfmac43362-sdio.bin", "brcmfmac43362-sdio.txt");
614 BRCMF_FW_NVRAM_DEF(4339, "brcmfmac4339-sdio.bin", "brcmfmac4339-sdio.txt");
615 BRCMF_FW_NVRAM_DEF(43430A0
, "brcmfmac43430a0-sdio.bin", "brcmfmac43430a0-sdio.txt");
616 /* Note the names are not postfixed with a1 for backward compatibility */
617 BRCMF_FW_NVRAM_DEF(43430A1
, "brcmfmac43430-sdio.bin", "brcmfmac43430-sdio.txt");
618 BRCMF_FW_NVRAM_DEF(43455, "brcmfmac43455-sdio.bin", "brcmfmac43455-sdio.txt");
619 BRCMF_FW_NVRAM_DEF(4354, "brcmfmac4354-sdio.bin", "brcmfmac4354-sdio.txt");
620 BRCMF_FW_NVRAM_DEF(4356, "brcmfmac4356-sdio.bin", "brcmfmac4356-sdio.txt");
621 BRCMF_FW_NVRAM_DEF(4373, "brcmfmac4373-sdio.bin", "brcmfmac4373-sdio.txt");
623 static struct brcmf_firmware_mapping brcmf_sdio_fwnames
[] = {
624 BRCMF_FW_NVRAM_ENTRY(BRCM_CC_43143_CHIP_ID
, 0xFFFFFFFF, 43143),
625 BRCMF_FW_NVRAM_ENTRY(BRCM_CC_43241_CHIP_ID
, 0x0000001F, 43241B0
),
626 BRCMF_FW_NVRAM_ENTRY(BRCM_CC_43241_CHIP_ID
, 0x00000020, 43241B4
),
627 BRCMF_FW_NVRAM_ENTRY(BRCM_CC_43241_CHIP_ID
, 0xFFFFFFC0, 43241B5
),
628 BRCMF_FW_NVRAM_ENTRY(BRCM_CC_4329_CHIP_ID
, 0xFFFFFFFF, 4329),
629 BRCMF_FW_NVRAM_ENTRY(BRCM_CC_4330_CHIP_ID
, 0xFFFFFFFF, 4330),
630 BRCMF_FW_NVRAM_ENTRY(BRCM_CC_4334_CHIP_ID
, 0xFFFFFFFF, 4334),
631 BRCMF_FW_NVRAM_ENTRY(BRCM_CC_43340_CHIP_ID
, 0xFFFFFFFF, 43340),
632 BRCMF_FW_NVRAM_ENTRY(BRCM_CC_43341_CHIP_ID
, 0xFFFFFFFF, 43340),
633 BRCMF_FW_NVRAM_ENTRY(BRCM_CC_4335_CHIP_ID
, 0xFFFFFFFF, 4335),
634 BRCMF_FW_NVRAM_ENTRY(BRCM_CC_43362_CHIP_ID
, 0xFFFFFFFE, 43362),
635 BRCMF_FW_NVRAM_ENTRY(BRCM_CC_4339_CHIP_ID
, 0xFFFFFFFF, 4339),
636 BRCMF_FW_NVRAM_ENTRY(BRCM_CC_43430_CHIP_ID
, 0x00000001, 43430A0
),
637 BRCMF_FW_NVRAM_ENTRY(BRCM_CC_43430_CHIP_ID
, 0xFFFFFFFE, 43430A1
),
638 BRCMF_FW_NVRAM_ENTRY(BRCM_CC_4345_CHIP_ID
, 0xFFFFFFC0, 43455),
639 BRCMF_FW_NVRAM_ENTRY(BRCM_CC_4354_CHIP_ID
, 0xFFFFFFFF, 4354),
640 BRCMF_FW_NVRAM_ENTRY(BRCM_CC_4356_CHIP_ID
, 0xFFFFFFFF, 4356),
641 BRCMF_FW_NVRAM_ENTRY(CY_CC_4373_CHIP_ID
, 0xFFFFFFFF, 4373)
644 static void pkt_align(struct sk_buff
*p
, int len
, int align
)
647 datalign
= (unsigned long)(p
->data
);
648 datalign
= roundup(datalign
, (align
)) - datalign
;
650 skb_pull(p
, datalign
);
654 /* To check if there's window offered */
655 static bool data_ok(struct brcmf_sdio
*bus
)
657 return (u8
)(bus
->tx_max
- bus
->tx_seq
) != 0 &&
658 ((u8
)(bus
->tx_max
- bus
->tx_seq
) & 0x80) == 0;
662 * Reads a register in the SDIO hardware block. This block occupies a series of
663 * adresses on the 32 bit backplane bus.
665 static int r_sdreg32(struct brcmf_sdio
*bus
, u32
*regvar
, u32 offset
)
667 struct brcmf_core
*core
;
670 core
= brcmf_chip_get_core(bus
->ci
, BCMA_CORE_SDIO_DEV
);
671 *regvar
= brcmf_sdiod_regrl(bus
->sdiodev
, core
->base
+ offset
, &ret
);
676 static int w_sdreg32(struct brcmf_sdio
*bus
, u32 regval
, u32 reg_offset
)
678 struct brcmf_core
*core
;
681 core
= brcmf_chip_get_core(bus
->ci
, BCMA_CORE_SDIO_DEV
);
682 brcmf_sdiod_regwl(bus
->sdiodev
, core
->base
+ reg_offset
, regval
, &ret
);
688 brcmf_sdio_kso_control(struct brcmf_sdio
*bus
, bool on
)
690 u8 wr_val
= 0, rd_val
, cmp_val
, bmask
;
695 brcmf_dbg(TRACE
, "Enter: on=%d\n", on
);
697 wr_val
= (on
<< SBSDIO_FUNC1_SLEEPCSR_KSO_SHIFT
);
698 /* 1st KSO write goes to AOS wake up core if device is asleep */
699 brcmf_sdiod_regwb(bus
->sdiodev
, SBSDIO_FUNC1_SLEEPCSR
,
703 /* device WAKEUP through KSO:
704 * write bit 0 & read back until
705 * both bits 0 (kso bit) & 1 (dev on status) are set
707 cmp_val
= SBSDIO_FUNC1_SLEEPCSR_KSO_MASK
|
708 SBSDIO_FUNC1_SLEEPCSR_DEVON_MASK
;
710 usleep_range(2000, 3000);
712 /* Put device to sleep, turn off KSO */
714 /* only check for bit0, bit1(dev on status) may not
715 * get cleared right away
717 bmask
= SBSDIO_FUNC1_SLEEPCSR_KSO_MASK
;
721 /* reliable KSO bit set/clr:
722 * the sdiod sleep write access is synced to PMU 32khz clk
723 * just one write attempt may fail,
724 * read it back until it matches written value
726 rd_val
= brcmf_sdiod_regrb(bus
->sdiodev
, SBSDIO_FUNC1_SLEEPCSR
,
729 if ((rd_val
& bmask
) == cmp_val
)
733 /* bail out upon subsequent access errors */
734 if (err
&& (err_cnt
++ > BRCMF_SDIO_MAX_ACCESS_ERRORS
))
737 brcmf_sdiod_regwb(bus
->sdiodev
, SBSDIO_FUNC1_SLEEPCSR
,
739 } while (try_cnt
++ < MAX_KSO_ATTEMPTS
);
742 brcmf_dbg(SDIO
, "try_cnt=%d rd_val=0x%x err=%d\n", try_cnt
,
745 if (try_cnt
> MAX_KSO_ATTEMPTS
)
746 brcmf_err("max tries: rd_val=0x%x err=%d\n", rd_val
, err
);
751 #define HOSTINTMASK (I_HMB_SW_MASK | I_CHIPACTIVE)
753 /* Turn backplane clock on or off */
754 static int brcmf_sdio_htclk(struct brcmf_sdio
*bus
, bool on
, bool pendok
)
757 u8 clkctl
, clkreq
, devctl
;
758 unsigned long timeout
;
760 brcmf_dbg(SDIO
, "Enter\n");
764 if (bus
->sr_enabled
) {
765 bus
->clkstate
= (on
? CLK_AVAIL
: CLK_SDONLY
);
770 /* Request HT Avail */
772 bus
->alp_only
? SBSDIO_ALP_AVAIL_REQ
: SBSDIO_HT_AVAIL_REQ
;
774 brcmf_sdiod_regwb(bus
->sdiodev
, SBSDIO_FUNC1_CHIPCLKCSR
,
777 brcmf_err("HT Avail request error: %d\n", err
);
781 /* Check current status */
782 clkctl
= brcmf_sdiod_regrb(bus
->sdiodev
,
783 SBSDIO_FUNC1_CHIPCLKCSR
, &err
);
785 brcmf_err("HT Avail read error: %d\n", err
);
789 /* Go to pending and await interrupt if appropriate */
790 if (!SBSDIO_CLKAV(clkctl
, bus
->alp_only
) && pendok
) {
791 /* Allow only clock-available interrupt */
792 devctl
= brcmf_sdiod_regrb(bus
->sdiodev
,
793 SBSDIO_DEVICE_CTL
, &err
);
795 brcmf_err("Devctl error setting CA: %d\n",
800 devctl
|= SBSDIO_DEVCTL_CA_INT_ONLY
;
801 brcmf_sdiod_regwb(bus
->sdiodev
, SBSDIO_DEVICE_CTL
,
803 brcmf_dbg(SDIO
, "CLKCTL: set PENDING\n");
804 bus
->clkstate
= CLK_PENDING
;
807 } else if (bus
->clkstate
== CLK_PENDING
) {
808 /* Cancel CA-only interrupt filter */
809 devctl
= brcmf_sdiod_regrb(bus
->sdiodev
,
810 SBSDIO_DEVICE_CTL
, &err
);
811 devctl
&= ~SBSDIO_DEVCTL_CA_INT_ONLY
;
812 brcmf_sdiod_regwb(bus
->sdiodev
, SBSDIO_DEVICE_CTL
,
816 /* Otherwise, wait here (polling) for HT Avail */
818 msecs_to_jiffies(PMU_MAX_TRANSITION_DLY
/1000);
819 while (!SBSDIO_CLKAV(clkctl
, bus
->alp_only
)) {
820 clkctl
= brcmf_sdiod_regrb(bus
->sdiodev
,
821 SBSDIO_FUNC1_CHIPCLKCSR
,
823 if (time_after(jiffies
, timeout
))
826 usleep_range(5000, 10000);
829 brcmf_err("HT Avail request error: %d\n", err
);
832 if (!SBSDIO_CLKAV(clkctl
, bus
->alp_only
)) {
833 brcmf_err("HT Avail timeout (%d): clkctl 0x%02x\n",
834 PMU_MAX_TRANSITION_DLY
, clkctl
);
838 /* Mark clock available */
839 bus
->clkstate
= CLK_AVAIL
;
840 brcmf_dbg(SDIO
, "CLKCTL: turned ON\n");
843 if (!bus
->alp_only
) {
844 if (SBSDIO_ALPONLY(clkctl
))
845 brcmf_err("HT Clock should be on\n");
847 #endif /* defined (DEBUG) */
852 if (bus
->clkstate
== CLK_PENDING
) {
853 /* Cancel CA-only interrupt filter */
854 devctl
= brcmf_sdiod_regrb(bus
->sdiodev
,
855 SBSDIO_DEVICE_CTL
, &err
);
856 devctl
&= ~SBSDIO_DEVCTL_CA_INT_ONLY
;
857 brcmf_sdiod_regwb(bus
->sdiodev
, SBSDIO_DEVICE_CTL
,
861 bus
->clkstate
= CLK_SDONLY
;
862 brcmf_sdiod_regwb(bus
->sdiodev
, SBSDIO_FUNC1_CHIPCLKCSR
,
864 brcmf_dbg(SDIO
, "CLKCTL: turned OFF\n");
866 brcmf_err("Failed access turning clock off: %d\n",
874 /* Change idle/active SD state */
875 static int brcmf_sdio_sdclk(struct brcmf_sdio
*bus
, bool on
)
877 brcmf_dbg(SDIO
, "Enter\n");
880 bus
->clkstate
= CLK_SDONLY
;
882 bus
->clkstate
= CLK_NONE
;
887 /* Transition SD and backplane clock readiness */
888 static int brcmf_sdio_clkctl(struct brcmf_sdio
*bus
, uint target
, bool pendok
)
891 uint oldstate
= bus
->clkstate
;
894 brcmf_dbg(SDIO
, "Enter\n");
896 /* Early exit if we're already there */
897 if (bus
->clkstate
== target
)
902 /* Make sure SD clock is available */
903 if (bus
->clkstate
== CLK_NONE
)
904 brcmf_sdio_sdclk(bus
, true);
905 /* Now request HT Avail on the backplane */
906 brcmf_sdio_htclk(bus
, true, pendok
);
910 /* Remove HT request, or bring up SD clock */
911 if (bus
->clkstate
== CLK_NONE
)
912 brcmf_sdio_sdclk(bus
, true);
913 else if (bus
->clkstate
== CLK_AVAIL
)
914 brcmf_sdio_htclk(bus
, false, false);
916 brcmf_err("request for %d -> %d\n",
917 bus
->clkstate
, target
);
921 /* Make sure to remove HT request */
922 if (bus
->clkstate
== CLK_AVAIL
)
923 brcmf_sdio_htclk(bus
, false, false);
924 /* Now remove the SD clock */
925 brcmf_sdio_sdclk(bus
, false);
929 brcmf_dbg(SDIO
, "%d -> %d\n", oldstate
, bus
->clkstate
);
936 brcmf_sdio_bus_sleep(struct brcmf_sdio
*bus
, bool sleep
, bool pendok
)
941 brcmf_dbg(SDIO
, "Enter: request %s currently %s\n",
942 (sleep
? "SLEEP" : "WAKE"),
943 (bus
->sleeping
? "SLEEP" : "WAKE"));
945 /* If SR is enabled control bus state with KSO */
946 if (bus
->sr_enabled
) {
947 /* Done if we're already in the requested state */
948 if (sleep
== bus
->sleeping
)
953 clkcsr
= brcmf_sdiod_regrb(bus
->sdiodev
,
954 SBSDIO_FUNC1_CHIPCLKCSR
,
956 if ((clkcsr
& SBSDIO_CSR_MASK
) == 0) {
957 brcmf_dbg(SDIO
, "no clock, set ALP\n");
958 brcmf_sdiod_regwb(bus
->sdiodev
,
959 SBSDIO_FUNC1_CHIPCLKCSR
,
960 SBSDIO_ALP_AVAIL_REQ
, &err
);
962 err
= brcmf_sdio_kso_control(bus
, false);
964 err
= brcmf_sdio_kso_control(bus
, true);
967 brcmf_err("error while changing bus sleep state %d\n",
976 if (!bus
->sr_enabled
)
977 brcmf_sdio_clkctl(bus
, CLK_NONE
, pendok
);
979 brcmf_sdio_clkctl(bus
, CLK_AVAIL
, pendok
);
980 brcmf_sdio_wd_timer(bus
, true);
982 bus
->sleeping
= sleep
;
983 brcmf_dbg(SDIO
, "new state %s\n",
984 (sleep
? "SLEEP" : "WAKE"));
986 brcmf_dbg(SDIO
, "Exit: err=%d\n", err
);
992 static inline bool brcmf_sdio_valid_shared_address(u32 addr
)
994 return !(addr
== 0 || ((~addr
>> 16) & 0xffff) == (addr
& 0xffff));
997 static int brcmf_sdio_readshared(struct brcmf_sdio
*bus
,
998 struct sdpcm_shared
*sh
)
1003 struct sdpcm_shared_le sh_le
;
1006 sdio_claim_host(bus
->sdiodev
->func
[1]);
1007 brcmf_sdio_bus_sleep(bus
, false, false);
1010 * Read last word in socram to determine
1011 * address of sdpcm_shared structure
1013 shaddr
= bus
->ci
->rambase
+ bus
->ci
->ramsize
- 4;
1014 if (!bus
->ci
->rambase
&& brcmf_chip_sr_capable(bus
->ci
))
1015 shaddr
-= bus
->ci
->srsize
;
1016 rv
= brcmf_sdiod_ramrw(bus
->sdiodev
, false, shaddr
,
1022 * Check if addr is valid.
1023 * NVRAM length at the end of memory should have been overwritten.
1025 addr
= le32_to_cpu(addr_le
);
1026 if (!brcmf_sdio_valid_shared_address(addr
)) {
1027 brcmf_err("invalid sdpcm_shared address 0x%08X\n", addr
);
1032 brcmf_dbg(INFO
, "sdpcm_shared address 0x%08X\n", addr
);
1034 /* Read hndrte_shared structure */
1035 rv
= brcmf_sdiod_ramrw(bus
->sdiodev
, false, addr
, (u8
*)&sh_le
,
1036 sizeof(struct sdpcm_shared_le
));
1040 sdio_release_host(bus
->sdiodev
->func
[1]);
1043 sh
->flags
= le32_to_cpu(sh_le
.flags
);
1044 sh
->trap_addr
= le32_to_cpu(sh_le
.trap_addr
);
1045 sh
->assert_exp_addr
= le32_to_cpu(sh_le
.assert_exp_addr
);
1046 sh
->assert_file_addr
= le32_to_cpu(sh_le
.assert_file_addr
);
1047 sh
->assert_line
= le32_to_cpu(sh_le
.assert_line
);
1048 sh
->console_addr
= le32_to_cpu(sh_le
.console_addr
);
1049 sh
->msgtrace_addr
= le32_to_cpu(sh_le
.msgtrace_addr
);
1051 if ((sh
->flags
& SDPCM_SHARED_VERSION_MASK
) > SDPCM_SHARED_VERSION
) {
1052 brcmf_err("sdpcm shared version unsupported: dhd %d dongle %d\n",
1053 SDPCM_SHARED_VERSION
,
1054 sh
->flags
& SDPCM_SHARED_VERSION_MASK
);
1060 brcmf_err("unable to obtain sdpcm_shared info: rv=%d (addr=0x%x)\n",
1062 sdio_release_host(bus
->sdiodev
->func
[1]);
1066 static void brcmf_sdio_get_console_addr(struct brcmf_sdio
*bus
)
1068 struct sdpcm_shared sh
;
1070 if (brcmf_sdio_readshared(bus
, &sh
) == 0)
1071 bus
->console_addr
= sh
.console_addr
;
1074 static void brcmf_sdio_get_console_addr(struct brcmf_sdio
*bus
)
1079 static u32
brcmf_sdio_hostmail(struct brcmf_sdio
*bus
)
1086 brcmf_dbg(SDIO
, "Enter\n");
1088 /* Read mailbox data and ack that we did so */
1089 ret
= r_sdreg32(bus
, &hmb_data
,
1090 offsetof(struct sdpcmd_regs
, tohostmailboxdata
));
1093 w_sdreg32(bus
, SMB_INT_ACK
,
1094 offsetof(struct sdpcmd_regs
, tosbmailbox
));
1095 bus
->sdcnt
.f1regdata
+= 2;
1097 /* Dongle recomposed rx frames, accept them again */
1098 if (hmb_data
& HMB_DATA_NAKHANDLED
) {
1099 brcmf_dbg(SDIO
, "Dongle reports NAK handled, expect rtx of %d\n",
1102 brcmf_err("unexpected NAKHANDLED!\n");
1104 bus
->rxskip
= false;
1105 intstatus
|= I_HMB_FRAME_IND
;
1109 * DEVREADY does not occur with gSPI.
1111 if (hmb_data
& (HMB_DATA_DEVREADY
| HMB_DATA_FWREADY
)) {
1113 (hmb_data
& HMB_DATA_VERSION_MASK
) >>
1114 HMB_DATA_VERSION_SHIFT
;
1115 if (bus
->sdpcm_ver
!= SDPCM_PROT_VERSION
)
1116 brcmf_err("Version mismatch, dongle reports %d, "
1118 bus
->sdpcm_ver
, SDPCM_PROT_VERSION
);
1120 brcmf_dbg(SDIO
, "Dongle ready, protocol version %d\n",
1124 * Retrieve console state address now that firmware should have
1127 brcmf_sdio_get_console_addr(bus
);
1131 * Flow Control has been moved into the RX headers and this out of band
1132 * method isn't used any more.
1133 * remaining backward compatible with older dongles.
1135 if (hmb_data
& HMB_DATA_FC
) {
1136 fcbits
= (hmb_data
& HMB_DATA_FCDATA_MASK
) >>
1137 HMB_DATA_FCDATA_SHIFT
;
1139 if (fcbits
& ~bus
->flowcontrol
)
1140 bus
->sdcnt
.fc_xoff
++;
1142 if (bus
->flowcontrol
& ~fcbits
)
1143 bus
->sdcnt
.fc_xon
++;
1145 bus
->sdcnt
.fc_rcvd
++;
1146 bus
->flowcontrol
= fcbits
;
1149 /* Shouldn't be any others */
1150 if (hmb_data
& ~(HMB_DATA_DEVREADY
|
1151 HMB_DATA_NAKHANDLED
|
1154 HMB_DATA_FCDATA_MASK
| HMB_DATA_VERSION_MASK
))
1155 brcmf_err("Unknown mailbox data content: 0x%02x\n",
1161 static void brcmf_sdio_rxfail(struct brcmf_sdio
*bus
, bool abort
, bool rtx
)
1168 brcmf_err("%sterminate frame%s\n",
1169 abort
? "abort command, " : "",
1170 rtx
? ", send NAK" : "");
1173 brcmf_sdiod_abort(bus
->sdiodev
, SDIO_FUNC_2
);
1175 brcmf_sdiod_regwb(bus
->sdiodev
, SBSDIO_FUNC1_FRAMECTRL
,
1177 bus
->sdcnt
.f1regdata
++;
1179 /* Wait until the packet has been flushed (device/FIFO stable) */
1180 for (lastrbc
= retries
= 0xffff; retries
> 0; retries
--) {
1181 hi
= brcmf_sdiod_regrb(bus
->sdiodev
,
1182 SBSDIO_FUNC1_RFRAMEBCHI
, &err
);
1183 lo
= brcmf_sdiod_regrb(bus
->sdiodev
,
1184 SBSDIO_FUNC1_RFRAMEBCLO
, &err
);
1185 bus
->sdcnt
.f1regdata
+= 2;
1187 if ((hi
== 0) && (lo
== 0))
1190 if ((hi
> (lastrbc
>> 8)) && (lo
> (lastrbc
& 0x00ff))) {
1191 brcmf_err("count growing: last 0x%04x now 0x%04x\n",
1192 lastrbc
, (hi
<< 8) + lo
);
1194 lastrbc
= (hi
<< 8) + lo
;
1198 brcmf_err("count never zeroed: last 0x%04x\n", lastrbc
);
1200 brcmf_dbg(SDIO
, "flush took %d iterations\n", 0xffff - retries
);
1204 err
= w_sdreg32(bus
, SMB_NAK
,
1205 offsetof(struct sdpcmd_regs
, tosbmailbox
));
1207 bus
->sdcnt
.f1regdata
++;
1212 /* Clear partial in any case */
1213 bus
->cur_read
.len
= 0;
1216 static void brcmf_sdio_txfail(struct brcmf_sdio
*bus
)
1218 struct brcmf_sdio_dev
*sdiodev
= bus
->sdiodev
;
1221 /* On failure, abort the command and terminate the frame */
1222 brcmf_err("sdio error, abort command and terminate frame\n");
1223 bus
->sdcnt
.tx_sderrs
++;
1225 brcmf_sdiod_abort(sdiodev
, SDIO_FUNC_2
);
1226 brcmf_sdiod_regwb(sdiodev
, SBSDIO_FUNC1_FRAMECTRL
, SFC_WF_TERM
, NULL
);
1227 bus
->sdcnt
.f1regdata
++;
1229 for (i
= 0; i
< 3; i
++) {
1230 hi
= brcmf_sdiod_regrb(sdiodev
, SBSDIO_FUNC1_WFRAMEBCHI
, NULL
);
1231 lo
= brcmf_sdiod_regrb(sdiodev
, SBSDIO_FUNC1_WFRAMEBCLO
, NULL
);
1232 bus
->sdcnt
.f1regdata
+= 2;
1233 if ((hi
== 0) && (lo
== 0))
1238 /* return total length of buffer chain */
1239 static uint
brcmf_sdio_glom_len(struct brcmf_sdio
*bus
)
1245 skb_queue_walk(&bus
->glom
, p
)
1250 static void brcmf_sdio_free_glom(struct brcmf_sdio
*bus
)
1252 struct sk_buff
*cur
, *next
;
1254 skb_queue_walk_safe(&bus
->glom
, cur
, next
) {
1255 skb_unlink(cur
, &bus
->glom
);
1256 brcmu_pkt_buf_free_skb(cur
);
1261 * brcmfmac sdio bus specific header
1262 * This is the lowest layer header wrapped on the packets transmitted between
1263 * host and WiFi dongle which contains information needed for SDIO core and
1266 * It consists of 3 parts: hardware header, hardware extension header and
1268 * hardware header (frame tag) - 4 bytes
1269 * Byte 0~1: Frame length
1270 * Byte 2~3: Checksum, bit-wise inverse of frame length
1271 * hardware extension header - 8 bytes
1272 * Tx glom mode only, N/A for Rx or normal Tx
1273 * Byte 0~1: Packet length excluding hw frame tag
1275 * Byte 3: Frame flags, bit 0: last frame indication
1276 * Byte 4~5: Reserved
1277 * Byte 6~7: Tail padding length
1278 * software header - 8 bytes
1279 * Byte 0: Rx/Tx sequence number
1280 * Byte 1: 4 MSB Channel number, 4 LSB arbitrary flag
1281 * Byte 2: Length of next data frame, reserved for Tx
1282 * Byte 3: Data offset
1283 * Byte 4: Flow control bits, reserved for Tx
1284 * Byte 5: Maximum Sequence number allowed by firmware for Tx, N/A for Tx packet
1285 * Byte 6~7: Reserved
1287 #define SDPCM_HWHDR_LEN 4
1288 #define SDPCM_HWEXT_LEN 8
1289 #define SDPCM_SWHDR_LEN 8
1290 #define SDPCM_HDRLEN (SDPCM_HWHDR_LEN + SDPCM_SWHDR_LEN)
1291 /* software header */
1292 #define SDPCM_SEQ_MASK 0x000000ff
1293 #define SDPCM_SEQ_WRAP 256
1294 #define SDPCM_CHANNEL_MASK 0x00000f00
1295 #define SDPCM_CHANNEL_SHIFT 8
1296 #define SDPCM_CONTROL_CHANNEL 0 /* Control */
1297 #define SDPCM_EVENT_CHANNEL 1 /* Asyc Event Indication */
1298 #define SDPCM_DATA_CHANNEL 2 /* Data Xmit/Recv */
1299 #define SDPCM_GLOM_CHANNEL 3 /* Coalesced packets */
1300 #define SDPCM_TEST_CHANNEL 15 /* Test/debug packets */
1301 #define SDPCM_GLOMDESC(p) (((u8 *)p)[1] & 0x80)
1302 #define SDPCM_NEXTLEN_MASK 0x00ff0000
1303 #define SDPCM_NEXTLEN_SHIFT 16
1304 #define SDPCM_DOFFSET_MASK 0xff000000
1305 #define SDPCM_DOFFSET_SHIFT 24
1306 #define SDPCM_FCMASK_MASK 0x000000ff
1307 #define SDPCM_WINDOW_MASK 0x0000ff00
1308 #define SDPCM_WINDOW_SHIFT 8
1310 static inline u8
brcmf_sdio_getdatoffset(u8
*swheader
)
1313 hdrvalue
= *(u32
*)swheader
;
1314 return (u8
)((hdrvalue
& SDPCM_DOFFSET_MASK
) >> SDPCM_DOFFSET_SHIFT
);
1317 static inline bool brcmf_sdio_fromevntchan(u8
*swheader
)
1322 hdrvalue
= *(u32
*)swheader
;
1323 ret
= (u8
)((hdrvalue
& SDPCM_CHANNEL_MASK
) >> SDPCM_CHANNEL_SHIFT
);
1325 return (ret
== SDPCM_EVENT_CHANNEL
);
1328 static int brcmf_sdio_hdparse(struct brcmf_sdio
*bus
, u8
*header
,
1329 struct brcmf_sdio_hdrinfo
*rd
,
1330 enum brcmf_sdio_frmtype type
)
1333 u8 rx_seq
, fc
, tx_seq_max
;
1336 trace_brcmf_sdpcm_hdr(SDPCM_RX
, header
);
1339 len
= get_unaligned_le16(header
);
1340 checksum
= get_unaligned_le16(header
+ sizeof(u16
));
1341 /* All zero means no more to read */
1342 if (!(len
| checksum
)) {
1343 bus
->rxpending
= false;
1346 if ((u16
)(~(len
^ checksum
))) {
1347 brcmf_err("HW header checksum error\n");
1348 bus
->sdcnt
.rx_badhdr
++;
1349 brcmf_sdio_rxfail(bus
, false, false);
1352 if (len
< SDPCM_HDRLEN
) {
1353 brcmf_err("HW header length error\n");
1356 if (type
== BRCMF_SDIO_FT_SUPER
&&
1357 (roundup(len
, bus
->blocksize
) != rd
->len
)) {
1358 brcmf_err("HW superframe header length error\n");
1361 if (type
== BRCMF_SDIO_FT_SUB
&& len
> rd
->len
) {
1362 brcmf_err("HW subframe header length error\n");
1367 /* software header */
1368 header
+= SDPCM_HWHDR_LEN
;
1369 swheader
= le32_to_cpu(*(__le32
*)header
);
1370 if (type
== BRCMF_SDIO_FT_SUPER
&& SDPCM_GLOMDESC(header
)) {
1371 brcmf_err("Glom descriptor found in superframe head\n");
1375 rx_seq
= (u8
)(swheader
& SDPCM_SEQ_MASK
);
1376 rd
->channel
= (swheader
& SDPCM_CHANNEL_MASK
) >> SDPCM_CHANNEL_SHIFT
;
1377 if (len
> MAX_RX_DATASZ
&& rd
->channel
!= SDPCM_CONTROL_CHANNEL
&&
1378 type
!= BRCMF_SDIO_FT_SUPER
) {
1379 brcmf_err("HW header length too long\n");
1380 bus
->sdcnt
.rx_toolong
++;
1381 brcmf_sdio_rxfail(bus
, false, false);
1385 if (type
== BRCMF_SDIO_FT_SUPER
&& rd
->channel
!= SDPCM_GLOM_CHANNEL
) {
1386 brcmf_err("Wrong channel for superframe\n");
1390 if (type
== BRCMF_SDIO_FT_SUB
&& rd
->channel
!= SDPCM_DATA_CHANNEL
&&
1391 rd
->channel
!= SDPCM_EVENT_CHANNEL
) {
1392 brcmf_err("Wrong channel for subframe\n");
1396 rd
->dat_offset
= brcmf_sdio_getdatoffset(header
);
1397 if (rd
->dat_offset
< SDPCM_HDRLEN
|| rd
->dat_offset
> rd
->len
) {
1398 brcmf_err("seq %d: bad data offset\n", rx_seq
);
1399 bus
->sdcnt
.rx_badhdr
++;
1400 brcmf_sdio_rxfail(bus
, false, false);
1404 if (rd
->seq_num
!= rx_seq
) {
1405 brcmf_dbg(SDIO
, "seq %d, expected %d\n", rx_seq
, rd
->seq_num
);
1406 bus
->sdcnt
.rx_badseq
++;
1407 rd
->seq_num
= rx_seq
;
1409 /* no need to check the reset for subframe */
1410 if (type
== BRCMF_SDIO_FT_SUB
)
1412 rd
->len_nxtfrm
= (swheader
& SDPCM_NEXTLEN_MASK
) >> SDPCM_NEXTLEN_SHIFT
;
1413 if (rd
->len_nxtfrm
<< 4 > MAX_RX_DATASZ
) {
1414 /* only warm for NON glom packet */
1415 if (rd
->channel
!= SDPCM_GLOM_CHANNEL
)
1416 brcmf_err("seq %d: next length error\n", rx_seq
);
1419 swheader
= le32_to_cpu(*(__le32
*)(header
+ 4));
1420 fc
= swheader
& SDPCM_FCMASK_MASK
;
1421 if (bus
->flowcontrol
!= fc
) {
1422 if (~bus
->flowcontrol
& fc
)
1423 bus
->sdcnt
.fc_xoff
++;
1424 if (bus
->flowcontrol
& ~fc
)
1425 bus
->sdcnt
.fc_xon
++;
1426 bus
->sdcnt
.fc_rcvd
++;
1427 bus
->flowcontrol
= fc
;
1429 tx_seq_max
= (swheader
& SDPCM_WINDOW_MASK
) >> SDPCM_WINDOW_SHIFT
;
1430 if ((u8
)(tx_seq_max
- bus
->tx_seq
) > 0x40) {
1431 brcmf_err("seq %d: max tx seq number error\n", rx_seq
);
1432 tx_seq_max
= bus
->tx_seq
+ 2;
1434 bus
->tx_max
= tx_seq_max
;
1439 static inline void brcmf_sdio_update_hwhdr(u8
*header
, u16 frm_length
)
1441 *(__le16
*)header
= cpu_to_le16(frm_length
);
1442 *(((__le16
*)header
) + 1) = cpu_to_le16(~frm_length
);
1445 static void brcmf_sdio_hdpack(struct brcmf_sdio
*bus
, u8
*header
,
1446 struct brcmf_sdio_hdrinfo
*hd_info
)
1451 brcmf_sdio_update_hwhdr(header
, hd_info
->len
);
1452 hdr_offset
= SDPCM_HWHDR_LEN
;
1455 hdrval
= (hd_info
->len
- hdr_offset
) | (hd_info
->lastfrm
<< 24);
1456 *((__le32
*)(header
+ hdr_offset
)) = cpu_to_le32(hdrval
);
1457 hdrval
= (u16
)hd_info
->tail_pad
<< 16;
1458 *(((__le32
*)(header
+ hdr_offset
)) + 1) = cpu_to_le32(hdrval
);
1459 hdr_offset
+= SDPCM_HWEXT_LEN
;
1462 hdrval
= hd_info
->seq_num
;
1463 hdrval
|= (hd_info
->channel
<< SDPCM_CHANNEL_SHIFT
) &
1465 hdrval
|= (hd_info
->dat_offset
<< SDPCM_DOFFSET_SHIFT
) &
1467 *((__le32
*)(header
+ hdr_offset
)) = cpu_to_le32(hdrval
);
1468 *(((__le32
*)(header
+ hdr_offset
)) + 1) = 0;
1469 trace_brcmf_sdpcm_hdr(SDPCM_TX
+ !!(bus
->txglom
), header
);
1472 static u8
brcmf_sdio_rxglom(struct brcmf_sdio
*bus
, u8 rxseq
)
1477 struct sk_buff
*pfirst
, *pnext
;
1482 struct brcmf_sdio_hdrinfo rd_new
;
1484 /* If packets, issue read(s) and send up packet chain */
1485 /* Return sequence numbers consumed? */
1487 brcmf_dbg(SDIO
, "start: glomd %p glom %p\n",
1488 bus
->glomd
, skb_peek(&bus
->glom
));
1490 /* If there's a descriptor, generate the packet chain */
1492 pfirst
= pnext
= NULL
;
1493 dlen
= (u16
) (bus
->glomd
->len
);
1494 dptr
= bus
->glomd
->data
;
1495 if (!dlen
|| (dlen
& 1)) {
1496 brcmf_err("bad glomd len(%d), ignore descriptor\n",
1501 for (totlen
= num
= 0; dlen
; num
++) {
1502 /* Get (and move past) next length */
1503 sublen
= get_unaligned_le16(dptr
);
1504 dlen
-= sizeof(u16
);
1505 dptr
+= sizeof(u16
);
1506 if ((sublen
< SDPCM_HDRLEN
) ||
1507 ((num
== 0) && (sublen
< (2 * SDPCM_HDRLEN
)))) {
1508 brcmf_err("descriptor len %d bad: %d\n",
1513 if (sublen
% bus
->sgentry_align
) {
1514 brcmf_err("sublen %d not multiple of %d\n",
1515 sublen
, bus
->sgentry_align
);
1519 /* For last frame, adjust read len so total
1520 is a block multiple */
1523 (roundup(totlen
, bus
->blocksize
) - totlen
);
1524 totlen
= roundup(totlen
, bus
->blocksize
);
1527 /* Allocate/chain packet for next subframe */
1528 pnext
= brcmu_pkt_buf_get_skb(sublen
+ bus
->sgentry_align
);
1529 if (pnext
== NULL
) {
1530 brcmf_err("bcm_pkt_buf_get_skb failed, num %d len %d\n",
1534 skb_queue_tail(&bus
->glom
, pnext
);
1536 /* Adhere to start alignment requirements */
1537 pkt_align(pnext
, sublen
, bus
->sgentry_align
);
1540 /* If all allocations succeeded, save packet chain
1543 brcmf_dbg(GLOM
, "allocated %d-byte packet chain for %d subframes\n",
1545 if (BRCMF_GLOM_ON() && bus
->cur_read
.len
&&
1546 totlen
!= bus
->cur_read
.len
) {
1547 brcmf_dbg(GLOM
, "glomdesc mismatch: nextlen %d glomdesc %d rxseq %d\n",
1548 bus
->cur_read
.len
, totlen
, rxseq
);
1550 pfirst
= pnext
= NULL
;
1552 brcmf_sdio_free_glom(bus
);
1556 /* Done with descriptor packet */
1557 brcmu_pkt_buf_free_skb(bus
->glomd
);
1559 bus
->cur_read
.len
= 0;
1562 /* Ok -- either we just generated a packet chain,
1563 or had one from before */
1564 if (!skb_queue_empty(&bus
->glom
)) {
1565 if (BRCMF_GLOM_ON()) {
1566 brcmf_dbg(GLOM
, "try superframe read, packet chain:\n");
1567 skb_queue_walk(&bus
->glom
, pnext
) {
1568 brcmf_dbg(GLOM
, " %p: %p len 0x%04x (%d)\n",
1569 pnext
, (u8
*) (pnext
->data
),
1570 pnext
->len
, pnext
->len
);
1574 pfirst
= skb_peek(&bus
->glom
);
1575 dlen
= (u16
) brcmf_sdio_glom_len(bus
);
1577 /* Do an SDIO read for the superframe. Configurable iovar to
1578 * read directly into the chained packet, or allocate a large
1579 * packet and and copy into the chain.
1581 sdio_claim_host(bus
->sdiodev
->func
[1]);
1582 errcode
= brcmf_sdiod_recv_chain(bus
->sdiodev
,
1584 sdio_release_host(bus
->sdiodev
->func
[1]);
1585 bus
->sdcnt
.f2rxdata
++;
1587 /* On failure, kill the superframe */
1589 brcmf_err("glom read of %d bytes failed: %d\n",
1592 sdio_claim_host(bus
->sdiodev
->func
[1]);
1593 brcmf_sdio_rxfail(bus
, true, false);
1594 bus
->sdcnt
.rxglomfail
++;
1595 brcmf_sdio_free_glom(bus
);
1596 sdio_release_host(bus
->sdiodev
->func
[1]);
1600 brcmf_dbg_hex_dump(BRCMF_GLOM_ON(),
1601 pfirst
->data
, min_t(int, pfirst
->len
, 48),
1604 rd_new
.seq_num
= rxseq
;
1606 sdio_claim_host(bus
->sdiodev
->func
[1]);
1607 errcode
= brcmf_sdio_hdparse(bus
, pfirst
->data
, &rd_new
,
1608 BRCMF_SDIO_FT_SUPER
);
1609 sdio_release_host(bus
->sdiodev
->func
[1]);
1610 bus
->cur_read
.len
= rd_new
.len_nxtfrm
<< 4;
1612 /* Remove superframe header, remember offset */
1613 skb_pull(pfirst
, rd_new
.dat_offset
);
1614 sfdoff
= rd_new
.dat_offset
;
1617 /* Validate all the subframe headers */
1618 skb_queue_walk(&bus
->glom
, pnext
) {
1619 /* leave when invalid subframe is found */
1623 rd_new
.len
= pnext
->len
;
1624 rd_new
.seq_num
= rxseq
++;
1625 sdio_claim_host(bus
->sdiodev
->func
[1]);
1626 errcode
= brcmf_sdio_hdparse(bus
, pnext
->data
, &rd_new
,
1628 sdio_release_host(bus
->sdiodev
->func
[1]);
1629 brcmf_dbg_hex_dump(BRCMF_GLOM_ON(),
1630 pnext
->data
, 32, "subframe:\n");
1636 /* Terminate frame on error */
1637 sdio_claim_host(bus
->sdiodev
->func
[1]);
1638 brcmf_sdio_rxfail(bus
, true, false);
1639 bus
->sdcnt
.rxglomfail
++;
1640 brcmf_sdio_free_glom(bus
);
1641 sdio_release_host(bus
->sdiodev
->func
[1]);
1642 bus
->cur_read
.len
= 0;
1646 /* Basic SD framing looks ok - process each packet (header) */
1648 skb_queue_walk_safe(&bus
->glom
, pfirst
, pnext
) {
1649 dptr
= (u8
*) (pfirst
->data
);
1650 sublen
= get_unaligned_le16(dptr
);
1651 doff
= brcmf_sdio_getdatoffset(&dptr
[SDPCM_HWHDR_LEN
]);
1653 brcmf_dbg_hex_dump(BRCMF_BYTES_ON() && BRCMF_DATA_ON(),
1655 "Rx Subframe Data:\n");
1657 __skb_trim(pfirst
, sublen
);
1658 skb_pull(pfirst
, doff
);
1660 if (pfirst
->len
== 0) {
1661 skb_unlink(pfirst
, &bus
->glom
);
1662 brcmu_pkt_buf_free_skb(pfirst
);
1666 brcmf_dbg_hex_dump(BRCMF_GLOM_ON(),
1668 min_t(int, pfirst
->len
, 32),
1669 "subframe %d to stack, %p (%p/%d) nxt/lnk %p/%p\n",
1670 bus
->glom
.qlen
, pfirst
, pfirst
->data
,
1671 pfirst
->len
, pfirst
->next
,
1673 skb_unlink(pfirst
, &bus
->glom
);
1674 if (brcmf_sdio_fromevntchan(&dptr
[SDPCM_HWHDR_LEN
]))
1675 brcmf_rx_event(bus
->sdiodev
->dev
, pfirst
);
1677 brcmf_rx_frame(bus
->sdiodev
->dev
, pfirst
,
1679 bus
->sdcnt
.rxglompkts
++;
1682 bus
->sdcnt
.rxglomframes
++;
1687 static int brcmf_sdio_dcmd_resp_wait(struct brcmf_sdio
*bus
, uint
*condition
,
1690 DECLARE_WAITQUEUE(wait
, current
);
1691 int timeout
= DCMD_RESP_TIMEOUT
;
1693 /* Wait until control frame is available */
1694 add_wait_queue(&bus
->dcmd_resp_wait
, &wait
);
1695 set_current_state(TASK_INTERRUPTIBLE
);
1697 while (!(*condition
) && (!signal_pending(current
) && timeout
))
1698 timeout
= schedule_timeout(timeout
);
1700 if (signal_pending(current
))
1703 set_current_state(TASK_RUNNING
);
1704 remove_wait_queue(&bus
->dcmd_resp_wait
, &wait
);
1709 static int brcmf_sdio_dcmd_resp_wake(struct brcmf_sdio
*bus
)
1711 wake_up_interruptible(&bus
->dcmd_resp_wait
);
1716 brcmf_sdio_read_control(struct brcmf_sdio
*bus
, u8
*hdr
, uint len
, uint doff
)
1719 u8
*buf
= NULL
, *rbuf
;
1722 brcmf_dbg(TRACE
, "Enter\n");
1725 buf
= vzalloc(bus
->rxblen
);
1730 pad
= ((unsigned long)rbuf
% bus
->head_align
);
1732 rbuf
+= (bus
->head_align
- pad
);
1734 /* Copy the already-read portion over */
1735 memcpy(buf
, hdr
, BRCMF_FIRSTREAD
);
1736 if (len
<= BRCMF_FIRSTREAD
)
1739 /* Raise rdlen to next SDIO block to avoid tail command */
1740 rdlen
= len
- BRCMF_FIRSTREAD
;
1741 if (bus
->roundup
&& bus
->blocksize
&& (rdlen
> bus
->blocksize
)) {
1742 pad
= bus
->blocksize
- (rdlen
% bus
->blocksize
);
1743 if ((pad
<= bus
->roundup
) && (pad
< bus
->blocksize
) &&
1744 ((len
+ pad
) < bus
->sdiodev
->bus_if
->maxctl
))
1746 } else if (rdlen
% bus
->head_align
) {
1747 rdlen
+= bus
->head_align
- (rdlen
% bus
->head_align
);
1750 /* Drop if the read is too big or it exceeds our maximum */
1751 if ((rdlen
+ BRCMF_FIRSTREAD
) > bus
->sdiodev
->bus_if
->maxctl
) {
1752 brcmf_err("%d-byte control read exceeds %d-byte buffer\n",
1753 rdlen
, bus
->sdiodev
->bus_if
->maxctl
);
1754 brcmf_sdio_rxfail(bus
, false, false);
1758 if ((len
- doff
) > bus
->sdiodev
->bus_if
->maxctl
) {
1759 brcmf_err("%d-byte ctl frame (%d-byte ctl data) exceeds %d-byte limit\n",
1760 len
, len
- doff
, bus
->sdiodev
->bus_if
->maxctl
);
1761 bus
->sdcnt
.rx_toolong
++;
1762 brcmf_sdio_rxfail(bus
, false, false);
1766 /* Read remain of frame body */
1767 sdret
= brcmf_sdiod_recv_buf(bus
->sdiodev
, rbuf
, rdlen
);
1768 bus
->sdcnt
.f2rxdata
++;
1770 /* Control frame failures need retransmission */
1772 brcmf_err("read %d control bytes failed: %d\n",
1774 bus
->sdcnt
.rxc_errors
++;
1775 brcmf_sdio_rxfail(bus
, true, true);
1778 memcpy(buf
+ BRCMF_FIRSTREAD
, rbuf
, rdlen
);
1782 brcmf_dbg_hex_dump(BRCMF_BYTES_ON() && BRCMF_CTL_ON(),
1783 buf
, len
, "RxCtrl:\n");
1785 /* Point to valid data and indicate its length */
1786 spin_lock_bh(&bus
->rxctl_lock
);
1788 brcmf_err("last control frame is being processed.\n");
1789 spin_unlock_bh(&bus
->rxctl_lock
);
1793 bus
->rxctl
= buf
+ doff
;
1794 bus
->rxctl_orig
= buf
;
1795 bus
->rxlen
= len
- doff
;
1796 spin_unlock_bh(&bus
->rxctl_lock
);
1799 /* Awake any waiters */
1800 brcmf_sdio_dcmd_resp_wake(bus
);
1803 /* Pad read to blocksize for efficiency */
1804 static void brcmf_sdio_pad(struct brcmf_sdio
*bus
, u16
*pad
, u16
*rdlen
)
1806 if (bus
->roundup
&& bus
->blocksize
&& *rdlen
> bus
->blocksize
) {
1807 *pad
= bus
->blocksize
- (*rdlen
% bus
->blocksize
);
1808 if (*pad
<= bus
->roundup
&& *pad
< bus
->blocksize
&&
1809 *rdlen
+ *pad
+ BRCMF_FIRSTREAD
< MAX_RX_DATASZ
)
1811 } else if (*rdlen
% bus
->head_align
) {
1812 *rdlen
+= bus
->head_align
- (*rdlen
% bus
->head_align
);
1816 static uint
brcmf_sdio_readframes(struct brcmf_sdio
*bus
, uint maxframes
)
1818 struct sk_buff
*pkt
; /* Packet for event or data frames */
1819 u16 pad
; /* Number of pad bytes to read */
1820 uint rxleft
= 0; /* Remaining number of frames allowed */
1821 int ret
; /* Return code from calls */
1822 uint rxcount
= 0; /* Total frames read */
1823 struct brcmf_sdio_hdrinfo
*rd
= &bus
->cur_read
, rd_new
;
1826 brcmf_dbg(TRACE
, "Enter\n");
1828 /* Not finished unless we encounter no more frames indication */
1829 bus
->rxpending
= true;
1831 for (rd
->seq_num
= bus
->rx_seq
, rxleft
= maxframes
;
1832 !bus
->rxskip
&& rxleft
&& bus
->sdiodev
->state
== BRCMF_SDIOD_DATA
;
1833 rd
->seq_num
++, rxleft
--) {
1835 /* Handle glomming separately */
1836 if (bus
->glomd
|| !skb_queue_empty(&bus
->glom
)) {
1838 brcmf_dbg(GLOM
, "calling rxglom: glomd %p, glom %p\n",
1839 bus
->glomd
, skb_peek(&bus
->glom
));
1840 cnt
= brcmf_sdio_rxglom(bus
, rd
->seq_num
);
1841 brcmf_dbg(GLOM
, "rxglom returned %d\n", cnt
);
1842 rd
->seq_num
+= cnt
- 1;
1843 rxleft
= (rxleft
> cnt
) ? (rxleft
- cnt
) : 1;
1847 rd
->len_left
= rd
->len
;
1848 /* read header first for unknow frame length */
1849 sdio_claim_host(bus
->sdiodev
->func
[1]);
1851 ret
= brcmf_sdiod_recv_buf(bus
->sdiodev
,
1852 bus
->rxhdr
, BRCMF_FIRSTREAD
);
1853 bus
->sdcnt
.f2rxhdrs
++;
1855 brcmf_err("RXHEADER FAILED: %d\n",
1857 bus
->sdcnt
.rx_hdrfail
++;
1858 brcmf_sdio_rxfail(bus
, true, true);
1859 sdio_release_host(bus
->sdiodev
->func
[1]);
1863 brcmf_dbg_hex_dump(BRCMF_BYTES_ON() || BRCMF_HDRS_ON(),
1864 bus
->rxhdr
, SDPCM_HDRLEN
,
1867 if (brcmf_sdio_hdparse(bus
, bus
->rxhdr
, rd
,
1868 BRCMF_SDIO_FT_NORMAL
)) {
1869 sdio_release_host(bus
->sdiodev
->func
[1]);
1870 if (!bus
->rxpending
)
1876 if (rd
->channel
== SDPCM_CONTROL_CHANNEL
) {
1877 brcmf_sdio_read_control(bus
, bus
->rxhdr
,
1880 /* prepare the descriptor for the next read */
1881 rd
->len
= rd
->len_nxtfrm
<< 4;
1883 /* treat all packet as event if we don't know */
1884 rd
->channel
= SDPCM_EVENT_CHANNEL
;
1885 sdio_release_host(bus
->sdiodev
->func
[1]);
1888 rd
->len_left
= rd
->len
> BRCMF_FIRSTREAD
?
1889 rd
->len
- BRCMF_FIRSTREAD
: 0;
1890 head_read
= BRCMF_FIRSTREAD
;
1893 brcmf_sdio_pad(bus
, &pad
, &rd
->len_left
);
1895 pkt
= brcmu_pkt_buf_get_skb(rd
->len_left
+ head_read
+
1898 /* Give up on data, request rtx of events */
1899 brcmf_err("brcmu_pkt_buf_get_skb failed\n");
1900 brcmf_sdio_rxfail(bus
, false,
1901 RETRYCHAN(rd
->channel
));
1902 sdio_release_host(bus
->sdiodev
->func
[1]);
1905 skb_pull(pkt
, head_read
);
1906 pkt_align(pkt
, rd
->len_left
, bus
->head_align
);
1908 ret
= brcmf_sdiod_recv_pkt(bus
->sdiodev
, pkt
);
1909 bus
->sdcnt
.f2rxdata
++;
1910 sdio_release_host(bus
->sdiodev
->func
[1]);
1913 brcmf_err("read %d bytes from channel %d failed: %d\n",
1914 rd
->len
, rd
->channel
, ret
);
1915 brcmu_pkt_buf_free_skb(pkt
);
1916 sdio_claim_host(bus
->sdiodev
->func
[1]);
1917 brcmf_sdio_rxfail(bus
, true,
1918 RETRYCHAN(rd
->channel
));
1919 sdio_release_host(bus
->sdiodev
->func
[1]);
1924 skb_push(pkt
, head_read
);
1925 memcpy(pkt
->data
, bus
->rxhdr
, head_read
);
1928 memcpy(bus
->rxhdr
, pkt
->data
, SDPCM_HDRLEN
);
1929 rd_new
.seq_num
= rd
->seq_num
;
1930 sdio_claim_host(bus
->sdiodev
->func
[1]);
1931 if (brcmf_sdio_hdparse(bus
, bus
->rxhdr
, &rd_new
,
1932 BRCMF_SDIO_FT_NORMAL
)) {
1934 brcmu_pkt_buf_free_skb(pkt
);
1936 bus
->sdcnt
.rx_readahead_cnt
++;
1937 if (rd
->len
!= roundup(rd_new
.len
, 16)) {
1938 brcmf_err("frame length mismatch:read %d, should be %d\n",
1940 roundup(rd_new
.len
, 16) >> 4);
1942 brcmf_sdio_rxfail(bus
, true, true);
1943 sdio_release_host(bus
->sdiodev
->func
[1]);
1944 brcmu_pkt_buf_free_skb(pkt
);
1947 sdio_release_host(bus
->sdiodev
->func
[1]);
1948 rd
->len_nxtfrm
= rd_new
.len_nxtfrm
;
1949 rd
->channel
= rd_new
.channel
;
1950 rd
->dat_offset
= rd_new
.dat_offset
;
1952 brcmf_dbg_hex_dump(!(BRCMF_BYTES_ON() &&
1955 bus
->rxhdr
, SDPCM_HDRLEN
,
1958 if (rd_new
.channel
== SDPCM_CONTROL_CHANNEL
) {
1959 brcmf_err("readahead on control packet %d?\n",
1961 /* Force retry w/normal header read */
1963 sdio_claim_host(bus
->sdiodev
->func
[1]);
1964 brcmf_sdio_rxfail(bus
, false, true);
1965 sdio_release_host(bus
->sdiodev
->func
[1]);
1966 brcmu_pkt_buf_free_skb(pkt
);
1971 brcmf_dbg_hex_dump(BRCMF_BYTES_ON() && BRCMF_DATA_ON(),
1972 pkt
->data
, rd
->len
, "Rx Data:\n");
1974 /* Save superframe descriptor and allocate packet frame */
1975 if (rd
->channel
== SDPCM_GLOM_CHANNEL
) {
1976 if (SDPCM_GLOMDESC(&bus
->rxhdr
[SDPCM_HWHDR_LEN
])) {
1977 brcmf_dbg(GLOM
, "glom descriptor, %d bytes:\n",
1979 brcmf_dbg_hex_dump(BRCMF_GLOM_ON(),
1982 __skb_trim(pkt
, rd
->len
);
1983 skb_pull(pkt
, SDPCM_HDRLEN
);
1986 brcmf_err("%s: glom superframe w/o "
1987 "descriptor!\n", __func__
);
1988 sdio_claim_host(bus
->sdiodev
->func
[1]);
1989 brcmf_sdio_rxfail(bus
, false, false);
1990 sdio_release_host(bus
->sdiodev
->func
[1]);
1992 /* prepare the descriptor for the next read */
1993 rd
->len
= rd
->len_nxtfrm
<< 4;
1995 /* treat all packet as event if we don't know */
1996 rd
->channel
= SDPCM_EVENT_CHANNEL
;
2000 /* Fill in packet len and prio, deliver upward */
2001 __skb_trim(pkt
, rd
->len
);
2002 skb_pull(pkt
, rd
->dat_offset
);
2005 brcmu_pkt_buf_free_skb(pkt
);
2006 else if (rd
->channel
== SDPCM_EVENT_CHANNEL
)
2007 brcmf_rx_event(bus
->sdiodev
->dev
, pkt
);
2009 brcmf_rx_frame(bus
->sdiodev
->dev
, pkt
,
2012 /* prepare the descriptor for the next read */
2013 rd
->len
= rd
->len_nxtfrm
<< 4;
2015 /* treat all packet as event if we don't know */
2016 rd
->channel
= SDPCM_EVENT_CHANNEL
;
2019 rxcount
= maxframes
- rxleft
;
2020 /* Message if we hit the limit */
2022 brcmf_dbg(DATA
, "hit rx limit of %d frames\n", maxframes
);
2024 brcmf_dbg(DATA
, "processed %d frames\n", rxcount
);
2025 /* Back off rxseq if awaiting rtx, update rx_seq */
2028 bus
->rx_seq
= rd
->seq_num
;
2034 brcmf_sdio_wait_event_wakeup(struct brcmf_sdio
*bus
)
2036 wake_up_interruptible(&bus
->ctrl_wait
);
2040 static int brcmf_sdio_txpkt_hdalign(struct brcmf_sdio
*bus
, struct sk_buff
*pkt
)
2042 struct brcmf_bus_stats
*stats
;
2046 dat_buf
= (u8
*)(pkt
->data
);
2048 /* Check head padding */
2049 head_pad
= ((unsigned long)dat_buf
% bus
->head_align
);
2051 if (skb_headroom(pkt
) < head_pad
) {
2052 stats
= &bus
->sdiodev
->bus_if
->stats
;
2053 atomic_inc(&stats
->pktcowed
);
2054 if (skb_cow_head(pkt
, head_pad
)) {
2055 atomic_inc(&stats
->pktcow_failed
);
2060 skb_push(pkt
, head_pad
);
2061 dat_buf
= (u8
*)(pkt
->data
);
2063 memset(dat_buf
, 0, head_pad
+ bus
->tx_hdrlen
);
2068 * struct brcmf_skbuff_cb reserves first two bytes in sk_buff::cb for
2071 /* flag marking a dummy skb added for DMA alignment requirement */
2072 #define ALIGN_SKB_FLAG 0x8000
2073 /* bit mask of data length chopped from the previous packet */
2074 #define ALIGN_SKB_CHOP_LEN_MASK 0x7fff
2076 static int brcmf_sdio_txpkt_prep_sg(struct brcmf_sdio
*bus
,
2077 struct sk_buff_head
*pktq
,
2078 struct sk_buff
*pkt
, u16 total_len
)
2080 struct brcmf_sdio_dev
*sdiodev
;
2081 struct sk_buff
*pkt_pad
;
2082 u16 tail_pad
, tail_chop
, chain_pad
;
2083 unsigned int blksize
;
2087 sdiodev
= bus
->sdiodev
;
2088 blksize
= sdiodev
->func
[SDIO_FUNC_2
]->cur_blksize
;
2089 /* sg entry alignment should be a divisor of block size */
2090 WARN_ON(blksize
% bus
->sgentry_align
);
2092 /* Check tail padding */
2093 lastfrm
= skb_queue_is_last(pktq
, pkt
);
2095 tail_chop
= pkt
->len
% bus
->sgentry_align
;
2097 tail_pad
= bus
->sgentry_align
- tail_chop
;
2098 chain_pad
= (total_len
+ tail_pad
) % blksize
;
2099 if (lastfrm
&& chain_pad
)
2100 tail_pad
+= blksize
- chain_pad
;
2101 if (skb_tailroom(pkt
) < tail_pad
&& pkt
->len
> blksize
) {
2102 pkt_pad
= brcmu_pkt_buf_get_skb(tail_pad
+ tail_chop
+
2104 if (pkt_pad
== NULL
)
2106 ret
= brcmf_sdio_txpkt_hdalign(bus
, pkt_pad
);
2107 if (unlikely(ret
< 0)) {
2111 memcpy(pkt_pad
->data
,
2112 pkt
->data
+ pkt
->len
- tail_chop
,
2114 *(u16
*)(pkt_pad
->cb
) = ALIGN_SKB_FLAG
+ tail_chop
;
2115 skb_trim(pkt
, pkt
->len
- tail_chop
);
2116 skb_trim(pkt_pad
, tail_pad
+ tail_chop
);
2117 __skb_queue_after(pktq
, pkt
, pkt_pad
);
2119 ntail
= pkt
->data_len
+ tail_pad
-
2120 (pkt
->end
- pkt
->tail
);
2121 if (skb_cloned(pkt
) || ntail
> 0)
2122 if (pskb_expand_head(pkt
, 0, ntail
, GFP_ATOMIC
))
2124 if (skb_linearize(pkt
))
2126 __skb_put(pkt
, tail_pad
);
2133 * brcmf_sdio_txpkt_prep - packet preparation for transmit
2134 * @bus: brcmf_sdio structure pointer
2135 * @pktq: packet list pointer
2136 * @chan: virtual channel to transmit the packet
2138 * Processes to be applied to the packet
2139 * - Align data buffer pointer
2140 * - Align data buffer length
2142 * Return: negative value if there is error
2145 brcmf_sdio_txpkt_prep(struct brcmf_sdio
*bus
, struct sk_buff_head
*pktq
,
2148 u16 head_pad
, total_len
;
2149 struct sk_buff
*pkt_next
;
2152 struct brcmf_sdio_hdrinfo hd_info
= {0};
2154 txseq
= bus
->tx_seq
;
2156 skb_queue_walk(pktq
, pkt_next
) {
2157 /* alignment packet inserted in previous
2158 * loop cycle can be skipped as it is
2159 * already properly aligned and does not
2160 * need an sdpcm header.
2162 if (*(u16
*)(pkt_next
->cb
) & ALIGN_SKB_FLAG
)
2165 /* align packet data pointer */
2166 ret
= brcmf_sdio_txpkt_hdalign(bus
, pkt_next
);
2169 head_pad
= (u16
)ret
;
2171 memset(pkt_next
->data
+ bus
->tx_hdrlen
, 0, head_pad
);
2173 total_len
+= pkt_next
->len
;
2175 hd_info
.len
= pkt_next
->len
;
2176 hd_info
.lastfrm
= skb_queue_is_last(pktq
, pkt_next
);
2177 if (bus
->txglom
&& pktq
->qlen
> 1) {
2178 ret
= brcmf_sdio_txpkt_prep_sg(bus
, pktq
,
2179 pkt_next
, total_len
);
2182 hd_info
.tail_pad
= (u16
)ret
;
2183 total_len
+= (u16
)ret
;
2186 hd_info
.channel
= chan
;
2187 hd_info
.dat_offset
= head_pad
+ bus
->tx_hdrlen
;
2188 hd_info
.seq_num
= txseq
++;
2190 /* Now fill the header */
2191 brcmf_sdio_hdpack(bus
, pkt_next
->data
, &hd_info
);
2193 if (BRCMF_BYTES_ON() &&
2194 ((BRCMF_CTL_ON() && chan
== SDPCM_CONTROL_CHANNEL
) ||
2195 (BRCMF_DATA_ON() && chan
!= SDPCM_CONTROL_CHANNEL
)))
2196 brcmf_dbg_hex_dump(true, pkt_next
->data
, hd_info
.len
,
2198 else if (BRCMF_HDRS_ON())
2199 brcmf_dbg_hex_dump(true, pkt_next
->data
,
2200 head_pad
+ bus
->tx_hdrlen
,
2203 /* Hardware length tag of the first packet should be total
2204 * length of the chain (including padding)
2207 brcmf_sdio_update_hwhdr(pktq
->next
->data
, total_len
);
2212 * brcmf_sdio_txpkt_postp - packet post processing for transmit
2213 * @bus: brcmf_sdio structure pointer
2214 * @pktq: packet list pointer
2216 * Processes to be applied to the packet
2217 * - Remove head padding
2218 * - Remove tail padding
2221 brcmf_sdio_txpkt_postp(struct brcmf_sdio
*bus
, struct sk_buff_head
*pktq
)
2226 u16 dummy_flags
, chop_len
;
2227 struct sk_buff
*pkt_next
, *tmp
, *pkt_prev
;
2229 skb_queue_walk_safe(pktq
, pkt_next
, tmp
) {
2230 dummy_flags
= *(u16
*)(pkt_next
->cb
);
2231 if (dummy_flags
& ALIGN_SKB_FLAG
) {
2232 chop_len
= dummy_flags
& ALIGN_SKB_CHOP_LEN_MASK
;
2234 pkt_prev
= pkt_next
->prev
;
2235 skb_put(pkt_prev
, chop_len
);
2237 __skb_unlink(pkt_next
, pktq
);
2238 brcmu_pkt_buf_free_skb(pkt_next
);
2240 hdr
= pkt_next
->data
+ bus
->tx_hdrlen
- SDPCM_SWHDR_LEN
;
2241 dat_offset
= le32_to_cpu(*(__le32
*)hdr
);
2242 dat_offset
= (dat_offset
& SDPCM_DOFFSET_MASK
) >>
2243 SDPCM_DOFFSET_SHIFT
;
2244 skb_pull(pkt_next
, dat_offset
);
2246 tail_pad
= le16_to_cpu(*(__le16
*)(hdr
- 2));
2247 skb_trim(pkt_next
, pkt_next
->len
- tail_pad
);
2253 /* Writes a HW/SW header into the packet and sends it. */
2254 /* Assumes: (a) header space already there, (b) caller holds lock */
2255 static int brcmf_sdio_txpkt(struct brcmf_sdio
*bus
, struct sk_buff_head
*pktq
,
2259 struct sk_buff
*pkt_next
, *tmp
;
2261 brcmf_dbg(TRACE
, "Enter\n");
2263 ret
= brcmf_sdio_txpkt_prep(bus
, pktq
, chan
);
2267 sdio_claim_host(bus
->sdiodev
->func
[1]);
2268 ret
= brcmf_sdiod_send_pkt(bus
->sdiodev
, pktq
);
2269 bus
->sdcnt
.f2txdata
++;
2272 brcmf_sdio_txfail(bus
);
2274 sdio_release_host(bus
->sdiodev
->func
[1]);
2277 brcmf_sdio_txpkt_postp(bus
, pktq
);
2279 bus
->tx_seq
= (bus
->tx_seq
+ pktq
->qlen
) % SDPCM_SEQ_WRAP
;
2280 skb_queue_walk_safe(pktq
, pkt_next
, tmp
) {
2281 __skb_unlink(pkt_next
, pktq
);
2282 brcmf_proto_bcdc_txcomplete(bus
->sdiodev
->dev
, pkt_next
,
2288 static uint
brcmf_sdio_sendfromq(struct brcmf_sdio
*bus
, uint maxframes
)
2290 struct sk_buff
*pkt
;
2291 struct sk_buff_head pktq
;
2293 int ret
= 0, prec_out
, i
;
2295 u8 tx_prec_map
, pkt_num
;
2297 brcmf_dbg(TRACE
, "Enter\n");
2299 tx_prec_map
= ~bus
->flowcontrol
;
2301 /* Send frames until the limit or some other event */
2302 for (cnt
= 0; (cnt
< maxframes
) && data_ok(bus
);) {
2305 pkt_num
= min_t(u8
, bus
->tx_max
- bus
->tx_seq
,
2306 bus
->sdiodev
->txglomsz
);
2307 pkt_num
= min_t(u32
, pkt_num
,
2308 brcmu_pktq_mlen(&bus
->txq
, ~bus
->flowcontrol
));
2309 __skb_queue_head_init(&pktq
);
2310 spin_lock_bh(&bus
->txq_lock
);
2311 for (i
= 0; i
< pkt_num
; i
++) {
2312 pkt
= brcmu_pktq_mdeq(&bus
->txq
, tx_prec_map
,
2316 __skb_queue_tail(&pktq
, pkt
);
2318 spin_unlock_bh(&bus
->txq_lock
);
2322 ret
= brcmf_sdio_txpkt(bus
, &pktq
, SDPCM_DATA_CHANNEL
);
2326 /* In poll mode, need to check for other events */
2328 /* Check device status, signal pending interrupt */
2329 sdio_claim_host(bus
->sdiodev
->func
[1]);
2330 ret
= r_sdreg32(bus
, &intstatus
,
2331 offsetof(struct sdpcmd_regs
,
2333 sdio_release_host(bus
->sdiodev
->func
[1]);
2334 bus
->sdcnt
.f2txdata
++;
2337 if (intstatus
& bus
->hostintmask
)
2338 atomic_set(&bus
->ipend
, 1);
2342 /* Deflow-control stack if needed */
2343 if ((bus
->sdiodev
->state
== BRCMF_SDIOD_DATA
) &&
2344 bus
->txoff
&& (pktq_len(&bus
->txq
) < TXLOW
)) {
2346 brcmf_proto_bcdc_txflowblock(bus
->sdiodev
->dev
, false);
2352 static int brcmf_sdio_tx_ctrlframe(struct brcmf_sdio
*bus
, u8
*frame
, u16 len
)
2357 struct brcmf_sdio_hdrinfo hd_info
= {0};
2360 brcmf_dbg(TRACE
, "Enter\n");
2362 /* Back the pointer to make room for bus header */
2363 frame
-= bus
->tx_hdrlen
;
2364 len
+= bus
->tx_hdrlen
;
2366 /* Add alignment padding (optional for ctl frames) */
2367 doff
= ((unsigned long)frame
% bus
->head_align
);
2371 memset(frame
+ bus
->tx_hdrlen
, 0, doff
);
2374 /* Round send length to next SDIO block */
2376 if (bus
->roundup
&& bus
->blocksize
&& (len
> bus
->blocksize
)) {
2377 pad
= bus
->blocksize
- (len
% bus
->blocksize
);
2378 if ((pad
> bus
->roundup
) || (pad
>= bus
->blocksize
))
2380 } else if (len
% bus
->head_align
) {
2381 pad
= bus
->head_align
- (len
% bus
->head_align
);
2385 hd_info
.len
= len
- pad
;
2386 hd_info
.channel
= SDPCM_CONTROL_CHANNEL
;
2387 hd_info
.dat_offset
= doff
+ bus
->tx_hdrlen
;
2388 hd_info
.seq_num
= bus
->tx_seq
;
2389 hd_info
.lastfrm
= true;
2390 hd_info
.tail_pad
= pad
;
2391 brcmf_sdio_hdpack(bus
, frame
, &hd_info
);
2394 brcmf_sdio_update_hwhdr(frame
, len
);
2396 brcmf_dbg_hex_dump(BRCMF_BYTES_ON() && BRCMF_CTL_ON(),
2397 frame
, len
, "Tx Frame:\n");
2398 brcmf_dbg_hex_dump(!(BRCMF_BYTES_ON() && BRCMF_CTL_ON()) &&
2400 frame
, min_t(u16
, len
, 16), "TxHdr:\n");
2403 ret
= brcmf_sdiod_send_buf(bus
->sdiodev
, frame
, len
);
2406 brcmf_sdio_txfail(bus
);
2408 bus
->tx_seq
= (bus
->tx_seq
+ 1) % SDPCM_SEQ_WRAP
;
2409 } while (ret
< 0 && retries
++ < TXRETRIES
);
2414 static void brcmf_sdio_bus_stop(struct device
*dev
)
2416 u32 local_hostintmask
;
2419 struct brcmf_bus
*bus_if
= dev_get_drvdata(dev
);
2420 struct brcmf_sdio_dev
*sdiodev
= bus_if
->bus_priv
.sdio
;
2421 struct brcmf_sdio
*bus
= sdiodev
->bus
;
2423 brcmf_dbg(TRACE
, "Enter\n");
2425 if (bus
->watchdog_tsk
) {
2426 send_sig(SIGTERM
, bus
->watchdog_tsk
, 1);
2427 kthread_stop(bus
->watchdog_tsk
);
2428 bus
->watchdog_tsk
= NULL
;
2431 if (sdiodev
->state
!= BRCMF_SDIOD_NOMEDIUM
) {
2432 sdio_claim_host(sdiodev
->func
[1]);
2434 /* Enable clock for device interrupts */
2435 brcmf_sdio_bus_sleep(bus
, false, false);
2437 /* Disable and clear interrupts at the chip level also */
2438 w_sdreg32(bus
, 0, offsetof(struct sdpcmd_regs
, hostintmask
));
2439 local_hostintmask
= bus
->hostintmask
;
2440 bus
->hostintmask
= 0;
2442 /* Force backplane clocks to assure F2 interrupt propagates */
2443 saveclk
= brcmf_sdiod_regrb(sdiodev
, SBSDIO_FUNC1_CHIPCLKCSR
,
2446 brcmf_sdiod_regwb(sdiodev
, SBSDIO_FUNC1_CHIPCLKCSR
,
2447 (saveclk
| SBSDIO_FORCE_HT
), &err
);
2449 brcmf_err("Failed to force clock for F2: err %d\n",
2452 /* Turn off the bus (F2), free any pending packets */
2453 brcmf_dbg(INTR
, "disable SDIO interrupts\n");
2454 sdio_disable_func(sdiodev
->func
[SDIO_FUNC_2
]);
2456 /* Clear any pending interrupts now that F2 is disabled */
2457 w_sdreg32(bus
, local_hostintmask
,
2458 offsetof(struct sdpcmd_regs
, intstatus
));
2460 sdio_release_host(sdiodev
->func
[1]);
2462 /* Clear the data packet queues */
2463 brcmu_pktq_flush(&bus
->txq
, true, NULL
, NULL
);
2465 /* Clear any held glomming stuff */
2466 brcmu_pkt_buf_free_skb(bus
->glomd
);
2467 brcmf_sdio_free_glom(bus
);
2469 /* Clear rx control and wake any waiters */
2470 spin_lock_bh(&bus
->rxctl_lock
);
2472 spin_unlock_bh(&bus
->rxctl_lock
);
2473 brcmf_sdio_dcmd_resp_wake(bus
);
2475 /* Reset some F2 state stuff */
2476 bus
->rxskip
= false;
2477 bus
->tx_seq
= bus
->rx_seq
= 0;
2480 static inline void brcmf_sdio_clrintr(struct brcmf_sdio
*bus
)
2482 struct brcmf_sdio_dev
*sdiodev
;
2483 unsigned long flags
;
2485 sdiodev
= bus
->sdiodev
;
2486 if (sdiodev
->oob_irq_requested
) {
2487 spin_lock_irqsave(&sdiodev
->irq_en_lock
, flags
);
2488 if (!sdiodev
->irq_en
&& !atomic_read(&bus
->ipend
)) {
2489 enable_irq(sdiodev
->settings
->bus
.sdio
.oob_irq_nr
);
2490 sdiodev
->irq_en
= true;
2492 spin_unlock_irqrestore(&sdiodev
->irq_en_lock
, flags
);
2496 static int brcmf_sdio_intr_rstatus(struct brcmf_sdio
*bus
)
2498 struct brcmf_core
*buscore
;
2503 buscore
= brcmf_chip_get_core(bus
->ci
, BCMA_CORE_SDIO_DEV
);
2504 addr
= buscore
->base
+ offsetof(struct sdpcmd_regs
, intstatus
);
2506 val
= brcmf_sdiod_regrl(bus
->sdiodev
, addr
, &ret
);
2507 bus
->sdcnt
.f1regdata
++;
2511 val
&= bus
->hostintmask
;
2512 atomic_set(&bus
->fcstate
, !!(val
& I_HMB_FC_STATE
));
2514 /* Clear interrupts */
2516 brcmf_sdiod_regwl(bus
->sdiodev
, addr
, val
, &ret
);
2517 bus
->sdcnt
.f1regdata
++;
2518 atomic_or(val
, &bus
->intstatus
);
2524 static void brcmf_sdio_dpc(struct brcmf_sdio
*bus
)
2527 unsigned long intstatus
;
2528 uint txlimit
= bus
->txbound
; /* Tx frames to send before resched */
2529 uint framecnt
; /* Temporary counter of tx/rx frames */
2532 brcmf_dbg(TRACE
, "Enter\n");
2534 sdio_claim_host(bus
->sdiodev
->func
[1]);
2536 /* If waiting for HTAVAIL, check status */
2537 if (!bus
->sr_enabled
&& bus
->clkstate
== CLK_PENDING
) {
2538 u8 clkctl
, devctl
= 0;
2541 /* Check for inconsistent device control */
2542 devctl
= brcmf_sdiod_regrb(bus
->sdiodev
,
2543 SBSDIO_DEVICE_CTL
, &err
);
2546 /* Read CSR, if clock on switch to AVAIL, else ignore */
2547 clkctl
= brcmf_sdiod_regrb(bus
->sdiodev
,
2548 SBSDIO_FUNC1_CHIPCLKCSR
, &err
);
2550 brcmf_dbg(SDIO
, "DPC: PENDING, devctl 0x%02x clkctl 0x%02x\n",
2553 if (SBSDIO_HTAV(clkctl
)) {
2554 devctl
= brcmf_sdiod_regrb(bus
->sdiodev
,
2555 SBSDIO_DEVICE_CTL
, &err
);
2556 devctl
&= ~SBSDIO_DEVCTL_CA_INT_ONLY
;
2557 brcmf_sdiod_regwb(bus
->sdiodev
, SBSDIO_DEVICE_CTL
,
2559 bus
->clkstate
= CLK_AVAIL
;
2563 /* Make sure backplane clock is on */
2564 brcmf_sdio_bus_sleep(bus
, false, true);
2566 /* Pending interrupt indicates new device status */
2567 if (atomic_read(&bus
->ipend
) > 0) {
2568 atomic_set(&bus
->ipend
, 0);
2569 err
= brcmf_sdio_intr_rstatus(bus
);
2572 /* Start with leftover status bits */
2573 intstatus
= atomic_xchg(&bus
->intstatus
, 0);
2575 /* Handle flow-control change: read new state in case our ack
2576 * crossed another change interrupt. If change still set, assume
2577 * FC ON for safety, let next loop through do the debounce.
2579 if (intstatus
& I_HMB_FC_CHANGE
) {
2580 intstatus
&= ~I_HMB_FC_CHANGE
;
2581 err
= w_sdreg32(bus
, I_HMB_FC_CHANGE
,
2582 offsetof(struct sdpcmd_regs
, intstatus
));
2584 err
= r_sdreg32(bus
, &newstatus
,
2585 offsetof(struct sdpcmd_regs
, intstatus
));
2586 bus
->sdcnt
.f1regdata
+= 2;
2587 atomic_set(&bus
->fcstate
,
2588 !!(newstatus
& (I_HMB_FC_STATE
| I_HMB_FC_CHANGE
)));
2589 intstatus
|= (newstatus
& bus
->hostintmask
);
2592 /* Handle host mailbox indication */
2593 if (intstatus
& I_HMB_HOST_INT
) {
2594 intstatus
&= ~I_HMB_HOST_INT
;
2595 intstatus
|= brcmf_sdio_hostmail(bus
);
2598 sdio_release_host(bus
->sdiodev
->func
[1]);
2600 /* Generally don't ask for these, can get CRC errors... */
2601 if (intstatus
& I_WR_OOSYNC
) {
2602 brcmf_err("Dongle reports WR_OOSYNC\n");
2603 intstatus
&= ~I_WR_OOSYNC
;
2606 if (intstatus
& I_RD_OOSYNC
) {
2607 brcmf_err("Dongle reports RD_OOSYNC\n");
2608 intstatus
&= ~I_RD_OOSYNC
;
2611 if (intstatus
& I_SBINT
) {
2612 brcmf_err("Dongle reports SBINT\n");
2613 intstatus
&= ~I_SBINT
;
2616 /* Would be active due to wake-wlan in gSPI */
2617 if (intstatus
& I_CHIPACTIVE
) {
2618 brcmf_dbg(INFO
, "Dongle reports CHIPACTIVE\n");
2619 intstatus
&= ~I_CHIPACTIVE
;
2622 /* Ignore frame indications if rxskip is set */
2624 intstatus
&= ~I_HMB_FRAME_IND
;
2626 /* On frame indication, read available frames */
2627 if ((intstatus
& I_HMB_FRAME_IND
) && (bus
->clkstate
== CLK_AVAIL
)) {
2628 brcmf_sdio_readframes(bus
, bus
->rxbound
);
2629 if (!bus
->rxpending
)
2630 intstatus
&= ~I_HMB_FRAME_IND
;
2633 /* Keep still-pending events for next scheduling */
2635 atomic_or(intstatus
, &bus
->intstatus
);
2637 brcmf_sdio_clrintr(bus
);
2639 if (bus
->ctrl_frame_stat
&& (bus
->clkstate
== CLK_AVAIL
) &&
2641 sdio_claim_host(bus
->sdiodev
->func
[1]);
2642 if (bus
->ctrl_frame_stat
) {
2643 err
= brcmf_sdio_tx_ctrlframe(bus
, bus
->ctrl_frame_buf
,
2644 bus
->ctrl_frame_len
);
2645 bus
->ctrl_frame_err
= err
;
2647 bus
->ctrl_frame_stat
= false;
2649 sdio_release_host(bus
->sdiodev
->func
[1]);
2650 brcmf_sdio_wait_event_wakeup(bus
);
2652 /* Send queued frames (limit 1 if rx may still be pending) */
2653 if ((bus
->clkstate
== CLK_AVAIL
) && !atomic_read(&bus
->fcstate
) &&
2654 brcmu_pktq_mlen(&bus
->txq
, ~bus
->flowcontrol
) && txlimit
&&
2656 framecnt
= bus
->rxpending
? min(txlimit
, bus
->txminmax
) :
2658 brcmf_sdio_sendfromq(bus
, framecnt
);
2661 if ((bus
->sdiodev
->state
!= BRCMF_SDIOD_DATA
) || (err
!= 0)) {
2662 brcmf_err("failed backplane access over SDIO, halting operation\n");
2663 atomic_set(&bus
->intstatus
, 0);
2664 if (bus
->ctrl_frame_stat
) {
2665 sdio_claim_host(bus
->sdiodev
->func
[1]);
2666 if (bus
->ctrl_frame_stat
) {
2667 bus
->ctrl_frame_err
= -ENODEV
;
2669 bus
->ctrl_frame_stat
= false;
2670 brcmf_sdio_wait_event_wakeup(bus
);
2672 sdio_release_host(bus
->sdiodev
->func
[1]);
2674 } else if (atomic_read(&bus
->intstatus
) ||
2675 atomic_read(&bus
->ipend
) > 0 ||
2676 (!atomic_read(&bus
->fcstate
) &&
2677 brcmu_pktq_mlen(&bus
->txq
, ~bus
->flowcontrol
) &&
2679 bus
->dpc_triggered
= true;
2683 static struct pktq
*brcmf_sdio_bus_gettxq(struct device
*dev
)
2685 struct brcmf_bus
*bus_if
= dev_get_drvdata(dev
);
2686 struct brcmf_sdio_dev
*sdiodev
= bus_if
->bus_priv
.sdio
;
2687 struct brcmf_sdio
*bus
= sdiodev
->bus
;
2692 static bool brcmf_sdio_prec_enq(struct pktq
*q
, struct sk_buff
*pkt
, int prec
)
2695 int eprec
= -1; /* precedence to evict from */
2697 /* Fast case, precedence queue is not full and we are also not
2698 * exceeding total queue length
2700 if (!pktq_pfull(q
, prec
) && !pktq_full(q
)) {
2701 brcmu_pktq_penq(q
, prec
, pkt
);
2705 /* Determine precedence from which to evict packet, if any */
2706 if (pktq_pfull(q
, prec
)) {
2708 } else if (pktq_full(q
)) {
2709 p
= brcmu_pktq_peek_tail(q
, &eprec
);
2714 /* Evict if needed */
2716 /* Detect queueing to unconfigured precedence */
2718 return false; /* refuse newer (incoming) packet */
2719 /* Evict packet according to discard policy */
2720 p
= brcmu_pktq_pdeq_tail(q
, eprec
);
2722 brcmf_err("brcmu_pktq_pdeq_tail() failed\n");
2723 brcmu_pkt_buf_free_skb(p
);
2727 p
= brcmu_pktq_penq(q
, prec
, pkt
);
2729 brcmf_err("brcmu_pktq_penq() failed\n");
2734 static int brcmf_sdio_bus_txdata(struct device
*dev
, struct sk_buff
*pkt
)
2738 struct brcmf_bus
*bus_if
= dev_get_drvdata(dev
);
2739 struct brcmf_sdio_dev
*sdiodev
= bus_if
->bus_priv
.sdio
;
2740 struct brcmf_sdio
*bus
= sdiodev
->bus
;
2742 brcmf_dbg(TRACE
, "Enter: pkt: data %p len %d\n", pkt
->data
, pkt
->len
);
2743 if (sdiodev
->state
!= BRCMF_SDIOD_DATA
)
2746 /* Add space for the header */
2747 skb_push(pkt
, bus
->tx_hdrlen
);
2748 /* precondition: IS_ALIGNED((unsigned long)(pkt->data), 2) */
2750 prec
= prio2prec((pkt
->priority
& PRIOMASK
));
2752 /* Check for existing queue, current flow-control,
2753 pending event, or pending clock */
2754 brcmf_dbg(TRACE
, "deferring pktq len %d\n", pktq_len(&bus
->txq
));
2755 bus
->sdcnt
.fcqueued
++;
2757 /* Priority based enq */
2758 spin_lock_bh(&bus
->txq_lock
);
2759 /* reset bus_flags in packet cb */
2760 *(u16
*)(pkt
->cb
) = 0;
2761 if (!brcmf_sdio_prec_enq(&bus
->txq
, pkt
, prec
)) {
2762 skb_pull(pkt
, bus
->tx_hdrlen
);
2763 brcmf_err("out of bus->txq !!!\n");
2769 if (pktq_len(&bus
->txq
) >= TXHI
) {
2771 brcmf_proto_bcdc_txflowblock(dev
, true);
2773 spin_unlock_bh(&bus
->txq_lock
);
2776 if (pktq_plen(&bus
->txq
, prec
) > qcount
[prec
])
2777 qcount
[prec
] = pktq_plen(&bus
->txq
, prec
);
2780 brcmf_sdio_trigger_dpc(bus
);
2785 #define CONSOLE_LINE_MAX 192
2787 static int brcmf_sdio_readconsole(struct brcmf_sdio
*bus
)
2789 struct brcmf_console
*c
= &bus
->console
;
2790 u8 line
[CONSOLE_LINE_MAX
], ch
;
2794 /* Don't do anything until FWREADY updates console address */
2795 if (bus
->console_addr
== 0)
2798 /* Read console log struct */
2799 addr
= bus
->console_addr
+ offsetof(struct rte_console
, log_le
);
2800 rv
= brcmf_sdiod_ramrw(bus
->sdiodev
, false, addr
, (u8
*)&c
->log_le
,
2805 /* Allocate console buffer (one time only) */
2806 if (c
->buf
== NULL
) {
2807 c
->bufsize
= le32_to_cpu(c
->log_le
.buf_size
);
2808 c
->buf
= kmalloc(c
->bufsize
, GFP_ATOMIC
);
2813 idx
= le32_to_cpu(c
->log_le
.idx
);
2815 /* Protect against corrupt value */
2816 if (idx
> c
->bufsize
)
2819 /* Skip reading the console buffer if the index pointer
2824 /* Read the console buffer */
2825 addr
= le32_to_cpu(c
->log_le
.buf
);
2826 rv
= brcmf_sdiod_ramrw(bus
->sdiodev
, false, addr
, c
->buf
, c
->bufsize
);
2830 while (c
->last
!= idx
) {
2831 for (n
= 0; n
< CONSOLE_LINE_MAX
- 2; n
++) {
2832 if (c
->last
== idx
) {
2833 /* This would output a partial line.
2835 * the buffer pointer and output this
2836 * line next time around.
2841 c
->last
= c
->bufsize
- n
;
2844 ch
= c
->buf
[c
->last
];
2845 c
->last
= (c
->last
+ 1) % c
->bufsize
;
2852 if (line
[n
- 1] == '\r')
2855 pr_debug("CONSOLE: %s\n", line
);
2865 brcmf_sdio_bus_txctl(struct device
*dev
, unsigned char *msg
, uint msglen
)
2867 struct brcmf_bus
*bus_if
= dev_get_drvdata(dev
);
2868 struct brcmf_sdio_dev
*sdiodev
= bus_if
->bus_priv
.sdio
;
2869 struct brcmf_sdio
*bus
= sdiodev
->bus
;
2872 brcmf_dbg(TRACE
, "Enter\n");
2873 if (sdiodev
->state
!= BRCMF_SDIOD_DATA
)
2877 bus
->ctrl_frame_buf
= msg
;
2878 bus
->ctrl_frame_len
= msglen
;
2880 bus
->ctrl_frame_stat
= true;
2882 brcmf_sdio_trigger_dpc(bus
);
2883 wait_event_interruptible_timeout(bus
->ctrl_wait
, !bus
->ctrl_frame_stat
,
2886 if (bus
->ctrl_frame_stat
) {
2887 sdio_claim_host(bus
->sdiodev
->func
[1]);
2888 if (bus
->ctrl_frame_stat
) {
2889 brcmf_dbg(SDIO
, "ctrl_frame timeout\n");
2890 bus
->ctrl_frame_stat
= false;
2893 sdio_release_host(bus
->sdiodev
->func
[1]);
2896 brcmf_dbg(SDIO
, "ctrl_frame complete, err=%d\n",
2897 bus
->ctrl_frame_err
);
2899 ret
= bus
->ctrl_frame_err
;
2903 bus
->sdcnt
.tx_ctlerrs
++;
2905 bus
->sdcnt
.tx_ctlpkts
++;
2911 static int brcmf_sdio_dump_console(struct seq_file
*seq
, struct brcmf_sdio
*bus
,
2912 struct sdpcm_shared
*sh
)
2914 u32 addr
, console_ptr
, console_size
, console_index
;
2915 char *conbuf
= NULL
;
2919 /* obtain console information from device memory */
2920 addr
= sh
->console_addr
+ offsetof(struct rte_console
, log_le
);
2921 rv
= brcmf_sdiod_ramrw(bus
->sdiodev
, false, addr
,
2922 (u8
*)&sh_val
, sizeof(u32
));
2925 console_ptr
= le32_to_cpu(sh_val
);
2927 addr
= sh
->console_addr
+ offsetof(struct rte_console
, log_le
.buf_size
);
2928 rv
= brcmf_sdiod_ramrw(bus
->sdiodev
, false, addr
,
2929 (u8
*)&sh_val
, sizeof(u32
));
2932 console_size
= le32_to_cpu(sh_val
);
2934 addr
= sh
->console_addr
+ offsetof(struct rte_console
, log_le
.idx
);
2935 rv
= brcmf_sdiod_ramrw(bus
->sdiodev
, false, addr
,
2936 (u8
*)&sh_val
, sizeof(u32
));
2939 console_index
= le32_to_cpu(sh_val
);
2941 /* allocate buffer for console data */
2942 if (console_size
<= CONSOLE_BUFFER_MAX
)
2943 conbuf
= vzalloc(console_size
+1);
2948 /* obtain the console data from device */
2949 conbuf
[console_size
] = '\0';
2950 rv
= brcmf_sdiod_ramrw(bus
->sdiodev
, false, console_ptr
, (u8
*)conbuf
,
2955 rv
= seq_write(seq
, conbuf
+ console_index
,
2956 console_size
- console_index
);
2960 if (console_index
> 0)
2961 rv
= seq_write(seq
, conbuf
, console_index
- 1);
2968 static int brcmf_sdio_trap_info(struct seq_file
*seq
, struct brcmf_sdio
*bus
,
2969 struct sdpcm_shared
*sh
)
2972 struct brcmf_trap_info tr
;
2974 if ((sh
->flags
& SDPCM_SHARED_TRAP
) == 0) {
2975 brcmf_dbg(INFO
, "no trap in firmware\n");
2979 error
= brcmf_sdiod_ramrw(bus
->sdiodev
, false, sh
->trap_addr
, (u8
*)&tr
,
2980 sizeof(struct brcmf_trap_info
));
2985 "dongle trap info: type 0x%x @ epc 0x%08x\n"
2986 " cpsr 0x%08x spsr 0x%08x sp 0x%08x\n"
2987 " lr 0x%08x pc 0x%08x offset 0x%x\n"
2988 " r0 0x%08x r1 0x%08x r2 0x%08x r3 0x%08x\n"
2989 " r4 0x%08x r5 0x%08x r6 0x%08x r7 0x%08x\n",
2990 le32_to_cpu(tr
.type
), le32_to_cpu(tr
.epc
),
2991 le32_to_cpu(tr
.cpsr
), le32_to_cpu(tr
.spsr
),
2992 le32_to_cpu(tr
.r13
), le32_to_cpu(tr
.r14
),
2993 le32_to_cpu(tr
.pc
), sh
->trap_addr
,
2994 le32_to_cpu(tr
.r0
), le32_to_cpu(tr
.r1
),
2995 le32_to_cpu(tr
.r2
), le32_to_cpu(tr
.r3
),
2996 le32_to_cpu(tr
.r4
), le32_to_cpu(tr
.r5
),
2997 le32_to_cpu(tr
.r6
), le32_to_cpu(tr
.r7
));
3002 static int brcmf_sdio_assert_info(struct seq_file
*seq
, struct brcmf_sdio
*bus
,
3003 struct sdpcm_shared
*sh
)
3006 char file
[80] = "?";
3007 char expr
[80] = "<???>";
3009 if ((sh
->flags
& SDPCM_SHARED_ASSERT_BUILT
) == 0) {
3010 brcmf_dbg(INFO
, "firmware not built with -assert\n");
3012 } else if ((sh
->flags
& SDPCM_SHARED_ASSERT
) == 0) {
3013 brcmf_dbg(INFO
, "no assert in dongle\n");
3017 sdio_claim_host(bus
->sdiodev
->func
[1]);
3018 if (sh
->assert_file_addr
!= 0) {
3019 error
= brcmf_sdiod_ramrw(bus
->sdiodev
, false,
3020 sh
->assert_file_addr
, (u8
*)file
, 80);
3024 if (sh
->assert_exp_addr
!= 0) {
3025 error
= brcmf_sdiod_ramrw(bus
->sdiodev
, false,
3026 sh
->assert_exp_addr
, (u8
*)expr
, 80);
3030 sdio_release_host(bus
->sdiodev
->func
[1]);
3032 seq_printf(seq
, "dongle assert: %s:%d: assert(%s)\n",
3033 file
, sh
->assert_line
, expr
);
3037 static int brcmf_sdio_checkdied(struct brcmf_sdio
*bus
)
3040 struct sdpcm_shared sh
;
3042 error
= brcmf_sdio_readshared(bus
, &sh
);
3047 if ((sh
.flags
& SDPCM_SHARED_ASSERT_BUILT
) == 0)
3048 brcmf_dbg(INFO
, "firmware not built with -assert\n");
3049 else if (sh
.flags
& SDPCM_SHARED_ASSERT
)
3050 brcmf_err("assertion in dongle\n");
3052 if (sh
.flags
& SDPCM_SHARED_TRAP
)
3053 brcmf_err("firmware trap in dongle\n");
3058 static int brcmf_sdio_died_dump(struct seq_file
*seq
, struct brcmf_sdio
*bus
)
3061 struct sdpcm_shared sh
;
3063 error
= brcmf_sdio_readshared(bus
, &sh
);
3067 error
= brcmf_sdio_assert_info(seq
, bus
, &sh
);
3071 error
= brcmf_sdio_trap_info(seq
, bus
, &sh
);
3075 error
= brcmf_sdio_dump_console(seq
, bus
, &sh
);
3081 static int brcmf_sdio_forensic_read(struct seq_file
*seq
, void *data
)
3083 struct brcmf_bus
*bus_if
= dev_get_drvdata(seq
->private);
3084 struct brcmf_sdio
*bus
= bus_if
->bus_priv
.sdio
->bus
;
3086 return brcmf_sdio_died_dump(seq
, bus
);
3089 static int brcmf_debugfs_sdio_count_read(struct seq_file
*seq
, void *data
)
3091 struct brcmf_bus
*bus_if
= dev_get_drvdata(seq
->private);
3092 struct brcmf_sdio_dev
*sdiodev
= bus_if
->bus_priv
.sdio
;
3093 struct brcmf_sdio_count
*sdcnt
= &sdiodev
->bus
->sdcnt
;
3096 "intrcount: %u\nlastintrs: %u\n"
3097 "pollcnt: %u\nregfails: %u\n"
3098 "tx_sderrs: %u\nfcqueued: %u\n"
3099 "rxrtx: %u\nrx_toolong: %u\n"
3100 "rxc_errors: %u\nrx_hdrfail: %u\n"
3101 "rx_badhdr: %u\nrx_badseq: %u\n"
3102 "fc_rcvd: %u\nfc_xoff: %u\n"
3103 "fc_xon: %u\nrxglomfail: %u\n"
3104 "rxglomframes: %u\nrxglompkts: %u\n"
3105 "f2rxhdrs: %u\nf2rxdata: %u\n"
3106 "f2txdata: %u\nf1regdata: %u\n"
3107 "tickcnt: %u\ntx_ctlerrs: %lu\n"
3108 "tx_ctlpkts: %lu\nrx_ctlerrs: %lu\n"
3109 "rx_ctlpkts: %lu\nrx_readahead: %lu\n",
3110 sdcnt
->intrcount
, sdcnt
->lastintrs
,
3111 sdcnt
->pollcnt
, sdcnt
->regfails
,
3112 sdcnt
->tx_sderrs
, sdcnt
->fcqueued
,
3113 sdcnt
->rxrtx
, sdcnt
->rx_toolong
,
3114 sdcnt
->rxc_errors
, sdcnt
->rx_hdrfail
,
3115 sdcnt
->rx_badhdr
, sdcnt
->rx_badseq
,
3116 sdcnt
->fc_rcvd
, sdcnt
->fc_xoff
,
3117 sdcnt
->fc_xon
, sdcnt
->rxglomfail
,
3118 sdcnt
->rxglomframes
, sdcnt
->rxglompkts
,
3119 sdcnt
->f2rxhdrs
, sdcnt
->f2rxdata
,
3120 sdcnt
->f2txdata
, sdcnt
->f1regdata
,
3121 sdcnt
->tickcnt
, sdcnt
->tx_ctlerrs
,
3122 sdcnt
->tx_ctlpkts
, sdcnt
->rx_ctlerrs
,
3123 sdcnt
->rx_ctlpkts
, sdcnt
->rx_readahead_cnt
);
3128 static void brcmf_sdio_debugfs_create(struct brcmf_sdio
*bus
)
3130 struct brcmf_pub
*drvr
= bus
->sdiodev
->bus_if
->drvr
;
3131 struct dentry
*dentry
= brcmf_debugfs_get_devdir(drvr
);
3133 if (IS_ERR_OR_NULL(dentry
))
3136 bus
->console_interval
= BRCMF_CONSOLE
;
3138 brcmf_debugfs_add_entry(drvr
, "forensics", brcmf_sdio_forensic_read
);
3139 brcmf_debugfs_add_entry(drvr
, "counters",
3140 brcmf_debugfs_sdio_count_read
);
3141 debugfs_create_u32("console_interval", 0644, dentry
,
3142 &bus
->console_interval
);
3145 static int brcmf_sdio_checkdied(struct brcmf_sdio
*bus
)
3150 static void brcmf_sdio_debugfs_create(struct brcmf_sdio
*bus
)
3156 brcmf_sdio_bus_rxctl(struct device
*dev
, unsigned char *msg
, uint msglen
)
3162 struct brcmf_bus
*bus_if
= dev_get_drvdata(dev
);
3163 struct brcmf_sdio_dev
*sdiodev
= bus_if
->bus_priv
.sdio
;
3164 struct brcmf_sdio
*bus
= sdiodev
->bus
;
3166 brcmf_dbg(TRACE
, "Enter\n");
3167 if (sdiodev
->state
!= BRCMF_SDIOD_DATA
)
3170 /* Wait until control frame is available */
3171 timeleft
= brcmf_sdio_dcmd_resp_wait(bus
, &bus
->rxlen
, &pending
);
3173 spin_lock_bh(&bus
->rxctl_lock
);
3175 memcpy(msg
, bus
->rxctl
, min(msglen
, rxlen
));
3177 buf
= bus
->rxctl_orig
;
3178 bus
->rxctl_orig
= NULL
;
3180 spin_unlock_bh(&bus
->rxctl_lock
);
3184 brcmf_dbg(CTL
, "resumed on rxctl frame, got %d expected %d\n",
3186 } else if (timeleft
== 0) {
3187 brcmf_err("resumed on timeout\n");
3188 brcmf_sdio_checkdied(bus
);
3189 } else if (pending
) {
3190 brcmf_dbg(CTL
, "cancelled\n");
3191 return -ERESTARTSYS
;
3193 brcmf_dbg(CTL
, "resumed for unknown reason?\n");
3194 brcmf_sdio_checkdied(bus
);
3198 bus
->sdcnt
.rx_ctlpkts
++;
3200 bus
->sdcnt
.rx_ctlerrs
++;
3202 return rxlen
? (int)rxlen
: -ETIMEDOUT
;
3207 brcmf_sdio_verifymemory(struct brcmf_sdio_dev
*sdiodev
, u32 ram_addr
,
3208 u8
*ram_data
, uint ram_sz
)
3217 /* read back and verify */
3218 brcmf_dbg(INFO
, "Compare RAM dl & ul at 0x%08x; size=%d\n", ram_addr
,
3220 ram_cmp
= kmalloc(MEMBLOCK
, GFP_KERNEL
);
3221 /* do not proceed while no memory but */
3227 while (offset
< ram_sz
) {
3228 len
= ((offset
+ MEMBLOCK
) < ram_sz
) ? MEMBLOCK
:
3230 err
= brcmf_sdiod_ramrw(sdiodev
, false, address
, ram_cmp
, len
);
3232 brcmf_err("error %d on reading %d membytes at 0x%08x\n",
3236 } else if (memcmp(ram_cmp
, &ram_data
[offset
], len
)) {
3237 brcmf_err("Downloaded RAM image is corrupted, block offset is %d, len is %d\n",
3252 brcmf_sdio_verifymemory(struct brcmf_sdio_dev
*sdiodev
, u32 ram_addr
,
3253 u8
*ram_data
, uint ram_sz
)
3259 static int brcmf_sdio_download_code_file(struct brcmf_sdio
*bus
,
3260 const struct firmware
*fw
)
3264 brcmf_dbg(TRACE
, "Enter\n");
3266 err
= brcmf_sdiod_ramrw(bus
->sdiodev
, true, bus
->ci
->rambase
,
3267 (u8
*)fw
->data
, fw
->size
);
3269 brcmf_err("error %d on writing %d membytes at 0x%08x\n",
3270 err
, (int)fw
->size
, bus
->ci
->rambase
);
3271 else if (!brcmf_sdio_verifymemory(bus
->sdiodev
, bus
->ci
->rambase
,
3272 (u8
*)fw
->data
, fw
->size
))
3278 static int brcmf_sdio_download_nvram(struct brcmf_sdio
*bus
,
3279 void *vars
, u32 varsz
)
3284 brcmf_dbg(TRACE
, "Enter\n");
3286 address
= bus
->ci
->ramsize
- varsz
+ bus
->ci
->rambase
;
3287 err
= brcmf_sdiod_ramrw(bus
->sdiodev
, true, address
, vars
, varsz
);
3289 brcmf_err("error %d on writing %d nvram bytes at 0x%08x\n",
3290 err
, varsz
, address
);
3291 else if (!brcmf_sdio_verifymemory(bus
->sdiodev
, address
, vars
, varsz
))
3297 static int brcmf_sdio_download_firmware(struct brcmf_sdio
*bus
,
3298 const struct firmware
*fw
,
3299 void *nvram
, u32 nvlen
)
3304 sdio_claim_host(bus
->sdiodev
->func
[1]);
3305 brcmf_sdio_clkctl(bus
, CLK_AVAIL
, false);
3307 rstvec
= get_unaligned_le32(fw
->data
);
3308 brcmf_dbg(SDIO
, "firmware rstvec: %x\n", rstvec
);
3310 bcmerror
= brcmf_sdio_download_code_file(bus
, fw
);
3311 release_firmware(fw
);
3313 brcmf_err("dongle image file download failed\n");
3314 brcmf_fw_nvram_free(nvram
);
3318 bcmerror
= brcmf_sdio_download_nvram(bus
, nvram
, nvlen
);
3319 brcmf_fw_nvram_free(nvram
);
3321 brcmf_err("dongle nvram file download failed\n");
3325 /* Take arm out of reset */
3326 if (!brcmf_chip_set_active(bus
->ci
, rstvec
)) {
3327 brcmf_err("error getting out of ARM core reset\n");
3332 brcmf_sdio_clkctl(bus
, CLK_SDONLY
, false);
3333 sdio_release_host(bus
->sdiodev
->func
[1]);
3337 static void brcmf_sdio_sr_init(struct brcmf_sdio
*bus
)
3342 brcmf_dbg(TRACE
, "Enter\n");
3344 val
= brcmf_sdiod_regrb(bus
->sdiodev
, SBSDIO_FUNC1_WAKEUPCTRL
, &err
);
3346 brcmf_err("error reading SBSDIO_FUNC1_WAKEUPCTRL\n");
3350 val
|= 1 << SBSDIO_FUNC1_WCTRL_HTWAIT_SHIFT
;
3351 brcmf_sdiod_regwb(bus
->sdiodev
, SBSDIO_FUNC1_WAKEUPCTRL
, val
, &err
);
3353 brcmf_err("error writing SBSDIO_FUNC1_WAKEUPCTRL\n");
3357 /* Add CMD14 Support */
3358 brcmf_sdiod_regwb(bus
->sdiodev
, SDIO_CCCR_BRCM_CARDCAP
,
3359 (SDIO_CCCR_BRCM_CARDCAP_CMD14_SUPPORT
|
3360 SDIO_CCCR_BRCM_CARDCAP_CMD14_EXT
),
3363 brcmf_err("error writing SDIO_CCCR_BRCM_CARDCAP\n");
3367 brcmf_sdiod_regwb(bus
->sdiodev
, SBSDIO_FUNC1_CHIPCLKCSR
,
3368 SBSDIO_FORCE_HT
, &err
);
3370 brcmf_err("error writing SBSDIO_FUNC1_CHIPCLKCSR\n");
3375 bus
->sr_enabled
= true;
3376 brcmf_dbg(INFO
, "SR enabled\n");
3379 /* enable KSO bit */
3380 static int brcmf_sdio_kso_init(struct brcmf_sdio
*bus
)
3385 brcmf_dbg(TRACE
, "Enter\n");
3387 /* KSO bit added in SDIO core rev 12 */
3388 if (brcmf_chip_get_core(bus
->ci
, BCMA_CORE_SDIO_DEV
)->rev
< 12)
3391 val
= brcmf_sdiod_regrb(bus
->sdiodev
, SBSDIO_FUNC1_SLEEPCSR
, &err
);
3393 brcmf_err("error reading SBSDIO_FUNC1_SLEEPCSR\n");
3397 if (!(val
& SBSDIO_FUNC1_SLEEPCSR_KSO_MASK
)) {
3398 val
|= (SBSDIO_FUNC1_SLEEPCSR_KSO_EN
<<
3399 SBSDIO_FUNC1_SLEEPCSR_KSO_SHIFT
);
3400 brcmf_sdiod_regwb(bus
->sdiodev
, SBSDIO_FUNC1_SLEEPCSR
,
3403 brcmf_err("error writing SBSDIO_FUNC1_SLEEPCSR\n");
3412 static int brcmf_sdio_bus_preinit(struct device
*dev
)
3414 struct brcmf_bus
*bus_if
= dev_get_drvdata(dev
);
3415 struct brcmf_sdio_dev
*sdiodev
= bus_if
->bus_priv
.sdio
;
3416 struct brcmf_sdio
*bus
= sdiodev
->bus
;
3421 /* the commands below use the terms tx and rx from
3422 * a device perspective, ie. bus:txglom affects the
3423 * bus transfers from device to host.
3425 if (brcmf_chip_get_core(bus
->ci
, BCMA_CORE_SDIO_DEV
)->rev
< 12) {
3426 /* for sdio core rev < 12, disable txgloming */
3428 err
= brcmf_iovar_data_set(dev
, "bus:txglom", &value
,
3431 /* otherwise, set txglomalign */
3432 value
= sdiodev
->settings
->bus
.sdio
.sd_sgentry_align
;
3433 /* SDIO ADMA requires at least 32 bit alignment */
3434 value
= max_t(u32
, value
, ALIGNMENT
);
3435 err
= brcmf_iovar_data_set(dev
, "bus:txglomalign", &value
,
3442 bus
->tx_hdrlen
= SDPCM_HWHDR_LEN
+ SDPCM_SWHDR_LEN
;
3443 if (sdiodev
->sg_support
) {
3444 bus
->txglom
= false;
3446 pad_size
= bus
->sdiodev
->func
[2]->cur_blksize
<< 1;
3447 err
= brcmf_iovar_data_set(bus
->sdiodev
->dev
, "bus:rxglom",
3448 &value
, sizeof(u32
));
3450 /* bus:rxglom is allowed to fail */
3454 bus
->tx_hdrlen
+= SDPCM_HWEXT_LEN
;
3457 brcmf_bus_add_txhdrlen(bus
->sdiodev
->dev
, bus
->tx_hdrlen
);
3463 static size_t brcmf_sdio_bus_get_ramsize(struct device
*dev
)
3465 struct brcmf_bus
*bus_if
= dev_get_drvdata(dev
);
3466 struct brcmf_sdio_dev
*sdiodev
= bus_if
->bus_priv
.sdio
;
3467 struct brcmf_sdio
*bus
= sdiodev
->bus
;
3469 return bus
->ci
->ramsize
- bus
->ci
->srsize
;
3472 static int brcmf_sdio_bus_get_memdump(struct device
*dev
, void *data
,
3475 struct brcmf_bus
*bus_if
= dev_get_drvdata(dev
);
3476 struct brcmf_sdio_dev
*sdiodev
= bus_if
->bus_priv
.sdio
;
3477 struct brcmf_sdio
*bus
= sdiodev
->bus
;
3483 brcmf_dbg(INFO
, "dump at 0x%08x: size=%zu\n", bus
->ci
->rambase
,
3486 address
= bus
->ci
->rambase
;
3488 sdio_claim_host(sdiodev
->func
[1]);
3489 while (offset
< mem_size
) {
3490 len
= ((offset
+ MEMBLOCK
) < mem_size
) ? MEMBLOCK
:
3492 err
= brcmf_sdiod_ramrw(sdiodev
, false, address
, data
, len
);
3494 brcmf_err("error %d on reading %d membytes at 0x%08x\n",
3504 sdio_release_host(sdiodev
->func
[1]);
3508 void brcmf_sdio_trigger_dpc(struct brcmf_sdio
*bus
)
3510 if (!bus
->dpc_triggered
) {
3511 bus
->dpc_triggered
= true;
3512 queue_work(bus
->brcmf_wq
, &bus
->datawork
);
3516 void brcmf_sdio_isr(struct brcmf_sdio
*bus
)
3518 brcmf_dbg(TRACE
, "Enter\n");
3521 brcmf_err("bus is null pointer, exiting\n");
3525 /* Count the interrupt call */
3526 bus
->sdcnt
.intrcount
++;
3528 atomic_set(&bus
->ipend
, 1);
3530 if (brcmf_sdio_intr_rstatus(bus
)) {
3531 brcmf_err("failed backplane access\n");
3534 /* Disable additional interrupts (is this needed now)? */
3536 brcmf_err("isr w/o interrupt configured!\n");
3538 bus
->dpc_triggered
= true;
3539 queue_work(bus
->brcmf_wq
, &bus
->datawork
);
3542 static void brcmf_sdio_bus_watchdog(struct brcmf_sdio
*bus
)
3544 brcmf_dbg(TIMER
, "Enter\n");
3546 /* Poll period: check device if appropriate. */
3547 if (!bus
->sr_enabled
&&
3548 bus
->poll
&& (++bus
->polltick
>= bus
->pollrate
)) {
3551 /* Reset poll tick */
3554 /* Check device if no interrupts */
3556 (bus
->sdcnt
.intrcount
== bus
->sdcnt
.lastintrs
)) {
3558 if (!bus
->dpc_triggered
) {
3561 sdio_claim_host(bus
->sdiodev
->func
[1]);
3562 devpend
= brcmf_sdiod_regrb(bus
->sdiodev
,
3565 sdio_release_host(bus
->sdiodev
->func
[1]);
3566 intstatus
= devpend
& (INTR_STATUS_FUNC1
|
3570 /* If there is something, make like the ISR and
3573 bus
->sdcnt
.pollcnt
++;
3574 atomic_set(&bus
->ipend
, 1);
3576 bus
->dpc_triggered
= true;
3577 queue_work(bus
->brcmf_wq
, &bus
->datawork
);
3581 /* Update interrupt tracking */
3582 bus
->sdcnt
.lastintrs
= bus
->sdcnt
.intrcount
;
3585 /* Poll for console output periodically */
3586 if (bus
->sdiodev
->state
== BRCMF_SDIOD_DATA
&& BRCMF_FWCON_ON() &&
3587 bus
->console_interval
!= 0) {
3588 bus
->console
.count
+= jiffies_to_msecs(BRCMF_WD_POLL
);
3589 if (bus
->console
.count
>= bus
->console_interval
) {
3590 bus
->console
.count
-= bus
->console_interval
;
3591 sdio_claim_host(bus
->sdiodev
->func
[1]);
3592 /* Make sure backplane clock is on */
3593 brcmf_sdio_bus_sleep(bus
, false, false);
3594 if (brcmf_sdio_readconsole(bus
) < 0)
3596 bus
->console_interval
= 0;
3597 sdio_release_host(bus
->sdiodev
->func
[1]);
3602 /* On idle timeout clear activity flag and/or turn off clock */
3603 if (!bus
->dpc_triggered
) {
3605 if ((!bus
->dpc_running
) && (bus
->idletime
> 0) &&
3606 (bus
->clkstate
== CLK_AVAIL
)) {
3608 if (bus
->idlecount
> bus
->idletime
) {
3609 brcmf_dbg(SDIO
, "idle\n");
3610 sdio_claim_host(bus
->sdiodev
->func
[1]);
3611 brcmf_sdio_wd_timer(bus
, false);
3613 brcmf_sdio_bus_sleep(bus
, true, false);
3614 sdio_release_host(bus
->sdiodev
->func
[1]);
3624 static void brcmf_sdio_dataworker(struct work_struct
*work
)
3626 struct brcmf_sdio
*bus
= container_of(work
, struct brcmf_sdio
,
3629 bus
->dpc_running
= true;
3631 while (ACCESS_ONCE(bus
->dpc_triggered
)) {
3632 bus
->dpc_triggered
= false;
3633 brcmf_sdio_dpc(bus
);
3636 bus
->dpc_running
= false;
3637 if (brcmf_sdiod_freezing(bus
->sdiodev
)) {
3638 brcmf_sdiod_change_state(bus
->sdiodev
, BRCMF_SDIOD_DOWN
);
3639 brcmf_sdiod_try_freeze(bus
->sdiodev
);
3640 brcmf_sdiod_change_state(bus
->sdiodev
, BRCMF_SDIOD_DATA
);
3645 brcmf_sdio_drivestrengthinit(struct brcmf_sdio_dev
*sdiodev
,
3646 struct brcmf_chip
*ci
, u32 drivestrength
)
3648 const struct sdiod_drive_str
*str_tab
= NULL
;
3652 u32 drivestrength_sel
= 0;
3656 if (!(ci
->cc_caps
& CC_CAP_PMU
))
3659 switch (SDIOD_DRVSTR_KEY(ci
->chip
, ci
->pmurev
)) {
3660 case SDIOD_DRVSTR_KEY(BRCM_CC_4330_CHIP_ID
, 12):
3661 str_tab
= sdiod_drvstr_tab1_1v8
;
3662 str_mask
= 0x00003800;
3665 case SDIOD_DRVSTR_KEY(BRCM_CC_4334_CHIP_ID
, 17):
3666 str_tab
= sdiod_drvstr_tab6_1v8
;
3667 str_mask
= 0x00001800;
3670 case SDIOD_DRVSTR_KEY(BRCM_CC_43143_CHIP_ID
, 17):
3671 /* note: 43143 does not support tristate */
3672 i
= ARRAY_SIZE(sdiod_drvstr_tab2_3v3
) - 1;
3673 if (drivestrength
>= sdiod_drvstr_tab2_3v3
[i
].strength
) {
3674 str_tab
= sdiod_drvstr_tab2_3v3
;
3675 str_mask
= 0x00000007;
3678 brcmf_err("Invalid SDIO Drive strength for chip %s, strength=%d\n",
3679 ci
->name
, drivestrength
);
3681 case SDIOD_DRVSTR_KEY(BRCM_CC_43362_CHIP_ID
, 13):
3682 str_tab
= sdiod_drive_strength_tab5_1v8
;
3683 str_mask
= 0x00003800;
3687 brcmf_dbg(INFO
, "No SDIO driver strength init needed for chip %s rev %d pmurev %d\n",
3688 ci
->name
, ci
->chiprev
, ci
->pmurev
);
3692 if (str_tab
!= NULL
) {
3693 struct brcmf_core
*pmu
= brcmf_chip_get_pmu(ci
);
3695 for (i
= 0; str_tab
[i
].strength
!= 0; i
++) {
3696 if (drivestrength
>= str_tab
[i
].strength
) {
3697 drivestrength_sel
= str_tab
[i
].sel
;
3701 addr
= CORE_CC_REG(pmu
->base
, chipcontrol_addr
);
3702 brcmf_sdiod_regwl(sdiodev
, addr
, 1, NULL
);
3703 cc_data_temp
= brcmf_sdiod_regrl(sdiodev
, addr
, NULL
);
3704 cc_data_temp
&= ~str_mask
;
3705 drivestrength_sel
<<= str_shift
;
3706 cc_data_temp
|= drivestrength_sel
;
3707 brcmf_sdiod_regwl(sdiodev
, addr
, cc_data_temp
, NULL
);
3709 brcmf_dbg(INFO
, "SDIO: %d mA (req=%d mA) drive strength selected, set to 0x%08x\n",
3710 str_tab
[i
].strength
, drivestrength
, cc_data_temp
);
3714 static int brcmf_sdio_buscoreprep(void *ctx
)
3716 struct brcmf_sdio_dev
*sdiodev
= ctx
;
3720 /* Try forcing SDIO core to do ALPAvail request only */
3721 clkset
= SBSDIO_FORCE_HW_CLKREQ_OFF
| SBSDIO_ALP_AVAIL_REQ
;
3722 brcmf_sdiod_regwb(sdiodev
, SBSDIO_FUNC1_CHIPCLKCSR
, clkset
, &err
);
3724 brcmf_err("error writing for HT off\n");
3728 /* If register supported, wait for ALPAvail and then force ALP */
3729 /* This may take up to 15 milliseconds */
3730 clkval
= brcmf_sdiod_regrb(sdiodev
,
3731 SBSDIO_FUNC1_CHIPCLKCSR
, NULL
);
3733 if ((clkval
& ~SBSDIO_AVBITS
) != clkset
) {
3734 brcmf_err("ChipClkCSR access: wrote 0x%02x read 0x%02x\n",
3739 SPINWAIT(((clkval
= brcmf_sdiod_regrb(sdiodev
,
3740 SBSDIO_FUNC1_CHIPCLKCSR
, NULL
)),
3741 !SBSDIO_ALPAV(clkval
)),
3742 PMU_MAX_TRANSITION_DLY
);
3743 if (!SBSDIO_ALPAV(clkval
)) {
3744 brcmf_err("timeout on ALPAV wait, clkval 0x%02x\n",
3749 clkset
= SBSDIO_FORCE_HW_CLKREQ_OFF
| SBSDIO_FORCE_ALP
;
3750 brcmf_sdiod_regwb(sdiodev
, SBSDIO_FUNC1_CHIPCLKCSR
, clkset
, &err
);
3753 /* Also, disable the extra SDIO pull-ups */
3754 brcmf_sdiod_regwb(sdiodev
, SBSDIO_FUNC1_SDIOPULLUP
, 0, NULL
);
3759 static void brcmf_sdio_buscore_activate(void *ctx
, struct brcmf_chip
*chip
,
3762 struct brcmf_sdio_dev
*sdiodev
= ctx
;
3763 struct brcmf_core
*core
;
3766 /* clear all interrupts */
3767 core
= brcmf_chip_get_core(chip
, BCMA_CORE_SDIO_DEV
);
3768 reg_addr
= core
->base
+ offsetof(struct sdpcmd_regs
, intstatus
);
3769 brcmf_sdiod_regwl(sdiodev
, reg_addr
, 0xFFFFFFFF, NULL
);
3772 /* Write reset vector to address 0 */
3773 brcmf_sdiod_ramrw(sdiodev
, true, 0, (void *)&rstvec
,
3777 static u32
brcmf_sdio_buscore_read32(void *ctx
, u32 addr
)
3779 struct brcmf_sdio_dev
*sdiodev
= ctx
;
3782 val
= brcmf_sdiod_regrl(sdiodev
, addr
, NULL
);
3783 if ((sdiodev
->func
[0]->device
== SDIO_DEVICE_ID_BROADCOM_4335_4339
||
3784 sdiodev
->func
[0]->device
== SDIO_DEVICE_ID_BROADCOM_4339
) &&
3785 addr
== CORE_CC_REG(SI_ENUM_BASE
, chipid
)) {
3786 rev
= (val
& CID_REV_MASK
) >> CID_REV_SHIFT
;
3788 val
&= ~CID_ID_MASK
;
3789 val
|= BRCM_CC_4339_CHIP_ID
;
3795 static void brcmf_sdio_buscore_write32(void *ctx
, u32 addr
, u32 val
)
3797 struct brcmf_sdio_dev
*sdiodev
= ctx
;
3799 brcmf_sdiod_regwl(sdiodev
, addr
, val
, NULL
);
3802 static const struct brcmf_buscore_ops brcmf_sdio_buscore_ops
= {
3803 .prepare
= brcmf_sdio_buscoreprep
,
3804 .activate
= brcmf_sdio_buscore_activate
,
3805 .read32
= brcmf_sdio_buscore_read32
,
3806 .write32
= brcmf_sdio_buscore_write32
,
3810 brcmf_sdio_probe_attach(struct brcmf_sdio
*bus
)
3812 struct brcmf_sdio_dev
*sdiodev
;
3819 sdiodev
= bus
->sdiodev
;
3820 sdio_claim_host(sdiodev
->func
[1]);
3822 pr_debug("F1 signature read @0x18000000=0x%4x\n",
3823 brcmf_sdiod_regrl(sdiodev
, SI_ENUM_BASE
, NULL
));
3826 * Force PLL off until brcmf_chip_attach()
3827 * programs PLL control regs
3830 brcmf_sdiod_regwb(sdiodev
, SBSDIO_FUNC1_CHIPCLKCSR
,
3831 BRCMF_INIT_CLKCTL1
, &err
);
3833 clkctl
= brcmf_sdiod_regrb(sdiodev
,
3834 SBSDIO_FUNC1_CHIPCLKCSR
, &err
);
3836 if (err
|| ((clkctl
& ~SBSDIO_AVBITS
) != BRCMF_INIT_CLKCTL1
)) {
3837 brcmf_err("ChipClkCSR access: err %d wrote 0x%02x read 0x%02x\n",
3838 err
, BRCMF_INIT_CLKCTL1
, clkctl
);
3842 bus
->ci
= brcmf_chip_attach(sdiodev
, &brcmf_sdio_buscore_ops
);
3843 if (IS_ERR(bus
->ci
)) {
3844 brcmf_err("brcmf_chip_attach failed!\n");
3848 sdiodev
->settings
= brcmf_get_module_param(sdiodev
->dev
,
3852 if (!sdiodev
->settings
) {
3853 brcmf_err("Failed to get device parameters\n");
3856 /* platform specific configuration:
3857 * alignments must be at least 4 bytes for ADMA
3859 bus
->head_align
= ALIGNMENT
;
3860 bus
->sgentry_align
= ALIGNMENT
;
3861 if (sdiodev
->settings
->bus
.sdio
.sd_head_align
> ALIGNMENT
)
3862 bus
->head_align
= sdiodev
->settings
->bus
.sdio
.sd_head_align
;
3863 if (sdiodev
->settings
->bus
.sdio
.sd_sgentry_align
> ALIGNMENT
)
3864 bus
->sgentry_align
=
3865 sdiodev
->settings
->bus
.sdio
.sd_sgentry_align
;
3867 /* allocate scatter-gather table. sg support
3868 * will be disabled upon allocation failure.
3870 brcmf_sdiod_sgtable_alloc(sdiodev
);
3872 #ifdef CONFIG_PM_SLEEP
3873 /* wowl can be supported when KEEP_POWER is true and (WAKE_SDIO_IRQ
3874 * is true or when platform data OOB irq is true).
3876 if ((sdio_get_host_pm_caps(sdiodev
->func
[1]) & MMC_PM_KEEP_POWER
) &&
3877 ((sdio_get_host_pm_caps(sdiodev
->func
[1]) & MMC_PM_WAKE_SDIO_IRQ
) ||
3878 (sdiodev
->settings
->bus
.sdio
.oob_irq_supported
)))
3879 sdiodev
->bus_if
->wowl_supported
= true;
3882 if (brcmf_sdio_kso_init(bus
)) {
3883 brcmf_err("error enabling KSO\n");
3887 if (sdiodev
->settings
->bus
.sdio
.drive_strength
)
3888 drivestrength
= sdiodev
->settings
->bus
.sdio
.drive_strength
;
3890 drivestrength
= DEFAULT_SDIO_DRIVE_STRENGTH
;
3891 brcmf_sdio_drivestrengthinit(sdiodev
, bus
->ci
, drivestrength
);
3893 /* Set card control so an SDIO card reset does a WLAN backplane reset */
3894 reg_val
= brcmf_sdiod_regrb(sdiodev
, SDIO_CCCR_BRCM_CARDCTRL
, &err
);
3898 reg_val
|= SDIO_CCCR_BRCM_CARDCTRL_WLANRESET
;
3900 brcmf_sdiod_regwb(sdiodev
, SDIO_CCCR_BRCM_CARDCTRL
, reg_val
, &err
);
3904 /* set PMUControl so a backplane reset does PMU state reload */
3905 reg_addr
= CORE_CC_REG(brcmf_chip_get_pmu(bus
->ci
)->base
, pmucontrol
);
3906 reg_val
= brcmf_sdiod_regrl(sdiodev
, reg_addr
, &err
);
3910 reg_val
|= (BCMA_CC_PMU_CTL_RES_RELOAD
<< BCMA_CC_PMU_CTL_RES_SHIFT
);
3912 brcmf_sdiod_regwl(sdiodev
, reg_addr
, reg_val
, &err
);
3916 sdio_release_host(sdiodev
->func
[1]);
3918 brcmu_pktq_init(&bus
->txq
, (PRIOMASK
+ 1), TXQLEN
);
3920 /* allocate header buffer */
3921 bus
->hdrbuf
= kzalloc(MAX_HDR_READ
+ bus
->head_align
, GFP_KERNEL
);
3924 /* Locate an appropriately-aligned portion of hdrbuf */
3925 bus
->rxhdr
= (u8
*) roundup((unsigned long)&bus
->hdrbuf
[0],
3928 /* Set the poll and/or interrupt flags */
3937 sdio_release_host(sdiodev
->func
[1]);
3942 brcmf_sdio_watchdog_thread(void *data
)
3944 struct brcmf_sdio
*bus
= (struct brcmf_sdio
*)data
;
3947 allow_signal(SIGTERM
);
3948 /* Run until signal received */
3949 brcmf_sdiod_freezer_count(bus
->sdiodev
);
3951 if (kthread_should_stop())
3953 brcmf_sdiod_freezer_uncount(bus
->sdiodev
);
3954 wait
= wait_for_completion_interruptible(&bus
->watchdog_wait
);
3955 brcmf_sdiod_freezer_count(bus
->sdiodev
);
3956 brcmf_sdiod_try_freeze(bus
->sdiodev
);
3958 brcmf_sdio_bus_watchdog(bus
);
3959 /* Count the tick for reference */
3960 bus
->sdcnt
.tickcnt
++;
3961 reinit_completion(&bus
->watchdog_wait
);
3969 brcmf_sdio_watchdog(unsigned long data
)
3971 struct brcmf_sdio
*bus
= (struct brcmf_sdio
*)data
;
3973 if (bus
->watchdog_tsk
) {
3974 complete(&bus
->watchdog_wait
);
3975 /* Reschedule the watchdog */
3977 mod_timer(&bus
->timer
,
3978 jiffies
+ BRCMF_WD_POLL
);
3982 static const struct brcmf_bus_ops brcmf_sdio_bus_ops
= {
3983 .stop
= brcmf_sdio_bus_stop
,
3984 .preinit
= brcmf_sdio_bus_preinit
,
3985 .txdata
= brcmf_sdio_bus_txdata
,
3986 .txctl
= brcmf_sdio_bus_txctl
,
3987 .rxctl
= brcmf_sdio_bus_rxctl
,
3988 .gettxq
= brcmf_sdio_bus_gettxq
,
3989 .wowl_config
= brcmf_sdio_wowl_config
,
3990 .get_ramsize
= brcmf_sdio_bus_get_ramsize
,
3991 .get_memdump
= brcmf_sdio_bus_get_memdump
,
3994 static void brcmf_sdio_firmware_callback(struct device
*dev
, int err
,
3995 const struct firmware
*code
,
3996 void *nvram
, u32 nvram_len
)
3998 struct brcmf_bus
*bus_if
;
3999 struct brcmf_sdio_dev
*sdiodev
;
4000 struct brcmf_sdio
*bus
;
4003 brcmf_dbg(TRACE
, "Enter: dev=%s, err=%d\n", dev_name(dev
), err
);
4004 bus_if
= dev_get_drvdata(dev
);
4005 sdiodev
= bus_if
->bus_priv
.sdio
;
4014 /* try to download image and nvram to the dongle */
4015 bus
->alp_only
= true;
4016 err
= brcmf_sdio_download_firmware(bus
, code
, nvram
, nvram_len
);
4019 bus
->alp_only
= false;
4021 /* Start the watchdog timer */
4022 bus
->sdcnt
.tickcnt
= 0;
4023 brcmf_sdio_wd_timer(bus
, true);
4025 sdio_claim_host(sdiodev
->func
[1]);
4027 /* Make sure backplane clock is on, needed to generate F2 interrupt */
4028 brcmf_sdio_clkctl(bus
, CLK_AVAIL
, false);
4029 if (bus
->clkstate
!= CLK_AVAIL
)
4032 /* Force clocks on backplane to be sure F2 interrupt propagates */
4033 saveclk
= brcmf_sdiod_regrb(sdiodev
, SBSDIO_FUNC1_CHIPCLKCSR
, &err
);
4035 brcmf_sdiod_regwb(sdiodev
, SBSDIO_FUNC1_CHIPCLKCSR
,
4036 (saveclk
| SBSDIO_FORCE_HT
), &err
);
4039 brcmf_err("Failed to force clock for F2: err %d\n", err
);
4043 /* Enable function 2 (frame transfers) */
4044 w_sdreg32(bus
, SDPCM_PROT_VERSION
<< SMB_DATA_VERSION_SHIFT
,
4045 offsetof(struct sdpcmd_regs
, tosbmailboxdata
));
4046 err
= sdio_enable_func(sdiodev
->func
[SDIO_FUNC_2
]);
4049 brcmf_dbg(INFO
, "enable F2: err=%d\n", err
);
4051 /* If F2 successfully enabled, set core and enable interrupts */
4053 /* Set up the interrupt mask and enable interrupts */
4054 bus
->hostintmask
= HOSTINTMASK
;
4055 w_sdreg32(bus
, bus
->hostintmask
,
4056 offsetof(struct sdpcmd_regs
, hostintmask
));
4058 brcmf_sdiod_regwb(sdiodev
, SBSDIO_WATERMARK
, 8, &err
);
4060 /* Disable F2 again */
4061 sdio_disable_func(sdiodev
->func
[SDIO_FUNC_2
]);
4065 if (brcmf_chip_sr_capable(bus
->ci
)) {
4066 brcmf_sdio_sr_init(bus
);
4068 /* Restore previous clock setting */
4069 brcmf_sdiod_regwb(sdiodev
, SBSDIO_FUNC1_CHIPCLKCSR
,
4074 /* Allow full data communication using DPC from now on. */
4075 brcmf_sdiod_change_state(bus
->sdiodev
, BRCMF_SDIOD_DATA
);
4077 err
= brcmf_sdiod_intr_register(sdiodev
);
4079 brcmf_err("intr register failed:%d\n", err
);
4082 /* If we didn't come up, turn off backplane clock */
4084 brcmf_sdio_clkctl(bus
, CLK_NONE
, false);
4086 sdio_release_host(sdiodev
->func
[1]);
4088 err
= brcmf_bus_started(dev
);
4090 brcmf_err("dongle is not responding\n");
4096 sdio_release_host(sdiodev
->func
[1]);
4098 brcmf_dbg(TRACE
, "failed: dev=%s, err=%d\n", dev_name(dev
), err
);
4099 device_release_driver(dev
);
4100 device_release_driver(&sdiodev
->func
[2]->dev
);
4103 struct brcmf_sdio
*brcmf_sdio_probe(struct brcmf_sdio_dev
*sdiodev
)
4106 struct brcmf_sdio
*bus
;
4107 struct workqueue_struct
*wq
;
4109 brcmf_dbg(TRACE
, "Enter\n");
4111 /* Allocate private bus interface state */
4112 bus
= kzalloc(sizeof(struct brcmf_sdio
), GFP_ATOMIC
);
4116 bus
->sdiodev
= sdiodev
;
4118 skb_queue_head_init(&bus
->glom
);
4119 bus
->txbound
= BRCMF_TXBOUND
;
4120 bus
->rxbound
= BRCMF_RXBOUND
;
4121 bus
->txminmax
= BRCMF_TXMINMAX
;
4122 bus
->tx_seq
= SDPCM_SEQ_WRAP
- 1;
4124 /* single-threaded workqueue */
4125 wq
= alloc_ordered_workqueue("brcmf_wq/%s", WQ_MEM_RECLAIM
,
4126 dev_name(&sdiodev
->func
[1]->dev
));
4128 brcmf_err("insufficient memory to create txworkqueue\n");
4131 brcmf_sdiod_freezer_count(sdiodev
);
4132 INIT_WORK(&bus
->datawork
, brcmf_sdio_dataworker
);
4135 /* attempt to attach to the dongle */
4136 if (!(brcmf_sdio_probe_attach(bus
))) {
4137 brcmf_err("brcmf_sdio_probe_attach failed\n");
4141 spin_lock_init(&bus
->rxctl_lock
);
4142 spin_lock_init(&bus
->txq_lock
);
4143 init_waitqueue_head(&bus
->ctrl_wait
);
4144 init_waitqueue_head(&bus
->dcmd_resp_wait
);
4146 /* Set up the watchdog timer */
4147 init_timer(&bus
->timer
);
4148 bus
->timer
.data
= (unsigned long)bus
;
4149 bus
->timer
.function
= brcmf_sdio_watchdog
;
4151 /* Initialize watchdog thread */
4152 init_completion(&bus
->watchdog_wait
);
4153 bus
->watchdog_tsk
= kthread_run(brcmf_sdio_watchdog_thread
,
4154 bus
, "brcmf_wdog/%s",
4155 dev_name(&sdiodev
->func
[1]->dev
));
4156 if (IS_ERR(bus
->watchdog_tsk
)) {
4157 pr_warn("brcmf_watchdog thread failed to start\n");
4158 bus
->watchdog_tsk
= NULL
;
4160 /* Initialize DPC thread */
4161 bus
->dpc_triggered
= false;
4162 bus
->dpc_running
= false;
4164 /* Assign bus interface call back */
4165 bus
->sdiodev
->bus_if
->dev
= bus
->sdiodev
->dev
;
4166 bus
->sdiodev
->bus_if
->ops
= &brcmf_sdio_bus_ops
;
4167 bus
->sdiodev
->bus_if
->chip
= bus
->ci
->chip
;
4168 bus
->sdiodev
->bus_if
->chiprev
= bus
->ci
->chiprev
;
4170 /* default sdio bus header length for tx packet */
4171 bus
->tx_hdrlen
= SDPCM_HWHDR_LEN
+ SDPCM_SWHDR_LEN
;
4173 /* Attach to the common layer, reserve hdr space */
4174 ret
= brcmf_attach(bus
->sdiodev
->dev
, bus
->sdiodev
->settings
);
4176 brcmf_err("brcmf_attach failed\n");
4180 /* Query the F2 block size, set roundup accordingly */
4181 bus
->blocksize
= bus
->sdiodev
->func
[2]->cur_blksize
;
4182 bus
->roundup
= min(max_roundup
, bus
->blocksize
);
4184 /* Allocate buffers */
4185 if (bus
->sdiodev
->bus_if
->maxctl
) {
4186 bus
->sdiodev
->bus_if
->maxctl
+= bus
->roundup
;
4188 roundup((bus
->sdiodev
->bus_if
->maxctl
+ SDPCM_HDRLEN
),
4189 ALIGNMENT
) + bus
->head_align
;
4190 bus
->rxbuf
= kmalloc(bus
->rxblen
, GFP_ATOMIC
);
4191 if (!(bus
->rxbuf
)) {
4192 brcmf_err("rxbuf allocation failed\n");
4197 sdio_claim_host(bus
->sdiodev
->func
[1]);
4199 /* Disable F2 to clear any intermediate frame state on the dongle */
4200 sdio_disable_func(bus
->sdiodev
->func
[SDIO_FUNC_2
]);
4202 bus
->rxflow
= false;
4204 /* Done with backplane-dependent accesses, can drop clock... */
4205 brcmf_sdiod_regwb(bus
->sdiodev
, SBSDIO_FUNC1_CHIPCLKCSR
, 0, NULL
);
4207 sdio_release_host(bus
->sdiodev
->func
[1]);
4209 /* ...and initialize clock/power states */
4210 bus
->clkstate
= CLK_SDONLY
;
4211 bus
->idletime
= BRCMF_IDLE_INTERVAL
;
4212 bus
->idleclock
= BRCMF_IDLE_ACTIVE
;
4215 bus
->sr_enabled
= false;
4217 brcmf_sdio_debugfs_create(bus
);
4218 brcmf_dbg(INFO
, "completed!!\n");
4220 ret
= brcmf_fw_map_chip_to_name(bus
->ci
->chip
, bus
->ci
->chiprev
,
4222 ARRAY_SIZE(brcmf_sdio_fwnames
),
4223 sdiodev
->fw_name
, sdiodev
->nvram_name
);
4227 ret
= brcmf_fw_get_firmwares(sdiodev
->dev
, BRCMF_FW_REQUEST_NVRAM
,
4228 sdiodev
->fw_name
, sdiodev
->nvram_name
,
4229 brcmf_sdio_firmware_callback
);
4231 brcmf_err("async firmware request failed: %d\n", ret
);
4238 brcmf_sdio_remove(bus
);
4242 /* Detach and free everything */
4243 void brcmf_sdio_remove(struct brcmf_sdio
*bus
)
4245 brcmf_dbg(TRACE
, "Enter\n");
4248 /* De-register interrupt handler */
4249 brcmf_sdiod_intr_unregister(bus
->sdiodev
);
4251 brcmf_detach(bus
->sdiodev
->dev
);
4253 cancel_work_sync(&bus
->datawork
);
4255 destroy_workqueue(bus
->brcmf_wq
);
4258 if (bus
->sdiodev
->state
!= BRCMF_SDIOD_NOMEDIUM
) {
4259 sdio_claim_host(bus
->sdiodev
->func
[1]);
4260 brcmf_sdio_wd_timer(bus
, false);
4261 brcmf_sdio_clkctl(bus
, CLK_AVAIL
, false);
4262 /* Leave the device in state where it is
4263 * 'passive'. This is done by resetting all
4267 brcmf_chip_set_passive(bus
->ci
);
4268 brcmf_sdio_clkctl(bus
, CLK_NONE
, false);
4269 sdio_release_host(bus
->sdiodev
->func
[1]);
4271 brcmf_chip_detach(bus
->ci
);
4273 if (bus
->sdiodev
->settings
)
4274 brcmf_release_module_param(bus
->sdiodev
->settings
);
4281 brcmf_dbg(TRACE
, "Disconnected\n");
4284 void brcmf_sdio_wd_timer(struct brcmf_sdio
*bus
, bool active
)
4286 /* Totally stop the timer */
4287 if (!active
&& bus
->wd_active
) {
4288 del_timer_sync(&bus
->timer
);
4289 bus
->wd_active
= false;
4293 /* don't start the wd until fw is loaded */
4294 if (bus
->sdiodev
->state
!= BRCMF_SDIOD_DATA
)
4298 if (!bus
->wd_active
) {
4299 /* Create timer again when watchdog period is
4300 dynamically changed or in the first instance
4302 bus
->timer
.expires
= jiffies
+ BRCMF_WD_POLL
;
4303 add_timer(&bus
->timer
);
4304 bus
->wd_active
= true;
4306 /* Re arm the timer, at last watchdog period */
4307 mod_timer(&bus
->timer
, jiffies
+ BRCMF_WD_POLL
);
4312 int brcmf_sdio_sleep(struct brcmf_sdio
*bus
, bool sleep
)
4316 sdio_claim_host(bus
->sdiodev
->func
[1]);
4317 ret
= brcmf_sdio_bus_sleep(bus
, sleep
, false);
4318 sdio_release_host(bus
->sdiodev
->func
[1]);