1 /* SPDX-License-Identifier: GPL-2.0-only */
2 /******************************************************************************
4 * Copyright(c) 2003 - 2011 Intel Corporation. All rights reserved.
7 * Intel Linux Wireless <ilw@linux.intel.com>
8 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
10 *****************************************************************************/
15 #include <linux/pci.h> /* for struct pci_device_id */
16 #include <linux/kernel.h>
17 #include <net/ieee80211_radiotap.h>
19 /* Hardware specific file defines the PCI IDs table for that hardware module */
20 extern const struct pci_device_id il3945_hw_card_ids
[];
24 extern const struct il_ops il3945_ops
;
26 /* Highest firmware API version supported */
27 #define IL3945_UCODE_API_MAX 2
29 /* Lowest firmware API version supported */
30 #define IL3945_UCODE_API_MIN 1
32 #define IL3945_FW_PRE "iwlwifi-3945-"
33 #define _IL3945_MODULE_FIRMWARE(api) IL3945_FW_PRE #api ".ucode"
34 #define IL3945_MODULE_FIRMWARE(api) _IL3945_MODULE_FIRMWARE(api)
36 /* Default noise level to report when noise measurement is not available.
37 * This may be because we're:
38 * 1) Not associated (4965, no beacon stats being sent to driver)
39 * 2) Scanning (noise measurement does not apply to associated channel)
40 * 3) Receiving CCK (3945 delivers noise info only for OFDM frames)
41 * Use default noise value of -127 ... this is below the range of measurable
42 * Rx dBm for either 3945 or 4965, so it can indicate "unmeasurable" to user.
43 * Also, -127 works better than 0 when averaging frames with/without
44 * noise info (e.g. averaging might be done in app); measured dBm values are
45 * always negative ... using a negative value as the default keeps all
46 * averages within an s8's (used in some apps) range of negative values. */
47 #define IL_NOISE_MEAS_NOT_AVAILABLE (-127)
49 /* Module parameters accessible from iwl-*.c */
50 extern struct il_mod_params il3945_mod_params
;
52 struct il3945_rate_scale_data
{
61 struct il3945_rs_sta
{
65 unsigned long last_partial_flush
;
66 unsigned long last_flush
;
73 struct timer_list rate_scale_flush
;
74 struct il3945_rate_scale_data win
[RATE_COUNT_3945
];
75 #ifdef CONFIG_MAC80211_DEBUGFS
76 struct dentry
*rs_sta_dbgfs_stats_table_file
;
79 /* used to be in sta_info */
84 * The common struct MUST be first because it is shared between
87 struct il3945_sta_priv
{
88 struct il_station_priv_common common
;
89 struct il3945_rs_sta rs_sta
;
99 * RTS threshold here is total size [2347] minus 4 FCS bytes
101 * a value of 0 means RTS on all data/management packets
102 * a value > max MSDU size means no RTS
103 * else RTS for data/management frames where MPDU is larger
106 #define DEFAULT_RTS_THRESHOLD 2347U
107 #define MIN_RTS_THRESHOLD 0U
108 #define MAX_RTS_THRESHOLD 2347U
109 #define MAX_MSDU_SIZE 2304U
110 #define MAX_MPDU_SIZE 2346U
111 #define DEFAULT_BEACON_INTERVAL 100U
112 #define DEFAULT_SHORT_RETRY_LIMIT 7U
113 #define DEFAULT_LONG_RETRY_LIMIT 4U
115 #define IL_TX_FIFO_AC0 0
116 #define IL_TX_FIFO_AC1 1
117 #define IL_TX_FIFO_AC2 2
118 #define IL_TX_FIFO_AC3 3
119 #define IL_TX_FIFO_HCCA_1 5
120 #define IL_TX_FIFO_HCCA_2 6
121 #define IL_TX_FIFO_NONE 7
123 #define IEEE80211_DATA_LEN 2304
124 #define IEEE80211_4ADDR_LEN 30
125 #define IEEE80211_HLEN (IEEE80211_4ADDR_LEN)
126 #define IEEE80211_FRAME_LEN (IEEE80211_DATA_LEN + IEEE80211_HLEN)
128 struct il3945_frame
{
130 struct ieee80211_hdr frame
;
131 struct il3945_tx_beacon_cmd beacon
;
132 u8 raw
[IEEE80211_FRAME_LEN
];
135 struct list_head list
;
138 #define SUP_RATE_11A_MAX_NUM_CHANNELS 8
139 #define SUP_RATE_11B_MAX_NUM_CHANNELS 4
140 #define SUP_RATE_11G_MAX_NUM_CHANNELS 12
142 #define IL_SUPPORTED_RATES_IE_LEN 8
144 #define SCAN_INTERVAL 100
146 #define MAX_TID_COUNT 9
148 #define IL_INVALID_RATE 0xFF
149 #define IL_INVALID_VALUE -1
151 #define STA_PS_STATUS_WAKE 0
152 #define STA_PS_STATUS_SLEEP 1
154 struct il3945_ibss_seq
{
158 unsigned long packet_time
;
159 struct list_head list
;
162 #define IL_RX_HDR(x) ((struct il3945_rx_frame_hdr *)(\
163 x->u.rx_frame.stats.payload + \
164 x->u.rx_frame.stats.phy_count))
165 #define IL_RX_END(x) ((struct il3945_rx_frame_end *)(\
166 IL_RX_HDR(x)->payload + \
167 le16_to_cpu(IL_RX_HDR(x)->len)))
168 #define IL_RX_STATS(x) (&x->u.rx_frame.stats)
169 #define IL_RX_DATA(x) (IL_RX_HDR(x)->payload)
171 /******************************************************************************
173 * Functions implemented in iwl3945-base.c which are forward declared here
176 *****************************************************************************/
177 int il3945_calc_db_from_ratio(int sig_ratio
);
178 void il3945_rx_replenish(void *data
);
179 void il3945_rx_queue_reset(struct il_priv
*il
, struct il_rx_queue
*rxq
);
180 unsigned int il3945_fill_beacon_frame(struct il_priv
*il
,
181 struct ieee80211_hdr
*hdr
, int left
);
182 int il3945_dump_nic_event_log(struct il_priv
*il
, bool full_log
, char **buf
,
184 void il3945_dump_nic_error_log(struct il_priv
*il
);
186 /******************************************************************************
188 * Functions implemented in iwl-[34]*.c which are forward declared here
189 * for use by iwl3945-base.c
191 * NOTE: The implementation of these functions are hardware specific
192 * which is why they are in the hardware specific files (vs. iwl-base.c)
194 * Naming convention --
195 * il3945_ <-- Its part of iwlwifi (should be changed to il3945_)
196 * il3945_hw_ <-- Hardware specific (implemented in iwl-XXXX.c by all HW)
197 * iwlXXXX_ <-- Hardware specific (implemented in iwl-XXXX.c for XXXX)
198 * il3945_bg_ <-- Called from work queue context
199 * il3945_mac_ <-- mac80211 callback
201 ****************************************************************************/
202 void il3945_hw_handler_setup(struct il_priv
*il
);
203 void il3945_hw_setup_deferred_work(struct il_priv
*il
);
204 void il3945_hw_cancel_deferred_work(struct il_priv
*il
);
205 int il3945_hw_rxq_stop(struct il_priv
*il
);
206 int il3945_hw_set_hw_params(struct il_priv
*il
);
207 int il3945_hw_nic_init(struct il_priv
*il
);
208 int il3945_hw_nic_stop_master(struct il_priv
*il
);
209 void il3945_hw_txq_ctx_free(struct il_priv
*il
);
210 void il3945_hw_txq_ctx_stop(struct il_priv
*il
);
211 int il3945_hw_nic_reset(struct il_priv
*il
);
212 int il3945_hw_txq_attach_buf_to_tfd(struct il_priv
*il
, struct il_tx_queue
*txq
,
213 dma_addr_t addr
, u16 len
, u8 reset
, u8 pad
);
214 void il3945_hw_txq_free_tfd(struct il_priv
*il
, struct il_tx_queue
*txq
);
215 int il3945_hw_get_temperature(struct il_priv
*il
);
216 int il3945_hw_tx_queue_init(struct il_priv
*il
, struct il_tx_queue
*txq
);
217 unsigned int il3945_hw_get_beacon_cmd(struct il_priv
*il
,
218 struct il3945_frame
*frame
, u8 rate
);
219 void il3945_hw_build_tx_cmd_rate(struct il_priv
*il
, struct il_device_cmd
*cmd
,
220 struct ieee80211_tx_info
*info
,
221 struct ieee80211_hdr
*hdr
, int sta_id
);
222 int il3945_hw_reg_send_txpower(struct il_priv
*il
);
223 int il3945_hw_reg_set_txpower(struct il_priv
*il
, s8 power
);
224 void il3945_hdl_stats(struct il_priv
*il
, struct il_rx_buf
*rxb
);
225 void il3945_hdl_c_stats(struct il_priv
*il
, struct il_rx_buf
*rxb
);
226 void il3945_disable_events(struct il_priv
*il
);
227 int il4965_get_temperature(const struct il_priv
*il
);
228 void il3945_post_associate(struct il_priv
*il
);
229 void il3945_config_ap(struct il_priv
*il
);
231 int il3945_commit_rxon(struct il_priv
*il
);
234 * il3945_hw_find_station - Find station id for a given BSSID
235 * @bssid: MAC address of station ID to find
237 * NOTE: This should not be hardware specific but the code has
238 * not yet been merged into a single common layer for managing the
241 u8
il3945_hw_find_station(struct il_priv
*il
, const u8
*bssid
);
243 __le32
il3945_get_antenna_flags(const struct il_priv
*il
);
244 int il3945_init_hw_rate_table(struct il_priv
*il
);
245 void il3945_reg_txpower_periodic(struct il_priv
*il
);
246 int il3945_txpower_set_from_eeprom(struct il_priv
*il
);
248 int il3945_rs_next_rate(struct il_priv
*il
, int rate
);
251 int il3945_request_scan(struct il_priv
*il
, struct ieee80211_vif
*vif
);
252 void il3945_post_scan(struct il_priv
*il
);
255 extern const struct il3945_rate_info il3945_rates
[RATE_COUNT_3945
];
258 #define IL39_RSSI_OFFSET 95
261 * EEPROM related constants, enums, and structures.
263 #define EEPROM_SKU_CAP_OP_MODE_MRC (1 << 7)
266 * Mapping of a Tx power level, at factory calibration temperature,
267 * to a radio/DSP gain table idx.
268 * One for each of 5 "sample" power levels in each band.
269 * v_det is measured at the factory, using the 3945's built-in power amplifier
270 * (PA) output voltage detector. This same detector is used during Tx of
271 * long packets in normal operation to provide feedback as to proper output
273 * Data copied from EEPROM.
274 * DO NOT ALTER THIS STRUCTURE!!!
276 struct il3945_eeprom_txpower_sample
{
277 u8 gain_idx
; /* idx into power (gain) setup table ... */
278 s8 power
; /* ... for this pwr level for this chnl group */
279 u16 v_det
; /* PA output voltage */
283 * Mappings of Tx power levels -> nominal radio/DSP gain table idxes.
284 * One for each channel group (a.k.a. "band") (1 for BG, 4 for A).
285 * Tx power setup code interpolates between the 5 "sample" power levels
286 * to determine the nominal setup for a requested power level.
287 * Data copied from EEPROM.
288 * DO NOT ALTER THIS STRUCTURE!!!
290 struct il3945_eeprom_txpower_group
{
291 struct il3945_eeprom_txpower_sample samples
[5]; /* 5 power levels */
292 s32 a
, b
, c
, d
, e
; /* coefficients for voltage->power
293 * formula (signed) */
294 s32 Fa
, Fb
, Fc
, Fd
, Fe
; /* these modify coeffs based on
295 * frequency (signed) */
296 s8 saturation_power
; /* highest power possible by h/w in this
298 u8 group_channel
; /* "representative" channel # in this band */
299 s16 temperature
; /* h/w temperature at factory calib this band
304 * Temperature-based Tx-power compensation data, not band-specific.
305 * These coefficients are use to modify a/b/c/d/e coeffs based on
306 * difference between current temperature and factory calib temperature.
307 * Data copied from EEPROM.
309 struct il3945_eeprom_temperature_corr
{
320 struct il3945_eeprom
{
322 u16 device_id
; /* abs.ofs: 16 */
324 u16 pmc
; /* abs.ofs: 20 */
326 u8 mac_address
[6]; /* abs.ofs: 42 */
328 u16 board_revision
; /* abs.ofs: 106 */
330 u8 board_pba_number
[9]; /* abs.ofs: 119 */
332 u16 version
; /* abs.ofs: 136 */
333 u8 sku_cap
; /* abs.ofs: 138 */
334 u8 leds_mode
; /* abs.ofs: 139 */
336 u16 wowlan_mode
; /* abs.ofs: 142 */
337 u16 leds_time_interval
; /* abs.ofs: 144 */
338 u8 leds_off_time
; /* abs.ofs: 146 */
339 u8 leds_on_time
; /* abs.ofs: 147 */
340 u8 almgor_m_version
; /* abs.ofs: 148 */
341 u8 antenna_switch_type
; /* abs.ofs: 149 */
343 u8 sku_id
[4]; /* abs.ofs: 192 */
346 * Per-channel regulatory data.
348 * Each channel that *might* be supported by 3945 has a fixed location
349 * in EEPROM containing EEPROM_CHANNEL_* usage flags (LSB) and max regulatory
352 * Entries immediately below are for 20 MHz channel width.
354 * 2.4 GHz channels 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14
356 u16 band_1_count
; /* abs.ofs: 196 */
357 struct il_eeprom_channel band_1_channels
[14]; /* abs.ofs: 198 */
360 * 4.9 GHz channels 183, 184, 185, 187, 188, 189, 192, 196,
361 * 5.0 GHz channels 7, 8, 11, 12, 16
362 * (4915-5080MHz) (none of these is ever supported)
364 u16 band_2_count
; /* abs.ofs: 226 */
365 struct il_eeprom_channel band_2_channels
[13]; /* abs.ofs: 228 */
368 * 5.2 GHz channels 34, 36, 38, 40, 42, 44, 46, 48, 52, 56, 60, 64
371 u16 band_3_count
; /* abs.ofs: 254 */
372 struct il_eeprom_channel band_3_channels
[12]; /* abs.ofs: 256 */
375 * 5.5 GHz channels 100, 104, 108, 112, 116, 120, 124, 128, 132, 136, 140
378 u16 band_4_count
; /* abs.ofs: 280 */
379 struct il_eeprom_channel band_4_channels
[11]; /* abs.ofs: 282 */
382 * 5.7 GHz channels 145, 149, 153, 157, 161, 165
385 u16 band_5_count
; /* abs.ofs: 304 */
386 struct il_eeprom_channel band_5_channels
[6]; /* abs.ofs: 306 */
391 * 3945 Txpower calibration data.
393 #define IL_NUM_TX_CALIB_GROUPS 5
394 struct il3945_eeprom_txpower_group groups
[IL_NUM_TX_CALIB_GROUPS
];
396 struct il3945_eeprom_temperature_corr corrections
; /* abs.ofs: 832 */
397 u8 reserved16
[172]; /* fill out to full 1024 byte block */
400 #define IL3945_EEPROM_IMG_SIZE 1024
404 #define PCI_CFG_REV_ID_BIT_BASIC_SKU (0x40) /* bit 6 */
405 #define PCI_CFG_REV_ID_BIT_RTP (0x80) /* bit 7 */
407 /* 4 DATA + 1 CMD. There are 2 HCCA queues that are not used. */
408 #define IL39_NUM_QUEUES 5
409 #define IL39_CMD_QUEUE_NUM 4
411 #define IL_DEFAULT_TX_RETRY 15
413 /*********************************************/
416 #define NUM_TFD_CHUNKS 4
418 #define TFD_CTL_COUNT_SET(n) (n << 24)
419 #define TFD_CTL_COUNT_GET(ctl) ((ctl >> 24) & 7)
420 #define TFD_CTL_PAD_SET(n) (n << 28)
421 #define TFD_CTL_PAD_GET(ctl) (ctl >> 28)
423 /* Sizes and addresses for instruction and data memory (SRAM) in
424 * 3945's embedded processor. Driver access is via HBUS_TARG_MEM_* regs. */
425 #define IL39_RTC_INST_LOWER_BOUND (0x000000)
426 #define IL39_RTC_INST_UPPER_BOUND (0x014000)
428 #define IL39_RTC_DATA_LOWER_BOUND (0x800000)
429 #define IL39_RTC_DATA_UPPER_BOUND (0x808000)
431 #define IL39_RTC_INST_SIZE (IL39_RTC_INST_UPPER_BOUND - \
432 IL39_RTC_INST_LOWER_BOUND)
433 #define IL39_RTC_DATA_SIZE (IL39_RTC_DATA_UPPER_BOUND - \
434 IL39_RTC_DATA_LOWER_BOUND)
436 #define IL39_MAX_INST_SIZE IL39_RTC_INST_SIZE
437 #define IL39_MAX_DATA_SIZE IL39_RTC_DATA_SIZE
439 /* Size of uCode instruction memory in bootstrap state machine */
440 #define IL39_MAX_BSM_SIZE IL39_RTC_INST_SIZE
443 il3945_hw_valid_rtc_data_addr(u32 addr
)
445 return (addr
>= IL39_RTC_DATA_LOWER_BOUND
&&
446 addr
< IL39_RTC_DATA_UPPER_BOUND
);
449 /* Base physical address of il3945_shared is provided to FH39_TSSR_CBB_BASE
450 * and &il3945_shared.rx_read_ptr[0] is provided to FH39_RCSR_RPTR_ADDR(0) */
451 struct il3945_shared
{
452 __le32 tx_base_ptr
[8];
455 /************************************/
456 /* iwl3945 Flow Handler Definitions */
457 /************************************/
460 * This I/O area is directly read/writable by driver (e.g. Linux uses writel())
461 * Addresses are offsets from device's PCI hardware base address.
463 #define FH39_MEM_LOWER_BOUND (0x0800)
464 #define FH39_MEM_UPPER_BOUND (0x1000)
466 #define FH39_CBCC_TBL (FH39_MEM_LOWER_BOUND + 0x140)
467 #define FH39_TFDB_TBL (FH39_MEM_LOWER_BOUND + 0x180)
468 #define FH39_RCSR_TBL (FH39_MEM_LOWER_BOUND + 0x400)
469 #define FH39_RSSR_TBL (FH39_MEM_LOWER_BOUND + 0x4c0)
470 #define FH39_TCSR_TBL (FH39_MEM_LOWER_BOUND + 0x500)
471 #define FH39_TSSR_TBL (FH39_MEM_LOWER_BOUND + 0x680)
473 /* TFDB (Transmit Frame Buffer Descriptor) */
474 #define FH39_TFDB(_ch, buf) (FH39_TFDB_TBL + \
475 ((_ch) * 2 + (buf)) * 0x28)
476 #define FH39_TFDB_CHNL_BUF_CTRL_REG(_ch) (FH39_TFDB_TBL + 0x50 * (_ch))
478 /* CBCC channel is [0,2] */
479 #define FH39_CBCC(_ch) (FH39_CBCC_TBL + (_ch) * 0x8)
480 #define FH39_CBCC_CTRL(_ch) (FH39_CBCC(_ch) + 0x00)
481 #define FH39_CBCC_BASE(_ch) (FH39_CBCC(_ch) + 0x04)
483 /* RCSR channel is [0,2] */
484 #define FH39_RCSR(_ch) (FH39_RCSR_TBL + (_ch) * 0x40)
485 #define FH39_RCSR_CONFIG(_ch) (FH39_RCSR(_ch) + 0x00)
486 #define FH39_RCSR_RBD_BASE(_ch) (FH39_RCSR(_ch) + 0x04)
487 #define FH39_RCSR_WPTR(_ch) (FH39_RCSR(_ch) + 0x20)
488 #define FH39_RCSR_RPTR_ADDR(_ch) (FH39_RCSR(_ch) + 0x24)
490 #define FH39_RSCSR_CHNL0_WPTR (FH39_RCSR_WPTR(0))
493 #define FH39_RSSR_CTRL (FH39_RSSR_TBL + 0x000)
494 #define FH39_RSSR_STATUS (FH39_RSSR_TBL + 0x004)
497 #define FH39_TCSR(_ch) (FH39_TCSR_TBL + (_ch) * 0x20)
498 #define FH39_TCSR_CONFIG(_ch) (FH39_TCSR(_ch) + 0x00)
499 #define FH39_TCSR_CREDIT(_ch) (FH39_TCSR(_ch) + 0x04)
500 #define FH39_TCSR_BUFF_STTS(_ch) (FH39_TCSR(_ch) + 0x08)
503 #define FH39_TSSR_CBB_BASE (FH39_TSSR_TBL + 0x000)
504 #define FH39_TSSR_MSG_CONFIG (FH39_TSSR_TBL + 0x008)
505 #define FH39_TSSR_TX_STATUS (FH39_TSSR_TBL + 0x010)
509 #define FH39_SRVC_CHNL (6)
511 #define FH39_RCSR_RX_CONFIG_REG_POS_RBDC_SIZE (20)
512 #define FH39_RCSR_RX_CONFIG_REG_POS_IRQ_RBTH (4)
514 #define FH39_RCSR_RX_CONFIG_REG_BIT_WR_STTS_EN (0x08000000)
516 #define FH39_RCSR_RX_CONFIG_REG_VAL_DMA_CHNL_EN_ENABLE (0x80000000)
518 #define FH39_RCSR_RX_CONFIG_REG_VAL_RDRBD_EN_ENABLE (0x20000000)
520 #define FH39_RCSR_RX_CONFIG_REG_VAL_MAX_FRAG_SIZE_128 (0x01000000)
522 #define FH39_RCSR_RX_CONFIG_REG_VAL_IRQ_DEST_INT_HOST (0x00001000)
524 #define FH39_RCSR_RX_CONFIG_REG_VAL_MSG_MODE_FH (0x00000000)
526 #define FH39_TCSR_TX_CONFIG_REG_VAL_MSG_MODE_TXF (0x00000000)
527 #define FH39_TCSR_TX_CONFIG_REG_VAL_MSG_MODE_DRIVER (0x00000001)
529 #define FH39_TCSR_TX_CONFIG_REG_VAL_DMA_CREDIT_DISABLE_VAL (0x00000000)
530 #define FH39_TCSR_TX_CONFIG_REG_VAL_DMA_CREDIT_ENABLE_VAL (0x00000008)
532 #define FH39_TCSR_TX_CONFIG_REG_VAL_CIRQ_HOST_IFTFD (0x00200000)
534 #define FH39_TCSR_TX_CONFIG_REG_VAL_CIRQ_RTC_NOINT (0x00000000)
536 #define FH39_TCSR_TX_CONFIG_REG_VAL_DMA_CHNL_PAUSE (0x00000000)
537 #define FH39_TCSR_TX_CONFIG_REG_VAL_DMA_CHNL_ENABLE (0x80000000)
539 #define FH39_TCSR_CHNL_TX_BUF_STS_REG_VAL_TFDB_VALID (0x00004000)
541 #define FH39_TCSR_CHNL_TX_BUF_STS_REG_BIT_TFDB_WPTR (0x00000001)
543 #define FH39_TSSR_TX_MSG_CONFIG_REG_VAL_SNOOP_RD_TXPD_ON (0xFF000000)
544 #define FH39_TSSR_TX_MSG_CONFIG_REG_VAL_ORDER_RD_TXPD_ON (0x00FF0000)
546 #define FH39_TSSR_TX_MSG_CONFIG_REG_VAL_MAX_FRAG_SIZE_128B (0x00000400)
548 #define FH39_TSSR_TX_MSG_CONFIG_REG_VAL_SNOOP_RD_TFD_ON (0x00000100)
549 #define FH39_TSSR_TX_MSG_CONFIG_REG_VAL_ORDER_RD_CBB_ON (0x00000080)
551 #define FH39_TSSR_TX_MSG_CONFIG_REG_VAL_ORDER_RSP_WAIT_TH (0x00000020)
552 #define FH39_TSSR_TX_MSG_CONFIG_REG_VAL_RSP_WAIT_TH (0x00000005)
554 #define FH39_TSSR_TX_STATUS_REG_BIT_BUFS_EMPTY(_ch) (BIT(_ch) << 24)
555 #define FH39_TSSR_TX_STATUS_REG_BIT_NO_PEND_REQ(_ch) (BIT(_ch) << 16)
557 #define FH39_TSSR_TX_STATUS_REG_MSK_CHNL_IDLE(_ch) \
558 (FH39_TSSR_TX_STATUS_REG_BIT_BUFS_EMPTY(_ch) | \
559 FH39_TSSR_TX_STATUS_REG_BIT_NO_PEND_REQ(_ch))
561 #define FH39_RSSR_CHNL0_RX_STATUS_CHNL_IDLE (0x01000000)
563 struct il3945_tfd_tb
{
569 __le32 control_flags
;
570 struct il3945_tfd_tb tbs
[4];
574 #ifdef CONFIG_IWLEGACY_DEBUGFS
575 extern const struct il_debugfs_ops il3945_debugfs_ops
;