1 /******************************************************************************
3 * This file is provided under a dual BSD/GPLv2 license. When using or
4 * redistributing this file, you may do so under either license.
8 * Copyright(c) 2008 - 2014 Intel Corporation. All rights reserved.
9 * Copyright(c) 2013 - 2015 Intel Mobile Communications GmbH
10 * Copyright(c) 2015 - 2017 Intel Deutschland GmbH
11 * Copyright(c) 2018 - 2019 Intel Corporation
13 * This program is free software; you can redistribute it and/or modify
14 * it under the terms of version 2 of the GNU General Public License as
15 * published by the Free Software Foundation.
17 * This program is distributed in the hope that it will be useful, but
18 * WITHOUT ANY WARRANTY; without even the implied warranty of
19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
20 * General Public License for more details.
22 * The full GNU General Public License is included in this distribution
23 * in the file called COPYING.
25 * Contact Information:
26 * Intel Linux Wireless <linuxwifi@intel.com>
27 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
31 * Copyright(c) 2005 - 2014 Intel Corporation. All rights reserved.
32 * Copyright(c) 2013 - 2015 Intel Mobile Communications GmbH
33 * Copyright(c) 2015 - 2017 Intel Deutschland GmbH
34 * Copyright(c) 2018 - 2019 Intel Corporation
35 * All rights reserved.
37 * Redistribution and use in source and binary forms, with or without
38 * modification, are permitted provided that the following conditions
41 * * Redistributions of source code must retain the above copyright
42 * notice, this list of conditions and the following disclaimer.
43 * * Redistributions in binary form must reproduce the above copyright
44 * notice, this list of conditions and the following disclaimer in
45 * the documentation and/or other materials provided with the
47 * * Neither the name Intel Corporation nor the names of its
48 * contributors may be used to endorse or promote products derived
49 * from this software without specific prior written permission.
51 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
52 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
53 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
54 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
55 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
56 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
57 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
58 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
59 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
60 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
61 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
63 *****************************************************************************/
64 #include <linux/devcoredump.h>
74 * struct iwl_fw_dump_ptrs - set of pointers needed for the fw-error-dump
76 * @fwrt_ptr: pointer to the buffer coming from fwrt
77 * @trans_ptr: pointer to struct %iwl_trans_dump_data which contains the
79 * @trans_len: length of the valid data in trans_ptr
80 * @fwrt_len: length of the valid data in fwrt_ptr
82 struct iwl_fw_dump_ptrs
{
83 struct iwl_trans_dump_data
*trans_ptr
;
88 #define RADIO_REG_MAX_READ 0x2ad
89 static void iwl_read_radio_regs(struct iwl_fw_runtime
*fwrt
,
90 struct iwl_fw_error_dump_data
**dump_data
)
92 u8
*pos
= (void *)(*dump_data
)->data
;
96 IWL_DEBUG_INFO(fwrt
, "WRT radio registers dump\n");
98 if (!iwl_trans_grab_nic_access(fwrt
->trans
, &flags
))
101 (*dump_data
)->type
= cpu_to_le32(IWL_FW_ERROR_DUMP_RADIO_REG
);
102 (*dump_data
)->len
= cpu_to_le32(RADIO_REG_MAX_READ
);
104 for (i
= 0; i
< RADIO_REG_MAX_READ
; i
++) {
105 u32 rd_cmd
= RADIO_RSP_RD_CMD
;
107 rd_cmd
|= i
<< RADIO_RSP_ADDR_POS
;
108 iwl_write_prph_no_grab(fwrt
->trans
, RSP_RADIO_CMD
, rd_cmd
);
109 *pos
= (u8
)iwl_read_prph_no_grab(fwrt
->trans
, RSP_RADIO_RDDAT
);
114 *dump_data
= iwl_fw_error_next_data(*dump_data
);
116 iwl_trans_release_nic_access(fwrt
->trans
, &flags
);
119 static void iwl_fwrt_dump_rxf(struct iwl_fw_runtime
*fwrt
,
120 struct iwl_fw_error_dump_data
**dump_data
,
121 int size
, u32 offset
, int fifo_num
)
123 struct iwl_fw_error_dump_fifo
*fifo_hdr
;
128 fifo_hdr
= (void *)(*dump_data
)->data
;
129 fifo_data
= (void *)fifo_hdr
->data
;
132 /* No need to try to read the data if the length is 0 */
136 /* Add a TLV for the RXF */
137 (*dump_data
)->type
= cpu_to_le32(IWL_FW_ERROR_DUMP_RXF
);
138 (*dump_data
)->len
= cpu_to_le32(fifo_len
+ sizeof(*fifo_hdr
));
140 fifo_hdr
->fifo_num
= cpu_to_le32(fifo_num
);
141 fifo_hdr
->available_bytes
=
142 cpu_to_le32(iwl_trans_read_prph(fwrt
->trans
,
143 RXF_RD_D_SPACE
+ offset
));
145 cpu_to_le32(iwl_trans_read_prph(fwrt
->trans
,
146 RXF_RD_WR_PTR
+ offset
));
148 cpu_to_le32(iwl_trans_read_prph(fwrt
->trans
,
149 RXF_RD_RD_PTR
+ offset
));
150 fifo_hdr
->fence_ptr
=
151 cpu_to_le32(iwl_trans_read_prph(fwrt
->trans
,
152 RXF_RD_FENCE_PTR
+ offset
));
153 fifo_hdr
->fence_mode
=
154 cpu_to_le32(iwl_trans_read_prph(fwrt
->trans
,
155 RXF_SET_FENCE_MODE
+ offset
));
158 iwl_trans_write_prph(fwrt
->trans
, RXF_SET_FENCE_MODE
+ offset
, 0x1);
159 /* Set fence pointer to the same place like WR pointer */
160 iwl_trans_write_prph(fwrt
->trans
, RXF_LD_WR2FENCE
+ offset
, 0x1);
161 /* Set fence offset */
162 iwl_trans_write_prph(fwrt
->trans
,
163 RXF_LD_FENCE_OFFSET_ADDR
+ offset
, 0x0);
166 fifo_len
/= sizeof(u32
); /* Size in DWORDS */
167 for (i
= 0; i
< fifo_len
; i
++)
168 fifo_data
[i
] = iwl_trans_read_prph(fwrt
->trans
,
169 RXF_FIFO_RD_FENCE_INC
+
171 *dump_data
= iwl_fw_error_next_data(*dump_data
);
174 static void iwl_fwrt_dump_txf(struct iwl_fw_runtime
*fwrt
,
175 struct iwl_fw_error_dump_data
**dump_data
,
176 int size
, u32 offset
, int fifo_num
)
178 struct iwl_fw_error_dump_fifo
*fifo_hdr
;
183 fifo_hdr
= (void *)(*dump_data
)->data
;
184 fifo_data
= (void *)fifo_hdr
->data
;
187 /* No need to try to read the data if the length is 0 */
191 /* Add a TLV for the FIFO */
192 (*dump_data
)->type
= cpu_to_le32(IWL_FW_ERROR_DUMP_TXF
);
193 (*dump_data
)->len
= cpu_to_le32(fifo_len
+ sizeof(*fifo_hdr
));
195 fifo_hdr
->fifo_num
= cpu_to_le32(fifo_num
);
196 fifo_hdr
->available_bytes
=
197 cpu_to_le32(iwl_trans_read_prph(fwrt
->trans
,
198 TXF_FIFO_ITEM_CNT
+ offset
));
200 cpu_to_le32(iwl_trans_read_prph(fwrt
->trans
,
201 TXF_WR_PTR
+ offset
));
203 cpu_to_le32(iwl_trans_read_prph(fwrt
->trans
,
204 TXF_RD_PTR
+ offset
));
205 fifo_hdr
->fence_ptr
=
206 cpu_to_le32(iwl_trans_read_prph(fwrt
->trans
,
207 TXF_FENCE_PTR
+ offset
));
208 fifo_hdr
->fence_mode
=
209 cpu_to_le32(iwl_trans_read_prph(fwrt
->trans
,
210 TXF_LOCK_FENCE
+ offset
));
212 /* Set the TXF_READ_MODIFY_ADDR to TXF_WR_PTR */
213 iwl_trans_write_prph(fwrt
->trans
, TXF_READ_MODIFY_ADDR
+ offset
,
214 TXF_WR_PTR
+ offset
);
216 /* Dummy-read to advance the read pointer to the head */
217 iwl_trans_read_prph(fwrt
->trans
, TXF_READ_MODIFY_DATA
+ offset
);
220 fifo_len
/= sizeof(u32
); /* Size in DWORDS */
221 for (i
= 0; i
< fifo_len
; i
++)
222 fifo_data
[i
] = iwl_trans_read_prph(fwrt
->trans
,
223 TXF_READ_MODIFY_DATA
+
225 *dump_data
= iwl_fw_error_next_data(*dump_data
);
228 static void iwl_fw_dump_rxf(struct iwl_fw_runtime
*fwrt
,
229 struct iwl_fw_error_dump_data
**dump_data
)
231 struct iwl_fwrt_shared_mem_cfg
*cfg
= &fwrt
->smem_cfg
;
234 IWL_DEBUG_INFO(fwrt
, "WRT RX FIFO dump\n");
236 if (!iwl_trans_grab_nic_access(fwrt
->trans
, &flags
))
239 if (iwl_fw_dbg_type_on(fwrt
, IWL_FW_ERROR_DUMP_RXF
)) {
241 iwl_fwrt_dump_rxf(fwrt
, dump_data
,
242 cfg
->lmac
[0].rxfifo1_size
, 0, 0);
244 iwl_fwrt_dump_rxf(fwrt
, dump_data
, cfg
->rxfifo2_size
,
246 fwrt
->trans
->trans_cfg
->umac_prph_offset
, 1);
247 /* Pull LMAC2 RXF1 */
248 if (fwrt
->smem_cfg
.num_lmacs
> 1)
249 iwl_fwrt_dump_rxf(fwrt
, dump_data
,
250 cfg
->lmac
[1].rxfifo1_size
,
251 LMAC2_PRPH_OFFSET
, 2);
254 iwl_trans_release_nic_access(fwrt
->trans
, &flags
);
257 static void iwl_fw_dump_txf(struct iwl_fw_runtime
*fwrt
,
258 struct iwl_fw_error_dump_data
**dump_data
)
260 struct iwl_fw_error_dump_fifo
*fifo_hdr
;
261 struct iwl_fwrt_shared_mem_cfg
*cfg
= &fwrt
->smem_cfg
;
267 IWL_DEBUG_INFO(fwrt
, "WRT TX FIFO dump\n");
269 if (!iwl_trans_grab_nic_access(fwrt
->trans
, &flags
))
272 if (iwl_fw_dbg_type_on(fwrt
, IWL_FW_ERROR_DUMP_TXF
)) {
273 /* Pull TXF data from LMAC1 */
274 for (i
= 0; i
< fwrt
->smem_cfg
.num_txfifo_entries
; i
++) {
275 /* Mark the number of TXF we're pulling now */
276 iwl_trans_write_prph(fwrt
->trans
, TXF_LARC_NUM
, i
);
277 iwl_fwrt_dump_txf(fwrt
, dump_data
,
278 cfg
->lmac
[0].txfifo_size
[i
], 0, i
);
281 /* Pull TXF data from LMAC2 */
282 if (fwrt
->smem_cfg
.num_lmacs
> 1) {
283 for (i
= 0; i
< fwrt
->smem_cfg
.num_txfifo_entries
;
285 /* Mark the number of TXF we're pulling now */
286 iwl_trans_write_prph(fwrt
->trans
,
288 LMAC2_PRPH_OFFSET
, i
);
289 iwl_fwrt_dump_txf(fwrt
, dump_data
,
290 cfg
->lmac
[1].txfifo_size
[i
],
292 i
+ cfg
->num_txfifo_entries
);
297 if (iwl_fw_dbg_type_on(fwrt
, IWL_FW_ERROR_DUMP_INTERNAL_TXF
) &&
298 fw_has_capa(&fwrt
->fw
->ucode_capa
,
299 IWL_UCODE_TLV_CAPA_EXTEND_SHARED_MEM_CFG
)) {
300 /* Pull UMAC internal TXF data from all TXFs */
302 i
< ARRAY_SIZE(fwrt
->smem_cfg
.internal_txfifo_size
);
304 fifo_hdr
= (void *)(*dump_data
)->data
;
305 fifo_data
= (void *)fifo_hdr
->data
;
306 fifo_len
= fwrt
->smem_cfg
.internal_txfifo_size
[i
];
308 /* No need to try to read the data if the length is 0 */
312 /* Add a TLV for the internal FIFOs */
314 cpu_to_le32(IWL_FW_ERROR_DUMP_INTERNAL_TXF
);
316 cpu_to_le32(fifo_len
+ sizeof(*fifo_hdr
));
318 fifo_hdr
->fifo_num
= cpu_to_le32(i
);
320 /* Mark the number of TXF we're pulling now */
321 iwl_trans_write_prph(fwrt
->trans
, TXF_CPU2_NUM
, i
+
322 fwrt
->smem_cfg
.num_txfifo_entries
);
324 fifo_hdr
->available_bytes
=
325 cpu_to_le32(iwl_trans_read_prph(fwrt
->trans
,
326 TXF_CPU2_FIFO_ITEM_CNT
));
328 cpu_to_le32(iwl_trans_read_prph(fwrt
->trans
,
331 cpu_to_le32(iwl_trans_read_prph(fwrt
->trans
,
333 fifo_hdr
->fence_ptr
=
334 cpu_to_le32(iwl_trans_read_prph(fwrt
->trans
,
335 TXF_CPU2_FENCE_PTR
));
336 fifo_hdr
->fence_mode
=
337 cpu_to_le32(iwl_trans_read_prph(fwrt
->trans
,
338 TXF_CPU2_LOCK_FENCE
));
340 /* Set TXF_CPU2_READ_MODIFY_ADDR to TXF_CPU2_WR_PTR */
341 iwl_trans_write_prph(fwrt
->trans
,
342 TXF_CPU2_READ_MODIFY_ADDR
,
345 /* Dummy-read to advance the read pointer to head */
346 iwl_trans_read_prph(fwrt
->trans
,
347 TXF_CPU2_READ_MODIFY_DATA
);
350 fifo_len
/= sizeof(u32
); /* Size in DWORDS */
351 for (j
= 0; j
< fifo_len
; j
++)
353 iwl_trans_read_prph(fwrt
->trans
,
354 TXF_CPU2_READ_MODIFY_DATA
);
355 *dump_data
= iwl_fw_error_next_data(*dump_data
);
359 iwl_trans_release_nic_access(fwrt
->trans
, &flags
);
362 #define IWL8260_ICCM_OFFSET 0x44000 /* Only for B-step */
363 #define IWL8260_ICCM_LEN 0xC000 /* Only for B-step */
365 struct iwl_prph_range
{
369 static const struct iwl_prph_range iwl_prph_dump_addr_comm
[] = {
370 { .start
= 0x00a00000, .end
= 0x00a00000 },
371 { .start
= 0x00a0000c, .end
= 0x00a00024 },
372 { .start
= 0x00a0002c, .end
= 0x00a0003c },
373 { .start
= 0x00a00410, .end
= 0x00a00418 },
374 { .start
= 0x00a00420, .end
= 0x00a00420 },
375 { .start
= 0x00a00428, .end
= 0x00a00428 },
376 { .start
= 0x00a00430, .end
= 0x00a0043c },
377 { .start
= 0x00a00444, .end
= 0x00a00444 },
378 { .start
= 0x00a004c0, .end
= 0x00a004cc },
379 { .start
= 0x00a004d8, .end
= 0x00a004d8 },
380 { .start
= 0x00a004e0, .end
= 0x00a004f0 },
381 { .start
= 0x00a00840, .end
= 0x00a00840 },
382 { .start
= 0x00a00850, .end
= 0x00a00858 },
383 { .start
= 0x00a01004, .end
= 0x00a01008 },
384 { .start
= 0x00a01010, .end
= 0x00a01010 },
385 { .start
= 0x00a01018, .end
= 0x00a01018 },
386 { .start
= 0x00a01024, .end
= 0x00a01024 },
387 { .start
= 0x00a0102c, .end
= 0x00a01034 },
388 { .start
= 0x00a0103c, .end
= 0x00a01040 },
389 { .start
= 0x00a01048, .end
= 0x00a01094 },
390 { .start
= 0x00a01c00, .end
= 0x00a01c20 },
391 { .start
= 0x00a01c58, .end
= 0x00a01c58 },
392 { .start
= 0x00a01c7c, .end
= 0x00a01c7c },
393 { .start
= 0x00a01c28, .end
= 0x00a01c54 },
394 { .start
= 0x00a01c5c, .end
= 0x00a01c5c },
395 { .start
= 0x00a01c60, .end
= 0x00a01cdc },
396 { .start
= 0x00a01ce0, .end
= 0x00a01d0c },
397 { .start
= 0x00a01d18, .end
= 0x00a01d20 },
398 { .start
= 0x00a01d2c, .end
= 0x00a01d30 },
399 { .start
= 0x00a01d40, .end
= 0x00a01d5c },
400 { .start
= 0x00a01d80, .end
= 0x00a01d80 },
401 { .start
= 0x00a01d98, .end
= 0x00a01d9c },
402 { .start
= 0x00a01da8, .end
= 0x00a01da8 },
403 { .start
= 0x00a01db8, .end
= 0x00a01df4 },
404 { .start
= 0x00a01dc0, .end
= 0x00a01dfc },
405 { .start
= 0x00a01e00, .end
= 0x00a01e2c },
406 { .start
= 0x00a01e40, .end
= 0x00a01e60 },
407 { .start
= 0x00a01e68, .end
= 0x00a01e6c },
408 { .start
= 0x00a01e74, .end
= 0x00a01e74 },
409 { .start
= 0x00a01e84, .end
= 0x00a01e90 },
410 { .start
= 0x00a01e9c, .end
= 0x00a01ec4 },
411 { .start
= 0x00a01ed0, .end
= 0x00a01ee0 },
412 { .start
= 0x00a01f00, .end
= 0x00a01f1c },
413 { .start
= 0x00a01f44, .end
= 0x00a01ffc },
414 { .start
= 0x00a02000, .end
= 0x00a02048 },
415 { .start
= 0x00a02068, .end
= 0x00a020f0 },
416 { .start
= 0x00a02100, .end
= 0x00a02118 },
417 { .start
= 0x00a02140, .end
= 0x00a0214c },
418 { .start
= 0x00a02168, .end
= 0x00a0218c },
419 { .start
= 0x00a021c0, .end
= 0x00a021c0 },
420 { .start
= 0x00a02400, .end
= 0x00a02410 },
421 { .start
= 0x00a02418, .end
= 0x00a02420 },
422 { .start
= 0x00a02428, .end
= 0x00a0242c },
423 { .start
= 0x00a02434, .end
= 0x00a02434 },
424 { .start
= 0x00a02440, .end
= 0x00a02460 },
425 { .start
= 0x00a02468, .end
= 0x00a024b0 },
426 { .start
= 0x00a024c8, .end
= 0x00a024cc },
427 { .start
= 0x00a02500, .end
= 0x00a02504 },
428 { .start
= 0x00a0250c, .end
= 0x00a02510 },
429 { .start
= 0x00a02540, .end
= 0x00a02554 },
430 { .start
= 0x00a02580, .end
= 0x00a025f4 },
431 { .start
= 0x00a02600, .end
= 0x00a0260c },
432 { .start
= 0x00a02648, .end
= 0x00a02650 },
433 { .start
= 0x00a02680, .end
= 0x00a02680 },
434 { .start
= 0x00a026c0, .end
= 0x00a026d0 },
435 { .start
= 0x00a02700, .end
= 0x00a0270c },
436 { .start
= 0x00a02804, .end
= 0x00a02804 },
437 { .start
= 0x00a02818, .end
= 0x00a0281c },
438 { .start
= 0x00a02c00, .end
= 0x00a02db4 },
439 { .start
= 0x00a02df4, .end
= 0x00a02fb0 },
440 { .start
= 0x00a03000, .end
= 0x00a03014 },
441 { .start
= 0x00a0301c, .end
= 0x00a0302c },
442 { .start
= 0x00a03034, .end
= 0x00a03038 },
443 { .start
= 0x00a03040, .end
= 0x00a03048 },
444 { .start
= 0x00a03060, .end
= 0x00a03068 },
445 { .start
= 0x00a03070, .end
= 0x00a03074 },
446 { .start
= 0x00a0307c, .end
= 0x00a0307c },
447 { .start
= 0x00a03080, .end
= 0x00a03084 },
448 { .start
= 0x00a0308c, .end
= 0x00a03090 },
449 { .start
= 0x00a03098, .end
= 0x00a03098 },
450 { .start
= 0x00a030a0, .end
= 0x00a030a0 },
451 { .start
= 0x00a030a8, .end
= 0x00a030b4 },
452 { .start
= 0x00a030bc, .end
= 0x00a030bc },
453 { .start
= 0x00a030c0, .end
= 0x00a0312c },
454 { .start
= 0x00a03c00, .end
= 0x00a03c5c },
455 { .start
= 0x00a04400, .end
= 0x00a04454 },
456 { .start
= 0x00a04460, .end
= 0x00a04474 },
457 { .start
= 0x00a044c0, .end
= 0x00a044ec },
458 { .start
= 0x00a04500, .end
= 0x00a04504 },
459 { .start
= 0x00a04510, .end
= 0x00a04538 },
460 { .start
= 0x00a04540, .end
= 0x00a04548 },
461 { .start
= 0x00a04560, .end
= 0x00a0457c },
462 { .start
= 0x00a04590, .end
= 0x00a04598 },
463 { .start
= 0x00a045c0, .end
= 0x00a045f4 },
466 static const struct iwl_prph_range iwl_prph_dump_addr_9000
[] = {
467 { .start
= 0x00a05c00, .end
= 0x00a05c18 },
468 { .start
= 0x00a05400, .end
= 0x00a056e8 },
469 { .start
= 0x00a08000, .end
= 0x00a098bc },
470 { .start
= 0x00a02400, .end
= 0x00a02758 },
471 { .start
= 0x00a04764, .end
= 0x00a0476c },
472 { .start
= 0x00a04770, .end
= 0x00a04774 },
473 { .start
= 0x00a04620, .end
= 0x00a04624 },
476 static const struct iwl_prph_range iwl_prph_dump_addr_22000
[] = {
477 { .start
= 0x00a00000, .end
= 0x00a00000 },
478 { .start
= 0x00a0000c, .end
= 0x00a00024 },
479 { .start
= 0x00a0002c, .end
= 0x00a00034 },
480 { .start
= 0x00a0003c, .end
= 0x00a0003c },
481 { .start
= 0x00a00410, .end
= 0x00a00418 },
482 { .start
= 0x00a00420, .end
= 0x00a00420 },
483 { .start
= 0x00a00428, .end
= 0x00a00428 },
484 { .start
= 0x00a00430, .end
= 0x00a0043c },
485 { .start
= 0x00a00444, .end
= 0x00a00444 },
486 { .start
= 0x00a00840, .end
= 0x00a00840 },
487 { .start
= 0x00a00850, .end
= 0x00a00858 },
488 { .start
= 0x00a01004, .end
= 0x00a01008 },
489 { .start
= 0x00a01010, .end
= 0x00a01010 },
490 { .start
= 0x00a01018, .end
= 0x00a01018 },
491 { .start
= 0x00a01024, .end
= 0x00a01024 },
492 { .start
= 0x00a0102c, .end
= 0x00a01034 },
493 { .start
= 0x00a0103c, .end
= 0x00a01040 },
494 { .start
= 0x00a01048, .end
= 0x00a01050 },
495 { .start
= 0x00a01058, .end
= 0x00a01058 },
496 { .start
= 0x00a01060, .end
= 0x00a01070 },
497 { .start
= 0x00a0108c, .end
= 0x00a0108c },
498 { .start
= 0x00a01c20, .end
= 0x00a01c28 },
499 { .start
= 0x00a01d10, .end
= 0x00a01d10 },
500 { .start
= 0x00a01e28, .end
= 0x00a01e2c },
501 { .start
= 0x00a01e60, .end
= 0x00a01e60 },
502 { .start
= 0x00a01e80, .end
= 0x00a01e80 },
503 { .start
= 0x00a01ea0, .end
= 0x00a01ea0 },
504 { .start
= 0x00a02000, .end
= 0x00a0201c },
505 { .start
= 0x00a02024, .end
= 0x00a02024 },
506 { .start
= 0x00a02040, .end
= 0x00a02048 },
507 { .start
= 0x00a020c0, .end
= 0x00a020e0 },
508 { .start
= 0x00a02400, .end
= 0x00a02404 },
509 { .start
= 0x00a0240c, .end
= 0x00a02414 },
510 { .start
= 0x00a0241c, .end
= 0x00a0243c },
511 { .start
= 0x00a02448, .end
= 0x00a024bc },
512 { .start
= 0x00a024c4, .end
= 0x00a024cc },
513 { .start
= 0x00a02508, .end
= 0x00a02508 },
514 { .start
= 0x00a02510, .end
= 0x00a02514 },
515 { .start
= 0x00a0251c, .end
= 0x00a0251c },
516 { .start
= 0x00a0252c, .end
= 0x00a0255c },
517 { .start
= 0x00a02564, .end
= 0x00a025a0 },
518 { .start
= 0x00a025a8, .end
= 0x00a025b4 },
519 { .start
= 0x00a025c0, .end
= 0x00a025c0 },
520 { .start
= 0x00a025e8, .end
= 0x00a025f4 },
521 { .start
= 0x00a02c08, .end
= 0x00a02c18 },
522 { .start
= 0x00a02c2c, .end
= 0x00a02c38 },
523 { .start
= 0x00a02c68, .end
= 0x00a02c78 },
524 { .start
= 0x00a03000, .end
= 0x00a03000 },
525 { .start
= 0x00a03010, .end
= 0x00a03014 },
526 { .start
= 0x00a0301c, .end
= 0x00a0302c },
527 { .start
= 0x00a03034, .end
= 0x00a03038 },
528 { .start
= 0x00a03040, .end
= 0x00a03044 },
529 { .start
= 0x00a03060, .end
= 0x00a03068 },
530 { .start
= 0x00a03070, .end
= 0x00a03070 },
531 { .start
= 0x00a0307c, .end
= 0x00a03084 },
532 { .start
= 0x00a0308c, .end
= 0x00a03090 },
533 { .start
= 0x00a03098, .end
= 0x00a03098 },
534 { .start
= 0x00a030a0, .end
= 0x00a030a0 },
535 { .start
= 0x00a030a8, .end
= 0x00a030b4 },
536 { .start
= 0x00a030bc, .end
= 0x00a030c0 },
537 { .start
= 0x00a030c8, .end
= 0x00a030f4 },
538 { .start
= 0x00a03100, .end
= 0x00a0312c },
539 { .start
= 0x00a03c00, .end
= 0x00a03c5c },
540 { .start
= 0x00a04400, .end
= 0x00a04454 },
541 { .start
= 0x00a04460, .end
= 0x00a04474 },
542 { .start
= 0x00a044c0, .end
= 0x00a044ec },
543 { .start
= 0x00a04500, .end
= 0x00a04504 },
544 { .start
= 0x00a04510, .end
= 0x00a04538 },
545 { .start
= 0x00a04540, .end
= 0x00a04548 },
546 { .start
= 0x00a04560, .end
= 0x00a04560 },
547 { .start
= 0x00a04570, .end
= 0x00a0457c },
548 { .start
= 0x00a04590, .end
= 0x00a04590 },
549 { .start
= 0x00a04598, .end
= 0x00a04598 },
550 { .start
= 0x00a045c0, .end
= 0x00a045f4 },
551 { .start
= 0x00a05c18, .end
= 0x00a05c1c },
552 { .start
= 0x00a0c000, .end
= 0x00a0c018 },
553 { .start
= 0x00a0c020, .end
= 0x00a0c028 },
554 { .start
= 0x00a0c038, .end
= 0x00a0c094 },
555 { .start
= 0x00a0c0c0, .end
= 0x00a0c104 },
556 { .start
= 0x00a0c10c, .end
= 0x00a0c118 },
557 { .start
= 0x00a0c150, .end
= 0x00a0c174 },
558 { .start
= 0x00a0c17c, .end
= 0x00a0c188 },
559 { .start
= 0x00a0c190, .end
= 0x00a0c198 },
560 { .start
= 0x00a0c1a0, .end
= 0x00a0c1a8 },
561 { .start
= 0x00a0c1b0, .end
= 0x00a0c1b8 },
564 static const struct iwl_prph_range iwl_prph_dump_addr_ax210
[] = {
565 { .start
= 0x00d03c00, .end
= 0x00d03c64 },
566 { .start
= 0x00d05c18, .end
= 0x00d05c1c },
567 { .start
= 0x00d0c000, .end
= 0x00d0c174 },
570 static void iwl_read_prph_block(struct iwl_trans
*trans
, u32 start
,
571 u32 len_bytes
, __le32
*data
)
575 for (i
= 0; i
< len_bytes
; i
+= 4)
576 *data
++ = cpu_to_le32(iwl_read_prph_no_grab(trans
, start
+ i
));
579 static void iwl_dump_prph(struct iwl_fw_runtime
*fwrt
,
580 const struct iwl_prph_range
*iwl_prph_dump_addr
,
581 u32 range_len
, void *ptr
)
583 struct iwl_fw_error_dump_prph
*prph
;
584 struct iwl_trans
*trans
= fwrt
->trans
;
585 struct iwl_fw_error_dump_data
**data
=
586 (struct iwl_fw_error_dump_data
**)ptr
;
593 IWL_DEBUG_INFO(trans
, "WRT PRPH dump\n");
595 if (!iwl_trans_grab_nic_access(trans
, &flags
))
598 for (i
= 0; i
< range_len
; i
++) {
599 /* The range includes both boundaries */
600 int num_bytes_in_chunk
= iwl_prph_dump_addr
[i
].end
-
601 iwl_prph_dump_addr
[i
].start
+ 4;
603 (*data
)->type
= cpu_to_le32(IWL_FW_ERROR_DUMP_PRPH
);
604 (*data
)->len
= cpu_to_le32(sizeof(*prph
) +
606 prph
= (void *)(*data
)->data
;
607 prph
->prph_start
= cpu_to_le32(iwl_prph_dump_addr
[i
].start
);
609 iwl_read_prph_block(trans
, iwl_prph_dump_addr
[i
].start
,
610 /* our range is inclusive, hence + 4 */
611 iwl_prph_dump_addr
[i
].end
-
612 iwl_prph_dump_addr
[i
].start
+ 4,
615 *data
= iwl_fw_error_next_data(*data
);
618 iwl_trans_release_nic_access(trans
, &flags
);
622 * alloc_sgtable - allocates scallerlist table in the given size,
623 * fills it with pages and returns it
624 * @size: the size (in bytes) of the table
626 static struct scatterlist
*alloc_sgtable(int size
)
628 int alloc_size
, nents
, i
;
629 struct page
*new_page
;
630 struct scatterlist
*iter
;
631 struct scatterlist
*table
;
633 nents
= DIV_ROUND_UP(size
, PAGE_SIZE
);
634 table
= kcalloc(nents
, sizeof(*table
), GFP_KERNEL
);
637 sg_init_table(table
, nents
);
639 for_each_sg(table
, iter
, sg_nents(table
), i
) {
640 new_page
= alloc_page(GFP_KERNEL
);
642 /* release all previous allocated pages in the table */
644 for_each_sg(table
, iter
, sg_nents(table
), i
) {
645 new_page
= sg_page(iter
);
647 __free_page(new_page
);
652 alloc_size
= min_t(int, size
, PAGE_SIZE
);
654 sg_set_page(iter
, new_page
, alloc_size
, 0);
659 static void iwl_fw_get_prph_len(struct iwl_fw_runtime
*fwrt
,
660 const struct iwl_prph_range
*iwl_prph_dump_addr
,
661 u32 range_len
, void *ptr
)
663 u32
*prph_len
= (u32
*)ptr
;
664 int i
, num_bytes_in_chunk
;
669 for (i
= 0; i
< range_len
; i
++) {
670 /* The range includes both boundaries */
672 iwl_prph_dump_addr
[i
].end
-
673 iwl_prph_dump_addr
[i
].start
+ 4;
675 *prph_len
+= sizeof(struct iwl_fw_error_dump_data
) +
676 sizeof(struct iwl_fw_error_dump_prph
) +
681 static void iwl_fw_prph_handler(struct iwl_fw_runtime
*fwrt
, void *ptr
,
682 void (*handler
)(struct iwl_fw_runtime
*,
683 const struct iwl_prph_range
*,
688 if (fwrt
->trans
->trans_cfg
->device_family
>= IWL_DEVICE_FAMILY_AX210
) {
689 range_len
= ARRAY_SIZE(iwl_prph_dump_addr_ax210
);
690 handler(fwrt
, iwl_prph_dump_addr_ax210
, range_len
, ptr
);
691 } else if (fwrt
->trans
->trans_cfg
->device_family
>=
692 IWL_DEVICE_FAMILY_22000
) {
693 range_len
= ARRAY_SIZE(iwl_prph_dump_addr_22000
);
694 handler(fwrt
, iwl_prph_dump_addr_22000
, range_len
, ptr
);
696 range_len
= ARRAY_SIZE(iwl_prph_dump_addr_comm
);
697 handler(fwrt
, iwl_prph_dump_addr_comm
, range_len
, ptr
);
699 if (fwrt
->trans
->trans_cfg
->mq_rx_supported
) {
700 range_len
= ARRAY_SIZE(iwl_prph_dump_addr_9000
);
701 handler(fwrt
, iwl_prph_dump_addr_9000
, range_len
, ptr
);
706 static void iwl_fw_dump_mem(struct iwl_fw_runtime
*fwrt
,
707 struct iwl_fw_error_dump_data
**dump_data
,
708 u32 len
, u32 ofs
, u32 type
)
710 struct iwl_fw_error_dump_mem
*dump_mem
;
715 (*dump_data
)->type
= cpu_to_le32(IWL_FW_ERROR_DUMP_MEM
);
716 (*dump_data
)->len
= cpu_to_le32(len
+ sizeof(*dump_mem
));
717 dump_mem
= (void *)(*dump_data
)->data
;
718 dump_mem
->type
= cpu_to_le32(type
);
719 dump_mem
->offset
= cpu_to_le32(ofs
);
720 iwl_trans_read_mem_bytes(fwrt
->trans
, ofs
, dump_mem
->data
, len
);
721 *dump_data
= iwl_fw_error_next_data(*dump_data
);
723 IWL_DEBUG_INFO(fwrt
, "WRT memory dump. Type=%u\n", dump_mem
->type
);
726 #define ADD_LEN(len, item_len, const_len) \
727 do {size_t item = item_len; len += (!!item) * const_len + item; } \
730 static int iwl_fw_rxf_len(struct iwl_fw_runtime
*fwrt
,
731 struct iwl_fwrt_shared_mem_cfg
*mem_cfg
)
733 size_t hdr_len
= sizeof(struct iwl_fw_error_dump_data
) +
734 sizeof(struct iwl_fw_error_dump_fifo
);
738 if (!iwl_fw_dbg_type_on(fwrt
, IWL_FW_ERROR_DUMP_RXF
))
741 /* Count RXF2 size */
742 ADD_LEN(fifo_len
, mem_cfg
->rxfifo2_size
, hdr_len
);
744 /* Count RXF1 sizes */
745 if (WARN_ON(mem_cfg
->num_lmacs
> MAX_NUM_LMAC
))
746 mem_cfg
->num_lmacs
= MAX_NUM_LMAC
;
748 for (i
= 0; i
< mem_cfg
->num_lmacs
; i
++)
749 ADD_LEN(fifo_len
, mem_cfg
->lmac
[i
].rxfifo1_size
, hdr_len
);
754 static int iwl_fw_txf_len(struct iwl_fw_runtime
*fwrt
,
755 struct iwl_fwrt_shared_mem_cfg
*mem_cfg
)
757 size_t hdr_len
= sizeof(struct iwl_fw_error_dump_data
) +
758 sizeof(struct iwl_fw_error_dump_fifo
);
762 if (!iwl_fw_dbg_type_on(fwrt
, IWL_FW_ERROR_DUMP_TXF
))
763 goto dump_internal_txf
;
765 /* Count TXF sizes */
766 if (WARN_ON(mem_cfg
->num_lmacs
> MAX_NUM_LMAC
))
767 mem_cfg
->num_lmacs
= MAX_NUM_LMAC
;
769 for (i
= 0; i
< mem_cfg
->num_lmacs
; i
++) {
772 for (j
= 0; j
< mem_cfg
->num_txfifo_entries
; j
++)
773 ADD_LEN(fifo_len
, mem_cfg
->lmac
[i
].txfifo_size
[j
],
778 if (!(iwl_fw_dbg_type_on(fwrt
, IWL_FW_ERROR_DUMP_INTERNAL_TXF
) &&
779 fw_has_capa(&fwrt
->fw
->ucode_capa
,
780 IWL_UCODE_TLV_CAPA_EXTEND_SHARED_MEM_CFG
)))
783 for (i
= 0; i
< ARRAY_SIZE(mem_cfg
->internal_txfifo_size
); i
++)
784 ADD_LEN(fifo_len
, mem_cfg
->internal_txfifo_size
[i
], hdr_len
);
790 static void iwl_dump_paging(struct iwl_fw_runtime
*fwrt
,
791 struct iwl_fw_error_dump_data
**data
)
795 IWL_DEBUG_INFO(fwrt
, "WRT paging dump\n");
796 for (i
= 1; i
< fwrt
->num_of_paging_blk
+ 1; i
++) {
797 struct iwl_fw_error_dump_paging
*paging
;
799 fwrt
->fw_paging_db
[i
].fw_paging_block
;
800 dma_addr_t addr
= fwrt
->fw_paging_db
[i
].fw_paging_phys
;
802 (*data
)->type
= cpu_to_le32(IWL_FW_ERROR_DUMP_PAGING
);
803 (*data
)->len
= cpu_to_le32(sizeof(*paging
) +
805 paging
= (void *)(*data
)->data
;
806 paging
->index
= cpu_to_le32(i
);
807 dma_sync_single_for_cpu(fwrt
->trans
->dev
, addr
,
810 memcpy(paging
->data
, page_address(pages
),
812 dma_sync_single_for_device(fwrt
->trans
->dev
, addr
,
815 (*data
) = iwl_fw_error_next_data(*data
);
819 static struct iwl_fw_error_dump_file
*
820 iwl_fw_error_dump_file(struct iwl_fw_runtime
*fwrt
,
821 struct iwl_fw_dump_ptrs
*fw_error_dump
)
823 struct iwl_fw_error_dump_file
*dump_file
;
824 struct iwl_fw_error_dump_data
*dump_data
;
825 struct iwl_fw_error_dump_info
*dump_info
;
826 struct iwl_fw_error_dump_smem_cfg
*dump_smem_cfg
;
827 struct iwl_fw_error_dump_trigger_desc
*dump_trig
;
828 u32 sram_len
, sram_ofs
;
829 const struct iwl_fw_dbg_mem_seg_tlv
*fw_mem
= fwrt
->fw
->dbg
.mem_tlv
;
830 struct iwl_fwrt_shared_mem_cfg
*mem_cfg
= &fwrt
->smem_cfg
;
831 u32 file_len
, fifo_len
= 0, prph_len
= 0, radio_len
= 0;
832 u32 smem_len
= fwrt
->fw
->dbg
.n_mem_tlv
? 0 : fwrt
->trans
->cfg
->smem_len
;
833 u32 sram2_len
= fwrt
->fw
->dbg
.n_mem_tlv
?
834 0 : fwrt
->trans
->cfg
->dccm2_len
;
837 /* SRAM - include stack CCM if driver knows the values for it */
838 if (!fwrt
->trans
->cfg
->dccm_offset
|| !fwrt
->trans
->cfg
->dccm_len
) {
839 const struct fw_img
*img
;
841 if (fwrt
->cur_fw_img
>= IWL_UCODE_TYPE_MAX
)
843 img
= &fwrt
->fw
->img
[fwrt
->cur_fw_img
];
844 sram_ofs
= img
->sec
[IWL_UCODE_SECTION_DATA
].offset
;
845 sram_len
= img
->sec
[IWL_UCODE_SECTION_DATA
].len
;
847 sram_ofs
= fwrt
->trans
->cfg
->dccm_offset
;
848 sram_len
= fwrt
->trans
->cfg
->dccm_len
;
851 /* reading RXF/TXF sizes */
852 if (test_bit(STATUS_FW_ERROR
, &fwrt
->trans
->status
)) {
853 fifo_len
= iwl_fw_rxf_len(fwrt
, mem_cfg
);
854 fifo_len
+= iwl_fw_txf_len(fwrt
, mem_cfg
);
856 /* Make room for PRPH registers */
857 if (iwl_fw_dbg_type_on(fwrt
, IWL_FW_ERROR_DUMP_PRPH
))
858 iwl_fw_prph_handler(fwrt
, &prph_len
,
859 iwl_fw_get_prph_len
);
861 if (fwrt
->trans
->trans_cfg
->device_family
==
862 IWL_DEVICE_FAMILY_7000
&&
863 iwl_fw_dbg_type_on(fwrt
, IWL_FW_ERROR_DUMP_RADIO_REG
))
864 radio_len
= sizeof(*dump_data
) + RADIO_REG_MAX_READ
;
867 file_len
= sizeof(*dump_file
) + fifo_len
+ prph_len
+ radio_len
;
869 if (iwl_fw_dbg_type_on(fwrt
, IWL_FW_ERROR_DUMP_DEV_FW_INFO
))
870 file_len
+= sizeof(*dump_data
) + sizeof(*dump_info
);
871 if (iwl_fw_dbg_type_on(fwrt
, IWL_FW_ERROR_DUMP_MEM_CFG
))
872 file_len
+= sizeof(*dump_data
) + sizeof(*dump_smem_cfg
);
874 if (iwl_fw_dbg_type_on(fwrt
, IWL_FW_ERROR_DUMP_MEM
)) {
875 size_t hdr_len
= sizeof(*dump_data
) +
876 sizeof(struct iwl_fw_error_dump_mem
);
878 /* Dump SRAM only if no mem_tlvs */
879 if (!fwrt
->fw
->dbg
.n_mem_tlv
)
880 ADD_LEN(file_len
, sram_len
, hdr_len
);
882 /* Make room for all mem types that exist */
883 ADD_LEN(file_len
, smem_len
, hdr_len
);
884 ADD_LEN(file_len
, sram2_len
, hdr_len
);
886 for (i
= 0; i
< fwrt
->fw
->dbg
.n_mem_tlv
; i
++)
887 ADD_LEN(file_len
, le32_to_cpu(fw_mem
[i
].len
), hdr_len
);
890 /* Make room for fw's virtual image pages, if it exists */
891 if (iwl_fw_dbg_is_paging_enabled(fwrt
))
892 file_len
+= fwrt
->num_of_paging_blk
*
893 (sizeof(*dump_data
) +
894 sizeof(struct iwl_fw_error_dump_paging
) +
897 if (iwl_fw_dbg_is_d3_debug_enabled(fwrt
) && fwrt
->dump
.d3_debug_data
) {
898 file_len
+= sizeof(*dump_data
) +
899 fwrt
->trans
->cfg
->d3_debug_data_length
* 2;
902 /* If we only want a monitor dump, reset the file length */
903 if (fwrt
->dump
.monitor_only
) {
904 file_len
= sizeof(*dump_file
) + sizeof(*dump_data
) * 2 +
905 sizeof(*dump_info
) + sizeof(*dump_smem_cfg
);
908 if (iwl_fw_dbg_type_on(fwrt
, IWL_FW_ERROR_DUMP_ERROR_INFO
) &&
910 file_len
+= sizeof(*dump_data
) + sizeof(*dump_trig
) +
911 fwrt
->dump
.desc
->len
;
913 dump_file
= vzalloc(file_len
);
917 fw_error_dump
->fwrt_ptr
= dump_file
;
919 dump_file
->barker
= cpu_to_le32(IWL_FW_ERROR_DUMP_BARKER
);
920 dump_data
= (void *)dump_file
->data
;
922 if (iwl_fw_dbg_type_on(fwrt
, IWL_FW_ERROR_DUMP_DEV_FW_INFO
)) {
923 dump_data
->type
= cpu_to_le32(IWL_FW_ERROR_DUMP_DEV_FW_INFO
);
924 dump_data
->len
= cpu_to_le32(sizeof(*dump_info
));
925 dump_info
= (void *)dump_data
->data
;
927 cpu_to_le32(CSR_HW_REV_TYPE(fwrt
->trans
->hw_rev
));
929 cpu_to_le32(CSR_HW_REV_STEP(fwrt
->trans
->hw_rev
));
930 memcpy(dump_info
->fw_human_readable
, fwrt
->fw
->human_readable
,
931 sizeof(dump_info
->fw_human_readable
));
932 strncpy(dump_info
->dev_human_readable
, fwrt
->trans
->cfg
->name
,
933 sizeof(dump_info
->dev_human_readable
) - 1);
934 strncpy(dump_info
->bus_human_readable
, fwrt
->dev
->bus
->name
,
935 sizeof(dump_info
->bus_human_readable
) - 1);
936 dump_info
->num_of_lmacs
= fwrt
->smem_cfg
.num_lmacs
;
937 dump_info
->lmac_err_id
[0] =
938 cpu_to_le32(fwrt
->dump
.lmac_err_id
[0]);
939 if (fwrt
->smem_cfg
.num_lmacs
> 1)
940 dump_info
->lmac_err_id
[1] =
941 cpu_to_le32(fwrt
->dump
.lmac_err_id
[1]);
942 dump_info
->umac_err_id
= cpu_to_le32(fwrt
->dump
.umac_err_id
);
944 dump_data
= iwl_fw_error_next_data(dump_data
);
947 if (iwl_fw_dbg_type_on(fwrt
, IWL_FW_ERROR_DUMP_MEM_CFG
)) {
948 /* Dump shared memory configuration */
949 dump_data
->type
= cpu_to_le32(IWL_FW_ERROR_DUMP_MEM_CFG
);
950 dump_data
->len
= cpu_to_le32(sizeof(*dump_smem_cfg
));
951 dump_smem_cfg
= (void *)dump_data
->data
;
952 dump_smem_cfg
->num_lmacs
= cpu_to_le32(mem_cfg
->num_lmacs
);
953 dump_smem_cfg
->num_txfifo_entries
=
954 cpu_to_le32(mem_cfg
->num_txfifo_entries
);
955 for (i
= 0; i
< MAX_NUM_LMAC
; i
++) {
957 u32
*txf_size
= mem_cfg
->lmac
[i
].txfifo_size
;
959 for (j
= 0; j
< TX_FIFO_MAX_NUM
; j
++)
960 dump_smem_cfg
->lmac
[i
].txfifo_size
[j
] =
961 cpu_to_le32(txf_size
[j
]);
962 dump_smem_cfg
->lmac
[i
].rxfifo1_size
=
963 cpu_to_le32(mem_cfg
->lmac
[i
].rxfifo1_size
);
965 dump_smem_cfg
->rxfifo2_size
=
966 cpu_to_le32(mem_cfg
->rxfifo2_size
);
967 dump_smem_cfg
->internal_txfifo_addr
=
968 cpu_to_le32(mem_cfg
->internal_txfifo_addr
);
969 for (i
= 0; i
< TX_FIFO_INTERNAL_MAX_NUM
; i
++) {
970 dump_smem_cfg
->internal_txfifo_size
[i
] =
971 cpu_to_le32(mem_cfg
->internal_txfifo_size
[i
]);
974 dump_data
= iwl_fw_error_next_data(dump_data
);
977 /* We only dump the FIFOs if the FW is in error state */
979 iwl_fw_dump_rxf(fwrt
, &dump_data
);
980 iwl_fw_dump_txf(fwrt
, &dump_data
);
984 iwl_read_radio_regs(fwrt
, &dump_data
);
986 if (iwl_fw_dbg_type_on(fwrt
, IWL_FW_ERROR_DUMP_ERROR_INFO
) &&
988 dump_data
->type
= cpu_to_le32(IWL_FW_ERROR_DUMP_ERROR_INFO
);
989 dump_data
->len
= cpu_to_le32(sizeof(*dump_trig
) +
990 fwrt
->dump
.desc
->len
);
991 dump_trig
= (void *)dump_data
->data
;
992 memcpy(dump_trig
, &fwrt
->dump
.desc
->trig_desc
,
993 sizeof(*dump_trig
) + fwrt
->dump
.desc
->len
);
995 dump_data
= iwl_fw_error_next_data(dump_data
);
998 /* In case we only want monitor dump, skip to dump trasport data */
999 if (fwrt
->dump
.monitor_only
)
1002 if (iwl_fw_dbg_type_on(fwrt
, IWL_FW_ERROR_DUMP_MEM
)) {
1003 const struct iwl_fw_dbg_mem_seg_tlv
*fw_dbg_mem
=
1004 fwrt
->fw
->dbg
.mem_tlv
;
1006 if (!fwrt
->fw
->dbg
.n_mem_tlv
)
1007 iwl_fw_dump_mem(fwrt
, &dump_data
, sram_len
, sram_ofs
,
1008 IWL_FW_ERROR_DUMP_MEM_SRAM
);
1010 for (i
= 0; i
< fwrt
->fw
->dbg
.n_mem_tlv
; i
++) {
1011 u32 len
= le32_to_cpu(fw_dbg_mem
[i
].len
);
1012 u32 ofs
= le32_to_cpu(fw_dbg_mem
[i
].ofs
);
1014 iwl_fw_dump_mem(fwrt
, &dump_data
, len
, ofs
,
1015 le32_to_cpu(fw_dbg_mem
[i
].data_type
));
1018 iwl_fw_dump_mem(fwrt
, &dump_data
, smem_len
,
1019 fwrt
->trans
->cfg
->smem_offset
,
1020 IWL_FW_ERROR_DUMP_MEM_SMEM
);
1022 iwl_fw_dump_mem(fwrt
, &dump_data
, sram2_len
,
1023 fwrt
->trans
->cfg
->dccm2_offset
,
1024 IWL_FW_ERROR_DUMP_MEM_SRAM
);
1027 if (iwl_fw_dbg_is_d3_debug_enabled(fwrt
) && fwrt
->dump
.d3_debug_data
) {
1028 u32 addr
= fwrt
->trans
->cfg
->d3_debug_data_base_addr
;
1029 size_t data_size
= fwrt
->trans
->cfg
->d3_debug_data_length
;
1031 dump_data
->type
= cpu_to_le32(IWL_FW_ERROR_DUMP_D3_DEBUG_DATA
);
1032 dump_data
->len
= cpu_to_le32(data_size
* 2);
1034 memcpy(dump_data
->data
, fwrt
->dump
.d3_debug_data
, data_size
);
1036 kfree(fwrt
->dump
.d3_debug_data
);
1037 fwrt
->dump
.d3_debug_data
= NULL
;
1039 iwl_trans_read_mem_bytes(fwrt
->trans
, addr
,
1040 dump_data
->data
+ data_size
,
1043 dump_data
= iwl_fw_error_next_data(dump_data
);
1046 /* Dump fw's virtual image */
1047 if (iwl_fw_dbg_is_paging_enabled(fwrt
))
1048 iwl_dump_paging(fwrt
, &dump_data
);
1051 iwl_fw_prph_handler(fwrt
, &dump_data
, iwl_dump_prph
);
1054 dump_file
->file_len
= cpu_to_le32(file_len
);
1059 * struct iwl_dump_ini_region_data - region data
1060 * @reg_tlv: region TLV
1061 * @dump_data: dump data
1063 struct iwl_dump_ini_region_data
{
1064 struct iwl_ucode_tlv
*reg_tlv
;
1065 struct iwl_fwrt_dump_data
*dump_data
;
1068 static int iwl_dump_ini_prph_iter(struct iwl_fw_runtime
*fwrt
,
1069 struct iwl_dump_ini_region_data
*reg_data
,
1070 void *range_ptr
, int idx
)
1072 struct iwl_fw_ini_region_tlv
*reg
= (void *)reg_data
->reg_tlv
->data
;
1073 struct iwl_fw_ini_error_dump_range
*range
= range_ptr
;
1074 __le32
*val
= range
->data
;
1076 u32 addr
= le32_to_cpu(reg
->addrs
[idx
]) +
1077 le32_to_cpu(reg
->dev_addr
.offset
);
1080 range
->internal_base_addr
= cpu_to_le32(addr
);
1081 range
->range_data_size
= reg
->dev_addr
.size
;
1082 for (i
= 0; i
< le32_to_cpu(reg
->dev_addr
.size
); i
+= 4) {
1083 prph_val
= iwl_read_prph(fwrt
->trans
, addr
+ i
);
1084 if (prph_val
== 0x5a5a5a5a)
1086 *val
++ = cpu_to_le32(prph_val
);
1089 return sizeof(*range
) + le32_to_cpu(range
->range_data_size
);
1092 static int iwl_dump_ini_csr_iter(struct iwl_fw_runtime
*fwrt
,
1093 struct iwl_dump_ini_region_data
*reg_data
,
1094 void *range_ptr
, int idx
)
1096 struct iwl_fw_ini_region_tlv
*reg
= (void *)reg_data
->reg_tlv
->data
;
1097 struct iwl_fw_ini_error_dump_range
*range
= range_ptr
;
1098 __le32
*val
= range
->data
;
1099 u32 addr
= le32_to_cpu(reg
->addrs
[idx
]) +
1100 le32_to_cpu(reg
->dev_addr
.offset
);
1103 range
->internal_base_addr
= cpu_to_le32(addr
);
1104 range
->range_data_size
= reg
->dev_addr
.size
;
1105 for (i
= 0; i
< le32_to_cpu(reg
->dev_addr
.size
); i
+= 4)
1106 *val
++ = cpu_to_le32(iwl_trans_read32(fwrt
->trans
, addr
+ i
));
1108 return sizeof(*range
) + le32_to_cpu(range
->range_data_size
);
1111 static int iwl_dump_ini_dev_mem_iter(struct iwl_fw_runtime
*fwrt
,
1112 struct iwl_dump_ini_region_data
*reg_data
,
1113 void *range_ptr
, int idx
)
1115 struct iwl_fw_ini_region_tlv
*reg
= (void *)reg_data
->reg_tlv
->data
;
1116 struct iwl_fw_ini_error_dump_range
*range
= range_ptr
;
1117 u32 addr
= le32_to_cpu(reg
->addrs
[idx
]) +
1118 le32_to_cpu(reg
->dev_addr
.offset
);
1120 range
->internal_base_addr
= cpu_to_le32(addr
);
1121 range
->range_data_size
= reg
->dev_addr
.size
;
1122 iwl_trans_read_mem_bytes(fwrt
->trans
, addr
, range
->data
,
1123 le32_to_cpu(reg
->dev_addr
.size
));
1125 return sizeof(*range
) + le32_to_cpu(range
->range_data_size
);
1128 static int _iwl_dump_ini_paging_iter(struct iwl_fw_runtime
*fwrt
,
1129 void *range_ptr
, int idx
)
1131 /* increase idx by 1 since the pages are from 1 to
1132 * fwrt->num_of_paging_blk + 1
1134 struct page
*page
= fwrt
->fw_paging_db
[++idx
].fw_paging_block
;
1135 struct iwl_fw_ini_error_dump_range
*range
= range_ptr
;
1136 dma_addr_t addr
= fwrt
->fw_paging_db
[idx
].fw_paging_phys
;
1137 u32 page_size
= fwrt
->fw_paging_db
[idx
].fw_paging_size
;
1139 range
->page_num
= cpu_to_le32(idx
);
1140 range
->range_data_size
= cpu_to_le32(page_size
);
1141 dma_sync_single_for_cpu(fwrt
->trans
->dev
, addr
, page_size
,
1143 memcpy(range
->data
, page_address(page
), page_size
);
1144 dma_sync_single_for_device(fwrt
->trans
->dev
, addr
, page_size
,
1147 return sizeof(*range
) + le32_to_cpu(range
->range_data_size
);
1150 static int iwl_dump_ini_paging_iter(struct iwl_fw_runtime
*fwrt
,
1151 struct iwl_dump_ini_region_data
*reg_data
,
1152 void *range_ptr
, int idx
)
1154 struct iwl_fw_ini_error_dump_range
*range
;
1157 if (!fwrt
->trans
->trans_cfg
->gen2
)
1158 return _iwl_dump_ini_paging_iter(fwrt
, range_ptr
, idx
);
1161 page_size
= fwrt
->trans
->init_dram
.paging
[idx
].size
;
1163 range
->page_num
= cpu_to_le32(idx
);
1164 range
->range_data_size
= cpu_to_le32(page_size
);
1165 memcpy(range
->data
, fwrt
->trans
->init_dram
.paging
[idx
].block
,
1168 return sizeof(*range
) + le32_to_cpu(range
->range_data_size
);
1172 iwl_dump_ini_mon_dram_iter(struct iwl_fw_runtime
*fwrt
,
1173 struct iwl_dump_ini_region_data
*reg_data
,
1174 void *range_ptr
, int idx
)
1176 struct iwl_fw_ini_region_tlv
*reg
= (void *)reg_data
->reg_tlv
->data
;
1177 struct iwl_fw_ini_error_dump_range
*range
= range_ptr
;
1178 struct iwl_dram_data
*frag
;
1179 u32 alloc_id
= le32_to_cpu(reg
->dram_alloc_id
);
1181 frag
= &fwrt
->trans
->dbg
.fw_mon_ini
[alloc_id
].frags
[idx
];
1183 range
->dram_base_addr
= cpu_to_le64(frag
->physical
);
1184 range
->range_data_size
= cpu_to_le32(frag
->size
);
1186 memcpy(range
->data
, frag
->block
, frag
->size
);
1188 return sizeof(*range
) + le32_to_cpu(range
->range_data_size
);
1191 static int iwl_dump_ini_mon_smem_iter(struct iwl_fw_runtime
*fwrt
,
1192 struct iwl_dump_ini_region_data
*reg_data
,
1193 void *range_ptr
, int idx
)
1195 struct iwl_fw_ini_region_tlv
*reg
= (void *)reg_data
->reg_tlv
->data
;
1196 struct iwl_fw_ini_error_dump_range
*range
= range_ptr
;
1197 u32 addr
= le32_to_cpu(reg
->internal_buffer
.base_addr
);
1199 range
->internal_base_addr
= cpu_to_le32(addr
);
1200 range
->range_data_size
= reg
->internal_buffer
.size
;
1201 iwl_trans_read_mem_bytes(fwrt
->trans
, addr
, range
->data
,
1202 le32_to_cpu(reg
->internal_buffer
.size
));
1204 return sizeof(*range
) + le32_to_cpu(range
->range_data_size
);
1207 static bool iwl_ini_txf_iter(struct iwl_fw_runtime
*fwrt
,
1208 struct iwl_dump_ini_region_data
*reg_data
, int idx
)
1210 struct iwl_fw_ini_region_tlv
*reg
= (void *)reg_data
->reg_tlv
->data
;
1211 struct iwl_txf_iter_data
*iter
= &fwrt
->dump
.txf_iter_data
;
1212 struct iwl_fwrt_shared_mem_cfg
*cfg
= &fwrt
->smem_cfg
;
1213 int txf_num
= cfg
->num_txfifo_entries
;
1214 int int_txf_num
= ARRAY_SIZE(cfg
->internal_txfifo_size
);
1215 u32 lmac_bitmap
= le32_to_cpu(reg
->fifos
.fid
[0]);
1218 if (le32_to_cpu(reg
->fifos
.offset
) && cfg
->num_lmacs
== 1) {
1219 IWL_ERR(fwrt
, "WRT: Invalid lmac offset 0x%x\n",
1220 le32_to_cpu(reg
->fifos
.offset
));
1224 iter
->internal_txf
= 0;
1225 iter
->fifo_size
= 0;
1227 if (le32_to_cpu(reg
->fifos
.offset
))
1233 if (!iter
->internal_txf
)
1234 for (iter
->fifo
++; iter
->fifo
< txf_num
; iter
->fifo
++) {
1236 cfg
->lmac
[iter
->lmac
].txfifo_size
[iter
->fifo
];
1237 if (iter
->fifo_size
&& (lmac_bitmap
& BIT(iter
->fifo
)))
1241 iter
->internal_txf
= 1;
1243 if (!fw_has_capa(&fwrt
->fw
->ucode_capa
,
1244 IWL_UCODE_TLV_CAPA_EXTEND_SHARED_MEM_CFG
))
1247 for (iter
->fifo
++; iter
->fifo
< int_txf_num
+ txf_num
; iter
->fifo
++) {
1249 cfg
->internal_txfifo_size
[iter
->fifo
- txf_num
];
1250 if (iter
->fifo_size
&& (lmac_bitmap
& BIT(iter
->fifo
)))
1257 static int iwl_dump_ini_txf_iter(struct iwl_fw_runtime
*fwrt
,
1258 struct iwl_dump_ini_region_data
*reg_data
,
1259 void *range_ptr
, int idx
)
1261 struct iwl_fw_ini_region_tlv
*reg
= (void *)reg_data
->reg_tlv
->data
;
1262 struct iwl_fw_ini_error_dump_range
*range
= range_ptr
;
1263 struct iwl_txf_iter_data
*iter
= &fwrt
->dump
.txf_iter_data
;
1264 struct iwl_fw_ini_error_dump_register
*reg_dump
= (void *)range
->data
;
1265 u32 offs
= le32_to_cpu(reg
->fifos
.offset
), addr
;
1266 u32 registers_num
= iwl_tlv_array_len(reg_data
->reg_tlv
, reg
, addrs
);
1267 u32 registers_size
= registers_num
* sizeof(*reg_dump
);
1269 unsigned long flags
;
1272 if (!iwl_ini_txf_iter(fwrt
, reg_data
, idx
))
1275 if (!iwl_trans_grab_nic_access(fwrt
->trans
, &flags
))
1278 range
->fifo_hdr
.fifo_num
= cpu_to_le32(iter
->fifo
);
1279 range
->fifo_hdr
.num_of_registers
= cpu_to_le32(registers_num
);
1280 range
->range_data_size
= cpu_to_le32(iter
->fifo_size
+ registers_size
);
1282 iwl_write_prph_no_grab(fwrt
->trans
, TXF_LARC_NUM
+ offs
, iter
->fifo
);
1285 * read txf registers. for each register, write to the dump the
1286 * register address and its value
1288 for (i
= 0; i
< registers_num
; i
++) {
1289 addr
= le32_to_cpu(reg
->addrs
[i
]) + offs
;
1291 reg_dump
->addr
= cpu_to_le32(addr
);
1292 reg_dump
->data
= cpu_to_le32(iwl_read_prph_no_grab(fwrt
->trans
,
1298 if (reg
->fifos
.hdr_only
) {
1299 range
->range_data_size
= cpu_to_le32(registers_size
);
1303 /* Set the TXF_READ_MODIFY_ADDR to TXF_WR_PTR */
1304 iwl_write_prph_no_grab(fwrt
->trans
, TXF_READ_MODIFY_ADDR
+ offs
,
1307 /* Dummy-read to advance the read pointer to the head */
1308 iwl_read_prph_no_grab(fwrt
->trans
, TXF_READ_MODIFY_DATA
+ offs
);
1311 addr
= TXF_READ_MODIFY_DATA
+ offs
;
1312 data
= (void *)reg_dump
;
1313 for (i
= 0; i
< iter
->fifo_size
; i
+= sizeof(*data
))
1314 *data
++ = cpu_to_le32(iwl_read_prph_no_grab(fwrt
->trans
, addr
));
1317 iwl_trans_release_nic_access(fwrt
->trans
, &flags
);
1319 return sizeof(*range
) + le32_to_cpu(range
->range_data_size
);
1322 struct iwl_ini_rxf_data
{
1328 static void iwl_ini_get_rxf_data(struct iwl_fw_runtime
*fwrt
,
1329 struct iwl_dump_ini_region_data
*reg_data
,
1330 struct iwl_ini_rxf_data
*data
)
1332 struct iwl_fw_ini_region_tlv
*reg
= (void *)reg_data
->reg_tlv
->data
;
1333 u32 fid1
= le32_to_cpu(reg
->fifos
.fid
[0]);
1334 u32 fid2
= le32_to_cpu(reg
->fifos
.fid
[1]);
1340 memset(data
, 0, sizeof(*data
));
1342 if (WARN_ON_ONCE((fid1
&& fid2
) || (!fid1
&& !fid2
)))
1345 fifo_idx
= ffs(fid1
) - 1;
1346 if (fid1
&& !WARN_ON_ONCE((~BIT(fifo_idx
) & fid1
) ||
1347 fifo_idx
>= MAX_NUM_LMAC
)) {
1348 data
->size
= fwrt
->smem_cfg
.lmac
[fifo_idx
].rxfifo1_size
;
1349 data
->fifo_num
= fifo_idx
;
1353 fifo_idx
= ffs(fid2
) - 1;
1354 if (fid2
&& !WARN_ON_ONCE(fifo_idx
!= 0)) {
1355 data
->size
= fwrt
->smem_cfg
.rxfifo2_size
;
1356 data
->offset
= RXF_DIFF_FROM_PREV
;
1357 /* use bit 31 to distinguish between umac and lmac rxf while
1360 data
->fifo_num
= fifo_idx
| IWL_RXF_UMAC_BIT
;
1365 static int iwl_dump_ini_rxf_iter(struct iwl_fw_runtime
*fwrt
,
1366 struct iwl_dump_ini_region_data
*reg_data
,
1367 void *range_ptr
, int idx
)
1369 struct iwl_fw_ini_region_tlv
*reg
= (void *)reg_data
->reg_tlv
->data
;
1370 struct iwl_fw_ini_error_dump_range
*range
= range_ptr
;
1371 struct iwl_ini_rxf_data rxf_data
;
1372 struct iwl_fw_ini_error_dump_register
*reg_dump
= (void *)range
->data
;
1373 u32 offs
= le32_to_cpu(reg
->fifos
.offset
), addr
;
1374 u32 registers_num
= iwl_tlv_array_len(reg_data
->reg_tlv
, reg
, addrs
);
1375 u32 registers_size
= registers_num
* sizeof(*reg_dump
);
1377 unsigned long flags
;
1380 iwl_ini_get_rxf_data(fwrt
, reg_data
, &rxf_data
);
1384 if (!iwl_trans_grab_nic_access(fwrt
->trans
, &flags
))
1387 range
->fifo_hdr
.fifo_num
= cpu_to_le32(rxf_data
.fifo_num
);
1388 range
->fifo_hdr
.num_of_registers
= cpu_to_le32(registers_num
);
1389 range
->range_data_size
= cpu_to_le32(rxf_data
.size
+ registers_size
);
1392 * read rxf registers. for each register, write to the dump the
1393 * register address and its value
1395 for (i
= 0; i
< registers_num
; i
++) {
1396 addr
= le32_to_cpu(reg
->addrs
[i
]) + offs
;
1398 reg_dump
->addr
= cpu_to_le32(addr
);
1399 reg_dump
->data
= cpu_to_le32(iwl_read_prph_no_grab(fwrt
->trans
,
1405 if (reg
->fifos
.hdr_only
) {
1406 range
->range_data_size
= cpu_to_le32(registers_size
);
1411 * region register have absolute value so apply rxf offset after
1412 * reading the registers
1414 offs
+= rxf_data
.offset
;
1417 iwl_write_prph_no_grab(fwrt
->trans
, RXF_SET_FENCE_MODE
+ offs
, 0x1);
1418 /* Set fence pointer to the same place like WR pointer */
1419 iwl_write_prph_no_grab(fwrt
->trans
, RXF_LD_WR2FENCE
+ offs
, 0x1);
1420 /* Set fence offset */
1421 iwl_write_prph_no_grab(fwrt
->trans
, RXF_LD_FENCE_OFFSET_ADDR
+ offs
,
1425 addr
= RXF_FIFO_RD_FENCE_INC
+ offs
;
1426 data
= (void *)reg_dump
;
1427 for (i
= 0; i
< rxf_data
.size
; i
+= sizeof(*data
))
1428 *data
++ = cpu_to_le32(iwl_read_prph_no_grab(fwrt
->trans
, addr
));
1431 iwl_trans_release_nic_access(fwrt
->trans
, &flags
);
1433 return sizeof(*range
) + le32_to_cpu(range
->range_data_size
);
1437 iwl_dump_ini_err_table_iter(struct iwl_fw_runtime
*fwrt
,
1438 struct iwl_dump_ini_region_data
*reg_data
,
1439 void *range_ptr
, int idx
)
1441 struct iwl_fw_ini_region_tlv
*reg
= (void *)reg_data
->reg_tlv
->data
;
1442 struct iwl_fw_ini_region_err_table
*err_table
= ®
->err_table
;
1443 struct iwl_fw_ini_error_dump_range
*range
= range_ptr
;
1444 u32 addr
= le32_to_cpu(err_table
->base_addr
) +
1445 le32_to_cpu(err_table
->offset
);
1447 range
->internal_base_addr
= cpu_to_le32(addr
);
1448 range
->range_data_size
= err_table
->size
;
1449 iwl_trans_read_mem_bytes(fwrt
->trans
, addr
, range
->data
,
1450 le32_to_cpu(err_table
->size
));
1452 return sizeof(*range
) + le32_to_cpu(range
->range_data_size
);
1455 static int iwl_dump_ini_fw_pkt_iter(struct iwl_fw_runtime
*fwrt
,
1456 struct iwl_dump_ini_region_data
*reg_data
,
1457 void *range_ptr
, int idx
)
1459 struct iwl_fw_ini_error_dump_range
*range
= range_ptr
;
1460 struct iwl_rx_packet
*pkt
= reg_data
->dump_data
->fw_pkt
;
1466 pkt_len
= iwl_rx_packet_payload_len(pkt
);
1468 memcpy(&range
->fw_pkt_hdr
, &pkt
->hdr
, sizeof(range
->fw_pkt_hdr
));
1469 range
->range_data_size
= cpu_to_le32(pkt_len
);
1471 memcpy(range
->data
, pkt
->data
, pkt_len
);
1473 return sizeof(*range
) + le32_to_cpu(range
->range_data_size
);
1477 iwl_dump_ini_mem_fill_header(struct iwl_fw_runtime
*fwrt
,
1478 struct iwl_dump_ini_region_data
*reg_data
,
1481 struct iwl_fw_ini_error_dump
*dump
= data
;
1483 dump
->header
.version
= cpu_to_le32(IWL_INI_DUMP_VER
);
1485 return dump
->ranges
;
1489 * mask_apply_and_normalize - applies mask on val and normalize the result
1491 * The normalization is based on the first set bit in the mask
1494 * @mask: mask to apply and to normalize with
1496 static u32
mask_apply_and_normalize(u32 val
, u32 mask
)
1498 return (val
& mask
) >> (ffs(mask
) - 1);
1501 static __le32
iwl_get_mon_reg(struct iwl_fw_runtime
*fwrt
, u32 alloc_id
,
1502 const struct iwl_fw_mon_reg
*reg_info
)
1506 /* The header addresses of DBGCi is calculate as follows:
1507 * DBGC1 address + (0x100 * i)
1509 offs
= (alloc_id
- IWL_FW_INI_ALLOCATION_ID_DBGC1
) * 0x100;
1511 if (!reg_info
|| !reg_info
->addr
|| !reg_info
->mask
)
1514 val
= iwl_read_prph_no_grab(fwrt
->trans
, reg_info
->addr
+ offs
);
1516 return cpu_to_le32(mask_apply_and_normalize(val
, reg_info
->mask
));
1520 iwl_dump_ini_mon_fill_header(struct iwl_fw_runtime
*fwrt
,
1521 struct iwl_dump_ini_region_data
*reg_data
,
1522 struct iwl_fw_ini_monitor_dump
*data
,
1523 const struct iwl_fw_mon_regs
*addrs
)
1525 struct iwl_fw_ini_region_tlv
*reg
= (void *)reg_data
->reg_tlv
->data
;
1526 u32 alloc_id
= le32_to_cpu(reg
->dram_alloc_id
);
1527 unsigned long flags
;
1529 if (!iwl_trans_grab_nic_access(fwrt
->trans
, &flags
)) {
1530 IWL_ERR(fwrt
, "Failed to get monitor header\n");
1534 data
->write_ptr
= iwl_get_mon_reg(fwrt
, alloc_id
,
1536 data
->cycle_cnt
= iwl_get_mon_reg(fwrt
, alloc_id
,
1538 data
->cur_frag
= iwl_get_mon_reg(fwrt
, alloc_id
,
1541 iwl_trans_release_nic_access(fwrt
->trans
, &flags
);
1543 data
->header
.version
= cpu_to_le32(IWL_INI_DUMP_VER
);
1545 return data
->ranges
;
1549 iwl_dump_ini_mon_dram_fill_header(struct iwl_fw_runtime
*fwrt
,
1550 struct iwl_dump_ini_region_data
*reg_data
,
1553 struct iwl_fw_ini_monitor_dump
*mon_dump
= (void *)data
;
1555 return iwl_dump_ini_mon_fill_header(fwrt
, reg_data
, mon_dump
,
1556 &fwrt
->trans
->cfg
->mon_dram_regs
);
1560 iwl_dump_ini_mon_smem_fill_header(struct iwl_fw_runtime
*fwrt
,
1561 struct iwl_dump_ini_region_data
*reg_data
,
1564 struct iwl_fw_ini_monitor_dump
*mon_dump
= (void *)data
;
1566 return iwl_dump_ini_mon_fill_header(fwrt
, reg_data
, mon_dump
,
1567 &fwrt
->trans
->cfg
->mon_smem_regs
);
1571 iwl_dump_ini_err_table_fill_header(struct iwl_fw_runtime
*fwrt
,
1572 struct iwl_dump_ini_region_data
*reg_data
,
1575 struct iwl_fw_ini_region_tlv
*reg
= (void *)reg_data
->reg_tlv
->data
;
1576 struct iwl_fw_ini_err_table_dump
*dump
= data
;
1578 dump
->header
.version
= cpu_to_le32(IWL_INI_DUMP_VER
);
1579 dump
->version
= reg
->err_table
.version
;
1581 return dump
->ranges
;
1584 static u32
iwl_dump_ini_mem_ranges(struct iwl_fw_runtime
*fwrt
,
1585 struct iwl_dump_ini_region_data
*reg_data
)
1587 struct iwl_fw_ini_region_tlv
*reg
= (void *)reg_data
->reg_tlv
->data
;
1589 return iwl_tlv_array_len(reg_data
->reg_tlv
, reg
, addrs
);
1592 static u32
iwl_dump_ini_paging_ranges(struct iwl_fw_runtime
*fwrt
,
1593 struct iwl_dump_ini_region_data
*reg_data
)
1595 if (fwrt
->trans
->trans_cfg
->gen2
)
1596 return fwrt
->trans
->init_dram
.paging_cnt
;
1598 return fwrt
->num_of_paging_blk
;
1602 iwl_dump_ini_mon_dram_ranges(struct iwl_fw_runtime
*fwrt
,
1603 struct iwl_dump_ini_region_data
*reg_data
)
1605 struct iwl_fw_ini_region_tlv
*reg
= (void *)reg_data
->reg_tlv
->data
;
1606 struct iwl_fw_mon
*fw_mon
;
1607 u32 ranges
= 0, alloc_id
= le32_to_cpu(reg
->dram_alloc_id
);
1610 fw_mon
= &fwrt
->trans
->dbg
.fw_mon_ini
[alloc_id
];
1612 for (i
= 0; i
< fw_mon
->num_frags
; i
++) {
1613 if (!fw_mon
->frags
[i
].size
)
1622 static u32
iwl_dump_ini_txf_ranges(struct iwl_fw_runtime
*fwrt
,
1623 struct iwl_dump_ini_region_data
*reg_data
)
1625 u32 num_of_fifos
= 0;
1627 while (iwl_ini_txf_iter(fwrt
, reg_data
, num_of_fifos
))
1630 return num_of_fifos
;
1633 static u32
iwl_dump_ini_single_range(struct iwl_fw_runtime
*fwrt
,
1634 struct iwl_dump_ini_region_data
*reg_data
)
1639 static u32
iwl_dump_ini_mem_get_size(struct iwl_fw_runtime
*fwrt
,
1640 struct iwl_dump_ini_region_data
*reg_data
)
1642 struct iwl_fw_ini_region_tlv
*reg
= (void *)reg_data
->reg_tlv
->data
;
1643 u32 size
= le32_to_cpu(reg
->dev_addr
.size
);
1644 u32 ranges
= iwl_dump_ini_mem_ranges(fwrt
, reg_data
);
1646 if (!size
|| !ranges
)
1649 return sizeof(struct iwl_fw_ini_error_dump
) + ranges
*
1650 (size
+ sizeof(struct iwl_fw_ini_error_dump_range
));
1654 iwl_dump_ini_paging_get_size(struct iwl_fw_runtime
*fwrt
,
1655 struct iwl_dump_ini_region_data
*reg_data
)
1658 u32 range_header_len
= sizeof(struct iwl_fw_ini_error_dump_range
);
1659 u32 size
= sizeof(struct iwl_fw_ini_error_dump
);
1661 if (fwrt
->trans
->trans_cfg
->gen2
) {
1662 for (i
= 0; i
< iwl_dump_ini_paging_ranges(fwrt
, reg_data
); i
++)
1663 size
+= range_header_len
+
1664 fwrt
->trans
->init_dram
.paging
[i
].size
;
1666 for (i
= 1; i
<= iwl_dump_ini_paging_ranges(fwrt
, reg_data
);
1668 size
+= range_header_len
+
1669 fwrt
->fw_paging_db
[i
].fw_paging_size
;
1676 iwl_dump_ini_mon_dram_get_size(struct iwl_fw_runtime
*fwrt
,
1677 struct iwl_dump_ini_region_data
*reg_data
)
1679 struct iwl_fw_ini_region_tlv
*reg
= (void *)reg_data
->reg_tlv
->data
;
1680 struct iwl_fw_mon
*fw_mon
;
1681 u32 size
= 0, alloc_id
= le32_to_cpu(reg
->dram_alloc_id
);
1684 fw_mon
= &fwrt
->trans
->dbg
.fw_mon_ini
[alloc_id
];
1686 for (i
= 0; i
< fw_mon
->num_frags
; i
++) {
1687 struct iwl_dram_data
*frag
= &fw_mon
->frags
[i
];
1692 size
+= sizeof(struct iwl_fw_ini_error_dump_range
) + frag
->size
;
1696 size
+= sizeof(struct iwl_fw_ini_monitor_dump
);
1702 iwl_dump_ini_mon_smem_get_size(struct iwl_fw_runtime
*fwrt
,
1703 struct iwl_dump_ini_region_data
*reg_data
)
1705 struct iwl_fw_ini_region_tlv
*reg
= (void *)reg_data
->reg_tlv
->data
;
1706 struct iwl_fw_ini_allocation_tlv
*fw_mon_cfg
;
1707 u32 alloc_id
= le32_to_cpu(reg
->internal_buffer
.alloc_id
), size
;
1709 fw_mon_cfg
= &fwrt
->trans
->dbg
.fw_mon_cfg
[alloc_id
];
1710 if (le32_to_cpu(fw_mon_cfg
->buf_location
) !=
1711 IWL_FW_INI_LOCATION_SRAM_PATH
)
1714 size
= le32_to_cpu(reg
->internal_buffer
.size
);
1718 size
+= sizeof(struct iwl_fw_ini_monitor_dump
) +
1719 sizeof(struct iwl_fw_ini_error_dump_range
);
1724 static u32
iwl_dump_ini_txf_get_size(struct iwl_fw_runtime
*fwrt
,
1725 struct iwl_dump_ini_region_data
*reg_data
)
1727 struct iwl_fw_ini_region_tlv
*reg
= (void *)reg_data
->reg_tlv
->data
;
1728 struct iwl_txf_iter_data
*iter
= &fwrt
->dump
.txf_iter_data
;
1729 u32 registers_num
= iwl_tlv_array_len(reg_data
->reg_tlv
, reg
, addrs
);
1731 u32 fifo_hdr
= sizeof(struct iwl_fw_ini_error_dump_range
) +
1733 sizeof(struct iwl_fw_ini_error_dump_register
);
1735 while (iwl_ini_txf_iter(fwrt
, reg_data
, size
)) {
1737 if (!reg
->fifos
.hdr_only
)
1738 size
+= iter
->fifo_size
;
1744 return size
+ sizeof(struct iwl_fw_ini_error_dump
);
1747 static u32
iwl_dump_ini_rxf_get_size(struct iwl_fw_runtime
*fwrt
,
1748 struct iwl_dump_ini_region_data
*reg_data
)
1750 struct iwl_fw_ini_region_tlv
*reg
= (void *)reg_data
->reg_tlv
->data
;
1751 struct iwl_ini_rxf_data rx_data
;
1752 u32 registers_num
= iwl_tlv_array_len(reg_data
->reg_tlv
, reg
, addrs
);
1753 u32 size
= sizeof(struct iwl_fw_ini_error_dump
) +
1754 sizeof(struct iwl_fw_ini_error_dump_range
) +
1755 registers_num
* sizeof(struct iwl_fw_ini_error_dump_register
);
1757 if (reg
->fifos
.hdr_only
)
1760 iwl_ini_get_rxf_data(fwrt
, reg_data
, &rx_data
);
1761 size
+= rx_data
.size
;
1767 iwl_dump_ini_err_table_get_size(struct iwl_fw_runtime
*fwrt
,
1768 struct iwl_dump_ini_region_data
*reg_data
)
1770 struct iwl_fw_ini_region_tlv
*reg
= (void *)reg_data
->reg_tlv
->data
;
1771 u32 size
= le32_to_cpu(reg
->err_table
.size
);
1774 size
+= sizeof(struct iwl_fw_ini_err_table_dump
) +
1775 sizeof(struct iwl_fw_ini_error_dump_range
);
1781 iwl_dump_ini_fw_pkt_get_size(struct iwl_fw_runtime
*fwrt
,
1782 struct iwl_dump_ini_region_data
*reg_data
)
1786 if (!reg_data
->dump_data
->fw_pkt
)
1789 size
+= iwl_rx_packet_payload_len(reg_data
->dump_data
->fw_pkt
);
1791 size
+= sizeof(struct iwl_fw_ini_error_dump
) +
1792 sizeof(struct iwl_fw_ini_error_dump_range
);
1798 * struct iwl_dump_ini_mem_ops - ini memory dump operations
1799 * @get_num_of_ranges: returns the number of memory ranges in the region.
1800 * @get_size: returns the total size of the region.
1801 * @fill_mem_hdr: fills region type specific headers and returns pointer to
1802 * the first range or NULL if failed to fill headers.
1803 * @fill_range: copies a given memory range into the dump.
1804 * Returns the size of the range or negative error value otherwise.
1806 struct iwl_dump_ini_mem_ops
{
1807 u32 (*get_num_of_ranges
)(struct iwl_fw_runtime
*fwrt
,
1808 struct iwl_dump_ini_region_data
*reg_data
);
1809 u32 (*get_size
)(struct iwl_fw_runtime
*fwrt
,
1810 struct iwl_dump_ini_region_data
*reg_data
);
1811 void *(*fill_mem_hdr
)(struct iwl_fw_runtime
*fwrt
,
1812 struct iwl_dump_ini_region_data
*reg_data
,
1814 int (*fill_range
)(struct iwl_fw_runtime
*fwrt
,
1815 struct iwl_dump_ini_region_data
*reg_data
,
1816 void *range
, int idx
);
1822 * Creates a dump tlv and copy a memory region into it.
1823 * Returns the size of the current dump tlv or 0 if failed
1825 * @fwrt: fw runtime struct
1826 * @list: list to add the dump tlv to
1827 * @reg: memory region
1828 * @ops: memory dump operations
1830 static u32
iwl_dump_ini_mem(struct iwl_fw_runtime
*fwrt
, struct list_head
*list
,
1831 struct iwl_dump_ini_region_data
*reg_data
,
1832 const struct iwl_dump_ini_mem_ops
*ops
)
1834 struct iwl_fw_ini_region_tlv
*reg
= (void *)reg_data
->reg_tlv
->data
;
1835 struct iwl_fw_ini_dump_entry
*entry
;
1836 struct iwl_fw_error_dump_data
*tlv
;
1837 struct iwl_fw_ini_error_dump_header
*header
;
1838 u32 type
= le32_to_cpu(reg
->type
), id
= le32_to_cpu(reg
->id
);
1839 u32 num_of_ranges
, i
, size
;
1842 if (!ops
->get_num_of_ranges
|| !ops
->get_size
|| !ops
->fill_mem_hdr
||
1846 size
= ops
->get_size(fwrt
, reg_data
);
1850 entry
= vzalloc(sizeof(*entry
) + sizeof(*tlv
) + size
);
1854 entry
->size
= sizeof(*tlv
) + size
;
1856 tlv
= (void *)entry
->data
;
1857 tlv
->type
= reg
->type
;
1858 tlv
->len
= cpu_to_le32(size
);
1860 IWL_DEBUG_FW(fwrt
, "WRT: Collecting region: id=%d, type=%d\n", id
,
1863 num_of_ranges
= ops
->get_num_of_ranges(fwrt
, reg_data
);
1865 header
= (void *)tlv
->data
;
1866 header
->region_id
= reg
->id
;
1867 header
->num_of_ranges
= cpu_to_le32(num_of_ranges
);
1868 header
->name_len
= cpu_to_le32(IWL_FW_INI_MAX_NAME
);
1869 memcpy(header
->name
, reg
->name
, IWL_FW_INI_MAX_NAME
);
1871 range
= ops
->fill_mem_hdr(fwrt
, reg_data
, header
);
1874 "WRT: Failed to fill region header: id=%d, type=%d\n",
1879 for (i
= 0; i
< num_of_ranges
; i
++) {
1880 int range_size
= ops
->fill_range(fwrt
, reg_data
, range
, i
);
1882 if (range_size
< 0) {
1884 "WRT: Failed to dump region: id=%d, type=%d\n",
1888 range
= range
+ range_size
;
1891 list_add_tail(&entry
->list
, list
);
1901 static u32
iwl_dump_ini_info(struct iwl_fw_runtime
*fwrt
,
1902 struct iwl_fw_ini_trigger_tlv
*trigger
,
1903 struct list_head
*list
)
1905 struct iwl_fw_ini_dump_entry
*entry
;
1906 struct iwl_fw_error_dump_data
*tlv
;
1907 struct iwl_fw_ini_dump_info
*dump
;
1908 struct iwl_dbg_tlv_node
*node
;
1909 struct iwl_fw_ini_dump_cfg_name
*cfg_name
;
1910 u32 size
= sizeof(*tlv
) + sizeof(*dump
);
1911 u32 num_of_cfg_names
= 0;
1913 list_for_each_entry(node
, &fwrt
->trans
->dbg
.debug_info_tlv_list
, list
) {
1914 size
+= sizeof(*cfg_name
);
1918 entry
= vzalloc(sizeof(*entry
) + size
);
1924 tlv
= (void *)entry
->data
;
1925 tlv
->type
= cpu_to_le32(IWL_INI_DUMP_INFO_TYPE
);
1926 tlv
->len
= cpu_to_le32(size
- sizeof(*tlv
));
1928 dump
= (void *)tlv
->data
;
1930 dump
->version
= cpu_to_le32(IWL_INI_DUMP_VER
);
1931 dump
->time_point
= trigger
->time_point
;
1932 dump
->trigger_reason
= trigger
->trigger_reason
;
1933 dump
->external_cfg_state
=
1934 cpu_to_le32(fwrt
->trans
->dbg
.external_ini_cfg
);
1936 dump
->ver_type
= cpu_to_le32(fwrt
->dump
.fw_ver
.type
);
1937 dump
->ver_subtype
= cpu_to_le32(fwrt
->dump
.fw_ver
.subtype
);
1939 dump
->hw_step
= cpu_to_le32(CSR_HW_REV_STEP(fwrt
->trans
->hw_rev
));
1940 dump
->hw_type
= cpu_to_le32(CSR_HW_REV_TYPE(fwrt
->trans
->hw_rev
));
1942 dump
->rf_id_flavor
=
1943 cpu_to_le32(CSR_HW_RFID_FLAVOR(fwrt
->trans
->hw_rf_id
));
1944 dump
->rf_id_dash
= cpu_to_le32(CSR_HW_RFID_DASH(fwrt
->trans
->hw_rf_id
));
1945 dump
->rf_id_step
= cpu_to_le32(CSR_HW_RFID_STEP(fwrt
->trans
->hw_rf_id
));
1946 dump
->rf_id_type
= cpu_to_le32(CSR_HW_RFID_TYPE(fwrt
->trans
->hw_rf_id
));
1948 dump
->lmac_major
= cpu_to_le32(fwrt
->dump
.fw_ver
.lmac_major
);
1949 dump
->lmac_minor
= cpu_to_le32(fwrt
->dump
.fw_ver
.lmac_minor
);
1950 dump
->umac_major
= cpu_to_le32(fwrt
->dump
.fw_ver
.umac_major
);
1951 dump
->umac_minor
= cpu_to_le32(fwrt
->dump
.fw_ver
.umac_minor
);
1953 dump
->fw_mon_mode
= cpu_to_le32(fwrt
->trans
->dbg
.ini_dest
);
1954 dump
->regions_mask
= trigger
->regions_mask
;
1956 dump
->build_tag_len
= cpu_to_le32(sizeof(dump
->build_tag
));
1957 memcpy(dump
->build_tag
, fwrt
->fw
->human_readable
,
1958 sizeof(dump
->build_tag
));
1960 cfg_name
= dump
->cfg_names
;
1961 dump
->num_of_cfg_names
= cpu_to_le32(num_of_cfg_names
);
1962 list_for_each_entry(node
, &fwrt
->trans
->dbg
.debug_info_tlv_list
, list
) {
1963 struct iwl_fw_ini_debug_info_tlv
*debug_info
=
1964 (void *)node
->tlv
.data
;
1966 cfg_name
->image_type
= debug_info
->image_type
;
1967 cfg_name
->cfg_name_len
=
1968 cpu_to_le32(IWL_FW_INI_MAX_CFG_NAME
);
1969 memcpy(cfg_name
->cfg_name
, debug_info
->debug_cfg_name
,
1970 sizeof(cfg_name
->cfg_name
));
1974 /* add dump info TLV to the beginning of the list since it needs to be
1975 * the first TLV in the dump
1977 list_add(&entry
->list
, list
);
1982 static const struct iwl_dump_ini_mem_ops iwl_dump_ini_region_ops
[] = {
1983 [IWL_FW_INI_REGION_INVALID
] = {},
1984 [IWL_FW_INI_REGION_INTERNAL_BUFFER
] = {
1985 .get_num_of_ranges
= iwl_dump_ini_single_range
,
1986 .get_size
= iwl_dump_ini_mon_smem_get_size
,
1987 .fill_mem_hdr
= iwl_dump_ini_mon_smem_fill_header
,
1988 .fill_range
= iwl_dump_ini_mon_smem_iter
,
1990 [IWL_FW_INI_REGION_DRAM_BUFFER
] = {
1991 .get_num_of_ranges
= iwl_dump_ini_mon_dram_ranges
,
1992 .get_size
= iwl_dump_ini_mon_dram_get_size
,
1993 .fill_mem_hdr
= iwl_dump_ini_mon_dram_fill_header
,
1994 .fill_range
= iwl_dump_ini_mon_dram_iter
,
1996 [IWL_FW_INI_REGION_TXF
] = {
1997 .get_num_of_ranges
= iwl_dump_ini_txf_ranges
,
1998 .get_size
= iwl_dump_ini_txf_get_size
,
1999 .fill_mem_hdr
= iwl_dump_ini_mem_fill_header
,
2000 .fill_range
= iwl_dump_ini_txf_iter
,
2002 [IWL_FW_INI_REGION_RXF
] = {
2003 .get_num_of_ranges
= iwl_dump_ini_single_range
,
2004 .get_size
= iwl_dump_ini_rxf_get_size
,
2005 .fill_mem_hdr
= iwl_dump_ini_mem_fill_header
,
2006 .fill_range
= iwl_dump_ini_rxf_iter
,
2008 [IWL_FW_INI_REGION_LMAC_ERROR_TABLE
] = {
2009 .get_num_of_ranges
= iwl_dump_ini_single_range
,
2010 .get_size
= iwl_dump_ini_err_table_get_size
,
2011 .fill_mem_hdr
= iwl_dump_ini_err_table_fill_header
,
2012 .fill_range
= iwl_dump_ini_err_table_iter
,
2014 [IWL_FW_INI_REGION_UMAC_ERROR_TABLE
] = {
2015 .get_num_of_ranges
= iwl_dump_ini_single_range
,
2016 .get_size
= iwl_dump_ini_err_table_get_size
,
2017 .fill_mem_hdr
= iwl_dump_ini_err_table_fill_header
,
2018 .fill_range
= iwl_dump_ini_err_table_iter
,
2020 [IWL_FW_INI_REGION_RSP_OR_NOTIF
] = {
2021 .get_num_of_ranges
= iwl_dump_ini_single_range
,
2022 .get_size
= iwl_dump_ini_fw_pkt_get_size
,
2023 .fill_mem_hdr
= iwl_dump_ini_mem_fill_header
,
2024 .fill_range
= iwl_dump_ini_fw_pkt_iter
,
2026 [IWL_FW_INI_REGION_DEVICE_MEMORY
] = {
2027 .get_num_of_ranges
= iwl_dump_ini_mem_ranges
,
2028 .get_size
= iwl_dump_ini_mem_get_size
,
2029 .fill_mem_hdr
= iwl_dump_ini_mem_fill_header
,
2030 .fill_range
= iwl_dump_ini_dev_mem_iter
,
2032 [IWL_FW_INI_REGION_PERIPHERY_MAC
] = {
2033 .get_num_of_ranges
= iwl_dump_ini_mem_ranges
,
2034 .get_size
= iwl_dump_ini_mem_get_size
,
2035 .fill_mem_hdr
= iwl_dump_ini_mem_fill_header
,
2036 .fill_range
= iwl_dump_ini_prph_iter
,
2038 [IWL_FW_INI_REGION_PERIPHERY_PHY
] = {},
2039 [IWL_FW_INI_REGION_PERIPHERY_AUX
] = {},
2040 [IWL_FW_INI_REGION_PAGING
] = {
2041 .fill_mem_hdr
= iwl_dump_ini_mem_fill_header
,
2042 .get_num_of_ranges
= iwl_dump_ini_paging_ranges
,
2043 .get_size
= iwl_dump_ini_paging_get_size
,
2044 .fill_range
= iwl_dump_ini_paging_iter
,
2046 [IWL_FW_INI_REGION_CSR
] = {
2047 .get_num_of_ranges
= iwl_dump_ini_mem_ranges
,
2048 .get_size
= iwl_dump_ini_mem_get_size
,
2049 .fill_mem_hdr
= iwl_dump_ini_mem_fill_header
,
2050 .fill_range
= iwl_dump_ini_csr_iter
,
2052 [IWL_FW_INI_REGION_DRAM_IMR
] = {},
2053 [IWL_FW_INI_REGION_PCI_IOSF_CONFIG
] = {},
2056 static u32
iwl_dump_ini_trigger(struct iwl_fw_runtime
*fwrt
,
2057 struct iwl_fwrt_dump_data
*dump_data
,
2058 struct list_head
*list
)
2060 struct iwl_fw_ini_trigger_tlv
*trigger
= dump_data
->trig
;
2061 struct iwl_dump_ini_region_data reg_data
= {
2062 .dump_data
= dump_data
,
2066 u64 regions_mask
= le64_to_cpu(trigger
->regions_mask
);
2068 for (i
= 0; i
< 64; i
++) {
2070 struct iwl_fw_ini_region_tlv
*reg
;
2072 if (!(BIT_ULL(i
) & regions_mask
))
2075 reg_data
.reg_tlv
= fwrt
->trans
->dbg
.active_regions
[i
];
2076 if (!reg_data
.reg_tlv
) {
2078 "WRT: Unassigned region id %d, skipping\n", i
);
2082 reg
= (void *)reg_data
.reg_tlv
->data
;
2083 reg_type
= le32_to_cpu(reg
->type
);
2084 if (reg_type
>= ARRAY_SIZE(iwl_dump_ini_region_ops
))
2087 size
+= iwl_dump_ini_mem(fwrt
, list
, ®_data
,
2088 &iwl_dump_ini_region_ops
[reg_type
]);
2092 size
+= iwl_dump_ini_info(fwrt
, trigger
, list
);
2097 static bool iwl_fw_ini_trigger_on(struct iwl_fw_runtime
*fwrt
,
2098 struct iwl_fw_ini_trigger_tlv
*trig
)
2100 enum iwl_fw_ini_time_point tp_id
= le32_to_cpu(trig
->time_point
);
2101 u32 usec
= le32_to_cpu(trig
->ignore_consec
);
2103 if (!iwl_trans_dbg_ini_valid(fwrt
->trans
) ||
2104 tp_id
== IWL_FW_INI_TIME_POINT_INVALID
||
2105 tp_id
>= IWL_FW_INI_TIME_POINT_NUM
||
2106 iwl_fw_dbg_no_trig_window(fwrt
, tp_id
, usec
))
2112 static u32
iwl_dump_ini_file_gen(struct iwl_fw_runtime
*fwrt
,
2113 struct iwl_fwrt_dump_data
*dump_data
,
2114 struct list_head
*list
)
2116 struct iwl_fw_ini_trigger_tlv
*trigger
= dump_data
->trig
;
2117 struct iwl_fw_ini_dump_entry
*entry
;
2118 struct iwl_fw_ini_dump_file_hdr
*hdr
;
2121 if (!trigger
|| !iwl_fw_ini_trigger_on(fwrt
, trigger
) ||
2122 !le64_to_cpu(trigger
->regions_mask
))
2125 entry
= vzalloc(sizeof(*entry
) + sizeof(*hdr
));
2129 entry
->size
= sizeof(*hdr
);
2131 size
= iwl_dump_ini_trigger(fwrt
, dump_data
, list
);
2137 hdr
= (void *)entry
->data
;
2138 hdr
->barker
= cpu_to_le32(IWL_FW_INI_ERROR_DUMP_BARKER
);
2139 hdr
->file_len
= cpu_to_le32(size
+ entry
->size
);
2141 list_add(&entry
->list
, list
);
2143 return le32_to_cpu(hdr
->file_len
);
2146 static void iwl_fw_error_dump(struct iwl_fw_runtime
*fwrt
)
2148 struct iwl_fw_dump_ptrs fw_error_dump
= {};
2149 struct iwl_fw_error_dump_file
*dump_file
;
2150 struct scatterlist
*sg_dump_data
;
2152 u32 dump_mask
= fwrt
->fw
->dbg
.dump_mask
;
2154 dump_file
= iwl_fw_error_dump_file(fwrt
, &fw_error_dump
);
2158 if (fwrt
->dump
.monitor_only
)
2159 dump_mask
&= IWL_FW_ERROR_DUMP_FW_MONITOR
;
2161 fw_error_dump
.trans_ptr
= iwl_trans_dump_data(fwrt
->trans
, dump_mask
);
2162 file_len
= le32_to_cpu(dump_file
->file_len
);
2163 fw_error_dump
.fwrt_len
= file_len
;
2165 if (fw_error_dump
.trans_ptr
) {
2166 file_len
+= fw_error_dump
.trans_ptr
->len
;
2167 dump_file
->file_len
= cpu_to_le32(file_len
);
2170 sg_dump_data
= alloc_sgtable(file_len
);
2172 sg_pcopy_from_buffer(sg_dump_data
,
2173 sg_nents(sg_dump_data
),
2174 fw_error_dump
.fwrt_ptr
,
2175 fw_error_dump
.fwrt_len
, 0);
2176 if (fw_error_dump
.trans_ptr
)
2177 sg_pcopy_from_buffer(sg_dump_data
,
2178 sg_nents(sg_dump_data
),
2179 fw_error_dump
.trans_ptr
->data
,
2180 fw_error_dump
.trans_ptr
->len
,
2181 fw_error_dump
.fwrt_len
);
2182 dev_coredumpsg(fwrt
->trans
->dev
, sg_dump_data
, file_len
,
2185 vfree(fw_error_dump
.fwrt_ptr
);
2186 vfree(fw_error_dump
.trans_ptr
);
2189 iwl_fw_free_dump_desc(fwrt
);
2192 static void iwl_dump_ini_list_free(struct list_head
*list
)
2194 while (!list_empty(list
)) {
2195 struct iwl_fw_ini_dump_entry
*entry
=
2196 list_entry(list
->next
, typeof(*entry
), list
);
2198 list_del(&entry
->list
);
2203 static void iwl_fw_error_dump_data_free(struct iwl_fwrt_dump_data
*dump_data
)
2205 dump_data
->trig
= NULL
;
2206 kfree(dump_data
->fw_pkt
);
2207 dump_data
->fw_pkt
= NULL
;
2210 static void iwl_fw_error_ini_dump(struct iwl_fw_runtime
*fwrt
,
2211 struct iwl_fwrt_dump_data
*dump_data
)
2213 struct list_head dump_list
= LIST_HEAD_INIT(dump_list
);
2214 struct scatterlist
*sg_dump_data
;
2215 u32 file_len
= iwl_dump_ini_file_gen(fwrt
, dump_data
, &dump_list
);
2220 sg_dump_data
= alloc_sgtable(file_len
);
2222 struct iwl_fw_ini_dump_entry
*entry
;
2223 int sg_entries
= sg_nents(sg_dump_data
);
2226 list_for_each_entry(entry
, &dump_list
, list
) {
2227 sg_pcopy_from_buffer(sg_dump_data
, sg_entries
,
2228 entry
->data
, entry
->size
, offs
);
2229 offs
+= entry
->size
;
2231 dev_coredumpsg(fwrt
->trans
->dev
, sg_dump_data
, file_len
,
2234 iwl_dump_ini_list_free(&dump_list
);
2237 iwl_fw_error_dump_data_free(dump_data
);
2240 const struct iwl_fw_dump_desc iwl_dump_desc_assert
= {
2242 .type
= cpu_to_le32(FW_DBG_TRIGGER_FW_ASSERT
),
2245 IWL_EXPORT_SYMBOL(iwl_dump_desc_assert
);
2247 int iwl_fw_dbg_collect_desc(struct iwl_fw_runtime
*fwrt
,
2248 const struct iwl_fw_dump_desc
*desc
,
2252 if (iwl_trans_dbg_ini_valid(fwrt
->trans
)) {
2253 iwl_fw_free_dump_desc(fwrt
);
2257 /* use wks[0] since dump flow prior to ini does not need to support
2258 * consecutive triggers collection
2260 if (test_and_set_bit(fwrt
->dump
.wks
[0].idx
, &fwrt
->dump
.active_wks
))
2263 if (WARN_ON(fwrt
->dump
.desc
))
2264 iwl_fw_free_dump_desc(fwrt
);
2266 IWL_WARN(fwrt
, "Collecting data: trigger %d fired.\n",
2267 le32_to_cpu(desc
->trig_desc
.type
));
2269 fwrt
->dump
.desc
= desc
;
2270 fwrt
->dump
.monitor_only
= monitor_only
;
2272 schedule_delayed_work(&fwrt
->dump
.wks
[0].wk
, usecs_to_jiffies(delay
));
2276 IWL_EXPORT_SYMBOL(iwl_fw_dbg_collect_desc
);
2278 int iwl_fw_dbg_error_collect(struct iwl_fw_runtime
*fwrt
,
2279 enum iwl_fw_dbg_trigger trig_type
)
2282 struct iwl_fw_dump_desc
*iwl_dump_error_desc
;
2284 if (!test_bit(STATUS_DEVICE_ENABLED
, &fwrt
->trans
->status
))
2287 iwl_dump_error_desc
= kmalloc(sizeof(*iwl_dump_error_desc
), GFP_KERNEL
);
2288 if (!iwl_dump_error_desc
)
2291 iwl_dump_error_desc
->trig_desc
.type
= cpu_to_le32(trig_type
);
2292 iwl_dump_error_desc
->len
= 0;
2294 ret
= iwl_fw_dbg_collect_desc(fwrt
, iwl_dump_error_desc
, false, 0);
2296 kfree(iwl_dump_error_desc
);
2298 iwl_trans_sync_nmi(fwrt
->trans
);
2302 IWL_EXPORT_SYMBOL(iwl_fw_dbg_error_collect
);
2304 int iwl_fw_dbg_collect(struct iwl_fw_runtime
*fwrt
,
2305 enum iwl_fw_dbg_trigger trig
,
2306 const char *str
, size_t len
,
2307 struct iwl_fw_dbg_trigger_tlv
*trigger
)
2309 struct iwl_fw_dump_desc
*desc
;
2310 unsigned int delay
= 0;
2311 bool monitor_only
= false;
2314 u16 occurrences
= le16_to_cpu(trigger
->occurrences
) - 1;
2316 if (!le16_to_cpu(trigger
->occurrences
))
2319 if (trigger
->flags
& IWL_FW_DBG_FORCE_RESTART
) {
2320 IWL_WARN(fwrt
, "Force restart: trigger %d fired.\n",
2322 iwl_force_nmi(fwrt
->trans
);
2326 trigger
->occurrences
= cpu_to_le16(occurrences
);
2327 monitor_only
= trigger
->mode
& IWL_FW_DBG_TRIGGER_MONITOR_ONLY
;
2329 /* convert msec to usec */
2330 delay
= le32_to_cpu(trigger
->stop_delay
) * USEC_PER_MSEC
;
2333 desc
= kzalloc(sizeof(*desc
) + len
, GFP_ATOMIC
);
2339 desc
->trig_desc
.type
= cpu_to_le32(trig
);
2340 memcpy(desc
->trig_desc
.data
, str
, len
);
2342 return iwl_fw_dbg_collect_desc(fwrt
, desc
, monitor_only
, delay
);
2344 IWL_EXPORT_SYMBOL(iwl_fw_dbg_collect
);
2346 int iwl_fw_dbg_ini_collect(struct iwl_fw_runtime
*fwrt
,
2347 struct iwl_fwrt_dump_data
*dump_data
)
2349 struct iwl_fw_ini_trigger_tlv
*trig
= dump_data
->trig
;
2350 enum iwl_fw_ini_time_point tp_id
= le32_to_cpu(trig
->time_point
);
2354 if (test_bit(STATUS_GEN_ACTIVE_TRIGS
, &fwrt
->status
))
2357 if (!iwl_fw_ini_trigger_on(fwrt
, trig
)) {
2358 IWL_WARN(fwrt
, "WRT: Trigger %d is not active, aborting dump\n",
2363 delay
= le32_to_cpu(trig
->dump_delay
);
2364 occur
= le32_to_cpu(trig
->occurrences
);
2368 trig
->occurrences
= cpu_to_le32(--occur
);
2370 /* Check there is an available worker.
2371 * ffz return value is undefined if no zero exists,
2372 * so check against ~0UL first.
2374 if (fwrt
->dump
.active_wks
== ~0UL)
2377 idx
= ffz(fwrt
->dump
.active_wks
);
2379 if (idx
>= IWL_FW_RUNTIME_DUMP_WK_NUM
||
2380 test_and_set_bit(fwrt
->dump
.wks
[idx
].idx
, &fwrt
->dump
.active_wks
))
2383 fwrt
->dump
.wks
[idx
].dump_data
= *dump_data
;
2385 IWL_WARN(fwrt
, "WRT: Collecting data: ini trigger %d fired.\n", tp_id
);
2387 schedule_delayed_work(&fwrt
->dump
.wks
[idx
].wk
, usecs_to_jiffies(delay
));
2392 int iwl_fw_dbg_collect_trig(struct iwl_fw_runtime
*fwrt
,
2393 struct iwl_fw_dbg_trigger_tlv
*trigger
,
2394 const char *fmt
, ...)
2399 if (iwl_trans_dbg_ini_valid(fwrt
->trans
))
2405 buf
[sizeof(buf
) - 1] = '\0';
2408 vsnprintf(buf
, sizeof(buf
), fmt
, ap
);
2411 /* check for truncation */
2412 if (WARN_ON_ONCE(buf
[sizeof(buf
) - 1]))
2413 buf
[sizeof(buf
) - 1] = '\0';
2415 len
= strlen(buf
) + 1;
2418 ret
= iwl_fw_dbg_collect(fwrt
, le32_to_cpu(trigger
->id
), buf
, len
,
2426 IWL_EXPORT_SYMBOL(iwl_fw_dbg_collect_trig
);
2428 int iwl_fw_start_dbg_conf(struct iwl_fw_runtime
*fwrt
, u8 conf_id
)
2434 if (WARN_ONCE(conf_id
>= ARRAY_SIZE(fwrt
->fw
->dbg
.conf_tlv
),
2435 "Invalid configuration %d\n", conf_id
))
2438 /* EARLY START - firmware's configuration is hard coded */
2439 if ((!fwrt
->fw
->dbg
.conf_tlv
[conf_id
] ||
2440 !fwrt
->fw
->dbg
.conf_tlv
[conf_id
]->num_of_hcmds
) &&
2441 conf_id
== FW_DBG_START_FROM_ALIVE
)
2444 if (!fwrt
->fw
->dbg
.conf_tlv
[conf_id
])
2447 if (fwrt
->dump
.conf
!= FW_DBG_INVALID
)
2448 IWL_WARN(fwrt
, "FW already configured (%d) - re-configuring\n",
2451 /* Send all HCMDs for configuring the FW debug */
2452 ptr
= (void *)&fwrt
->fw
->dbg
.conf_tlv
[conf_id
]->hcmd
;
2453 for (i
= 0; i
< fwrt
->fw
->dbg
.conf_tlv
[conf_id
]->num_of_hcmds
; i
++) {
2454 struct iwl_fw_dbg_conf_hcmd
*cmd
= (void *)ptr
;
2455 struct iwl_host_cmd hcmd
= {
2457 .len
= { le16_to_cpu(cmd
->len
), },
2458 .data
= { cmd
->data
, },
2461 ret
= iwl_trans_send_cmd(fwrt
->trans
, &hcmd
);
2465 ptr
+= sizeof(*cmd
);
2466 ptr
+= le16_to_cpu(cmd
->len
);
2469 fwrt
->dump
.conf
= conf_id
;
2473 IWL_EXPORT_SYMBOL(iwl_fw_start_dbg_conf
);
2475 /* this function assumes dump_start was called beforehand and dump_end will be
2478 static void iwl_fw_dbg_collect_sync(struct iwl_fw_runtime
*fwrt
, u8 wk_idx
)
2480 struct iwl_fw_dbg_params params
= {0};
2482 if (!test_bit(wk_idx
, &fwrt
->dump
.active_wks
))
2485 if (fwrt
->ops
&& fwrt
->ops
->fw_running
&&
2486 !fwrt
->ops
->fw_running(fwrt
->ops_ctx
)) {
2487 IWL_ERR(fwrt
, "Firmware not running - cannot dump error\n");
2488 iwl_fw_free_dump_desc(fwrt
);
2492 /* there's no point in fw dump if the bus is dead */
2493 if (test_bit(STATUS_TRANS_DEAD
, &fwrt
->trans
->status
)) {
2494 IWL_ERR(fwrt
, "Skip fw error dump since bus is dead\n");
2498 if (iwl_fw_dbg_stop_restart_recording(fwrt
, ¶ms
, true)) {
2499 IWL_ERR(fwrt
, "Failed to stop DBGC recording, aborting dump\n");
2503 IWL_DEBUG_FW_INFO(fwrt
, "WRT: Data collection start\n");
2504 if (iwl_trans_dbg_ini_valid(fwrt
->trans
))
2505 iwl_fw_error_ini_dump(fwrt
, &fwrt
->dump
.wks
[wk_idx
].dump_data
);
2507 iwl_fw_error_dump(fwrt
);
2508 IWL_DEBUG_FW_INFO(fwrt
, "WRT: Data collection done\n");
2510 iwl_fw_dbg_stop_restart_recording(fwrt
, ¶ms
, false);
2513 clear_bit(wk_idx
, &fwrt
->dump
.active_wks
);
2516 void iwl_fw_error_dump_wk(struct work_struct
*work
)
2518 struct iwl_fwrt_wk_data
*wks
=
2519 container_of(work
, typeof(*wks
), wk
.work
);
2520 struct iwl_fw_runtime
*fwrt
=
2521 container_of(wks
, typeof(*fwrt
), dump
.wks
[wks
->idx
]);
2523 /* assumes the op mode mutex is locked in dump_start since
2524 * iwl_fw_dbg_collect_sync can't run in parallel
2526 if (fwrt
->ops
&& fwrt
->ops
->dump_start
&&
2527 fwrt
->ops
->dump_start(fwrt
->ops_ctx
))
2530 iwl_fw_dbg_collect_sync(fwrt
, wks
->idx
);
2532 if (fwrt
->ops
&& fwrt
->ops
->dump_end
)
2533 fwrt
->ops
->dump_end(fwrt
->ops_ctx
);
2536 void iwl_fw_dbg_read_d3_debug_data(struct iwl_fw_runtime
*fwrt
)
2538 const struct iwl_cfg
*cfg
= fwrt
->trans
->cfg
;
2540 if (!iwl_fw_dbg_is_d3_debug_enabled(fwrt
))
2543 if (!fwrt
->dump
.d3_debug_data
) {
2544 fwrt
->dump
.d3_debug_data
= kmalloc(cfg
->d3_debug_data_length
,
2546 if (!fwrt
->dump
.d3_debug_data
) {
2548 "failed to allocate memory for D3 debug data\n");
2553 /* if the buffer holds previous debug data it is overwritten */
2554 iwl_trans_read_mem_bytes(fwrt
->trans
, cfg
->d3_debug_data_base_addr
,
2555 fwrt
->dump
.d3_debug_data
,
2556 cfg
->d3_debug_data_length
);
2558 IWL_EXPORT_SYMBOL(iwl_fw_dbg_read_d3_debug_data
);
2560 void iwl_fw_dbg_stop_sync(struct iwl_fw_runtime
*fwrt
)
2564 iwl_dbg_tlv_del_timers(fwrt
->trans
);
2565 for (i
= 0; i
< IWL_FW_RUNTIME_DUMP_WK_NUM
; i
++)
2566 iwl_fw_dbg_collect_sync(fwrt
, i
);
2568 iwl_fw_dbg_stop_restart_recording(fwrt
, NULL
, true);
2570 IWL_EXPORT_SYMBOL(iwl_fw_dbg_stop_sync
);
2572 #define FSEQ_REG(x) { .addr = (x), .str = #x, }
2574 void iwl_fw_error_print_fseq_regs(struct iwl_fw_runtime
*fwrt
)
2576 struct iwl_trans
*trans
= fwrt
->trans
;
2577 unsigned long flags
;
2583 FSEQ_REG(FSEQ_ERROR_CODE
),
2584 FSEQ_REG(FSEQ_TOP_INIT_VERSION
),
2585 FSEQ_REG(FSEQ_CNVIO_INIT_VERSION
),
2586 FSEQ_REG(FSEQ_OTP_VERSION
),
2587 FSEQ_REG(FSEQ_TOP_CONTENT_VERSION
),
2588 FSEQ_REG(FSEQ_ALIVE_TOKEN
),
2589 FSEQ_REG(FSEQ_CNVI_ID
),
2590 FSEQ_REG(FSEQ_CNVR_ID
),
2591 FSEQ_REG(CNVI_AUX_MISC_CHIP
),
2592 FSEQ_REG(CNVR_AUX_MISC_CHIP
),
2593 FSEQ_REG(CNVR_SCU_SD_REGS_SD_REG_DIG_DCDC_VTRIM
),
2594 FSEQ_REG(CNVR_SCU_SD_REGS_SD_REG_ACTIVE_VDIG_MIRROR
),
2597 if (!iwl_trans_grab_nic_access(trans
, &flags
))
2600 IWL_ERR(fwrt
, "Fseq Registers:\n");
2602 for (i
= 0; i
< ARRAY_SIZE(fseq_regs
); i
++)
2603 IWL_ERR(fwrt
, "0x%08X | %s\n",
2604 iwl_read_prph_no_grab(trans
, fseq_regs
[i
].addr
),
2607 iwl_trans_release_nic_access(trans
, &flags
);
2609 IWL_EXPORT_SYMBOL(iwl_fw_error_print_fseq_regs
);
2611 static int iwl_fw_dbg_suspend_resume_hcmd(struct iwl_trans
*trans
, bool suspend
)
2613 struct iwl_dbg_suspend_resume_cmd cmd
= {
2614 .operation
= suspend
?
2615 cpu_to_le32(DBGC_SUSPEND_CMD
) :
2616 cpu_to_le32(DBGC_RESUME_CMD
),
2618 struct iwl_host_cmd hcmd
= {
2619 .id
= WIDE_ID(DEBUG_GROUP
, DBGC_SUSPEND_RESUME
),
2621 .len
[0] = sizeof(cmd
),
2624 return iwl_trans_send_cmd(trans
, &hcmd
);
2627 static void iwl_fw_dbg_stop_recording(struct iwl_trans
*trans
,
2628 struct iwl_fw_dbg_params
*params
)
2630 if (trans
->trans_cfg
->device_family
== IWL_DEVICE_FAMILY_7000
) {
2631 iwl_set_bits_prph(trans
, MON_BUFF_SAMPLE_CTL
, 0x100);
2636 params
->in_sample
= iwl_read_umac_prph(trans
, DBGC_IN_SAMPLE
);
2637 params
->out_ctrl
= iwl_read_umac_prph(trans
, DBGC_OUT_CTRL
);
2640 iwl_write_umac_prph(trans
, DBGC_IN_SAMPLE
, 0);
2641 /* wait for the DBGC to finish writing the internal buffer to DRAM to
2642 * avoid halting the HW while writing
2644 usleep_range(700, 1000);
2645 iwl_write_umac_prph(trans
, DBGC_OUT_CTRL
, 0);
2648 static int iwl_fw_dbg_restart_recording(struct iwl_trans
*trans
,
2649 struct iwl_fw_dbg_params
*params
)
2654 if (trans
->trans_cfg
->device_family
== IWL_DEVICE_FAMILY_7000
) {
2655 iwl_clear_bits_prph(trans
, MON_BUFF_SAMPLE_CTL
, 0x100);
2656 iwl_clear_bits_prph(trans
, MON_BUFF_SAMPLE_CTL
, 0x1);
2657 iwl_set_bits_prph(trans
, MON_BUFF_SAMPLE_CTL
, 0x1);
2659 iwl_write_umac_prph(trans
, DBGC_IN_SAMPLE
, params
->in_sample
);
2660 iwl_write_umac_prph(trans
, DBGC_OUT_CTRL
, params
->out_ctrl
);
2666 int iwl_fw_dbg_stop_restart_recording(struct iwl_fw_runtime
*fwrt
,
2667 struct iwl_fw_dbg_params
*params
,
2672 /* if the FW crashed or not debug monitor cfg was given, there is
2673 * no point in changing the recording state
2675 if (test_bit(STATUS_FW_ERROR
, &fwrt
->trans
->status
) ||
2676 (!fwrt
->trans
->dbg
.dest_tlv
&&
2677 fwrt
->trans
->dbg
.ini_dest
== IWL_FW_INI_LOCATION_INVALID
))
2680 if (fw_has_capa(&fwrt
->fw
->ucode_capa
,
2681 IWL_UCODE_TLV_CAPA_DBG_SUSPEND_RESUME_CMD_SUPP
))
2682 ret
= iwl_fw_dbg_suspend_resume_hcmd(fwrt
->trans
, stop
);
2684 iwl_fw_dbg_stop_recording(fwrt
->trans
, params
);
2686 ret
= iwl_fw_dbg_restart_recording(fwrt
->trans
, params
);
2687 #ifdef CONFIG_IWLWIFI_DEBUGFS
2690 fwrt
->trans
->dbg
.rec_on
= false;
2692 iwl_fw_set_dbg_rec_on(fwrt
);
2698 IWL_EXPORT_SYMBOL(iwl_fw_dbg_stop_restart_recording
);