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[mirror_ubuntu-bionic-kernel.git] / drivers / net / wireless / intel / iwlwifi / mvm / fw.c
1 /******************************************************************************
2 *
3 * This file is provided under a dual BSD/GPLv2 license. When using or
4 * redistributing this file, you may do so under either license.
5 *
6 * GPL LICENSE SUMMARY
7 *
8 * Copyright(c) 2012 - 2014 Intel Corporation. All rights reserved.
9 * Copyright(c) 2013 - 2015 Intel Mobile Communications GmbH
10 * Copyright(c) 2016 Intel Deutschland GmbH
11 *
12 * This program is free software; you can redistribute it and/or modify
13 * it under the terms of version 2 of the GNU General Public License as
14 * published by the Free Software Foundation.
15 *
16 * This program is distributed in the hope that it will be useful, but
17 * WITHOUT ANY WARRANTY; without even the implied warranty of
18 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
19 * General Public License for more details.
20 *
21 * You should have received a copy of the GNU General Public License
22 * along with this program; if not, write to the Free Software
23 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110,
24 * USA
25 *
26 * The full GNU General Public License is included in this distribution
27 * in the file called COPYING.
28 *
29 * Contact Information:
30 * Intel Linux Wireless <linuxwifi@intel.com>
31 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
32 *
33 * BSD LICENSE
34 *
35 * Copyright(c) 2012 - 2014 Intel Corporation. All rights reserved.
36 * Copyright(c) 2013 - 2015 Intel Mobile Communications GmbH
37 * All rights reserved.
38 *
39 * Redistribution and use in source and binary forms, with or without
40 * modification, are permitted provided that the following conditions
41 * are met:
42 *
43 * * Redistributions of source code must retain the above copyright
44 * notice, this list of conditions and the following disclaimer.
45 * * Redistributions in binary form must reproduce the above copyright
46 * notice, this list of conditions and the following disclaimer in
47 * the documentation and/or other materials provided with the
48 * distribution.
49 * * Neither the name Intel Corporation nor the names of its
50 * contributors may be used to endorse or promote products derived
51 * from this software without specific prior written permission.
52 *
53 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
54 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
55 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
56 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
57 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
58 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
59 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
60 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
61 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
62 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
63 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
64 *
65 *****************************************************************************/
66 #include <net/mac80211.h>
67 #include <linux/netdevice.h>
68
69 #include "iwl-trans.h"
70 #include "iwl-op-mode.h"
71 #include "iwl-fw.h"
72 #include "iwl-debug.h"
73 #include "iwl-csr.h" /* for iwl_mvm_rx_card_state_notif */
74 #include "iwl-io.h" /* for iwl_mvm_rx_card_state_notif */
75 #include "iwl-prph.h"
76 #include "iwl-eeprom-parse.h"
77
78 #include "mvm.h"
79 #include "fw-dbg.h"
80 #include "iwl-phy-db.h"
81
82 #define MVM_UCODE_ALIVE_TIMEOUT HZ
83 #define MVM_UCODE_CALIB_TIMEOUT (2*HZ)
84
85 #define UCODE_VALID_OK cpu_to_le32(0x1)
86
87 struct iwl_mvm_alive_data {
88 bool valid;
89 u32 scd_base_addr;
90 };
91
92 static inline const struct fw_img *
93 iwl_get_ucode_image(struct iwl_mvm *mvm, enum iwl_ucode_type ucode_type)
94 {
95 if (ucode_type >= IWL_UCODE_TYPE_MAX)
96 return NULL;
97
98 return &mvm->fw->img[ucode_type];
99 }
100
101 static int iwl_send_tx_ant_cfg(struct iwl_mvm *mvm, u8 valid_tx_ant)
102 {
103 struct iwl_tx_ant_cfg_cmd tx_ant_cmd = {
104 .valid = cpu_to_le32(valid_tx_ant),
105 };
106
107 IWL_DEBUG_FW(mvm, "select valid tx ant: %u\n", valid_tx_ant);
108 return iwl_mvm_send_cmd_pdu(mvm, TX_ANT_CONFIGURATION_CMD, 0,
109 sizeof(tx_ant_cmd), &tx_ant_cmd);
110 }
111
112 static int iwl_send_rss_cfg_cmd(struct iwl_mvm *mvm)
113 {
114 int i;
115 struct iwl_rss_config_cmd cmd = {
116 .flags = cpu_to_le32(IWL_RSS_ENABLE),
117 .hash_mask = IWL_RSS_HASH_TYPE_IPV4_TCP |
118 IWL_RSS_HASH_TYPE_IPV4_UDP |
119 IWL_RSS_HASH_TYPE_IPV4_PAYLOAD |
120 IWL_RSS_HASH_TYPE_IPV6_TCP |
121 IWL_RSS_HASH_TYPE_IPV6_UDP |
122 IWL_RSS_HASH_TYPE_IPV6_PAYLOAD,
123 };
124
125 /* Do not direct RSS traffic to Q 0 which is our fallback queue */
126 for (i = 0; i < ARRAY_SIZE(cmd.indirection_table); i++)
127 cmd.indirection_table[i] =
128 1 + (i % (mvm->trans->num_rx_queues - 1));
129 netdev_rss_key_fill(cmd.secret_key, sizeof(cmd.secret_key));
130
131 return iwl_mvm_send_cmd_pdu(mvm, RSS_CONFIG_CMD, 0, sizeof(cmd), &cmd);
132 }
133
134 void iwl_free_fw_paging(struct iwl_mvm *mvm)
135 {
136 int i;
137
138 if (!mvm->fw_paging_db[0].fw_paging_block)
139 return;
140
141 for (i = 0; i < NUM_OF_FW_PAGING_BLOCKS; i++) {
142 if (!mvm->fw_paging_db[i].fw_paging_block) {
143 IWL_DEBUG_FW(mvm,
144 "Paging: block %d already freed, continue to next page\n",
145 i);
146
147 continue;
148 }
149
150 __free_pages(mvm->fw_paging_db[i].fw_paging_block,
151 get_order(mvm->fw_paging_db[i].fw_paging_size));
152 }
153 kfree(mvm->trans->paging_download_buf);
154 mvm->trans->paging_download_buf = NULL;
155
156 memset(mvm->fw_paging_db, 0, sizeof(mvm->fw_paging_db));
157 }
158
159 static int iwl_fill_paging_mem(struct iwl_mvm *mvm, const struct fw_img *image)
160 {
161 int sec_idx, idx;
162 u32 offset = 0;
163
164 /*
165 * find where is the paging image start point:
166 * if CPU2 exist and it's in paging format, then the image looks like:
167 * CPU1 sections (2 or more)
168 * CPU1_CPU2_SEPARATOR_SECTION delimiter - separate between CPU1 to CPU2
169 * CPU2 sections (not paged)
170 * PAGING_SEPARATOR_SECTION delimiter - separate between CPU2
171 * non paged to CPU2 paging sec
172 * CPU2 paging CSS
173 * CPU2 paging image (including instruction and data)
174 */
175 for (sec_idx = 0; sec_idx < IWL_UCODE_SECTION_MAX; sec_idx++) {
176 if (image->sec[sec_idx].offset == PAGING_SEPARATOR_SECTION) {
177 sec_idx++;
178 break;
179 }
180 }
181
182 /*
183 * If paging is enabled there should be at least 2 more sections left
184 * (one for CSS and one for Paging data)
185 */
186 if (sec_idx >= ARRAY_SIZE(image->sec) - 1) {
187 IWL_ERR(mvm, "Paging: Missing CSS and/or paging sections\n");
188 iwl_free_fw_paging(mvm);
189 return -EINVAL;
190 }
191
192 /* copy the CSS block to the dram */
193 IWL_DEBUG_FW(mvm, "Paging: load paging CSS to FW, sec = %d\n",
194 sec_idx);
195
196 memcpy(page_address(mvm->fw_paging_db[0].fw_paging_block),
197 image->sec[sec_idx].data,
198 mvm->fw_paging_db[0].fw_paging_size);
199
200 IWL_DEBUG_FW(mvm,
201 "Paging: copied %d CSS bytes to first block\n",
202 mvm->fw_paging_db[0].fw_paging_size);
203
204 sec_idx++;
205
206 /*
207 * copy the paging blocks to the dram
208 * loop index start from 1 since that CSS block already copied to dram
209 * and CSS index is 0.
210 * loop stop at num_of_paging_blk since that last block is not full.
211 */
212 for (idx = 1; idx < mvm->num_of_paging_blk; idx++) {
213 memcpy(page_address(mvm->fw_paging_db[idx].fw_paging_block),
214 image->sec[sec_idx].data + offset,
215 mvm->fw_paging_db[idx].fw_paging_size);
216
217 IWL_DEBUG_FW(mvm,
218 "Paging: copied %d paging bytes to block %d\n",
219 mvm->fw_paging_db[idx].fw_paging_size,
220 idx);
221
222 offset += mvm->fw_paging_db[idx].fw_paging_size;
223 }
224
225 /* copy the last paging block */
226 if (mvm->num_of_pages_in_last_blk > 0) {
227 memcpy(page_address(mvm->fw_paging_db[idx].fw_paging_block),
228 image->sec[sec_idx].data + offset,
229 FW_PAGING_SIZE * mvm->num_of_pages_in_last_blk);
230
231 IWL_DEBUG_FW(mvm,
232 "Paging: copied %d pages in the last block %d\n",
233 mvm->num_of_pages_in_last_blk, idx);
234 }
235
236 return 0;
237 }
238
239 static int iwl_alloc_fw_paging_mem(struct iwl_mvm *mvm,
240 const struct fw_img *image)
241 {
242 struct page *block;
243 dma_addr_t phys = 0;
244 int blk_idx = 0;
245 int order, num_of_pages;
246 int dma_enabled;
247
248 if (mvm->fw_paging_db[0].fw_paging_block)
249 return 0;
250
251 dma_enabled = is_device_dma_capable(mvm->trans->dev);
252
253 /* ensure BLOCK_2_EXP_SIZE is power of 2 of PAGING_BLOCK_SIZE */
254 BUILD_BUG_ON(BIT(BLOCK_2_EXP_SIZE) != PAGING_BLOCK_SIZE);
255
256 num_of_pages = image->paging_mem_size / FW_PAGING_SIZE;
257 mvm->num_of_paging_blk = ((num_of_pages - 1) /
258 NUM_OF_PAGE_PER_GROUP) + 1;
259
260 mvm->num_of_pages_in_last_blk =
261 num_of_pages -
262 NUM_OF_PAGE_PER_GROUP * (mvm->num_of_paging_blk - 1);
263
264 IWL_DEBUG_FW(mvm,
265 "Paging: allocating mem for %d paging blocks, each block holds 8 pages, last block holds %d pages\n",
266 mvm->num_of_paging_blk,
267 mvm->num_of_pages_in_last_blk);
268
269 /* allocate block of 4Kbytes for paging CSS */
270 order = get_order(FW_PAGING_SIZE);
271 block = alloc_pages(GFP_KERNEL, order);
272 if (!block) {
273 /* free all the previous pages since we failed */
274 iwl_free_fw_paging(mvm);
275 return -ENOMEM;
276 }
277
278 mvm->fw_paging_db[blk_idx].fw_paging_block = block;
279 mvm->fw_paging_db[blk_idx].fw_paging_size = FW_PAGING_SIZE;
280
281 if (dma_enabled) {
282 phys = dma_map_page(mvm->trans->dev, block, 0,
283 PAGE_SIZE << order, DMA_BIDIRECTIONAL);
284 if (dma_mapping_error(mvm->trans->dev, phys)) {
285 /*
286 * free the previous pages and the current one since
287 * we failed to map_page.
288 */
289 iwl_free_fw_paging(mvm);
290 return -ENOMEM;
291 }
292 mvm->fw_paging_db[blk_idx].fw_paging_phys = phys;
293 } else {
294 mvm->fw_paging_db[blk_idx].fw_paging_phys = PAGING_ADDR_SIG |
295 blk_idx << BLOCK_2_EXP_SIZE;
296 }
297
298 IWL_DEBUG_FW(mvm,
299 "Paging: allocated 4K(CSS) bytes (order %d) for firmware paging.\n",
300 order);
301
302 /*
303 * allocate blocks in dram.
304 * since that CSS allocated in fw_paging_db[0] loop start from index 1
305 */
306 for (blk_idx = 1; blk_idx < mvm->num_of_paging_blk + 1; blk_idx++) {
307 /* allocate block of PAGING_BLOCK_SIZE (32K) */
308 order = get_order(PAGING_BLOCK_SIZE);
309 block = alloc_pages(GFP_KERNEL, order);
310 if (!block) {
311 /* free all the previous pages since we failed */
312 iwl_free_fw_paging(mvm);
313 return -ENOMEM;
314 }
315
316 mvm->fw_paging_db[blk_idx].fw_paging_block = block;
317 mvm->fw_paging_db[blk_idx].fw_paging_size = PAGING_BLOCK_SIZE;
318
319 if (dma_enabled) {
320 phys = dma_map_page(mvm->trans->dev, block, 0,
321 PAGE_SIZE << order,
322 DMA_BIDIRECTIONAL);
323 if (dma_mapping_error(mvm->trans->dev, phys)) {
324 /*
325 * free the previous pages and the current one
326 * since we failed to map_page.
327 */
328 iwl_free_fw_paging(mvm);
329 return -ENOMEM;
330 }
331 mvm->fw_paging_db[blk_idx].fw_paging_phys = phys;
332 } else {
333 mvm->fw_paging_db[blk_idx].fw_paging_phys =
334 PAGING_ADDR_SIG |
335 blk_idx << BLOCK_2_EXP_SIZE;
336 }
337
338 IWL_DEBUG_FW(mvm,
339 "Paging: allocated 32K bytes (order %d) for firmware paging.\n",
340 order);
341 }
342
343 return 0;
344 }
345
346 static int iwl_save_fw_paging(struct iwl_mvm *mvm,
347 const struct fw_img *fw)
348 {
349 int ret;
350
351 ret = iwl_alloc_fw_paging_mem(mvm, fw);
352 if (ret)
353 return ret;
354
355 return iwl_fill_paging_mem(mvm, fw);
356 }
357
358 /* send paging cmd to FW in case CPU2 has paging image */
359 static int iwl_send_paging_cmd(struct iwl_mvm *mvm, const struct fw_img *fw)
360 {
361 int blk_idx;
362 __le32 dev_phy_addr;
363 struct iwl_fw_paging_cmd fw_paging_cmd = {
364 .flags =
365 cpu_to_le32(PAGING_CMD_IS_SECURED |
366 PAGING_CMD_IS_ENABLED |
367 (mvm->num_of_pages_in_last_blk <<
368 PAGING_CMD_NUM_OF_PAGES_IN_LAST_GRP_POS)),
369 .block_size = cpu_to_le32(BLOCK_2_EXP_SIZE),
370 .block_num = cpu_to_le32(mvm->num_of_paging_blk),
371 };
372
373 /* loop for for all paging blocks + CSS block */
374 for (blk_idx = 0; blk_idx < mvm->num_of_paging_blk + 1; blk_idx++) {
375 dev_phy_addr =
376 cpu_to_le32(mvm->fw_paging_db[blk_idx].fw_paging_phys >>
377 PAGE_2_EXP_SIZE);
378 fw_paging_cmd.device_phy_addr[blk_idx] = dev_phy_addr;
379 }
380
381 return iwl_mvm_send_cmd_pdu(mvm, iwl_cmd_id(FW_PAGING_BLOCK_CMD,
382 IWL_ALWAYS_LONG_GROUP, 0),
383 0, sizeof(fw_paging_cmd), &fw_paging_cmd);
384 }
385
386 /*
387 * Send paging item cmd to FW in case CPU2 has paging image
388 */
389 static int iwl_trans_get_paging_item(struct iwl_mvm *mvm)
390 {
391 int ret;
392 struct iwl_fw_get_item_cmd fw_get_item_cmd = {
393 .item_id = cpu_to_le32(IWL_FW_ITEM_ID_PAGING),
394 };
395
396 struct iwl_fw_get_item_resp *item_resp;
397 struct iwl_host_cmd cmd = {
398 .id = iwl_cmd_id(FW_GET_ITEM_CMD, IWL_ALWAYS_LONG_GROUP, 0),
399 .flags = CMD_WANT_SKB | CMD_SEND_IN_RFKILL,
400 .data = { &fw_get_item_cmd, },
401 };
402
403 cmd.len[0] = sizeof(struct iwl_fw_get_item_cmd);
404
405 ret = iwl_mvm_send_cmd(mvm, &cmd);
406 if (ret) {
407 IWL_ERR(mvm,
408 "Paging: Failed to send FW_GET_ITEM_CMD cmd (err = %d)\n",
409 ret);
410 return ret;
411 }
412
413 item_resp = (void *)((struct iwl_rx_packet *)cmd.resp_pkt)->data;
414 if (item_resp->item_id != cpu_to_le32(IWL_FW_ITEM_ID_PAGING)) {
415 IWL_ERR(mvm,
416 "Paging: got wrong item in FW_GET_ITEM_CMD resp (item_id = %u)\n",
417 le32_to_cpu(item_resp->item_id));
418 ret = -EIO;
419 goto exit;
420 }
421
422 /* Add an extra page for headers */
423 mvm->trans->paging_download_buf = kzalloc(PAGING_BLOCK_SIZE +
424 FW_PAGING_SIZE,
425 GFP_KERNEL);
426 if (!mvm->trans->paging_download_buf) {
427 ret = -ENOMEM;
428 goto exit;
429 }
430 mvm->trans->paging_req_addr = le32_to_cpu(item_resp->item_val);
431 mvm->trans->paging_db = mvm->fw_paging_db;
432 IWL_DEBUG_FW(mvm,
433 "Paging: got paging request address (paging_req_addr 0x%08x)\n",
434 mvm->trans->paging_req_addr);
435
436 exit:
437 iwl_free_resp(&cmd);
438
439 return ret;
440 }
441
442 static bool iwl_alive_fn(struct iwl_notif_wait_data *notif_wait,
443 struct iwl_rx_packet *pkt, void *data)
444 {
445 struct iwl_mvm *mvm =
446 container_of(notif_wait, struct iwl_mvm, notif_wait);
447 struct iwl_mvm_alive_data *alive_data = data;
448 struct mvm_alive_resp_ver1 *palive1;
449 struct mvm_alive_resp_ver2 *palive2;
450 struct mvm_alive_resp *palive;
451
452 if (iwl_rx_packet_payload_len(pkt) == sizeof(*palive1)) {
453 palive1 = (void *)pkt->data;
454
455 mvm->support_umac_log = false;
456 mvm->error_event_table =
457 le32_to_cpu(palive1->error_event_table_ptr);
458 mvm->log_event_table =
459 le32_to_cpu(palive1->log_event_table_ptr);
460 alive_data->scd_base_addr = le32_to_cpu(palive1->scd_base_ptr);
461
462 alive_data->valid = le16_to_cpu(palive1->status) ==
463 IWL_ALIVE_STATUS_OK;
464 IWL_DEBUG_FW(mvm,
465 "Alive VER1 ucode status 0x%04x revision 0x%01X 0x%01X flags 0x%01X\n",
466 le16_to_cpu(palive1->status), palive1->ver_type,
467 palive1->ver_subtype, palive1->flags);
468 } else if (iwl_rx_packet_payload_len(pkt) == sizeof(*palive2)) {
469 palive2 = (void *)pkt->data;
470
471 mvm->error_event_table =
472 le32_to_cpu(palive2->error_event_table_ptr);
473 mvm->log_event_table =
474 le32_to_cpu(palive2->log_event_table_ptr);
475 alive_data->scd_base_addr = le32_to_cpu(palive2->scd_base_ptr);
476 mvm->umac_error_event_table =
477 le32_to_cpu(palive2->error_info_addr);
478 mvm->sf_space.addr = le32_to_cpu(palive2->st_fwrd_addr);
479 mvm->sf_space.size = le32_to_cpu(palive2->st_fwrd_size);
480
481 alive_data->valid = le16_to_cpu(palive2->status) ==
482 IWL_ALIVE_STATUS_OK;
483 if (mvm->umac_error_event_table)
484 mvm->support_umac_log = true;
485
486 IWL_DEBUG_FW(mvm,
487 "Alive VER2 ucode status 0x%04x revision 0x%01X 0x%01X flags 0x%01X\n",
488 le16_to_cpu(palive2->status), palive2->ver_type,
489 palive2->ver_subtype, palive2->flags);
490
491 IWL_DEBUG_FW(mvm,
492 "UMAC version: Major - 0x%x, Minor - 0x%x\n",
493 palive2->umac_major, palive2->umac_minor);
494 } else if (iwl_rx_packet_payload_len(pkt) == sizeof(*palive)) {
495 palive = (void *)pkt->data;
496
497 mvm->error_event_table =
498 le32_to_cpu(palive->error_event_table_ptr);
499 mvm->log_event_table =
500 le32_to_cpu(palive->log_event_table_ptr);
501 alive_data->scd_base_addr = le32_to_cpu(palive->scd_base_ptr);
502 mvm->umac_error_event_table =
503 le32_to_cpu(palive->error_info_addr);
504 mvm->sf_space.addr = le32_to_cpu(palive->st_fwrd_addr);
505 mvm->sf_space.size = le32_to_cpu(palive->st_fwrd_size);
506
507 alive_data->valid = le16_to_cpu(palive->status) ==
508 IWL_ALIVE_STATUS_OK;
509 if (mvm->umac_error_event_table)
510 mvm->support_umac_log = true;
511
512 IWL_DEBUG_FW(mvm,
513 "Alive VER3 ucode status 0x%04x revision 0x%01X 0x%01X flags 0x%01X\n",
514 le16_to_cpu(palive->status), palive->ver_type,
515 palive->ver_subtype, palive->flags);
516
517 IWL_DEBUG_FW(mvm,
518 "UMAC version: Major - 0x%x, Minor - 0x%x\n",
519 le32_to_cpu(palive->umac_major),
520 le32_to_cpu(palive->umac_minor));
521 }
522
523 return true;
524 }
525
526 static bool iwl_wait_phy_db_entry(struct iwl_notif_wait_data *notif_wait,
527 struct iwl_rx_packet *pkt, void *data)
528 {
529 struct iwl_phy_db *phy_db = data;
530
531 if (pkt->hdr.cmd != CALIB_RES_NOTIF_PHY_DB) {
532 WARN_ON(pkt->hdr.cmd != INIT_COMPLETE_NOTIF);
533 return true;
534 }
535
536 WARN_ON(iwl_phy_db_set_section(phy_db, pkt, GFP_ATOMIC));
537
538 return false;
539 }
540
541 static int iwl_mvm_load_ucode_wait_alive(struct iwl_mvm *mvm,
542 enum iwl_ucode_type ucode_type)
543 {
544 struct iwl_notification_wait alive_wait;
545 struct iwl_mvm_alive_data alive_data;
546 const struct fw_img *fw;
547 int ret, i;
548 enum iwl_ucode_type old_type = mvm->cur_ucode;
549 static const u16 alive_cmd[] = { MVM_ALIVE };
550 struct iwl_sf_region st_fwrd_space;
551
552 if (ucode_type == IWL_UCODE_REGULAR &&
553 iwl_fw_dbg_conf_usniffer(mvm->fw, FW_DBG_START_FROM_ALIVE) &&
554 !(fw_has_capa(&mvm->fw->ucode_capa,
555 IWL_UCODE_TLV_CAPA_USNIFFER_UNIFIED)))
556 fw = iwl_get_ucode_image(mvm, IWL_UCODE_REGULAR_USNIFFER);
557 else
558 fw = iwl_get_ucode_image(mvm, ucode_type);
559 if (WARN_ON(!fw))
560 return -EINVAL;
561 mvm->cur_ucode = ucode_type;
562 mvm->ucode_loaded = false;
563
564 iwl_init_notification_wait(&mvm->notif_wait, &alive_wait,
565 alive_cmd, ARRAY_SIZE(alive_cmd),
566 iwl_alive_fn, &alive_data);
567
568 ret = iwl_trans_start_fw(mvm->trans, fw, ucode_type == IWL_UCODE_INIT);
569 if (ret) {
570 mvm->cur_ucode = old_type;
571 iwl_remove_notification(&mvm->notif_wait, &alive_wait);
572 return ret;
573 }
574
575 /*
576 * Some things may run in the background now, but we
577 * just wait for the ALIVE notification here.
578 */
579 ret = iwl_wait_notification(&mvm->notif_wait, &alive_wait,
580 MVM_UCODE_ALIVE_TIMEOUT);
581 if (ret) {
582 if (mvm->trans->cfg->device_family == IWL_DEVICE_FAMILY_8000)
583 IWL_ERR(mvm,
584 "SecBoot CPU1 Status: 0x%x, CPU2 Status: 0x%x\n",
585 iwl_read_prph(mvm->trans, SB_CPU_1_STATUS),
586 iwl_read_prph(mvm->trans, SB_CPU_2_STATUS));
587 mvm->cur_ucode = old_type;
588 return ret;
589 }
590
591 if (!alive_data.valid) {
592 IWL_ERR(mvm, "Loaded ucode is not valid!\n");
593 mvm->cur_ucode = old_type;
594 return -EIO;
595 }
596
597 /*
598 * update the sdio allocation according to the pointer we get in the
599 * alive notification.
600 */
601 st_fwrd_space.addr = mvm->sf_space.addr;
602 st_fwrd_space.size = mvm->sf_space.size;
603 ret = iwl_trans_update_sf(mvm->trans, &st_fwrd_space);
604 if (ret) {
605 IWL_ERR(mvm, "Failed to update SF size. ret %d\n", ret);
606 return ret;
607 }
608
609 iwl_trans_fw_alive(mvm->trans, alive_data.scd_base_addr);
610
611 /*
612 * configure and operate fw paging mechanism.
613 * driver configures the paging flow only once, CPU2 paging image
614 * included in the IWL_UCODE_INIT image.
615 */
616 if (fw->paging_mem_size) {
617 /*
618 * When dma is not enabled, the driver needs to copy / write
619 * the downloaded / uploaded page to / from the smem.
620 * This gets the location of the place were the pages are
621 * stored.
622 */
623 if (!is_device_dma_capable(mvm->trans->dev)) {
624 ret = iwl_trans_get_paging_item(mvm);
625 if (ret) {
626 IWL_ERR(mvm, "failed to get FW paging item\n");
627 return ret;
628 }
629 }
630
631 ret = iwl_save_fw_paging(mvm, fw);
632 if (ret) {
633 IWL_ERR(mvm, "failed to save the FW paging image\n");
634 return ret;
635 }
636
637 ret = iwl_send_paging_cmd(mvm, fw);
638 if (ret) {
639 IWL_ERR(mvm, "failed to send the paging cmd\n");
640 iwl_free_fw_paging(mvm);
641 return ret;
642 }
643 }
644
645 /*
646 * Note: all the queues are enabled as part of the interface
647 * initialization, but in firmware restart scenarios they
648 * could be stopped, so wake them up. In firmware restart,
649 * mac80211 will have the queues stopped as well until the
650 * reconfiguration completes. During normal startup, they
651 * will be empty.
652 */
653
654 memset(&mvm->queue_info, 0, sizeof(mvm->queue_info));
655 if (iwl_mvm_is_dqa_supported(mvm))
656 mvm->queue_info[IWL_MVM_DQA_CMD_QUEUE].hw_queue_refcount = 1;
657 else
658 mvm->queue_info[IWL_MVM_CMD_QUEUE].hw_queue_refcount = 1;
659
660 for (i = 0; i < IEEE80211_MAX_QUEUES; i++)
661 atomic_set(&mvm->mac80211_queue_stop_count[i], 0);
662
663 mvm->ucode_loaded = true;
664
665 return 0;
666 }
667
668 static int iwl_send_phy_cfg_cmd(struct iwl_mvm *mvm)
669 {
670 struct iwl_phy_cfg_cmd phy_cfg_cmd;
671 enum iwl_ucode_type ucode_type = mvm->cur_ucode;
672
673 /* Set parameters */
674 phy_cfg_cmd.phy_cfg = cpu_to_le32(iwl_mvm_get_phy_config(mvm));
675 phy_cfg_cmd.calib_control.event_trigger =
676 mvm->fw->default_calib[ucode_type].event_trigger;
677 phy_cfg_cmd.calib_control.flow_trigger =
678 mvm->fw->default_calib[ucode_type].flow_trigger;
679
680 IWL_DEBUG_INFO(mvm, "Sending Phy CFG command: 0x%x\n",
681 phy_cfg_cmd.phy_cfg);
682
683 return iwl_mvm_send_cmd_pdu(mvm, PHY_CONFIGURATION_CMD, 0,
684 sizeof(phy_cfg_cmd), &phy_cfg_cmd);
685 }
686
687 int iwl_run_init_mvm_ucode(struct iwl_mvm *mvm, bool read_nvm)
688 {
689 struct iwl_notification_wait calib_wait;
690 static const u16 init_complete[] = {
691 INIT_COMPLETE_NOTIF,
692 CALIB_RES_NOTIF_PHY_DB
693 };
694 int ret;
695
696 lockdep_assert_held(&mvm->mutex);
697
698 if (WARN_ON_ONCE(mvm->calibrating))
699 return 0;
700
701 iwl_init_notification_wait(&mvm->notif_wait,
702 &calib_wait,
703 init_complete,
704 ARRAY_SIZE(init_complete),
705 iwl_wait_phy_db_entry,
706 mvm->phy_db);
707
708 /* Will also start the device */
709 ret = iwl_mvm_load_ucode_wait_alive(mvm, IWL_UCODE_INIT);
710 if (ret) {
711 IWL_ERR(mvm, "Failed to start INIT ucode: %d\n", ret);
712 goto error;
713 }
714
715 ret = iwl_send_bt_init_conf(mvm);
716 if (ret)
717 goto error;
718
719 /* Read the NVM only at driver load time, no need to do this twice */
720 if (read_nvm) {
721 /* Read nvm */
722 ret = iwl_nvm_init(mvm, true);
723 if (ret) {
724 IWL_ERR(mvm, "Failed to read NVM: %d\n", ret);
725 goto error;
726 }
727 }
728
729 /* In case we read the NVM from external file, load it to the NIC */
730 if (mvm->nvm_file_name)
731 iwl_mvm_load_nvm_to_nic(mvm);
732
733 ret = iwl_nvm_check_version(mvm->nvm_data, mvm->trans);
734 WARN_ON(ret);
735
736 /*
737 * abort after reading the nvm in case RF Kill is on, we will complete
738 * the init seq later when RF kill will switch to off
739 */
740 if (iwl_mvm_is_radio_hw_killed(mvm)) {
741 IWL_DEBUG_RF_KILL(mvm,
742 "jump over all phy activities due to RF kill\n");
743 iwl_remove_notification(&mvm->notif_wait, &calib_wait);
744 ret = 1;
745 goto out;
746 }
747
748 mvm->calibrating = true;
749
750 /* Send TX valid antennas before triggering calibrations */
751 ret = iwl_send_tx_ant_cfg(mvm, iwl_mvm_get_valid_tx_ant(mvm));
752 if (ret)
753 goto error;
754
755 /*
756 * Send phy configurations command to init uCode
757 * to start the 16.0 uCode init image internal calibrations.
758 */
759 ret = iwl_send_phy_cfg_cmd(mvm);
760 if (ret) {
761 IWL_ERR(mvm, "Failed to run INIT calibrations: %d\n",
762 ret);
763 goto error;
764 }
765
766 /*
767 * Some things may run in the background now, but we
768 * just wait for the calibration complete notification.
769 */
770 ret = iwl_wait_notification(&mvm->notif_wait, &calib_wait,
771 MVM_UCODE_CALIB_TIMEOUT);
772
773 if (ret && iwl_mvm_is_radio_hw_killed(mvm)) {
774 IWL_DEBUG_RF_KILL(mvm, "RFKILL while calibrating.\n");
775 ret = 1;
776 }
777 goto out;
778
779 error:
780 iwl_remove_notification(&mvm->notif_wait, &calib_wait);
781 out:
782 mvm->calibrating = false;
783 if (iwlmvm_mod_params.init_dbg && !mvm->nvm_data) {
784 /* we want to debug INIT and we have no NVM - fake */
785 mvm->nvm_data = kzalloc(sizeof(struct iwl_nvm_data) +
786 sizeof(struct ieee80211_channel) +
787 sizeof(struct ieee80211_rate),
788 GFP_KERNEL);
789 if (!mvm->nvm_data)
790 return -ENOMEM;
791 mvm->nvm_data->bands[0].channels = mvm->nvm_data->channels;
792 mvm->nvm_data->bands[0].n_channels = 1;
793 mvm->nvm_data->bands[0].n_bitrates = 1;
794 mvm->nvm_data->bands[0].bitrates =
795 (void *)mvm->nvm_data->channels + 1;
796 mvm->nvm_data->bands[0].bitrates->hw_value = 10;
797 }
798
799 return ret;
800 }
801
802 static void iwl_mvm_get_shared_mem_conf(struct iwl_mvm *mvm)
803 {
804 struct iwl_host_cmd cmd = {
805 .flags = CMD_WANT_SKB,
806 .data = { NULL, },
807 .len = { 0, },
808 };
809 struct iwl_shared_mem_cfg *mem_cfg;
810 struct iwl_rx_packet *pkt;
811 u32 i;
812
813 lockdep_assert_held(&mvm->mutex);
814
815 if (fw_has_capa(&mvm->fw->ucode_capa,
816 IWL_UCODE_TLV_CAPA_EXTEND_SHARED_MEM_CFG))
817 cmd.id = iwl_cmd_id(SHARED_MEM_CFG_CMD, SYSTEM_GROUP, 0);
818 else
819 cmd.id = SHARED_MEM_CFG;
820
821 if (WARN_ON(iwl_mvm_send_cmd(mvm, &cmd)))
822 return;
823
824 pkt = cmd.resp_pkt;
825 mem_cfg = (void *)pkt->data;
826
827 mvm->shared_mem_cfg.shared_mem_addr =
828 le32_to_cpu(mem_cfg->shared_mem_addr);
829 mvm->shared_mem_cfg.shared_mem_size =
830 le32_to_cpu(mem_cfg->shared_mem_size);
831 mvm->shared_mem_cfg.sample_buff_addr =
832 le32_to_cpu(mem_cfg->sample_buff_addr);
833 mvm->shared_mem_cfg.sample_buff_size =
834 le32_to_cpu(mem_cfg->sample_buff_size);
835 mvm->shared_mem_cfg.txfifo_addr = le32_to_cpu(mem_cfg->txfifo_addr);
836 for (i = 0; i < ARRAY_SIZE(mvm->shared_mem_cfg.txfifo_size); i++)
837 mvm->shared_mem_cfg.txfifo_size[i] =
838 le32_to_cpu(mem_cfg->txfifo_size[i]);
839 for (i = 0; i < ARRAY_SIZE(mvm->shared_mem_cfg.rxfifo_size); i++)
840 mvm->shared_mem_cfg.rxfifo_size[i] =
841 le32_to_cpu(mem_cfg->rxfifo_size[i]);
842 mvm->shared_mem_cfg.page_buff_addr =
843 le32_to_cpu(mem_cfg->page_buff_addr);
844 mvm->shared_mem_cfg.page_buff_size =
845 le32_to_cpu(mem_cfg->page_buff_size);
846
847 /* new API has more data */
848 if (fw_has_capa(&mvm->fw->ucode_capa,
849 IWL_UCODE_TLV_CAPA_EXTEND_SHARED_MEM_CFG)) {
850 mvm->shared_mem_cfg.rxfifo_addr =
851 le32_to_cpu(mem_cfg->rxfifo_addr);
852 mvm->shared_mem_cfg.internal_txfifo_addr =
853 le32_to_cpu(mem_cfg->internal_txfifo_addr);
854
855 BUILD_BUG_ON(sizeof(mvm->shared_mem_cfg.internal_txfifo_size) !=
856 sizeof(mem_cfg->internal_txfifo_size));
857
858 for (i = 0;
859 i < ARRAY_SIZE(mvm->shared_mem_cfg.internal_txfifo_size);
860 i++)
861 mvm->shared_mem_cfg.internal_txfifo_size[i] =
862 le32_to_cpu(mem_cfg->internal_txfifo_size[i]);
863 }
864
865 IWL_DEBUG_INFO(mvm, "SHARED MEM CFG: got memory offsets/sizes\n");
866
867 iwl_free_resp(&cmd);
868 }
869
870 static int iwl_mvm_config_ltr(struct iwl_mvm *mvm)
871 {
872 struct iwl_ltr_config_cmd cmd = {
873 .flags = cpu_to_le32(LTR_CFG_FLAG_FEATURE_ENABLE),
874 };
875
876 if (!mvm->trans->ltr_enabled)
877 return 0;
878
879 return iwl_mvm_send_cmd_pdu(mvm, LTR_CONFIG, 0,
880 sizeof(cmd), &cmd);
881 }
882
883 int iwl_mvm_up(struct iwl_mvm *mvm)
884 {
885 int ret, i;
886 struct ieee80211_channel *chan;
887 struct cfg80211_chan_def chandef;
888
889 lockdep_assert_held(&mvm->mutex);
890
891 ret = iwl_trans_start_hw(mvm->trans);
892 if (ret)
893 return ret;
894
895 /*
896 * If we haven't completed the run of the init ucode during
897 * module loading, load init ucode now
898 * (for example, if we were in RFKILL)
899 */
900 ret = iwl_run_init_mvm_ucode(mvm, false);
901 if (ret && !iwlmvm_mod_params.init_dbg) {
902 IWL_ERR(mvm, "Failed to run INIT ucode: %d\n", ret);
903 /* this can't happen */
904 if (WARN_ON(ret > 0))
905 ret = -ERFKILL;
906 goto error;
907 }
908 if (!iwlmvm_mod_params.init_dbg) {
909 /*
910 * Stop and start the transport without entering low power
911 * mode. This will save the state of other components on the
912 * device that are triggered by the INIT firwmare (MFUART).
913 */
914 _iwl_trans_stop_device(mvm->trans, false);
915 ret = _iwl_trans_start_hw(mvm->trans, false);
916 if (ret)
917 goto error;
918 }
919
920 if (iwlmvm_mod_params.init_dbg)
921 return 0;
922
923 ret = iwl_mvm_load_ucode_wait_alive(mvm, IWL_UCODE_REGULAR);
924 if (ret) {
925 IWL_ERR(mvm, "Failed to start RT ucode: %d\n", ret);
926 goto error;
927 }
928
929 iwl_mvm_get_shared_mem_conf(mvm);
930
931 ret = iwl_mvm_sf_update(mvm, NULL, false);
932 if (ret)
933 IWL_ERR(mvm, "Failed to initialize Smart Fifo\n");
934
935 mvm->fw_dbg_conf = FW_DBG_INVALID;
936 /* if we have a destination, assume EARLY START */
937 if (mvm->fw->dbg_dest_tlv)
938 mvm->fw_dbg_conf = FW_DBG_START_FROM_ALIVE;
939 iwl_mvm_start_fw_dbg_conf(mvm, FW_DBG_START_FROM_ALIVE);
940
941 ret = iwl_send_tx_ant_cfg(mvm, iwl_mvm_get_valid_tx_ant(mvm));
942 if (ret)
943 goto error;
944
945 ret = iwl_send_bt_init_conf(mvm);
946 if (ret)
947 goto error;
948
949 /* Send phy db control command and then phy db calibration*/
950 ret = iwl_send_phy_db_data(mvm->phy_db);
951 if (ret)
952 goto error;
953
954 ret = iwl_send_phy_cfg_cmd(mvm);
955 if (ret)
956 goto error;
957
958 /* Init RSS configuration */
959 if (iwl_mvm_has_new_rx_api(mvm)) {
960 ret = iwl_send_rss_cfg_cmd(mvm);
961 if (ret) {
962 IWL_ERR(mvm, "Failed to configure RSS queues: %d\n",
963 ret);
964 goto error;
965 }
966 }
967
968 /* init the fw <-> mac80211 STA mapping */
969 for (i = 0; i < IWL_MVM_STATION_COUNT; i++)
970 RCU_INIT_POINTER(mvm->fw_id_to_mac_id[i], NULL);
971
972 mvm->tdls_cs.peer.sta_id = IWL_MVM_STATION_COUNT;
973
974 /* reset quota debouncing buffer - 0xff will yield invalid data */
975 memset(&mvm->last_quota_cmd, 0xff, sizeof(mvm->last_quota_cmd));
976
977 /* Add auxiliary station for scanning */
978 ret = iwl_mvm_add_aux_sta(mvm);
979 if (ret)
980 goto error;
981
982 /* Add all the PHY contexts */
983 chan = &mvm->hw->wiphy->bands[NL80211_BAND_2GHZ]->channels[0];
984 cfg80211_chandef_create(&chandef, chan, NL80211_CHAN_NO_HT);
985 for (i = 0; i < NUM_PHY_CTX; i++) {
986 /*
987 * The channel used here isn't relevant as it's
988 * going to be overwritten in the other flows.
989 * For now use the first channel we have.
990 */
991 ret = iwl_mvm_phy_ctxt_add(mvm, &mvm->phy_ctxts[i],
992 &chandef, 1, 1);
993 if (ret)
994 goto error;
995 }
996
997 #ifdef CONFIG_THERMAL
998 if (iwl_mvm_is_tt_in_fw(mvm)) {
999 /* in order to give the responsibility of ct-kill and
1000 * TX backoff to FW we need to send empty temperature reporting
1001 * cmd during init time
1002 */
1003 iwl_mvm_send_temp_report_ths_cmd(mvm);
1004 } else {
1005 /* Initialize tx backoffs to the minimal possible */
1006 iwl_mvm_tt_tx_backoff(mvm, 0);
1007 }
1008
1009 /* TODO: read the budget from BIOS / Platform NVM */
1010 if (iwl_mvm_is_ctdp_supported(mvm) && mvm->cooling_dev.cur_state > 0)
1011 ret = iwl_mvm_ctdp_command(mvm, CTDP_CMD_OPERATION_START,
1012 mvm->cooling_dev.cur_state);
1013 #else
1014 /* Initialize tx backoffs to the minimal possible */
1015 iwl_mvm_tt_tx_backoff(mvm, 0);
1016 #endif
1017
1018 WARN_ON(iwl_mvm_config_ltr(mvm));
1019
1020 ret = iwl_mvm_power_update_device(mvm);
1021 if (ret)
1022 goto error;
1023
1024 /*
1025 * RTNL is not taken during Ct-kill, but we don't need to scan/Tx
1026 * anyway, so don't init MCC.
1027 */
1028 if (!test_bit(IWL_MVM_STATUS_HW_CTKILL, &mvm->status)) {
1029 ret = iwl_mvm_init_mcc(mvm);
1030 if (ret)
1031 goto error;
1032 }
1033
1034 if (fw_has_capa(&mvm->fw->ucode_capa, IWL_UCODE_TLV_CAPA_UMAC_SCAN)) {
1035 mvm->scan_type = IWL_SCAN_TYPE_NOT_SET;
1036 ret = iwl_mvm_config_scan(mvm);
1037 if (ret)
1038 goto error;
1039 }
1040
1041 if (iwl_mvm_is_csum_supported(mvm) &&
1042 mvm->cfg->features & NETIF_F_RXCSUM)
1043 iwl_trans_write_prph(mvm->trans, RX_EN_CSUM, 0x3);
1044
1045 /* allow FW/transport low power modes if not during restart */
1046 if (!test_bit(IWL_MVM_STATUS_IN_HW_RESTART, &mvm->status))
1047 iwl_mvm_unref(mvm, IWL_MVM_REF_UCODE_DOWN);
1048
1049 IWL_DEBUG_INFO(mvm, "RT uCode started.\n");
1050 return 0;
1051 error:
1052 iwl_mvm_stop_device(mvm);
1053 return ret;
1054 }
1055
1056 int iwl_mvm_load_d3_fw(struct iwl_mvm *mvm)
1057 {
1058 int ret, i;
1059
1060 lockdep_assert_held(&mvm->mutex);
1061
1062 ret = iwl_trans_start_hw(mvm->trans);
1063 if (ret)
1064 return ret;
1065
1066 ret = iwl_mvm_load_ucode_wait_alive(mvm, IWL_UCODE_WOWLAN);
1067 if (ret) {
1068 IWL_ERR(mvm, "Failed to start WoWLAN firmware: %d\n", ret);
1069 goto error;
1070 }
1071
1072 ret = iwl_send_tx_ant_cfg(mvm, iwl_mvm_get_valid_tx_ant(mvm));
1073 if (ret)
1074 goto error;
1075
1076 /* Send phy db control command and then phy db calibration*/
1077 ret = iwl_send_phy_db_data(mvm->phy_db);
1078 if (ret)
1079 goto error;
1080
1081 ret = iwl_send_phy_cfg_cmd(mvm);
1082 if (ret)
1083 goto error;
1084
1085 /* init the fw <-> mac80211 STA mapping */
1086 for (i = 0; i < IWL_MVM_STATION_COUNT; i++)
1087 RCU_INIT_POINTER(mvm->fw_id_to_mac_id[i], NULL);
1088
1089 /* Add auxiliary station for scanning */
1090 ret = iwl_mvm_add_aux_sta(mvm);
1091 if (ret)
1092 goto error;
1093
1094 return 0;
1095 error:
1096 iwl_mvm_stop_device(mvm);
1097 return ret;
1098 }
1099
1100 void iwl_mvm_rx_card_state_notif(struct iwl_mvm *mvm,
1101 struct iwl_rx_cmd_buffer *rxb)
1102 {
1103 struct iwl_rx_packet *pkt = rxb_addr(rxb);
1104 struct iwl_card_state_notif *card_state_notif = (void *)pkt->data;
1105 u32 flags = le32_to_cpu(card_state_notif->flags);
1106
1107 IWL_DEBUG_RF_KILL(mvm, "Card state received: HW:%s SW:%s CT:%s\n",
1108 (flags & HW_CARD_DISABLED) ? "Kill" : "On",
1109 (flags & SW_CARD_DISABLED) ? "Kill" : "On",
1110 (flags & CT_KILL_CARD_DISABLED) ?
1111 "Reached" : "Not reached");
1112 }
1113
1114 void iwl_mvm_rx_mfuart_notif(struct iwl_mvm *mvm,
1115 struct iwl_rx_cmd_buffer *rxb)
1116 {
1117 struct iwl_rx_packet *pkt = rxb_addr(rxb);
1118 struct iwl_mfuart_load_notif *mfuart_notif = (void *)pkt->data;
1119
1120 IWL_DEBUG_INFO(mvm,
1121 "MFUART: installed ver: 0x%08x, external ver: 0x%08x, status: 0x%08x, duration: 0x%08x\n",
1122 le32_to_cpu(mfuart_notif->installed_ver),
1123 le32_to_cpu(mfuart_notif->external_ver),
1124 le32_to_cpu(mfuart_notif->status),
1125 le32_to_cpu(mfuart_notif->duration));
1126 }
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