1 /******************************************************************************
3 * Copyright(c) 2003 - 2011 Intel Corporation. All rights reserved.
5 * Portions of this file are derived from the ipw3945 project, as well
6 * as portions of the ieee80211 subsystem header files.
8 * This program is free software; you can redistribute it and/or modify it
9 * under the terms of version 2 of the GNU General Public License as
10 * published by the Free Software Foundation.
12 * This program is distributed in the hope that it will be useful, but WITHOUT
13 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
14 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
17 * You should have received a copy of the GNU General Public License along with
18 * this program; if not, write to the Free Software Foundation, Inc.,
19 * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
21 * The full GNU General Public License is included in this distribution in the
22 * file called LICENSE.
24 * Contact Information:
25 * Intel Linux Wireless <ilw@linux.intel.com>
26 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
28 *****************************************************************************/
30 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
32 #include <linux/kernel.h>
33 #include <linux/module.h>
34 #include <linux/init.h>
35 #include <linux/pci.h>
36 #include <linux/pci-aspm.h>
37 #include <linux/slab.h>
38 #include <linux/dma-mapping.h>
39 #include <linux/delay.h>
40 #include <linux/sched.h>
41 #include <linux/skbuff.h>
42 #include <linux/netdevice.h>
43 #include <linux/firmware.h>
44 #include <linux/etherdevice.h>
45 #include <linux/if_arp.h>
47 #include <net/mac80211.h>
49 #include <asm/div64.h>
51 #define DRV_NAME "iwl4965"
56 /******************************************************************************
60 ******************************************************************************/
63 * module name, copyright, version, etc.
65 #define DRV_DESCRIPTION "Intel(R) Wireless WiFi 4965 driver for Linux"
67 #ifdef CONFIG_IWLEGACY_DEBUG
73 #define DRV_VERSION IWLWIFI_VERSION VD
75 MODULE_DESCRIPTION(DRV_DESCRIPTION
);
76 MODULE_VERSION(DRV_VERSION
);
77 MODULE_AUTHOR(DRV_COPYRIGHT
" " DRV_AUTHOR
);
78 MODULE_LICENSE("GPL");
79 MODULE_ALIAS("iwl4965");
82 il4965_check_abort_status(struct il_priv
*il
, u8 frame_count
, u32 status
)
84 if (frame_count
== 1 && status
== TX_STATUS_FAIL_RFKILL_FLUSH
) {
85 IL_ERR("Tx flush command to flush out all frames\n");
86 if (!test_bit(S_EXIT_PENDING
, &il
->status
))
87 queue_work(il
->workqueue
, &il
->tx_flush
);
94 struct il_mod_params il4965_mod_params
= {
97 /* the rest are 0 by default */
101 il4965_rx_queue_reset(struct il_priv
*il
, struct il_rx_queue
*rxq
)
105 spin_lock_irqsave(&rxq
->lock
, flags
);
106 INIT_LIST_HEAD(&rxq
->rx_free
);
107 INIT_LIST_HEAD(&rxq
->rx_used
);
108 /* Fill the rx_used queue with _all_ of the Rx buffers */
109 for (i
= 0; i
< RX_FREE_BUFFERS
+ RX_QUEUE_SIZE
; i
++) {
110 /* In the reset function, these buffers may have been allocated
111 * to an SKB, so we need to unmap and free potential storage */
112 if (rxq
->pool
[i
].page
!= NULL
) {
113 pci_unmap_page(il
->pci_dev
, rxq
->pool
[i
].page_dma
,
114 PAGE_SIZE
<< il
->hw_params
.rx_page_order
,
116 __il_free_pages(il
, rxq
->pool
[i
].page
);
117 rxq
->pool
[i
].page
= NULL
;
119 list_add_tail(&rxq
->pool
[i
].list
, &rxq
->rx_used
);
122 for (i
= 0; i
< RX_QUEUE_SIZE
; i
++)
123 rxq
->queue
[i
] = NULL
;
125 /* Set us so that we have processed and used all buffers, but have
126 * not restocked the Rx queue with fresh buffers */
127 rxq
->read
= rxq
->write
= 0;
128 rxq
->write_actual
= 0;
130 spin_unlock_irqrestore(&rxq
->lock
, flags
);
134 il4965_rx_init(struct il_priv
*il
, struct il_rx_queue
*rxq
)
137 const u32 rfdnlog
= RX_QUEUE_SIZE_LOG
; /* 256 RBDs */
140 if (il
->cfg
->mod_params
->amsdu_size_8K
)
141 rb_size
= FH49_RCSR_RX_CONFIG_REG_VAL_RB_SIZE_8K
;
143 rb_size
= FH49_RCSR_RX_CONFIG_REG_VAL_RB_SIZE_4K
;
146 il_wr(il
, FH49_MEM_RCSR_CHNL0_CONFIG_REG
, 0);
148 /* Reset driver's Rx queue write idx */
149 il_wr(il
, FH49_RSCSR_CHNL0_RBDCB_WPTR_REG
, 0);
151 /* Tell device where to find RBD circular buffer in DRAM */
152 il_wr(il
, FH49_RSCSR_CHNL0_RBDCB_BASE_REG
, (u32
) (rxq
->bd_dma
>> 8));
154 /* Tell device where in DRAM to update its Rx status */
155 il_wr(il
, FH49_RSCSR_CHNL0_STTS_WPTR_REG
, rxq
->rb_stts_dma
>> 4);
158 * Direct rx interrupts to hosts
159 * Rx buffer size 4 or 8k
163 il_wr(il
, FH49_MEM_RCSR_CHNL0_CONFIG_REG
,
164 FH49_RCSR_RX_CONFIG_CHNL_EN_ENABLE_VAL
|
165 FH49_RCSR_CHNL0_RX_CONFIG_IRQ_DEST_INT_HOST_VAL
|
166 FH49_RCSR_CHNL0_RX_CONFIG_SINGLE_FRAME_MSK
|
168 (rb_timeout
<< FH49_RCSR_RX_CONFIG_REG_IRQ_RBTH_POS
) |
169 (rfdnlog
<< FH49_RCSR_RX_CONFIG_RBDCB_SIZE_POS
));
171 /* Set interrupt coalescing timer to default (2048 usecs) */
172 il_write8(il
, CSR_INT_COALESCING
, IL_HOST_INT_TIMEOUT_DEF
);
178 il4965_set_pwr_vmain(struct il_priv
*il
)
181 * (for documentation purposes)
182 * to set power to V_AUX, do:
184 if (pci_pme_capable(il->pci_dev, PCI_D3cold))
185 il_set_bits_mask_prph(il, APMG_PS_CTRL_REG,
186 APMG_PS_CTRL_VAL_PWR_SRC_VAUX,
187 ~APMG_PS_CTRL_MSK_PWR_SRC);
190 il_set_bits_mask_prph(il
, APMG_PS_CTRL_REG
,
191 APMG_PS_CTRL_VAL_PWR_SRC_VMAIN
,
192 ~APMG_PS_CTRL_MSK_PWR_SRC
);
196 il4965_hw_nic_init(struct il_priv
*il
)
199 struct il_rx_queue
*rxq
= &il
->rxq
;
202 spin_lock_irqsave(&il
->lock
, flags
);
204 /* Set interrupt coalescing calibration timer to default (512 usecs) */
205 il_write8(il
, CSR_INT_COALESCING
, IL_HOST_INT_CALIB_TIMEOUT_DEF
);
206 spin_unlock_irqrestore(&il
->lock
, flags
);
208 il4965_set_pwr_vmain(il
);
209 il4965_nic_config(il
);
211 /* Allocate the RX queue, or reset if it is already allocated */
213 ret
= il_rx_queue_alloc(il
);
215 IL_ERR("Unable to initialize Rx queue\n");
219 il4965_rx_queue_reset(il
, rxq
);
221 il4965_rx_replenish(il
);
223 il4965_rx_init(il
, rxq
);
225 spin_lock_irqsave(&il
->lock
, flags
);
227 rxq
->need_update
= 1;
228 il_rx_queue_update_write_ptr(il
, rxq
);
230 spin_unlock_irqrestore(&il
->lock
, flags
);
232 /* Allocate or reset and init all Tx and Command queues */
234 ret
= il4965_txq_ctx_alloc(il
);
238 il4965_txq_ctx_reset(il
);
240 set_bit(S_INIT
, &il
->status
);
246 * il4965_dma_addr2rbd_ptr - convert a DMA address to a uCode read buffer ptr
249 il4965_dma_addr2rbd_ptr(struct il_priv
*il
, dma_addr_t dma_addr
)
251 return cpu_to_le32((u32
) (dma_addr
>> 8));
255 * il4965_rx_queue_restock - refill RX queue from pre-allocated pool
257 * If there are slots in the RX queue that need to be restocked,
258 * and we have free pre-allocated buffers, fill the ranks as much
259 * as we can, pulling from rx_free.
261 * This moves the 'write' idx forward to catch up with 'processed', and
262 * also updates the memory address in the firmware to reference the new
266 il4965_rx_queue_restock(struct il_priv
*il
)
268 struct il_rx_queue
*rxq
= &il
->rxq
;
269 struct list_head
*element
;
270 struct il_rx_buf
*rxb
;
273 spin_lock_irqsave(&rxq
->lock
, flags
);
274 while (il_rx_queue_space(rxq
) > 0 && rxq
->free_count
) {
275 /* The overwritten rxb must be a used one */
276 rxb
= rxq
->queue
[rxq
->write
];
277 BUG_ON(rxb
&& rxb
->page
);
279 /* Get next free Rx buffer, remove from free list */
280 element
= rxq
->rx_free
.next
;
281 rxb
= list_entry(element
, struct il_rx_buf
, list
);
284 /* Point to Rx buffer via next RBD in circular buffer */
285 rxq
->bd
[rxq
->write
] =
286 il4965_dma_addr2rbd_ptr(il
, rxb
->page_dma
);
287 rxq
->queue
[rxq
->write
] = rxb
;
288 rxq
->write
= (rxq
->write
+ 1) & RX_QUEUE_MASK
;
291 spin_unlock_irqrestore(&rxq
->lock
, flags
);
292 /* If the pre-allocated buffer pool is dropping low, schedule to
294 if (rxq
->free_count
<= RX_LOW_WATERMARK
)
295 queue_work(il
->workqueue
, &il
->rx_replenish
);
297 /* If we've added more space for the firmware to place data, tell it.
298 * Increment device's write pointer in multiples of 8. */
299 if (rxq
->write_actual
!= (rxq
->write
& ~0x7)) {
300 spin_lock_irqsave(&rxq
->lock
, flags
);
301 rxq
->need_update
= 1;
302 spin_unlock_irqrestore(&rxq
->lock
, flags
);
303 il_rx_queue_update_write_ptr(il
, rxq
);
308 * il4965_rx_replenish - Move all used packet from rx_used to rx_free
310 * When moving to rx_free an SKB is allocated for the slot.
312 * Also restock the Rx queue via il_rx_queue_restock.
313 * This is called as a scheduled work item (except for during initialization)
316 il4965_rx_allocate(struct il_priv
*il
, gfp_t priority
)
318 struct il_rx_queue
*rxq
= &il
->rxq
;
319 struct list_head
*element
;
320 struct il_rx_buf
*rxb
;
324 gfp_t gfp_mask
= priority
;
327 spin_lock_irqsave(&rxq
->lock
, flags
);
328 if (list_empty(&rxq
->rx_used
)) {
329 spin_unlock_irqrestore(&rxq
->lock
, flags
);
332 spin_unlock_irqrestore(&rxq
->lock
, flags
);
334 if (rxq
->free_count
> RX_LOW_WATERMARK
)
335 gfp_mask
|= __GFP_NOWARN
;
337 if (il
->hw_params
.rx_page_order
> 0)
338 gfp_mask
|= __GFP_COMP
;
340 /* Alloc a new receive buffer */
341 page
= alloc_pages(gfp_mask
, il
->hw_params
.rx_page_order
);
344 D_INFO("alloc_pages failed, " "order: %d\n",
345 il
->hw_params
.rx_page_order
);
347 if (rxq
->free_count
<= RX_LOW_WATERMARK
&&
349 IL_ERR("Failed to alloc_pages with %s. "
350 "Only %u free buffers remaining.\n",
352 GFP_ATOMIC
? "GFP_ATOMIC" : "GFP_KERNEL",
354 /* We don't reschedule replenish work here -- we will
355 * call the restock method and if it still needs
356 * more buffers it will schedule replenish */
360 /* Get physical address of the RB */
362 pci_map_page(il
->pci_dev
, page
, 0,
363 PAGE_SIZE
<< il
->hw_params
.rx_page_order
,
365 if (unlikely(pci_dma_mapping_error(il
->pci_dev
, page_dma
))) {
366 __free_pages(page
, il
->hw_params
.rx_page_order
);
370 spin_lock_irqsave(&rxq
->lock
, flags
);
372 if (list_empty(&rxq
->rx_used
)) {
373 spin_unlock_irqrestore(&rxq
->lock
, flags
);
374 pci_unmap_page(il
->pci_dev
, page_dma
,
375 PAGE_SIZE
<< il
->hw_params
.rx_page_order
,
377 __free_pages(page
, il
->hw_params
.rx_page_order
);
381 element
= rxq
->rx_used
.next
;
382 rxb
= list_entry(element
, struct il_rx_buf
, list
);
388 rxb
->page_dma
= page_dma
;
389 list_add_tail(&rxb
->list
, &rxq
->rx_free
);
391 il
->alloc_rxb_page
++;
393 spin_unlock_irqrestore(&rxq
->lock
, flags
);
398 il4965_rx_replenish(struct il_priv
*il
)
402 il4965_rx_allocate(il
, GFP_KERNEL
);
404 spin_lock_irqsave(&il
->lock
, flags
);
405 il4965_rx_queue_restock(il
);
406 spin_unlock_irqrestore(&il
->lock
, flags
);
410 il4965_rx_replenish_now(struct il_priv
*il
)
412 il4965_rx_allocate(il
, GFP_ATOMIC
);
414 il4965_rx_queue_restock(il
);
417 /* Assumes that the skb field of the buffers in 'pool' is kept accurate.
418 * If an SKB has been detached, the POOL needs to have its SKB set to NULL
419 * This free routine walks the list of POOL entries and if SKB is set to
420 * non NULL it is unmapped and freed
423 il4965_rx_queue_free(struct il_priv
*il
, struct il_rx_queue
*rxq
)
426 for (i
= 0; i
< RX_QUEUE_SIZE
+ RX_FREE_BUFFERS
; i
++) {
427 if (rxq
->pool
[i
].page
!= NULL
) {
428 pci_unmap_page(il
->pci_dev
, rxq
->pool
[i
].page_dma
,
429 PAGE_SIZE
<< il
->hw_params
.rx_page_order
,
431 __il_free_pages(il
, rxq
->pool
[i
].page
);
432 rxq
->pool
[i
].page
= NULL
;
436 dma_free_coherent(&il
->pci_dev
->dev
, 4 * RX_QUEUE_SIZE
, rxq
->bd
,
438 dma_free_coherent(&il
->pci_dev
->dev
, sizeof(struct il_rb_status
),
439 rxq
->rb_stts
, rxq
->rb_stts_dma
);
445 il4965_rxq_stop(struct il_priv
*il
)
449 _il_wr(il
, FH49_MEM_RCSR_CHNL0_CONFIG_REG
, 0);
450 ret
= _il_poll_bit(il
, FH49_MEM_RSSR_RX_STATUS_REG
,
451 FH49_RSSR_CHNL0_RX_STATUS_CHNL_IDLE
,
452 FH49_RSSR_CHNL0_RX_STATUS_CHNL_IDLE
,
455 IL_ERR("Can't stop Rx DMA.\n");
461 il4965_hwrate_to_mac80211_idx(u32 rate_n_flags
, enum ieee80211_band band
)
466 /* HT rate format: mac80211 wants an MCS number, which is just LSB */
467 if (rate_n_flags
& RATE_MCS_HT_MSK
) {
468 idx
= (rate_n_flags
& 0xff);
470 /* Legacy rate format, search for match in table */
472 if (band
== IEEE80211_BAND_5GHZ
)
473 band_offset
= IL_FIRST_OFDM_RATE
;
474 for (idx
= band_offset
; idx
< RATE_COUNT_LEGACY
; idx
++)
475 if (il_rates
[idx
].plcp
== (rate_n_flags
& 0xFF))
476 return idx
- band_offset
;
483 il4965_calc_rssi(struct il_priv
*il
, struct il_rx_phy_res
*rx_resp
)
485 /* data from PHY/DSP regarding signal strength, etc.,
486 * contents are always there, not configurable by host. */
487 struct il4965_rx_non_cfg_phy
*ncphy
=
488 (struct il4965_rx_non_cfg_phy
*)rx_resp
->non_cfg_phy_buf
;
490 (le16_to_cpu(ncphy
->agc_info
) & IL49_AGC_DB_MASK
) >>
494 (le16_to_cpu(rx_resp
->phy_flags
) & IL49_RX_PHY_FLAGS_ANTENNAE_MASK
)
495 >> IL49_RX_PHY_FLAGS_ANTENNAE_OFFSET
;
499 /* Find max rssi among 3 possible receivers.
500 * These values are measured by the digital signal processor (DSP).
501 * They should stay fairly constant even as the signal strength varies,
502 * if the radio's automatic gain control (AGC) is working right.
503 * AGC value (see below) will provide the "interesting" info. */
504 for (i
= 0; i
< 3; i
++)
505 if (valid_antennae
& (1 << i
))
506 max_rssi
= max(ncphy
->rssi_info
[i
<< 1], max_rssi
);
508 D_STATS("Rssi In A %d B %d C %d Max %d AGC dB %d\n",
509 ncphy
->rssi_info
[0], ncphy
->rssi_info
[2], ncphy
->rssi_info
[4],
512 /* dBm = max_rssi dB - agc dB - constant.
513 * Higher AGC (higher radio gain) means lower signal. */
514 return max_rssi
- agc
- IL4965_RSSI_OFFSET
;
518 il4965_translate_rx_status(struct il_priv
*il
, u32 decrypt_in
)
522 if ((decrypt_in
& RX_RES_STATUS_STATION_FOUND
) ==
523 RX_RES_STATUS_STATION_FOUND
)
525 (RX_RES_STATUS_STATION_FOUND
|
526 RX_RES_STATUS_NO_STATION_INFO_MISMATCH
);
528 decrypt_out
|= (decrypt_in
& RX_RES_STATUS_SEC_TYPE_MSK
);
530 /* packet was not encrypted */
531 if ((decrypt_in
& RX_RES_STATUS_SEC_TYPE_MSK
) ==
532 RX_RES_STATUS_SEC_TYPE_NONE
)
535 /* packet was encrypted with unknown alg */
536 if ((decrypt_in
& RX_RES_STATUS_SEC_TYPE_MSK
) ==
537 RX_RES_STATUS_SEC_TYPE_ERR
)
540 /* decryption was not done in HW */
541 if ((decrypt_in
& RX_MPDU_RES_STATUS_DEC_DONE_MSK
) !=
542 RX_MPDU_RES_STATUS_DEC_DONE_MSK
)
545 switch (decrypt_in
& RX_RES_STATUS_SEC_TYPE_MSK
) {
547 case RX_RES_STATUS_SEC_TYPE_CCMP
:
548 /* alg is CCM: check MIC only */
549 if (!(decrypt_in
& RX_MPDU_RES_STATUS_MIC_OK
))
551 decrypt_out
|= RX_RES_STATUS_BAD_ICV_MIC
;
553 decrypt_out
|= RX_RES_STATUS_DECRYPT_OK
;
557 case RX_RES_STATUS_SEC_TYPE_TKIP
:
558 if (!(decrypt_in
& RX_MPDU_RES_STATUS_TTAK_OK
)) {
560 decrypt_out
|= RX_RES_STATUS_BAD_KEY_TTAK
;
563 /* fall through if TTAK OK */
565 if (!(decrypt_in
& RX_MPDU_RES_STATUS_ICV_OK
))
566 decrypt_out
|= RX_RES_STATUS_BAD_ICV_MIC
;
568 decrypt_out
|= RX_RES_STATUS_DECRYPT_OK
;
572 D_RX("decrypt_in:0x%x decrypt_out = 0x%x\n", decrypt_in
, decrypt_out
);
578 il4965_pass_packet_to_mac80211(struct il_priv
*il
, struct ieee80211_hdr
*hdr
,
579 u16 len
, u32 ampdu_status
, struct il_rx_buf
*rxb
,
580 struct ieee80211_rx_status
*stats
)
583 __le16 fc
= hdr
->frame_control
;
585 /* We only process data packets if the interface is open */
586 if (unlikely(!il
->is_open
)) {
587 D_DROP("Dropping packet while interface is not open.\n");
591 /* In case of HW accelerated crypto and bad decryption, drop */
592 if (!il
->cfg
->mod_params
->sw_crypto
&&
593 il_set_decrypted_flag(il
, hdr
, ampdu_status
, stats
))
596 skb
= dev_alloc_skb(128);
598 IL_ERR("dev_alloc_skb failed\n");
602 skb_add_rx_frag(skb
, 0, rxb
->page
, (void *)hdr
- rxb_addr(rxb
), len
,
605 il_update_stats(il
, false, fc
, len
);
606 memcpy(IEEE80211_SKB_RXCB(skb
), stats
, sizeof(*stats
));
608 ieee80211_rx(il
->hw
, skb
);
609 il
->alloc_rxb_page
--;
613 /* Called for N_RX (legacy ABG frames), or
614 * N_RX_MPDU (HT high-throughput N frames). */
616 il4965_hdl_rx(struct il_priv
*il
, struct il_rx_buf
*rxb
)
618 struct ieee80211_hdr
*header
;
619 struct ieee80211_rx_status rx_status
= {};
620 struct il_rx_pkt
*pkt
= rxb_addr(rxb
);
621 struct il_rx_phy_res
*phy_res
;
622 __le32 rx_pkt_status
;
623 struct il_rx_mpdu_res_start
*amsdu
;
629 * N_RX and N_RX_MPDU are handled differently.
630 * N_RX: physical layer info is in this buffer
631 * N_RX_MPDU: physical layer info was sent in separate
632 * command and cached in il->last_phy_res
634 * Here we set up local variables depending on which command is
637 if (pkt
->hdr
.cmd
== N_RX
) {
638 phy_res
= (struct il_rx_phy_res
*)pkt
->u
.raw
;
640 (struct ieee80211_hdr
*)(pkt
->u
.raw
+ sizeof(*phy_res
) +
641 phy_res
->cfg_phy_cnt
);
643 len
= le16_to_cpu(phy_res
->byte_count
);
645 *(__le32
*) (pkt
->u
.raw
+ sizeof(*phy_res
) +
646 phy_res
->cfg_phy_cnt
+ len
);
647 ampdu_status
= le32_to_cpu(rx_pkt_status
);
649 if (!il
->_4965
.last_phy_res_valid
) {
650 IL_ERR("MPDU frame without cached PHY data\n");
653 phy_res
= &il
->_4965
.last_phy_res
;
654 amsdu
= (struct il_rx_mpdu_res_start
*)pkt
->u
.raw
;
655 header
= (struct ieee80211_hdr
*)(pkt
->u
.raw
+ sizeof(*amsdu
));
656 len
= le16_to_cpu(amsdu
->byte_count
);
657 rx_pkt_status
= *(__le32
*) (pkt
->u
.raw
+ sizeof(*amsdu
) + len
);
659 il4965_translate_rx_status(il
, le32_to_cpu(rx_pkt_status
));
662 if ((unlikely(phy_res
->cfg_phy_cnt
> 20))) {
663 D_DROP("dsp size out of range [0,20]: %d/n",
664 phy_res
->cfg_phy_cnt
);
668 if (!(rx_pkt_status
& RX_RES_STATUS_NO_CRC32_ERROR
) ||
669 !(rx_pkt_status
& RX_RES_STATUS_NO_RXE_OVERFLOW
)) {
670 D_RX("Bad CRC or FIFO: 0x%08X.\n", le32_to_cpu(rx_pkt_status
));
674 /* This will be used in several places later */
675 rate_n_flags
= le32_to_cpu(phy_res
->rate_n_flags
);
677 /* rx_status carries information about the packet to mac80211 */
678 rx_status
.mactime
= le64_to_cpu(phy_res
->timestamp
);
681 phy_flags
& RX_RES_PHY_FLAGS_BAND_24_MSK
) ? IEEE80211_BAND_2GHZ
:
684 ieee80211_channel_to_frequency(le16_to_cpu(phy_res
->channel
),
687 il4965_hwrate_to_mac80211_idx(rate_n_flags
, rx_status
.band
);
690 /* TSF isn't reliable. In order to allow smooth user experience,
691 * this W/A doesn't propagate it to the mac80211 */
692 /*rx_status.flag |= RX_FLAG_MACTIME_START; */
694 il
->ucode_beacon_time
= le32_to_cpu(phy_res
->beacon_time_stamp
);
696 /* Find max signal strength (dBm) among 3 antenna/receiver chains */
697 rx_status
.signal
= il4965_calc_rssi(il
, phy_res
);
699 D_STATS("Rssi %d, TSF %llu\n", rx_status
.signal
,
700 (unsigned long long)rx_status
.mactime
);
705 * It seems that the antenna field in the phy flags value
706 * is actually a bit field. This is undefined by radiotap,
707 * it wants an actual antenna number but I always get "7"
708 * for most legacy frames I receive indicating that the
709 * same frame was received on all three RX chains.
711 * I think this field should be removed in favor of a
712 * new 802.11n radiotap field "RX chains" that is defined
716 (le16_to_cpu(phy_res
->phy_flags
) & RX_RES_PHY_FLAGS_ANTENNA_MSK
) >>
717 RX_RES_PHY_FLAGS_ANTENNA_POS
;
719 /* set the preamble flag if appropriate */
720 if (phy_res
->phy_flags
& RX_RES_PHY_FLAGS_SHORT_PREAMBLE_MSK
)
721 rx_status
.flag
|= RX_FLAG_SHORTPRE
;
723 /* Set up the HT phy flags */
724 if (rate_n_flags
& RATE_MCS_HT_MSK
)
725 rx_status
.flag
|= RX_FLAG_HT
;
726 if (rate_n_flags
& RATE_MCS_HT40_MSK
)
727 rx_status
.flag
|= RX_FLAG_40MHZ
;
728 if (rate_n_flags
& RATE_MCS_SGI_MSK
)
729 rx_status
.flag
|= RX_FLAG_SHORT_GI
;
731 if (phy_res
->phy_flags
& RX_RES_PHY_FLAGS_AGG_MSK
) {
732 /* We know which subframes of an A-MPDU belong
733 * together since we get a single PHY response
734 * from the firmware for all of them.
737 rx_status
.flag
|= RX_FLAG_AMPDU_DETAILS
;
738 rx_status
.ampdu_reference
= il
->_4965
.ampdu_ref
;
741 il4965_pass_packet_to_mac80211(il
, header
, len
, ampdu_status
, rxb
,
745 /* Cache phy data (Rx signal strength, etc) for HT frame (N_RX_PHY).
746 * This will be used later in il_hdl_rx() for N_RX_MPDU. */
748 il4965_hdl_rx_phy(struct il_priv
*il
, struct il_rx_buf
*rxb
)
750 struct il_rx_pkt
*pkt
= rxb_addr(rxb
);
751 il
->_4965
.last_phy_res_valid
= true;
752 il
->_4965
.ampdu_ref
++;
753 memcpy(&il
->_4965
.last_phy_res
, pkt
->u
.raw
,
754 sizeof(struct il_rx_phy_res
));
758 il4965_get_channels_for_scan(struct il_priv
*il
, struct ieee80211_vif
*vif
,
759 enum ieee80211_band band
, u8 is_active
,
760 u8 n_probes
, struct il_scan_channel
*scan_ch
)
762 struct ieee80211_channel
*chan
;
763 const struct ieee80211_supported_band
*sband
;
764 const struct il_channel_info
*ch_info
;
765 u16 passive_dwell
= 0;
766 u16 active_dwell
= 0;
770 sband
= il_get_hw_mode(il
, band
);
774 active_dwell
= il_get_active_dwell_time(il
, band
, n_probes
);
775 passive_dwell
= il_get_passive_dwell_time(il
, band
, vif
);
777 if (passive_dwell
<= active_dwell
)
778 passive_dwell
= active_dwell
+ 1;
780 for (i
= 0, added
= 0; i
< il
->scan_request
->n_channels
; i
++) {
781 chan
= il
->scan_request
->channels
[i
];
783 if (chan
->band
!= band
)
786 channel
= chan
->hw_value
;
787 scan_ch
->channel
= cpu_to_le16(channel
);
789 ch_info
= il_get_channel_info(il
, band
, channel
);
790 if (!il_is_channel_valid(ch_info
)) {
791 D_SCAN("Channel %d is INVALID for this band.\n",
796 if (!is_active
|| il_is_channel_passive(ch_info
) ||
797 (chan
->flags
& IEEE80211_CHAN_PASSIVE_SCAN
))
798 scan_ch
->type
= SCAN_CHANNEL_TYPE_PASSIVE
;
800 scan_ch
->type
= SCAN_CHANNEL_TYPE_ACTIVE
;
803 scan_ch
->type
|= IL_SCAN_PROBE_MASK(n_probes
);
805 scan_ch
->active_dwell
= cpu_to_le16(active_dwell
);
806 scan_ch
->passive_dwell
= cpu_to_le16(passive_dwell
);
808 /* Set txpower levels to defaults */
809 scan_ch
->dsp_atten
= 110;
811 /* NOTE: if we were doing 6Mb OFDM for scans we'd use
813 * scan_ch->tx_gain = ((1 << 5) | (2 << 3)) | 3;
815 if (band
== IEEE80211_BAND_5GHZ
)
816 scan_ch
->tx_gain
= ((1 << 5) | (3 << 3)) | 3;
818 scan_ch
->tx_gain
= ((1 << 5) | (5 << 3));
820 D_SCAN("Scanning ch=%d prob=0x%X [%s %d]\n", channel
,
821 le32_to_cpu(scan_ch
->type
),
823 type
& SCAN_CHANNEL_TYPE_ACTIVE
) ? "ACTIVE" : "PASSIVE",
825 type
& SCAN_CHANNEL_TYPE_ACTIVE
) ? active_dwell
:
832 D_SCAN("total channels to scan %d\n", added
);
837 il4965_toggle_tx_ant(struct il_priv
*il
, u8
*ant
, u8 valid
)
842 for (i
= 0; i
< RATE_ANT_NUM
- 1; i
++) {
843 ind
= (ind
+ 1) < RATE_ANT_NUM
? ind
+ 1 : 0;
844 if (valid
& BIT(ind
)) {
852 il4965_request_scan(struct il_priv
*il
, struct ieee80211_vif
*vif
)
854 struct il_host_cmd cmd
= {
856 .len
= sizeof(struct il_scan_cmd
),
857 .flags
= CMD_SIZE_HUGE
,
859 struct il_scan_cmd
*scan
;
863 enum ieee80211_band band
;
865 u8 rx_ant
= il
->hw_params
.valid_rx_ant
;
867 bool is_active
= false;
870 u8 scan_tx_antennas
= il
->hw_params
.valid_tx_ant
;
873 lockdep_assert_held(&il
->mutex
);
877 kmalloc(sizeof(struct il_scan_cmd
) + IL_MAX_SCAN_SIZE
,
880 D_SCAN("fail to allocate memory for scan\n");
885 memset(scan
, 0, sizeof(struct il_scan_cmd
) + IL_MAX_SCAN_SIZE
);
887 scan
->quiet_plcp_th
= IL_PLCP_QUIET_THRESH
;
888 scan
->quiet_time
= IL_ACTIVE_QUIET_TIME
;
890 if (il_is_any_associated(il
)) {
893 u32 suspend_time
= 100;
894 u32 scan_suspend_time
= 100;
896 D_INFO("Scanning while associated...\n");
897 interval
= vif
->bss_conf
.beacon_int
;
899 scan
->suspend_time
= 0;
900 scan
->max_out_time
= cpu_to_le32(200 * 1024);
902 interval
= suspend_time
;
904 extra
= (suspend_time
/ interval
) << 22;
906 (extra
| ((suspend_time
% interval
) * 1024));
907 scan
->suspend_time
= cpu_to_le32(scan_suspend_time
);
908 D_SCAN("suspend_time 0x%X beacon interval %d\n",
909 scan_suspend_time
, interval
);
912 if (il
->scan_request
->n_ssids
) {
914 D_SCAN("Kicking off active scan\n");
915 for (i
= 0; i
< il
->scan_request
->n_ssids
; i
++) {
916 /* always does wildcard anyway */
917 if (!il
->scan_request
->ssids
[i
].ssid_len
)
919 scan
->direct_scan
[p
].id
= WLAN_EID_SSID
;
920 scan
->direct_scan
[p
].len
=
921 il
->scan_request
->ssids
[i
].ssid_len
;
922 memcpy(scan
->direct_scan
[p
].ssid
,
923 il
->scan_request
->ssids
[i
].ssid
,
924 il
->scan_request
->ssids
[i
].ssid_len
);
930 D_SCAN("Start passive scan.\n");
932 scan
->tx_cmd
.tx_flags
= TX_CMD_FLG_SEQ_CTL_MSK
;
933 scan
->tx_cmd
.sta_id
= il
->hw_params
.bcast_id
;
934 scan
->tx_cmd
.stop_time
.life_time
= TX_CMD_LIFE_TIME_INFINITE
;
936 switch (il
->scan_band
) {
937 case IEEE80211_BAND_2GHZ
:
938 scan
->flags
= RXON_FLG_BAND_24G_MSK
| RXON_FLG_AUTO_DETECT_MSK
;
940 le32_to_cpu(il
->active
.flags
& RXON_FLG_CHANNEL_MODE_MSK
) >>
941 RXON_FLG_CHANNEL_MODE_POS
;
942 if (chan_mod
== CHANNEL_MODE_PURE_40
) {
946 rate_flags
= RATE_MCS_CCK_MSK
;
949 case IEEE80211_BAND_5GHZ
:
953 IL_WARN("Invalid scan band\n");
958 * If active scanning is requested but a certain channel is
959 * marked passive, we can do active scanning if we detect
962 * There is an issue with some firmware versions that triggers
963 * a sysassert on a "good CRC threshold" of zero (== disabled),
964 * on a radar channel even though this means that we should NOT
967 * The "good CRC threshold" is the number of frames that we
968 * need to receive during our dwell time on a channel before
969 * sending out probes -- setting this to a huge value will
970 * mean we never reach it, but at the same time work around
971 * the aforementioned issue. Thus use IL_GOOD_CRC_TH_NEVER
972 * here instead of IL_GOOD_CRC_TH_DISABLED.
975 is_active
? IL_GOOD_CRC_TH_DEFAULT
: IL_GOOD_CRC_TH_NEVER
;
977 band
= il
->scan_band
;
979 if (il
->cfg
->scan_rx_antennas
[band
])
980 rx_ant
= il
->cfg
->scan_rx_antennas
[band
];
982 il4965_toggle_tx_ant(il
, &il
->scan_tx_ant
[band
], scan_tx_antennas
);
983 rate_flags
|= BIT(il
->scan_tx_ant
[band
]) << RATE_MCS_ANT_POS
;
984 scan
->tx_cmd
.rate_n_flags
= cpu_to_le32(rate
| rate_flags
);
986 /* In power save mode use one chain, otherwise use all chains */
987 if (test_bit(S_POWER_PMI
, &il
->status
)) {
988 /* rx_ant has been set to all valid chains previously */
990 rx_ant
& ((u8
) (il
->chain_noise_data
.active_chains
));
992 active_chains
= rx_ant
;
994 D_SCAN("chain_noise_data.active_chains: %u\n",
995 il
->chain_noise_data
.active_chains
);
997 rx_ant
= il4965_first_antenna(active_chains
);
1000 /* MIMO is not used here, but value is required */
1001 rx_chain
|= il
->hw_params
.valid_rx_ant
<< RXON_RX_CHAIN_VALID_POS
;
1002 rx_chain
|= rx_ant
<< RXON_RX_CHAIN_FORCE_MIMO_SEL_POS
;
1003 rx_chain
|= rx_ant
<< RXON_RX_CHAIN_FORCE_SEL_POS
;
1004 rx_chain
|= 0x1 << RXON_RX_CHAIN_DRIVER_FORCE_POS
;
1005 scan
->rx_chain
= cpu_to_le16(rx_chain
);
1008 il_fill_probe_req(il
, (struct ieee80211_mgmt
*)scan
->data
,
1009 vif
->addr
, il
->scan_request
->ie
,
1010 il
->scan_request
->ie_len
,
1011 IL_MAX_SCAN_SIZE
- sizeof(*scan
));
1012 scan
->tx_cmd
.len
= cpu_to_le16(cmd_len
);
1014 scan
->filter_flags
|=
1015 (RXON_FILTER_ACCEPT_GRP_MSK
| RXON_FILTER_BCON_AWARE_MSK
);
1017 scan
->channel_count
=
1018 il4965_get_channels_for_scan(il
, vif
, band
, is_active
, n_probes
,
1019 (void *)&scan
->data
[cmd_len
]);
1020 if (scan
->channel_count
== 0) {
1021 D_SCAN("channel count %d\n", scan
->channel_count
);
1026 le16_to_cpu(scan
->tx_cmd
.len
) +
1027 scan
->channel_count
* sizeof(struct il_scan_channel
);
1029 scan
->len
= cpu_to_le16(cmd
.len
);
1031 set_bit(S_SCAN_HW
, &il
->status
);
1033 ret
= il_send_cmd_sync(il
, &cmd
);
1035 clear_bit(S_SCAN_HW
, &il
->status
);
1041 il4965_manage_ibss_station(struct il_priv
*il
, struct ieee80211_vif
*vif
,
1044 struct il_vif_priv
*vif_priv
= (void *)vif
->drv_priv
;
1047 return il4965_add_bssid_station(il
, vif
->bss_conf
.bssid
,
1048 &vif_priv
->ibss_bssid_sta_id
);
1049 return il_remove_station(il
, vif_priv
->ibss_bssid_sta_id
,
1050 vif
->bss_conf
.bssid
);
1054 il4965_free_tfds_in_queue(struct il_priv
*il
, int sta_id
, int tid
, int freed
)
1056 lockdep_assert_held(&il
->sta_lock
);
1058 if (il
->stations
[sta_id
].tid
[tid
].tfds_in_queue
>= freed
)
1059 il
->stations
[sta_id
].tid
[tid
].tfds_in_queue
-= freed
;
1061 D_TX("free more than tfds_in_queue (%u:%d)\n",
1062 il
->stations
[sta_id
].tid
[tid
].tfds_in_queue
, freed
);
1063 il
->stations
[sta_id
].tid
[tid
].tfds_in_queue
= 0;
1067 #define IL_TX_QUEUE_MSK 0xfffff
1070 il4965_is_single_rx_stream(struct il_priv
*il
)
1072 return il
->current_ht_config
.smps
== IEEE80211_SMPS_STATIC
||
1073 il
->current_ht_config
.single_chain_sufficient
;
1076 #define IL_NUM_RX_CHAINS_MULTIPLE 3
1077 #define IL_NUM_RX_CHAINS_SINGLE 2
1078 #define IL_NUM_IDLE_CHAINS_DUAL 2
1079 #define IL_NUM_IDLE_CHAINS_SINGLE 1
1082 * Determine how many receiver/antenna chains to use.
1084 * More provides better reception via diversity. Fewer saves power
1085 * at the expense of throughput, but only when not in powersave to
1088 * MIMO (dual stream) requires at least 2, but works better with 3.
1089 * This does not determine *which* chains to use, just how many.
1092 il4965_get_active_rx_chain_count(struct il_priv
*il
)
1094 /* # of Rx chains to use when expecting MIMO. */
1095 if (il4965_is_single_rx_stream(il
))
1096 return IL_NUM_RX_CHAINS_SINGLE
;
1098 return IL_NUM_RX_CHAINS_MULTIPLE
;
1102 * When we are in power saving mode, unless device support spatial
1103 * multiplexing power save, use the active count for rx chain count.
1106 il4965_get_idle_rx_chain_count(struct il_priv
*il
, int active_cnt
)
1108 /* # Rx chains when idling, depending on SMPS mode */
1109 switch (il
->current_ht_config
.smps
) {
1110 case IEEE80211_SMPS_STATIC
:
1111 case IEEE80211_SMPS_DYNAMIC
:
1112 return IL_NUM_IDLE_CHAINS_SINGLE
;
1113 case IEEE80211_SMPS_OFF
:
1116 WARN(1, "invalid SMPS mode %d", il
->current_ht_config
.smps
);
1121 /* up to 4 chains */
1123 il4965_count_chain_bitmap(u32 chain_bitmap
)
1126 res
= (chain_bitmap
& BIT(0)) >> 0;
1127 res
+= (chain_bitmap
& BIT(1)) >> 1;
1128 res
+= (chain_bitmap
& BIT(2)) >> 2;
1129 res
+= (chain_bitmap
& BIT(3)) >> 3;
1134 * il4965_set_rxon_chain - Set up Rx chain usage in "staging" RXON image
1136 * Selects how many and which Rx receivers/antennas/chains to use.
1137 * This should not be used for scan command ... it puts data in wrong place.
1140 il4965_set_rxon_chain(struct il_priv
*il
)
1142 bool is_single
= il4965_is_single_rx_stream(il
);
1143 bool is_cam
= !test_bit(S_POWER_PMI
, &il
->status
);
1144 u8 idle_rx_cnt
, active_rx_cnt
, valid_rx_cnt
;
1148 /* Tell uCode which antennas are actually connected.
1149 * Before first association, we assume all antennas are connected.
1150 * Just after first association, il4965_chain_noise_calibration()
1151 * checks which antennas actually *are* connected. */
1152 if (il
->chain_noise_data
.active_chains
)
1153 active_chains
= il
->chain_noise_data
.active_chains
;
1155 active_chains
= il
->hw_params
.valid_rx_ant
;
1157 rx_chain
= active_chains
<< RXON_RX_CHAIN_VALID_POS
;
1159 /* How many receivers should we use? */
1160 active_rx_cnt
= il4965_get_active_rx_chain_count(il
);
1161 idle_rx_cnt
= il4965_get_idle_rx_chain_count(il
, active_rx_cnt
);
1163 /* correct rx chain count according hw settings
1164 * and chain noise calibration
1166 valid_rx_cnt
= il4965_count_chain_bitmap(active_chains
);
1167 if (valid_rx_cnt
< active_rx_cnt
)
1168 active_rx_cnt
= valid_rx_cnt
;
1170 if (valid_rx_cnt
< idle_rx_cnt
)
1171 idle_rx_cnt
= valid_rx_cnt
;
1173 rx_chain
|= active_rx_cnt
<< RXON_RX_CHAIN_MIMO_CNT_POS
;
1174 rx_chain
|= idle_rx_cnt
<< RXON_RX_CHAIN_CNT_POS
;
1176 il
->staging
.rx_chain
= cpu_to_le16(rx_chain
);
1178 if (!is_single
&& active_rx_cnt
>= IL_NUM_RX_CHAINS_SINGLE
&& is_cam
)
1179 il
->staging
.rx_chain
|= RXON_RX_CHAIN_MIMO_FORCE_MSK
;
1181 il
->staging
.rx_chain
&= ~RXON_RX_CHAIN_MIMO_FORCE_MSK
;
1183 D_ASSOC("rx_chain=0x%X active=%d idle=%d\n", il
->staging
.rx_chain
,
1184 active_rx_cnt
, idle_rx_cnt
);
1186 WARN_ON(active_rx_cnt
== 0 || idle_rx_cnt
== 0 ||
1187 active_rx_cnt
< idle_rx_cnt
);
1191 il4965_get_fh_string(int cmd
)
1194 IL_CMD(FH49_RSCSR_CHNL0_STTS_WPTR_REG
);
1195 IL_CMD(FH49_RSCSR_CHNL0_RBDCB_BASE_REG
);
1196 IL_CMD(FH49_RSCSR_CHNL0_WPTR
);
1197 IL_CMD(FH49_MEM_RCSR_CHNL0_CONFIG_REG
);
1198 IL_CMD(FH49_MEM_RSSR_SHARED_CTRL_REG
);
1199 IL_CMD(FH49_MEM_RSSR_RX_STATUS_REG
);
1200 IL_CMD(FH49_MEM_RSSR_RX_ENABLE_ERR_IRQ2DRV
);
1201 IL_CMD(FH49_TSSR_TX_STATUS_REG
);
1202 IL_CMD(FH49_TSSR_TX_ERROR_REG
);
1209 il4965_dump_fh(struct il_priv
*il
, char **buf
, bool display
)
1212 #ifdef CONFIG_IWLEGACY_DEBUG
1216 static const u32 fh_tbl
[] = {
1217 FH49_RSCSR_CHNL0_STTS_WPTR_REG
,
1218 FH49_RSCSR_CHNL0_RBDCB_BASE_REG
,
1219 FH49_RSCSR_CHNL0_WPTR
,
1220 FH49_MEM_RCSR_CHNL0_CONFIG_REG
,
1221 FH49_MEM_RSSR_SHARED_CTRL_REG
,
1222 FH49_MEM_RSSR_RX_STATUS_REG
,
1223 FH49_MEM_RSSR_RX_ENABLE_ERR_IRQ2DRV
,
1224 FH49_TSSR_TX_STATUS_REG
,
1225 FH49_TSSR_TX_ERROR_REG
1227 #ifdef CONFIG_IWLEGACY_DEBUG
1229 bufsz
= ARRAY_SIZE(fh_tbl
) * 48 + 40;
1230 *buf
= kmalloc(bufsz
, GFP_KERNEL
);
1234 scnprintf(*buf
+ pos
, bufsz
- pos
, "FH register values:\n");
1235 for (i
= 0; i
< ARRAY_SIZE(fh_tbl
); i
++) {
1237 scnprintf(*buf
+ pos
, bufsz
- pos
,
1239 il4965_get_fh_string(fh_tbl
[i
]),
1240 il_rd(il
, fh_tbl
[i
]));
1245 IL_ERR("FH register values:\n");
1246 for (i
= 0; i
< ARRAY_SIZE(fh_tbl
); i
++) {
1247 IL_ERR(" %34s: 0X%08x\n", il4965_get_fh_string(fh_tbl
[i
]),
1248 il_rd(il
, fh_tbl
[i
]));
1254 il4965_hdl_missed_beacon(struct il_priv
*il
, struct il_rx_buf
*rxb
)
1256 struct il_rx_pkt
*pkt
= rxb_addr(rxb
);
1257 struct il_missed_beacon_notif
*missed_beacon
;
1259 missed_beacon
= &pkt
->u
.missed_beacon
;
1260 if (le32_to_cpu(missed_beacon
->consecutive_missed_beacons
) >
1261 il
->missed_beacon_threshold
) {
1262 D_CALIB("missed bcn cnsq %d totl %d rcd %d expctd %d\n",
1263 le32_to_cpu(missed_beacon
->consecutive_missed_beacons
),
1264 le32_to_cpu(missed_beacon
->total_missed_becons
),
1265 le32_to_cpu(missed_beacon
->num_recvd_beacons
),
1266 le32_to_cpu(missed_beacon
->num_expected_beacons
));
1267 if (!test_bit(S_SCANNING
, &il
->status
))
1268 il4965_init_sensitivity(il
);
1272 /* Calculate noise level, based on measurements during network silence just
1273 * before arriving beacon. This measurement can be done only if we know
1274 * exactly when to expect beacons, therefore only when we're associated. */
1276 il4965_rx_calc_noise(struct il_priv
*il
)
1278 struct stats_rx_non_phy
*rx_info
;
1279 int num_active_rx
= 0;
1280 int total_silence
= 0;
1281 int bcn_silence_a
, bcn_silence_b
, bcn_silence_c
;
1284 rx_info
= &(il
->_4965
.stats
.rx
.general
);
1286 le32_to_cpu(rx_info
->beacon_silence_rssi_a
) & IN_BAND_FILTER
;
1288 le32_to_cpu(rx_info
->beacon_silence_rssi_b
) & IN_BAND_FILTER
;
1290 le32_to_cpu(rx_info
->beacon_silence_rssi_c
) & IN_BAND_FILTER
;
1292 if (bcn_silence_a
) {
1293 total_silence
+= bcn_silence_a
;
1296 if (bcn_silence_b
) {
1297 total_silence
+= bcn_silence_b
;
1300 if (bcn_silence_c
) {
1301 total_silence
+= bcn_silence_c
;
1305 /* Average among active antennas */
1307 last_rx_noise
= (total_silence
/ num_active_rx
) - 107;
1309 last_rx_noise
= IL_NOISE_MEAS_NOT_AVAILABLE
;
1311 D_CALIB("inband silence a %u, b %u, c %u, dBm %d\n", bcn_silence_a
,
1312 bcn_silence_b
, bcn_silence_c
, last_rx_noise
);
1315 #ifdef CONFIG_IWLEGACY_DEBUGFS
1317 * based on the assumption of all stats counter are in DWORD
1318 * FIXME: This function is for debugging, do not deal with
1319 * the case of counters roll-over.
1322 il4965_accumulative_stats(struct il_priv
*il
, __le32
* stats
)
1327 u32
*delta
, *max_delta
;
1328 struct stats_general_common
*general
, *accum_general
;
1329 struct stats_tx
*tx
, *accum_tx
;
1331 prev_stats
= (__le32
*) &il
->_4965
.stats
;
1332 accum_stats
= (u32
*) &il
->_4965
.accum_stats
;
1333 size
= sizeof(struct il_notif_stats
);
1334 general
= &il
->_4965
.stats
.general
.common
;
1335 accum_general
= &il
->_4965
.accum_stats
.general
.common
;
1336 tx
= &il
->_4965
.stats
.tx
;
1337 accum_tx
= &il
->_4965
.accum_stats
.tx
;
1338 delta
= (u32
*) &il
->_4965
.delta_stats
;
1339 max_delta
= (u32
*) &il
->_4965
.max_delta
;
1341 for (i
= sizeof(__le32
); i
< size
;
1343 sizeof(__le32
), stats
++, prev_stats
++, delta
++, max_delta
++,
1345 if (le32_to_cpu(*stats
) > le32_to_cpu(*prev_stats
)) {
1347 (le32_to_cpu(*stats
) - le32_to_cpu(*prev_stats
));
1348 *accum_stats
+= *delta
;
1349 if (*delta
> *max_delta
)
1350 *max_delta
= *delta
;
1354 /* reset accumulative stats for "no-counter" type stats */
1355 accum_general
->temperature
= general
->temperature
;
1356 accum_general
->ttl_timestamp
= general
->ttl_timestamp
;
1361 il4965_hdl_stats(struct il_priv
*il
, struct il_rx_buf
*rxb
)
1363 const int recalib_seconds
= 60;
1365 struct il_rx_pkt
*pkt
= rxb_addr(rxb
);
1367 D_RX("Statistics notification received (%d vs %d).\n",
1368 (int)sizeof(struct il_notif_stats
),
1369 le32_to_cpu(pkt
->len_n_flags
) & IL_RX_FRAME_SIZE_MSK
);
1372 ((il
->_4965
.stats
.general
.common
.temperature
!=
1373 pkt
->u
.stats
.general
.common
.temperature
) ||
1374 ((il
->_4965
.stats
.flag
& STATS_REPLY_FLG_HT40_MODE_MSK
) !=
1375 (pkt
->u
.stats
.flag
& STATS_REPLY_FLG_HT40_MODE_MSK
)));
1376 #ifdef CONFIG_IWLEGACY_DEBUGFS
1377 il4965_accumulative_stats(il
, (__le32
*) &pkt
->u
.stats
);
1380 /* TODO: reading some of stats is unneeded */
1381 memcpy(&il
->_4965
.stats
, &pkt
->u
.stats
, sizeof(il
->_4965
.stats
));
1383 set_bit(S_STATS
, &il
->status
);
1386 * Reschedule the stats timer to occur in recalib_seconds to ensure
1387 * we get a thermal update even if the uCode doesn't give us one
1389 mod_timer(&il
->stats_periodic
,
1390 jiffies
+ msecs_to_jiffies(recalib_seconds
* 1000));
1392 if (unlikely(!test_bit(S_SCANNING
, &il
->status
)) &&
1393 (pkt
->hdr
.cmd
== N_STATS
)) {
1394 il4965_rx_calc_noise(il
);
1395 queue_work(il
->workqueue
, &il
->run_time_calib_work
);
1399 il4965_temperature_calib(il
);
1403 il4965_hdl_c_stats(struct il_priv
*il
, struct il_rx_buf
*rxb
)
1405 struct il_rx_pkt
*pkt
= rxb_addr(rxb
);
1407 if (le32_to_cpu(pkt
->u
.stats
.flag
) & UCODE_STATS_CLEAR_MSK
) {
1408 #ifdef CONFIG_IWLEGACY_DEBUGFS
1409 memset(&il
->_4965
.accum_stats
, 0,
1410 sizeof(struct il_notif_stats
));
1411 memset(&il
->_4965
.delta_stats
, 0,
1412 sizeof(struct il_notif_stats
));
1413 memset(&il
->_4965
.max_delta
, 0, sizeof(struct il_notif_stats
));
1415 D_RX("Statistics have been cleared\n");
1417 il4965_hdl_stats(il
, rxb
);
1422 * mac80211 queues, ACs, hardware queues, FIFOs.
1424 * Cf. http://wireless.kernel.org/en/developers/Documentation/mac80211/queues
1426 * Mac80211 uses the following numbers, which we get as from it
1427 * by way of skb_get_queue_mapping(skb):
1435 * Regular (not A-MPDU) frames are put into hardware queues corresponding
1436 * to the FIFOs, see comments in iwl-prph.h. Aggregated frames get their
1437 * own queue per aggregation session (RA/TID combination), such queues are
1438 * set up to map into FIFOs too, for which we need an AC->FIFO mapping. In
1439 * order to map frames to the right queue, we also need an AC->hw queue
1440 * mapping. This is implemented here.
1442 * Due to the way hw queues are set up (by the hw specific modules like
1443 * 4965.c), the AC->hw queue mapping is the identity
1447 static const u8 tid_to_ac
[] = {
1459 il4965_get_ac_from_tid(u16 tid
)
1461 if (likely(tid
< ARRAY_SIZE(tid_to_ac
)))
1462 return tid_to_ac
[tid
];
1464 /* no support for TIDs 8-15 yet */
1469 il4965_get_fifo_from_tid(u16 tid
)
1471 const u8 ac_to_fifo
[] = {
1478 if (likely(tid
< ARRAY_SIZE(tid_to_ac
)))
1479 return ac_to_fifo
[tid_to_ac
[tid
]];
1481 /* no support for TIDs 8-15 yet */
1486 * handle build C_TX command notification.
1489 il4965_tx_cmd_build_basic(struct il_priv
*il
, struct sk_buff
*skb
,
1490 struct il_tx_cmd
*tx_cmd
,
1491 struct ieee80211_tx_info
*info
,
1492 struct ieee80211_hdr
*hdr
, u8 std_id
)
1494 __le16 fc
= hdr
->frame_control
;
1495 __le32 tx_flags
= tx_cmd
->tx_flags
;
1497 tx_cmd
->stop_time
.life_time
= TX_CMD_LIFE_TIME_INFINITE
;
1498 if (!(info
->flags
& IEEE80211_TX_CTL_NO_ACK
)) {
1499 tx_flags
|= TX_CMD_FLG_ACK_MSK
;
1500 if (ieee80211_is_mgmt(fc
))
1501 tx_flags
|= TX_CMD_FLG_SEQ_CTL_MSK
;
1502 if (ieee80211_is_probe_resp(fc
) &&
1503 !(le16_to_cpu(hdr
->seq_ctrl
) & 0xf))
1504 tx_flags
|= TX_CMD_FLG_TSF_MSK
;
1506 tx_flags
&= (~TX_CMD_FLG_ACK_MSK
);
1507 tx_flags
|= TX_CMD_FLG_SEQ_CTL_MSK
;
1510 if (ieee80211_is_back_req(fc
))
1511 tx_flags
|= TX_CMD_FLG_ACK_MSK
| TX_CMD_FLG_IMM_BA_RSP_MASK
;
1513 tx_cmd
->sta_id
= std_id
;
1514 if (ieee80211_has_morefrags(fc
))
1515 tx_flags
|= TX_CMD_FLG_MORE_FRAG_MSK
;
1517 if (ieee80211_is_data_qos(fc
)) {
1518 u8
*qc
= ieee80211_get_qos_ctl(hdr
);
1519 tx_cmd
->tid_tspec
= qc
[0] & 0xf;
1520 tx_flags
&= ~TX_CMD_FLG_SEQ_CTL_MSK
;
1522 tx_flags
|= TX_CMD_FLG_SEQ_CTL_MSK
;
1525 il_tx_cmd_protection(il
, info
, fc
, &tx_flags
);
1527 tx_flags
&= ~(TX_CMD_FLG_ANT_SEL_MSK
);
1528 if (ieee80211_is_mgmt(fc
)) {
1529 if (ieee80211_is_assoc_req(fc
) || ieee80211_is_reassoc_req(fc
))
1530 tx_cmd
->timeout
.pm_frame_timeout
= cpu_to_le16(3);
1532 tx_cmd
->timeout
.pm_frame_timeout
= cpu_to_le16(2);
1534 tx_cmd
->timeout
.pm_frame_timeout
= 0;
1537 tx_cmd
->driver_txop
= 0;
1538 tx_cmd
->tx_flags
= tx_flags
;
1539 tx_cmd
->next_frame_len
= 0;
1543 il4965_tx_cmd_build_rate(struct il_priv
*il
,
1544 struct il_tx_cmd
*tx_cmd
,
1545 struct ieee80211_tx_info
*info
,
1546 struct ieee80211_sta
*sta
,
1549 const u8 rts_retry_limit
= 60;
1552 u8 data_retry_limit
;
1555 /* Set retry limit on DATA packets and Probe Responses */
1556 if (ieee80211_is_probe_resp(fc
))
1557 data_retry_limit
= 3;
1559 data_retry_limit
= IL4965_DEFAULT_TX_RETRY
;
1560 tx_cmd
->data_retry_limit
= data_retry_limit
;
1561 /* Set retry limit on RTS packets */
1562 tx_cmd
->rts_retry_limit
= min(data_retry_limit
, rts_retry_limit
);
1564 /* DATA packets will use the uCode station table for rate/antenna
1566 if (ieee80211_is_data(fc
)) {
1567 tx_cmd
->initial_rate_idx
= 0;
1568 tx_cmd
->tx_flags
|= TX_CMD_FLG_STA_RATE_MSK
;
1573 * If the current TX rate stored in mac80211 has the MCS bit set, it's
1574 * not really a TX rate. Thus, we use the lowest supported rate for
1575 * this band. Also use the lowest supported rate if the stored rate
1578 rate_idx
= info
->control
.rates
[0].idx
;
1579 if ((info
->control
.rates
[0].flags
& IEEE80211_TX_RC_MCS
) || rate_idx
< 0
1580 || rate_idx
> RATE_COUNT_LEGACY
)
1581 rate_idx
= rate_lowest_index(&il
->bands
[info
->band
], sta
);
1582 /* For 5 GHZ band, remap mac80211 rate indices into driver indices */
1583 if (info
->band
== IEEE80211_BAND_5GHZ
)
1584 rate_idx
+= IL_FIRST_OFDM_RATE
;
1585 /* Get PLCP rate for tx_cmd->rate_n_flags */
1586 rate_plcp
= il_rates
[rate_idx
].plcp
;
1587 /* Zero out flags for this packet */
1590 /* Set CCK flag as needed */
1591 if (rate_idx
>= IL_FIRST_CCK_RATE
&& rate_idx
<= IL_LAST_CCK_RATE
)
1592 rate_flags
|= RATE_MCS_CCK_MSK
;
1594 /* Set up antennas */
1595 il4965_toggle_tx_ant(il
, &il
->mgmt_tx_ant
, il
->hw_params
.valid_tx_ant
);
1596 rate_flags
|= BIT(il
->mgmt_tx_ant
) << RATE_MCS_ANT_POS
;
1598 /* Set the rate in the TX cmd */
1599 tx_cmd
->rate_n_flags
= cpu_to_le32(rate_plcp
| rate_flags
);
1603 il4965_tx_cmd_build_hwcrypto(struct il_priv
*il
, struct ieee80211_tx_info
*info
,
1604 struct il_tx_cmd
*tx_cmd
, struct sk_buff
*skb_frag
,
1607 struct ieee80211_key_conf
*keyconf
= info
->control
.hw_key
;
1609 switch (keyconf
->cipher
) {
1610 case WLAN_CIPHER_SUITE_CCMP
:
1611 tx_cmd
->sec_ctl
= TX_CMD_SEC_CCM
;
1612 memcpy(tx_cmd
->key
, keyconf
->key
, keyconf
->keylen
);
1613 if (info
->flags
& IEEE80211_TX_CTL_AMPDU
)
1614 tx_cmd
->tx_flags
|= TX_CMD_FLG_AGG_CCMP_MSK
;
1615 D_TX("tx_cmd with AES hwcrypto\n");
1618 case WLAN_CIPHER_SUITE_TKIP
:
1619 tx_cmd
->sec_ctl
= TX_CMD_SEC_TKIP
;
1620 ieee80211_get_tkip_p2k(keyconf
, skb_frag
, tx_cmd
->key
);
1621 D_TX("tx_cmd with tkip hwcrypto\n");
1624 case WLAN_CIPHER_SUITE_WEP104
:
1625 tx_cmd
->sec_ctl
|= TX_CMD_SEC_KEY128
;
1627 case WLAN_CIPHER_SUITE_WEP40
:
1629 (TX_CMD_SEC_WEP
| (keyconf
->keyidx
& TX_CMD_SEC_MSK
) <<
1632 memcpy(&tx_cmd
->key
[3], keyconf
->key
, keyconf
->keylen
);
1634 D_TX("Configuring packet for WEP encryption " "with key %d\n",
1639 IL_ERR("Unknown encode cipher %x\n", keyconf
->cipher
);
1645 * start C_TX command process
1648 il4965_tx_skb(struct il_priv
*il
,
1649 struct ieee80211_sta
*sta
,
1650 struct sk_buff
*skb
)
1652 struct ieee80211_hdr
*hdr
= (struct ieee80211_hdr
*)skb
->data
;
1653 struct ieee80211_tx_info
*info
= IEEE80211_SKB_CB(skb
);
1654 struct il_station_priv
*sta_priv
= NULL
;
1655 struct il_tx_queue
*txq
;
1657 struct il_device_cmd
*out_cmd
;
1658 struct il_cmd_meta
*out_meta
;
1659 struct il_tx_cmd
*tx_cmd
;
1661 dma_addr_t phys_addr
;
1662 dma_addr_t txcmd_phys
;
1663 dma_addr_t scratch_phys
;
1664 u16 len
, firstlen
, secondlen
;
1669 u8 wait_write_ptr
= 0;
1672 unsigned long flags
;
1673 bool is_agg
= false;
1675 spin_lock_irqsave(&il
->lock
, flags
);
1676 if (il_is_rfkill(il
)) {
1677 D_DROP("Dropping - RF KILL\n");
1681 fc
= hdr
->frame_control
;
1683 #ifdef CONFIG_IWLEGACY_DEBUG
1684 if (ieee80211_is_auth(fc
))
1685 D_TX("Sending AUTH frame\n");
1686 else if (ieee80211_is_assoc_req(fc
))
1687 D_TX("Sending ASSOC frame\n");
1688 else if (ieee80211_is_reassoc_req(fc
))
1689 D_TX("Sending REASSOC frame\n");
1692 hdr_len
= ieee80211_hdrlen(fc
);
1694 /* For management frames use broadcast id to do not break aggregation */
1695 if (!ieee80211_is_data(fc
))
1696 sta_id
= il
->hw_params
.bcast_id
;
1698 /* Find idx into station table for destination station */
1699 sta_id
= il_sta_id_or_broadcast(il
, sta
);
1701 if (sta_id
== IL_INVALID_STATION
) {
1702 D_DROP("Dropping - INVALID STATION: %pM\n", hdr
->addr1
);
1707 D_TX("station Id %d\n", sta_id
);
1710 sta_priv
= (void *)sta
->drv_priv
;
1712 if (sta_priv
&& sta_priv
->asleep
&&
1713 (info
->flags
& IEEE80211_TX_CTL_NO_PS_BUFFER
)) {
1715 * This sends an asynchronous command to the device,
1716 * but we can rely on it being processed before the
1717 * next frame is processed -- and the next frame to
1718 * this station is the one that will consume this
1720 * For now set the counter to just 1 since we do not
1721 * support uAPSD yet.
1723 il4965_sta_modify_sleep_tx_count(il
, sta_id
, 1);
1726 /* FIXME: remove me ? */
1727 WARN_ON_ONCE(info
->flags
& IEEE80211_TX_CTL_SEND_AFTER_DTIM
);
1729 /* Access category (AC) is also the queue number */
1730 txq_id
= skb_get_queue_mapping(skb
);
1732 /* irqs already disabled/saved above when locking il->lock */
1733 spin_lock(&il
->sta_lock
);
1735 if (ieee80211_is_data_qos(fc
)) {
1736 qc
= ieee80211_get_qos_ctl(hdr
);
1737 tid
= qc
[0] & IEEE80211_QOS_CTL_TID_MASK
;
1738 if (WARN_ON_ONCE(tid
>= MAX_TID_COUNT
)) {
1739 spin_unlock(&il
->sta_lock
);
1742 seq_number
= il
->stations
[sta_id
].tid
[tid
].seq_number
;
1743 seq_number
&= IEEE80211_SCTL_SEQ
;
1745 hdr
->seq_ctrl
& cpu_to_le16(IEEE80211_SCTL_FRAG
);
1746 hdr
->seq_ctrl
|= cpu_to_le16(seq_number
);
1748 /* aggregation is on for this <sta,tid> */
1749 if (info
->flags
& IEEE80211_TX_CTL_AMPDU
&&
1750 il
->stations
[sta_id
].tid
[tid
].agg
.state
== IL_AGG_ON
) {
1751 txq_id
= il
->stations
[sta_id
].tid
[tid
].agg
.txq_id
;
1756 txq
= &il
->txq
[txq_id
];
1759 if (unlikely(il_queue_space(q
) < q
->high_mark
)) {
1760 spin_unlock(&il
->sta_lock
);
1764 if (ieee80211_is_data_qos(fc
)) {
1765 il
->stations
[sta_id
].tid
[tid
].tfds_in_queue
++;
1766 if (!ieee80211_has_morefrags(fc
))
1767 il
->stations
[sta_id
].tid
[tid
].seq_number
= seq_number
;
1770 spin_unlock(&il
->sta_lock
);
1772 txq
->skbs
[q
->write_ptr
] = skb
;
1774 /* Set up first empty entry in queue's array of Tx/cmd buffers */
1775 out_cmd
= txq
->cmd
[q
->write_ptr
];
1776 out_meta
= &txq
->meta
[q
->write_ptr
];
1777 tx_cmd
= &out_cmd
->cmd
.tx
;
1778 memset(&out_cmd
->hdr
, 0, sizeof(out_cmd
->hdr
));
1779 memset(tx_cmd
, 0, sizeof(struct il_tx_cmd
));
1782 * Set up the Tx-command (not MAC!) header.
1783 * Store the chosen Tx queue and TFD idx within the sequence field;
1784 * after Tx, uCode's Tx response will return this value so driver can
1785 * locate the frame within the tx queue and do post-tx processing.
1787 out_cmd
->hdr
.cmd
= C_TX
;
1788 out_cmd
->hdr
.sequence
=
1790 (QUEUE_TO_SEQ(txq_id
) | IDX_TO_SEQ(q
->write_ptr
)));
1792 /* Copy MAC header from skb into command buffer */
1793 memcpy(tx_cmd
->hdr
, hdr
, hdr_len
);
1795 /* Total # bytes to be transmitted */
1796 tx_cmd
->len
= cpu_to_le16((u16
) skb
->len
);
1798 if (info
->control
.hw_key
)
1799 il4965_tx_cmd_build_hwcrypto(il
, info
, tx_cmd
, skb
, sta_id
);
1801 /* TODO need this for burst mode later on */
1802 il4965_tx_cmd_build_basic(il
, skb
, tx_cmd
, info
, hdr
, sta_id
);
1804 il4965_tx_cmd_build_rate(il
, tx_cmd
, info
, sta
, fc
);
1807 * Use the first empty entry in this queue's command buffer array
1808 * to contain the Tx command and MAC header concatenated together
1809 * (payload data will be in another buffer).
1810 * Size of this varies, due to varying MAC header length.
1811 * If end is not dword aligned, we'll have 2 extra bytes at the end
1812 * of the MAC header (device reads on dword boundaries).
1813 * We'll tell device about this padding later.
1815 len
= sizeof(struct il_tx_cmd
) + sizeof(struct il_cmd_header
) + hdr_len
;
1816 firstlen
= (len
+ 3) & ~3;
1818 /* Tell NIC about any 2-byte padding after MAC header */
1819 if (firstlen
!= len
)
1820 tx_cmd
->tx_flags
|= TX_CMD_FLG_MH_PAD_MSK
;
1822 /* Physical address of this Tx command's header (not MAC header!),
1823 * within command buffer array. */
1825 pci_map_single(il
->pci_dev
, &out_cmd
->hdr
, firstlen
,
1826 PCI_DMA_BIDIRECTIONAL
);
1827 if (unlikely(pci_dma_mapping_error(il
->pci_dev
, txcmd_phys
)))
1830 /* Set up TFD's 2nd entry to point directly to remainder of skb,
1831 * if any (802.11 null frames have no payload). */
1832 secondlen
= skb
->len
- hdr_len
;
1833 if (secondlen
> 0) {
1835 pci_map_single(il
->pci_dev
, skb
->data
+ hdr_len
, secondlen
,
1837 if (unlikely(pci_dma_mapping_error(il
->pci_dev
, phys_addr
)))
1841 /* Add buffer containing Tx command and MAC(!) header to TFD's
1843 il
->ops
->txq_attach_buf_to_tfd(il
, txq
, txcmd_phys
, firstlen
, 1, 0);
1844 dma_unmap_addr_set(out_meta
, mapping
, txcmd_phys
);
1845 dma_unmap_len_set(out_meta
, len
, firstlen
);
1847 il
->ops
->txq_attach_buf_to_tfd(il
, txq
, phys_addr
, secondlen
,
1850 if (!ieee80211_has_morefrags(hdr
->frame_control
)) {
1851 txq
->need_update
= 1;
1854 txq
->need_update
= 0;
1858 txcmd_phys
+ sizeof(struct il_cmd_header
) +
1859 offsetof(struct il_tx_cmd
, scratch
);
1861 /* take back ownership of DMA buffer to enable update */
1862 pci_dma_sync_single_for_cpu(il
->pci_dev
, txcmd_phys
, firstlen
,
1863 PCI_DMA_BIDIRECTIONAL
);
1864 tx_cmd
->dram_lsb_ptr
= cpu_to_le32(scratch_phys
);
1865 tx_cmd
->dram_msb_ptr
= il_get_dma_hi_addr(scratch_phys
);
1867 il_update_stats(il
, true, fc
, skb
->len
);
1869 D_TX("sequence nr = 0X%x\n", le16_to_cpu(out_cmd
->hdr
.sequence
));
1870 D_TX("tx_flags = 0X%x\n", le32_to_cpu(tx_cmd
->tx_flags
));
1871 il_print_hex_dump(il
, IL_DL_TX
, (u8
*) tx_cmd
, sizeof(*tx_cmd
));
1872 il_print_hex_dump(il
, IL_DL_TX
, (u8
*) tx_cmd
->hdr
, hdr_len
);
1874 /* Set up entry for this TFD in Tx byte-count array */
1875 if (info
->flags
& IEEE80211_TX_CTL_AMPDU
)
1876 il
->ops
->txq_update_byte_cnt_tbl(il
, txq
, le16_to_cpu(tx_cmd
->len
));
1878 pci_dma_sync_single_for_device(il
->pci_dev
, txcmd_phys
, firstlen
,
1879 PCI_DMA_BIDIRECTIONAL
);
1881 /* Tell device the write idx *just past* this latest filled TFD */
1882 q
->write_ptr
= il_queue_inc_wrap(q
->write_ptr
, q
->n_bd
);
1883 il_txq_update_write_ptr(il
, txq
);
1884 spin_unlock_irqrestore(&il
->lock
, flags
);
1887 * At this point the frame is "transmitted" successfully
1888 * and we will get a TX status notification eventually,
1889 * regardless of the value of ret. "ret" only indicates
1890 * whether or not we should update the write pointer.
1894 * Avoid atomic ops if it isn't an associated client.
1895 * Also, if this is a packet for aggregation, don't
1896 * increase the counter because the ucode will stop
1897 * aggregation queues when their respective station
1900 if (sta_priv
&& sta_priv
->client
&& !is_agg
)
1901 atomic_inc(&sta_priv
->pending_frames
);
1903 if (il_queue_space(q
) < q
->high_mark
&& il
->mac80211_registered
) {
1904 if (wait_write_ptr
) {
1905 spin_lock_irqsave(&il
->lock
, flags
);
1906 txq
->need_update
= 1;
1907 il_txq_update_write_ptr(il
, txq
);
1908 spin_unlock_irqrestore(&il
->lock
, flags
);
1910 il_stop_queue(il
, txq
);
1917 spin_unlock_irqrestore(&il
->lock
, flags
);
1922 il4965_alloc_dma_ptr(struct il_priv
*il
, struct il_dma_ptr
*ptr
, size_t size
)
1924 ptr
->addr
= dma_alloc_coherent(&il
->pci_dev
->dev
, size
, &ptr
->dma
,
1933 il4965_free_dma_ptr(struct il_priv
*il
, struct il_dma_ptr
*ptr
)
1935 if (unlikely(!ptr
->addr
))
1938 dma_free_coherent(&il
->pci_dev
->dev
, ptr
->size
, ptr
->addr
, ptr
->dma
);
1939 memset(ptr
, 0, sizeof(*ptr
));
1943 * il4965_hw_txq_ctx_free - Free TXQ Context
1945 * Destroy all TX DMA queues and structures
1948 il4965_hw_txq_ctx_free(struct il_priv
*il
)
1954 for (txq_id
= 0; txq_id
< il
->hw_params
.max_txq_num
; txq_id
++)
1955 if (txq_id
== il
->cmd_queue
)
1956 il_cmd_queue_free(il
);
1958 il_tx_queue_free(il
, txq_id
);
1960 il4965_free_dma_ptr(il
, &il
->kw
);
1962 il4965_free_dma_ptr(il
, &il
->scd_bc_tbls
);
1964 /* free tx queue structure */
1965 il_free_txq_mem(il
);
1969 * il4965_txq_ctx_alloc - allocate TX queue context
1970 * Allocate all Tx DMA structures and initialize them
1973 * @return error code
1976 il4965_txq_ctx_alloc(struct il_priv
*il
)
1979 unsigned long flags
;
1981 /* Free all tx/cmd queues and keep-warm buffer */
1982 il4965_hw_txq_ctx_free(il
);
1985 il4965_alloc_dma_ptr(il
, &il
->scd_bc_tbls
,
1986 il
->hw_params
.scd_bc_tbls_size
);
1988 IL_ERR("Scheduler BC Table allocation failed\n");
1991 /* Alloc keep-warm buffer */
1992 ret
= il4965_alloc_dma_ptr(il
, &il
->kw
, IL_KW_SIZE
);
1994 IL_ERR("Keep Warm allocation failed\n");
1998 /* allocate tx queue structure */
1999 ret
= il_alloc_txq_mem(il
);
2003 spin_lock_irqsave(&il
->lock
, flags
);
2005 /* Turn off all Tx DMA fifos */
2006 il4965_txq_set_sched(il
, 0);
2008 /* Tell NIC where to find the "keep warm" buffer */
2009 il_wr(il
, FH49_KW_MEM_ADDR_REG
, il
->kw
.dma
>> 4);
2011 spin_unlock_irqrestore(&il
->lock
, flags
);
2013 /* Alloc and init all Tx queues, including the command queue (#4/#9) */
2014 for (txq_id
= 0; txq_id
< il
->hw_params
.max_txq_num
; txq_id
++) {
2015 ret
= il_tx_queue_init(il
, txq_id
);
2017 IL_ERR("Tx %d queue init failed\n", txq_id
);
2025 il4965_hw_txq_ctx_free(il
);
2026 il4965_free_dma_ptr(il
, &il
->kw
);
2028 il4965_free_dma_ptr(il
, &il
->scd_bc_tbls
);
2034 il4965_txq_ctx_reset(struct il_priv
*il
)
2037 unsigned long flags
;
2039 spin_lock_irqsave(&il
->lock
, flags
);
2041 /* Turn off all Tx DMA fifos */
2042 il4965_txq_set_sched(il
, 0);
2043 /* Tell NIC where to find the "keep warm" buffer */
2044 il_wr(il
, FH49_KW_MEM_ADDR_REG
, il
->kw
.dma
>> 4);
2046 spin_unlock_irqrestore(&il
->lock
, flags
);
2048 /* Alloc and init all Tx queues, including the command queue (#4) */
2049 for (txq_id
= 0; txq_id
< il
->hw_params
.max_txq_num
; txq_id
++)
2050 il_tx_queue_reset(il
, txq_id
);
2054 il4965_txq_ctx_unmap(struct il_priv
*il
)
2061 /* Unmap DMA from host system and free skb's */
2062 for (txq_id
= 0; txq_id
< il
->hw_params
.max_txq_num
; txq_id
++)
2063 if (txq_id
== il
->cmd_queue
)
2064 il_cmd_queue_unmap(il
);
2066 il_tx_queue_unmap(il
, txq_id
);
2070 * il4965_txq_ctx_stop - Stop all Tx DMA channels
2073 il4965_txq_ctx_stop(struct il_priv
*il
)
2077 _il_wr_prph(il
, IL49_SCD_TXFACT
, 0);
2079 /* Stop each Tx DMA channel, and wait for it to be idle */
2080 for (ch
= 0; ch
< il
->hw_params
.dma_chnl_num
; ch
++) {
2081 _il_wr(il
, FH49_TCSR_CHNL_TX_CONFIG_REG(ch
), 0x0);
2083 _il_poll_bit(il
, FH49_TSSR_TX_STATUS_REG
,
2084 FH49_TSSR_TX_STATUS_REG_MSK_CHNL_IDLE(ch
),
2085 FH49_TSSR_TX_STATUS_REG_MSK_CHNL_IDLE(ch
),
2088 IL_ERR("Timeout stopping DMA channel %d [0x%08x]",
2089 ch
, _il_rd(il
, FH49_TSSR_TX_STATUS_REG
));
2094 * Find first available (lowest unused) Tx Queue, mark it "active".
2095 * Called only when finding queue for aggregation.
2096 * Should never return anything < 7, because they should already
2097 * be in use as EDCA AC (0-3), Command (4), reserved (5, 6)
2100 il4965_txq_ctx_activate_free(struct il_priv
*il
)
2104 for (txq_id
= 0; txq_id
< il
->hw_params
.max_txq_num
; txq_id
++)
2105 if (!test_and_set_bit(txq_id
, &il
->txq_ctx_active_msk
))
2111 * il4965_tx_queue_stop_scheduler - Stop queue, but keep configuration
2114 il4965_tx_queue_stop_scheduler(struct il_priv
*il
, u16 txq_id
)
2116 /* Simply stop the queue, but don't change any configuration;
2117 * the SCD_ACT_EN bit is the write-enable mask for the ACTIVE bit. */
2118 il_wr_prph(il
, IL49_SCD_QUEUE_STATUS_BITS(txq_id
),
2119 (0 << IL49_SCD_QUEUE_STTS_REG_POS_ACTIVE
) |
2120 (1 << IL49_SCD_QUEUE_STTS_REG_POS_SCD_ACT_EN
));
2124 * il4965_tx_queue_set_q2ratid - Map unique receiver/tid combination to a queue
2127 il4965_tx_queue_set_q2ratid(struct il_priv
*il
, u16 ra_tid
, u16 txq_id
)
2133 scd_q2ratid
= ra_tid
& IL_SCD_QUEUE_RA_TID_MAP_RATID_MSK
;
2136 il
->scd_base_addr
+ IL49_SCD_TRANSLATE_TBL_OFFSET_QUEUE(txq_id
);
2138 tbl_dw
= il_read_targ_mem(il
, tbl_dw_addr
);
2141 tbl_dw
= (scd_q2ratid
<< 16) | (tbl_dw
& 0x0000FFFF);
2143 tbl_dw
= scd_q2ratid
| (tbl_dw
& 0xFFFF0000);
2145 il_write_targ_mem(il
, tbl_dw_addr
, tbl_dw
);
2151 * il4965_tx_queue_agg_enable - Set up & enable aggregation for selected queue
2153 * NOTE: txq_id must be greater than IL49_FIRST_AMPDU_QUEUE,
2154 * i.e. it must be one of the higher queues used for aggregation
2157 il4965_txq_agg_enable(struct il_priv
*il
, int txq_id
, int tx_fifo
, int sta_id
,
2158 int tid
, u16 ssn_idx
)
2160 unsigned long flags
;
2164 if ((IL49_FIRST_AMPDU_QUEUE
> txq_id
) ||
2165 (IL49_FIRST_AMPDU_QUEUE
+
2166 il
->cfg
->num_of_ampdu_queues
<= txq_id
)) {
2167 IL_WARN("queue number out of range: %d, must be %d to %d\n",
2168 txq_id
, IL49_FIRST_AMPDU_QUEUE
,
2169 IL49_FIRST_AMPDU_QUEUE
+
2170 il
->cfg
->num_of_ampdu_queues
- 1);
2174 ra_tid
= BUILD_RAxTID(sta_id
, tid
);
2176 /* Modify device's station table to Tx this TID */
2177 ret
= il4965_sta_tx_modify_enable_tid(il
, sta_id
, tid
);
2181 spin_lock_irqsave(&il
->lock
, flags
);
2183 /* Stop this Tx queue before configuring it */
2184 il4965_tx_queue_stop_scheduler(il
, txq_id
);
2186 /* Map receiver-address / traffic-ID to this queue */
2187 il4965_tx_queue_set_q2ratid(il
, ra_tid
, txq_id
);
2189 /* Set this queue as a chain-building queue */
2190 il_set_bits_prph(il
, IL49_SCD_QUEUECHAIN_SEL
, (1 << txq_id
));
2192 /* Place first TFD at idx corresponding to start sequence number.
2193 * Assumes that ssn_idx is valid (!= 0xFFF) */
2194 il
->txq
[txq_id
].q
.read_ptr
= (ssn_idx
& 0xff);
2195 il
->txq
[txq_id
].q
.write_ptr
= (ssn_idx
& 0xff);
2196 il4965_set_wr_ptrs(il
, txq_id
, ssn_idx
);
2198 /* Set up Tx win size and frame limit for this queue */
2199 il_write_targ_mem(il
,
2201 IL49_SCD_CONTEXT_QUEUE_OFFSET(txq_id
),
2202 (SCD_WIN_SIZE
<< IL49_SCD_QUEUE_CTX_REG1_WIN_SIZE_POS
)
2203 & IL49_SCD_QUEUE_CTX_REG1_WIN_SIZE_MSK
);
2205 il_write_targ_mem(il
,
2207 IL49_SCD_CONTEXT_QUEUE_OFFSET(txq_id
) + sizeof(u32
),
2209 IL49_SCD_QUEUE_CTX_REG2_FRAME_LIMIT_POS
) &
2210 IL49_SCD_QUEUE_CTX_REG2_FRAME_LIMIT_MSK
);
2212 il_set_bits_prph(il
, IL49_SCD_INTERRUPT_MASK
, (1 << txq_id
));
2214 /* Set up Status area in SRAM, map to Tx DMA/FIFO, activate the queue */
2215 il4965_tx_queue_set_status(il
, &il
->txq
[txq_id
], tx_fifo
, 1);
2217 spin_unlock_irqrestore(&il
->lock
, flags
);
2223 il4965_tx_agg_start(struct il_priv
*il
, struct ieee80211_vif
*vif
,
2224 struct ieee80211_sta
*sta
, u16 tid
, u16
* ssn
)
2230 unsigned long flags
;
2231 struct il_tid_data
*tid_data
;
2233 /* FIXME: warning if tx fifo not found ? */
2234 tx_fifo
= il4965_get_fifo_from_tid(tid
);
2235 if (unlikely(tx_fifo
< 0))
2238 D_HT("%s on ra = %pM tid = %d\n", __func__
, sta
->addr
, tid
);
2240 sta_id
= il_sta_id(sta
);
2241 if (sta_id
== IL_INVALID_STATION
) {
2242 IL_ERR("Start AGG on invalid station\n");
2245 if (unlikely(tid
>= MAX_TID_COUNT
))
2248 if (il
->stations
[sta_id
].tid
[tid
].agg
.state
!= IL_AGG_OFF
) {
2249 IL_ERR("Start AGG when state is not IL_AGG_OFF !\n");
2253 txq_id
= il4965_txq_ctx_activate_free(il
);
2255 IL_ERR("No free aggregation queue available\n");
2259 spin_lock_irqsave(&il
->sta_lock
, flags
);
2260 tid_data
= &il
->stations
[sta_id
].tid
[tid
];
2261 *ssn
= IEEE80211_SEQ_TO_SN(tid_data
->seq_number
);
2262 tid_data
->agg
.txq_id
= txq_id
;
2263 il_set_swq_id(&il
->txq
[txq_id
], il4965_get_ac_from_tid(tid
), txq_id
);
2264 spin_unlock_irqrestore(&il
->sta_lock
, flags
);
2266 ret
= il4965_txq_agg_enable(il
, txq_id
, tx_fifo
, sta_id
, tid
, *ssn
);
2270 spin_lock_irqsave(&il
->sta_lock
, flags
);
2271 tid_data
= &il
->stations
[sta_id
].tid
[tid
];
2272 if (tid_data
->tfds_in_queue
== 0) {
2273 D_HT("HW queue is empty\n");
2274 tid_data
->agg
.state
= IL_AGG_ON
;
2275 ieee80211_start_tx_ba_cb_irqsafe(vif
, sta
->addr
, tid
);
2277 D_HT("HW queue is NOT empty: %d packets in HW queue\n",
2278 tid_data
->tfds_in_queue
);
2279 tid_data
->agg
.state
= IL_EMPTYING_HW_QUEUE_ADDBA
;
2281 spin_unlock_irqrestore(&il
->sta_lock
, flags
);
2286 * txq_id must be greater than IL49_FIRST_AMPDU_QUEUE
2287 * il->lock must be held by the caller
2290 il4965_txq_agg_disable(struct il_priv
*il
, u16 txq_id
, u16 ssn_idx
, u8 tx_fifo
)
2292 if ((IL49_FIRST_AMPDU_QUEUE
> txq_id
) ||
2293 (IL49_FIRST_AMPDU_QUEUE
+
2294 il
->cfg
->num_of_ampdu_queues
<= txq_id
)) {
2295 IL_WARN("queue number out of range: %d, must be %d to %d\n",
2296 txq_id
, IL49_FIRST_AMPDU_QUEUE
,
2297 IL49_FIRST_AMPDU_QUEUE
+
2298 il
->cfg
->num_of_ampdu_queues
- 1);
2302 il4965_tx_queue_stop_scheduler(il
, txq_id
);
2304 il_clear_bits_prph(il
, IL49_SCD_QUEUECHAIN_SEL
, (1 << txq_id
));
2306 il
->txq
[txq_id
].q
.read_ptr
= (ssn_idx
& 0xff);
2307 il
->txq
[txq_id
].q
.write_ptr
= (ssn_idx
& 0xff);
2308 /* supposes that ssn_idx is valid (!= 0xFFF) */
2309 il4965_set_wr_ptrs(il
, txq_id
, ssn_idx
);
2311 il_clear_bits_prph(il
, IL49_SCD_INTERRUPT_MASK
, (1 << txq_id
));
2312 il_txq_ctx_deactivate(il
, txq_id
);
2313 il4965_tx_queue_set_status(il
, &il
->txq
[txq_id
], tx_fifo
, 0);
2319 il4965_tx_agg_stop(struct il_priv
*il
, struct ieee80211_vif
*vif
,
2320 struct ieee80211_sta
*sta
, u16 tid
)
2322 int tx_fifo_id
, txq_id
, sta_id
, ssn
;
2323 struct il_tid_data
*tid_data
;
2324 int write_ptr
, read_ptr
;
2325 unsigned long flags
;
2327 /* FIXME: warning if tx_fifo_id not found ? */
2328 tx_fifo_id
= il4965_get_fifo_from_tid(tid
);
2329 if (unlikely(tx_fifo_id
< 0))
2332 sta_id
= il_sta_id(sta
);
2334 if (sta_id
== IL_INVALID_STATION
) {
2335 IL_ERR("Invalid station for AGG tid %d\n", tid
);
2339 spin_lock_irqsave(&il
->sta_lock
, flags
);
2341 tid_data
= &il
->stations
[sta_id
].tid
[tid
];
2342 ssn
= (tid_data
->seq_number
& IEEE80211_SCTL_SEQ
) >> 4;
2343 txq_id
= tid_data
->agg
.txq_id
;
2345 switch (il
->stations
[sta_id
].tid
[tid
].agg
.state
) {
2346 case IL_EMPTYING_HW_QUEUE_ADDBA
:
2348 * This can happen if the peer stops aggregation
2349 * again before we've had a chance to drain the
2350 * queue we selected previously, i.e. before the
2351 * session was really started completely.
2353 D_HT("AGG stop before setup done\n");
2358 IL_WARN("Stopping AGG while state not ON or starting\n");
2361 write_ptr
= il
->txq
[txq_id
].q
.write_ptr
;
2362 read_ptr
= il
->txq
[txq_id
].q
.read_ptr
;
2364 /* The queue is not empty */
2365 if (write_ptr
!= read_ptr
) {
2366 D_HT("Stopping a non empty AGG HW QUEUE\n");
2367 il
->stations
[sta_id
].tid
[tid
].agg
.state
=
2368 IL_EMPTYING_HW_QUEUE_DELBA
;
2369 spin_unlock_irqrestore(&il
->sta_lock
, flags
);
2373 D_HT("HW queue is empty\n");
2375 il
->stations
[sta_id
].tid
[tid
].agg
.state
= IL_AGG_OFF
;
2377 /* do not restore/save irqs */
2378 spin_unlock(&il
->sta_lock
);
2379 spin_lock(&il
->lock
);
2382 * the only reason this call can fail is queue number out of range,
2383 * which can happen if uCode is reloaded and all the station
2384 * information are lost. if it is outside the range, there is no need
2385 * to deactivate the uCode queue, just return "success" to allow
2386 * mac80211 to clean up it own data.
2388 il4965_txq_agg_disable(il
, txq_id
, ssn
, tx_fifo_id
);
2389 spin_unlock_irqrestore(&il
->lock
, flags
);
2391 ieee80211_stop_tx_ba_cb_irqsafe(vif
, sta
->addr
, tid
);
2397 il4965_txq_check_empty(struct il_priv
*il
, int sta_id
, u8 tid
, int txq_id
)
2399 struct il_queue
*q
= &il
->txq
[txq_id
].q
;
2400 u8
*addr
= il
->stations
[sta_id
].sta
.sta
.addr
;
2401 struct il_tid_data
*tid_data
= &il
->stations
[sta_id
].tid
[tid
];
2403 lockdep_assert_held(&il
->sta_lock
);
2405 switch (il
->stations
[sta_id
].tid
[tid
].agg
.state
) {
2406 case IL_EMPTYING_HW_QUEUE_DELBA
:
2407 /* We are reclaiming the last packet of the */
2408 /* aggregated HW queue */
2409 if (txq_id
== tid_data
->agg
.txq_id
&&
2410 q
->read_ptr
== q
->write_ptr
) {
2411 u16 ssn
= IEEE80211_SEQ_TO_SN(tid_data
->seq_number
);
2412 int tx_fifo
= il4965_get_fifo_from_tid(tid
);
2413 D_HT("HW queue empty: continue DELBA flow\n");
2414 il4965_txq_agg_disable(il
, txq_id
, ssn
, tx_fifo
);
2415 tid_data
->agg
.state
= IL_AGG_OFF
;
2416 ieee80211_stop_tx_ba_cb_irqsafe(il
->vif
, addr
, tid
);
2419 case IL_EMPTYING_HW_QUEUE_ADDBA
:
2420 /* We are reclaiming the last packet of the queue */
2421 if (tid_data
->tfds_in_queue
== 0) {
2422 D_HT("HW queue empty: continue ADDBA flow\n");
2423 tid_data
->agg
.state
= IL_AGG_ON
;
2424 ieee80211_start_tx_ba_cb_irqsafe(il
->vif
, addr
, tid
);
2433 il4965_non_agg_tx_status(struct il_priv
*il
, const u8
*addr1
)
2435 struct ieee80211_sta
*sta
;
2436 struct il_station_priv
*sta_priv
;
2439 sta
= ieee80211_find_sta(il
->vif
, addr1
);
2441 sta_priv
= (void *)sta
->drv_priv
;
2442 /* avoid atomic ops if this isn't a client */
2443 if (sta_priv
->client
&&
2444 atomic_dec_return(&sta_priv
->pending_frames
) == 0)
2445 ieee80211_sta_block_awake(il
->hw
, sta
, false);
2451 il4965_tx_status(struct il_priv
*il
, struct sk_buff
*skb
, bool is_agg
)
2453 struct ieee80211_hdr
*hdr
= (struct ieee80211_hdr
*)skb
->data
;
2456 il4965_non_agg_tx_status(il
, hdr
->addr1
);
2458 ieee80211_tx_status_irqsafe(il
->hw
, skb
);
2462 il4965_tx_queue_reclaim(struct il_priv
*il
, int txq_id
, int idx
)
2464 struct il_tx_queue
*txq
= &il
->txq
[txq_id
];
2465 struct il_queue
*q
= &txq
->q
;
2467 struct ieee80211_hdr
*hdr
;
2468 struct sk_buff
*skb
;
2470 if (idx
>= q
->n_bd
|| il_queue_used(q
, idx
) == 0) {
2471 IL_ERR("Read idx for DMA queue txq id (%d), idx %d, "
2472 "is out of range [0-%d] %d %d.\n", txq_id
, idx
, q
->n_bd
,
2473 q
->write_ptr
, q
->read_ptr
);
2477 for (idx
= il_queue_inc_wrap(idx
, q
->n_bd
); q
->read_ptr
!= idx
;
2478 q
->read_ptr
= il_queue_inc_wrap(q
->read_ptr
, q
->n_bd
)) {
2480 skb
= txq
->skbs
[txq
->q
.read_ptr
];
2482 if (WARN_ON_ONCE(skb
== NULL
))
2485 hdr
= (struct ieee80211_hdr
*) skb
->data
;
2486 if (ieee80211_is_data_qos(hdr
->frame_control
))
2489 il4965_tx_status(il
, skb
, txq_id
>= IL4965_FIRST_AMPDU_QUEUE
);
2491 txq
->skbs
[txq
->q
.read_ptr
] = NULL
;
2492 il
->ops
->txq_free_tfd(il
, txq
);
2498 * il4965_tx_status_reply_compressed_ba - Update tx status from block-ack
2500 * Go through block-ack's bitmap of ACK'd frames, update driver's record of
2501 * ACK vs. not. This gets sent to mac80211, then to rate scaling algo.
2504 il4965_tx_status_reply_compressed_ba(struct il_priv
*il
, struct il_ht_agg
*agg
,
2505 struct il_compressed_ba_resp
*ba_resp
)
2508 u16 seq_ctl
= le16_to_cpu(ba_resp
->seq_ctl
);
2509 u16 scd_flow
= le16_to_cpu(ba_resp
->scd_flow
);
2511 struct ieee80211_tx_info
*info
;
2512 u64 bitmap
, sent_bitmap
;
2514 if (unlikely(!agg
->wait_for_ba
)) {
2515 if (unlikely(ba_resp
->bitmap
))
2516 IL_ERR("Received BA when not expected\n");
2520 /* Mark that the expected block-ack response arrived */
2521 agg
->wait_for_ba
= 0;
2522 D_TX_REPLY("BA %d %d\n", agg
->start_idx
, ba_resp
->seq_ctl
);
2524 /* Calculate shift to align block-ack bits with our Tx win bits */
2525 sh
= agg
->start_idx
- SEQ_TO_IDX(seq_ctl
>> 4);
2526 if (sh
< 0) /* tbw something is wrong with indices */
2529 if (agg
->frame_count
> (64 - sh
)) {
2530 D_TX_REPLY("more frames than bitmap size");
2534 /* don't use 64-bit values for now */
2535 bitmap
= le64_to_cpu(ba_resp
->bitmap
) >> sh
;
2537 /* check for success or failure according to the
2538 * transmitted bitmap and block-ack bitmap */
2539 sent_bitmap
= bitmap
& agg
->bitmap
;
2541 /* For each frame attempted in aggregation,
2542 * update driver's record of tx frame's status. */
2544 while (sent_bitmap
) {
2545 ack
= sent_bitmap
& 1ULL;
2547 D_TX_REPLY("%s ON i=%d idx=%d raw=%d\n", ack
? "ACK" : "NACK",
2548 i
, (agg
->start_idx
+ i
) & 0xff, agg
->start_idx
+ i
);
2553 D_TX_REPLY("Bitmap %llx\n", (unsigned long long)bitmap
);
2555 info
= IEEE80211_SKB_CB(il
->txq
[scd_flow
].skbs
[agg
->start_idx
]);
2556 memset(&info
->status
, 0, sizeof(info
->status
));
2557 info
->flags
|= IEEE80211_TX_STAT_ACK
;
2558 info
->flags
|= IEEE80211_TX_STAT_AMPDU
;
2559 info
->status
.ampdu_ack_len
= successes
;
2560 info
->status
.ampdu_len
= agg
->frame_count
;
2561 il4965_hwrate_to_tx_control(il
, agg
->rate_n_flags
, info
);
2567 il4965_is_tx_success(u32 status
)
2569 status
&= TX_STATUS_MSK
;
2570 return (status
== TX_STATUS_SUCCESS
|| status
== TX_STATUS_DIRECT_DONE
);
2574 il4965_find_station(struct il_priv
*il
, const u8
*addr
)
2578 int ret
= IL_INVALID_STATION
;
2579 unsigned long flags
;
2581 if (il
->iw_mode
== NL80211_IFTYPE_ADHOC
)
2584 if (is_broadcast_ether_addr(addr
))
2585 return il
->hw_params
.bcast_id
;
2587 spin_lock_irqsave(&il
->sta_lock
, flags
);
2588 for (i
= start
; i
< il
->hw_params
.max_stations
; i
++)
2589 if (il
->stations
[i
].used
&&
2590 ether_addr_equal(il
->stations
[i
].sta
.sta
.addr
, addr
)) {
2595 D_ASSOC("can not find STA %pM total %d\n", addr
, il
->num_stations
);
2599 * It may be possible that more commands interacting with stations
2600 * arrive before we completed processing the adding of
2603 if (ret
!= IL_INVALID_STATION
&&
2604 (!(il
->stations
[ret
].used
& IL_STA_UCODE_ACTIVE
) ||
2605 ((il
->stations
[ret
].used
& IL_STA_UCODE_ACTIVE
) &&
2606 (il
->stations
[ret
].used
& IL_STA_UCODE_INPROGRESS
)))) {
2607 IL_ERR("Requested station info for sta %d before ready.\n",
2609 ret
= IL_INVALID_STATION
;
2611 spin_unlock_irqrestore(&il
->sta_lock
, flags
);
2616 il4965_get_ra_sta_id(struct il_priv
*il
, struct ieee80211_hdr
*hdr
)
2618 if (il
->iw_mode
== NL80211_IFTYPE_STATION
)
2621 u8
*da
= ieee80211_get_DA(hdr
);
2623 return il4965_find_station(il
, da
);
2628 il4965_get_scd_ssn(struct il4965_tx_resp
*tx_resp
)
2630 return le32_to_cpup(&tx_resp
->u
.status
+
2631 tx_resp
->frame_count
) & IEEE80211_MAX_SN
;
2635 il4965_tx_status_to_mac80211(u32 status
)
2637 status
&= TX_STATUS_MSK
;
2640 case TX_STATUS_SUCCESS
:
2641 case TX_STATUS_DIRECT_DONE
:
2642 return IEEE80211_TX_STAT_ACK
;
2643 case TX_STATUS_FAIL_DEST_PS
:
2644 return IEEE80211_TX_STAT_TX_FILTERED
;
2651 * il4965_tx_status_reply_tx - Handle Tx response for frames in aggregation queue
2654 il4965_tx_status_reply_tx(struct il_priv
*il
, struct il_ht_agg
*agg
,
2655 struct il4965_tx_resp
*tx_resp
, int txq_id
,
2659 struct agg_tx_status
*frame_status
= tx_resp
->u
.agg_status
;
2660 struct ieee80211_tx_info
*info
= NULL
;
2661 struct ieee80211_hdr
*hdr
= NULL
;
2662 u32 rate_n_flags
= le32_to_cpu(tx_resp
->rate_n_flags
);
2665 if (agg
->wait_for_ba
)
2666 D_TX_REPLY("got tx response w/o block-ack\n");
2668 agg
->frame_count
= tx_resp
->frame_count
;
2669 agg
->start_idx
= start_idx
;
2670 agg
->rate_n_flags
= rate_n_flags
;
2673 /* num frames attempted by Tx command */
2674 if (agg
->frame_count
== 1) {
2675 /* Only one frame was attempted; no block-ack will arrive */
2676 status
= le16_to_cpu(frame_status
[0].status
);
2679 D_TX_REPLY("FrameCnt = %d, StartIdx=%d idx=%d\n",
2680 agg
->frame_count
, agg
->start_idx
, idx
);
2682 info
= IEEE80211_SKB_CB(il
->txq
[txq_id
].skbs
[idx
]);
2683 info
->status
.rates
[0].count
= tx_resp
->failure_frame
+ 1;
2684 info
->flags
&= ~IEEE80211_TX_CTL_AMPDU
;
2685 info
->flags
|= il4965_tx_status_to_mac80211(status
);
2686 il4965_hwrate_to_tx_control(il
, rate_n_flags
, info
);
2688 D_TX_REPLY("1 Frame 0x%x failure :%d\n", status
& 0xff,
2689 tx_resp
->failure_frame
);
2690 D_TX_REPLY("Rate Info rate_n_flags=%x\n", rate_n_flags
);
2692 agg
->wait_for_ba
= 0;
2694 /* Two or more frames were attempted; expect block-ack */
2696 int start
= agg
->start_idx
;
2697 struct sk_buff
*skb
;
2699 /* Construct bit-map of pending frames within Tx win */
2700 for (i
= 0; i
< agg
->frame_count
; i
++) {
2702 status
= le16_to_cpu(frame_status
[i
].status
);
2703 seq
= le16_to_cpu(frame_status
[i
].sequence
);
2704 idx
= SEQ_TO_IDX(seq
);
2705 txq_id
= SEQ_TO_QUEUE(seq
);
2708 (AGG_TX_STATE_FEW_BYTES_MSK
|
2709 AGG_TX_STATE_ABORT_MSK
))
2712 D_TX_REPLY("FrameCnt = %d, txq_id=%d idx=%d\n",
2713 agg
->frame_count
, txq_id
, idx
);
2715 skb
= il
->txq
[txq_id
].skbs
[idx
];
2716 if (WARN_ON_ONCE(skb
== NULL
))
2718 hdr
= (struct ieee80211_hdr
*) skb
->data
;
2720 sc
= le16_to_cpu(hdr
->seq_ctrl
);
2721 if (idx
!= (IEEE80211_SEQ_TO_SN(sc
) & 0xff)) {
2722 IL_ERR("BUG_ON idx doesn't match seq control"
2723 " idx=%d, seq_idx=%d, seq=%d\n", idx
,
2724 IEEE80211_SEQ_TO_SN(sc
), hdr
->seq_ctrl
);
2728 D_TX_REPLY("AGG Frame i=%d idx %d seq=%d\n", i
, idx
,
2729 IEEE80211_SEQ_TO_SN(sc
));
2733 sh
= (start
- idx
) + 0xff;
2734 bitmap
= bitmap
<< sh
;
2737 } else if (sh
< -64)
2738 sh
= 0xff - (start
- idx
);
2742 bitmap
= bitmap
<< sh
;
2745 bitmap
|= 1ULL << sh
;
2746 D_TX_REPLY("start=%d bitmap=0x%llx\n", start
,
2747 (unsigned long long)bitmap
);
2750 agg
->bitmap
= bitmap
;
2751 agg
->start_idx
= start
;
2752 D_TX_REPLY("Frames %d start_idx=%d bitmap=0x%llx\n",
2753 agg
->frame_count
, agg
->start_idx
,
2754 (unsigned long long)agg
->bitmap
);
2757 agg
->wait_for_ba
= 1;
2763 * il4965_hdl_tx - Handle standard (non-aggregation) Tx response
2766 il4965_hdl_tx(struct il_priv
*il
, struct il_rx_buf
*rxb
)
2768 struct il_rx_pkt
*pkt
= rxb_addr(rxb
);
2769 u16 sequence
= le16_to_cpu(pkt
->hdr
.sequence
);
2770 int txq_id
= SEQ_TO_QUEUE(sequence
);
2771 int idx
= SEQ_TO_IDX(sequence
);
2772 struct il_tx_queue
*txq
= &il
->txq
[txq_id
];
2773 struct sk_buff
*skb
;
2774 struct ieee80211_hdr
*hdr
;
2775 struct ieee80211_tx_info
*info
;
2776 struct il4965_tx_resp
*tx_resp
= (void *)&pkt
->u
.raw
[0];
2777 u32 status
= le32_to_cpu(tx_resp
->u
.status
);
2778 int uninitialized_var(tid
);
2782 unsigned long flags
;
2784 if (idx
>= txq
->q
.n_bd
|| il_queue_used(&txq
->q
, idx
) == 0) {
2785 IL_ERR("Read idx for DMA queue txq_id (%d) idx %d "
2786 "is out of range [0-%d] %d %d\n", txq_id
, idx
,
2787 txq
->q
.n_bd
, txq
->q
.write_ptr
, txq
->q
.read_ptr
);
2791 txq
->time_stamp
= jiffies
;
2793 skb
= txq
->skbs
[txq
->q
.read_ptr
];
2794 info
= IEEE80211_SKB_CB(skb
);
2795 memset(&info
->status
, 0, sizeof(info
->status
));
2797 hdr
= (struct ieee80211_hdr
*) skb
->data
;
2798 if (ieee80211_is_data_qos(hdr
->frame_control
)) {
2799 qc
= ieee80211_get_qos_ctl(hdr
);
2803 sta_id
= il4965_get_ra_sta_id(il
, hdr
);
2804 if (txq
->sched_retry
&& unlikely(sta_id
== IL_INVALID_STATION
)) {
2805 IL_ERR("Station not known\n");
2809 spin_lock_irqsave(&il
->sta_lock
, flags
);
2810 if (txq
->sched_retry
) {
2811 const u32 scd_ssn
= il4965_get_scd_ssn(tx_resp
);
2812 struct il_ht_agg
*agg
= NULL
;
2815 agg
= &il
->stations
[sta_id
].tid
[tid
].agg
;
2817 il4965_tx_status_reply_tx(il
, agg
, tx_resp
, txq_id
, idx
);
2819 /* check if BAR is needed */
2820 if (tx_resp
->frame_count
== 1 &&
2821 !il4965_is_tx_success(status
))
2822 info
->flags
|= IEEE80211_TX_STAT_AMPDU_NO_BACK
;
2824 if (txq
->q
.read_ptr
!= (scd_ssn
& 0xff)) {
2825 idx
= il_queue_dec_wrap(scd_ssn
& 0xff, txq
->q
.n_bd
);
2826 D_TX_REPLY("Retry scheduler reclaim scd_ssn "
2827 "%d idx %d\n", scd_ssn
, idx
);
2828 freed
= il4965_tx_queue_reclaim(il
, txq_id
, idx
);
2830 il4965_free_tfds_in_queue(il
, sta_id
, tid
,
2833 if (il
->mac80211_registered
&&
2834 il_queue_space(&txq
->q
) > txq
->q
.low_mark
&&
2835 agg
->state
!= IL_EMPTYING_HW_QUEUE_DELBA
)
2836 il_wake_queue(il
, txq
);
2839 info
->status
.rates
[0].count
= tx_resp
->failure_frame
+ 1;
2840 info
->flags
|= il4965_tx_status_to_mac80211(status
);
2841 il4965_hwrate_to_tx_control(il
,
2842 le32_to_cpu(tx_resp
->rate_n_flags
),
2845 D_TX_REPLY("TXQ %d status %s (0x%08x) "
2846 "rate_n_flags 0x%x retries %d\n", txq_id
,
2847 il4965_get_tx_fail_reason(status
), status
,
2848 le32_to_cpu(tx_resp
->rate_n_flags
),
2849 tx_resp
->failure_frame
);
2851 freed
= il4965_tx_queue_reclaim(il
, txq_id
, idx
);
2852 if (qc
&& likely(sta_id
!= IL_INVALID_STATION
))
2853 il4965_free_tfds_in_queue(il
, sta_id
, tid
, freed
);
2854 else if (sta_id
== IL_INVALID_STATION
)
2855 D_TX_REPLY("Station not known\n");
2857 if (il
->mac80211_registered
&&
2858 il_queue_space(&txq
->q
) > txq
->q
.low_mark
)
2859 il_wake_queue(il
, txq
);
2861 if (qc
&& likely(sta_id
!= IL_INVALID_STATION
))
2862 il4965_txq_check_empty(il
, sta_id
, tid
, txq_id
);
2864 il4965_check_abort_status(il
, tx_resp
->frame_count
, status
);
2866 spin_unlock_irqrestore(&il
->sta_lock
, flags
);
2870 * translate ucode response to mac80211 tx status control values
2873 il4965_hwrate_to_tx_control(struct il_priv
*il
, u32 rate_n_flags
,
2874 struct ieee80211_tx_info
*info
)
2876 struct ieee80211_tx_rate
*r
= &info
->status
.rates
[0];
2878 info
->status
.antenna
=
2879 ((rate_n_flags
& RATE_MCS_ANT_ABC_MSK
) >> RATE_MCS_ANT_POS
);
2880 if (rate_n_flags
& RATE_MCS_HT_MSK
)
2881 r
->flags
|= IEEE80211_TX_RC_MCS
;
2882 if (rate_n_flags
& RATE_MCS_GF_MSK
)
2883 r
->flags
|= IEEE80211_TX_RC_GREEN_FIELD
;
2884 if (rate_n_flags
& RATE_MCS_HT40_MSK
)
2885 r
->flags
|= IEEE80211_TX_RC_40_MHZ_WIDTH
;
2886 if (rate_n_flags
& RATE_MCS_DUP_MSK
)
2887 r
->flags
|= IEEE80211_TX_RC_DUP_DATA
;
2888 if (rate_n_flags
& RATE_MCS_SGI_MSK
)
2889 r
->flags
|= IEEE80211_TX_RC_SHORT_GI
;
2890 r
->idx
= il4965_hwrate_to_mac80211_idx(rate_n_flags
, info
->band
);
2894 * il4965_hdl_compressed_ba - Handler for N_COMPRESSED_BA
2896 * Handles block-acknowledge notification from device, which reports success
2897 * of frames sent via aggregation.
2900 il4965_hdl_compressed_ba(struct il_priv
*il
, struct il_rx_buf
*rxb
)
2902 struct il_rx_pkt
*pkt
= rxb_addr(rxb
);
2903 struct il_compressed_ba_resp
*ba_resp
= &pkt
->u
.compressed_ba
;
2904 struct il_tx_queue
*txq
= NULL
;
2905 struct il_ht_agg
*agg
;
2909 unsigned long flags
;
2911 /* "flow" corresponds to Tx queue */
2912 u16 scd_flow
= le16_to_cpu(ba_resp
->scd_flow
);
2914 /* "ssn" is start of block-ack Tx win, corresponds to idx
2915 * (in Tx queue's circular buffer) of first TFD/frame in win */
2916 u16 ba_resp_scd_ssn
= le16_to_cpu(ba_resp
->scd_ssn
);
2918 if (scd_flow
>= il
->hw_params
.max_txq_num
) {
2919 IL_ERR("BUG_ON scd_flow is bigger than number of queues\n");
2923 txq
= &il
->txq
[scd_flow
];
2924 sta_id
= ba_resp
->sta_id
;
2926 agg
= &il
->stations
[sta_id
].tid
[tid
].agg
;
2927 if (unlikely(agg
->txq_id
!= scd_flow
)) {
2929 * FIXME: this is a uCode bug which need to be addressed,
2930 * log the information and return for now!
2931 * since it is possible happen very often and in order
2932 * not to fill the syslog, don't enable the logging by default
2934 D_TX_REPLY("BA scd_flow %d does not match txq_id %d\n",
2935 scd_flow
, agg
->txq_id
);
2939 /* Find idx just before block-ack win */
2940 idx
= il_queue_dec_wrap(ba_resp_scd_ssn
& 0xff, txq
->q
.n_bd
);
2942 spin_lock_irqsave(&il
->sta_lock
, flags
);
2944 D_TX_REPLY("N_COMPRESSED_BA [%d] Received from %pM, " "sta_id = %d\n",
2945 agg
->wait_for_ba
, (u8
*) &ba_resp
->sta_addr_lo32
,
2947 D_TX_REPLY("TID = %d, SeqCtl = %d, bitmap = 0x%llx," "scd_flow = "
2948 "%d, scd_ssn = %d\n", ba_resp
->tid
, ba_resp
->seq_ctl
,
2949 (unsigned long long)le64_to_cpu(ba_resp
->bitmap
),
2950 ba_resp
->scd_flow
, ba_resp
->scd_ssn
);
2951 D_TX_REPLY("DAT start_idx = %d, bitmap = 0x%llx\n", agg
->start_idx
,
2952 (unsigned long long)agg
->bitmap
);
2954 /* Update driver's record of ACK vs. not for each frame in win */
2955 il4965_tx_status_reply_compressed_ba(il
, agg
, ba_resp
);
2957 /* Release all TFDs before the SSN, i.e. all TFDs in front of
2958 * block-ack win (we assume that they've been successfully
2959 * transmitted ... if not, it's too late anyway). */
2960 if (txq
->q
.read_ptr
!= (ba_resp_scd_ssn
& 0xff)) {
2961 /* calculate mac80211 ampdu sw queue to wake */
2962 int freed
= il4965_tx_queue_reclaim(il
, scd_flow
, idx
);
2963 il4965_free_tfds_in_queue(il
, sta_id
, tid
, freed
);
2965 if (il_queue_space(&txq
->q
) > txq
->q
.low_mark
&&
2966 il
->mac80211_registered
&&
2967 agg
->state
!= IL_EMPTYING_HW_QUEUE_DELBA
)
2968 il_wake_queue(il
, txq
);
2970 il4965_txq_check_empty(il
, sta_id
, tid
, scd_flow
);
2973 spin_unlock_irqrestore(&il
->sta_lock
, flags
);
2976 #ifdef CONFIG_IWLEGACY_DEBUG
2978 il4965_get_tx_fail_reason(u32 status
)
2980 #define TX_STATUS_FAIL(x) case TX_STATUS_FAIL_ ## x: return #x
2981 #define TX_STATUS_POSTPONE(x) case TX_STATUS_POSTPONE_ ## x: return #x
2983 switch (status
& TX_STATUS_MSK
) {
2984 case TX_STATUS_SUCCESS
:
2986 TX_STATUS_POSTPONE(DELAY
);
2987 TX_STATUS_POSTPONE(FEW_BYTES
);
2988 TX_STATUS_POSTPONE(QUIET_PERIOD
);
2989 TX_STATUS_POSTPONE(CALC_TTAK
);
2990 TX_STATUS_FAIL(INTERNAL_CROSSED_RETRY
);
2991 TX_STATUS_FAIL(SHORT_LIMIT
);
2992 TX_STATUS_FAIL(LONG_LIMIT
);
2993 TX_STATUS_FAIL(FIFO_UNDERRUN
);
2994 TX_STATUS_FAIL(DRAIN_FLOW
);
2995 TX_STATUS_FAIL(RFKILL_FLUSH
);
2996 TX_STATUS_FAIL(LIFE_EXPIRE
);
2997 TX_STATUS_FAIL(DEST_PS
);
2998 TX_STATUS_FAIL(HOST_ABORTED
);
2999 TX_STATUS_FAIL(BT_RETRY
);
3000 TX_STATUS_FAIL(STA_INVALID
);
3001 TX_STATUS_FAIL(FRAG_DROPPED
);
3002 TX_STATUS_FAIL(TID_DISABLE
);
3003 TX_STATUS_FAIL(FIFO_FLUSHED
);
3004 TX_STATUS_FAIL(INSUFFICIENT_CF_POLL
);
3005 TX_STATUS_FAIL(PASSIVE_NO_RX
);
3006 TX_STATUS_FAIL(NO_BEACON_ON_RADAR
);
3011 #undef TX_STATUS_FAIL
3012 #undef TX_STATUS_POSTPONE
3014 #endif /* CONFIG_IWLEGACY_DEBUG */
3016 static struct il_link_quality_cmd
*
3017 il4965_sta_alloc_lq(struct il_priv
*il
, u8 sta_id
)
3020 struct il_link_quality_cmd
*link_cmd
;
3022 __le32 rate_n_flags
;
3024 link_cmd
= kzalloc(sizeof(struct il_link_quality_cmd
), GFP_KERNEL
);
3026 IL_ERR("Unable to allocate memory for LQ cmd.\n");
3029 /* Set up the rate scaling to start at selected rate, fall back
3030 * all the way down to 1M in IEEE order, and then spin on 1M */
3031 if (il
->band
== IEEE80211_BAND_5GHZ
)
3036 if (r
>= IL_FIRST_CCK_RATE
&& r
<= IL_LAST_CCK_RATE
)
3037 rate_flags
|= RATE_MCS_CCK_MSK
;
3040 il4965_first_antenna(il
->hw_params
.
3041 valid_tx_ant
) << RATE_MCS_ANT_POS
;
3042 rate_n_flags
= cpu_to_le32(il_rates
[r
].plcp
| rate_flags
);
3043 for (i
= 0; i
< LINK_QUAL_MAX_RETRY_NUM
; i
++)
3044 link_cmd
->rs_table
[i
].rate_n_flags
= rate_n_flags
;
3046 link_cmd
->general_params
.single_stream_ant_msk
=
3047 il4965_first_antenna(il
->hw_params
.valid_tx_ant
);
3049 link_cmd
->general_params
.dual_stream_ant_msk
=
3050 il
->hw_params
.valid_tx_ant
& ~il4965_first_antenna(il
->hw_params
.
3052 if (!link_cmd
->general_params
.dual_stream_ant_msk
) {
3053 link_cmd
->general_params
.dual_stream_ant_msk
= ANT_AB
;
3054 } else if (il4965_num_of_ant(il
->hw_params
.valid_tx_ant
) == 2) {
3055 link_cmd
->general_params
.dual_stream_ant_msk
=
3056 il
->hw_params
.valid_tx_ant
;
3059 link_cmd
->agg_params
.agg_dis_start_th
= LINK_QUAL_AGG_DISABLE_START_DEF
;
3060 link_cmd
->agg_params
.agg_time_limit
=
3061 cpu_to_le16(LINK_QUAL_AGG_TIME_LIMIT_DEF
);
3063 link_cmd
->sta_id
= sta_id
;
3069 * il4965_add_bssid_station - Add the special IBSS BSSID station
3074 il4965_add_bssid_station(struct il_priv
*il
, const u8
*addr
, u8
*sta_id_r
)
3078 struct il_link_quality_cmd
*link_cmd
;
3079 unsigned long flags
;
3082 *sta_id_r
= IL_INVALID_STATION
;
3084 ret
= il_add_station_common(il
, addr
, 0, NULL
, &sta_id
);
3086 IL_ERR("Unable to add station %pM\n", addr
);
3093 spin_lock_irqsave(&il
->sta_lock
, flags
);
3094 il
->stations
[sta_id
].used
|= IL_STA_LOCAL
;
3095 spin_unlock_irqrestore(&il
->sta_lock
, flags
);
3097 /* Set up default rate scaling table in device's station table */
3098 link_cmd
= il4965_sta_alloc_lq(il
, sta_id
);
3100 IL_ERR("Unable to initialize rate scaling for station %pM.\n",
3105 ret
= il_send_lq_cmd(il
, link_cmd
, CMD_SYNC
, true);
3107 IL_ERR("Link quality command failed (%d)\n", ret
);
3109 spin_lock_irqsave(&il
->sta_lock
, flags
);
3110 il
->stations
[sta_id
].lq
= link_cmd
;
3111 spin_unlock_irqrestore(&il
->sta_lock
, flags
);
3117 il4965_static_wepkey_cmd(struct il_priv
*il
, bool send_if_empty
)
3120 u8 buff
[sizeof(struct il_wep_cmd
) +
3121 sizeof(struct il_wep_key
) * WEP_KEYS_MAX
];
3122 struct il_wep_cmd
*wep_cmd
= (struct il_wep_cmd
*)buff
;
3123 size_t cmd_size
= sizeof(struct il_wep_cmd
);
3124 struct il_host_cmd cmd
= {
3129 bool not_empty
= false;
3134 cmd_size
+ (sizeof(struct il_wep_key
) * WEP_KEYS_MAX
));
3136 for (i
= 0; i
< WEP_KEYS_MAX
; i
++) {
3137 u8 key_size
= il
->_4965
.wep_keys
[i
].key_size
;
3139 wep_cmd
->key
[i
].key_idx
= i
;
3141 wep_cmd
->key
[i
].key_offset
= i
;
3144 wep_cmd
->key
[i
].key_offset
= WEP_INVALID_OFFSET
;
3146 wep_cmd
->key
[i
].key_size
= key_size
;
3147 memcpy(&wep_cmd
->key
[i
].key
[3], il
->_4965
.wep_keys
[i
].key
, key_size
);
3150 wep_cmd
->global_key_type
= WEP_KEY_WEP_TYPE
;
3151 wep_cmd
->num_keys
= WEP_KEYS_MAX
;
3153 cmd_size
+= sizeof(struct il_wep_key
) * WEP_KEYS_MAX
;
3156 if (not_empty
|| send_if_empty
)
3157 return il_send_cmd(il
, &cmd
);
3163 il4965_restore_default_wep_keys(struct il_priv
*il
)
3165 lockdep_assert_held(&il
->mutex
);
3167 return il4965_static_wepkey_cmd(il
, false);
3171 il4965_remove_default_wep_key(struct il_priv
*il
,
3172 struct ieee80211_key_conf
*keyconf
)
3175 int idx
= keyconf
->keyidx
;
3177 lockdep_assert_held(&il
->mutex
);
3179 D_WEP("Removing default WEP key: idx=%d\n", idx
);
3181 memset(&il
->_4965
.wep_keys
[idx
], 0, sizeof(struct il_wep_key
));
3182 if (il_is_rfkill(il
)) {
3183 D_WEP("Not sending C_WEPKEY command due to RFKILL.\n");
3184 /* but keys in device are clear anyway so return success */
3187 ret
= il4965_static_wepkey_cmd(il
, 1);
3188 D_WEP("Remove default WEP key: idx=%d ret=%d\n", idx
, ret
);
3194 il4965_set_default_wep_key(struct il_priv
*il
,
3195 struct ieee80211_key_conf
*keyconf
)
3198 int len
= keyconf
->keylen
;
3199 int idx
= keyconf
->keyidx
;
3201 lockdep_assert_held(&il
->mutex
);
3203 if (len
!= WEP_KEY_LEN_128
&& len
!= WEP_KEY_LEN_64
) {
3204 D_WEP("Bad WEP key length %d\n", keyconf
->keylen
);
3208 keyconf
->flags
&= ~IEEE80211_KEY_FLAG_GENERATE_IV
;
3209 keyconf
->hw_key_idx
= HW_KEY_DEFAULT
;
3210 il
->stations
[IL_AP_ID
].keyinfo
.cipher
= keyconf
->cipher
;
3212 il
->_4965
.wep_keys
[idx
].key_size
= len
;
3213 memcpy(&il
->_4965
.wep_keys
[idx
].key
, &keyconf
->key
, len
);
3215 ret
= il4965_static_wepkey_cmd(il
, false);
3217 D_WEP("Set default WEP key: len=%d idx=%d ret=%d\n", len
, idx
, ret
);
3222 il4965_set_wep_dynamic_key_info(struct il_priv
*il
,
3223 struct ieee80211_key_conf
*keyconf
, u8 sta_id
)
3225 unsigned long flags
;
3226 __le16 key_flags
= 0;
3227 struct il_addsta_cmd sta_cmd
;
3229 lockdep_assert_held(&il
->mutex
);
3231 keyconf
->flags
&= ~IEEE80211_KEY_FLAG_GENERATE_IV
;
3233 key_flags
|= (STA_KEY_FLG_WEP
| STA_KEY_FLG_MAP_KEY_MSK
);
3234 key_flags
|= cpu_to_le16(keyconf
->keyidx
<< STA_KEY_FLG_KEYID_POS
);
3235 key_flags
&= ~STA_KEY_FLG_INVALID
;
3237 if (keyconf
->keylen
== WEP_KEY_LEN_128
)
3238 key_flags
|= STA_KEY_FLG_KEY_SIZE_MSK
;
3240 if (sta_id
== il
->hw_params
.bcast_id
)
3241 key_flags
|= STA_KEY_MULTICAST_MSK
;
3243 spin_lock_irqsave(&il
->sta_lock
, flags
);
3245 il
->stations
[sta_id
].keyinfo
.cipher
= keyconf
->cipher
;
3246 il
->stations
[sta_id
].keyinfo
.keylen
= keyconf
->keylen
;
3247 il
->stations
[sta_id
].keyinfo
.keyidx
= keyconf
->keyidx
;
3249 memcpy(il
->stations
[sta_id
].keyinfo
.key
, keyconf
->key
, keyconf
->keylen
);
3251 memcpy(&il
->stations
[sta_id
].sta
.key
.key
[3], keyconf
->key
,
3254 if ((il
->stations
[sta_id
].sta
.key
.
3255 key_flags
& STA_KEY_FLG_ENCRYPT_MSK
) == STA_KEY_FLG_NO_ENC
)
3256 il
->stations
[sta_id
].sta
.key
.key_offset
=
3257 il_get_free_ucode_key_idx(il
);
3258 /* else, we are overriding an existing key => no need to allocated room
3261 WARN(il
->stations
[sta_id
].sta
.key
.key_offset
== WEP_INVALID_OFFSET
,
3262 "no space for a new key");
3264 il
->stations
[sta_id
].sta
.key
.key_flags
= key_flags
;
3265 il
->stations
[sta_id
].sta
.sta
.modify_mask
= STA_MODIFY_KEY_MASK
;
3266 il
->stations
[sta_id
].sta
.mode
= STA_CONTROL_MODIFY_MSK
;
3268 memcpy(&sta_cmd
, &il
->stations
[sta_id
].sta
,
3269 sizeof(struct il_addsta_cmd
));
3270 spin_unlock_irqrestore(&il
->sta_lock
, flags
);
3272 return il_send_add_sta(il
, &sta_cmd
, CMD_SYNC
);
3276 il4965_set_ccmp_dynamic_key_info(struct il_priv
*il
,
3277 struct ieee80211_key_conf
*keyconf
, u8 sta_id
)
3279 unsigned long flags
;
3280 __le16 key_flags
= 0;
3281 struct il_addsta_cmd sta_cmd
;
3283 lockdep_assert_held(&il
->mutex
);
3285 key_flags
|= (STA_KEY_FLG_CCMP
| STA_KEY_FLG_MAP_KEY_MSK
);
3286 key_flags
|= cpu_to_le16(keyconf
->keyidx
<< STA_KEY_FLG_KEYID_POS
);
3287 key_flags
&= ~STA_KEY_FLG_INVALID
;
3289 if (sta_id
== il
->hw_params
.bcast_id
)
3290 key_flags
|= STA_KEY_MULTICAST_MSK
;
3292 keyconf
->flags
|= IEEE80211_KEY_FLAG_GENERATE_IV
;
3294 spin_lock_irqsave(&il
->sta_lock
, flags
);
3295 il
->stations
[sta_id
].keyinfo
.cipher
= keyconf
->cipher
;
3296 il
->stations
[sta_id
].keyinfo
.keylen
= keyconf
->keylen
;
3298 memcpy(il
->stations
[sta_id
].keyinfo
.key
, keyconf
->key
, keyconf
->keylen
);
3300 memcpy(il
->stations
[sta_id
].sta
.key
.key
, keyconf
->key
, keyconf
->keylen
);
3302 if ((il
->stations
[sta_id
].sta
.key
.
3303 key_flags
& STA_KEY_FLG_ENCRYPT_MSK
) == STA_KEY_FLG_NO_ENC
)
3304 il
->stations
[sta_id
].sta
.key
.key_offset
=
3305 il_get_free_ucode_key_idx(il
);
3306 /* else, we are overriding an existing key => no need to allocated room
3309 WARN(il
->stations
[sta_id
].sta
.key
.key_offset
== WEP_INVALID_OFFSET
,
3310 "no space for a new key");
3312 il
->stations
[sta_id
].sta
.key
.key_flags
= key_flags
;
3313 il
->stations
[sta_id
].sta
.sta
.modify_mask
= STA_MODIFY_KEY_MASK
;
3314 il
->stations
[sta_id
].sta
.mode
= STA_CONTROL_MODIFY_MSK
;
3316 memcpy(&sta_cmd
, &il
->stations
[sta_id
].sta
,
3317 sizeof(struct il_addsta_cmd
));
3318 spin_unlock_irqrestore(&il
->sta_lock
, flags
);
3320 return il_send_add_sta(il
, &sta_cmd
, CMD_SYNC
);
3324 il4965_set_tkip_dynamic_key_info(struct il_priv
*il
,
3325 struct ieee80211_key_conf
*keyconf
, u8 sta_id
)
3327 unsigned long flags
;
3329 __le16 key_flags
= 0;
3331 key_flags
|= (STA_KEY_FLG_TKIP
| STA_KEY_FLG_MAP_KEY_MSK
);
3332 key_flags
|= cpu_to_le16(keyconf
->keyidx
<< STA_KEY_FLG_KEYID_POS
);
3333 key_flags
&= ~STA_KEY_FLG_INVALID
;
3335 if (sta_id
== il
->hw_params
.bcast_id
)
3336 key_flags
|= STA_KEY_MULTICAST_MSK
;
3338 keyconf
->flags
|= IEEE80211_KEY_FLAG_GENERATE_IV
;
3339 keyconf
->flags
|= IEEE80211_KEY_FLAG_GENERATE_MMIC
;
3341 spin_lock_irqsave(&il
->sta_lock
, flags
);
3343 il
->stations
[sta_id
].keyinfo
.cipher
= keyconf
->cipher
;
3344 il
->stations
[sta_id
].keyinfo
.keylen
= 16;
3346 if ((il
->stations
[sta_id
].sta
.key
.
3347 key_flags
& STA_KEY_FLG_ENCRYPT_MSK
) == STA_KEY_FLG_NO_ENC
)
3348 il
->stations
[sta_id
].sta
.key
.key_offset
=
3349 il_get_free_ucode_key_idx(il
);
3350 /* else, we are overriding an existing key => no need to allocated room
3353 WARN(il
->stations
[sta_id
].sta
.key
.key_offset
== WEP_INVALID_OFFSET
,
3354 "no space for a new key");
3356 il
->stations
[sta_id
].sta
.key
.key_flags
= key_flags
;
3358 /* This copy is acutally not needed: we get the key with each TX */
3359 memcpy(il
->stations
[sta_id
].keyinfo
.key
, keyconf
->key
, 16);
3361 memcpy(il
->stations
[sta_id
].sta
.key
.key
, keyconf
->key
, 16);
3363 spin_unlock_irqrestore(&il
->sta_lock
, flags
);
3369 il4965_update_tkip_key(struct il_priv
*il
, struct ieee80211_key_conf
*keyconf
,
3370 struct ieee80211_sta
*sta
, u32 iv32
, u16
*phase1key
)
3373 unsigned long flags
;
3376 if (il_scan_cancel(il
)) {
3377 /* cancel scan failed, just live w/ bad key and rely
3378 briefly on SW decryption */
3382 sta_id
= il_sta_id_or_broadcast(il
, sta
);
3383 if (sta_id
== IL_INVALID_STATION
)
3386 spin_lock_irqsave(&il
->sta_lock
, flags
);
3388 il
->stations
[sta_id
].sta
.key
.tkip_rx_tsc_byte2
= (u8
) iv32
;
3390 for (i
= 0; i
< 5; i
++)
3391 il
->stations
[sta_id
].sta
.key
.tkip_rx_ttak
[i
] =
3392 cpu_to_le16(phase1key
[i
]);
3394 il
->stations
[sta_id
].sta
.sta
.modify_mask
= STA_MODIFY_KEY_MASK
;
3395 il
->stations
[sta_id
].sta
.mode
= STA_CONTROL_MODIFY_MSK
;
3397 il_send_add_sta(il
, &il
->stations
[sta_id
].sta
, CMD_ASYNC
);
3399 spin_unlock_irqrestore(&il
->sta_lock
, flags
);
3403 il4965_remove_dynamic_key(struct il_priv
*il
,
3404 struct ieee80211_key_conf
*keyconf
, u8 sta_id
)
3406 unsigned long flags
;
3409 struct il_addsta_cmd sta_cmd
;
3411 lockdep_assert_held(&il
->mutex
);
3413 il
->_4965
.key_mapping_keys
--;
3415 spin_lock_irqsave(&il
->sta_lock
, flags
);
3416 key_flags
= le16_to_cpu(il
->stations
[sta_id
].sta
.key
.key_flags
);
3417 keyidx
= (key_flags
>> STA_KEY_FLG_KEYID_POS
) & 0x3;
3419 D_WEP("Remove dynamic key: idx=%d sta=%d\n", keyconf
->keyidx
, sta_id
);
3421 if (keyconf
->keyidx
!= keyidx
) {
3422 /* We need to remove a key with idx different that the one
3423 * in the uCode. This means that the key we need to remove has
3424 * been replaced by another one with different idx.
3425 * Don't do anything and return ok
3427 spin_unlock_irqrestore(&il
->sta_lock
, flags
);
3431 if (il
->stations
[sta_id
].sta
.key
.key_flags
& STA_KEY_FLG_INVALID
) {
3432 IL_WARN("Removing wrong key %d 0x%x\n", keyconf
->keyidx
,
3434 spin_unlock_irqrestore(&il
->sta_lock
, flags
);
3438 if (!test_and_clear_bit
3439 (il
->stations
[sta_id
].sta
.key
.key_offset
, &il
->ucode_key_table
))
3440 IL_ERR("idx %d not used in uCode key table.\n",
3441 il
->stations
[sta_id
].sta
.key
.key_offset
);
3442 memset(&il
->stations
[sta_id
].keyinfo
, 0, sizeof(struct il_hw_key
));
3443 memset(&il
->stations
[sta_id
].sta
.key
, 0, sizeof(struct il4965_keyinfo
));
3444 il
->stations
[sta_id
].sta
.key
.key_flags
=
3445 STA_KEY_FLG_NO_ENC
| STA_KEY_FLG_INVALID
;
3446 il
->stations
[sta_id
].sta
.key
.key_offset
= keyconf
->hw_key_idx
;
3447 il
->stations
[sta_id
].sta
.sta
.modify_mask
= STA_MODIFY_KEY_MASK
;
3448 il
->stations
[sta_id
].sta
.mode
= STA_CONTROL_MODIFY_MSK
;
3450 if (il_is_rfkill(il
)) {
3452 ("Not sending C_ADD_STA command because RFKILL enabled.\n");
3453 spin_unlock_irqrestore(&il
->sta_lock
, flags
);
3456 memcpy(&sta_cmd
, &il
->stations
[sta_id
].sta
,
3457 sizeof(struct il_addsta_cmd
));
3458 spin_unlock_irqrestore(&il
->sta_lock
, flags
);
3460 return il_send_add_sta(il
, &sta_cmd
, CMD_SYNC
);
3464 il4965_set_dynamic_key(struct il_priv
*il
, struct ieee80211_key_conf
*keyconf
,
3469 lockdep_assert_held(&il
->mutex
);
3471 il
->_4965
.key_mapping_keys
++;
3472 keyconf
->hw_key_idx
= HW_KEY_DYNAMIC
;
3474 switch (keyconf
->cipher
) {
3475 case WLAN_CIPHER_SUITE_CCMP
:
3477 il4965_set_ccmp_dynamic_key_info(il
, keyconf
, sta_id
);
3479 case WLAN_CIPHER_SUITE_TKIP
:
3481 il4965_set_tkip_dynamic_key_info(il
, keyconf
, sta_id
);
3483 case WLAN_CIPHER_SUITE_WEP40
:
3484 case WLAN_CIPHER_SUITE_WEP104
:
3485 ret
= il4965_set_wep_dynamic_key_info(il
, keyconf
, sta_id
);
3488 IL_ERR("Unknown alg: %s cipher = %x\n", __func__
,
3493 D_WEP("Set dynamic key: cipher=%x len=%d idx=%d sta=%d ret=%d\n",
3494 keyconf
->cipher
, keyconf
->keylen
, keyconf
->keyidx
, sta_id
, ret
);
3500 * il4965_alloc_bcast_station - add broadcast station into driver's station table.
3502 * This adds the broadcast station into the driver's station table
3503 * and marks it driver active, so that it will be restored to the
3504 * device at the next best time.
3507 il4965_alloc_bcast_station(struct il_priv
*il
)
3509 struct il_link_quality_cmd
*link_cmd
;
3510 unsigned long flags
;
3513 spin_lock_irqsave(&il
->sta_lock
, flags
);
3514 sta_id
= il_prep_station(il
, il_bcast_addr
, false, NULL
);
3515 if (sta_id
== IL_INVALID_STATION
) {
3516 IL_ERR("Unable to prepare broadcast station\n");
3517 spin_unlock_irqrestore(&il
->sta_lock
, flags
);
3522 il
->stations
[sta_id
].used
|= IL_STA_DRIVER_ACTIVE
;
3523 il
->stations
[sta_id
].used
|= IL_STA_BCAST
;
3524 spin_unlock_irqrestore(&il
->sta_lock
, flags
);
3526 link_cmd
= il4965_sta_alloc_lq(il
, sta_id
);
3529 ("Unable to initialize rate scaling for bcast station.\n");
3533 spin_lock_irqsave(&il
->sta_lock
, flags
);
3534 il
->stations
[sta_id
].lq
= link_cmd
;
3535 spin_unlock_irqrestore(&il
->sta_lock
, flags
);
3541 * il4965_update_bcast_station - update broadcast station's LQ command
3543 * Only used by iwl4965. Placed here to have all bcast station management
3547 il4965_update_bcast_station(struct il_priv
*il
)
3549 unsigned long flags
;
3550 struct il_link_quality_cmd
*link_cmd
;
3551 u8 sta_id
= il
->hw_params
.bcast_id
;
3553 link_cmd
= il4965_sta_alloc_lq(il
, sta_id
);
3555 IL_ERR("Unable to initialize rate scaling for bcast sta.\n");
3559 spin_lock_irqsave(&il
->sta_lock
, flags
);
3560 if (il
->stations
[sta_id
].lq
)
3561 kfree(il
->stations
[sta_id
].lq
);
3563 D_INFO("Bcast sta rate scaling has not been initialized.\n");
3564 il
->stations
[sta_id
].lq
= link_cmd
;
3565 spin_unlock_irqrestore(&il
->sta_lock
, flags
);
3571 il4965_update_bcast_stations(struct il_priv
*il
)
3573 return il4965_update_bcast_station(il
);
3577 * il4965_sta_tx_modify_enable_tid - Enable Tx for this TID in station table
3580 il4965_sta_tx_modify_enable_tid(struct il_priv
*il
, int sta_id
, int tid
)
3582 unsigned long flags
;
3583 struct il_addsta_cmd sta_cmd
;
3585 lockdep_assert_held(&il
->mutex
);
3587 /* Remove "disable" flag, to enable Tx for this TID */
3588 spin_lock_irqsave(&il
->sta_lock
, flags
);
3589 il
->stations
[sta_id
].sta
.sta
.modify_mask
= STA_MODIFY_TID_DISABLE_TX
;
3590 il
->stations
[sta_id
].sta
.tid_disable_tx
&= cpu_to_le16(~(1 << tid
));
3591 il
->stations
[sta_id
].sta
.mode
= STA_CONTROL_MODIFY_MSK
;
3592 memcpy(&sta_cmd
, &il
->stations
[sta_id
].sta
,
3593 sizeof(struct il_addsta_cmd
));
3594 spin_unlock_irqrestore(&il
->sta_lock
, flags
);
3596 return il_send_add_sta(il
, &sta_cmd
, CMD_SYNC
);
3600 il4965_sta_rx_agg_start(struct il_priv
*il
, struct ieee80211_sta
*sta
, int tid
,
3603 unsigned long flags
;
3605 struct il_addsta_cmd sta_cmd
;
3607 lockdep_assert_held(&il
->mutex
);
3609 sta_id
= il_sta_id(sta
);
3610 if (sta_id
== IL_INVALID_STATION
)
3613 spin_lock_irqsave(&il
->sta_lock
, flags
);
3614 il
->stations
[sta_id
].sta
.station_flags_msk
= 0;
3615 il
->stations
[sta_id
].sta
.sta
.modify_mask
= STA_MODIFY_ADDBA_TID_MSK
;
3616 il
->stations
[sta_id
].sta
.add_immediate_ba_tid
= (u8
) tid
;
3617 il
->stations
[sta_id
].sta
.add_immediate_ba_ssn
= cpu_to_le16(ssn
);
3618 il
->stations
[sta_id
].sta
.mode
= STA_CONTROL_MODIFY_MSK
;
3619 memcpy(&sta_cmd
, &il
->stations
[sta_id
].sta
,
3620 sizeof(struct il_addsta_cmd
));
3621 spin_unlock_irqrestore(&il
->sta_lock
, flags
);
3623 return il_send_add_sta(il
, &sta_cmd
, CMD_SYNC
);
3627 il4965_sta_rx_agg_stop(struct il_priv
*il
, struct ieee80211_sta
*sta
, int tid
)
3629 unsigned long flags
;
3631 struct il_addsta_cmd sta_cmd
;
3633 lockdep_assert_held(&il
->mutex
);
3635 sta_id
= il_sta_id(sta
);
3636 if (sta_id
== IL_INVALID_STATION
) {
3637 IL_ERR("Invalid station for AGG tid %d\n", tid
);
3641 spin_lock_irqsave(&il
->sta_lock
, flags
);
3642 il
->stations
[sta_id
].sta
.station_flags_msk
= 0;
3643 il
->stations
[sta_id
].sta
.sta
.modify_mask
= STA_MODIFY_DELBA_TID_MSK
;
3644 il
->stations
[sta_id
].sta
.remove_immediate_ba_tid
= (u8
) tid
;
3645 il
->stations
[sta_id
].sta
.mode
= STA_CONTROL_MODIFY_MSK
;
3646 memcpy(&sta_cmd
, &il
->stations
[sta_id
].sta
,
3647 sizeof(struct il_addsta_cmd
));
3648 spin_unlock_irqrestore(&il
->sta_lock
, flags
);
3650 return il_send_add_sta(il
, &sta_cmd
, CMD_SYNC
);
3654 il4965_sta_modify_sleep_tx_count(struct il_priv
*il
, int sta_id
, int cnt
)
3656 unsigned long flags
;
3658 spin_lock_irqsave(&il
->sta_lock
, flags
);
3659 il
->stations
[sta_id
].sta
.station_flags
|= STA_FLG_PWR_SAVE_MSK
;
3660 il
->stations
[sta_id
].sta
.station_flags_msk
= STA_FLG_PWR_SAVE_MSK
;
3661 il
->stations
[sta_id
].sta
.sta
.modify_mask
=
3662 STA_MODIFY_SLEEP_TX_COUNT_MSK
;
3663 il
->stations
[sta_id
].sta
.sleep_tx_count
= cpu_to_le16(cnt
);
3664 il
->stations
[sta_id
].sta
.mode
= STA_CONTROL_MODIFY_MSK
;
3665 il_send_add_sta(il
, &il
->stations
[sta_id
].sta
, CMD_ASYNC
);
3666 spin_unlock_irqrestore(&il
->sta_lock
, flags
);
3671 il4965_update_chain_flags(struct il_priv
*il
)
3673 if (il
->ops
->set_rxon_chain
) {
3674 il
->ops
->set_rxon_chain(il
);
3675 if (il
->active
.rx_chain
!= il
->staging
.rx_chain
)
3681 il4965_clear_free_frames(struct il_priv
*il
)
3683 struct list_head
*element
;
3685 D_INFO("%d frames on pre-allocated heap on clear.\n", il
->frames_count
);
3687 while (!list_empty(&il
->free_frames
)) {
3688 element
= il
->free_frames
.next
;
3690 kfree(list_entry(element
, struct il_frame
, list
));
3694 if (il
->frames_count
) {
3695 IL_WARN("%d frames still in use. Did we lose one?\n",
3697 il
->frames_count
= 0;
3701 static struct il_frame
*
3702 il4965_get_free_frame(struct il_priv
*il
)
3704 struct il_frame
*frame
;
3705 struct list_head
*element
;
3706 if (list_empty(&il
->free_frames
)) {
3707 frame
= kzalloc(sizeof(*frame
), GFP_KERNEL
);
3709 IL_ERR("Could not allocate frame!\n");
3717 element
= il
->free_frames
.next
;
3719 return list_entry(element
, struct il_frame
, list
);
3723 il4965_free_frame(struct il_priv
*il
, struct il_frame
*frame
)
3725 memset(frame
, 0, sizeof(*frame
));
3726 list_add(&frame
->list
, &il
->free_frames
);
3730 il4965_fill_beacon_frame(struct il_priv
*il
, struct ieee80211_hdr
*hdr
,
3733 lockdep_assert_held(&il
->mutex
);
3735 if (!il
->beacon_skb
)
3738 if (il
->beacon_skb
->len
> left
)
3741 memcpy(hdr
, il
->beacon_skb
->data
, il
->beacon_skb
->len
);
3743 return il
->beacon_skb
->len
;
3746 /* Parse the beacon frame to find the TIM element and set tim_idx & tim_size */
3748 il4965_set_beacon_tim(struct il_priv
*il
,
3749 struct il_tx_beacon_cmd
*tx_beacon_cmd
, u8
* beacon
,
3753 struct ieee80211_mgmt
*mgmt
= (struct ieee80211_mgmt
*)beacon
;
3756 * The idx is relative to frame start but we start looking at the
3757 * variable-length part of the beacon.
3759 tim_idx
= mgmt
->u
.beacon
.variable
- beacon
;
3761 /* Parse variable-length elements of beacon to find WLAN_EID_TIM */
3762 while ((tim_idx
< (frame_size
- 2)) &&
3763 (beacon
[tim_idx
] != WLAN_EID_TIM
))
3764 tim_idx
+= beacon
[tim_idx
+ 1] + 2;
3766 /* If TIM field was found, set variables */
3767 if ((tim_idx
< (frame_size
- 1)) && (beacon
[tim_idx
] == WLAN_EID_TIM
)) {
3768 tx_beacon_cmd
->tim_idx
= cpu_to_le16(tim_idx
);
3769 tx_beacon_cmd
->tim_size
= beacon
[tim_idx
+ 1];
3771 IL_WARN("Unable to find TIM Element in beacon\n");
3775 il4965_hw_get_beacon_cmd(struct il_priv
*il
, struct il_frame
*frame
)
3777 struct il_tx_beacon_cmd
*tx_beacon_cmd
;
3782 * We have to set up the TX command, the TX Beacon command, and the
3786 lockdep_assert_held(&il
->mutex
);
3788 if (!il
->beacon_enabled
) {
3789 IL_ERR("Trying to build beacon without beaconing enabled\n");
3793 /* Initialize memory */
3794 tx_beacon_cmd
= &frame
->u
.beacon
;
3795 memset(tx_beacon_cmd
, 0, sizeof(*tx_beacon_cmd
));
3797 /* Set up TX beacon contents */
3799 il4965_fill_beacon_frame(il
, tx_beacon_cmd
->frame
,
3800 sizeof(frame
->u
) - sizeof(*tx_beacon_cmd
));
3801 if (WARN_ON_ONCE(frame_size
> MAX_MPDU_SIZE
))
3806 /* Set up TX command fields */
3807 tx_beacon_cmd
->tx
.len
= cpu_to_le16((u16
) frame_size
);
3808 tx_beacon_cmd
->tx
.sta_id
= il
->hw_params
.bcast_id
;
3809 tx_beacon_cmd
->tx
.stop_time
.life_time
= TX_CMD_LIFE_TIME_INFINITE
;
3810 tx_beacon_cmd
->tx
.tx_flags
=
3811 TX_CMD_FLG_SEQ_CTL_MSK
| TX_CMD_FLG_TSF_MSK
|
3812 TX_CMD_FLG_STA_RATE_MSK
;
3814 /* Set up TX beacon command fields */
3815 il4965_set_beacon_tim(il
, tx_beacon_cmd
, (u8
*) tx_beacon_cmd
->frame
,
3818 /* Set up packet rate and flags */
3819 rate
= il_get_lowest_plcp(il
);
3820 il4965_toggle_tx_ant(il
, &il
->mgmt_tx_ant
, il
->hw_params
.valid_tx_ant
);
3821 rate_flags
= BIT(il
->mgmt_tx_ant
) << RATE_MCS_ANT_POS
;
3822 if ((rate
>= IL_FIRST_CCK_RATE
) && (rate
<= IL_LAST_CCK_RATE
))
3823 rate_flags
|= RATE_MCS_CCK_MSK
;
3824 tx_beacon_cmd
->tx
.rate_n_flags
= cpu_to_le32(rate
| rate_flags
);
3826 return sizeof(*tx_beacon_cmd
) + frame_size
;
3830 il4965_send_beacon_cmd(struct il_priv
*il
)
3832 struct il_frame
*frame
;
3833 unsigned int frame_size
;
3836 frame
= il4965_get_free_frame(il
);
3838 IL_ERR("Could not obtain free frame buffer for beacon "
3843 frame_size
= il4965_hw_get_beacon_cmd(il
, frame
);
3845 IL_ERR("Error configuring the beacon command\n");
3846 il4965_free_frame(il
, frame
);
3850 rc
= il_send_cmd_pdu(il
, C_TX_BEACON
, frame_size
, &frame
->u
.cmd
[0]);
3852 il4965_free_frame(il
, frame
);
3857 static inline dma_addr_t
3858 il4965_tfd_tb_get_addr(struct il_tfd
*tfd
, u8 idx
)
3860 struct il_tfd_tb
*tb
= &tfd
->tbs
[idx
];
3862 dma_addr_t addr
= get_unaligned_le32(&tb
->lo
);
3863 if (sizeof(dma_addr_t
) > sizeof(u32
))
3865 ((dma_addr_t
) (le16_to_cpu(tb
->hi_n_len
) & 0xF) << 16) <<
3872 il4965_tfd_tb_get_len(struct il_tfd
*tfd
, u8 idx
)
3874 struct il_tfd_tb
*tb
= &tfd
->tbs
[idx
];
3876 return le16_to_cpu(tb
->hi_n_len
) >> 4;
3880 il4965_tfd_set_tb(struct il_tfd
*tfd
, u8 idx
, dma_addr_t addr
, u16 len
)
3882 struct il_tfd_tb
*tb
= &tfd
->tbs
[idx
];
3883 u16 hi_n_len
= len
<< 4;
3885 put_unaligned_le32(addr
, &tb
->lo
);
3886 if (sizeof(dma_addr_t
) > sizeof(u32
))
3887 hi_n_len
|= ((addr
>> 16) >> 16) & 0xF;
3889 tb
->hi_n_len
= cpu_to_le16(hi_n_len
);
3891 tfd
->num_tbs
= idx
+ 1;
3895 il4965_tfd_get_num_tbs(struct il_tfd
*tfd
)
3897 return tfd
->num_tbs
& 0x1f;
3901 * il4965_hw_txq_free_tfd - Free all chunks referenced by TFD [txq->q.read_ptr]
3902 * @il - driver ilate data
3905 * Does NOT advance any TFD circular buffer read/write idxes
3906 * Does NOT free the TFD itself (which is within circular buffer)
3909 il4965_hw_txq_free_tfd(struct il_priv
*il
, struct il_tx_queue
*txq
)
3911 struct il_tfd
*tfd_tmp
= (struct il_tfd
*)txq
->tfds
;
3913 struct pci_dev
*dev
= il
->pci_dev
;
3914 int idx
= txq
->q
.read_ptr
;
3918 tfd
= &tfd_tmp
[idx
];
3920 /* Sanity check on number of chunks */
3921 num_tbs
= il4965_tfd_get_num_tbs(tfd
);
3923 if (num_tbs
>= IL_NUM_OF_TBS
) {
3924 IL_ERR("Too many chunks: %i\n", num_tbs
);
3925 /* @todo issue fatal error, it is quite serious situation */
3931 pci_unmap_single(dev
, dma_unmap_addr(&txq
->meta
[idx
], mapping
),
3932 dma_unmap_len(&txq
->meta
[idx
], len
),
3933 PCI_DMA_BIDIRECTIONAL
);
3935 /* Unmap chunks, if any. */
3936 for (i
= 1; i
< num_tbs
; i
++)
3937 pci_unmap_single(dev
, il4965_tfd_tb_get_addr(tfd
, i
),
3938 il4965_tfd_tb_get_len(tfd
, i
),
3943 struct sk_buff
*skb
= txq
->skbs
[txq
->q
.read_ptr
];
3945 /* can be called from irqs-disabled context */
3947 dev_kfree_skb_any(skb
);
3948 txq
->skbs
[txq
->q
.read_ptr
] = NULL
;
3954 il4965_hw_txq_attach_buf_to_tfd(struct il_priv
*il
, struct il_tx_queue
*txq
,
3955 dma_addr_t addr
, u16 len
, u8 reset
, u8 pad
)
3958 struct il_tfd
*tfd
, *tfd_tmp
;
3962 tfd_tmp
= (struct il_tfd
*)txq
->tfds
;
3963 tfd
= &tfd_tmp
[q
->write_ptr
];
3966 memset(tfd
, 0, sizeof(*tfd
));
3968 num_tbs
= il4965_tfd_get_num_tbs(tfd
);
3970 /* Each TFD can point to a maximum 20 Tx buffers */
3971 if (num_tbs
>= IL_NUM_OF_TBS
) {
3972 IL_ERR("Error can not send more than %d chunks\n",
3977 BUG_ON(addr
& ~DMA_BIT_MASK(36));
3978 if (unlikely(addr
& ~IL_TX_DMA_MASK
))
3979 IL_ERR("Unaligned address = %llx\n", (unsigned long long)addr
);
3981 il4965_tfd_set_tb(tfd
, num_tbs
, addr
, len
);
3987 * Tell nic where to find circular buffer of Tx Frame Descriptors for
3988 * given Tx queue, and enable the DMA channel used for that queue.
3990 * 4965 supports up to 16 Tx queues in DRAM, mapped to up to 8 Tx DMA
3991 * channels supported in hardware.
3994 il4965_hw_tx_queue_init(struct il_priv
*il
, struct il_tx_queue
*txq
)
3996 int txq_id
= txq
->q
.id
;
3998 /* Circular buffer (TFD queue in DRAM) physical base address */
3999 il_wr(il
, FH49_MEM_CBBC_QUEUE(txq_id
), txq
->q
.dma_addr
>> 8);
4004 /******************************************************************************
4006 * Generic RX handler implementations
4008 ******************************************************************************/
4010 il4965_hdl_alive(struct il_priv
*il
, struct il_rx_buf
*rxb
)
4012 struct il_rx_pkt
*pkt
= rxb_addr(rxb
);
4013 struct il_alive_resp
*palive
;
4014 struct delayed_work
*pwork
;
4016 palive
= &pkt
->u
.alive_frame
;
4018 D_INFO("Alive ucode status 0x%08X revision " "0x%01X 0x%01X\n",
4019 palive
->is_valid
, palive
->ver_type
, palive
->ver_subtype
);
4021 if (palive
->ver_subtype
== INITIALIZE_SUBTYPE
) {
4022 D_INFO("Initialization Alive received.\n");
4023 memcpy(&il
->card_alive_init
, &pkt
->u
.alive_frame
,
4024 sizeof(struct il_init_alive_resp
));
4025 pwork
= &il
->init_alive_start
;
4027 D_INFO("Runtime Alive received.\n");
4028 memcpy(&il
->card_alive
, &pkt
->u
.alive_frame
,
4029 sizeof(struct il_alive_resp
));
4030 pwork
= &il
->alive_start
;
4033 /* We delay the ALIVE response by 5ms to
4034 * give the HW RF Kill time to activate... */
4035 if (palive
->is_valid
== UCODE_VALID_OK
)
4036 queue_delayed_work(il
->workqueue
, pwork
, msecs_to_jiffies(5));
4038 IL_WARN("uCode did not respond OK.\n");
4042 * il4965_bg_stats_periodic - Timer callback to queue stats
4044 * This callback is provided in order to send a stats request.
4046 * This timer function is continually reset to execute within
4047 * 60 seconds since the last N_STATS was received. We need to
4048 * ensure we receive the stats in order to update the temperature
4049 * used for calibrating the TXPOWER.
4052 il4965_bg_stats_periodic(unsigned long data
)
4054 struct il_priv
*il
= (struct il_priv
*)data
;
4056 if (test_bit(S_EXIT_PENDING
, &il
->status
))
4059 /* dont send host command if rf-kill is on */
4060 if (!il_is_ready_rf(il
))
4063 il_send_stats_request(il
, CMD_ASYNC
, false);
4067 il4965_hdl_beacon(struct il_priv
*il
, struct il_rx_buf
*rxb
)
4069 struct il_rx_pkt
*pkt
= rxb_addr(rxb
);
4070 struct il4965_beacon_notif
*beacon
=
4071 (struct il4965_beacon_notif
*)pkt
->u
.raw
;
4072 #ifdef CONFIG_IWLEGACY_DEBUG
4073 u8 rate
= il4965_hw_get_rate(beacon
->beacon_notify_hdr
.rate_n_flags
);
4075 D_RX("beacon status %x retries %d iss %d tsf:0x%.8x%.8x rate %d\n",
4076 le32_to_cpu(beacon
->beacon_notify_hdr
.u
.status
) & TX_STATUS_MSK
,
4077 beacon
->beacon_notify_hdr
.failure_frame
,
4078 le32_to_cpu(beacon
->ibss_mgr_status
),
4079 le32_to_cpu(beacon
->high_tsf
), le32_to_cpu(beacon
->low_tsf
), rate
);
4081 il
->ibss_manager
= le32_to_cpu(beacon
->ibss_mgr_status
);
4085 il4965_perform_ct_kill_task(struct il_priv
*il
)
4087 unsigned long flags
;
4089 D_POWER("Stop all queues\n");
4091 if (il
->mac80211_registered
)
4092 ieee80211_stop_queues(il
->hw
);
4094 _il_wr(il
, CSR_UCODE_DRV_GP1_SET
,
4095 CSR_UCODE_DRV_GP1_REG_BIT_CT_KILL_EXIT
);
4096 _il_rd(il
, CSR_UCODE_DRV_GP1
);
4098 spin_lock_irqsave(&il
->reg_lock
, flags
);
4099 if (likely(_il_grab_nic_access(il
)))
4100 _il_release_nic_access(il
);
4101 spin_unlock_irqrestore(&il
->reg_lock
, flags
);
4104 /* Handle notification from uCode that card's power state is changing
4105 * due to software, hardware, or critical temperature RFKILL */
4107 il4965_hdl_card_state(struct il_priv
*il
, struct il_rx_buf
*rxb
)
4109 struct il_rx_pkt
*pkt
= rxb_addr(rxb
);
4110 u32 flags
= le32_to_cpu(pkt
->u
.card_state_notif
.flags
);
4111 unsigned long status
= il
->status
;
4113 D_RF_KILL("Card state received: HW:%s SW:%s CT:%s\n",
4114 (flags
& HW_CARD_DISABLED
) ? "Kill" : "On",
4115 (flags
& SW_CARD_DISABLED
) ? "Kill" : "On",
4116 (flags
& CT_CARD_DISABLED
) ? "Reached" : "Not reached");
4118 if (flags
& (SW_CARD_DISABLED
| HW_CARD_DISABLED
| CT_CARD_DISABLED
)) {
4120 _il_wr(il
, CSR_UCODE_DRV_GP1_SET
,
4121 CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED
);
4123 il_wr(il
, HBUS_TARG_MBX_C
, HBUS_TARG_MBX_C_REG_BIT_CMD_BLOCKED
);
4125 if (!(flags
& RXON_CARD_DISABLED
)) {
4126 _il_wr(il
, CSR_UCODE_DRV_GP1_CLR
,
4127 CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED
);
4128 il_wr(il
, HBUS_TARG_MBX_C
,
4129 HBUS_TARG_MBX_C_REG_BIT_CMD_BLOCKED
);
4133 if (flags
& CT_CARD_DISABLED
)
4134 il4965_perform_ct_kill_task(il
);
4136 if (flags
& HW_CARD_DISABLED
)
4137 set_bit(S_RFKILL
, &il
->status
);
4139 clear_bit(S_RFKILL
, &il
->status
);
4141 if (!(flags
& RXON_CARD_DISABLED
))
4144 if ((test_bit(S_RFKILL
, &status
) !=
4145 test_bit(S_RFKILL
, &il
->status
)))
4146 wiphy_rfkill_set_hw_state(il
->hw
->wiphy
,
4147 test_bit(S_RFKILL
, &il
->status
));
4149 wake_up(&il
->wait_command_queue
);
4153 * il4965_setup_handlers - Initialize Rx handler callbacks
4155 * Setup the RX handlers for each of the reply types sent from the uCode
4158 * This function chains into the hardware specific files for them to setup
4159 * any hardware specific handlers as well.
4162 il4965_setup_handlers(struct il_priv
*il
)
4164 il
->handlers
[N_ALIVE
] = il4965_hdl_alive
;
4165 il
->handlers
[N_ERROR
] = il_hdl_error
;
4166 il
->handlers
[N_CHANNEL_SWITCH
] = il_hdl_csa
;
4167 il
->handlers
[N_SPECTRUM_MEASUREMENT
] = il_hdl_spectrum_measurement
;
4168 il
->handlers
[N_PM_SLEEP
] = il_hdl_pm_sleep
;
4169 il
->handlers
[N_PM_DEBUG_STATS
] = il_hdl_pm_debug_stats
;
4170 il
->handlers
[N_BEACON
] = il4965_hdl_beacon
;
4173 * The same handler is used for both the REPLY to a discrete
4174 * stats request from the host as well as for the periodic
4175 * stats notifications (after received beacons) from the uCode.
4177 il
->handlers
[C_STATS
] = il4965_hdl_c_stats
;
4178 il
->handlers
[N_STATS
] = il4965_hdl_stats
;
4180 il_setup_rx_scan_handlers(il
);
4182 /* status change handler */
4183 il
->handlers
[N_CARD_STATE
] = il4965_hdl_card_state
;
4185 il
->handlers
[N_MISSED_BEACONS
] = il4965_hdl_missed_beacon
;
4187 il
->handlers
[N_RX_PHY
] = il4965_hdl_rx_phy
;
4188 il
->handlers
[N_RX_MPDU
] = il4965_hdl_rx
;
4189 il
->handlers
[N_RX
] = il4965_hdl_rx
;
4191 il
->handlers
[N_COMPRESSED_BA
] = il4965_hdl_compressed_ba
;
4193 il
->handlers
[C_TX
] = il4965_hdl_tx
;
4197 * il4965_rx_handle - Main entry function for receiving responses from uCode
4199 * Uses the il->handlers callback function array to invoke
4200 * the appropriate handlers, including command responses,
4201 * frame-received notifications, and other notifications.
4204 il4965_rx_handle(struct il_priv
*il
)
4206 struct il_rx_buf
*rxb
;
4207 struct il_rx_pkt
*pkt
;
4208 struct il_rx_queue
*rxq
= &il
->rxq
;
4211 unsigned long flags
;
4216 /* uCode's read idx (stored in shared DRAM) indicates the last Rx
4217 * buffer that the driver may process (last buffer filled by ucode). */
4218 r
= le16_to_cpu(rxq
->rb_stts
->closed_rb_num
) & 0x0FFF;
4221 /* Rx interrupt, but nothing sent from uCode */
4223 D_RX("r = %d, i = %d\n", r
, i
);
4225 /* calculate total frames need to be restock after handling RX */
4226 total_empty
= r
- rxq
->write_actual
;
4227 if (total_empty
< 0)
4228 total_empty
+= RX_QUEUE_SIZE
;
4230 if (total_empty
> (RX_QUEUE_SIZE
/ 2))
4236 rxb
= rxq
->queue
[i
];
4238 /* If an RXB doesn't have a Rx queue slot associated with it,
4239 * then a bug has been introduced in the queue refilling
4240 * routines -- catch it here */
4241 BUG_ON(rxb
== NULL
);
4243 rxq
->queue
[i
] = NULL
;
4245 pci_unmap_page(il
->pci_dev
, rxb
->page_dma
,
4246 PAGE_SIZE
<< il
->hw_params
.rx_page_order
,
4247 PCI_DMA_FROMDEVICE
);
4248 pkt
= rxb_addr(rxb
);
4250 len
= le32_to_cpu(pkt
->len_n_flags
) & IL_RX_FRAME_SIZE_MSK
;
4251 len
+= sizeof(u32
); /* account for status word */
4253 /* Reclaim a command buffer only if this packet is a response
4254 * to a (driver-originated) command.
4255 * If the packet (e.g. Rx frame) originated from uCode,
4256 * there is no command buffer to reclaim.
4257 * Ucode should set SEQ_RX_FRAME bit if ucode-originated,
4258 * but apparently a few don't get set; catch them here. */
4259 reclaim
= !(pkt
->hdr
.sequence
& SEQ_RX_FRAME
) &&
4260 (pkt
->hdr
.cmd
!= N_RX_PHY
) && (pkt
->hdr
.cmd
!= N_RX
) &&
4261 (pkt
->hdr
.cmd
!= N_RX_MPDU
) &&
4262 (pkt
->hdr
.cmd
!= N_COMPRESSED_BA
) &&
4263 (pkt
->hdr
.cmd
!= N_STATS
) && (pkt
->hdr
.cmd
!= C_TX
);
4265 /* Based on type of command response or notification,
4266 * handle those that need handling via function in
4267 * handlers table. See il4965_setup_handlers() */
4268 if (il
->handlers
[pkt
->hdr
.cmd
]) {
4269 D_RX("r = %d, i = %d, %s, 0x%02x\n", r
, i
,
4270 il_get_cmd_string(pkt
->hdr
.cmd
), pkt
->hdr
.cmd
);
4271 il
->isr_stats
.handlers
[pkt
->hdr
.cmd
]++;
4272 il
->handlers
[pkt
->hdr
.cmd
] (il
, rxb
);
4274 /* No handling needed */
4275 D_RX("r %d i %d No handler needed for %s, 0x%02x\n", r
,
4276 i
, il_get_cmd_string(pkt
->hdr
.cmd
), pkt
->hdr
.cmd
);
4280 * XXX: After here, we should always check rxb->page
4281 * against NULL before touching it or its virtual
4282 * memory (pkt). Because some handler might have
4283 * already taken or freed the pages.
4287 /* Invoke any callbacks, transfer the buffer to caller,
4288 * and fire off the (possibly) blocking il_send_cmd()
4289 * as we reclaim the driver command queue */
4291 il_tx_cmd_complete(il
, rxb
);
4293 IL_WARN("Claim null rxb?\n");
4296 /* Reuse the page if possible. For notification packets and
4297 * SKBs that fail to Rx correctly, add them back into the
4298 * rx_free list for reuse later. */
4299 spin_lock_irqsave(&rxq
->lock
, flags
);
4300 if (rxb
->page
!= NULL
) {
4302 pci_map_page(il
->pci_dev
, rxb
->page
, 0,
4303 PAGE_SIZE
<< il
->hw_params
.
4304 rx_page_order
, PCI_DMA_FROMDEVICE
);
4306 if (unlikely(pci_dma_mapping_error(il
->pci_dev
,
4308 __il_free_pages(il
, rxb
->page
);
4310 list_add_tail(&rxb
->list
, &rxq
->rx_used
);
4312 list_add_tail(&rxb
->list
, &rxq
->rx_free
);
4316 list_add_tail(&rxb
->list
, &rxq
->rx_used
);
4318 spin_unlock_irqrestore(&rxq
->lock
, flags
);
4320 i
= (i
+ 1) & RX_QUEUE_MASK
;
4321 /* If there are a lot of unused frames,
4322 * restock the Rx queue so ucode wont assert. */
4327 il4965_rx_replenish_now(il
);
4333 /* Backtrack one entry */
4336 il4965_rx_replenish_now(il
);
4338 il4965_rx_queue_restock(il
);
4341 /* call this function to flush any scheduled tasklet */
4343 il4965_synchronize_irq(struct il_priv
*il
)
4345 /* wait to make sure we flush pending tasklet */
4346 synchronize_irq(il
->pci_dev
->irq
);
4347 tasklet_kill(&il
->irq_tasklet
);
4351 il4965_irq_tasklet(struct il_priv
*il
)
4353 u32 inta
, handled
= 0;
4355 unsigned long flags
;
4357 #ifdef CONFIG_IWLEGACY_DEBUG
4361 spin_lock_irqsave(&il
->lock
, flags
);
4363 /* Ack/clear/reset pending uCode interrupts.
4364 * Note: Some bits in CSR_INT are "OR" of bits in CSR_FH_INT_STATUS,
4365 * and will clear only when CSR_FH_INT_STATUS gets cleared. */
4366 inta
= _il_rd(il
, CSR_INT
);
4367 _il_wr(il
, CSR_INT
, inta
);
4369 /* Ack/clear/reset pending flow-handler (DMA) interrupts.
4370 * Any new interrupts that happen after this, either while we're
4371 * in this tasklet, or later, will show up in next ISR/tasklet. */
4372 inta_fh
= _il_rd(il
, CSR_FH_INT_STATUS
);
4373 _il_wr(il
, CSR_FH_INT_STATUS
, inta_fh
);
4375 #ifdef CONFIG_IWLEGACY_DEBUG
4376 if (il_get_debug_level(il
) & IL_DL_ISR
) {
4377 /* just for debug */
4378 inta_mask
= _il_rd(il
, CSR_INT_MASK
);
4379 D_ISR("inta 0x%08x, enabled 0x%08x, fh 0x%08x\n", inta
,
4380 inta_mask
, inta_fh
);
4384 spin_unlock_irqrestore(&il
->lock
, flags
);
4386 /* Since CSR_INT and CSR_FH_INT_STATUS reads and clears are not
4387 * atomic, make sure that inta covers all the interrupts that
4388 * we've discovered, even if FH interrupt came in just after
4389 * reading CSR_INT. */
4390 if (inta_fh
& CSR49_FH_INT_RX_MASK
)
4391 inta
|= CSR_INT_BIT_FH_RX
;
4392 if (inta_fh
& CSR49_FH_INT_TX_MASK
)
4393 inta
|= CSR_INT_BIT_FH_TX
;
4395 /* Now service all interrupt bits discovered above. */
4396 if (inta
& CSR_INT_BIT_HW_ERR
) {
4397 IL_ERR("Hardware error detected. Restarting.\n");
4399 /* Tell the device to stop sending interrupts */
4400 il_disable_interrupts(il
);
4403 il_irq_handle_error(il
);
4405 handled
|= CSR_INT_BIT_HW_ERR
;
4409 #ifdef CONFIG_IWLEGACY_DEBUG
4410 if (il_get_debug_level(il
) & (IL_DL_ISR
)) {
4411 /* NIC fires this, but we don't use it, redundant with WAKEUP */
4412 if (inta
& CSR_INT_BIT_SCD
) {
4413 D_ISR("Scheduler finished to transmit "
4414 "the frame/frames.\n");
4415 il
->isr_stats
.sch
++;
4418 /* Alive notification via Rx interrupt will do the real work */
4419 if (inta
& CSR_INT_BIT_ALIVE
) {
4420 D_ISR("Alive interrupt\n");
4421 il
->isr_stats
.alive
++;
4425 /* Safely ignore these bits for debug checks below */
4426 inta
&= ~(CSR_INT_BIT_SCD
| CSR_INT_BIT_ALIVE
);
4428 /* HW RF KILL switch toggled */
4429 if (inta
& CSR_INT_BIT_RF_KILL
) {
4432 if (!(_il_rd(il
, CSR_GP_CNTRL
) & CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW
))
4435 IL_WARN("RF_KILL bit toggled to %s.\n",
4436 hw_rf_kill
? "disable radio" : "enable radio");
4438 il
->isr_stats
.rfkill
++;
4440 /* driver only loads ucode once setting the interface up.
4441 * the driver allows loading the ucode even if the radio
4442 * is killed. Hence update the killswitch state here. The
4443 * rfkill handler will care about restarting if needed.
4445 if (!test_bit(S_ALIVE
, &il
->status
)) {
4447 set_bit(S_RFKILL
, &il
->status
);
4449 clear_bit(S_RFKILL
, &il
->status
);
4450 wiphy_rfkill_set_hw_state(il
->hw
->wiphy
, hw_rf_kill
);
4453 handled
|= CSR_INT_BIT_RF_KILL
;
4456 /* Chip got too hot and stopped itself */
4457 if (inta
& CSR_INT_BIT_CT_KILL
) {
4458 IL_ERR("Microcode CT kill error detected.\n");
4459 il
->isr_stats
.ctkill
++;
4460 handled
|= CSR_INT_BIT_CT_KILL
;
4463 /* Error detected by uCode */
4464 if (inta
& CSR_INT_BIT_SW_ERR
) {
4465 IL_ERR("Microcode SW error detected. " " Restarting 0x%X.\n",
4468 il_irq_handle_error(il
);
4469 handled
|= CSR_INT_BIT_SW_ERR
;
4473 * uCode wakes up after power-down sleep.
4474 * Tell device about any new tx or host commands enqueued,
4475 * and about any Rx buffers made available while asleep.
4477 if (inta
& CSR_INT_BIT_WAKEUP
) {
4478 D_ISR("Wakeup interrupt\n");
4479 il_rx_queue_update_write_ptr(il
, &il
->rxq
);
4480 for (i
= 0; i
< il
->hw_params
.max_txq_num
; i
++)
4481 il_txq_update_write_ptr(il
, &il
->txq
[i
]);
4482 il
->isr_stats
.wakeup
++;
4483 handled
|= CSR_INT_BIT_WAKEUP
;
4486 /* All uCode command responses, including Tx command responses,
4487 * Rx "responses" (frame-received notification), and other
4488 * notifications from uCode come through here*/
4489 if (inta
& (CSR_INT_BIT_FH_RX
| CSR_INT_BIT_SW_RX
)) {
4490 il4965_rx_handle(il
);
4492 handled
|= (CSR_INT_BIT_FH_RX
| CSR_INT_BIT_SW_RX
);
4495 /* This "Tx" DMA channel is used only for loading uCode */
4496 if (inta
& CSR_INT_BIT_FH_TX
) {
4497 D_ISR("uCode load interrupt\n");
4499 handled
|= CSR_INT_BIT_FH_TX
;
4500 /* Wake up uCode load routine, now that load is complete */
4501 il
->ucode_write_complete
= 1;
4502 wake_up(&il
->wait_command_queue
);
4505 if (inta
& ~handled
) {
4506 IL_ERR("Unhandled INTA bits 0x%08x\n", inta
& ~handled
);
4507 il
->isr_stats
.unhandled
++;
4510 if (inta
& ~(il
->inta_mask
)) {
4511 IL_WARN("Disabled INTA bits 0x%08x were pending\n",
4512 inta
& ~il
->inta_mask
);
4513 IL_WARN(" with FH49_INT = 0x%08x\n", inta_fh
);
4516 /* Re-enable all interrupts */
4517 /* only Re-enable if disabled by irq */
4518 if (test_bit(S_INT_ENABLED
, &il
->status
))
4519 il_enable_interrupts(il
);
4520 /* Re-enable RF_KILL if it occurred */
4521 else if (handled
& CSR_INT_BIT_RF_KILL
)
4522 il_enable_rfkill_int(il
);
4524 #ifdef CONFIG_IWLEGACY_DEBUG
4525 if (il_get_debug_level(il
) & (IL_DL_ISR
)) {
4526 inta
= _il_rd(il
, CSR_INT
);
4527 inta_mask
= _il_rd(il
, CSR_INT_MASK
);
4528 inta_fh
= _il_rd(il
, CSR_FH_INT_STATUS
);
4529 D_ISR("End inta 0x%08x, enabled 0x%08x, fh 0x%08x, "
4530 "flags 0x%08lx\n", inta
, inta_mask
, inta_fh
, flags
);
4535 /*****************************************************************************
4539 *****************************************************************************/
4541 #ifdef CONFIG_IWLEGACY_DEBUG
4544 * The following adds a new attribute to the sysfs representation
4545 * of this device driver (i.e. a new file in /sys/class/net/wlan0/device/)
4546 * used for controlling the debug level.
4548 * See the level definitions in iwl for details.
4550 * The debug_level being managed using sysfs below is a per device debug
4551 * level that is used instead of the global debug level if it (the per
4552 * device debug level) is set.
4555 il4965_show_debug_level(struct device
*d
, struct device_attribute
*attr
,
4558 struct il_priv
*il
= dev_get_drvdata(d
);
4559 return sprintf(buf
, "0x%08X\n", il_get_debug_level(il
));
4563 il4965_store_debug_level(struct device
*d
, struct device_attribute
*attr
,
4564 const char *buf
, size_t count
)
4566 struct il_priv
*il
= dev_get_drvdata(d
);
4570 ret
= strict_strtoul(buf
, 0, &val
);
4572 IL_ERR("%s is not in hex or decimal form.\n", buf
);
4574 il
->debug_level
= val
;
4576 return strnlen(buf
, count
);
4579 static DEVICE_ATTR(debug_level
, S_IWUSR
| S_IRUGO
, il4965_show_debug_level
,
4580 il4965_store_debug_level
);
4582 #endif /* CONFIG_IWLEGACY_DEBUG */
4585 il4965_show_temperature(struct device
*d
, struct device_attribute
*attr
,
4588 struct il_priv
*il
= dev_get_drvdata(d
);
4590 if (!il_is_alive(il
))
4593 return sprintf(buf
, "%d\n", il
->temperature
);
4596 static DEVICE_ATTR(temperature
, S_IRUGO
, il4965_show_temperature
, NULL
);
4599 il4965_show_tx_power(struct device
*d
, struct device_attribute
*attr
, char *buf
)
4601 struct il_priv
*il
= dev_get_drvdata(d
);
4603 if (!il_is_ready_rf(il
))
4604 return sprintf(buf
, "off\n");
4606 return sprintf(buf
, "%d\n", il
->tx_power_user_lmt
);
4610 il4965_store_tx_power(struct device
*d
, struct device_attribute
*attr
,
4611 const char *buf
, size_t count
)
4613 struct il_priv
*il
= dev_get_drvdata(d
);
4617 ret
= strict_strtoul(buf
, 10, &val
);
4619 IL_INFO("%s is not in decimal form.\n", buf
);
4621 ret
= il_set_tx_power(il
, val
, false);
4623 IL_ERR("failed setting tx power (0x%d).\n", ret
);
4630 static DEVICE_ATTR(tx_power
, S_IWUSR
| S_IRUGO
, il4965_show_tx_power
,
4631 il4965_store_tx_power
);
4633 static struct attribute
*il_sysfs_entries
[] = {
4634 &dev_attr_temperature
.attr
,
4635 &dev_attr_tx_power
.attr
,
4636 #ifdef CONFIG_IWLEGACY_DEBUG
4637 &dev_attr_debug_level
.attr
,
4642 static struct attribute_group il_attribute_group
= {
4643 .name
= NULL
, /* put in device directory */
4644 .attrs
= il_sysfs_entries
,
4647 /******************************************************************************
4649 * uCode download functions
4651 ******************************************************************************/
4654 il4965_dealloc_ucode_pci(struct il_priv
*il
)
4656 il_free_fw_desc(il
->pci_dev
, &il
->ucode_code
);
4657 il_free_fw_desc(il
->pci_dev
, &il
->ucode_data
);
4658 il_free_fw_desc(il
->pci_dev
, &il
->ucode_data_backup
);
4659 il_free_fw_desc(il
->pci_dev
, &il
->ucode_init
);
4660 il_free_fw_desc(il
->pci_dev
, &il
->ucode_init_data
);
4661 il_free_fw_desc(il
->pci_dev
, &il
->ucode_boot
);
4665 il4965_nic_start(struct il_priv
*il
)
4667 /* Remove all resets to allow NIC to operate */
4668 _il_wr(il
, CSR_RESET
, 0);
4671 static void il4965_ucode_callback(const struct firmware
*ucode_raw
,
4673 static int il4965_mac_setup_register(struct il_priv
*il
, u32 max_probe_length
);
4675 static int __must_check
4676 il4965_request_firmware(struct il_priv
*il
, bool first
)
4678 const char *name_pre
= il
->cfg
->fw_name_pre
;
4682 il
->fw_idx
= il
->cfg
->ucode_api_max
;
4683 sprintf(tag
, "%d", il
->fw_idx
);
4686 sprintf(tag
, "%d", il
->fw_idx
);
4689 if (il
->fw_idx
< il
->cfg
->ucode_api_min
) {
4690 IL_ERR("no suitable firmware found!\n");
4694 sprintf(il
->firmware_name
, "%s%s%s", name_pre
, tag
, ".ucode");
4696 D_INFO("attempting to load firmware '%s'\n", il
->firmware_name
);
4698 return request_firmware_nowait(THIS_MODULE
, 1, il
->firmware_name
,
4699 &il
->pci_dev
->dev
, GFP_KERNEL
, il
,
4700 il4965_ucode_callback
);
4703 struct il4965_firmware_pieces
{
4704 const void *inst
, *data
, *init
, *init_data
, *boot
;
4705 size_t inst_size
, data_size
, init_size
, init_data_size
, boot_size
;
4709 il4965_load_firmware(struct il_priv
*il
, const struct firmware
*ucode_raw
,
4710 struct il4965_firmware_pieces
*pieces
)
4712 struct il_ucode_header
*ucode
= (void *)ucode_raw
->data
;
4713 u32 api_ver
, hdr_size
;
4716 il
->ucode_ver
= le32_to_cpu(ucode
->ver
);
4717 api_ver
= IL_UCODE_API(il
->ucode_ver
);
4725 if (ucode_raw
->size
< hdr_size
) {
4726 IL_ERR("File size too small!\n");
4729 pieces
->inst_size
= le32_to_cpu(ucode
->v1
.inst_size
);
4730 pieces
->data_size
= le32_to_cpu(ucode
->v1
.data_size
);
4731 pieces
->init_size
= le32_to_cpu(ucode
->v1
.init_size
);
4732 pieces
->init_data_size
= le32_to_cpu(ucode
->v1
.init_data_size
);
4733 pieces
->boot_size
= le32_to_cpu(ucode
->v1
.boot_size
);
4734 src
= ucode
->v1
.data
;
4738 /* Verify size of file vs. image size info in file's header */
4739 if (ucode_raw
->size
!=
4740 hdr_size
+ pieces
->inst_size
+ pieces
->data_size
+
4741 pieces
->init_size
+ pieces
->init_data_size
+ pieces
->boot_size
) {
4743 IL_ERR("uCode file size %d does not match expected size\n",
4744 (int)ucode_raw
->size
);
4749 src
+= pieces
->inst_size
;
4751 src
+= pieces
->data_size
;
4753 src
+= pieces
->init_size
;
4754 pieces
->init_data
= src
;
4755 src
+= pieces
->init_data_size
;
4757 src
+= pieces
->boot_size
;
4763 * il4965_ucode_callback - callback when firmware was loaded
4765 * If loaded successfully, copies the firmware into buffers
4766 * for the card to fetch (via DMA).
4769 il4965_ucode_callback(const struct firmware
*ucode_raw
, void *context
)
4771 struct il_priv
*il
= context
;
4772 struct il_ucode_header
*ucode
;
4774 struct il4965_firmware_pieces pieces
;
4775 const unsigned int api_max
= il
->cfg
->ucode_api_max
;
4776 const unsigned int api_min
= il
->cfg
->ucode_api_min
;
4779 u32 max_probe_length
= 200;
4780 u32 standard_phy_calibration_size
=
4781 IL_DEFAULT_STANDARD_PHY_CALIBRATE_TBL_SIZE
;
4783 memset(&pieces
, 0, sizeof(pieces
));
4786 if (il
->fw_idx
<= il
->cfg
->ucode_api_max
)
4787 IL_ERR("request for firmware file '%s' failed.\n",
4792 D_INFO("Loaded firmware file '%s' (%zd bytes).\n", il
->firmware_name
,
4795 /* Make sure that we got at least the API version number */
4796 if (ucode_raw
->size
< 4) {
4797 IL_ERR("File size way too small!\n");
4801 /* Data from ucode file: header followed by uCode images */
4802 ucode
= (struct il_ucode_header
*)ucode_raw
->data
;
4804 err
= il4965_load_firmware(il
, ucode_raw
, &pieces
);
4809 api_ver
= IL_UCODE_API(il
->ucode_ver
);
4812 * api_ver should match the api version forming part of the
4813 * firmware filename ... but we don't check for that and only rely
4814 * on the API version read from firmware header from here on forward
4816 if (api_ver
< api_min
|| api_ver
> api_max
) {
4817 IL_ERR("Driver unable to support your firmware API. "
4818 "Driver supports v%u, firmware is v%u.\n", api_max
,
4823 if (api_ver
!= api_max
)
4824 IL_ERR("Firmware has old API version. Expected v%u, "
4825 "got v%u. New firmware can be obtained "
4826 "from http://www.intellinuxwireless.org.\n", api_max
,
4829 IL_INFO("loaded firmware version %u.%u.%u.%u\n",
4830 IL_UCODE_MAJOR(il
->ucode_ver
), IL_UCODE_MINOR(il
->ucode_ver
),
4831 IL_UCODE_API(il
->ucode_ver
), IL_UCODE_SERIAL(il
->ucode_ver
));
4833 snprintf(il
->hw
->wiphy
->fw_version
, sizeof(il
->hw
->wiphy
->fw_version
),
4834 "%u.%u.%u.%u", IL_UCODE_MAJOR(il
->ucode_ver
),
4835 IL_UCODE_MINOR(il
->ucode_ver
), IL_UCODE_API(il
->ucode_ver
),
4836 IL_UCODE_SERIAL(il
->ucode_ver
));
4839 * For any of the failures below (before allocating pci memory)
4840 * we will try to load a version with a smaller API -- maybe the
4841 * user just got a corrupted version of the latest API.
4844 D_INFO("f/w package hdr ucode version raw = 0x%x\n", il
->ucode_ver
);
4845 D_INFO("f/w package hdr runtime inst size = %Zd\n", pieces
.inst_size
);
4846 D_INFO("f/w package hdr runtime data size = %Zd\n", pieces
.data_size
);
4847 D_INFO("f/w package hdr init inst size = %Zd\n", pieces
.init_size
);
4848 D_INFO("f/w package hdr init data size = %Zd\n", pieces
.init_data_size
);
4849 D_INFO("f/w package hdr boot inst size = %Zd\n", pieces
.boot_size
);
4851 /* Verify that uCode images will fit in card's SRAM */
4852 if (pieces
.inst_size
> il
->hw_params
.max_inst_size
) {
4853 IL_ERR("uCode instr len %Zd too large to fit in\n",
4858 if (pieces
.data_size
> il
->hw_params
.max_data_size
) {
4859 IL_ERR("uCode data len %Zd too large to fit in\n",
4864 if (pieces
.init_size
> il
->hw_params
.max_inst_size
) {
4865 IL_ERR("uCode init instr len %Zd too large to fit in\n",
4870 if (pieces
.init_data_size
> il
->hw_params
.max_data_size
) {
4871 IL_ERR("uCode init data len %Zd too large to fit in\n",
4872 pieces
.init_data_size
);
4876 if (pieces
.boot_size
> il
->hw_params
.max_bsm_size
) {
4877 IL_ERR("uCode boot instr len %Zd too large to fit in\n",
4882 /* Allocate ucode buffers for card's bus-master loading ... */
4884 /* Runtime instructions and 2 copies of data:
4885 * 1) unmodified from disk
4886 * 2) backup cache for save/restore during power-downs */
4887 il
->ucode_code
.len
= pieces
.inst_size
;
4888 il_alloc_fw_desc(il
->pci_dev
, &il
->ucode_code
);
4890 il
->ucode_data
.len
= pieces
.data_size
;
4891 il_alloc_fw_desc(il
->pci_dev
, &il
->ucode_data
);
4893 il
->ucode_data_backup
.len
= pieces
.data_size
;
4894 il_alloc_fw_desc(il
->pci_dev
, &il
->ucode_data_backup
);
4896 if (!il
->ucode_code
.v_addr
|| !il
->ucode_data
.v_addr
||
4897 !il
->ucode_data_backup
.v_addr
)
4900 /* Initialization instructions and data */
4901 if (pieces
.init_size
&& pieces
.init_data_size
) {
4902 il
->ucode_init
.len
= pieces
.init_size
;
4903 il_alloc_fw_desc(il
->pci_dev
, &il
->ucode_init
);
4905 il
->ucode_init_data
.len
= pieces
.init_data_size
;
4906 il_alloc_fw_desc(il
->pci_dev
, &il
->ucode_init_data
);
4908 if (!il
->ucode_init
.v_addr
|| !il
->ucode_init_data
.v_addr
)
4912 /* Bootstrap (instructions only, no data) */
4913 if (pieces
.boot_size
) {
4914 il
->ucode_boot
.len
= pieces
.boot_size
;
4915 il_alloc_fw_desc(il
->pci_dev
, &il
->ucode_boot
);
4917 if (!il
->ucode_boot
.v_addr
)
4921 /* Now that we can no longer fail, copy information */
4923 il
->sta_key_max_num
= STA_KEY_MAX_NUM
;
4925 /* Copy images into buffers for card's bus-master reads ... */
4927 /* Runtime instructions (first block of data in file) */
4928 D_INFO("Copying (but not loading) uCode instr len %Zd\n",
4930 memcpy(il
->ucode_code
.v_addr
, pieces
.inst
, pieces
.inst_size
);
4932 D_INFO("uCode instr buf vaddr = 0x%p, paddr = 0x%08x\n",
4933 il
->ucode_code
.v_addr
, (u32
) il
->ucode_code
.p_addr
);
4937 * NOTE: Copy into backup buffer will be done in il_up()
4939 D_INFO("Copying (but not loading) uCode data len %Zd\n",
4941 memcpy(il
->ucode_data
.v_addr
, pieces
.data
, pieces
.data_size
);
4942 memcpy(il
->ucode_data_backup
.v_addr
, pieces
.data
, pieces
.data_size
);
4944 /* Initialization instructions */
4945 if (pieces
.init_size
) {
4946 D_INFO("Copying (but not loading) init instr len %Zd\n",
4948 memcpy(il
->ucode_init
.v_addr
, pieces
.init
, pieces
.init_size
);
4951 /* Initialization data */
4952 if (pieces
.init_data_size
) {
4953 D_INFO("Copying (but not loading) init data len %Zd\n",
4954 pieces
.init_data_size
);
4955 memcpy(il
->ucode_init_data
.v_addr
, pieces
.init_data
,
4956 pieces
.init_data_size
);
4959 /* Bootstrap instructions */
4960 D_INFO("Copying (but not loading) boot instr len %Zd\n",
4962 memcpy(il
->ucode_boot
.v_addr
, pieces
.boot
, pieces
.boot_size
);
4965 * figure out the offset of chain noise reset and gain commands
4966 * base on the size of standard phy calibration commands table size
4968 il
->_4965
.phy_calib_chain_noise_reset_cmd
=
4969 standard_phy_calibration_size
;
4970 il
->_4965
.phy_calib_chain_noise_gain_cmd
=
4971 standard_phy_calibration_size
+ 1;
4973 /**************************************************
4974 * This is still part of probe() in a sense...
4976 * 9. Setup and register with mac80211 and debugfs
4977 **************************************************/
4978 err
= il4965_mac_setup_register(il
, max_probe_length
);
4982 err
= il_dbgfs_register(il
, DRV_NAME
);
4984 IL_ERR("failed to create debugfs files. Ignoring error: %d\n",
4987 err
= sysfs_create_group(&il
->pci_dev
->dev
.kobj
, &il_attribute_group
);
4989 IL_ERR("failed to create sysfs device attributes\n");
4993 /* We have our copies now, allow OS release its copies */
4994 release_firmware(ucode_raw
);
4995 complete(&il
->_4965
.firmware_loading_complete
);
4999 /* try next, if any */
5000 if (il4965_request_firmware(il
, false))
5002 release_firmware(ucode_raw
);
5006 IL_ERR("failed to allocate pci memory\n");
5007 il4965_dealloc_ucode_pci(il
);
5009 complete(&il
->_4965
.firmware_loading_complete
);
5010 device_release_driver(&il
->pci_dev
->dev
);
5011 release_firmware(ucode_raw
);
5014 static const char *const desc_lookup_text
[] = {
5019 "NMI_INTERRUPT_WDG",
5023 "HW_ERROR_TUNE_LOCK",
5024 "HW_ERROR_TEMPERATURE",
5025 "ILLEGAL_CHAN_FREQ",
5028 "NMI_INTERRUPT_HOST",
5029 "NMI_INTERRUPT_ACTION_PT",
5030 "NMI_INTERRUPT_UNKNOWN",
5031 "UCODE_VERSION_MISMATCH",
5032 "HW_ERROR_ABS_LOCK",
5033 "HW_ERROR_CAL_LOCK_FAIL",
5034 "NMI_INTERRUPT_INST_ACTION_PT",
5035 "NMI_INTERRUPT_DATA_ACTION_PT",
5037 "NMI_INTERRUPT_TRM",
5038 "NMI_INTERRUPT_BREAK_POINT",
5048 } advanced_lookup
[] = {
5050 "NMI_INTERRUPT_WDG", 0x34}, {
5051 "SYSASSERT", 0x35}, {
5052 "UCODE_VERSION_MISMATCH", 0x37}, {
5053 "BAD_COMMAND", 0x38}, {
5054 "NMI_INTERRUPT_DATA_ACTION_PT", 0x3C}, {
5055 "FATAL_ERROR", 0x3D}, {
5056 "NMI_TRM_HW_ERR", 0x46}, {
5057 "NMI_INTERRUPT_TRM", 0x4C}, {
5058 "NMI_INTERRUPT_BREAK_POINT", 0x54}, {
5059 "NMI_INTERRUPT_WDG_RXF_FULL", 0x5C}, {
5060 "NMI_INTERRUPT_WDG_NO_RBD_RXF_FULL", 0x64}, {
5061 "NMI_INTERRUPT_HOST", 0x66}, {
5062 "NMI_INTERRUPT_ACTION_PT", 0x7C}, {
5063 "NMI_INTERRUPT_UNKNOWN", 0x84}, {
5064 "NMI_INTERRUPT_INST_ACTION_PT", 0x86}, {
5065 "ADVANCED_SYSASSERT", 0},};
5068 il4965_desc_lookup(u32 num
)
5071 int max
= ARRAY_SIZE(desc_lookup_text
);
5074 return desc_lookup_text
[num
];
5076 max
= ARRAY_SIZE(advanced_lookup
) - 1;
5077 for (i
= 0; i
< max
; i
++) {
5078 if (advanced_lookup
[i
].num
== num
)
5081 return advanced_lookup
[i
].name
;
5084 #define ERROR_START_OFFSET (1 * sizeof(u32))
5085 #define ERROR_ELEM_SIZE (7 * sizeof(u32))
5088 il4965_dump_nic_error_log(struct il_priv
*il
)
5091 u32 desc
, time
, count
, base
, data1
;
5092 u32 blink1
, blink2
, ilink1
, ilink2
;
5095 if (il
->ucode_type
== UCODE_INIT
)
5096 base
= le32_to_cpu(il
->card_alive_init
.error_event_table_ptr
);
5098 base
= le32_to_cpu(il
->card_alive
.error_event_table_ptr
);
5100 if (!il
->ops
->is_valid_rtc_data_addr(base
)) {
5101 IL_ERR("Not valid error log pointer 0x%08X for %s uCode\n",
5102 base
, (il
->ucode_type
== UCODE_INIT
) ? "Init" : "RT");
5106 count
= il_read_targ_mem(il
, base
);
5108 if (ERROR_START_OFFSET
<= count
* ERROR_ELEM_SIZE
) {
5109 IL_ERR("Start IWL Error Log Dump:\n");
5110 IL_ERR("Status: 0x%08lX, count: %d\n", il
->status
, count
);
5113 desc
= il_read_targ_mem(il
, base
+ 1 * sizeof(u32
));
5114 il
->isr_stats
.err_code
= desc
;
5115 pc
= il_read_targ_mem(il
, base
+ 2 * sizeof(u32
));
5116 blink1
= il_read_targ_mem(il
, base
+ 3 * sizeof(u32
));
5117 blink2
= il_read_targ_mem(il
, base
+ 4 * sizeof(u32
));
5118 ilink1
= il_read_targ_mem(il
, base
+ 5 * sizeof(u32
));
5119 ilink2
= il_read_targ_mem(il
, base
+ 6 * sizeof(u32
));
5120 data1
= il_read_targ_mem(il
, base
+ 7 * sizeof(u32
));
5121 data2
= il_read_targ_mem(il
, base
+ 8 * sizeof(u32
));
5122 line
= il_read_targ_mem(il
, base
+ 9 * sizeof(u32
));
5123 time
= il_read_targ_mem(il
, base
+ 11 * sizeof(u32
));
5124 hcmd
= il_read_targ_mem(il
, base
+ 22 * sizeof(u32
));
5127 "data1 data2 line\n");
5128 IL_ERR("%-28s (0x%04X) %010u 0x%08X 0x%08X %u\n",
5129 il4965_desc_lookup(desc
), desc
, time
, data1
, data2
, line
);
5130 IL_ERR("pc blink1 blink2 ilink1 ilink2 hcmd\n");
5131 IL_ERR("0x%05X 0x%05X 0x%05X 0x%05X 0x%05X 0x%05X\n", pc
, blink1
,
5132 blink2
, ilink1
, ilink2
, hcmd
);
5136 il4965_rf_kill_ct_config(struct il_priv
*il
)
5138 struct il_ct_kill_config cmd
;
5139 unsigned long flags
;
5142 spin_lock_irqsave(&il
->lock
, flags
);
5143 _il_wr(il
, CSR_UCODE_DRV_GP1_CLR
,
5144 CSR_UCODE_DRV_GP1_REG_BIT_CT_KILL_EXIT
);
5145 spin_unlock_irqrestore(&il
->lock
, flags
);
5147 cmd
.critical_temperature_R
=
5148 cpu_to_le32(il
->hw_params
.ct_kill_threshold
);
5150 ret
= il_send_cmd_pdu(il
, C_CT_KILL_CONFIG
, sizeof(cmd
), &cmd
);
5152 IL_ERR("C_CT_KILL_CONFIG failed\n");
5154 D_INFO("C_CT_KILL_CONFIG " "succeeded, "
5155 "critical temperature is %d\n",
5156 il
->hw_params
.ct_kill_threshold
);
5159 static const s8 default_queue_to_tx_fifo
[] = {
5169 #define IL_MASK(lo, hi) ((1 << (hi)) | ((1 << (hi)) - (1 << (lo))))
5172 il4965_alive_notify(struct il_priv
*il
)
5175 unsigned long flags
;
5179 spin_lock_irqsave(&il
->lock
, flags
);
5181 /* Clear 4965's internal Tx Scheduler data base */
5182 il
->scd_base_addr
= il_rd_prph(il
, IL49_SCD_SRAM_BASE_ADDR
);
5183 a
= il
->scd_base_addr
+ IL49_SCD_CONTEXT_DATA_OFFSET
;
5184 for (; a
< il
->scd_base_addr
+ IL49_SCD_TX_STTS_BITMAP_OFFSET
; a
+= 4)
5185 il_write_targ_mem(il
, a
, 0);
5186 for (; a
< il
->scd_base_addr
+ IL49_SCD_TRANSLATE_TBL_OFFSET
; a
+= 4)
5187 il_write_targ_mem(il
, a
, 0);
5191 IL49_SCD_TRANSLATE_TBL_OFFSET_QUEUE(il
->hw_params
.max_txq_num
);
5193 il_write_targ_mem(il
, a
, 0);
5195 /* Tel 4965 where to find Tx byte count tables */
5196 il_wr_prph(il
, IL49_SCD_DRAM_BASE_ADDR
, il
->scd_bc_tbls
.dma
>> 10);
5198 /* Enable DMA channel */
5199 for (chan
= 0; chan
< FH49_TCSR_CHNL_NUM
; chan
++)
5200 il_wr(il
, FH49_TCSR_CHNL_TX_CONFIG_REG(chan
),
5201 FH49_TCSR_TX_CONFIG_REG_VAL_DMA_CHNL_ENABLE
|
5202 FH49_TCSR_TX_CONFIG_REG_VAL_DMA_CREDIT_ENABLE
);
5204 /* Update FH chicken bits */
5205 reg_val
= il_rd(il
, FH49_TX_CHICKEN_BITS_REG
);
5206 il_wr(il
, FH49_TX_CHICKEN_BITS_REG
,
5207 reg_val
| FH49_TX_CHICKEN_BITS_SCD_AUTO_RETRY_EN
);
5209 /* Disable chain mode for all queues */
5210 il_wr_prph(il
, IL49_SCD_QUEUECHAIN_SEL
, 0);
5212 /* Initialize each Tx queue (including the command queue) */
5213 for (i
= 0; i
< il
->hw_params
.max_txq_num
; i
++) {
5215 /* TFD circular buffer read/write idxes */
5216 il_wr_prph(il
, IL49_SCD_QUEUE_RDPTR(i
), 0);
5217 il_wr(il
, HBUS_TARG_WRPTR
, 0 | (i
<< 8));
5219 /* Max Tx Window size for Scheduler-ACK mode */
5220 il_write_targ_mem(il
,
5222 IL49_SCD_CONTEXT_QUEUE_OFFSET(i
),
5224 IL49_SCD_QUEUE_CTX_REG1_WIN_SIZE_POS
) &
5225 IL49_SCD_QUEUE_CTX_REG1_WIN_SIZE_MSK
);
5228 il_write_targ_mem(il
,
5230 IL49_SCD_CONTEXT_QUEUE_OFFSET(i
) +
5233 IL49_SCD_QUEUE_CTX_REG2_FRAME_LIMIT_POS
) &
5234 IL49_SCD_QUEUE_CTX_REG2_FRAME_LIMIT_MSK
);
5237 il_wr_prph(il
, IL49_SCD_INTERRUPT_MASK
,
5238 (1 << il
->hw_params
.max_txq_num
) - 1);
5240 /* Activate all Tx DMA/FIFO channels */
5241 il4965_txq_set_sched(il
, IL_MASK(0, 6));
5243 il4965_set_wr_ptrs(il
, IL_DEFAULT_CMD_QUEUE_NUM
, 0);
5245 /* make sure all queue are not stopped */
5246 memset(&il
->queue_stopped
[0], 0, sizeof(il
->queue_stopped
));
5247 for (i
= 0; i
< 4; i
++)
5248 atomic_set(&il
->queue_stop_count
[i
], 0);
5250 /* reset to 0 to enable all the queue first */
5251 il
->txq_ctx_active_msk
= 0;
5252 /* Map each Tx/cmd queue to its corresponding fifo */
5253 BUILD_BUG_ON(ARRAY_SIZE(default_queue_to_tx_fifo
) != 7);
5255 for (i
= 0; i
< ARRAY_SIZE(default_queue_to_tx_fifo
); i
++) {
5256 int ac
= default_queue_to_tx_fifo
[i
];
5258 il_txq_ctx_activate(il
, i
);
5260 if (ac
== IL_TX_FIFO_UNUSED
)
5263 il4965_tx_queue_set_status(il
, &il
->txq
[i
], ac
, 0);
5266 spin_unlock_irqrestore(&il
->lock
, flags
);
5272 * il4965_alive_start - called after N_ALIVE notification received
5273 * from protocol/runtime uCode (initialization uCode's
5274 * Alive gets handled by il_init_alive_start()).
5277 il4965_alive_start(struct il_priv
*il
)
5281 D_INFO("Runtime Alive received.\n");
5283 if (il
->card_alive
.is_valid
!= UCODE_VALID_OK
) {
5284 /* We had an error bringing up the hardware, so take it
5285 * all the way back down so we can try again */
5286 D_INFO("Alive failed.\n");
5290 /* Initialize uCode has loaded Runtime uCode ... verify inst image.
5291 * This is a paranoid check, because we would not have gotten the
5292 * "runtime" alive if code weren't properly loaded. */
5293 if (il4965_verify_ucode(il
)) {
5294 /* Runtime instruction load was bad;
5295 * take it all the way back down so we can try again */
5296 D_INFO("Bad runtime uCode load.\n");
5300 ret
= il4965_alive_notify(il
);
5302 IL_WARN("Could not complete ALIVE transition [ntf]: %d\n", ret
);
5306 /* After the ALIVE response, we can send host commands to the uCode */
5307 set_bit(S_ALIVE
, &il
->status
);
5309 /* Enable watchdog to monitor the driver tx queues */
5310 il_setup_watchdog(il
);
5312 if (il_is_rfkill(il
))
5315 ieee80211_wake_queues(il
->hw
);
5317 il
->active_rate
= RATES_MASK
;
5319 if (il_is_associated(il
)) {
5320 struct il_rxon_cmd
*active_rxon
=
5321 (struct il_rxon_cmd
*)&il
->active
;
5322 /* apply any changes in staging */
5323 il
->staging
.filter_flags
|= RXON_FILTER_ASSOC_MSK
;
5324 active_rxon
->filter_flags
&= ~RXON_FILTER_ASSOC_MSK
;
5326 /* Initialize our rx_config data */
5327 il_connection_init_rx_config(il
);
5329 if (il
->ops
->set_rxon_chain
)
5330 il
->ops
->set_rxon_chain(il
);
5333 /* Configure bluetooth coexistence if enabled */
5334 il_send_bt_config(il
);
5336 il4965_reset_run_time_calib(il
);
5338 set_bit(S_READY
, &il
->status
);
5340 /* Configure the adapter for unassociated operation */
5343 /* At this point, the NIC is initialized and operational */
5344 il4965_rf_kill_ct_config(il
);
5346 D_INFO("ALIVE processing complete.\n");
5347 wake_up(&il
->wait_command_queue
);
5349 il_power_update_mode(il
, true);
5350 D_INFO("Updated power mode\n");
5355 queue_work(il
->workqueue
, &il
->restart
);
5358 static void il4965_cancel_deferred_work(struct il_priv
*il
);
5361 __il4965_down(struct il_priv
*il
)
5363 unsigned long flags
;
5366 D_INFO(DRV_NAME
" is going down\n");
5368 il_scan_cancel_timeout(il
, 200);
5370 exit_pending
= test_and_set_bit(S_EXIT_PENDING
, &il
->status
);
5372 /* Stop TX queues watchdog. We need to have S_EXIT_PENDING bit set
5373 * to prevent rearm timer */
5374 del_timer_sync(&il
->watchdog
);
5376 il_clear_ucode_stations(il
);
5378 /* FIXME: race conditions ? */
5379 spin_lock_irq(&il
->sta_lock
);
5381 * Remove all key information that is not stored as part
5382 * of station information since mac80211 may not have had
5383 * a chance to remove all the keys. When device is
5384 * reconfigured by mac80211 after an error all keys will
5387 memset(il
->_4965
.wep_keys
, 0, sizeof(il
->_4965
.wep_keys
));
5388 il
->_4965
.key_mapping_keys
= 0;
5389 spin_unlock_irq(&il
->sta_lock
);
5391 il_dealloc_bcast_stations(il
);
5392 il_clear_driver_stations(il
);
5394 /* Unblock any waiting calls */
5395 wake_up_all(&il
->wait_command_queue
);
5397 /* Wipe out the EXIT_PENDING status bit if we are not actually
5398 * exiting the module */
5400 clear_bit(S_EXIT_PENDING
, &il
->status
);
5402 /* stop and reset the on-board processor */
5403 _il_wr(il
, CSR_RESET
, CSR_RESET_REG_FLAG_NEVO_RESET
);
5405 /* tell the device to stop sending interrupts */
5406 spin_lock_irqsave(&il
->lock
, flags
);
5407 il_disable_interrupts(il
);
5408 spin_unlock_irqrestore(&il
->lock
, flags
);
5409 il4965_synchronize_irq(il
);
5411 if (il
->mac80211_registered
)
5412 ieee80211_stop_queues(il
->hw
);
5414 /* If we have not previously called il_init() then
5415 * clear all bits but the RF Kill bit and return */
5416 if (!il_is_init(il
)) {
5418 test_bit(S_RFKILL
, &il
->status
) << S_RFKILL
|
5419 test_bit(S_GEO_CONFIGURED
, &il
->status
) << S_GEO_CONFIGURED
|
5420 test_bit(S_EXIT_PENDING
, &il
->status
) << S_EXIT_PENDING
;
5424 /* ...otherwise clear out all the status bits but the RF Kill
5425 * bit and continue taking the NIC down. */
5427 test_bit(S_RFKILL
, &il
->status
) << S_RFKILL
|
5428 test_bit(S_GEO_CONFIGURED
, &il
->status
) << S_GEO_CONFIGURED
|
5429 test_bit(S_FW_ERROR
, &il
->status
) << S_FW_ERROR
|
5430 test_bit(S_EXIT_PENDING
, &il
->status
) << S_EXIT_PENDING
;
5433 * We disabled and synchronized interrupt, and priv->mutex is taken, so
5434 * here is the only thread which will program device registers, but
5435 * still have lockdep assertions, so we are taking reg_lock.
5437 spin_lock_irq(&il
->reg_lock
);
5438 /* FIXME: il_grab_nic_access if rfkill is off ? */
5440 il4965_txq_ctx_stop(il
);
5441 il4965_rxq_stop(il
);
5442 /* Power-down device's busmaster DMA clocks */
5443 _il_wr_prph(il
, APMG_CLK_DIS_REG
, APMG_CLK_VAL_DMA_CLK_RQT
);
5445 /* Make sure (redundant) we've released our request to stay awake */
5446 _il_clear_bit(il
, CSR_GP_CNTRL
, CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ
);
5447 /* Stop the device, and put it in low power state */
5450 spin_unlock_irq(&il
->reg_lock
);
5452 il4965_txq_ctx_unmap(il
);
5454 memset(&il
->card_alive
, 0, sizeof(struct il_alive_resp
));
5456 dev_kfree_skb(il
->beacon_skb
);
5457 il
->beacon_skb
= NULL
;
5459 /* clear out any free frames */
5460 il4965_clear_free_frames(il
);
5464 il4965_down(struct il_priv
*il
)
5466 mutex_lock(&il
->mutex
);
5468 mutex_unlock(&il
->mutex
);
5470 il4965_cancel_deferred_work(il
);
5475 il4965_set_hw_ready(struct il_priv
*il
)
5479 il_set_bit(il
, CSR_HW_IF_CONFIG_REG
,
5480 CSR_HW_IF_CONFIG_REG_BIT_NIC_READY
);
5482 /* See if we got it */
5483 ret
= _il_poll_bit(il
, CSR_HW_IF_CONFIG_REG
,
5484 CSR_HW_IF_CONFIG_REG_BIT_NIC_READY
,
5485 CSR_HW_IF_CONFIG_REG_BIT_NIC_READY
,
5488 il
->hw_ready
= true;
5490 D_INFO("hardware %s ready\n", (il
->hw_ready
) ? "" : "not");
5494 il4965_prepare_card_hw(struct il_priv
*il
)
5498 il
->hw_ready
= false;
5500 il4965_set_hw_ready(il
);
5504 /* If HW is not ready, prepare the conditions to check again */
5505 il_set_bit(il
, CSR_HW_IF_CONFIG_REG
, CSR_HW_IF_CONFIG_REG_PREPARE
);
5508 _il_poll_bit(il
, CSR_HW_IF_CONFIG_REG
,
5509 ~CSR_HW_IF_CONFIG_REG_BIT_NIC_PREPARE_DONE
,
5510 CSR_HW_IF_CONFIG_REG_BIT_NIC_PREPARE_DONE
, 150000);
5512 /* HW should be ready by now, check again. */
5513 if (ret
!= -ETIMEDOUT
)
5514 il4965_set_hw_ready(il
);
5517 #define MAX_HW_RESTARTS 5
5520 __il4965_up(struct il_priv
*il
)
5525 if (test_bit(S_EXIT_PENDING
, &il
->status
)) {
5526 IL_WARN("Exit pending; will not bring the NIC up\n");
5530 if (!il
->ucode_data_backup
.v_addr
|| !il
->ucode_data
.v_addr
) {
5531 IL_ERR("ucode not available for device bringup\n");
5535 ret
= il4965_alloc_bcast_station(il
);
5537 il_dealloc_bcast_stations(il
);
5541 il4965_prepare_card_hw(il
);
5542 if (!il
->hw_ready
) {
5543 IL_ERR("HW not ready\n");
5547 /* If platform's RF_KILL switch is NOT set to KILL */
5548 if (_il_rd(il
, CSR_GP_CNTRL
) & CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW
)
5549 clear_bit(S_RFKILL
, &il
->status
);
5551 set_bit(S_RFKILL
, &il
->status
);
5552 wiphy_rfkill_set_hw_state(il
->hw
->wiphy
, true);
5554 il_enable_rfkill_int(il
);
5555 IL_WARN("Radio disabled by HW RF Kill switch\n");
5559 _il_wr(il
, CSR_INT
, 0xFFFFFFFF);
5561 /* must be initialised before il_hw_nic_init */
5562 il
->cmd_queue
= IL_DEFAULT_CMD_QUEUE_NUM
;
5564 ret
= il4965_hw_nic_init(il
);
5566 IL_ERR("Unable to init nic\n");
5570 /* make sure rfkill handshake bits are cleared */
5571 _il_wr(il
, CSR_UCODE_DRV_GP1_CLR
, CSR_UCODE_SW_BIT_RFKILL
);
5572 _il_wr(il
, CSR_UCODE_DRV_GP1_CLR
, CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED
);
5574 /* clear (again), then enable host interrupts */
5575 _il_wr(il
, CSR_INT
, 0xFFFFFFFF);
5576 il_enable_interrupts(il
);
5578 /* really make sure rfkill handshake bits are cleared */
5579 _il_wr(il
, CSR_UCODE_DRV_GP1_CLR
, CSR_UCODE_SW_BIT_RFKILL
);
5580 _il_wr(il
, CSR_UCODE_DRV_GP1_CLR
, CSR_UCODE_SW_BIT_RFKILL
);
5582 /* Copy original ucode data image from disk into backup cache.
5583 * This will be used to initialize the on-board processor's
5584 * data SRAM for a clean start when the runtime program first loads. */
5585 memcpy(il
->ucode_data_backup
.v_addr
, il
->ucode_data
.v_addr
,
5586 il
->ucode_data
.len
);
5588 for (i
= 0; i
< MAX_HW_RESTARTS
; i
++) {
5590 /* load bootstrap state machine,
5591 * load bootstrap program into processor's memory,
5592 * prepare to load the "initialize" uCode */
5593 ret
= il
->ops
->load_ucode(il
);
5596 IL_ERR("Unable to set up bootstrap uCode: %d\n", ret
);
5600 /* start card; "initialize" will load runtime ucode */
5601 il4965_nic_start(il
);
5603 D_INFO(DRV_NAME
" is coming up\n");
5608 set_bit(S_EXIT_PENDING
, &il
->status
);
5610 clear_bit(S_EXIT_PENDING
, &il
->status
);
5612 /* tried to restart and config the device for as long as our
5613 * patience could withstand */
5614 IL_ERR("Unable to initialize device after %d attempts.\n", i
);
5618 /*****************************************************************************
5620 * Workqueue callbacks
5622 *****************************************************************************/
5625 il4965_bg_init_alive_start(struct work_struct
*data
)
5627 struct il_priv
*il
=
5628 container_of(data
, struct il_priv
, init_alive_start
.work
);
5630 mutex_lock(&il
->mutex
);
5631 if (test_bit(S_EXIT_PENDING
, &il
->status
))
5634 il
->ops
->init_alive_start(il
);
5636 mutex_unlock(&il
->mutex
);
5640 il4965_bg_alive_start(struct work_struct
*data
)
5642 struct il_priv
*il
=
5643 container_of(data
, struct il_priv
, alive_start
.work
);
5645 mutex_lock(&il
->mutex
);
5646 if (test_bit(S_EXIT_PENDING
, &il
->status
))
5649 il4965_alive_start(il
);
5651 mutex_unlock(&il
->mutex
);
5655 il4965_bg_run_time_calib_work(struct work_struct
*work
)
5657 struct il_priv
*il
= container_of(work
, struct il_priv
,
5658 run_time_calib_work
);
5660 mutex_lock(&il
->mutex
);
5662 if (test_bit(S_EXIT_PENDING
, &il
->status
) ||
5663 test_bit(S_SCANNING
, &il
->status
)) {
5664 mutex_unlock(&il
->mutex
);
5668 if (il
->start_calib
) {
5669 il4965_chain_noise_calibration(il
, (void *)&il
->_4965
.stats
);
5670 il4965_sensitivity_calibration(il
, (void *)&il
->_4965
.stats
);
5673 mutex_unlock(&il
->mutex
);
5677 il4965_bg_restart(struct work_struct
*data
)
5679 struct il_priv
*il
= container_of(data
, struct il_priv
, restart
);
5681 if (test_bit(S_EXIT_PENDING
, &il
->status
))
5684 if (test_and_clear_bit(S_FW_ERROR
, &il
->status
)) {
5685 mutex_lock(&il
->mutex
);
5690 mutex_unlock(&il
->mutex
);
5691 il4965_cancel_deferred_work(il
);
5692 ieee80211_restart_hw(il
->hw
);
5696 mutex_lock(&il
->mutex
);
5697 if (test_bit(S_EXIT_PENDING
, &il
->status
)) {
5698 mutex_unlock(&il
->mutex
);
5703 mutex_unlock(&il
->mutex
);
5708 il4965_bg_rx_replenish(struct work_struct
*data
)
5710 struct il_priv
*il
= container_of(data
, struct il_priv
, rx_replenish
);
5712 if (test_bit(S_EXIT_PENDING
, &il
->status
))
5715 mutex_lock(&il
->mutex
);
5716 il4965_rx_replenish(il
);
5717 mutex_unlock(&il
->mutex
);
5720 /*****************************************************************************
5722 * mac80211 entry point functions
5724 *****************************************************************************/
5726 #define UCODE_READY_TIMEOUT (4 * HZ)
5729 * Not a mac80211 entry point function, but it fits in with all the
5730 * other mac80211 functions grouped here.
5733 il4965_mac_setup_register(struct il_priv
*il
, u32 max_probe_length
)
5736 struct ieee80211_hw
*hw
= il
->hw
;
5738 hw
->rate_control_algorithm
= "iwl-4965-rs";
5740 /* Tell mac80211 our characteristics */
5742 IEEE80211_HW_SIGNAL_DBM
| IEEE80211_HW_AMPDU_AGGREGATION
|
5743 IEEE80211_HW_NEED_DTIM_BEFORE_ASSOC
| IEEE80211_HW_SPECTRUM_MGMT
|
5744 IEEE80211_HW_SUPPORTS_PS
| IEEE80211_HW_SUPPORTS_DYNAMIC_PS
;
5745 if (il
->cfg
->sku
& IL_SKU_N
)
5747 IEEE80211_HW_SUPPORTS_DYNAMIC_SMPS
|
5748 IEEE80211_HW_SUPPORTS_STATIC_SMPS
;
5750 hw
->sta_data_size
= sizeof(struct il_station_priv
);
5751 hw
->vif_data_size
= sizeof(struct il_vif_priv
);
5753 hw
->wiphy
->interface_modes
=
5754 BIT(NL80211_IFTYPE_STATION
) | BIT(NL80211_IFTYPE_ADHOC
);
5757 WIPHY_FLAG_CUSTOM_REGULATORY
| WIPHY_FLAG_DISABLE_BEACON_HINTS
|
5758 WIPHY_FLAG_IBSS_RSN
;
5761 * For now, disable PS by default because it affects
5762 * RX performance significantly.
5764 hw
->wiphy
->flags
&= ~WIPHY_FLAG_PS_ON_BY_DEFAULT
;
5766 hw
->wiphy
->max_scan_ssids
= PROBE_OPTION_MAX
;
5767 /* we create the 802.11 header and a zero-length SSID element */
5768 hw
->wiphy
->max_scan_ie_len
= max_probe_length
- 24 - 2;
5770 /* Default value; 4 EDCA QOS priorities */
5773 hw
->max_listen_interval
= IL_CONN_MAX_LISTEN_INTERVAL
;
5775 if (il
->bands
[IEEE80211_BAND_2GHZ
].n_channels
)
5776 il
->hw
->wiphy
->bands
[IEEE80211_BAND_2GHZ
] =
5777 &il
->bands
[IEEE80211_BAND_2GHZ
];
5778 if (il
->bands
[IEEE80211_BAND_5GHZ
].n_channels
)
5779 il
->hw
->wiphy
->bands
[IEEE80211_BAND_5GHZ
] =
5780 &il
->bands
[IEEE80211_BAND_5GHZ
];
5784 ret
= ieee80211_register_hw(il
->hw
);
5786 IL_ERR("Failed to register hw (error %d)\n", ret
);
5789 il
->mac80211_registered
= 1;
5795 il4965_mac_start(struct ieee80211_hw
*hw
)
5797 struct il_priv
*il
= hw
->priv
;
5800 D_MAC80211("enter\n");
5802 /* we should be verifying the device is ready to be opened */
5803 mutex_lock(&il
->mutex
);
5804 ret
= __il4965_up(il
);
5805 mutex_unlock(&il
->mutex
);
5810 if (il_is_rfkill(il
))
5813 D_INFO("Start UP work done.\n");
5815 /* Wait for START_ALIVE from Run Time ucode. Otherwise callbacks from
5816 * mac80211 will not be run successfully. */
5817 ret
= wait_event_timeout(il
->wait_command_queue
,
5818 test_bit(S_READY
, &il
->status
),
5819 UCODE_READY_TIMEOUT
);
5821 if (!test_bit(S_READY
, &il
->status
)) {
5822 IL_ERR("START_ALIVE timeout after %dms.\n",
5823 jiffies_to_msecs(UCODE_READY_TIMEOUT
));
5828 il4965_led_enable(il
);
5832 D_MAC80211("leave\n");
5837 il4965_mac_stop(struct ieee80211_hw
*hw
)
5839 struct il_priv
*il
= hw
->priv
;
5841 D_MAC80211("enter\n");
5850 flush_workqueue(il
->workqueue
);
5852 /* User space software may expect getting rfkill changes
5853 * even if interface is down */
5854 _il_wr(il
, CSR_INT
, 0xFFFFFFFF);
5855 il_enable_rfkill_int(il
);
5857 D_MAC80211("leave\n");
5861 il4965_mac_tx(struct ieee80211_hw
*hw
,
5862 struct ieee80211_tx_control
*control
,
5863 struct sk_buff
*skb
)
5865 struct il_priv
*il
= hw
->priv
;
5867 D_MACDUMP("enter\n");
5869 D_TX("dev->xmit(%d bytes) at rate 0x%02x\n", skb
->len
,
5870 ieee80211_get_tx_rate(hw
, IEEE80211_SKB_CB(skb
))->bitrate
);
5872 if (il4965_tx_skb(il
, control
->sta
, skb
))
5873 dev_kfree_skb_any(skb
);
5875 D_MACDUMP("leave\n");
5879 il4965_mac_update_tkip_key(struct ieee80211_hw
*hw
, struct ieee80211_vif
*vif
,
5880 struct ieee80211_key_conf
*keyconf
,
5881 struct ieee80211_sta
*sta
, u32 iv32
, u16
* phase1key
)
5883 struct il_priv
*il
= hw
->priv
;
5885 D_MAC80211("enter\n");
5887 il4965_update_tkip_key(il
, keyconf
, sta
, iv32
, phase1key
);
5889 D_MAC80211("leave\n");
5893 il4965_mac_set_key(struct ieee80211_hw
*hw
, enum set_key_cmd cmd
,
5894 struct ieee80211_vif
*vif
, struct ieee80211_sta
*sta
,
5895 struct ieee80211_key_conf
*key
)
5897 struct il_priv
*il
= hw
->priv
;
5900 bool is_default_wep_key
= false;
5902 D_MAC80211("enter\n");
5904 if (il
->cfg
->mod_params
->sw_crypto
) {
5905 D_MAC80211("leave - hwcrypto disabled\n");
5910 * To support IBSS RSN, don't program group keys in IBSS, the
5911 * hardware will then not attempt to decrypt the frames.
5913 if (vif
->type
== NL80211_IFTYPE_ADHOC
&&
5914 !(key
->flags
& IEEE80211_KEY_FLAG_PAIRWISE
)) {
5915 D_MAC80211("leave - ad-hoc group key\n");
5919 sta_id
= il_sta_id_or_broadcast(il
, sta
);
5920 if (sta_id
== IL_INVALID_STATION
)
5923 mutex_lock(&il
->mutex
);
5924 il_scan_cancel_timeout(il
, 100);
5927 * If we are getting WEP group key and we didn't receive any key mapping
5928 * so far, we are in legacy wep mode (group key only), otherwise we are
5930 * In legacy wep mode, we use another host command to the uCode.
5932 if ((key
->cipher
== WLAN_CIPHER_SUITE_WEP40
||
5933 key
->cipher
== WLAN_CIPHER_SUITE_WEP104
) && !sta
) {
5935 is_default_wep_key
= !il
->_4965
.key_mapping_keys
;
5937 is_default_wep_key
=
5938 (key
->hw_key_idx
== HW_KEY_DEFAULT
);
5943 if (is_default_wep_key
)
5944 ret
= il4965_set_default_wep_key(il
, key
);
5946 ret
= il4965_set_dynamic_key(il
, key
, sta_id
);
5948 D_MAC80211("enable hwcrypto key\n");
5951 if (is_default_wep_key
)
5952 ret
= il4965_remove_default_wep_key(il
, key
);
5954 ret
= il4965_remove_dynamic_key(il
, key
, sta_id
);
5956 D_MAC80211("disable hwcrypto key\n");
5962 mutex_unlock(&il
->mutex
);
5963 D_MAC80211("leave\n");
5969 il4965_mac_ampdu_action(struct ieee80211_hw
*hw
, struct ieee80211_vif
*vif
,
5970 enum ieee80211_ampdu_mlme_action action
,
5971 struct ieee80211_sta
*sta
, u16 tid
, u16
* ssn
,
5974 struct il_priv
*il
= hw
->priv
;
5977 D_HT("A-MPDU action on addr %pM tid %d\n", sta
->addr
, tid
);
5979 if (!(il
->cfg
->sku
& IL_SKU_N
))
5982 mutex_lock(&il
->mutex
);
5985 case IEEE80211_AMPDU_RX_START
:
5987 ret
= il4965_sta_rx_agg_start(il
, sta
, tid
, *ssn
);
5989 case IEEE80211_AMPDU_RX_STOP
:
5991 ret
= il4965_sta_rx_agg_stop(il
, sta
, tid
);
5992 if (test_bit(S_EXIT_PENDING
, &il
->status
))
5995 case IEEE80211_AMPDU_TX_START
:
5997 ret
= il4965_tx_agg_start(il
, vif
, sta
, tid
, ssn
);
5999 case IEEE80211_AMPDU_TX_STOP_CONT
:
6000 case IEEE80211_AMPDU_TX_STOP_FLUSH
:
6001 case IEEE80211_AMPDU_TX_STOP_FLUSH_CONT
:
6003 ret
= il4965_tx_agg_stop(il
, vif
, sta
, tid
);
6004 if (test_bit(S_EXIT_PENDING
, &il
->status
))
6007 case IEEE80211_AMPDU_TX_OPERATIONAL
:
6011 mutex_unlock(&il
->mutex
);
6017 il4965_mac_sta_add(struct ieee80211_hw
*hw
, struct ieee80211_vif
*vif
,
6018 struct ieee80211_sta
*sta
)
6020 struct il_priv
*il
= hw
->priv
;
6021 struct il_station_priv
*sta_priv
= (void *)sta
->drv_priv
;
6022 bool is_ap
= vif
->type
== NL80211_IFTYPE_STATION
;
6026 D_INFO("received request to add station %pM\n", sta
->addr
);
6027 mutex_lock(&il
->mutex
);
6028 D_INFO("proceeding to add station %pM\n", sta
->addr
);
6029 sta_priv
->common
.sta_id
= IL_INVALID_STATION
;
6031 atomic_set(&sta_priv
->pending_frames
, 0);
6034 il_add_station_common(il
, sta
->addr
, is_ap
, sta
, &sta_id
);
6036 IL_ERR("Unable to add station %pM (%d)\n", sta
->addr
, ret
);
6037 /* Should we return success if return code is EEXIST ? */
6038 mutex_unlock(&il
->mutex
);
6042 sta_priv
->common
.sta_id
= sta_id
;
6044 /* Initialize rate scaling */
6045 D_INFO("Initializing rate scaling for station %pM\n", sta
->addr
);
6046 il4965_rs_rate_init(il
, sta
, sta_id
);
6047 mutex_unlock(&il
->mutex
);
6053 il4965_mac_channel_switch(struct ieee80211_hw
*hw
,
6054 struct ieee80211_channel_switch
*ch_switch
)
6056 struct il_priv
*il
= hw
->priv
;
6057 const struct il_channel_info
*ch_info
;
6058 struct ieee80211_conf
*conf
= &hw
->conf
;
6059 struct ieee80211_channel
*channel
= ch_switch
->chandef
.chan
;
6060 struct il_ht_config
*ht_conf
= &il
->current_ht_config
;
6063 D_MAC80211("enter\n");
6065 mutex_lock(&il
->mutex
);
6067 if (il_is_rfkill(il
))
6070 if (test_bit(S_EXIT_PENDING
, &il
->status
) ||
6071 test_bit(S_SCANNING
, &il
->status
) ||
6072 test_bit(S_CHANNEL_SWITCH_PENDING
, &il
->status
))
6075 if (!il_is_associated(il
))
6078 if (!il
->ops
->set_channel_switch
)
6081 ch
= channel
->hw_value
;
6082 if (le16_to_cpu(il
->active
.channel
) == ch
)
6085 ch_info
= il_get_channel_info(il
, channel
->band
, ch
);
6086 if (!il_is_channel_valid(ch_info
)) {
6087 D_MAC80211("invalid channel\n");
6091 spin_lock_irq(&il
->lock
);
6093 il
->current_ht_config
.smps
= conf
->smps_mode
;
6095 /* Configure HT40 channels */
6096 switch (cfg80211_get_chandef_type(&ch_switch
->chandef
)) {
6097 case NL80211_CHAN_NO_HT
:
6098 case NL80211_CHAN_HT20
:
6099 il
->ht
.is_40mhz
= false;
6100 il
->ht
.extension_chan_offset
= IEEE80211_HT_PARAM_CHA_SEC_NONE
;
6102 case NL80211_CHAN_HT40MINUS
:
6103 il
->ht
.extension_chan_offset
= IEEE80211_HT_PARAM_CHA_SEC_BELOW
;
6104 il
->ht
.is_40mhz
= true;
6106 case NL80211_CHAN_HT40PLUS
:
6107 il
->ht
.extension_chan_offset
= IEEE80211_HT_PARAM_CHA_SEC_ABOVE
;
6108 il
->ht
.is_40mhz
= true;
6112 if ((le16_to_cpu(il
->staging
.channel
) != ch
))
6113 il
->staging
.flags
= 0;
6115 il_set_rxon_channel(il
, channel
);
6116 il_set_rxon_ht(il
, ht_conf
);
6117 il_set_flags_for_band(il
, channel
->band
, il
->vif
);
6119 spin_unlock_irq(&il
->lock
);
6123 * at this point, staging_rxon has the
6124 * configuration for channel switch
6126 set_bit(S_CHANNEL_SWITCH_PENDING
, &il
->status
);
6127 il
->switch_channel
= cpu_to_le16(ch
);
6128 if (il
->ops
->set_channel_switch(il
, ch_switch
)) {
6129 clear_bit(S_CHANNEL_SWITCH_PENDING
, &il
->status
);
6130 il
->switch_channel
= 0;
6131 ieee80211_chswitch_done(il
->vif
, false);
6135 mutex_unlock(&il
->mutex
);
6136 D_MAC80211("leave\n");
6140 il4965_configure_filter(struct ieee80211_hw
*hw
, unsigned int changed_flags
,
6141 unsigned int *total_flags
, u64 multicast
)
6143 struct il_priv
*il
= hw
->priv
;
6144 __le32 filter_or
= 0, filter_nand
= 0;
6146 #define CHK(test, flag) do { \
6147 if (*total_flags & (test)) \
6148 filter_or |= (flag); \
6150 filter_nand |= (flag); \
6153 D_MAC80211("Enter: changed: 0x%x, total: 0x%x\n", changed_flags
,
6156 CHK(FIF_OTHER_BSS
| FIF_PROMISC_IN_BSS
, RXON_FILTER_PROMISC_MSK
);
6157 /* Setting _just_ RXON_FILTER_CTL2HOST_MSK causes FH errors */
6158 CHK(FIF_CONTROL
, RXON_FILTER_CTL2HOST_MSK
| RXON_FILTER_PROMISC_MSK
);
6159 CHK(FIF_BCN_PRBRESP_PROMISC
, RXON_FILTER_BCON_AWARE_MSK
);
6163 mutex_lock(&il
->mutex
);
6165 il
->staging
.filter_flags
&= ~filter_nand
;
6166 il
->staging
.filter_flags
|= filter_or
;
6169 * Not committing directly because hardware can perform a scan,
6170 * but we'll eventually commit the filter flags change anyway.
6173 mutex_unlock(&il
->mutex
);
6176 * Receiving all multicast frames is always enabled by the
6177 * default flags setup in il_connection_init_rx_config()
6178 * since we currently do not support programming multicast
6179 * filters into the device.
6182 FIF_OTHER_BSS
| FIF_ALLMULTI
| FIF_PROMISC_IN_BSS
|
6183 FIF_BCN_PRBRESP_PROMISC
| FIF_CONTROL
;
6186 /*****************************************************************************
6188 * driver setup and teardown
6190 *****************************************************************************/
6193 il4965_bg_txpower_work(struct work_struct
*work
)
6195 struct il_priv
*il
= container_of(work
, struct il_priv
,
6198 mutex_lock(&il
->mutex
);
6200 /* If a scan happened to start before we got here
6201 * then just return; the stats notification will
6202 * kick off another scheduled work to compensate for
6203 * any temperature delta we missed here. */
6204 if (test_bit(S_EXIT_PENDING
, &il
->status
) ||
6205 test_bit(S_SCANNING
, &il
->status
))
6208 /* Regardless of if we are associated, we must reconfigure the
6209 * TX power since frames can be sent on non-radar channels while
6211 il
->ops
->send_tx_power(il
);
6213 /* Update last_temperature to keep is_calib_needed from running
6214 * when it isn't needed... */
6215 il
->last_temperature
= il
->temperature
;
6217 mutex_unlock(&il
->mutex
);
6221 il4965_setup_deferred_work(struct il_priv
*il
)
6223 il
->workqueue
= create_singlethread_workqueue(DRV_NAME
);
6225 init_waitqueue_head(&il
->wait_command_queue
);
6227 INIT_WORK(&il
->restart
, il4965_bg_restart
);
6228 INIT_WORK(&il
->rx_replenish
, il4965_bg_rx_replenish
);
6229 INIT_WORK(&il
->run_time_calib_work
, il4965_bg_run_time_calib_work
);
6230 INIT_DELAYED_WORK(&il
->init_alive_start
, il4965_bg_init_alive_start
);
6231 INIT_DELAYED_WORK(&il
->alive_start
, il4965_bg_alive_start
);
6233 il_setup_scan_deferred_work(il
);
6235 INIT_WORK(&il
->txpower_work
, il4965_bg_txpower_work
);
6237 init_timer(&il
->stats_periodic
);
6238 il
->stats_periodic
.data
= (unsigned long)il
;
6239 il
->stats_periodic
.function
= il4965_bg_stats_periodic
;
6241 init_timer(&il
->watchdog
);
6242 il
->watchdog
.data
= (unsigned long)il
;
6243 il
->watchdog
.function
= il_bg_watchdog
;
6245 tasklet_init(&il
->irq_tasklet
,
6246 (void (*)(unsigned long))il4965_irq_tasklet
,
6251 il4965_cancel_deferred_work(struct il_priv
*il
)
6253 cancel_work_sync(&il
->txpower_work
);
6254 cancel_delayed_work_sync(&il
->init_alive_start
);
6255 cancel_delayed_work(&il
->alive_start
);
6256 cancel_work_sync(&il
->run_time_calib_work
);
6258 il_cancel_scan_deferred_work(il
);
6260 del_timer_sync(&il
->stats_periodic
);
6264 il4965_init_hw_rates(struct il_priv
*il
, struct ieee80211_rate
*rates
)
6268 for (i
= 0; i
< RATE_COUNT_LEGACY
; i
++) {
6269 rates
[i
].bitrate
= il_rates
[i
].ieee
* 5;
6270 rates
[i
].hw_value
= i
; /* Rate scaling will work on idxes */
6271 rates
[i
].hw_value_short
= i
;
6273 if ((i
>= IL_FIRST_CCK_RATE
) && (i
<= IL_LAST_CCK_RATE
)) {
6275 * If CCK != 1M then set short preamble rate flag.
6278 (il_rates
[i
].plcp
==
6279 RATE_1M_PLCP
) ? 0 : IEEE80211_RATE_SHORT_PREAMBLE
;
6285 * Acquire il->lock before calling this function !
6288 il4965_set_wr_ptrs(struct il_priv
*il
, int txq_id
, u32 idx
)
6290 il_wr(il
, HBUS_TARG_WRPTR
, (idx
& 0xff) | (txq_id
<< 8));
6291 il_wr_prph(il
, IL49_SCD_QUEUE_RDPTR(txq_id
), idx
);
6295 il4965_tx_queue_set_status(struct il_priv
*il
, struct il_tx_queue
*txq
,
6296 int tx_fifo_id
, int scd_retry
)
6298 int txq_id
= txq
->q
.id
;
6300 /* Find out whether to activate Tx queue */
6301 int active
= test_bit(txq_id
, &il
->txq_ctx_active_msk
) ? 1 : 0;
6303 /* Set up and activate */
6304 il_wr_prph(il
, IL49_SCD_QUEUE_STATUS_BITS(txq_id
),
6305 (active
<< IL49_SCD_QUEUE_STTS_REG_POS_ACTIVE
) |
6306 (tx_fifo_id
<< IL49_SCD_QUEUE_STTS_REG_POS_TXF
) |
6307 (scd_retry
<< IL49_SCD_QUEUE_STTS_REG_POS_WSL
) |
6308 (scd_retry
<< IL49_SCD_QUEUE_STTS_REG_POS_SCD_ACK
) |
6309 IL49_SCD_QUEUE_STTS_REG_MSK
);
6311 txq
->sched_retry
= scd_retry
;
6313 D_INFO("%s %s Queue %d on AC %d\n", active
? "Activate" : "Deactivate",
6314 scd_retry
? "BA" : "AC", txq_id
, tx_fifo_id
);
6317 static const struct ieee80211_ops il4965_mac_ops
= {
6318 .tx
= il4965_mac_tx
,
6319 .start
= il4965_mac_start
,
6320 .stop
= il4965_mac_stop
,
6321 .add_interface
= il_mac_add_interface
,
6322 .remove_interface
= il_mac_remove_interface
,
6323 .change_interface
= il_mac_change_interface
,
6324 .config
= il_mac_config
,
6325 .configure_filter
= il4965_configure_filter
,
6326 .set_key
= il4965_mac_set_key
,
6327 .update_tkip_key
= il4965_mac_update_tkip_key
,
6328 .conf_tx
= il_mac_conf_tx
,
6329 .reset_tsf
= il_mac_reset_tsf
,
6330 .bss_info_changed
= il_mac_bss_info_changed
,
6331 .ampdu_action
= il4965_mac_ampdu_action
,
6332 .hw_scan
= il_mac_hw_scan
,
6333 .sta_add
= il4965_mac_sta_add
,
6334 .sta_remove
= il_mac_sta_remove
,
6335 .channel_switch
= il4965_mac_channel_switch
,
6336 .tx_last_beacon
= il_mac_tx_last_beacon
,
6337 .flush
= il_mac_flush
,
6341 il4965_init_drv(struct il_priv
*il
)
6345 spin_lock_init(&il
->sta_lock
);
6346 spin_lock_init(&il
->hcmd_lock
);
6348 INIT_LIST_HEAD(&il
->free_frames
);
6350 mutex_init(&il
->mutex
);
6352 il
->ieee_channels
= NULL
;
6353 il
->ieee_rates
= NULL
;
6354 il
->band
= IEEE80211_BAND_2GHZ
;
6356 il
->iw_mode
= NL80211_IFTYPE_STATION
;
6357 il
->current_ht_config
.smps
= IEEE80211_SMPS_STATIC
;
6358 il
->missed_beacon_threshold
= IL_MISSED_BEACON_THRESHOLD_DEF
;
6360 /* initialize force reset */
6361 il
->force_reset
.reset_duration
= IL_DELAY_NEXT_FORCE_FW_RELOAD
;
6363 /* Choose which receivers/antennas to use */
6364 if (il
->ops
->set_rxon_chain
)
6365 il
->ops
->set_rxon_chain(il
);
6367 il_init_scan_params(il
);
6369 ret
= il_init_channel_map(il
);
6371 IL_ERR("initializing regulatory failed: %d\n", ret
);
6375 ret
= il_init_geos(il
);
6377 IL_ERR("initializing geos failed: %d\n", ret
);
6378 goto err_free_channel_map
;
6380 il4965_init_hw_rates(il
, il
->ieee_rates
);
6384 err_free_channel_map
:
6385 il_free_channel_map(il
);
6391 il4965_uninit_drv(struct il_priv
*il
)
6394 il_free_channel_map(il
);
6395 kfree(il
->scan_cmd
);
6399 il4965_hw_detect(struct il_priv
*il
)
6401 il
->hw_rev
= _il_rd(il
, CSR_HW_REV
);
6402 il
->hw_wa_rev
= _il_rd(il
, CSR_HW_REV_WA_REG
);
6403 il
->rev_id
= il
->pci_dev
->revision
;
6404 D_INFO("HW Revision ID = 0x%X\n", il
->rev_id
);
6407 static struct il_sensitivity_ranges il4965_sensitivity
= {
6409 .max_nrg_cck
= 0, /* not used, set to 0 */
6411 .auto_corr_min_ofdm
= 85,
6412 .auto_corr_min_ofdm_mrc
= 170,
6413 .auto_corr_min_ofdm_x1
= 105,
6414 .auto_corr_min_ofdm_mrc_x1
= 220,
6416 .auto_corr_max_ofdm
= 120,
6417 .auto_corr_max_ofdm_mrc
= 210,
6418 .auto_corr_max_ofdm_x1
= 140,
6419 .auto_corr_max_ofdm_mrc_x1
= 270,
6421 .auto_corr_min_cck
= 125,
6422 .auto_corr_max_cck
= 200,
6423 .auto_corr_min_cck_mrc
= 200,
6424 .auto_corr_max_cck_mrc
= 400,
6429 .barker_corr_th_min
= 190,
6430 .barker_corr_th_min_mrc
= 390,
6435 il4965_set_hw_params(struct il_priv
*il
)
6437 il
->hw_params
.bcast_id
= IL4965_BROADCAST_ID
;
6438 il
->hw_params
.max_rxq_size
= RX_QUEUE_SIZE
;
6439 il
->hw_params
.max_rxq_log
= RX_QUEUE_SIZE_LOG
;
6440 if (il
->cfg
->mod_params
->amsdu_size_8K
)
6441 il
->hw_params
.rx_page_order
= get_order(IL_RX_BUF_SIZE_8K
);
6443 il
->hw_params
.rx_page_order
= get_order(IL_RX_BUF_SIZE_4K
);
6445 il
->hw_params
.max_beacon_itrvl
= IL_MAX_UCODE_BEACON_INTERVAL
;
6447 if (il
->cfg
->mod_params
->disable_11n
)
6448 il
->cfg
->sku
&= ~IL_SKU_N
;
6450 if (il
->cfg
->mod_params
->num_of_queues
>= IL_MIN_NUM_QUEUES
&&
6451 il
->cfg
->mod_params
->num_of_queues
<= IL49_NUM_QUEUES
)
6452 il
->cfg
->num_of_queues
=
6453 il
->cfg
->mod_params
->num_of_queues
;
6455 il
->hw_params
.max_txq_num
= il
->cfg
->num_of_queues
;
6456 il
->hw_params
.dma_chnl_num
= FH49_TCSR_CHNL_NUM
;
6457 il
->hw_params
.scd_bc_tbls_size
=
6458 il
->cfg
->num_of_queues
*
6459 sizeof(struct il4965_scd_bc_tbl
);
6461 il
->hw_params
.tfd_size
= sizeof(struct il_tfd
);
6462 il
->hw_params
.max_stations
= IL4965_STATION_COUNT
;
6463 il
->hw_params
.max_data_size
= IL49_RTC_DATA_SIZE
;
6464 il
->hw_params
.max_inst_size
= IL49_RTC_INST_SIZE
;
6465 il
->hw_params
.max_bsm_size
= BSM_SRAM_SIZE
;
6466 il
->hw_params
.ht40_channel
= BIT(IEEE80211_BAND_5GHZ
);
6468 il
->hw_params
.rx_wrt_ptr_reg
= FH49_RSCSR_CHNL0_WPTR
;
6470 il
->hw_params
.tx_chains_num
= il4965_num_of_ant(il
->cfg
->valid_tx_ant
);
6471 il
->hw_params
.rx_chains_num
= il4965_num_of_ant(il
->cfg
->valid_rx_ant
);
6472 il
->hw_params
.valid_tx_ant
= il
->cfg
->valid_tx_ant
;
6473 il
->hw_params
.valid_rx_ant
= il
->cfg
->valid_rx_ant
;
6475 il
->hw_params
.ct_kill_threshold
=
6476 CELSIUS_TO_KELVIN(CT_KILL_THRESHOLD_LEGACY
);
6478 il
->hw_params
.sens
= &il4965_sensitivity
;
6479 il
->hw_params
.beacon_time_tsf_bits
= IL4965_EXT_BEACON_TIME_POS
;
6483 il4965_pci_probe(struct pci_dev
*pdev
, const struct pci_device_id
*ent
)
6487 struct ieee80211_hw
*hw
;
6488 struct il_cfg
*cfg
= (struct il_cfg
*)(ent
->driver_data
);
6489 unsigned long flags
;
6492 /************************
6493 * 1. Allocating HW data
6494 ************************/
6496 hw
= ieee80211_alloc_hw(sizeof(struct il_priv
), &il4965_mac_ops
);
6503 SET_IEEE80211_DEV(hw
, &pdev
->dev
);
6505 D_INFO("*** LOAD DRIVER ***\n");
6507 il
->ops
= &il4965_ops
;
6508 #ifdef CONFIG_IWLEGACY_DEBUGFS
6509 il
->debugfs_ops
= &il4965_debugfs_ops
;
6512 il
->inta_mask
= CSR_INI_SET_MASK
;
6514 /**************************
6515 * 2. Initializing PCI bus
6516 **************************/
6517 pci_disable_link_state(pdev
,
6518 PCIE_LINK_STATE_L0S
| PCIE_LINK_STATE_L1
|
6519 PCIE_LINK_STATE_CLKPM
);
6521 if (pci_enable_device(pdev
)) {
6523 goto out_ieee80211_free_hw
;
6526 pci_set_master(pdev
);
6528 err
= pci_set_dma_mask(pdev
, DMA_BIT_MASK(36));
6530 err
= pci_set_consistent_dma_mask(pdev
, DMA_BIT_MASK(36));
6532 err
= pci_set_dma_mask(pdev
, DMA_BIT_MASK(32));
6535 pci_set_consistent_dma_mask(pdev
, DMA_BIT_MASK(32));
6536 /* both attempts failed: */
6538 IL_WARN("No suitable DMA available.\n");
6539 goto out_pci_disable_device
;
6543 err
= pci_request_regions(pdev
, DRV_NAME
);
6545 goto out_pci_disable_device
;
6547 pci_set_drvdata(pdev
, il
);
6549 /***********************
6550 * 3. Read REV register
6551 ***********************/
6552 il
->hw_base
= pci_ioremap_bar(pdev
, 0);
6555 goto out_pci_release_regions
;
6558 D_INFO("pci_resource_len = 0x%08llx\n",
6559 (unsigned long long)pci_resource_len(pdev
, 0));
6560 D_INFO("pci_resource_base = %p\n", il
->hw_base
);
6562 /* these spin locks will be used in apm_ops.init and EEPROM access
6563 * we should init now
6565 spin_lock_init(&il
->reg_lock
);
6566 spin_lock_init(&il
->lock
);
6569 * stop and reset the on-board processor just in case it is in a
6570 * strange state ... like being left stranded by a primary kernel
6571 * and this is now the kdump kernel trying to start up
6573 _il_wr(il
, CSR_RESET
, CSR_RESET_REG_FLAG_NEVO_RESET
);
6575 il4965_hw_detect(il
);
6576 IL_INFO("Detected %s, REV=0x%X\n", il
->cfg
->name
, il
->hw_rev
);
6578 /* We disable the RETRY_TIMEOUT register (0x41) to keep
6579 * PCI Tx retries from interfering with C3 CPU state */
6580 pci_write_config_byte(pdev
, PCI_CFG_RETRY_TIMEOUT
, 0x00);
6582 il4965_prepare_card_hw(il
);
6583 if (!il
->hw_ready
) {
6584 IL_WARN("Failed, HW not ready\n");
6592 /* Read the EEPROM */
6593 err
= il_eeprom_init(il
);
6595 IL_ERR("Unable to init EEPROM\n");
6598 err
= il4965_eeprom_check_version(il
);
6600 goto out_free_eeprom
;
6602 /* extract MAC Address */
6603 il4965_eeprom_get_mac(il
, il
->addresses
[0].addr
);
6604 D_INFO("MAC address: %pM\n", il
->addresses
[0].addr
);
6605 il
->hw
->wiphy
->addresses
= il
->addresses
;
6606 il
->hw
->wiphy
->n_addresses
= 1;
6608 /************************
6609 * 5. Setup HW constants
6610 ************************/
6611 il4965_set_hw_params(il
);
6613 /*******************
6615 *******************/
6617 err
= il4965_init_drv(il
);
6619 goto out_free_eeprom
;
6620 /* At this point both hw and il are initialized. */
6622 /********************
6624 ********************/
6625 spin_lock_irqsave(&il
->lock
, flags
);
6626 il_disable_interrupts(il
);
6627 spin_unlock_irqrestore(&il
->lock
, flags
);
6629 pci_enable_msi(il
->pci_dev
);
6631 err
= request_irq(il
->pci_dev
->irq
, il_isr
, IRQF_SHARED
, DRV_NAME
, il
);
6633 IL_ERR("Error allocating IRQ %d\n", il
->pci_dev
->irq
);
6634 goto out_disable_msi
;
6637 il4965_setup_deferred_work(il
);
6638 il4965_setup_handlers(il
);
6640 /*********************************************
6641 * 8. Enable interrupts and read RFKILL state
6642 *********************************************/
6644 /* enable rfkill interrupt: hw bug w/a */
6645 pci_read_config_word(il
->pci_dev
, PCI_COMMAND
, &pci_cmd
);
6646 if (pci_cmd
& PCI_COMMAND_INTX_DISABLE
) {
6647 pci_cmd
&= ~PCI_COMMAND_INTX_DISABLE
;
6648 pci_write_config_word(il
->pci_dev
, PCI_COMMAND
, pci_cmd
);
6651 il_enable_rfkill_int(il
);
6653 /* If platform's RF_KILL switch is NOT set to KILL */
6654 if (_il_rd(il
, CSR_GP_CNTRL
) & CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW
)
6655 clear_bit(S_RFKILL
, &il
->status
);
6657 set_bit(S_RFKILL
, &il
->status
);
6659 wiphy_rfkill_set_hw_state(il
->hw
->wiphy
,
6660 test_bit(S_RFKILL
, &il
->status
));
6662 il_power_initialize(il
);
6664 init_completion(&il
->_4965
.firmware_loading_complete
);
6666 err
= il4965_request_firmware(il
, true);
6668 goto out_destroy_workqueue
;
6672 out_destroy_workqueue
:
6673 destroy_workqueue(il
->workqueue
);
6674 il
->workqueue
= NULL
;
6675 free_irq(il
->pci_dev
->irq
, il
);
6677 pci_disable_msi(il
->pci_dev
);
6678 il4965_uninit_drv(il
);
6682 iounmap(il
->hw_base
);
6683 out_pci_release_regions
:
6684 pci_set_drvdata(pdev
, NULL
);
6685 pci_release_regions(pdev
);
6686 out_pci_disable_device
:
6687 pci_disable_device(pdev
);
6688 out_ieee80211_free_hw
:
6689 ieee80211_free_hw(il
->hw
);
6695 il4965_pci_remove(struct pci_dev
*pdev
)
6697 struct il_priv
*il
= pci_get_drvdata(pdev
);
6698 unsigned long flags
;
6703 wait_for_completion(&il
->_4965
.firmware_loading_complete
);
6705 D_INFO("*** UNLOAD DRIVER ***\n");
6707 il_dbgfs_unregister(il
);
6708 sysfs_remove_group(&pdev
->dev
.kobj
, &il_attribute_group
);
6710 /* ieee80211_unregister_hw call wil cause il_mac_stop to
6711 * to be called and il4965_down since we are removing the device
6712 * we need to set S_EXIT_PENDING bit.
6714 set_bit(S_EXIT_PENDING
, &il
->status
);
6718 if (il
->mac80211_registered
) {
6719 ieee80211_unregister_hw(il
->hw
);
6720 il
->mac80211_registered
= 0;
6726 * Make sure device is reset to low power before unloading driver.
6727 * This may be redundant with il4965_down(), but there are paths to
6728 * run il4965_down() without calling apm_ops.stop(), and there are
6729 * paths to avoid running il4965_down() at all before leaving driver.
6730 * This (inexpensive) call *makes sure* device is reset.
6734 /* make sure we flush any pending irq or
6735 * tasklet for the driver
6737 spin_lock_irqsave(&il
->lock
, flags
);
6738 il_disable_interrupts(il
);
6739 spin_unlock_irqrestore(&il
->lock
, flags
);
6741 il4965_synchronize_irq(il
);
6743 il4965_dealloc_ucode_pci(il
);
6746 il4965_rx_queue_free(il
, &il
->rxq
);
6747 il4965_hw_txq_ctx_free(il
);
6751 /*netif_stop_queue(dev); */
6752 flush_workqueue(il
->workqueue
);
6754 /* ieee80211_unregister_hw calls il_mac_stop, which flushes
6755 * il->workqueue... so we can't take down the workqueue
6757 destroy_workqueue(il
->workqueue
);
6758 il
->workqueue
= NULL
;
6760 free_irq(il
->pci_dev
->irq
, il
);
6761 pci_disable_msi(il
->pci_dev
);
6762 iounmap(il
->hw_base
);
6763 pci_release_regions(pdev
);
6764 pci_disable_device(pdev
);
6765 pci_set_drvdata(pdev
, NULL
);
6767 il4965_uninit_drv(il
);
6769 dev_kfree_skb(il
->beacon_skb
);
6771 ieee80211_free_hw(il
->hw
);
6775 * Activate/Deactivate Tx DMA/FIFO channels according tx fifos mask
6776 * must be called under il->lock and mac access
6779 il4965_txq_set_sched(struct il_priv
*il
, u32 mask
)
6781 il_wr_prph(il
, IL49_SCD_TXFACT
, mask
);
6784 /*****************************************************************************
6786 * driver and module entry point
6788 *****************************************************************************/
6790 /* Hardware specific file defines the PCI IDs table for that hardware module */
6791 static DEFINE_PCI_DEVICE_TABLE(il4965_hw_card_ids
) = {
6792 {IL_PCI_DEVICE(0x4229, PCI_ANY_ID
, il4965_cfg
)},
6793 {IL_PCI_DEVICE(0x4230, PCI_ANY_ID
, il4965_cfg
)},
6796 MODULE_DEVICE_TABLE(pci
, il4965_hw_card_ids
);
6798 static struct pci_driver il4965_driver
= {
6800 .id_table
= il4965_hw_card_ids
,
6801 .probe
= il4965_pci_probe
,
6802 .remove
= il4965_pci_remove
,
6803 .driver
.pm
= IL_LEGACY_PM_OPS
,
6811 pr_info(DRV_DESCRIPTION
", " DRV_VERSION
"\n");
6812 pr_info(DRV_COPYRIGHT
"\n");
6814 ret
= il4965_rate_control_register();
6816 pr_err("Unable to register rate control algorithm: %d\n", ret
);
6820 ret
= pci_register_driver(&il4965_driver
);
6822 pr_err("Unable to initialize PCI module\n");
6823 goto error_register
;
6829 il4965_rate_control_unregister();
6836 pci_unregister_driver(&il4965_driver
);
6837 il4965_rate_control_unregister();
6840 module_exit(il4965_exit
);
6841 module_init(il4965_init
);
6843 #ifdef CONFIG_IWLEGACY_DEBUG
6844 module_param_named(debug
, il_debug_level
, uint
, S_IRUGO
| S_IWUSR
);
6845 MODULE_PARM_DESC(debug
, "debug output mask");
6848 module_param_named(swcrypto
, il4965_mod_params
.sw_crypto
, int, S_IRUGO
);
6849 MODULE_PARM_DESC(swcrypto
, "using crypto in software (default 0 [hardware])");
6850 module_param_named(queues_num
, il4965_mod_params
.num_of_queues
, int, S_IRUGO
);
6851 MODULE_PARM_DESC(queues_num
, "number of hw queues.");
6852 module_param_named(11n_disable
, il4965_mod_params
.disable_11n
, int, S_IRUGO
);
6853 MODULE_PARM_DESC(11n_disable
, "disable 11n functionality");
6854 module_param_named(amsdu_size_8K
, il4965_mod_params
.amsdu_size_8K
, int,
6856 MODULE_PARM_DESC(amsdu_size_8K
, "enable 8K amsdu size");
6857 module_param_named(fw_restart
, il4965_mod_params
.restart_fw
, int, S_IRUGO
);
6858 MODULE_PARM_DESC(fw_restart
, "restart firmware in case of error");