1 /******************************************************************************
3 * Copyright(c) 2003 - 2011 Intel Corporation. All rights reserved.
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms of version 2 of the GNU General Public License as
7 * published by the Free Software Foundation.
9 * This program is distributed in the hope that it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
14 * You should have received a copy of the GNU General Public License along with
15 * this program; if not, write to the Free Software Foundation, Inc.,
16 * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
18 * The full GNU General Public License is included in this distribution in the
19 * file called LICENSE.
21 * Contact Information:
22 * Intel Linux Wireless <ilw@linux.intel.com>
23 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
25 *****************************************************************************/
27 #include <linux/kernel.h>
28 #include <linux/module.h>
29 #include <linux/init.h>
30 #include <linux/slab.h>
31 #include <linux/pci.h>
32 #include <linux/dma-mapping.h>
33 #include <linux/delay.h>
34 #include <linux/sched.h>
35 #include <linux/skbuff.h>
36 #include <linux/netdevice.h>
37 #include <linux/firmware.h>
38 #include <linux/etherdevice.h>
39 #include <asm/unaligned.h>
40 #include <net/mac80211.h>
43 #include "iwl-3945-fh.h"
44 #include "iwl-commands.h"
47 #include "iwl-eeprom.h"
49 #include "iwl-helpers.h"
51 #include "iwl-3945-led.h"
52 #include "iwl-3945-debugfs.h"
54 #define IL_DECLARE_RATE_INFO(r, ip, in, rp, rn, pp, np) \
55 [IL_RATE_##r##M_INDEX] = { IL_RATE_##r##M_PLCP, \
56 IL_RATE_##r##M_IEEE, \
57 IL_RATE_##ip##M_INDEX, \
58 IL_RATE_##in##M_INDEX, \
59 IL_RATE_##rp##M_INDEX, \
60 IL_RATE_##rn##M_INDEX, \
61 IL_RATE_##pp##M_INDEX, \
62 IL_RATE_##np##M_INDEX, \
63 IL_RATE_##r##M_INDEX_TABLE, \
64 IL_RATE_##ip##M_INDEX_TABLE }
68 * rate, prev rate, next rate, prev tgg rate, next tgg rate
70 * If there isn't a valid next or previous rate then INV is used which
71 * maps to IL_RATE_INVALID
74 const struct il3945_rate_info il3945_rates
[IL_RATE_COUNT_3945
] = {
75 IL_DECLARE_RATE_INFO(1, INV
, 2, INV
, 2, INV
, 2), /* 1mbps */
76 IL_DECLARE_RATE_INFO(2, 1, 5, 1, 5, 1, 5), /* 2mbps */
77 IL_DECLARE_RATE_INFO(5, 2, 6, 2, 11, 2, 11), /*5.5mbps */
78 IL_DECLARE_RATE_INFO(11, 9, 12, 5, 12, 5, 18), /* 11mbps */
79 IL_DECLARE_RATE_INFO(6, 5, 9, 5, 11, 5, 11), /* 6mbps */
80 IL_DECLARE_RATE_INFO(9, 6, 11, 5, 11, 5, 11), /* 9mbps */
81 IL_DECLARE_RATE_INFO(12, 11, 18, 11, 18, 11, 18), /* 12mbps */
82 IL_DECLARE_RATE_INFO(18, 12, 24, 12, 24, 11, 24), /* 18mbps */
83 IL_DECLARE_RATE_INFO(24, 18, 36, 18, 36, 18, 36), /* 24mbps */
84 IL_DECLARE_RATE_INFO(36, 24, 48, 24, 48, 24, 48), /* 36mbps */
85 IL_DECLARE_RATE_INFO(48, 36, 54, 36, 54, 36, 54), /* 48mbps */
86 IL_DECLARE_RATE_INFO(54, 48, INV
, 48, INV
, 48, INV
),/* 54mbps */
89 static inline u8
il3945_get_prev_ieee_rate(u8 rate_index
)
91 u8 rate
= il3945_rates
[rate_index
].prev_ieee
;
93 if (rate
== IL_RATE_INVALID
)
98 /* 1 = enable the il3945_disable_events() function */
99 #define IL_EVT_DISABLE (0)
100 #define IL_EVT_DISABLE_SIZE (1532/32)
103 * il3945_disable_events - Disable selected events in uCode event log
105 * Disable an event by writing "1"s into "disable"
106 * bitmap in SRAM. Bit position corresponds to Event # (id/type).
107 * Default values of 0 enable uCode events to be logged.
108 * Use for only special debugging. This function is just a placeholder as-is,
109 * you'll need to provide the special bits! ...
110 * ... and set IL_EVT_DISABLE to 1. */
111 void il3945_disable_events(struct il_priv
*il
)
114 u32 base
; /* SRAM address of event log header */
115 u32 disable_ptr
; /* SRAM address of event-disable bitmap array */
116 u32 array_size
; /* # of u32 entries in array */
117 static const u32 evt_disable
[IL_EVT_DISABLE_SIZE
] = {
118 0x00000000, /* 31 - 0 Event id numbers */
119 0x00000000, /* 63 - 32 */
120 0x00000000, /* 95 - 64 */
121 0x00000000, /* 127 - 96 */
122 0x00000000, /* 159 - 128 */
123 0x00000000, /* 191 - 160 */
124 0x00000000, /* 223 - 192 */
125 0x00000000, /* 255 - 224 */
126 0x00000000, /* 287 - 256 */
127 0x00000000, /* 319 - 288 */
128 0x00000000, /* 351 - 320 */
129 0x00000000, /* 383 - 352 */
130 0x00000000, /* 415 - 384 */
131 0x00000000, /* 447 - 416 */
132 0x00000000, /* 479 - 448 */
133 0x00000000, /* 511 - 480 */
134 0x00000000, /* 543 - 512 */
135 0x00000000, /* 575 - 544 */
136 0x00000000, /* 607 - 576 */
137 0x00000000, /* 639 - 608 */
138 0x00000000, /* 671 - 640 */
139 0x00000000, /* 703 - 672 */
140 0x00000000, /* 735 - 704 */
141 0x00000000, /* 767 - 736 */
142 0x00000000, /* 799 - 768 */
143 0x00000000, /* 831 - 800 */
144 0x00000000, /* 863 - 832 */
145 0x00000000, /* 895 - 864 */
146 0x00000000, /* 927 - 896 */
147 0x00000000, /* 959 - 928 */
148 0x00000000, /* 991 - 960 */
149 0x00000000, /* 1023 - 992 */
150 0x00000000, /* 1055 - 1024 */
151 0x00000000, /* 1087 - 1056 */
152 0x00000000, /* 1119 - 1088 */
153 0x00000000, /* 1151 - 1120 */
154 0x00000000, /* 1183 - 1152 */
155 0x00000000, /* 1215 - 1184 */
156 0x00000000, /* 1247 - 1216 */
157 0x00000000, /* 1279 - 1248 */
158 0x00000000, /* 1311 - 1280 */
159 0x00000000, /* 1343 - 1312 */
160 0x00000000, /* 1375 - 1344 */
161 0x00000000, /* 1407 - 1376 */
162 0x00000000, /* 1439 - 1408 */
163 0x00000000, /* 1471 - 1440 */
164 0x00000000, /* 1503 - 1472 */
167 base
= le32_to_cpu(il
->card_alive
.log_event_table_ptr
);
168 if (!il3945_hw_valid_rtc_data_addr(base
)) {
169 IL_ERR("Invalid event log pointer 0x%08X\n", base
);
173 disable_ptr
= il_read_targ_mem(il
, base
+ (4 * sizeof(u32
)));
174 array_size
= il_read_targ_mem(il
, base
+ (5 * sizeof(u32
)));
176 if (IL_EVT_DISABLE
&& array_size
== IL_EVT_DISABLE_SIZE
) {
177 D_INFO("Disabling selected uCode log events at 0x%x\n",
179 for (i
= 0; i
< IL_EVT_DISABLE_SIZE
; i
++)
180 il_write_targ_mem(il
,
181 disable_ptr
+ (i
* sizeof(u32
)),
185 D_INFO("Selected uCode log events may be disabled\n");
186 D_INFO(" by writing \"1\"s into disable bitmap\n");
187 D_INFO(" in SRAM at 0x%x, size %d u32s\n",
188 disable_ptr
, array_size
);
193 static int il3945_hwrate_to_plcp_idx(u8 plcp
)
197 for (idx
= 0; idx
< IL_RATE_COUNT_3945
; idx
++)
198 if (il3945_rates
[idx
].plcp
== plcp
)
203 #ifdef CONFIG_IWLEGACY_DEBUG
204 #define TX_STATUS_ENTRY(x) case TX_3945_STATUS_FAIL_ ## x: return #x
206 static const char *il3945_get_tx_fail_reason(u32 status
)
208 switch (status
& TX_STATUS_MSK
) {
209 case TX_3945_STATUS_SUCCESS
:
211 TX_STATUS_ENTRY(SHORT_LIMIT
);
212 TX_STATUS_ENTRY(LONG_LIMIT
);
213 TX_STATUS_ENTRY(FIFO_UNDERRUN
);
214 TX_STATUS_ENTRY(MGMNT_ABORT
);
215 TX_STATUS_ENTRY(NEXT_FRAG
);
216 TX_STATUS_ENTRY(LIFE_EXPIRE
);
217 TX_STATUS_ENTRY(DEST_PS
);
218 TX_STATUS_ENTRY(ABORTED
);
219 TX_STATUS_ENTRY(BT_RETRY
);
220 TX_STATUS_ENTRY(STA_INVALID
);
221 TX_STATUS_ENTRY(FRAG_DROPPED
);
222 TX_STATUS_ENTRY(TID_DISABLE
);
223 TX_STATUS_ENTRY(FRAME_FLUSHED
);
224 TX_STATUS_ENTRY(INSUFFICIENT_CF_POLL
);
225 TX_STATUS_ENTRY(TX_LOCKED
);
226 TX_STATUS_ENTRY(NO_BEACON_ON_RADAR
);
232 static inline const char *il3945_get_tx_fail_reason(u32 status
)
239 * get ieee prev rate from rate scale table.
240 * for A and B mode we need to overright prev
243 int il3945_rs_next_rate(struct il_priv
*il
, int rate
)
245 int next_rate
= il3945_get_prev_ieee_rate(rate
);
248 case IEEE80211_BAND_5GHZ
:
249 if (rate
== IL_RATE_12M_INDEX
)
250 next_rate
= IL_RATE_9M_INDEX
;
251 else if (rate
== IL_RATE_6M_INDEX
)
252 next_rate
= IL_RATE_6M_INDEX
;
254 case IEEE80211_BAND_2GHZ
:
255 if (!(il
->_3945
.sta_supp_rates
& IL_OFDM_RATES_MASK
) &&
256 il_is_associated(il
)) {
257 if (rate
== IL_RATE_11M_INDEX
)
258 next_rate
= IL_RATE_5M_INDEX
;
271 * il3945_tx_queue_reclaim - Reclaim Tx queue entries already Tx'd
273 * When FW advances 'R' index, all entries between old and new 'R' index
274 * need to be reclaimed. As result, some free space forms. If there is
275 * enough free space (> low mark), wake the stack that feeds us.
277 static void il3945_tx_queue_reclaim(struct il_priv
*il
,
278 int txq_id
, int index
)
280 struct il_tx_queue
*txq
= &il
->txq
[txq_id
];
281 struct il_queue
*q
= &txq
->q
;
282 struct il_tx_info
*tx_info
;
284 BUG_ON(txq_id
== IL39_CMD_QUEUE_NUM
);
286 for (index
= il_queue_inc_wrap(index
, q
->n_bd
);
287 q
->read_ptr
!= index
;
288 q
->read_ptr
= il_queue_inc_wrap(q
->read_ptr
, q
->n_bd
)) {
290 tx_info
= &txq
->txb
[txq
->q
.read_ptr
];
291 ieee80211_tx_status_irqsafe(il
->hw
, tx_info
->skb
);
293 il
->cfg
->ops
->lib
->txq_free_tfd(il
, txq
);
296 if (il_queue_space(q
) > q
->low_mark
&& txq_id
>= 0 &&
297 txq_id
!= IL39_CMD_QUEUE_NUM
&& il
->mac80211_registered
)
298 il_wake_queue(il
, txq
);
302 * il3945_rx_reply_tx - Handle Tx response
304 static void il3945_rx_reply_tx(struct il_priv
*il
,
305 struct il_rx_mem_buffer
*rxb
)
307 struct il_rx_pkt
*pkt
= rxb_addr(rxb
);
308 u16 sequence
= le16_to_cpu(pkt
->hdr
.sequence
);
309 int txq_id
= SEQ_TO_QUEUE(sequence
);
310 int index
= SEQ_TO_INDEX(sequence
);
311 struct il_tx_queue
*txq
= &il
->txq
[txq_id
];
312 struct ieee80211_tx_info
*info
;
313 struct il3945_tx_resp
*tx_resp
= (void *)&pkt
->u
.raw
[0];
314 u32 status
= le32_to_cpu(tx_resp
->status
);
318 if (index
>= txq
->q
.n_bd
|| il_queue_used(&txq
->q
, index
) == 0) {
319 IL_ERR("Read index for DMA queue txq_id (%d) index %d "
320 "is out of range [0-%d] %d %d\n", txq_id
,
321 index
, txq
->q
.n_bd
, txq
->q
.write_ptr
,
326 txq
->time_stamp
= jiffies
;
327 info
= IEEE80211_SKB_CB(txq
->txb
[txq
->q
.read_ptr
].skb
);
328 ieee80211_tx_info_clear_status(info
);
330 /* Fill the MRR chain with some info about on-chip retransmissions */
331 rate_idx
= il3945_hwrate_to_plcp_idx(tx_resp
->rate
);
332 if (info
->band
== IEEE80211_BAND_5GHZ
)
333 rate_idx
-= IL_FIRST_OFDM_RATE
;
335 fail
= tx_resp
->failure_frame
;
337 info
->status
.rates
[0].idx
= rate_idx
;
338 info
->status
.rates
[0].count
= fail
+ 1; /* add final attempt */
340 /* tx_status->rts_retry_count = tx_resp->failure_rts; */
341 info
->flags
|= ((status
& TX_STATUS_MSK
) == TX_STATUS_SUCCESS
) ?
342 IEEE80211_TX_STAT_ACK
: 0;
344 D_TX("Tx queue %d Status %s (0x%08x) plcp rate %d retries %d\n",
345 txq_id
, il3945_get_tx_fail_reason(status
), status
,
346 tx_resp
->rate
, tx_resp
->failure_frame
);
348 D_TX_REPLY("Tx queue reclaim %d\n", index
);
349 il3945_tx_queue_reclaim(il
, txq_id
, index
);
351 if (status
& TX_ABORT_REQUIRED_MSK
)
352 IL_ERR("TODO: Implement Tx ABORT REQUIRED!!!\n");
357 /*****************************************************************************
359 * Intel PRO/Wireless 3945ABG/BG Network Connection
361 * RX handler implementations
363 *****************************************************************************/
364 #ifdef CONFIG_IWLEGACY_DEBUGFS
365 static void il3945_accumulative_statistics(struct il_priv
*il
,
371 u32
*delta
, *max_delta
;
373 prev_stats
= (__le32
*)&il
->_3945
.statistics
;
374 accum_stats
= (u32
*)&il
->_3945
.accum_statistics
;
375 delta
= (u32
*)&il
->_3945
.delta_statistics
;
376 max_delta
= (u32
*)&il
->_3945
.max_delta
;
378 for (i
= sizeof(__le32
); i
< sizeof(struct il3945_notif_statistics
);
379 i
+= sizeof(__le32
), stats
++, prev_stats
++, delta
++,
380 max_delta
++, accum_stats
++) {
381 if (le32_to_cpu(*stats
) > le32_to_cpu(*prev_stats
)) {
382 *delta
= (le32_to_cpu(*stats
) -
383 le32_to_cpu(*prev_stats
));
384 *accum_stats
+= *delta
;
385 if (*delta
> *max_delta
)
390 /* reset accumulative statistics for "no-counter" type statistics */
391 il
->_3945
.accum_statistics
.general
.temperature
=
392 il
->_3945
.statistics
.general
.temperature
;
393 il
->_3945
.accum_statistics
.general
.ttl_timestamp
=
394 il
->_3945
.statistics
.general
.ttl_timestamp
;
398 void il3945_hw_rx_statistics(struct il_priv
*il
,
399 struct il_rx_mem_buffer
*rxb
)
401 struct il_rx_pkt
*pkt
= rxb_addr(rxb
);
403 D_RX("Statistics notification received (%d vs %d).\n",
404 (int)sizeof(struct il3945_notif_statistics
),
405 le32_to_cpu(pkt
->len_n_flags
) & FH_RSCSR_FRAME_SIZE_MSK
);
406 #ifdef CONFIG_IWLEGACY_DEBUGFS
407 il3945_accumulative_statistics(il
, (__le32
*)&pkt
->u
.raw
);
410 memcpy(&il
->_3945
.statistics
, pkt
->u
.raw
, sizeof(il
->_3945
.statistics
));
413 void il3945_reply_statistics(struct il_priv
*il
,
414 struct il_rx_mem_buffer
*rxb
)
416 struct il_rx_pkt
*pkt
= rxb_addr(rxb
);
417 __le32
*flag
= (__le32
*)&pkt
->u
.raw
;
419 if (le32_to_cpu(*flag
) & UCODE_STATISTICS_CLEAR_MSK
) {
420 #ifdef CONFIG_IWLEGACY_DEBUGFS
421 memset(&il
->_3945
.accum_statistics
, 0,
422 sizeof(struct il3945_notif_statistics
));
423 memset(&il
->_3945
.delta_statistics
, 0,
424 sizeof(struct il3945_notif_statistics
));
425 memset(&il
->_3945
.max_delta
, 0,
426 sizeof(struct il3945_notif_statistics
));
428 D_RX("Statistics have been cleared\n");
430 il3945_hw_rx_statistics(il
, rxb
);
434 /******************************************************************************
436 * Misc. internal state and helper functions
438 ******************************************************************************/
440 /* This is necessary only for a number of statistics, see the caller. */
441 static int il3945_is_network_packet(struct il_priv
*il
,
442 struct ieee80211_hdr
*header
)
444 /* Filter incoming packets to determine if they are targeted toward
445 * this network, discarding packets coming from ourselves */
446 switch (il
->iw_mode
) {
447 case NL80211_IFTYPE_ADHOC
: /* Header: Dest. | Source | BSSID */
448 /* packets to our IBSS update information */
449 return !compare_ether_addr(header
->addr3
, il
->bssid
);
450 case NL80211_IFTYPE_STATION
: /* Header: Dest. | AP{BSSID} | Source */
451 /* packets to our IBSS update information */
452 return !compare_ether_addr(header
->addr2
, il
->bssid
);
458 static void il3945_pass_packet_to_mac80211(struct il_priv
*il
,
459 struct il_rx_mem_buffer
*rxb
,
460 struct ieee80211_rx_status
*stats
)
462 struct il_rx_pkt
*pkt
= rxb_addr(rxb
);
463 struct ieee80211_hdr
*hdr
= (struct ieee80211_hdr
*)IL_RX_DATA(pkt
);
464 struct il3945_rx_frame_hdr
*rx_hdr
= IL_RX_HDR(pkt
);
465 struct il3945_rx_frame_end
*rx_end
= IL_RX_END(pkt
);
466 u16 len
= le16_to_cpu(rx_hdr
->len
);
468 __le16 fc
= hdr
->frame_control
;
470 /* We received data from the HW, so stop the watchdog */
471 if (unlikely(len
+ IL39_RX_FRAME_SIZE
>
472 PAGE_SIZE
<< il
->hw_params
.rx_page_order
)) {
473 D_DROP("Corruption detected!\n");
477 /* We only process data packets if the interface is open */
478 if (unlikely(!il
->is_open
)) {
480 "Dropping packet while interface is not open.\n");
484 skb
= dev_alloc_skb(128);
486 IL_ERR("dev_alloc_skb failed\n");
490 if (!il3945_mod_params
.sw_crypto
)
491 il_set_decrypted_flag(il
,
492 (struct ieee80211_hdr
*)rxb_addr(rxb
),
493 le32_to_cpu(rx_end
->status
), stats
);
495 skb_add_rx_frag(skb
, 0, rxb
->page
,
496 (void *)rx_hdr
->payload
- (void *)pkt
, len
);
498 il_update_stats(il
, false, fc
, len
);
499 memcpy(IEEE80211_SKB_RXCB(skb
), stats
, sizeof(*stats
));
501 ieee80211_rx(il
->hw
, skb
);
502 il
->alloc_rxb_page
--;
506 #define IL_DELAY_NEXT_SCAN_AFTER_ASSOC (HZ*6)
508 static void il3945_rx_reply_rx(struct il_priv
*il
,
509 struct il_rx_mem_buffer
*rxb
)
511 struct ieee80211_hdr
*header
;
512 struct ieee80211_rx_status rx_status
;
513 struct il_rx_pkt
*pkt
= rxb_addr(rxb
);
514 struct il3945_rx_frame_stats
*rx_stats
= IL_RX_STATS(pkt
);
515 struct il3945_rx_frame_hdr
*rx_hdr
= IL_RX_HDR(pkt
);
516 struct il3945_rx_frame_end
*rx_end
= IL_RX_END(pkt
);
517 u16 rx_stats_sig_avg __maybe_unused
= le16_to_cpu(rx_stats
->sig_avg
);
518 u16 rx_stats_noise_diff __maybe_unused
= le16_to_cpu(rx_stats
->noise_diff
);
522 rx_status
.mactime
= le64_to_cpu(rx_end
->timestamp
);
523 rx_status
.band
= (rx_hdr
->phy_flags
& RX_RES_PHY_FLAGS_BAND_24_MSK
) ?
524 IEEE80211_BAND_2GHZ
: IEEE80211_BAND_5GHZ
;
526 ieee80211_channel_to_frequency(le16_to_cpu(rx_hdr
->channel
),
529 rx_status
.rate_idx
= il3945_hwrate_to_plcp_idx(rx_hdr
->rate
);
530 if (rx_status
.band
== IEEE80211_BAND_5GHZ
)
531 rx_status
.rate_idx
-= IL_FIRST_OFDM_RATE
;
533 rx_status
.antenna
= (le16_to_cpu(rx_hdr
->phy_flags
) &
534 RX_RES_PHY_FLAGS_ANTENNA_MSK
) >> 4;
536 /* set the preamble flag if appropriate */
537 if (rx_hdr
->phy_flags
& RX_RES_PHY_FLAGS_SHORT_PREAMBLE_MSK
)
538 rx_status
.flag
|= RX_FLAG_SHORTPRE
;
540 if ((unlikely(rx_stats
->phy_count
> 20))) {
541 D_DROP("dsp size out of range [0,20]: %d/n",
542 rx_stats
->phy_count
);
546 if (!(rx_end
->status
& RX_RES_STATUS_NO_CRC32_ERROR
) ||
547 !(rx_end
->status
& RX_RES_STATUS_NO_RXE_OVERFLOW
)) {
548 D_RX("Bad CRC or FIFO: 0x%08X.\n", rx_end
->status
);
554 /* Convert 3945's rssi indicator to dBm */
555 rx_status
.signal
= rx_stats
->rssi
- IL39_RSSI_OFFSET
;
557 D_STATS("Rssi %d sig_avg %d noise_diff %d\n",
558 rx_status
.signal
, rx_stats_sig_avg
,
559 rx_stats_noise_diff
);
561 header
= (struct ieee80211_hdr
*)IL_RX_DATA(pkt
);
563 network_packet
= il3945_is_network_packet(il
, header
);
565 D_STATS("[%c] %d RSSI:%d Signal:%u, Rate:%u\n",
566 network_packet
? '*' : ' ',
567 le16_to_cpu(rx_hdr
->channel
),
568 rx_status
.signal
, rx_status
.signal
,
571 il_dbg_log_rx_data_frame(il
, le16_to_cpu(rx_hdr
->len
),
574 if (network_packet
) {
575 il
->_3945
.last_beacon_time
=
576 le32_to_cpu(rx_end
->beacon_timestamp
);
577 il
->_3945
.last_tsf
= le64_to_cpu(rx_end
->timestamp
);
578 il
->_3945
.last_rx_rssi
= rx_status
.signal
;
581 il3945_pass_packet_to_mac80211(il
, rxb
, &rx_status
);
584 int il3945_hw_txq_attach_buf_to_tfd(struct il_priv
*il
,
585 struct il_tx_queue
*txq
,
586 dma_addr_t addr
, u16 len
, u8 reset
, u8 pad
)
590 struct il3945_tfd
*tfd
, *tfd_tmp
;
593 tfd_tmp
= (struct il3945_tfd
*)txq
->tfds
;
594 tfd
= &tfd_tmp
[q
->write_ptr
];
597 memset(tfd
, 0, sizeof(*tfd
));
599 count
= TFD_CTL_COUNT_GET(le32_to_cpu(tfd
->control_flags
));
601 if (count
>= NUM_TFD_CHUNKS
|| count
< 0) {
602 IL_ERR("Error can not send more than %d chunks\n",
607 tfd
->tbs
[count
].addr
= cpu_to_le32(addr
);
608 tfd
->tbs
[count
].len
= cpu_to_le32(len
);
612 tfd
->control_flags
= cpu_to_le32(TFD_CTL_COUNT_SET(count
) |
613 TFD_CTL_PAD_SET(pad
));
619 * il3945_hw_txq_free_tfd - Free one TFD, those at index [txq->q.read_ptr]
621 * Does NOT advance any indexes
623 void il3945_hw_txq_free_tfd(struct il_priv
*il
, struct il_tx_queue
*txq
)
625 struct il3945_tfd
*tfd_tmp
= (struct il3945_tfd
*)txq
->tfds
;
626 int index
= txq
->q
.read_ptr
;
627 struct il3945_tfd
*tfd
= &tfd_tmp
[index
];
628 struct pci_dev
*dev
= il
->pci_dev
;
633 counter
= TFD_CTL_COUNT_GET(le32_to_cpu(tfd
->control_flags
));
634 if (counter
> NUM_TFD_CHUNKS
) {
635 IL_ERR("Too many chunks: %i\n", counter
);
636 /* @todo issue fatal error, it is quite serious situation */
642 pci_unmap_single(dev
,
643 dma_unmap_addr(&txq
->meta
[index
], mapping
),
644 dma_unmap_len(&txq
->meta
[index
], len
),
647 /* unmap chunks if any */
649 for (i
= 1; i
< counter
; i
++)
650 pci_unmap_single(dev
, le32_to_cpu(tfd
->tbs
[i
].addr
),
651 le32_to_cpu(tfd
->tbs
[i
].len
), PCI_DMA_TODEVICE
);
657 skb
= txq
->txb
[txq
->q
.read_ptr
].skb
;
659 /* can be called from irqs-disabled context */
661 dev_kfree_skb_any(skb
);
662 txq
->txb
[txq
->q
.read_ptr
].skb
= NULL
;
668 * il3945_hw_build_tx_cmd_rate - Add rate portion to TX_CMD:
671 void il3945_hw_build_tx_cmd_rate(struct il_priv
*il
,
672 struct il_device_cmd
*cmd
,
673 struct ieee80211_tx_info
*info
,
674 struct ieee80211_hdr
*hdr
,
675 int sta_id
, int tx_id
)
677 u16 hw_value
= ieee80211_get_tx_rate(il
->hw
, info
)->hw_value
;
678 u16 rate_index
= min(hw_value
& 0xffff, IL_RATE_COUNT_3945
);
684 __le16 fc
= hdr
->frame_control
;
685 struct il3945_tx_cmd
*tx_cmd
= (struct il3945_tx_cmd
*)cmd
->cmd
.payload
;
687 rate
= il3945_rates
[rate_index
].plcp
;
688 tx_flags
= tx_cmd
->tx_flags
;
690 /* We need to figure out how to get the sta->supp_rates while
691 * in this running context */
692 rate_mask
= IL_RATES_MASK_3945
;
694 /* Set retry limit on DATA packets and Probe Responses*/
695 if (ieee80211_is_probe_resp(fc
))
696 data_retry_limit
= 3;
698 data_retry_limit
= IL_DEFAULT_TX_RETRY
;
699 tx_cmd
->data_retry_limit
= data_retry_limit
;
701 if (tx_id
>= IL39_CMD_QUEUE_NUM
)
706 if (data_retry_limit
< rts_retry_limit
)
707 rts_retry_limit
= data_retry_limit
;
708 tx_cmd
->rts_retry_limit
= rts_retry_limit
;
711 tx_cmd
->tx_flags
= tx_flags
;
714 tx_cmd
->supp_rates
[0] =
715 ((rate_mask
& IL_OFDM_RATES_MASK
) >> IL_FIRST_OFDM_RATE
) & 0xFF;
718 tx_cmd
->supp_rates
[1] = (rate_mask
& 0xF);
720 D_RATE("Tx sta id: %d, rate: %d (plcp), flags: 0x%4X "
721 "cck/ofdm mask: 0x%x/0x%x\n", sta_id
,
722 tx_cmd
->rate
, le32_to_cpu(tx_cmd
->tx_flags
),
723 tx_cmd
->supp_rates
[1], tx_cmd
->supp_rates
[0]);
726 static u8
il3945_sync_sta(struct il_priv
*il
, int sta_id
, u16 tx_rate
)
728 unsigned long flags_spin
;
729 struct il_station_entry
*station
;
731 if (sta_id
== IL_INVALID_STATION
)
732 return IL_INVALID_STATION
;
734 spin_lock_irqsave(&il
->sta_lock
, flags_spin
);
735 station
= &il
->stations
[sta_id
];
737 station
->sta
.sta
.modify_mask
= STA_MODIFY_TX_RATE_MSK
;
738 station
->sta
.rate_n_flags
= cpu_to_le16(tx_rate
);
739 station
->sta
.mode
= STA_CONTROL_MODIFY_MSK
;
740 il_send_add_sta(il
, &station
->sta
, CMD_ASYNC
);
741 spin_unlock_irqrestore(&il
->sta_lock
, flags_spin
);
743 D_RATE("SCALE sync station %d to rate %d\n",
748 static void il3945_set_pwr_vmain(struct il_priv
*il
)
751 * (for documentation purposes)
752 * to set power to V_AUX, do
754 if (pci_pme_capable(il->pci_dev, PCI_D3cold)) {
755 il_set_bits_mask_prph(il, APMG_PS_CTRL_REG,
756 APMG_PS_CTRL_VAL_PWR_SRC_VAUX,
757 ~APMG_PS_CTRL_MSK_PWR_SRC);
759 _il_poll_bit(il, CSR_GPIO_IN,
760 CSR_GPIO_IN_VAL_VAUX_PWR_SRC,
761 CSR_GPIO_IN_BIT_AUX_POWER, 5000);
765 il_set_bits_mask_prph(il
, APMG_PS_CTRL_REG
,
766 APMG_PS_CTRL_VAL_PWR_SRC_VMAIN
,
767 ~APMG_PS_CTRL_MSK_PWR_SRC
);
769 _il_poll_bit(il
, CSR_GPIO_IN
, CSR_GPIO_IN_VAL_VMAIN_PWR_SRC
,
770 CSR_GPIO_IN_BIT_AUX_POWER
, 5000); /* uS */
773 static int il3945_rx_init(struct il_priv
*il
, struct il_rx_queue
*rxq
)
775 il_wr(il
, FH39_RCSR_RBD_BASE(0), rxq
->bd_dma
);
776 il_wr(il
, FH39_RCSR_RPTR_ADDR(0),
778 il_wr(il
, FH39_RCSR_WPTR(0), 0);
779 il_wr(il
, FH39_RCSR_CONFIG(0),
780 FH39_RCSR_RX_CONFIG_REG_VAL_DMA_CHNL_EN_ENABLE
|
781 FH39_RCSR_RX_CONFIG_REG_VAL_RDRBD_EN_ENABLE
|
782 FH39_RCSR_RX_CONFIG_REG_BIT_WR_STTS_EN
|
783 FH39_RCSR_RX_CONFIG_REG_VAL_MAX_FRAG_SIZE_128
|
784 (RX_QUEUE_SIZE_LOG
<< FH39_RCSR_RX_CONFIG_REG_POS_RBDC_SIZE
) |
785 FH39_RCSR_RX_CONFIG_REG_VAL_IRQ_DEST_INT_HOST
|
786 (1 << FH39_RCSR_RX_CONFIG_REG_POS_IRQ_RBTH
) |
787 FH39_RCSR_RX_CONFIG_REG_VAL_MSG_MODE_FH
);
789 /* fake read to flush all prev I/O */
790 il_rd(il
, FH39_RSSR_CTRL
);
795 static int il3945_tx_reset(struct il_priv
*il
)
799 il_wr_prph(il
, ALM_SCD_MODE_REG
, 0x2);
802 il_wr_prph(il
, ALM_SCD_ARASTAT_REG
, 0x01);
804 /* all 6 fifo are active */
805 il_wr_prph(il
, ALM_SCD_TXFACT_REG
, 0x3f);
807 il_wr_prph(il
, ALM_SCD_SBYP_MODE_1_REG
, 0x010000);
808 il_wr_prph(il
, ALM_SCD_SBYP_MODE_2_REG
, 0x030002);
809 il_wr_prph(il
, ALM_SCD_TXF4MF_REG
, 0x000004);
810 il_wr_prph(il
, ALM_SCD_TXF5MF_REG
, 0x000005);
812 il_wr(il
, FH39_TSSR_CBB_BASE
,
813 il
->_3945
.shared_phys
);
815 il_wr(il
, FH39_TSSR_MSG_CONFIG
,
816 FH39_TSSR_TX_MSG_CONFIG_REG_VAL_SNOOP_RD_TXPD_ON
|
817 FH39_TSSR_TX_MSG_CONFIG_REG_VAL_ORDER_RD_TXPD_ON
|
818 FH39_TSSR_TX_MSG_CONFIG_REG_VAL_MAX_FRAG_SIZE_128B
|
819 FH39_TSSR_TX_MSG_CONFIG_REG_VAL_SNOOP_RD_TFD_ON
|
820 FH39_TSSR_TX_MSG_CONFIG_REG_VAL_ORDER_RD_CBB_ON
|
821 FH39_TSSR_TX_MSG_CONFIG_REG_VAL_ORDER_RSP_WAIT_TH
|
822 FH39_TSSR_TX_MSG_CONFIG_REG_VAL_RSP_WAIT_TH
);
829 * il3945_txq_ctx_reset - Reset TX queue context
831 * Destroys all DMA structures and initialize them again
833 static int il3945_txq_ctx_reset(struct il_priv
*il
)
836 int txq_id
, slots_num
;
838 il3945_hw_txq_ctx_free(il
);
840 /* allocate tx queue structure */
841 rc
= il_alloc_txq_mem(il
);
846 rc
= il3945_tx_reset(il
);
851 for (txq_id
= 0; txq_id
< il
->hw_params
.max_txq_num
; txq_id
++) {
852 slots_num
= (txq_id
== IL39_CMD_QUEUE_NUM
) ?
853 TFD_CMD_SLOTS
: TFD_TX_CMD_SLOTS
;
854 rc
= il_tx_queue_init(il
, &il
->txq
[txq_id
],
857 IL_ERR("Tx %d queue init failed\n", txq_id
);
865 il3945_hw_txq_ctx_free(il
);
871 * Start up 3945's basic functionality after it has been reset
872 * (e.g. after platform boot, or shutdown via il_apm_stop())
873 * NOTE: This does not load uCode nor start the embedded processor
875 static int il3945_apm_init(struct il_priv
*il
)
877 int ret
= il_apm_init(il
);
879 /* Clear APMG (NIC's internal power management) interrupts */
880 il_wr_prph(il
, APMG_RTC_INT_MSK_REG
, 0x0);
881 il_wr_prph(il
, APMG_RTC_INT_STT_REG
, 0xFFFFFFFF);
883 /* Reset radio chip */
884 il_set_bits_prph(il
, APMG_PS_CTRL_REG
,
885 APMG_PS_CTRL_VAL_RESET_REQ
);
887 il_clear_bits_prph(il
, APMG_PS_CTRL_REG
,
888 APMG_PS_CTRL_VAL_RESET_REQ
);
893 static void il3945_nic_config(struct il_priv
*il
)
895 struct il3945_eeprom
*eeprom
= (struct il3945_eeprom
*)il
->eeprom
;
897 u8 rev_id
= il
->pci_dev
->revision
;
899 spin_lock_irqsave(&il
->lock
, flags
);
901 /* Determine HW type */
902 D_INFO("HW Revision ID = 0x%X\n", rev_id
);
904 if (rev_id
& PCI_CFG_REV_ID_BIT_RTP
)
905 D_INFO("RTP type\n");
906 else if (rev_id
& PCI_CFG_REV_ID_BIT_BASIC_SKU
) {
907 D_INFO("3945 RADIO-MB type\n");
908 il_set_bit(il
, CSR_HW_IF_CONFIG_REG
,
909 CSR39_HW_IF_CONFIG_REG_BIT_3945_MB
);
911 D_INFO("3945 RADIO-MM type\n");
912 il_set_bit(il
, CSR_HW_IF_CONFIG_REG
,
913 CSR39_HW_IF_CONFIG_REG_BIT_3945_MM
);
916 if (EEPROM_SKU_CAP_OP_MODE_MRC
== eeprom
->sku_cap
) {
917 D_INFO("SKU OP mode is mrc\n");
918 il_set_bit(il
, CSR_HW_IF_CONFIG_REG
,
919 CSR39_HW_IF_CONFIG_REG_BIT_SKU_MRC
);
921 D_INFO("SKU OP mode is basic\n");
923 if ((eeprom
->board_revision
& 0xF0) == 0xD0) {
924 D_INFO("3945ABG revision is 0x%X\n",
925 eeprom
->board_revision
);
926 il_set_bit(il
, CSR_HW_IF_CONFIG_REG
,
927 CSR39_HW_IF_CONFIG_REG_BIT_BOARD_TYPE
);
929 D_INFO("3945ABG revision is 0x%X\n",
930 eeprom
->board_revision
);
931 il_clear_bit(il
, CSR_HW_IF_CONFIG_REG
,
932 CSR39_HW_IF_CONFIG_REG_BIT_BOARD_TYPE
);
935 if (eeprom
->almgor_m_version
<= 1) {
936 il_set_bit(il
, CSR_HW_IF_CONFIG_REG
,
937 CSR39_HW_IF_CONFIG_REG_BITS_SILICON_TYPE_A
);
938 D_INFO("Card M type A version is 0x%X\n",
939 eeprom
->almgor_m_version
);
941 D_INFO("Card M type B version is 0x%X\n",
942 eeprom
->almgor_m_version
);
943 il_set_bit(il
, CSR_HW_IF_CONFIG_REG
,
944 CSR39_HW_IF_CONFIG_REG_BITS_SILICON_TYPE_B
);
946 spin_unlock_irqrestore(&il
->lock
, flags
);
948 if (eeprom
->sku_cap
& EEPROM_SKU_CAP_SW_RF_KILL_ENABLE
)
949 D_RF_KILL("SW RF KILL supported in EEPROM.\n");
951 if (eeprom
->sku_cap
& EEPROM_SKU_CAP_HW_RF_KILL_ENABLE
)
952 D_RF_KILL("HW RF KILL supported in EEPROM.\n");
955 int il3945_hw_nic_init(struct il_priv
*il
)
959 struct il_rx_queue
*rxq
= &il
->rxq
;
961 spin_lock_irqsave(&il
->lock
, flags
);
962 il
->cfg
->ops
->lib
->apm_ops
.init(il
);
963 spin_unlock_irqrestore(&il
->lock
, flags
);
965 il3945_set_pwr_vmain(il
);
967 il
->cfg
->ops
->lib
->apm_ops
.config(il
);
969 /* Allocate the RX queue, or reset if it is already allocated */
971 rc
= il_rx_queue_alloc(il
);
973 IL_ERR("Unable to initialize Rx queue\n");
977 il3945_rx_queue_reset(il
, rxq
);
979 il3945_rx_replenish(il
);
981 il3945_rx_init(il
, rxq
);
984 /* Look at using this instead:
985 rxq->need_update = 1;
986 il_rx_queue_update_write_ptr(il, rxq);
989 il_wr(il
, FH39_RCSR_WPTR(0), rxq
->write
& ~7);
991 rc
= il3945_txq_ctx_reset(il
);
995 set_bit(STATUS_INIT
, &il
->status
);
1001 * il3945_hw_txq_ctx_free - Free TXQ Context
1003 * Destroy all TX DMA queues and structures
1005 void il3945_hw_txq_ctx_free(struct il_priv
*il
)
1011 for (txq_id
= 0; txq_id
< il
->hw_params
.max_txq_num
;
1013 if (txq_id
== IL39_CMD_QUEUE_NUM
)
1014 il_cmd_queue_free(il
);
1016 il_tx_queue_free(il
, txq_id
);
1018 /* free tx queue structure */
1022 void il3945_hw_txq_ctx_stop(struct il_priv
*il
)
1027 il_wr_prph(il
, ALM_SCD_MODE_REG
, 0);
1028 il_wr_prph(il
, ALM_SCD_TXFACT_REG
, 0);
1030 /* reset TFD queues */
1031 for (txq_id
= 0; txq_id
< il
->hw_params
.max_txq_num
; txq_id
++) {
1032 il_wr(il
, FH39_TCSR_CONFIG(txq_id
), 0x0);
1033 il_poll_bit(il
, FH39_TSSR_TX_STATUS
,
1034 FH39_TSSR_TX_STATUS_REG_MSK_CHNL_IDLE(txq_id
),
1038 il3945_hw_txq_ctx_free(il
);
1042 * il3945_hw_reg_adjust_power_by_temp
1043 * return index delta into power gain settings table
1045 static int il3945_hw_reg_adjust_power_by_temp(int new_reading
, int old_reading
)
1047 return (new_reading
- old_reading
) * (-11) / 100;
1051 * il3945_hw_reg_temp_out_of_range - Keep temperature in sane range
1053 static inline int il3945_hw_reg_temp_out_of_range(int temperature
)
1055 return (temperature
< -260 || temperature
> 25) ? 1 : 0;
1058 int il3945_hw_get_temperature(struct il_priv
*il
)
1060 return _il_rd(il
, CSR_UCODE_DRV_GP2
);
1064 * il3945_hw_reg_txpower_get_temperature
1065 * get the current temperature by reading from NIC
1067 static int il3945_hw_reg_txpower_get_temperature(struct il_priv
*il
)
1069 struct il3945_eeprom
*eeprom
= (struct il3945_eeprom
*)il
->eeprom
;
1072 temperature
= il3945_hw_get_temperature(il
);
1074 /* driver's okay range is -260 to +25.
1075 * human readable okay range is 0 to +285 */
1076 D_INFO("Temperature: %d\n", temperature
+ IL_TEMP_CONVERT
);
1078 /* handle insane temp reading */
1079 if (il3945_hw_reg_temp_out_of_range(temperature
)) {
1080 IL_ERR("Error bad temperature value %d\n", temperature
);
1082 /* if really really hot(?),
1083 * substitute the 3rd band/group's temp measured at factory */
1084 if (il
->last_temperature
> 100)
1085 temperature
= eeprom
->groups
[2].temperature
;
1086 else /* else use most recent "sane" value from driver */
1087 temperature
= il
->last_temperature
;
1090 return temperature
; /* raw, not "human readable" */
1093 /* Adjust Txpower only if temperature variance is greater than threshold.
1095 * Both are lower than older versions' 9 degrees */
1096 #define IL_TEMPERATURE_LIMIT_TIMER 6
1099 * il3945_is_temp_calib_needed - determines if new calibration is needed
1101 * records new temperature in tx_mgr->temperature.
1102 * replaces tx_mgr->last_temperature *only* if calib needed
1103 * (assumes caller will actually do the calibration!). */
1104 static int il3945_is_temp_calib_needed(struct il_priv
*il
)
1108 il
->temperature
= il3945_hw_reg_txpower_get_temperature(il
);
1109 temp_diff
= il
->temperature
- il
->last_temperature
;
1111 /* get absolute value */
1112 if (temp_diff
< 0) {
1113 D_POWER("Getting cooler, delta %d,\n", temp_diff
);
1114 temp_diff
= -temp_diff
;
1115 } else if (temp_diff
== 0)
1116 D_POWER("Same temp,\n");
1118 D_POWER("Getting warmer, delta %d,\n", temp_diff
);
1120 /* if we don't need calibration, *don't* update last_temperature */
1121 if (temp_diff
< IL_TEMPERATURE_LIMIT_TIMER
) {
1122 D_POWER("Timed thermal calib not needed\n");
1126 D_POWER("Timed thermal calib needed\n");
1128 /* assume that caller will actually do calib ...
1129 * update the "last temperature" value */
1130 il
->last_temperature
= il
->temperature
;
1134 #define IL_MAX_GAIN_ENTRIES 78
1135 #define IL_CCK_FROM_OFDM_POWER_DIFF -5
1136 #define IL_CCK_FROM_OFDM_INDEX_DIFF (10)
1138 /* radio and DSP power table, each step is 1/2 dB.
1139 * 1st number is for RF analog gain, 2nd number is for DSP pre-DAC gain. */
1140 static struct il3945_tx_power power_gain_table
[2][IL_MAX_GAIN_ENTRIES
] = {
1142 {251, 127}, /* 2.4 GHz, highest power */
1219 {3, 95} }, /* 2.4 GHz, lowest power */
1221 {251, 127}, /* 5.x GHz, highest power */
1298 {3, 120} } /* 5.x GHz, lowest power */
1301 static inline u8
il3945_hw_reg_fix_power_index(int index
)
1305 if (index
>= IL_MAX_GAIN_ENTRIES
)
1306 return IL_MAX_GAIN_ENTRIES
- 1;
1310 /* Kick off thermal recalibration check every 60 seconds */
1311 #define REG_RECALIB_PERIOD (60)
1314 * il3945_hw_reg_set_scan_power - Set Tx power for scan probe requests
1316 * Set (in our channel info database) the direct scan Tx power for 1 Mbit (CCK)
1317 * or 6 Mbit (OFDM) rates.
1319 static void il3945_hw_reg_set_scan_power(struct il_priv
*il
, u32 scan_tbl_index
,
1320 s32 rate_index
, const s8
*clip_pwrs
,
1321 struct il_channel_info
*ch_info
,
1324 struct il3945_scan_power_info
*scan_power_info
;
1328 scan_power_info
= &ch_info
->scan_pwr_info
[scan_tbl_index
];
1330 /* use this channel group's 6Mbit clipping/saturation pwr,
1331 * but cap at regulatory scan power restriction (set during init
1332 * based on eeprom channel data) for this channel. */
1333 power
= min(ch_info
->scan_power
, clip_pwrs
[IL_RATE_6M_INDEX_TABLE
]);
1335 power
= min(power
, il
->tx_power_user_lmt
);
1336 scan_power_info
->requested_power
= power
;
1338 /* find difference between new scan *power* and current "normal"
1339 * Tx *power* for 6Mb. Use this difference (x2) to adjust the
1340 * current "normal" temperature-compensated Tx power *index* for
1341 * this rate (1Mb or 6Mb) to yield new temp-compensated scan power
1343 power_index
= ch_info
->power_info
[rate_index
].power_table_index
1344 - (power
- ch_info
->power_info
1345 [IL_RATE_6M_INDEX_TABLE
].requested_power
) * 2;
1347 /* store reference index that we use when adjusting *all* scan
1348 * powers. So we can accommodate user (all channel) or spectrum
1349 * management (single channel) power changes "between" temperature
1350 * feedback compensation procedures.
1351 * don't force fit this reference index into gain table; it may be a
1352 * negative number. This will help avoid errors when we're at
1353 * the lower bounds (highest gains, for warmest temperatures)
1356 /* don't exceed table bounds for "real" setting */
1357 power_index
= il3945_hw_reg_fix_power_index(power_index
);
1359 scan_power_info
->power_table_index
= power_index
;
1360 scan_power_info
->tpc
.tx_gain
=
1361 power_gain_table
[band_index
][power_index
].tx_gain
;
1362 scan_power_info
->tpc
.dsp_atten
=
1363 power_gain_table
[band_index
][power_index
].dsp_atten
;
1367 * il3945_send_tx_power - fill in Tx Power command with gain settings
1369 * Configures power settings for all rates for the current channel,
1370 * using values from channel info struct, and send to NIC
1372 static int il3945_send_tx_power(struct il_priv
*il
)
1375 const struct il_channel_info
*ch_info
= NULL
;
1376 struct il3945_txpowertable_cmd txpower
= {
1377 .channel
= il
->ctx
.active
.channel
,
1381 if (WARN_ONCE(test_bit(STATUS_SCAN_HW
, &il
->status
),
1382 "TX Power requested while scanning!\n"))
1385 chan
= le16_to_cpu(il
->ctx
.active
.channel
);
1387 txpower
.band
= (il
->band
== IEEE80211_BAND_5GHZ
) ? 0 : 1;
1388 ch_info
= il_get_channel_info(il
, il
->band
, chan
);
1391 "Failed to get channel info for channel %d [%d]\n",
1396 if (!il_is_channel_valid(ch_info
)) {
1397 D_POWER("Not calling TX_PWR_TABLE_CMD on "
1398 "non-Tx channel.\n");
1402 /* fill cmd with power settings for all rates for current channel */
1403 /* Fill OFDM rate */
1404 for (rate_idx
= IL_FIRST_OFDM_RATE
, i
= 0;
1405 rate_idx
<= IL39_LAST_OFDM_RATE
; rate_idx
++, i
++) {
1407 txpower
.power
[i
].tpc
= ch_info
->power_info
[i
].tpc
;
1408 txpower
.power
[i
].rate
= il3945_rates
[rate_idx
].plcp
;
1410 D_POWER("ch %d:%d rf %d dsp %3d rate code 0x%02x\n",
1411 le16_to_cpu(txpower
.channel
),
1413 txpower
.power
[i
].tpc
.tx_gain
,
1414 txpower
.power
[i
].tpc
.dsp_atten
,
1415 txpower
.power
[i
].rate
);
1417 /* Fill CCK rates */
1418 for (rate_idx
= IL_FIRST_CCK_RATE
;
1419 rate_idx
<= IL_LAST_CCK_RATE
; rate_idx
++, i
++) {
1420 txpower
.power
[i
].tpc
= ch_info
->power_info
[i
].tpc
;
1421 txpower
.power
[i
].rate
= il3945_rates
[rate_idx
].plcp
;
1423 D_POWER("ch %d:%d rf %d dsp %3d rate code 0x%02x\n",
1424 le16_to_cpu(txpower
.channel
),
1426 txpower
.power
[i
].tpc
.tx_gain
,
1427 txpower
.power
[i
].tpc
.dsp_atten
,
1428 txpower
.power
[i
].rate
);
1431 return il_send_cmd_pdu(il
, REPLY_TX_PWR_TABLE_CMD
,
1432 sizeof(struct il3945_txpowertable_cmd
),
1438 * il3945_hw_reg_set_new_power - Configures power tables at new levels
1439 * @ch_info: Channel to update. Uses power_info.requested_power.
1441 * Replace requested_power and base_power_index ch_info fields for
1444 * Called if user or spectrum management changes power preferences.
1445 * Takes into account h/w and modulation limitations (clip power).
1447 * This does *not* send anything to NIC, just sets up ch_info for one channel.
1449 * NOTE: reg_compensate_for_temperature_dif() *must* be run after this to
1450 * properly fill out the scan powers, and actual h/w gain settings,
1451 * and send changes to NIC
1453 static int il3945_hw_reg_set_new_power(struct il_priv
*il
,
1454 struct il_channel_info
*ch_info
)
1456 struct il3945_channel_power_info
*power_info
;
1457 int power_changed
= 0;
1459 const s8
*clip_pwrs
;
1462 /* Get this chnlgrp's rate-to-max/clip-powers table */
1463 clip_pwrs
= il
->_3945
.clip_groups
[ch_info
->group_index
].clip_powers
;
1465 /* Get this channel's rate-to-current-power settings table */
1466 power_info
= ch_info
->power_info
;
1468 /* update OFDM Txpower settings */
1469 for (i
= IL_RATE_6M_INDEX_TABLE
; i
<= IL_RATE_54M_INDEX_TABLE
;
1470 i
++, ++power_info
) {
1473 /* limit new power to be no more than h/w capability */
1474 power
= min(ch_info
->curr_txpow
, clip_pwrs
[i
]);
1475 if (power
== power_info
->requested_power
)
1478 /* find difference between old and new requested powers,
1479 * update base (non-temp-compensated) power index */
1480 delta_idx
= (power
- power_info
->requested_power
) * 2;
1481 power_info
->base_power_index
-= delta_idx
;
1483 /* save new requested power value */
1484 power_info
->requested_power
= power
;
1489 /* update CCK Txpower settings, based on OFDM 12M setting ...
1490 * ... all CCK power settings for a given channel are the *same*. */
1491 if (power_changed
) {
1493 ch_info
->power_info
[IL_RATE_12M_INDEX_TABLE
].
1494 requested_power
+ IL_CCK_FROM_OFDM_POWER_DIFF
;
1496 /* do all CCK rates' il3945_channel_power_info structures */
1497 for (i
= IL_RATE_1M_INDEX_TABLE
; i
<= IL_RATE_11M_INDEX_TABLE
; i
++) {
1498 power_info
->requested_power
= power
;
1499 power_info
->base_power_index
=
1500 ch_info
->power_info
[IL_RATE_12M_INDEX_TABLE
].
1501 base_power_index
+ IL_CCK_FROM_OFDM_INDEX_DIFF
;
1510 * il3945_hw_reg_get_ch_txpower_limit - returns new power limit for channel
1512 * NOTE: Returned power limit may be less (but not more) than requested,
1513 * based strictly on regulatory (eeprom and spectrum mgt) limitations
1514 * (no consideration for h/w clipping limitations).
1516 static int il3945_hw_reg_get_ch_txpower_limit(struct il_channel_info
*ch_info
)
1521 /* if we're using TGd limits, use lower of TGd or EEPROM */
1522 if (ch_info
->tgd_data
.max_power
!= 0)
1523 max_power
= min(ch_info
->tgd_data
.max_power
,
1524 ch_info
->eeprom
.max_power_avg
);
1526 /* else just use EEPROM limits */
1529 max_power
= ch_info
->eeprom
.max_power_avg
;
1531 return min(max_power
, ch_info
->max_power_avg
);
1535 * il3945_hw_reg_comp_txpower_temp - Compensate for temperature
1537 * Compensate txpower settings of *all* channels for temperature.
1538 * This only accounts for the difference between current temperature
1539 * and the factory calibration temperatures, and bases the new settings
1540 * on the channel's base_power_index.
1542 * If RxOn is "associated", this sends the new Txpower to NIC!
1544 static int il3945_hw_reg_comp_txpower_temp(struct il_priv
*il
)
1546 struct il_channel_info
*ch_info
= NULL
;
1547 struct il3945_eeprom
*eeprom
= (struct il3945_eeprom
*)il
->eeprom
;
1549 const s8
*clip_pwrs
; /* array of h/w max power levels for each rate */
1555 int temperature
= il
->temperature
;
1557 if (il
->disable_tx_power_cal
||
1558 test_bit(STATUS_SCANNING
, &il
->status
)) {
1559 /* do not perform tx power calibration */
1562 /* set up new Tx power info for each and every channel, 2.4 and 5.x */
1563 for (i
= 0; i
< il
->channel_count
; i
++) {
1564 ch_info
= &il
->channel_info
[i
];
1565 a_band
= il_is_channel_a_band(ch_info
);
1567 /* Get this chnlgrp's factory calibration temperature */
1568 ref_temp
= (s16
)eeprom
->groups
[ch_info
->group_index
].
1571 /* get power index adjustment based on current and factory
1573 delta_index
= il3945_hw_reg_adjust_power_by_temp(temperature
,
1576 /* set tx power value for all rates, OFDM and CCK */
1577 for (rate_index
= 0; rate_index
< IL_RATE_COUNT_3945
;
1580 ch_info
->power_info
[rate_index
].base_power_index
;
1582 /* temperature compensate */
1583 power_idx
+= delta_index
;
1585 /* stay within table range */
1586 power_idx
= il3945_hw_reg_fix_power_index(power_idx
);
1587 ch_info
->power_info
[rate_index
].
1588 power_table_index
= (u8
) power_idx
;
1589 ch_info
->power_info
[rate_index
].tpc
=
1590 power_gain_table
[a_band
][power_idx
];
1593 /* Get this chnlgrp's rate-to-max/clip-powers table */
1594 clip_pwrs
= il
->_3945
.clip_groups
[ch_info
->group_index
].clip_powers
;
1596 /* set scan tx power, 1Mbit for CCK, 6Mbit for OFDM */
1597 for (scan_tbl_index
= 0;
1598 scan_tbl_index
< IL_NUM_SCAN_RATES
; scan_tbl_index
++) {
1599 s32 actual_index
= (scan_tbl_index
== 0) ?
1600 IL_RATE_1M_INDEX_TABLE
: IL_RATE_6M_INDEX_TABLE
;
1601 il3945_hw_reg_set_scan_power(il
, scan_tbl_index
,
1602 actual_index
, clip_pwrs
,
1607 /* send Txpower command for current channel to ucode */
1608 return il
->cfg
->ops
->lib
->send_tx_power(il
);
1611 int il3945_hw_reg_set_txpower(struct il_priv
*il
, s8 power
)
1613 struct il_channel_info
*ch_info
;
1618 if (il
->tx_power_user_lmt
== power
) {
1619 D_POWER("Requested Tx power same as current "
1620 "limit: %ddBm.\n", power
);
1624 D_POWER("Setting upper limit clamp to %ddBm.\n", power
);
1625 il
->tx_power_user_lmt
= power
;
1627 /* set up new Tx powers for each and every channel, 2.4 and 5.x */
1629 for (i
= 0; i
< il
->channel_count
; i
++) {
1630 ch_info
= &il
->channel_info
[i
];
1631 a_band
= il_is_channel_a_band(ch_info
);
1633 /* find minimum power of all user and regulatory constraints
1634 * (does not consider h/w clipping limitations) */
1635 max_power
= il3945_hw_reg_get_ch_txpower_limit(ch_info
);
1636 max_power
= min(power
, max_power
);
1637 if (max_power
!= ch_info
->curr_txpow
) {
1638 ch_info
->curr_txpow
= max_power
;
1640 /* this considers the h/w clipping limitations */
1641 il3945_hw_reg_set_new_power(il
, ch_info
);
1645 /* update txpower settings for all channels,
1646 * send to NIC if associated. */
1647 il3945_is_temp_calib_needed(il
);
1648 il3945_hw_reg_comp_txpower_temp(il
);
1653 static int il3945_send_rxon_assoc(struct il_priv
*il
,
1654 struct il_rxon_context
*ctx
)
1657 struct il_rx_pkt
*pkt
;
1658 struct il3945_rxon_assoc_cmd rxon_assoc
;
1659 struct il_host_cmd cmd
= {
1660 .id
= REPLY_RXON_ASSOC
,
1661 .len
= sizeof(rxon_assoc
),
1662 .flags
= CMD_WANT_SKB
,
1663 .data
= &rxon_assoc
,
1665 const struct il_rxon_cmd
*rxon1
= &ctx
->staging
;
1666 const struct il_rxon_cmd
*rxon2
= &ctx
->active
;
1668 if (rxon1
->flags
== rxon2
->flags
&&
1669 rxon1
->filter_flags
== rxon2
->filter_flags
&&
1670 rxon1
->cck_basic_rates
== rxon2
->cck_basic_rates
&&
1671 rxon1
->ofdm_basic_rates
== rxon2
->ofdm_basic_rates
) {
1672 D_INFO("Using current RXON_ASSOC. Not resending.\n");
1676 rxon_assoc
.flags
= ctx
->staging
.flags
;
1677 rxon_assoc
.filter_flags
= ctx
->staging
.filter_flags
;
1678 rxon_assoc
.ofdm_basic_rates
= ctx
->staging
.ofdm_basic_rates
;
1679 rxon_assoc
.cck_basic_rates
= ctx
->staging
.cck_basic_rates
;
1680 rxon_assoc
.reserved
= 0;
1682 rc
= il_send_cmd_sync(il
, &cmd
);
1686 pkt
= (struct il_rx_pkt
*)cmd
.reply_page
;
1687 if (pkt
->hdr
.flags
& IL_CMD_FAILED_MSK
) {
1688 IL_ERR("Bad return from REPLY_RXON_ASSOC command\n");
1692 il_free_pages(il
, cmd
.reply_page
);
1698 * il3945_commit_rxon - commit staging_rxon to hardware
1700 * The RXON command in staging_rxon is committed to the hardware and
1701 * the active_rxon structure is updated with the new data. This
1702 * function correctly transitions out of the RXON_ASSOC_MSK state if
1703 * a HW tune is required based on the RXON structure changes.
1705 int il3945_commit_rxon(struct il_priv
*il
, struct il_rxon_context
*ctx
)
1707 /* cast away the const for active_rxon in this function */
1708 struct il3945_rxon_cmd
*active_rxon
= (void *)&ctx
->active
;
1709 struct il3945_rxon_cmd
*staging_rxon
= (void *)&ctx
->staging
;
1711 bool new_assoc
= !!(staging_rxon
->filter_flags
& RXON_FILTER_ASSOC_MSK
);
1713 if (test_bit(STATUS_EXIT_PENDING
, &il
->status
))
1716 if (!il_is_alive(il
))
1719 /* always get timestamp with Rx frame */
1720 staging_rxon
->flags
|= RXON_FLG_TSF2HOST_MSK
;
1722 /* select antenna */
1723 staging_rxon
->flags
&=
1724 ~(RXON_FLG_DIS_DIV_MSK
| RXON_FLG_ANT_SEL_MSK
);
1725 staging_rxon
->flags
|= il3945_get_antenna_flags(il
);
1727 rc
= il_check_rxon_cmd(il
, ctx
);
1729 IL_ERR("Invalid RXON configuration. Not committing.\n");
1733 /* If we don't need to send a full RXON, we can use
1734 * il3945_rxon_assoc_cmd which is used to reconfigure filter
1735 * and other flags for the current radio configuration. */
1736 if (!il_full_rxon_required(il
,
1738 rc
= il_send_rxon_assoc(il
,
1741 IL_ERR("Error setting RXON_ASSOC "
1742 "configuration (%d).\n", rc
);
1746 memcpy(active_rxon
, staging_rxon
, sizeof(*active_rxon
));
1748 * We do not commit tx power settings while channel changing,
1749 * do it now if tx power changed.
1751 il_set_tx_power(il
, il
->tx_power_next
, false);
1755 /* If we are currently associated and the new config requires
1756 * an RXON_ASSOC and the new config wants the associated mask enabled,
1757 * we must clear the associated from the active configuration
1758 * before we apply the new config */
1759 if (il_is_associated(il
) && new_assoc
) {
1760 D_INFO("Toggling associated bit on current RXON\n");
1761 active_rxon
->filter_flags
&= ~RXON_FILTER_ASSOC_MSK
;
1764 * reserved4 and 5 could have been filled by the iwlcore code.
1765 * Let's clear them before pushing to the 3945.
1767 active_rxon
->reserved4
= 0;
1768 active_rxon
->reserved5
= 0;
1769 rc
= il_send_cmd_pdu(il
, REPLY_RXON
,
1770 sizeof(struct il3945_rxon_cmd
),
1773 /* If the mask clearing failed then we set
1774 * active_rxon back to what it was previously */
1776 active_rxon
->filter_flags
|= RXON_FILTER_ASSOC_MSK
;
1777 IL_ERR("Error clearing ASSOC_MSK on current "
1778 "configuration (%d).\n", rc
);
1781 il_clear_ucode_stations(il
,
1783 il_restore_stations(il
,
1787 D_INFO("Sending RXON\n"
1788 "* with%s RXON_FILTER_ASSOC_MSK\n"
1791 (new_assoc
? "" : "out"),
1792 le16_to_cpu(staging_rxon
->channel
),
1793 staging_rxon
->bssid_addr
);
1796 * reserved4 and 5 could have been filled by the iwlcore code.
1797 * Let's clear them before pushing to the 3945.
1799 staging_rxon
->reserved4
= 0;
1800 staging_rxon
->reserved5
= 0;
1802 il_set_rxon_hwcrypto(il
, ctx
, !il3945_mod_params
.sw_crypto
);
1804 /* Apply the new configuration */
1805 rc
= il_send_cmd_pdu(il
, REPLY_RXON
,
1806 sizeof(struct il3945_rxon_cmd
),
1809 IL_ERR("Error setting new configuration (%d).\n", rc
);
1813 memcpy(active_rxon
, staging_rxon
, sizeof(*active_rxon
));
1816 il_clear_ucode_stations(il
,
1818 il_restore_stations(il
,
1822 /* If we issue a new RXON command which required a tune then we must
1823 * send a new TXPOWER command or we won't be able to Tx any frames */
1824 rc
= il_set_tx_power(il
, il
->tx_power_next
, true);
1826 IL_ERR("Error setting Tx power (%d).\n", rc
);
1830 /* Init the hardware's rate fallback order based on the band */
1831 rc
= il3945_init_hw_rate_table(il
);
1833 IL_ERR("Error setting HW rate table: %02X\n", rc
);
1841 * il3945_reg_txpower_periodic - called when time to check our temperature.
1843 * -- reset periodic timer
1844 * -- see if temp has changed enough to warrant re-calibration ... if so:
1845 * -- correct coeffs for temp (can reset temp timer)
1846 * -- save this temp as "last",
1847 * -- send new set of gain settings to NIC
1848 * NOTE: This should continue working, even when we're not associated,
1849 * so we can keep our internal table of scan powers current. */
1850 void il3945_reg_txpower_periodic(struct il_priv
*il
)
1852 /* This will kick in the "brute force"
1853 * il3945_hw_reg_comp_txpower_temp() below */
1854 if (!il3945_is_temp_calib_needed(il
))
1857 /* Set up a new set of temp-adjusted TxPowers, send to NIC.
1858 * This is based *only* on current temperature,
1859 * ignoring any previous power measurements */
1860 il3945_hw_reg_comp_txpower_temp(il
);
1863 queue_delayed_work(il
->workqueue
,
1864 &il
->_3945
.thermal_periodic
, REG_RECALIB_PERIOD
* HZ
);
1867 static void il3945_bg_reg_txpower_periodic(struct work_struct
*work
)
1869 struct il_priv
*il
= container_of(work
, struct il_priv
,
1870 _3945
.thermal_periodic
.work
);
1872 if (test_bit(STATUS_EXIT_PENDING
, &il
->status
))
1875 mutex_lock(&il
->mutex
);
1876 il3945_reg_txpower_periodic(il
);
1877 mutex_unlock(&il
->mutex
);
1881 * il3945_hw_reg_get_ch_grp_index - find the channel-group index (0-4)
1884 * This function is used when initializing channel-info structs.
1886 * NOTE: These channel groups do *NOT* match the bands above!
1887 * These channel groups are based on factory-tested channels;
1888 * on A-band, EEPROM's "group frequency" entries represent the top
1889 * channel in each group 1-4. Group 5 All B/G channels are in group 0.
1891 static u16
il3945_hw_reg_get_ch_grp_index(struct il_priv
*il
,
1892 const struct il_channel_info
*ch_info
)
1894 struct il3945_eeprom
*eeprom
= (struct il3945_eeprom
*)il
->eeprom
;
1895 struct il3945_eeprom_txpower_group
*ch_grp
= &eeprom
->groups
[0];
1897 u16 group_index
= 0; /* based on factory calib frequencies */
1900 /* Find the group index for the channel ... don't use index 1(?) */
1901 if (il_is_channel_a_band(ch_info
)) {
1902 for (group
= 1; group
< 5; group
++) {
1903 grp_channel
= ch_grp
[group
].group_channel
;
1904 if (ch_info
->channel
<= grp_channel
) {
1905 group_index
= group
;
1909 /* group 4 has a few channels *above* its factory cal freq */
1913 group_index
= 0; /* 2.4 GHz, group 0 */
1915 D_POWER("Chnl %d mapped to grp %d\n", ch_info
->channel
,
1921 * il3945_hw_reg_get_matched_power_index - Interpolate to get nominal index
1923 * Interpolate to get nominal (i.e. at factory calibration temperature) index
1924 * into radio/DSP gain settings table for requested power.
1926 static int il3945_hw_reg_get_matched_power_index(struct il_priv
*il
,
1928 s32 setting_index
, s32
*new_index
)
1930 const struct il3945_eeprom_txpower_group
*chnl_grp
= NULL
;
1931 struct il3945_eeprom
*eeprom
= (struct il3945_eeprom
*)il
->eeprom
;
1933 s32 power
= 2 * requested_power
;
1935 const struct il3945_eeprom_txpower_sample
*samples
;
1940 chnl_grp
= &eeprom
->groups
[setting_index
];
1941 samples
= chnl_grp
->samples
;
1942 for (i
= 0; i
< 5; i
++) {
1943 if (power
== samples
[i
].power
) {
1944 *new_index
= samples
[i
].gain_index
;
1949 if (power
> samples
[1].power
) {
1952 } else if (power
> samples
[2].power
) {
1955 } else if (power
> samples
[3].power
) {
1963 denominator
= (s32
) samples
[index1
].power
- (s32
) samples
[index0
].power
;
1964 if (denominator
== 0)
1966 gains0
= (s32
) samples
[index0
].gain_index
* (1 << 19);
1967 gains1
= (s32
) samples
[index1
].gain_index
* (1 << 19);
1968 res
= gains0
+ (gains1
- gains0
) *
1969 ((s32
) power
- (s32
) samples
[index0
].power
) / denominator
+
1971 *new_index
= res
>> 19;
1975 static void il3945_hw_reg_init_channel_groups(struct il_priv
*il
)
1979 struct il3945_eeprom
*eeprom
= (struct il3945_eeprom
*)il
->eeprom
;
1980 const struct il3945_eeprom_txpower_group
*group
;
1982 D_POWER("Initializing factory calib info from EEPROM\n");
1984 for (i
= 0; i
< IL_NUM_TX_CALIB_GROUPS
; i
++) {
1985 s8
*clip_pwrs
; /* table of power levels for each rate */
1986 s8 satur_pwr
; /* saturation power for each chnl group */
1987 group
= &eeprom
->groups
[i
];
1989 /* sanity check on factory saturation power value */
1990 if (group
->saturation_power
< 40) {
1991 IL_WARN("Error: saturation power is %d, "
1992 "less than minimum expected 40\n",
1993 group
->saturation_power
);
1998 * Derive requested power levels for each rate, based on
1999 * hardware capabilities (saturation power for band).
2000 * Basic value is 3dB down from saturation, with further
2001 * power reductions for highest 3 data rates. These
2002 * backoffs provide headroom for high rate modulation
2003 * power peaks, without too much distortion (clipping).
2005 /* we'll fill in this array with h/w max power levels */
2006 clip_pwrs
= (s8
*) il
->_3945
.clip_groups
[i
].clip_powers
;
2008 /* divide factory saturation power by 2 to find -3dB level */
2009 satur_pwr
= (s8
) (group
->saturation_power
>> 1);
2011 /* fill in channel group's nominal powers for each rate */
2012 for (rate_index
= 0;
2013 rate_index
< IL_RATE_COUNT_3945
; rate_index
++, clip_pwrs
++) {
2014 switch (rate_index
) {
2015 case IL_RATE_36M_INDEX_TABLE
:
2016 if (i
== 0) /* B/G */
2017 *clip_pwrs
= satur_pwr
;
2019 *clip_pwrs
= satur_pwr
- 5;
2021 case IL_RATE_48M_INDEX_TABLE
:
2023 *clip_pwrs
= satur_pwr
- 7;
2025 *clip_pwrs
= satur_pwr
- 10;
2027 case IL_RATE_54M_INDEX_TABLE
:
2029 *clip_pwrs
= satur_pwr
- 9;
2031 *clip_pwrs
= satur_pwr
- 12;
2034 *clip_pwrs
= satur_pwr
;
2042 * il3945_txpower_set_from_eeprom - Set channel power info based on EEPROM
2044 * Second pass (during init) to set up il->channel_info
2046 * Set up Tx-power settings in our channel info database for each VALID
2047 * (for this geo/SKU) channel, at all Tx data rates, based on eeprom values
2048 * and current temperature.
2050 * Since this is based on current temperature (at init time), these values may
2051 * not be valid for very long, but it gives us a starting/default point,
2052 * and allows us to active (i.e. using Tx) scan.
2054 * This does *not* write values to NIC, just sets up our internal table.
2056 int il3945_txpower_set_from_eeprom(struct il_priv
*il
)
2058 struct il_channel_info
*ch_info
= NULL
;
2059 struct il3945_channel_power_info
*pwr_info
;
2060 struct il3945_eeprom
*eeprom
= (struct il3945_eeprom
*)il
->eeprom
;
2064 const s8
*clip_pwrs
; /* array of power levels for each rate */
2067 u8 pwr_index
, base_pwr_index
, a_band
;
2071 /* save temperature reference,
2072 * so we can determine next time to calibrate */
2073 temperature
= il3945_hw_reg_txpower_get_temperature(il
);
2074 il
->last_temperature
= temperature
;
2076 il3945_hw_reg_init_channel_groups(il
);
2078 /* initialize Tx power info for each and every channel, 2.4 and 5.x */
2079 for (i
= 0, ch_info
= il
->channel_info
; i
< il
->channel_count
;
2081 a_band
= il_is_channel_a_band(ch_info
);
2082 if (!il_is_channel_valid(ch_info
))
2085 /* find this channel's channel group (*not* "band") index */
2086 ch_info
->group_index
=
2087 il3945_hw_reg_get_ch_grp_index(il
, ch_info
);
2089 /* Get this chnlgrp's rate->max/clip-powers table */
2090 clip_pwrs
= il
->_3945
.clip_groups
[ch_info
->group_index
].clip_powers
;
2092 /* calculate power index *adjustment* value according to
2093 * diff between current temperature and factory temperature */
2094 delta_index
= il3945_hw_reg_adjust_power_by_temp(temperature
,
2095 eeprom
->groups
[ch_info
->group_index
].
2098 D_POWER("Delta index for channel %d: %d [%d]\n",
2099 ch_info
->channel
, delta_index
, temperature
+
2102 /* set tx power value for all OFDM rates */
2103 for (rate_index
= 0; rate_index
< IL_OFDM_RATES
;
2105 s32
uninitialized_var(power_idx
);
2108 /* use channel group's clip-power table,
2109 * but don't exceed channel's max power */
2110 s8 pwr
= min(ch_info
->max_power_avg
,
2111 clip_pwrs
[rate_index
]);
2113 pwr_info
= &ch_info
->power_info
[rate_index
];
2115 /* get base (i.e. at factory-measured temperature)
2116 * power table index for this rate's power */
2117 rc
= il3945_hw_reg_get_matched_power_index(il
, pwr
,
2118 ch_info
->group_index
,
2121 IL_ERR("Invalid power index\n");
2124 pwr_info
->base_power_index
= (u8
) power_idx
;
2126 /* temperature compensate */
2127 power_idx
+= delta_index
;
2129 /* stay within range of gain table */
2130 power_idx
= il3945_hw_reg_fix_power_index(power_idx
);
2132 /* fill 1 OFDM rate's il3945_channel_power_info struct */
2133 pwr_info
->requested_power
= pwr
;
2134 pwr_info
->power_table_index
= (u8
) power_idx
;
2135 pwr_info
->tpc
.tx_gain
=
2136 power_gain_table
[a_band
][power_idx
].tx_gain
;
2137 pwr_info
->tpc
.dsp_atten
=
2138 power_gain_table
[a_band
][power_idx
].dsp_atten
;
2141 /* set tx power for CCK rates, based on OFDM 12 Mbit settings*/
2142 pwr_info
= &ch_info
->power_info
[IL_RATE_12M_INDEX_TABLE
];
2143 power
= pwr_info
->requested_power
+
2144 IL_CCK_FROM_OFDM_POWER_DIFF
;
2145 pwr_index
= pwr_info
->power_table_index
+
2146 IL_CCK_FROM_OFDM_INDEX_DIFF
;
2147 base_pwr_index
= pwr_info
->base_power_index
+
2148 IL_CCK_FROM_OFDM_INDEX_DIFF
;
2150 /* stay within table range */
2151 pwr_index
= il3945_hw_reg_fix_power_index(pwr_index
);
2152 gain
= power_gain_table
[a_band
][pwr_index
].tx_gain
;
2153 dsp_atten
= power_gain_table
[a_band
][pwr_index
].dsp_atten
;
2155 /* fill each CCK rate's il3945_channel_power_info structure
2156 * NOTE: All CCK-rate Txpwrs are the same for a given chnl!
2157 * NOTE: CCK rates start at end of OFDM rates! */
2158 for (rate_index
= 0;
2159 rate_index
< IL_CCK_RATES
; rate_index
++) {
2160 pwr_info
= &ch_info
->power_info
[rate_index
+IL_OFDM_RATES
];
2161 pwr_info
->requested_power
= power
;
2162 pwr_info
->power_table_index
= pwr_index
;
2163 pwr_info
->base_power_index
= base_pwr_index
;
2164 pwr_info
->tpc
.tx_gain
= gain
;
2165 pwr_info
->tpc
.dsp_atten
= dsp_atten
;
2168 /* set scan tx power, 1Mbit for CCK, 6Mbit for OFDM */
2169 for (scan_tbl_index
= 0;
2170 scan_tbl_index
< IL_NUM_SCAN_RATES
; scan_tbl_index
++) {
2171 s32 actual_index
= (scan_tbl_index
== 0) ?
2172 IL_RATE_1M_INDEX_TABLE
: IL_RATE_6M_INDEX_TABLE
;
2173 il3945_hw_reg_set_scan_power(il
, scan_tbl_index
,
2174 actual_index
, clip_pwrs
, ch_info
, a_band
);
2181 int il3945_hw_rxq_stop(struct il_priv
*il
)
2185 il_wr(il
, FH39_RCSR_CONFIG(0), 0);
2186 rc
= il_poll_bit(il
, FH39_RSSR_STATUS
,
2187 FH39_RSSR_CHNL0_RX_STATUS_CHNL_IDLE
, 1000);
2189 IL_ERR("Can't stop Rx DMA.\n");
2194 int il3945_hw_tx_queue_init(struct il_priv
*il
, struct il_tx_queue
*txq
)
2196 int txq_id
= txq
->q
.id
;
2198 struct il3945_shared
*shared_data
= il
->_3945
.shared_virt
;
2200 shared_data
->tx_base_ptr
[txq_id
] = cpu_to_le32((u32
)txq
->q
.dma_addr
);
2202 il_wr(il
, FH39_CBCC_CTRL(txq_id
), 0);
2203 il_wr(il
, FH39_CBCC_BASE(txq_id
), 0);
2205 il_wr(il
, FH39_TCSR_CONFIG(txq_id
),
2206 FH39_TCSR_TX_CONFIG_REG_VAL_CIRQ_RTC_NOINT
|
2207 FH39_TCSR_TX_CONFIG_REG_VAL_MSG_MODE_TXF
|
2208 FH39_TCSR_TX_CONFIG_REG_VAL_CIRQ_HOST_IFTFD
|
2209 FH39_TCSR_TX_CONFIG_REG_VAL_DMA_CREDIT_ENABLE_VAL
|
2210 FH39_TCSR_TX_CONFIG_REG_VAL_DMA_CHNL_ENABLE
);
2212 /* fake read to flush all prev. writes */
2213 _il_rd(il
, FH39_TSSR_CBB_BASE
);
2221 static u16
il3945_get_hcmd_size(u8 cmd_id
, u16 len
)
2225 return sizeof(struct il3945_rxon_cmd
);
2226 case POWER_TABLE_CMD
:
2227 return sizeof(struct il3945_powertable_cmd
);
2234 static u16
il3945_build_addsta_hcmd(const struct il_addsta_cmd
*cmd
,
2237 struct il3945_addsta_cmd
*addsta
= (struct il3945_addsta_cmd
*)data
;
2238 addsta
->mode
= cmd
->mode
;
2239 memcpy(&addsta
->sta
, &cmd
->sta
, sizeof(struct sta_id_modify
));
2240 memcpy(&addsta
->key
, &cmd
->key
, sizeof(struct il4965_keyinfo
));
2241 addsta
->station_flags
= cmd
->station_flags
;
2242 addsta
->station_flags_msk
= cmd
->station_flags_msk
;
2243 addsta
->tid_disable_tx
= cpu_to_le16(0);
2244 addsta
->rate_n_flags
= cmd
->rate_n_flags
;
2245 addsta
->add_immediate_ba_tid
= cmd
->add_immediate_ba_tid
;
2246 addsta
->remove_immediate_ba_tid
= cmd
->remove_immediate_ba_tid
;
2247 addsta
->add_immediate_ba_ssn
= cmd
->add_immediate_ba_ssn
;
2249 return (u16
)sizeof(struct il3945_addsta_cmd
);
2252 static int il3945_add_bssid_station(struct il_priv
*il
,
2253 const u8
*addr
, u8
*sta_id_r
)
2255 struct il_rxon_context
*ctx
= &il
->ctx
;
2258 unsigned long flags
;
2261 *sta_id_r
= IL_INVALID_STATION
;
2263 ret
= il_add_station_common(il
, ctx
, addr
, 0, NULL
, &sta_id
);
2265 IL_ERR("Unable to add station %pM\n", addr
);
2272 spin_lock_irqsave(&il
->sta_lock
, flags
);
2273 il
->stations
[sta_id
].used
|= IL_STA_LOCAL
;
2274 spin_unlock_irqrestore(&il
->sta_lock
, flags
);
2278 static int il3945_manage_ibss_station(struct il_priv
*il
,
2279 struct ieee80211_vif
*vif
, bool add
)
2281 struct il_vif_priv
*vif_priv
= (void *)vif
->drv_priv
;
2285 ret
= il3945_add_bssid_station(il
, vif
->bss_conf
.bssid
,
2286 &vif_priv
->ibss_bssid_sta_id
);
2290 il3945_sync_sta(il
, vif_priv
->ibss_bssid_sta_id
,
2291 (il
->band
== IEEE80211_BAND_5GHZ
) ?
2292 IL_RATE_6M_PLCP
: IL_RATE_1M_PLCP
);
2293 il3945_rate_scale_init(il
->hw
, vif_priv
->ibss_bssid_sta_id
);
2298 return il_remove_station(il
, vif_priv
->ibss_bssid_sta_id
,
2299 vif
->bss_conf
.bssid
);
2303 * il3945_init_hw_rate_table - Initialize the hardware rate fallback table
2305 int il3945_init_hw_rate_table(struct il_priv
*il
)
2307 int rc
, i
, index
, prev_index
;
2308 struct il3945_rate_scaling_cmd rate_cmd
= {
2309 .reserved
= {0, 0, 0},
2311 struct il3945_rate_scaling_info
*table
= rate_cmd
.table
;
2313 for (i
= 0; i
< ARRAY_SIZE(il3945_rates
); i
++) {
2314 index
= il3945_rates
[i
].table_rs_index
;
2316 table
[index
].rate_n_flags
=
2317 il3945_hw_set_rate_n_flags(il3945_rates
[i
].plcp
, 0);
2318 table
[index
].try_cnt
= il
->retry_rate
;
2319 prev_index
= il3945_get_prev_ieee_rate(i
);
2320 table
[index
].next_rate_index
=
2321 il3945_rates
[prev_index
].table_rs_index
;
2325 case IEEE80211_BAND_5GHZ
:
2326 D_RATE("Select A mode rate scale\n");
2327 /* If one of the following CCK rates is used,
2328 * have it fall back to the 6M OFDM rate */
2329 for (i
= IL_RATE_1M_INDEX_TABLE
;
2330 i
<= IL_RATE_11M_INDEX_TABLE
; i
++)
2331 table
[i
].next_rate_index
=
2332 il3945_rates
[IL_FIRST_OFDM_RATE
].table_rs_index
;
2334 /* Don't fall back to CCK rates */
2335 table
[IL_RATE_12M_INDEX_TABLE
].next_rate_index
=
2336 IL_RATE_9M_INDEX_TABLE
;
2338 /* Don't drop out of OFDM rates */
2339 table
[IL_RATE_6M_INDEX_TABLE
].next_rate_index
=
2340 il3945_rates
[IL_FIRST_OFDM_RATE
].table_rs_index
;
2343 case IEEE80211_BAND_2GHZ
:
2344 D_RATE("Select B/G mode rate scale\n");
2345 /* If an OFDM rate is used, have it fall back to the
2348 if (!(il
->_3945
.sta_supp_rates
& IL_OFDM_RATES_MASK
) &&
2349 il_is_associated(il
)) {
2351 index
= IL_FIRST_CCK_RATE
;
2352 for (i
= IL_RATE_6M_INDEX_TABLE
;
2353 i
<= IL_RATE_54M_INDEX_TABLE
; i
++)
2354 table
[i
].next_rate_index
=
2355 il3945_rates
[index
].table_rs_index
;
2357 index
= IL_RATE_11M_INDEX_TABLE
;
2358 /* CCK shouldn't fall back to OFDM... */
2359 table
[index
].next_rate_index
= IL_RATE_5M_INDEX_TABLE
;
2368 /* Update the rate scaling for control frame Tx */
2369 rate_cmd
.table_id
= 0;
2370 rc
= il_send_cmd_pdu(il
, REPLY_RATE_SCALE
, sizeof(rate_cmd
),
2375 /* Update the rate scaling for data frame Tx */
2376 rate_cmd
.table_id
= 1;
2377 return il_send_cmd_pdu(il
, REPLY_RATE_SCALE
, sizeof(rate_cmd
),
2381 /* Called when initializing driver */
2382 int il3945_hw_set_hw_params(struct il_priv
*il
)
2384 memset((void *)&il
->hw_params
, 0,
2385 sizeof(struct il_hw_params
));
2387 il
->_3945
.shared_virt
=
2388 dma_alloc_coherent(&il
->pci_dev
->dev
,
2389 sizeof(struct il3945_shared
),
2390 &il
->_3945
.shared_phys
, GFP_KERNEL
);
2391 if (!il
->_3945
.shared_virt
) {
2392 IL_ERR("failed to allocate pci memory\n");
2396 /* Assign number of Usable TX queues */
2397 il
->hw_params
.max_txq_num
= il
->cfg
->base_params
->num_of_queues
;
2399 il
->hw_params
.tfd_size
= sizeof(struct il3945_tfd
);
2400 il
->hw_params
.rx_page_order
= get_order(IL_RX_BUF_SIZE_3K
);
2401 il
->hw_params
.max_rxq_size
= RX_QUEUE_SIZE
;
2402 il
->hw_params
.max_rxq_log
= RX_QUEUE_SIZE_LOG
;
2403 il
->hw_params
.max_stations
= IL3945_STATION_COUNT
;
2404 il
->ctx
.bcast_sta_id
= IL3945_BROADCAST_ID
;
2406 il
->sta_key_max_num
= STA_KEY_MAX_NUM
;
2408 il
->hw_params
.rx_wrt_ptr_reg
= FH39_RSCSR_CHNL0_WPTR
;
2409 il
->hw_params
.max_beacon_itrvl
= IL39_MAX_UCODE_BEACON_INTERVAL
;
2410 il
->hw_params
.beacon_time_tsf_bits
= IL3945_EXT_BEACON_TIME_POS
;
2415 unsigned int il3945_hw_get_beacon_cmd(struct il_priv
*il
,
2416 struct il3945_frame
*frame
, u8 rate
)
2418 struct il3945_tx_beacon_cmd
*tx_beacon_cmd
;
2419 unsigned int frame_size
;
2421 tx_beacon_cmd
= (struct il3945_tx_beacon_cmd
*)&frame
->u
;
2422 memset(tx_beacon_cmd
, 0, sizeof(*tx_beacon_cmd
));
2424 tx_beacon_cmd
->tx
.sta_id
=
2425 il
->ctx
.bcast_sta_id
;
2426 tx_beacon_cmd
->tx
.stop_time
.life_time
= TX_CMD_LIFE_TIME_INFINITE
;
2428 frame_size
= il3945_fill_beacon_frame(il
,
2429 tx_beacon_cmd
->frame
,
2430 sizeof(frame
->u
) - sizeof(*tx_beacon_cmd
));
2432 BUG_ON(frame_size
> MAX_MPDU_SIZE
);
2433 tx_beacon_cmd
->tx
.len
= cpu_to_le16((u16
)frame_size
);
2435 tx_beacon_cmd
->tx
.rate
= rate
;
2436 tx_beacon_cmd
->tx
.tx_flags
= (TX_CMD_FLG_SEQ_CTL_MSK
|
2437 TX_CMD_FLG_TSF_MSK
);
2439 /* supp_rates[0] == OFDM start at IL_FIRST_OFDM_RATE*/
2440 tx_beacon_cmd
->tx
.supp_rates
[0] =
2441 (IL_OFDM_BASIC_RATES_MASK
>> IL_FIRST_OFDM_RATE
) & 0xFF;
2443 tx_beacon_cmd
->tx
.supp_rates
[1] =
2444 (IL_CCK_BASIC_RATES_MASK
& 0xF);
2446 return sizeof(struct il3945_tx_beacon_cmd
) + frame_size
;
2449 void il3945_hw_rx_handler_setup(struct il_priv
*il
)
2451 il
->rx_handlers
[REPLY_TX
] = il3945_rx_reply_tx
;
2452 il
->rx_handlers
[REPLY_3945_RX
] = il3945_rx_reply_rx
;
2455 void il3945_hw_setup_deferred_work(struct il_priv
*il
)
2457 INIT_DELAYED_WORK(&il
->_3945
.thermal_periodic
,
2458 il3945_bg_reg_txpower_periodic
);
2461 void il3945_hw_cancel_deferred_work(struct il_priv
*il
)
2463 cancel_delayed_work(&il
->_3945
.thermal_periodic
);
2466 /* check contents of special bootstrap uCode SRAM */
2467 static int il3945_verify_bsm(struct il_priv
*il
)
2469 __le32
*image
= il
->ucode_boot
.v_addr
;
2470 u32 len
= il
->ucode_boot
.len
;
2474 D_INFO("Begin verify bsm\n");
2476 /* verify BSM SRAM contents */
2477 val
= il_rd_prph(il
, BSM_WR_DWCOUNT_REG
);
2478 for (reg
= BSM_SRAM_LOWER_BOUND
;
2479 reg
< BSM_SRAM_LOWER_BOUND
+ len
;
2480 reg
+= sizeof(u32
), image
++) {
2481 val
= il_rd_prph(il
, reg
);
2482 if (val
!= le32_to_cpu(*image
)) {
2483 IL_ERR("BSM uCode verification failed at "
2484 "addr 0x%08X+%u (of %u), is 0x%x, s/b 0x%x\n",
2485 BSM_SRAM_LOWER_BOUND
,
2486 reg
- BSM_SRAM_LOWER_BOUND
, len
,
2487 val
, le32_to_cpu(*image
));
2492 D_INFO("BSM bootstrap uCode image OK\n");
2498 /******************************************************************************
2500 * EEPROM related functions
2502 ******************************************************************************/
2505 * Clear the OWNER_MSK, to establish driver (instead of uCode running on
2506 * embedded controller) as EEPROM reader; each read is a series of pulses
2507 * to/from the EEPROM chip, not a single event, so even reads could conflict
2508 * if they weren't arbitrated by some ownership mechanism. Here, the driver
2509 * simply claims ownership, which should be safe when this function is called
2510 * (i.e. before loading uCode!).
2512 static int il3945_eeprom_acquire_semaphore(struct il_priv
*il
)
2514 _il_clear_bit(il
, CSR_EEPROM_GP
, CSR_EEPROM_GP_IF_OWNER_MSK
);
2519 static void il3945_eeprom_release_semaphore(struct il_priv
*il
)
2525 * il3945_load_bsm - Load bootstrap instructions
2529 * The Bootstrap State Machine (BSM) stores a short bootstrap uCode program
2530 * in special SRAM that does not power down during RFKILL. When powering back
2531 * up after power-saving sleeps (or during initial uCode load), the BSM loads
2532 * the bootstrap program into the on-board processor, and starts it.
2534 * The bootstrap program loads (via DMA) instructions and data for a new
2535 * program from host DRAM locations indicated by the host driver in the
2536 * BSM_DRAM_* registers. Once the new program is loaded, it starts
2539 * When initializing the NIC, the host driver points the BSM to the
2540 * "initialize" uCode image. This uCode sets up some internal data, then
2541 * notifies host via "initialize alive" that it is complete.
2543 * The host then replaces the BSM_DRAM_* pointer values to point to the
2544 * normal runtime uCode instructions and a backup uCode data cache buffer
2545 * (filled initially with starting data values for the on-board processor),
2546 * then triggers the "initialize" uCode to load and launch the runtime uCode,
2547 * which begins normal operation.
2549 * When doing a power-save shutdown, runtime uCode saves data SRAM into
2550 * the backup data cache in DRAM before SRAM is powered down.
2552 * When powering back up, the BSM loads the bootstrap program. This reloads
2553 * the runtime uCode instructions and the backup data cache into SRAM,
2554 * and re-launches the runtime uCode from where it left off.
2556 static int il3945_load_bsm(struct il_priv
*il
)
2558 __le32
*image
= il
->ucode_boot
.v_addr
;
2559 u32 len
= il
->ucode_boot
.len
;
2569 D_INFO("Begin load bsm\n");
2571 /* make sure bootstrap program is no larger than BSM's SRAM size */
2572 if (len
> IL39_MAX_BSM_SIZE
)
2575 /* Tell bootstrap uCode where to find the "Initialize" uCode
2576 * in host DRAM ... host DRAM physical address bits 31:0 for 3945.
2577 * NOTE: il3945_initialize_alive_start() will replace these values,
2578 * after the "initialize" uCode has run, to point to
2579 * runtime/protocol instructions and backup data cache. */
2580 pinst
= il
->ucode_init
.p_addr
;
2581 pdata
= il
->ucode_init_data
.p_addr
;
2582 inst_len
= il
->ucode_init
.len
;
2583 data_len
= il
->ucode_init_data
.len
;
2585 il_wr_prph(il
, BSM_DRAM_INST_PTR_REG
, pinst
);
2586 il_wr_prph(il
, BSM_DRAM_DATA_PTR_REG
, pdata
);
2587 il_wr_prph(il
, BSM_DRAM_INST_BYTECOUNT_REG
, inst_len
);
2588 il_wr_prph(il
, BSM_DRAM_DATA_BYTECOUNT_REG
, data_len
);
2590 /* Fill BSM memory with bootstrap instructions */
2591 for (reg_offset
= BSM_SRAM_LOWER_BOUND
;
2592 reg_offset
< BSM_SRAM_LOWER_BOUND
+ len
;
2593 reg_offset
+= sizeof(u32
), image
++)
2594 _il_wr_prph(il
, reg_offset
,
2595 le32_to_cpu(*image
));
2597 rc
= il3945_verify_bsm(il
);
2601 /* Tell BSM to copy from BSM SRAM into instruction SRAM, when asked */
2602 il_wr_prph(il
, BSM_WR_MEM_SRC_REG
, 0x0);
2603 il_wr_prph(il
, BSM_WR_MEM_DST_REG
,
2604 IL39_RTC_INST_LOWER_BOUND
);
2605 il_wr_prph(il
, BSM_WR_DWCOUNT_REG
, len
/ sizeof(u32
));
2607 /* Load bootstrap code into instruction SRAM now,
2608 * to prepare to load "initialize" uCode */
2609 il_wr_prph(il
, BSM_WR_CTRL_REG
,
2610 BSM_WR_CTRL_REG_BIT_START
);
2612 /* Wait for load of bootstrap uCode to finish */
2613 for (i
= 0; i
< 100; i
++) {
2614 done
= il_rd_prph(il
, BSM_WR_CTRL_REG
);
2615 if (!(done
& BSM_WR_CTRL_REG_BIT_START
))
2620 D_INFO("BSM write complete, poll %d iterations\n", i
);
2622 IL_ERR("BSM write did not complete!\n");
2626 /* Enable future boot loads whenever power management unit triggers it
2627 * (e.g. when powering back up after power-save shutdown) */
2628 il_wr_prph(il
, BSM_WR_CTRL_REG
,
2629 BSM_WR_CTRL_REG_BIT_START_EN
);
2634 static struct il_hcmd_ops il3945_hcmd
= {
2635 .rxon_assoc
= il3945_send_rxon_assoc
,
2636 .commit_rxon
= il3945_commit_rxon
,
2639 static struct il_lib_ops il3945_lib
= {
2640 .txq_attach_buf_to_tfd
= il3945_hw_txq_attach_buf_to_tfd
,
2641 .txq_free_tfd
= il3945_hw_txq_free_tfd
,
2642 .txq_init
= il3945_hw_tx_queue_init
,
2643 .load_ucode
= il3945_load_bsm
,
2644 .dump_nic_error_log
= il3945_dump_nic_error_log
,
2646 .init
= il3945_apm_init
,
2647 .config
= il3945_nic_config
,
2650 .regulatory_bands
= {
2651 EEPROM_REGULATORY_BAND_1_CHANNELS
,
2652 EEPROM_REGULATORY_BAND_2_CHANNELS
,
2653 EEPROM_REGULATORY_BAND_3_CHANNELS
,
2654 EEPROM_REGULATORY_BAND_4_CHANNELS
,
2655 EEPROM_REGULATORY_BAND_5_CHANNELS
,
2656 EEPROM_REGULATORY_BAND_NO_HT40
,
2657 EEPROM_REGULATORY_BAND_NO_HT40
,
2659 .acquire_semaphore
= il3945_eeprom_acquire_semaphore
,
2660 .release_semaphore
= il3945_eeprom_release_semaphore
,
2662 .send_tx_power
= il3945_send_tx_power
,
2663 .is_valid_rtc_data_addr
= il3945_hw_valid_rtc_data_addr
,
2666 .rx_stats_read
= il3945_ucode_rx_stats_read
,
2667 .tx_stats_read
= il3945_ucode_tx_stats_read
,
2668 .general_stats_read
= il3945_ucode_general_stats_read
,
2672 static const struct il_legacy_ops il3945_legacy_ops
= {
2673 .post_associate
= il3945_post_associate
,
2674 .config_ap
= il3945_config_ap
,
2675 .manage_ibss_station
= il3945_manage_ibss_station
,
2678 static struct il_hcmd_utils_ops il3945_hcmd_utils
= {
2679 .get_hcmd_size
= il3945_get_hcmd_size
,
2680 .build_addsta_hcmd
= il3945_build_addsta_hcmd
,
2681 .request_scan
= il3945_request_scan
,
2682 .post_scan
= il3945_post_scan
,
2685 static const struct il_ops il3945_ops
= {
2687 .hcmd
= &il3945_hcmd
,
2688 .utils
= &il3945_hcmd_utils
,
2689 .led
= &il3945_led_ops
,
2690 .legacy
= &il3945_legacy_ops
,
2691 .ieee80211_ops
= &il3945_hw_ops
,
2694 static struct il_base_params il3945_base_params
= {
2695 .eeprom_size
= IL3945_EEPROM_IMG_SIZE
,
2696 .num_of_queues
= IL39_NUM_QUEUES
,
2697 .pll_cfg_val
= CSR39_ANA_PLL_CFG_VAL
,
2700 .led_compensation
= 64,
2701 .wd_timeout
= IL_DEF_WD_TIMEOUT
,
2704 static struct il_cfg il3945_bg_cfg
= {
2706 .fw_name_pre
= IL3945_FW_PRE
,
2707 .ucode_api_max
= IL3945_UCODE_API_MAX
,
2708 .ucode_api_min
= IL3945_UCODE_API_MIN
,
2710 .eeprom_ver
= EEPROM_3945_EEPROM_VERSION
,
2712 .mod_params
= &il3945_mod_params
,
2713 .base_params
= &il3945_base_params
,
2714 .led_mode
= IL_LED_BLINK
,
2717 static struct il_cfg il3945_abg_cfg
= {
2719 .fw_name_pre
= IL3945_FW_PRE
,
2720 .ucode_api_max
= IL3945_UCODE_API_MAX
,
2721 .ucode_api_min
= IL3945_UCODE_API_MIN
,
2722 .sku
= IL_SKU_A
|IL_SKU_G
,
2723 .eeprom_ver
= EEPROM_3945_EEPROM_VERSION
,
2725 .mod_params
= &il3945_mod_params
,
2726 .base_params
= &il3945_base_params
,
2727 .led_mode
= IL_LED_BLINK
,
2730 DEFINE_PCI_DEVICE_TABLE(il3945_hw_card_ids
) = {
2731 {IL_PCI_DEVICE(0x4222, 0x1005, il3945_bg_cfg
)},
2732 {IL_PCI_DEVICE(0x4222, 0x1034, il3945_bg_cfg
)},
2733 {IL_PCI_DEVICE(0x4222, 0x1044, il3945_bg_cfg
)},
2734 {IL_PCI_DEVICE(0x4227, 0x1014, il3945_bg_cfg
)},
2735 {IL_PCI_DEVICE(0x4222, PCI_ANY_ID
, il3945_abg_cfg
)},
2736 {IL_PCI_DEVICE(0x4227, PCI_ANY_ID
, il3945_abg_cfg
)},
2740 MODULE_DEVICE_TABLE(pci
, il3945_hw_card_ids
);