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1 /******************************************************************************
2 *
3 * Copyright(c) 2003 - 2011 Intel Corporation. All rights reserved.
4 *
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms of version 2 of the GNU General Public License as
7 * published by the Free Software Foundation.
8 *
9 * This program is distributed in the hope that it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
12 * more details.
13 *
14 * You should have received a copy of the GNU General Public License along with
15 * this program; if not, write to the Free Software Foundation, Inc.,
16 * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
17 *
18 * The full GNU General Public License is included in this distribution in the
19 * file called LICENSE.
20 *
21 * Contact Information:
22 * Intel Linux Wireless <ilw@linux.intel.com>
23 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
24 *
25 *****************************************************************************/
26 /*
27 * Please use this file (iwl-dev.h) for driver implementation definitions.
28 * Please use iwl-commands.h for uCode API definitions.
29 * Please use 4965.h for hardware-related definitions.
30 */
31
32 #ifndef __il_dev_h__
33 #define __il_dev_h__
34
35 #include <linux/interrupt.h>
36 #include <linux/pci.h> /* for struct pci_device_id */
37 #include <linux/kernel.h>
38 #include <linux/leds.h>
39 #include <linux/wait.h>
40 #include <net/ieee80211_radiotap.h>
41
42 #include "iwl-eeprom.h"
43 #include "iwl-csr.h"
44 #include "iwl-prph.h"
45 #include "iwl-fh.h"
46 #include "iwl-debug.h"
47 #include "4965.h"
48 #include "iwl-3945-hw.h"
49 #include "iwl-led.h"
50 #include "iwl-power.h"
51 #include "iwl-legacy-rs.h"
52
53 struct il_tx_queue;
54
55 /* CT-KILL constants */
56 #define CT_KILL_THRESHOLD_LEGACY 110 /* in Celsius */
57
58 /* Default noise level to report when noise measurement is not available.
59 * This may be because we're:
60 * 1) Not associated (4965, no beacon stats being sent to driver)
61 * 2) Scanning (noise measurement does not apply to associated channel)
62 * 3) Receiving CCK (3945 delivers noise info only for OFDM frames)
63 * Use default noise value of -127 ... this is below the range of measurable
64 * Rx dBm for either 3945 or 4965, so it can indicate "unmeasurable" to user.
65 * Also, -127 works better than 0 when averaging frames with/without
66 * noise info (e.g. averaging might be done in app); measured dBm values are
67 * always negative ... using a negative value as the default keeps all
68 * averages within an s8's (used in some apps) range of negative values. */
69 #define IL_NOISE_MEAS_NOT_AVAILABLE (-127)
70
71 /*
72 * RTS threshold here is total size [2347] minus 4 FCS bytes
73 * Per spec:
74 * a value of 0 means RTS on all data/management packets
75 * a value > max MSDU size means no RTS
76 * else RTS for data/management frames where MPDU is larger
77 * than RTS value.
78 */
79 #define DEFAULT_RTS_THRESHOLD 2347U
80 #define MIN_RTS_THRESHOLD 0U
81 #define MAX_RTS_THRESHOLD 2347U
82 #define MAX_MSDU_SIZE 2304U
83 #define MAX_MPDU_SIZE 2346U
84 #define DEFAULT_BEACON_INTERVAL 100U
85 #define DEFAULT_SHORT_RETRY_LIMIT 7U
86 #define DEFAULT_LONG_RETRY_LIMIT 4U
87
88 struct il_rx_buf {
89 dma_addr_t page_dma;
90 struct page *page;
91 struct list_head list;
92 };
93
94 #define rxb_addr(r) page_address(r->page)
95
96 /* defined below */
97 struct il_device_cmd;
98
99 struct il_cmd_meta {
100 /* only for SYNC commands, iff the reply skb is wanted */
101 struct il_host_cmd *source;
102 /*
103 * only for ASYNC commands
104 * (which is somewhat stupid -- look at iwl-sta.c for instance
105 * which duplicates a bunch of code because the callback isn't
106 * invoked for SYNC commands, if it were and its result passed
107 * through it would be simpler...)
108 */
109 void (*callback)(struct il_priv *il,
110 struct il_device_cmd *cmd,
111 struct il_rx_pkt *pkt);
112
113 /* The CMD_SIZE_HUGE flag bit indicates that the command
114 * structure is stored at the end of the shared queue memory. */
115 u32 flags;
116
117 DEFINE_DMA_UNMAP_ADDR(mapping);
118 DEFINE_DMA_UNMAP_LEN(len);
119 };
120
121 /*
122 * Generic queue structure
123 *
124 * Contains common data for Rx and Tx queues
125 */
126 struct il_queue {
127 int n_bd; /* number of BDs in this queue */
128 int write_ptr; /* 1-st empty entry (idx) host_w*/
129 int read_ptr; /* last used entry (idx) host_r*/
130 /* use for monitoring and recovering the stuck queue */
131 dma_addr_t dma_addr; /* physical addr for BD's */
132 int n_win; /* safe queue win */
133 u32 id;
134 int low_mark; /* low watermark, resume queue if free
135 * space more than this */
136 int high_mark; /* high watermark, stop queue if free
137 * space less than this */
138 };
139
140 /* One for each TFD */
141 struct il_tx_info {
142 struct sk_buff *skb;
143 struct il_rxon_context *ctx;
144 };
145
146 /**
147 * struct il_tx_queue - Tx Queue for DMA
148 * @q: generic Rx/Tx queue descriptor
149 * @bd: base of circular buffer of TFDs
150 * @cmd: array of command/TX buffer pointers
151 * @meta: array of meta data for each command/tx buffer
152 * @dma_addr_cmd: physical address of cmd/tx buffer array
153 * @txb: array of per-TFD driver data
154 * @time_stamp: time (in jiffies) of last read_ptr change
155 * @need_update: indicates need to update read/write idx
156 * @sched_retry: indicates queue is high-throughput aggregation (HT AGG) enabled
157 *
158 * A Tx queue consists of circular buffer of BDs (a.k.a. TFDs, transmit frame
159 * descriptors) and required locking structures.
160 */
161 #define TFD_TX_CMD_SLOTS 256
162 #define TFD_CMD_SLOTS 32
163
164 struct il_tx_queue {
165 struct il_queue q;
166 void *tfds;
167 struct il_device_cmd **cmd;
168 struct il_cmd_meta *meta;
169 struct il_tx_info *txb;
170 unsigned long time_stamp;
171 u8 need_update;
172 u8 sched_retry;
173 u8 active;
174 u8 swq_id;
175 };
176
177 #define IL_NUM_SCAN_RATES (2)
178
179 struct il4965_channel_tgd_info {
180 u8 type;
181 s8 max_power;
182 };
183
184 struct il4965_channel_tgh_info {
185 s64 last_radar_time;
186 };
187
188 #define IL4965_MAX_RATE (33)
189
190 struct il3945_clip_group {
191 /* maximum power level to prevent clipping for each rate, derived by
192 * us from this band's saturation power in EEPROM */
193 const s8 clip_powers[IL_MAX_RATES];
194 };
195
196 /* current Tx power values to use, one for each rate for each channel.
197 * requested power is limited by:
198 * -- regulatory EEPROM limits for this channel
199 * -- hardware capabilities (clip-powers)
200 * -- spectrum management
201 * -- user preference (e.g. iwconfig)
202 * when requested power is set, base power idx must also be set. */
203 struct il3945_channel_power_info {
204 struct il3945_tx_power tpc; /* actual radio and DSP gain settings */
205 s8 power_table_idx; /* actual (compenst'd) idx into gain table */
206 s8 base_power_idx; /* gain idx for power at factory temp. */
207 s8 requested_power; /* power (dBm) requested for this chnl/rate */
208 };
209
210 /* current scan Tx power values to use, one for each scan rate for each
211 * channel. */
212 struct il3945_scan_power_info {
213 struct il3945_tx_power tpc; /* actual radio and DSP gain settings */
214 s8 power_table_idx; /* actual (compenst'd) idx into gain table */
215 s8 requested_power; /* scan pwr (dBm) requested for chnl/rate */
216 };
217
218 /*
219 * One for each channel, holds all channel setup data
220 * Some of the fields (e.g. eeprom and flags/max_power_avg) are redundant
221 * with one another!
222 */
223 struct il_channel_info {
224 struct il4965_channel_tgd_info tgd;
225 struct il4965_channel_tgh_info tgh;
226 struct il_eeprom_channel eeprom; /* EEPROM regulatory limit */
227 struct il_eeprom_channel ht40_eeprom; /* EEPROM regulatory limit for
228 * HT40 channel */
229
230 u8 channel; /* channel number */
231 u8 flags; /* flags copied from EEPROM */
232 s8 max_power_avg; /* (dBm) regul. eeprom, normal Tx, any rate */
233 s8 curr_txpow; /* (dBm) regulatory/spectrum/user (not h/w) limit */
234 s8 min_power; /* always 0 */
235 s8 scan_power; /* (dBm) regul. eeprom, direct scans, any rate */
236
237 u8 group_idx; /* 0-4, maps channel to group1/2/3/4/5 */
238 u8 band_idx; /* 0-4, maps channel to band1/2/3/4/5 */
239 enum ieee80211_band band;
240
241 /* HT40 channel info */
242 s8 ht40_max_power_avg; /* (dBm) regul. eeprom, normal Tx, any rate */
243 u8 ht40_flags; /* flags copied from EEPROM */
244 u8 ht40_extension_channel; /* HT_IE_EXT_CHANNEL_* */
245
246 /* Radio/DSP gain settings for each "normal" data Tx rate.
247 * These include, in addition to RF and DSP gain, a few fields for
248 * remembering/modifying gain settings (idxes). */
249 struct il3945_channel_power_info power_info[IL4965_MAX_RATE];
250
251 /* Radio/DSP gain settings for each scan rate, for directed scans. */
252 struct il3945_scan_power_info scan_pwr_info[IL_NUM_SCAN_RATES];
253 };
254
255 #define IL_TX_FIFO_BK 0 /* shared */
256 #define IL_TX_FIFO_BE 1
257 #define IL_TX_FIFO_VI 2 /* shared */
258 #define IL_TX_FIFO_VO 3
259 #define IL_TX_FIFO_UNUSED -1
260
261 /* Minimum number of queues. MAX_NUM is defined in hw specific files.
262 * Set the minimum to accommodate the 4 standard TX queues, 1 command
263 * queue, 2 (unused) HCCA queues, and 4 HT queues (one for each AC) */
264 #define IL_MIN_NUM_QUEUES 10
265
266 #define IL_DEFAULT_CMD_QUEUE_NUM 4
267
268 #define IEEE80211_DATA_LEN 2304
269 #define IEEE80211_4ADDR_LEN 30
270 #define IEEE80211_HLEN (IEEE80211_4ADDR_LEN)
271 #define IEEE80211_FRAME_LEN (IEEE80211_DATA_LEN + IEEE80211_HLEN)
272
273 struct il_frame {
274 union {
275 struct ieee80211_hdr frame;
276 struct il_tx_beacon_cmd beacon;
277 u8 raw[IEEE80211_FRAME_LEN];
278 u8 cmd[360];
279 } u;
280 struct list_head list;
281 };
282
283 #define SEQ_TO_SN(seq) (((seq) & IEEE80211_SCTL_SEQ) >> 4)
284 #define SN_TO_SEQ(ssn) (((ssn) << 4) & IEEE80211_SCTL_SEQ)
285 #define MAX_SN ((IEEE80211_SCTL_SEQ) >> 4)
286
287 enum {
288 CMD_SYNC = 0,
289 CMD_SIZE_NORMAL = 0,
290 CMD_NO_SKB = 0,
291 CMD_SIZE_HUGE = (1 << 0),
292 CMD_ASYNC = (1 << 1),
293 CMD_WANT_SKB = (1 << 2),
294 CMD_MAPPED = (1 << 3),
295 };
296
297 #define DEF_CMD_PAYLOAD_SIZE 320
298
299 /**
300 * struct il_device_cmd
301 *
302 * For allocation of the command and tx queues, this establishes the overall
303 * size of the largest command we send to uCode, except for a scan command
304 * (which is relatively huge; space is allocated separately).
305 */
306 struct il_device_cmd {
307 struct il_cmd_header hdr; /* uCode API */
308 union {
309 u32 flags;
310 u8 val8;
311 u16 val16;
312 u32 val32;
313 struct il_tx_cmd tx;
314 u8 payload[DEF_CMD_PAYLOAD_SIZE];
315 } __packed cmd;
316 } __packed;
317
318 #define TFD_MAX_PAYLOAD_SIZE (sizeof(struct il_device_cmd))
319
320
321 struct il_host_cmd {
322 const void *data;
323 unsigned long reply_page;
324 void (*callback)(struct il_priv *il,
325 struct il_device_cmd *cmd,
326 struct il_rx_pkt *pkt);
327 u32 flags;
328 u16 len;
329 u8 id;
330 };
331
332 #define SUP_RATE_11A_MAX_NUM_CHANNELS 8
333 #define SUP_RATE_11B_MAX_NUM_CHANNELS 4
334 #define SUP_RATE_11G_MAX_NUM_CHANNELS 12
335
336 /**
337 * struct il_rx_queue - Rx queue
338 * @bd: driver's pointer to buffer of receive buffer descriptors (rbd)
339 * @bd_dma: bus address of buffer of receive buffer descriptors (rbd)
340 * @read: Shared idx to newest available Rx buffer
341 * @write: Shared idx to oldest written Rx packet
342 * @free_count: Number of pre-allocated buffers in rx_free
343 * @rx_free: list of free SKBs for use
344 * @rx_used: List of Rx buffers with no SKB
345 * @need_update: flag to indicate we need to update read/write idx
346 * @rb_stts: driver's pointer to receive buffer status
347 * @rb_stts_dma: bus address of receive buffer status
348 *
349 * NOTE: rx_free and rx_used are used as a FIFO for il_rx_bufs
350 */
351 struct il_rx_queue {
352 __le32 *bd;
353 dma_addr_t bd_dma;
354 struct il_rx_buf pool[RX_QUEUE_SIZE + RX_FREE_BUFFERS];
355 struct il_rx_buf *queue[RX_QUEUE_SIZE];
356 u32 read;
357 u32 write;
358 u32 free_count;
359 u32 write_actual;
360 struct list_head rx_free;
361 struct list_head rx_used;
362 int need_update;
363 struct il_rb_status *rb_stts;
364 dma_addr_t rb_stts_dma;
365 spinlock_t lock;
366 };
367
368 #define IL_SUPPORTED_RATES_IE_LEN 8
369
370 #define MAX_TID_COUNT 9
371
372 #define IL_INVALID_RATE 0xFF
373 #define IL_INVALID_VALUE -1
374
375 /**
376 * struct il_ht_agg -- aggregation status while waiting for block-ack
377 * @txq_id: Tx queue used for Tx attempt
378 * @frame_count: # frames attempted by Tx command
379 * @wait_for_ba: Expect block-ack before next Tx reply
380 * @start_idx: Index of 1st Transmit Frame Descriptor (TFD) in Tx win
381 * @bitmap0: Low order bitmap, one bit for each frame pending ACK in Tx win
382 * @bitmap1: High order, one bit for each frame pending ACK in Tx win
383 * @rate_n_flags: Rate at which Tx was attempted
384 *
385 * If REPLY_TX indicates that aggregation was attempted, driver must wait
386 * for block ack (REPLY_COMPRESSED_BA). This struct stores tx reply info
387 * until block ack arrives.
388 */
389 struct il_ht_agg {
390 u16 txq_id;
391 u16 frame_count;
392 u16 wait_for_ba;
393 u16 start_idx;
394 u64 bitmap;
395 u32 rate_n_flags;
396 #define IL_AGG_OFF 0
397 #define IL_AGG_ON 1
398 #define IL_EMPTYING_HW_QUEUE_ADDBA 2
399 #define IL_EMPTYING_HW_QUEUE_DELBA 3
400 u8 state;
401 };
402
403
404 struct il_tid_data {
405 u16 seq_number; /* 4965 only */
406 u16 tfds_in_queue;
407 struct il_ht_agg agg;
408 };
409
410 struct il_hw_key {
411 u32 cipher;
412 int keylen;
413 u8 keyidx;
414 u8 key[32];
415 };
416
417 union il_ht_rate_supp {
418 u16 rates;
419 struct {
420 u8 siso_rate;
421 u8 mimo_rate;
422 };
423 };
424
425 #define CFG_HT_RX_AMPDU_FACTOR_8K (0x0)
426 #define CFG_HT_RX_AMPDU_FACTOR_16K (0x1)
427 #define CFG_HT_RX_AMPDU_FACTOR_32K (0x2)
428 #define CFG_HT_RX_AMPDU_FACTOR_64K (0x3)
429 #define CFG_HT_RX_AMPDU_FACTOR_DEF CFG_HT_RX_AMPDU_FACTOR_64K
430 #define CFG_HT_RX_AMPDU_FACTOR_MAX CFG_HT_RX_AMPDU_FACTOR_64K
431 #define CFG_HT_RX_AMPDU_FACTOR_MIN CFG_HT_RX_AMPDU_FACTOR_8K
432
433 /*
434 * Maximal MPDU density for TX aggregation
435 * 4 - 2us density
436 * 5 - 4us density
437 * 6 - 8us density
438 * 7 - 16us density
439 */
440 #define CFG_HT_MPDU_DENSITY_2USEC (0x4)
441 #define CFG_HT_MPDU_DENSITY_4USEC (0x5)
442 #define CFG_HT_MPDU_DENSITY_8USEC (0x6)
443 #define CFG_HT_MPDU_DENSITY_16USEC (0x7)
444 #define CFG_HT_MPDU_DENSITY_DEF CFG_HT_MPDU_DENSITY_4USEC
445 #define CFG_HT_MPDU_DENSITY_MAX CFG_HT_MPDU_DENSITY_16USEC
446 #define CFG_HT_MPDU_DENSITY_MIN (0x1)
447
448 struct il_ht_config {
449 bool single_chain_sufficient;
450 enum ieee80211_smps_mode smps; /* current smps mode */
451 };
452
453 /* QoS structures */
454 struct il_qos_info {
455 int qos_active;
456 struct il_qosparam_cmd def_qos_parm;
457 };
458
459 /*
460 * Structure should be accessed with sta_lock held. When station addition
461 * is in progress (IL_STA_UCODE_INPROGRESS) it is possible to access only
462 * the commands (il_addsta_cmd and il_link_quality_cmd) without
463 * sta_lock held.
464 */
465 struct il_station_entry {
466 struct il_addsta_cmd sta;
467 struct il_tid_data tid[MAX_TID_COUNT];
468 u8 used, ctxid;
469 struct il_hw_key keyinfo;
470 struct il_link_quality_cmd *lq;
471 };
472
473 struct il_station_priv_common {
474 struct il_rxon_context *ctx;
475 u8 sta_id;
476 };
477
478 /*
479 * il_station_priv: Driver's ilate station information
480 *
481 * When mac80211 creates a station it reserves some space (hw->sta_data_size)
482 * in the structure for use by driver. This structure is places in that
483 * space.
484 *
485 * The common struct MUST be first because it is shared between
486 * 3945 and 4965!
487 */
488 struct il_station_priv {
489 struct il_station_priv_common common;
490 struct il_lq_sta lq_sta;
491 atomic_t pending_frames;
492 bool client;
493 bool asleep;
494 };
495
496 /**
497 * struct il_vif_priv - driver's ilate per-interface information
498 *
499 * When mac80211 allocates a virtual interface, it can allocate
500 * space for us to put data into.
501 */
502 struct il_vif_priv {
503 struct il_rxon_context *ctx;
504 u8 ibss_bssid_sta_id;
505 };
506
507 /* one for each uCode image (inst/data, boot/init/runtime) */
508 struct fw_desc {
509 void *v_addr; /* access by driver */
510 dma_addr_t p_addr; /* access by card's busmaster DMA */
511 u32 len; /* bytes */
512 };
513
514 /* uCode file layout */
515 struct il_ucode_header {
516 __le32 ver; /* major/minor/API/serial */
517 struct {
518 __le32 inst_size; /* bytes of runtime code */
519 __le32 data_size; /* bytes of runtime data */
520 __le32 init_size; /* bytes of init code */
521 __le32 init_data_size; /* bytes of init data */
522 __le32 boot_size; /* bytes of bootstrap code */
523 u8 data[0]; /* in same order as sizes */
524 } v1;
525 };
526
527 struct il4965_ibss_seq {
528 u8 mac[ETH_ALEN];
529 u16 seq_num;
530 u16 frag_num;
531 unsigned long packet_time;
532 struct list_head list;
533 };
534
535 struct il_sensitivity_ranges {
536 u16 min_nrg_cck;
537 u16 max_nrg_cck;
538
539 u16 nrg_th_cck;
540 u16 nrg_th_ofdm;
541
542 u16 auto_corr_min_ofdm;
543 u16 auto_corr_min_ofdm_mrc;
544 u16 auto_corr_min_ofdm_x1;
545 u16 auto_corr_min_ofdm_mrc_x1;
546
547 u16 auto_corr_max_ofdm;
548 u16 auto_corr_max_ofdm_mrc;
549 u16 auto_corr_max_ofdm_x1;
550 u16 auto_corr_max_ofdm_mrc_x1;
551
552 u16 auto_corr_max_cck;
553 u16 auto_corr_max_cck_mrc;
554 u16 auto_corr_min_cck;
555 u16 auto_corr_min_cck_mrc;
556
557 u16 barker_corr_th_min;
558 u16 barker_corr_th_min_mrc;
559 u16 nrg_th_cca;
560 };
561
562
563 #define KELVIN_TO_CELSIUS(x) ((x)-273)
564 #define CELSIUS_TO_KELVIN(x) ((x)+273)
565
566
567 /**
568 * struct il_hw_params
569 * @max_txq_num: Max # Tx queues supported
570 * @dma_chnl_num: Number of Tx DMA/FIFO channels
571 * @scd_bc_tbls_size: size of scheduler byte count tables
572 * @tfd_size: TFD size
573 * @tx/rx_chains_num: Number of TX/RX chains
574 * @valid_tx/rx_ant: usable antennas
575 * @max_rxq_size: Max # Rx frames in Rx queue (must be power-of-2)
576 * @max_rxq_log: Log-base-2 of max_rxq_size
577 * @rx_page_order: Rx buffer page order
578 * @rx_wrt_ptr_reg: FH{39}_RSCSR_CHNL0_WPTR
579 * @max_stations:
580 * @ht40_channel: is 40MHz width possible in band 2.4
581 * BIT(IEEE80211_BAND_5GHZ) BIT(IEEE80211_BAND_5GHZ)
582 * @sw_crypto: 0 for hw, 1 for sw
583 * @max_xxx_size: for ucode uses
584 * @ct_kill_threshold: temperature threshold
585 * @beacon_time_tsf_bits: number of valid tsf bits for beacon time
586 * @struct il_sensitivity_ranges: range of sensitivity values
587 */
588 struct il_hw_params {
589 u8 max_txq_num;
590 u8 dma_chnl_num;
591 u16 scd_bc_tbls_size;
592 u32 tfd_size;
593 u8 tx_chains_num;
594 u8 rx_chains_num;
595 u8 valid_tx_ant;
596 u8 valid_rx_ant;
597 u16 max_rxq_size;
598 u16 max_rxq_log;
599 u32 rx_page_order;
600 u32 rx_wrt_ptr_reg;
601 u8 max_stations;
602 u8 ht40_channel;
603 u8 max_beacon_itrvl; /* in 1024 ms */
604 u32 max_inst_size;
605 u32 max_data_size;
606 u32 max_bsm_size;
607 u32 ct_kill_threshold; /* value in hw-dependent units */
608 u16 beacon_time_tsf_bits;
609 const struct il_sensitivity_ranges *sens;
610 };
611
612
613 /******************************************************************************
614 *
615 * Functions implemented in core module which are forward declared here
616 * for use by iwl-[4-5].c
617 *
618 * NOTE: The implementation of these functions are not hardware specific
619 * which is why they are in the core module files.
620 *
621 * Naming convention --
622 * il_ <-- Is part of iwlwifi
623 * iwlXXXX_ <-- Hardware specific (implemented in iwl-XXXX.c for XXXX)
624 * il4965_bg_ <-- Called from work queue context
625 * il4965_mac_ <-- mac80211 callback
626 *
627 ****************************************************************************/
628 extern void il4965_update_chain_flags(struct il_priv *il);
629 extern const u8 il_bcast_addr[ETH_ALEN];
630 extern int il_queue_space(const struct il_queue *q);
631 static inline int il_queue_used(const struct il_queue *q, int i)
632 {
633 return q->write_ptr >= q->read_ptr ?
634 (i >= q->read_ptr && i < q->write_ptr) :
635 !(i < q->read_ptr && i >= q->write_ptr);
636 }
637
638
639 static inline u8 il_get_cmd_idx(struct il_queue *q, u32 idx,
640 int is_huge)
641 {
642 /*
643 * This is for init calibration result and scan command which
644 * required buffer > TFD_MAX_PAYLOAD_SIZE,
645 * the big buffer at end of command array
646 */
647 if (is_huge)
648 return q->n_win; /* must be power of 2 */
649
650 /* Otherwise, use normal size buffers */
651 return idx & (q->n_win - 1);
652 }
653
654
655 struct il_dma_ptr {
656 dma_addr_t dma;
657 void *addr;
658 size_t size;
659 };
660
661 #define IL_OPERATION_MODE_AUTO 0
662 #define IL_OPERATION_MODE_HT_ONLY 1
663 #define IL_OPERATION_MODE_MIXED 2
664 #define IL_OPERATION_MODE_20MHZ 3
665
666 #define IL_TX_CRC_SIZE 4
667 #define IL_TX_DELIMITER_SIZE 4
668
669 #define TX_POWER_IL_ILLEGAL_VOLTAGE -10000
670
671 /* Sensitivity and chain noise calibration */
672 #define INITIALIZATION_VALUE 0xFFFF
673 #define IL4965_CAL_NUM_BEACONS 20
674 #define IL_CAL_NUM_BEACONS 16
675 #define MAXIMUM_ALLOWED_PATHLOSS 15
676
677 #define CHAIN_NOISE_MAX_DELTA_GAIN_CODE 3
678
679 #define MAX_FA_OFDM 50
680 #define MIN_FA_OFDM 5
681 #define MAX_FA_CCK 50
682 #define MIN_FA_CCK 5
683
684 #define AUTO_CORR_STEP_OFDM 1
685
686 #define AUTO_CORR_STEP_CCK 3
687 #define AUTO_CORR_MAX_TH_CCK 160
688
689 #define NRG_DIFF 2
690 #define NRG_STEP_CCK 2
691 #define NRG_MARGIN 8
692 #define MAX_NUMBER_CCK_NO_FA 100
693
694 #define AUTO_CORR_CCK_MIN_VAL_DEF (125)
695
696 #define CHAIN_A 0
697 #define CHAIN_B 1
698 #define CHAIN_C 2
699 #define CHAIN_NOISE_DELTA_GAIN_INIT_VAL 4
700 #define ALL_BAND_FILTER 0xFF00
701 #define IN_BAND_FILTER 0xFF
702 #define MIN_AVERAGE_NOISE_MAX_VALUE 0xFFFFFFFF
703
704 #define NRG_NUM_PREV_STAT_L 20
705 #define NUM_RX_CHAINS 3
706
707 enum il4965_false_alarm_state {
708 IL_FA_TOO_MANY = 0,
709 IL_FA_TOO_FEW = 1,
710 IL_FA_GOOD_RANGE = 2,
711 };
712
713 enum il4965_chain_noise_state {
714 IL_CHAIN_NOISE_ALIVE = 0, /* must be 0 */
715 IL_CHAIN_NOISE_ACCUMULATE,
716 IL_CHAIN_NOISE_CALIBRATED,
717 IL_CHAIN_NOISE_DONE,
718 };
719
720 enum il4965_calib_enabled_state {
721 IL_CALIB_DISABLED = 0, /* must be 0 */
722 IL_CALIB_ENABLED = 1,
723 };
724
725 /*
726 * enum il_calib
727 * defines the order in which results of initial calibrations
728 * should be sent to the runtime uCode
729 */
730 enum il_calib {
731 IL_CALIB_MAX,
732 };
733
734 /* Opaque calibration results */
735 struct il_calib_result {
736 void *buf;
737 size_t buf_len;
738 };
739
740 enum ucode_type {
741 UCODE_NONE = 0,
742 UCODE_INIT,
743 UCODE_RT
744 };
745
746 /* Sensitivity calib data */
747 struct il_sensitivity_data {
748 u32 auto_corr_ofdm;
749 u32 auto_corr_ofdm_mrc;
750 u32 auto_corr_ofdm_x1;
751 u32 auto_corr_ofdm_mrc_x1;
752 u32 auto_corr_cck;
753 u32 auto_corr_cck_mrc;
754
755 u32 last_bad_plcp_cnt_ofdm;
756 u32 last_fa_cnt_ofdm;
757 u32 last_bad_plcp_cnt_cck;
758 u32 last_fa_cnt_cck;
759
760 u32 nrg_curr_state;
761 u32 nrg_prev_state;
762 u32 nrg_value[10];
763 u8 nrg_silence_rssi[NRG_NUM_PREV_STAT_L];
764 u32 nrg_silence_ref;
765 u32 nrg_energy_idx;
766 u32 nrg_silence_idx;
767 u32 nrg_th_cck;
768 s32 nrg_auto_corr_silence_diff;
769 u32 num_in_cck_no_fa;
770 u32 nrg_th_ofdm;
771
772 u16 barker_corr_th_min;
773 u16 barker_corr_th_min_mrc;
774 u16 nrg_th_cca;
775 };
776
777 /* Chain noise (differential Rx gain) calib data */
778 struct il_chain_noise_data {
779 u32 active_chains;
780 u32 chain_noise_a;
781 u32 chain_noise_b;
782 u32 chain_noise_c;
783 u32 chain_signal_a;
784 u32 chain_signal_b;
785 u32 chain_signal_c;
786 u16 beacon_count;
787 u8 disconn_array[NUM_RX_CHAINS];
788 u8 delta_gain_code[NUM_RX_CHAINS];
789 u8 radio_write;
790 u8 state;
791 };
792
793 #define EEPROM_SEM_TIMEOUT 10 /* milliseconds */
794 #define EEPROM_SEM_RETRY_LIMIT 1000 /* number of attempts (not time) */
795
796 #define IL_TRAFFIC_ENTRIES (256)
797 #define IL_TRAFFIC_ENTRY_SIZE (64)
798
799 enum {
800 MEASUREMENT_READY = (1 << 0),
801 MEASUREMENT_ACTIVE = (1 << 1),
802 };
803
804 /* interrupt stats */
805 struct isr_stats {
806 u32 hw;
807 u32 sw;
808 u32 err_code;
809 u32 sch;
810 u32 alive;
811 u32 rfkill;
812 u32 ctkill;
813 u32 wakeup;
814 u32 rx;
815 u32 rx_handlers[REPLY_MAX];
816 u32 tx;
817 u32 unhandled;
818 };
819
820 /* management stats */
821 enum il_mgmt_stats {
822 MANAGEMENT_ASSOC_REQ = 0,
823 MANAGEMENT_ASSOC_RESP,
824 MANAGEMENT_REASSOC_REQ,
825 MANAGEMENT_REASSOC_RESP,
826 MANAGEMENT_PROBE_REQ,
827 MANAGEMENT_PROBE_RESP,
828 MANAGEMENT_BEACON,
829 MANAGEMENT_ATIM,
830 MANAGEMENT_DISASSOC,
831 MANAGEMENT_AUTH,
832 MANAGEMENT_DEAUTH,
833 MANAGEMENT_ACTION,
834 MANAGEMENT_MAX,
835 };
836 /* control stats */
837 enum il_ctrl_stats {
838 CONTROL_BACK_REQ = 0,
839 CONTROL_BACK,
840 CONTROL_PSPOLL,
841 CONTROL_RTS,
842 CONTROL_CTS,
843 CONTROL_ACK,
844 CONTROL_CFEND,
845 CONTROL_CFENDACK,
846 CONTROL_MAX,
847 };
848
849 struct traffic_stats {
850 #ifdef CONFIG_IWLEGACY_DEBUGFS
851 u32 mgmt[MANAGEMENT_MAX];
852 u32 ctrl[CONTROL_MAX];
853 u32 data_cnt;
854 u64 data_bytes;
855 #endif
856 };
857
858 /*
859 * host interrupt timeout value
860 * used with setting interrupt coalescing timer
861 * the CSR_INT_COALESCING is an 8 bit register in 32-usec unit
862 *
863 * default interrupt coalescing timer is 64 x 32 = 2048 usecs
864 * default interrupt coalescing calibration timer is 16 x 32 = 512 usecs
865 */
866 #define IL_HOST_INT_TIMEOUT_MAX (0xFF)
867 #define IL_HOST_INT_TIMEOUT_DEF (0x40)
868 #define IL_HOST_INT_TIMEOUT_MIN (0x0)
869 #define IL_HOST_INT_CALIB_TIMEOUT_MAX (0xFF)
870 #define IL_HOST_INT_CALIB_TIMEOUT_DEF (0x10)
871 #define IL_HOST_INT_CALIB_TIMEOUT_MIN (0x0)
872
873 #define IL_DELAY_NEXT_FORCE_FW_RELOAD (HZ*5)
874
875 /* TX queue watchdog timeouts in mSecs */
876 #define IL_DEF_WD_TIMEOUT (2000)
877 #define IL_LONG_WD_TIMEOUT (10000)
878 #define IL_MAX_WD_TIMEOUT (120000)
879
880 struct il_force_reset {
881 int reset_request_count;
882 int reset_success_count;
883 int reset_reject_count;
884 unsigned long reset_duration;
885 unsigned long last_force_reset_jiffies;
886 };
887
888 /* extend beacon time format bit shifting */
889 /*
890 * for _3945 devices
891 * bits 31:24 - extended
892 * bits 23:0 - interval
893 */
894 #define IL3945_EXT_BEACON_TIME_POS 24
895 /*
896 * for _4965 devices
897 * bits 31:22 - extended
898 * bits 21:0 - interval
899 */
900 #define IL4965_EXT_BEACON_TIME_POS 22
901
902 struct il_rxon_context {
903 struct ieee80211_vif *vif;
904
905 const u8 *ac_to_fifo;
906 const u8 *ac_to_queue;
907 u8 mcast_queue;
908
909 /*
910 * We could use the vif to indicate active, but we
911 * also need it to be active during disabling when
912 * we already removed the vif for type setting.
913 */
914 bool always_active, is_active;
915
916 bool ht_need_multiple_chains;
917
918 int ctxid;
919
920 u32 interface_modes, exclusive_interface_modes;
921 u8 unused_devtype, ap_devtype, ibss_devtype, station_devtype;
922
923 /*
924 * We declare this const so it can only be
925 * changed via explicit cast within the
926 * routines that actually update the physical
927 * hardware.
928 */
929 const struct il_rxon_cmd active;
930 struct il_rxon_cmd staging;
931
932 struct il_rxon_time_cmd timing;
933
934 struct il_qos_info qos_data;
935
936 u8 bcast_sta_id, ap_sta_id;
937
938 u8 rxon_cmd, rxon_assoc_cmd, rxon_timing_cmd;
939 u8 qos_cmd;
940 u8 wep_key_cmd;
941
942 struct il_wep_key wep_keys[WEP_KEYS_MAX];
943 u8 key_mapping_keys;
944
945 __le32 station_flags;
946
947 struct {
948 bool non_gf_sta_present;
949 u8 protection;
950 bool enabled, is_40mhz;
951 u8 extension_chan_offset;
952 } ht;
953 };
954
955 struct il_priv {
956
957 /* ieee device used by generic ieee processing code */
958 struct ieee80211_hw *hw;
959 struct ieee80211_channel *ieee_channels;
960 struct ieee80211_rate *ieee_rates;
961 struct il_cfg *cfg;
962
963 /* temporary frame storage list */
964 struct list_head free_frames;
965 int frames_count;
966
967 enum ieee80211_band band;
968 int alloc_rxb_page;
969
970 void (*rx_handlers[REPLY_MAX])(struct il_priv *il,
971 struct il_rx_buf *rxb);
972
973 struct ieee80211_supported_band bands[IEEE80211_NUM_BANDS];
974
975 /* spectrum measurement report caching */
976 struct il_spectrum_notification measure_report;
977 u8 measurement_status;
978
979 /* ucode beacon time */
980 u32 ucode_beacon_time;
981 int missed_beacon_threshold;
982
983 /* track IBSS manager (last beacon) status */
984 u32 ibss_manager;
985
986 /* force reset */
987 struct il_force_reset force_reset;
988
989 /* we allocate array of il_channel_info for NIC's valid channels.
990 * Access via channel # using indirect idx array */
991 struct il_channel_info *channel_info; /* channel info array */
992 u8 channel_count; /* # of channels */
993
994 /* thermal calibration */
995 s32 temperature; /* degrees Kelvin */
996 s32 last_temperature;
997
998 /* init calibration results */
999 struct il_calib_result calib_results[IL_CALIB_MAX];
1000
1001 /* Scan related variables */
1002 unsigned long scan_start;
1003 unsigned long scan_start_tsf;
1004 void *scan_cmd;
1005 enum ieee80211_band scan_band;
1006 struct cfg80211_scan_request *scan_request;
1007 struct ieee80211_vif *scan_vif;
1008 u8 scan_tx_ant[IEEE80211_NUM_BANDS];
1009 u8 mgmt_tx_ant;
1010
1011 /* spinlock */
1012 spinlock_t lock; /* protect general shared data */
1013 spinlock_t hcmd_lock; /* protect hcmd */
1014 spinlock_t reg_lock; /* protect hw register access */
1015 struct mutex mutex;
1016
1017 /* basic pci-network driver stuff */
1018 struct pci_dev *pci_dev;
1019
1020 /* pci hardware address support */
1021 void __iomem *hw_base;
1022 u32 hw_rev;
1023 u32 hw_wa_rev;
1024 u8 rev_id;
1025
1026 /* command queue number */
1027 u8 cmd_queue;
1028
1029 /* max number of station keys */
1030 u8 sta_key_max_num;
1031
1032 /* EEPROM MAC addresses */
1033 struct mac_address addresses[1];
1034
1035 /* uCode images, save to reload in case of failure */
1036 int fw_idx; /* firmware we're trying to load */
1037 u32 ucode_ver; /* version of ucode, copy of
1038 il_ucode.ver */
1039 struct fw_desc ucode_code; /* runtime inst */
1040 struct fw_desc ucode_data; /* runtime data original */
1041 struct fw_desc ucode_data_backup; /* runtime data save/restore */
1042 struct fw_desc ucode_init; /* initialization inst */
1043 struct fw_desc ucode_init_data; /* initialization data */
1044 struct fw_desc ucode_boot; /* bootstrap inst */
1045 enum ucode_type ucode_type;
1046 u8 ucode_write_complete; /* the image write is complete */
1047 char firmware_name[25];
1048
1049 struct il_rxon_context ctx;
1050
1051 __le16 switch_channel;
1052
1053 /* 1st responses from initialize and runtime uCode images.
1054 * _4965's initialize alive response contains some calibration data. */
1055 struct il_init_alive_resp card_alive_init;
1056 struct il_alive_resp card_alive;
1057
1058 u16 active_rate;
1059
1060 u8 start_calib;
1061 struct il_sensitivity_data sensitivity_data;
1062 struct il_chain_noise_data chain_noise_data;
1063 __le16 sensitivity_tbl[HD_TBL_SIZE];
1064
1065 struct il_ht_config current_ht_config;
1066
1067 /* Rate scaling data */
1068 u8 retry_rate;
1069
1070 wait_queue_head_t wait_command_queue;
1071
1072 int activity_timer_active;
1073
1074 /* Rx and Tx DMA processing queues */
1075 struct il_rx_queue rxq;
1076 struct il_tx_queue *txq;
1077 unsigned long txq_ctx_active_msk;
1078 struct il_dma_ptr kw; /* keep warm address */
1079 struct il_dma_ptr scd_bc_tbls;
1080
1081 u32 scd_base_addr; /* scheduler sram base address */
1082
1083 unsigned long status;
1084
1085 /* counts mgmt, ctl, and data packets */
1086 struct traffic_stats tx_stats;
1087 struct traffic_stats rx_stats;
1088
1089 /* counts interrupts */
1090 struct isr_stats isr_stats;
1091
1092 struct il_power_mgr power_data;
1093
1094 /* context information */
1095 u8 bssid[ETH_ALEN]; /* used only on 3945 but filled by core */
1096
1097 /* station table variables */
1098
1099 /* Note: if lock and sta_lock are needed, lock must be acquired first */
1100 spinlock_t sta_lock;
1101 int num_stations;
1102 struct il_station_entry stations[IL_STATION_COUNT];
1103 unsigned long ucode_key_table;
1104
1105 /* queue refcounts */
1106 #define IL_MAX_HW_QUEUES 32
1107 unsigned long queue_stopped[BITS_TO_LONGS(IL_MAX_HW_QUEUES)];
1108 /* for each AC */
1109 atomic_t queue_stop_count[4];
1110
1111 /* Indication if ieee80211_ops->open has been called */
1112 u8 is_open;
1113
1114 u8 mac80211_registered;
1115
1116 /* eeprom -- this is in the card's little endian byte order */
1117 u8 *eeprom;
1118 struct il_eeprom_calib_info *calib_info;
1119
1120 enum nl80211_iftype iw_mode;
1121
1122 /* Last Rx'd beacon timestamp */
1123 u64 timestamp;
1124
1125 union {
1126 #if defined(CONFIG_IWL3945) || defined(CONFIG_IWL3945_MODULE)
1127 struct {
1128 void *shared_virt;
1129 dma_addr_t shared_phys;
1130
1131 struct delayed_work thermal_periodic;
1132 struct delayed_work rfkill_poll;
1133
1134 struct il3945_notif_stats stats;
1135 #ifdef CONFIG_IWLEGACY_DEBUGFS
1136 struct il3945_notif_stats accum_stats;
1137 struct il3945_notif_stats delta_stats;
1138 struct il3945_notif_stats max_delta;
1139 #endif
1140
1141 u32 sta_supp_rates;
1142 int last_rx_rssi; /* From Rx packet stats */
1143
1144 /* Rx'd packet timing information */
1145 u32 last_beacon_time;
1146 u64 last_tsf;
1147
1148 /*
1149 * each calibration channel group in the
1150 * EEPROM has a derived clip setting for
1151 * each rate.
1152 */
1153 const struct il3945_clip_group clip_groups[5];
1154
1155 } _3945;
1156 #endif
1157 #if defined(CONFIG_IWL4965) || defined(CONFIG_IWL4965_MODULE)
1158 struct {
1159 struct il_rx_phy_res last_phy_res;
1160 bool last_phy_res_valid;
1161
1162 struct completion firmware_loading_complete;
1163
1164 /*
1165 * chain noise reset and gain commands are the
1166 * two extra calibration commands follows the standard
1167 * phy calibration commands
1168 */
1169 u8 phy_calib_chain_noise_reset_cmd;
1170 u8 phy_calib_chain_noise_gain_cmd;
1171
1172 struct il_notif_stats stats;
1173 #ifdef CONFIG_IWLEGACY_DEBUGFS
1174 struct il_notif_stats accum_stats;
1175 struct il_notif_stats delta_stats;
1176 struct il_notif_stats max_delta;
1177 #endif
1178
1179 } _4965;
1180 #endif
1181 };
1182
1183 struct il_hw_params hw_params;
1184
1185 u32 inta_mask;
1186
1187 struct workqueue_struct *workqueue;
1188
1189 struct work_struct restart;
1190 struct work_struct scan_completed;
1191 struct work_struct rx_replenish;
1192 struct work_struct abort_scan;
1193
1194 struct il_rxon_context *beacon_ctx;
1195 struct sk_buff *beacon_skb;
1196
1197 struct work_struct tx_flush;
1198
1199 struct tasklet_struct irq_tasklet;
1200
1201 struct delayed_work init_alive_start;
1202 struct delayed_work alive_start;
1203 struct delayed_work scan_check;
1204
1205 /* TX Power */
1206 s8 tx_power_user_lmt;
1207 s8 tx_power_device_lmt;
1208 s8 tx_power_next;
1209
1210
1211 #ifdef CONFIG_IWLEGACY_DEBUG
1212 /* debugging info */
1213 u32 debug_level; /* per device debugging will override global
1214 il_debug_level if set */
1215 #endif /* CONFIG_IWLEGACY_DEBUG */
1216 #ifdef CONFIG_IWLEGACY_DEBUGFS
1217 /* debugfs */
1218 u16 tx_traffic_idx;
1219 u16 rx_traffic_idx;
1220 u8 *tx_traffic;
1221 u8 *rx_traffic;
1222 struct dentry *debugfs_dir;
1223 u32 dbgfs_sram_offset, dbgfs_sram_len;
1224 bool disable_ht40;
1225 #endif /* CONFIG_IWLEGACY_DEBUGFS */
1226
1227 struct work_struct txpower_work;
1228 u32 disable_sens_cal;
1229 u32 disable_chain_noise_cal;
1230 u32 disable_tx_power_cal;
1231 struct work_struct run_time_calib_work;
1232 struct timer_list stats_periodic;
1233 struct timer_list watchdog;
1234 bool hw_ready;
1235
1236 struct led_classdev led;
1237 unsigned long blink_on, blink_off;
1238 bool led_registered;
1239 }; /*il_priv */
1240
1241 static inline void il_txq_ctx_activate(struct il_priv *il, int txq_id)
1242 {
1243 set_bit(txq_id, &il->txq_ctx_active_msk);
1244 }
1245
1246 static inline void il_txq_ctx_deactivate(struct il_priv *il, int txq_id)
1247 {
1248 clear_bit(txq_id, &il->txq_ctx_active_msk);
1249 }
1250
1251 #ifdef CONFIG_IWLEGACY_DEBUG
1252 /*
1253 * il_get_debug_level: Return active debug level for device
1254 *
1255 * Using sysfs it is possible to set per device debug level. This debug
1256 * level will be used if set, otherwise the global debug level which can be
1257 * set via module parameter is used.
1258 */
1259 static inline u32 il_get_debug_level(struct il_priv *il)
1260 {
1261 if (il->debug_level)
1262 return il->debug_level;
1263 else
1264 return il_debug_level;
1265 }
1266 #else
1267 static inline u32 il_get_debug_level(struct il_priv *il)
1268 {
1269 return il_debug_level;
1270 }
1271 #endif
1272
1273
1274 static inline struct ieee80211_hdr *
1275 il_tx_queue_get_hdr(struct il_priv *il,
1276 int txq_id, int idx)
1277 {
1278 if (il->txq[txq_id].txb[idx].skb)
1279 return (struct ieee80211_hdr *)il->txq[txq_id].
1280 txb[idx].skb->data;
1281 return NULL;
1282 }
1283
1284 static inline struct il_rxon_context *
1285 il_rxon_ctx_from_vif(struct ieee80211_vif *vif)
1286 {
1287 struct il_vif_priv *vif_priv = (void *)vif->drv_priv;
1288
1289 return vif_priv->ctx;
1290 }
1291
1292 #define for_each_context(il, _ctx) \
1293 for (_ctx = &il->ctx; _ctx == &il->ctx; _ctx++)
1294
1295 static inline int il_is_associated(struct il_priv *il)
1296 {
1297 return (il->ctx.active.filter_flags & RXON_FILTER_ASSOC_MSK) ? 1 : 0;
1298 }
1299
1300 static inline int il_is_any_associated(struct il_priv *il)
1301 {
1302 return il_is_associated(il);
1303 }
1304
1305 static inline int il_is_associated_ctx(struct il_rxon_context *ctx)
1306 {
1307 return (ctx->active.filter_flags & RXON_FILTER_ASSOC_MSK) ? 1 : 0;
1308 }
1309
1310 static inline int il_is_channel_valid(const struct il_channel_info *ch_info)
1311 {
1312 if (ch_info == NULL)
1313 return 0;
1314 return (ch_info->flags & EEPROM_CHANNEL_VALID) ? 1 : 0;
1315 }
1316
1317 static inline int il_is_channel_radar(const struct il_channel_info *ch_info)
1318 {
1319 return (ch_info->flags & EEPROM_CHANNEL_RADAR) ? 1 : 0;
1320 }
1321
1322 static inline u8 il_is_channel_a_band(const struct il_channel_info *ch_info)
1323 {
1324 return ch_info->band == IEEE80211_BAND_5GHZ;
1325 }
1326
1327 static inline int
1328 il_is_channel_passive(const struct il_channel_info *ch)
1329 {
1330 return (!(ch->flags & EEPROM_CHANNEL_ACTIVE)) ? 1 : 0;
1331 }
1332
1333 static inline int
1334 il_is_channel_ibss(const struct il_channel_info *ch)
1335 {
1336 return (ch->flags & EEPROM_CHANNEL_IBSS) ? 1 : 0;
1337 }
1338
1339 static inline void
1340 __il_free_pages(struct il_priv *il, struct page *page)
1341 {
1342 __free_pages(page, il->hw_params.rx_page_order);
1343 il->alloc_rxb_page--;
1344 }
1345
1346 static inline void il_free_pages(struct il_priv *il, unsigned long page)
1347 {
1348 free_pages(page, il->hw_params.rx_page_order);
1349 il->alloc_rxb_page--;
1350 }
1351 #endif /* __il_dev_h__ */