1 /******************************************************************************
3 * Copyright(c) 2003 - 2009 Intel Corporation. All rights reserved.
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms of version 2 of the GNU General Public License as
7 * published by the Free Software Foundation.
9 * This program is distributed in the hope that it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
14 * You should have received a copy of the GNU General Public License along with
15 * this program; if not, write to the Free Software Foundation, Inc.,
16 * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
18 * The full GNU General Public License is included in this distribution in the
19 * file called LICENSE.
21 * Contact Information:
22 * Intel Linux Wireless <ilw@linux.intel.com>
23 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
25 *****************************************************************************/
27 #include <linux/kernel.h>
28 #include <linux/module.h>
29 #include <linux/init.h>
30 #include <linux/pci.h>
31 #include <linux/dma-mapping.h>
32 #include <linux/delay.h>
33 #include <linux/skbuff.h>
34 #include <linux/netdevice.h>
35 #include <linux/wireless.h>
36 #include <linux/firmware.h>
37 #include <linux/etherdevice.h>
38 #include <asm/unaligned.h>
39 #include <net/mac80211.h>
42 #include "iwl-3945-fh.h"
43 #include "iwl-commands.h"
46 #include "iwl-eeprom.h"
47 #include "iwl-helpers.h"
49 #include "iwl-agn-rs.h"
51 #define IWL_DECLARE_RATE_INFO(r, ip, in, rp, rn, pp, np) \
52 [IWL_RATE_##r##M_INDEX] = { IWL_RATE_##r##M_PLCP, \
53 IWL_RATE_##r##M_IEEE, \
54 IWL_RATE_##ip##M_INDEX, \
55 IWL_RATE_##in##M_INDEX, \
56 IWL_RATE_##rp##M_INDEX, \
57 IWL_RATE_##rn##M_INDEX, \
58 IWL_RATE_##pp##M_INDEX, \
59 IWL_RATE_##np##M_INDEX, \
60 IWL_RATE_##r##M_INDEX_TABLE, \
61 IWL_RATE_##ip##M_INDEX_TABLE }
65 * rate, prev rate, next rate, prev tgg rate, next tgg rate
67 * If there isn't a valid next or previous rate then INV is used which
68 * maps to IWL_RATE_INVALID
71 const struct iwl3945_rate_info iwl3945_rates
[IWL_RATE_COUNT_3945
] = {
72 IWL_DECLARE_RATE_INFO(1, INV
, 2, INV
, 2, INV
, 2), /* 1mbps */
73 IWL_DECLARE_RATE_INFO(2, 1, 5, 1, 5, 1, 5), /* 2mbps */
74 IWL_DECLARE_RATE_INFO(5, 2, 6, 2, 11, 2, 11), /*5.5mbps */
75 IWL_DECLARE_RATE_INFO(11, 9, 12, 5, 12, 5, 18), /* 11mbps */
76 IWL_DECLARE_RATE_INFO(6, 5, 9, 5, 11, 5, 11), /* 6mbps */
77 IWL_DECLARE_RATE_INFO(9, 6, 11, 5, 11, 5, 11), /* 9mbps */
78 IWL_DECLARE_RATE_INFO(12, 11, 18, 11, 18, 11, 18), /* 12mbps */
79 IWL_DECLARE_RATE_INFO(18, 12, 24, 12, 24, 11, 24), /* 18mbps */
80 IWL_DECLARE_RATE_INFO(24, 18, 36, 18, 36, 18, 36), /* 24mbps */
81 IWL_DECLARE_RATE_INFO(36, 24, 48, 24, 48, 24, 48), /* 36mbps */
82 IWL_DECLARE_RATE_INFO(48, 36, 54, 36, 54, 36, 54), /* 48mbps */
83 IWL_DECLARE_RATE_INFO(54, 48, INV
, 48, INV
, 48, INV
),/* 54mbps */
86 /* 1 = enable the iwl3945_disable_events() function */
87 #define IWL_EVT_DISABLE (0)
88 #define IWL_EVT_DISABLE_SIZE (1532/32)
91 * iwl3945_disable_events - Disable selected events in uCode event log
93 * Disable an event by writing "1"s into "disable"
94 * bitmap in SRAM. Bit position corresponds to Event # (id/type).
95 * Default values of 0 enable uCode events to be logged.
96 * Use for only special debugging. This function is just a placeholder as-is,
97 * you'll need to provide the special bits! ...
98 * ... and set IWL_EVT_DISABLE to 1. */
99 void iwl3945_disable_events(struct iwl_priv
*priv
)
102 u32 base
; /* SRAM address of event log header */
103 u32 disable_ptr
; /* SRAM address of event-disable bitmap array */
104 u32 array_size
; /* # of u32 entries in array */
105 u32 evt_disable
[IWL_EVT_DISABLE_SIZE
] = {
106 0x00000000, /* 31 - 0 Event id numbers */
107 0x00000000, /* 63 - 32 */
108 0x00000000, /* 95 - 64 */
109 0x00000000, /* 127 - 96 */
110 0x00000000, /* 159 - 128 */
111 0x00000000, /* 191 - 160 */
112 0x00000000, /* 223 - 192 */
113 0x00000000, /* 255 - 224 */
114 0x00000000, /* 287 - 256 */
115 0x00000000, /* 319 - 288 */
116 0x00000000, /* 351 - 320 */
117 0x00000000, /* 383 - 352 */
118 0x00000000, /* 415 - 384 */
119 0x00000000, /* 447 - 416 */
120 0x00000000, /* 479 - 448 */
121 0x00000000, /* 511 - 480 */
122 0x00000000, /* 543 - 512 */
123 0x00000000, /* 575 - 544 */
124 0x00000000, /* 607 - 576 */
125 0x00000000, /* 639 - 608 */
126 0x00000000, /* 671 - 640 */
127 0x00000000, /* 703 - 672 */
128 0x00000000, /* 735 - 704 */
129 0x00000000, /* 767 - 736 */
130 0x00000000, /* 799 - 768 */
131 0x00000000, /* 831 - 800 */
132 0x00000000, /* 863 - 832 */
133 0x00000000, /* 895 - 864 */
134 0x00000000, /* 927 - 896 */
135 0x00000000, /* 959 - 928 */
136 0x00000000, /* 991 - 960 */
137 0x00000000, /* 1023 - 992 */
138 0x00000000, /* 1055 - 1024 */
139 0x00000000, /* 1087 - 1056 */
140 0x00000000, /* 1119 - 1088 */
141 0x00000000, /* 1151 - 1120 */
142 0x00000000, /* 1183 - 1152 */
143 0x00000000, /* 1215 - 1184 */
144 0x00000000, /* 1247 - 1216 */
145 0x00000000, /* 1279 - 1248 */
146 0x00000000, /* 1311 - 1280 */
147 0x00000000, /* 1343 - 1312 */
148 0x00000000, /* 1375 - 1344 */
149 0x00000000, /* 1407 - 1376 */
150 0x00000000, /* 1439 - 1408 */
151 0x00000000, /* 1471 - 1440 */
152 0x00000000, /* 1503 - 1472 */
155 base
= le32_to_cpu(priv
->card_alive
.log_event_table_ptr
);
156 if (!iwl3945_hw_valid_rtc_data_addr(base
)) {
157 IWL_ERR(priv
, "Invalid event log pointer 0x%08X\n", base
);
161 disable_ptr
= iwl_read_targ_mem(priv
, base
+ (4 * sizeof(u32
)));
162 array_size
= iwl_read_targ_mem(priv
, base
+ (5 * sizeof(u32
)));
164 if (IWL_EVT_DISABLE
&& (array_size
== IWL_EVT_DISABLE_SIZE
)) {
165 IWL_DEBUG_INFO(priv
, "Disabling selected uCode log events at 0x%x\n",
167 for (i
= 0; i
< IWL_EVT_DISABLE_SIZE
; i
++)
168 iwl_write_targ_mem(priv
,
169 disable_ptr
+ (i
* sizeof(u32
)),
173 IWL_DEBUG_INFO(priv
, "Selected uCode log events may be disabled\n");
174 IWL_DEBUG_INFO(priv
, " by writing \"1\"s into disable bitmap\n");
175 IWL_DEBUG_INFO(priv
, " in SRAM at 0x%x, size %d u32s\n",
176 disable_ptr
, array_size
);
181 static int iwl3945_hwrate_to_plcp_idx(u8 plcp
)
185 for (idx
= 0; idx
< IWL_RATE_COUNT
; idx
++)
186 if (iwl3945_rates
[idx
].plcp
== plcp
)
191 #ifdef CONFIG_IWLWIFI_DEBUG
192 #define TX_STATUS_ENTRY(x) case TX_STATUS_FAIL_ ## x: return #x
194 static const char *iwl3945_get_tx_fail_reason(u32 status
)
196 switch (status
& TX_STATUS_MSK
) {
197 case TX_STATUS_SUCCESS
:
199 TX_STATUS_ENTRY(SHORT_LIMIT
);
200 TX_STATUS_ENTRY(LONG_LIMIT
);
201 TX_STATUS_ENTRY(FIFO_UNDERRUN
);
202 TX_STATUS_ENTRY(MGMNT_ABORT
);
203 TX_STATUS_ENTRY(NEXT_FRAG
);
204 TX_STATUS_ENTRY(LIFE_EXPIRE
);
205 TX_STATUS_ENTRY(DEST_PS
);
206 TX_STATUS_ENTRY(ABORTED
);
207 TX_STATUS_ENTRY(BT_RETRY
);
208 TX_STATUS_ENTRY(STA_INVALID
);
209 TX_STATUS_ENTRY(FRAG_DROPPED
);
210 TX_STATUS_ENTRY(TID_DISABLE
);
211 TX_STATUS_ENTRY(FRAME_FLUSHED
);
212 TX_STATUS_ENTRY(INSUFFICIENT_CF_POLL
);
213 TX_STATUS_ENTRY(TX_LOCKED
);
214 TX_STATUS_ENTRY(NO_BEACON_ON_RADAR
);
220 static inline const char *iwl3945_get_tx_fail_reason(u32 status
)
227 * get ieee prev rate from rate scale table.
228 * for A and B mode we need to overright prev
231 int iwl3945_rs_next_rate(struct iwl_priv
*priv
, int rate
)
233 int next_rate
= iwl3945_get_prev_ieee_rate(rate
);
235 switch (priv
->band
) {
236 case IEEE80211_BAND_5GHZ
:
237 if (rate
== IWL_RATE_12M_INDEX
)
238 next_rate
= IWL_RATE_9M_INDEX
;
239 else if (rate
== IWL_RATE_6M_INDEX
)
240 next_rate
= IWL_RATE_6M_INDEX
;
242 case IEEE80211_BAND_2GHZ
:
243 if (!(priv
->sta_supp_rates
& IWL_OFDM_RATES_MASK
) &&
244 iwl_is_associated(priv
)) {
245 if (rate
== IWL_RATE_11M_INDEX
)
246 next_rate
= IWL_RATE_5M_INDEX
;
259 * iwl3945_tx_queue_reclaim - Reclaim Tx queue entries already Tx'd
261 * When FW advances 'R' index, all entries between old and new 'R' index
262 * need to be reclaimed. As result, some free space forms. If there is
263 * enough free space (> low mark), wake the stack that feeds us.
265 static void iwl3945_tx_queue_reclaim(struct iwl_priv
*priv
,
266 int txq_id
, int index
)
268 struct iwl_tx_queue
*txq
= &priv
->txq
[txq_id
];
269 struct iwl_queue
*q
= &txq
->q
;
270 struct iwl_tx_info
*tx_info
;
272 BUG_ON(txq_id
== IWL_CMD_QUEUE_NUM
);
274 for (index
= iwl_queue_inc_wrap(index
, q
->n_bd
); q
->read_ptr
!= index
;
275 q
->read_ptr
= iwl_queue_inc_wrap(q
->read_ptr
, q
->n_bd
)) {
277 tx_info
= &txq
->txb
[txq
->q
.read_ptr
];
278 ieee80211_tx_status_irqsafe(priv
->hw
, tx_info
->skb
[0]);
279 tx_info
->skb
[0] = NULL
;
280 priv
->cfg
->ops
->lib
->txq_free_tfd(priv
, txq
);
283 if (iwl_queue_space(q
) > q
->low_mark
&& (txq_id
>= 0) &&
284 (txq_id
!= IWL_CMD_QUEUE_NUM
) &&
285 priv
->mac80211_registered
)
286 iwl_wake_queue(priv
, txq_id
);
290 * iwl3945_rx_reply_tx - Handle Tx response
292 static void iwl3945_rx_reply_tx(struct iwl_priv
*priv
,
293 struct iwl_rx_mem_buffer
*rxb
)
295 struct iwl_rx_packet
*pkt
= (void *)rxb
->skb
->data
;
296 u16 sequence
= le16_to_cpu(pkt
->hdr
.sequence
);
297 int txq_id
= SEQ_TO_QUEUE(sequence
);
298 int index
= SEQ_TO_INDEX(sequence
);
299 struct iwl_tx_queue
*txq
= &priv
->txq
[txq_id
];
300 struct ieee80211_tx_info
*info
;
301 struct iwl3945_tx_resp
*tx_resp
= (void *)&pkt
->u
.raw
[0];
302 u32 status
= le32_to_cpu(tx_resp
->status
);
306 if ((index
>= txq
->q
.n_bd
) || (iwl_queue_used(&txq
->q
, index
) == 0)) {
307 IWL_ERR(priv
, "Read index for DMA queue txq_id (%d) index %d "
308 "is out of range [0-%d] %d %d\n", txq_id
,
309 index
, txq
->q
.n_bd
, txq
->q
.write_ptr
,
314 info
= IEEE80211_SKB_CB(txq
->txb
[txq
->q
.read_ptr
].skb
[0]);
315 ieee80211_tx_info_clear_status(info
);
317 /* Fill the MRR chain with some info about on-chip retransmissions */
318 rate_idx
= iwl3945_hwrate_to_plcp_idx(tx_resp
->rate
);
319 if (info
->band
== IEEE80211_BAND_5GHZ
)
320 rate_idx
-= IWL_FIRST_OFDM_RATE
;
322 fail
= tx_resp
->failure_frame
;
324 info
->status
.rates
[0].idx
= rate_idx
;
325 info
->status
.rates
[0].count
= fail
+ 1; /* add final attempt */
327 /* tx_status->rts_retry_count = tx_resp->failure_rts; */
328 info
->flags
|= ((status
& TX_STATUS_MSK
) == TX_STATUS_SUCCESS
) ?
329 IEEE80211_TX_STAT_ACK
: 0;
331 IWL_DEBUG_TX(priv
, "Tx queue %d Status %s (0x%08x) plcp rate %d retries %d\n",
332 txq_id
, iwl3945_get_tx_fail_reason(status
), status
,
333 tx_resp
->rate
, tx_resp
->failure_frame
);
335 IWL_DEBUG_TX_REPLY(priv
, "Tx queue reclaim %d\n", index
);
336 iwl3945_tx_queue_reclaim(priv
, txq_id
, index
);
338 if (iwl_check_bits(status
, TX_ABORT_REQUIRED_MSK
))
339 IWL_ERR(priv
, "TODO: Implement Tx ABORT REQUIRED!!!\n");
344 /*****************************************************************************
346 * Intel PRO/Wireless 3945ABG/BG Network Connection
348 * RX handler implementations
350 *****************************************************************************/
352 void iwl3945_hw_rx_statistics(struct iwl_priv
*priv
, struct iwl_rx_mem_buffer
*rxb
)
354 struct iwl_rx_packet
*pkt
= (void *)rxb
->skb
->data
;
355 IWL_DEBUG_RX(priv
, "Statistics notification received (%d vs %d).\n",
356 (int)sizeof(struct iwl3945_notif_statistics
),
357 le32_to_cpu(pkt
->len
));
359 memcpy(&priv
->statistics_39
, pkt
->u
.raw
, sizeof(priv
->statistics_39
));
361 iwl3945_led_background(priv
);
363 priv
->last_statistics_time
= jiffies
;
366 /******************************************************************************
368 * Misc. internal state and helper functions
370 ******************************************************************************/
371 #ifdef CONFIG_IWLWIFI_DEBUG
374 * iwl3945_report_frame - dump frame to syslog during debug sessions
376 * You may hack this function to show different aspects of received frames,
377 * including selective frame dumps.
378 * group100 parameter selects whether to show 1 out of 100 good frames.
380 static void _iwl3945_dbg_report_frame(struct iwl_priv
*priv
,
381 struct iwl_rx_packet
*pkt
,
382 struct ieee80211_hdr
*header
, int group100
)
385 u32 print_summary
= 0;
386 u32 print_dump
= 0; /* set to 1 to dump all frames' contents */
402 struct iwl3945_rx_frame_stats
*rx_stats
= IWL_RX_STATS(pkt
);
403 struct iwl3945_rx_frame_hdr
*rx_hdr
= IWL_RX_HDR(pkt
);
404 struct iwl3945_rx_frame_end
*rx_end
= IWL_RX_END(pkt
);
405 u8
*data
= IWL_RX_DATA(pkt
);
408 fc
= header
->frame_control
;
409 seq_ctl
= le16_to_cpu(header
->seq_ctrl
);
412 channel
= le16_to_cpu(rx_hdr
->channel
);
413 phy_flags
= le16_to_cpu(rx_hdr
->phy_flags
);
414 length
= le16_to_cpu(rx_hdr
->len
);
416 /* end-of-frame status and timestamp */
417 status
= le32_to_cpu(rx_end
->status
);
418 bcn_tmr
= le32_to_cpu(rx_end
->beacon_timestamp
);
419 tsf_low
= le64_to_cpu(rx_end
->timestamp
) & 0x0ffffffff;
420 tsf
= le64_to_cpu(rx_end
->timestamp
);
422 /* signal statistics */
423 rssi
= rx_stats
->rssi
;
425 sig_avg
= le16_to_cpu(rx_stats
->sig_avg
);
426 noise_diff
= le16_to_cpu(rx_stats
->noise_diff
);
428 to_us
= !compare_ether_addr(header
->addr1
, priv
->mac_addr
);
430 /* if data frame is to us and all is good,
431 * (optionally) print summary for only 1 out of every 100 */
432 if (to_us
&& (fc
& ~cpu_to_le16(IEEE80211_FCTL_PROTECTED
)) ==
433 cpu_to_le16(IEEE80211_FCTL_FROMDS
| IEEE80211_FTYPE_DATA
)) {
436 print_summary
= 1; /* print each frame */
437 else if (priv
->framecnt_to_us
< 100) {
438 priv
->framecnt_to_us
++;
441 priv
->framecnt_to_us
= 0;
446 /* print summary for all other frames */
456 else if (ieee80211_has_retry(fc
))
458 else if (ieee80211_is_assoc_resp(fc
))
460 else if (ieee80211_is_reassoc_resp(fc
))
462 else if (ieee80211_is_probe_resp(fc
)) {
464 print_dump
= 1; /* dump frame contents */
465 } else if (ieee80211_is_beacon(fc
)) {
467 print_dump
= 1; /* dump frame contents */
468 } else if (ieee80211_is_atim(fc
))
470 else if (ieee80211_is_auth(fc
))
472 else if (ieee80211_is_deauth(fc
))
474 else if (ieee80211_is_disassoc(fc
))
479 rate
= iwl3945_hwrate_to_plcp_idx(rx_hdr
->rate
);
483 rate
= iwl3945_rates
[rate
].ieee
/ 2;
485 /* print frame summary.
486 * MAC addresses show just the last byte (for brevity),
487 * but you can hack it to show more, if you'd like to. */
489 IWL_DEBUG_RX(priv
, "%s: mhd=0x%04x, dst=0x%02x, "
490 "len=%u, rssi=%d, chnl=%d, rate=%d, \n",
491 title
, le16_to_cpu(fc
), header
->addr1
[5],
492 length
, rssi
, channel
, rate
);
494 /* src/dst addresses assume managed mode */
495 IWL_DEBUG_RX(priv
, "%s: 0x%04x, dst=0x%02x, "
496 "src=0x%02x, rssi=%u, tim=%lu usec, "
497 "phy=0x%02x, chnl=%d\n",
498 title
, le16_to_cpu(fc
), header
->addr1
[5],
499 header
->addr3
[5], rssi
,
500 tsf_low
- priv
->scan_start_tsf
,
505 iwl_print_hex_dump(IWL_DL_RX
, data
, length
);
508 static void iwl3945_dbg_report_frame(struct iwl_priv
*priv
,
509 struct iwl_rx_packet
*pkt
,
510 struct ieee80211_hdr
*header
, int group100
)
512 if (iwl_debug_level
& IWL_DL_RX
)
513 _iwl3945_dbg_report_frame(priv
, pkt
, header
, group100
);
517 static inline void iwl3945_dbg_report_frame(struct iwl_priv
*priv
,
518 struct iwl_rx_packet
*pkt
,
519 struct ieee80211_hdr
*header
, int group100
)
524 /* This is necessary only for a number of statistics, see the caller. */
525 static int iwl3945_is_network_packet(struct iwl_priv
*priv
,
526 struct ieee80211_hdr
*header
)
528 /* Filter incoming packets to determine if they are targeted toward
529 * this network, discarding packets coming from ourselves */
530 switch (priv
->iw_mode
) {
531 case NL80211_IFTYPE_ADHOC
: /* Header: Dest. | Source | BSSID */
532 /* packets to our IBSS update information */
533 return !compare_ether_addr(header
->addr3
, priv
->bssid
);
534 case NL80211_IFTYPE_STATION
: /* Header: Dest. | AP{BSSID} | Source */
535 /* packets to our IBSS update information */
536 return !compare_ether_addr(header
->addr2
, priv
->bssid
);
542 static void iwl3945_pass_packet_to_mac80211(struct iwl_priv
*priv
,
543 struct iwl_rx_mem_buffer
*rxb
,
544 struct ieee80211_rx_status
*stats
)
546 struct iwl_rx_packet
*pkt
= (struct iwl_rx_packet
*)rxb
->skb
->data
;
547 #ifdef CONFIG_IWLWIFI_LEDS
548 struct ieee80211_hdr
*hdr
= (struct ieee80211_hdr
*)IWL_RX_DATA(pkt
);
550 struct iwl3945_rx_frame_hdr
*rx_hdr
= IWL_RX_HDR(pkt
);
551 struct iwl3945_rx_frame_end
*rx_end
= IWL_RX_END(pkt
);
552 short len
= le16_to_cpu(rx_hdr
->len
);
554 /* We received data from the HW, so stop the watchdog */
555 if (unlikely((len
+ IWL39_RX_FRAME_SIZE
) > skb_tailroom(rxb
->skb
))) {
556 IWL_DEBUG_DROP(priv
, "Corruption detected!\n");
560 /* We only process data packets if the interface is open */
561 if (unlikely(!priv
->is_open
)) {
562 IWL_DEBUG_DROP_LIMIT(priv
,
563 "Dropping packet while interface is not open.\n");
567 skb_reserve(rxb
->skb
, (void *)rx_hdr
->payload
- (void *)pkt
);
568 /* Set the size of the skb to the size of the frame */
569 skb_put(rxb
->skb
, le16_to_cpu(rx_hdr
->len
));
571 if (!iwl3945_mod_params
.sw_crypto
)
572 iwl_set_decrypted_flag(priv
,
573 (struct ieee80211_hdr
*)rxb
->skb
->data
,
574 le32_to_cpu(rx_end
->status
), stats
);
576 #ifdef CONFIG_IWLWIFI_LEDS
577 if (ieee80211_is_data(hdr
->frame_control
))
578 priv
->rxtxpackets
+= len
;
580 memcpy(IEEE80211_SKB_RXCB(rxb
->skb
), stats
, sizeof(*stats
));
581 ieee80211_rx_irqsafe(priv
->hw
, rxb
->skb
);
585 #define IWL_DELAY_NEXT_SCAN_AFTER_ASSOC (HZ*6)
587 static void iwl3945_rx_reply_rx(struct iwl_priv
*priv
,
588 struct iwl_rx_mem_buffer
*rxb
)
590 struct ieee80211_hdr
*header
;
591 struct ieee80211_rx_status rx_status
;
592 struct iwl_rx_packet
*pkt
= (void *)rxb
->skb
->data
;
593 struct iwl3945_rx_frame_stats
*rx_stats
= IWL_RX_STATS(pkt
);
594 struct iwl3945_rx_frame_hdr
*rx_hdr
= IWL_RX_HDR(pkt
);
595 struct iwl3945_rx_frame_end
*rx_end
= IWL_RX_END(pkt
);
597 u16 rx_stats_sig_avg
= le16_to_cpu(rx_stats
->sig_avg
);
598 u16 rx_stats_noise_diff
= le16_to_cpu(rx_stats
->noise_diff
);
602 rx_status
.mactime
= le64_to_cpu(rx_end
->timestamp
);
604 ieee80211_channel_to_frequency(le16_to_cpu(rx_hdr
->channel
));
605 rx_status
.band
= (rx_hdr
->phy_flags
& RX_RES_PHY_FLAGS_BAND_24_MSK
) ?
606 IEEE80211_BAND_2GHZ
: IEEE80211_BAND_5GHZ
;
608 rx_status
.rate_idx
= iwl3945_hwrate_to_plcp_idx(rx_hdr
->rate
);
609 if (rx_status
.band
== IEEE80211_BAND_5GHZ
)
610 rx_status
.rate_idx
-= IWL_FIRST_OFDM_RATE
;
612 rx_status
.antenna
= le16_to_cpu(rx_hdr
->phy_flags
&
613 RX_RES_PHY_FLAGS_ANTENNA_MSK
) >> 4;
615 /* set the preamble flag if appropriate */
616 if (rx_hdr
->phy_flags
& RX_RES_PHY_FLAGS_SHORT_PREAMBLE_MSK
)
617 rx_status
.flag
|= RX_FLAG_SHORTPRE
;
619 if ((unlikely(rx_stats
->phy_count
> 20))) {
620 IWL_DEBUG_DROP(priv
, "dsp size out of range [0,20]: %d/n",
621 rx_stats
->phy_count
);
625 if (!(rx_end
->status
& RX_RES_STATUS_NO_CRC32_ERROR
)
626 || !(rx_end
->status
& RX_RES_STATUS_NO_RXE_OVERFLOW
)) {
627 IWL_DEBUG_RX(priv
, "Bad CRC or FIFO: 0x%08X.\n", rx_end
->status
);
633 /* Convert 3945's rssi indicator to dBm */
634 rx_status
.signal
= rx_stats
->rssi
- IWL39_RSSI_OFFSET
;
636 /* Set default noise value to -127 */
637 if (priv
->last_rx_noise
== 0)
638 priv
->last_rx_noise
= IWL_NOISE_MEAS_NOT_AVAILABLE
;
640 /* 3945 provides noise info for OFDM frames only.
641 * sig_avg and noise_diff are measured by the 3945's digital signal
642 * processor (DSP), and indicate linear levels of signal level and
643 * distortion/noise within the packet preamble after
644 * automatic gain control (AGC). sig_avg should stay fairly
645 * constant if the radio's AGC is working well.
646 * Since these values are linear (not dB or dBm), linear
647 * signal-to-noise ratio (SNR) is (sig_avg / noise_diff).
648 * Convert linear SNR to dB SNR, then subtract that from rssi dBm
649 * to obtain noise level in dBm.
650 * Calculate rx_status.signal (quality indicator in %) based on SNR. */
651 if (rx_stats_noise_diff
) {
652 snr
= rx_stats_sig_avg
/ rx_stats_noise_diff
;
653 rx_status
.noise
= rx_status
.signal
-
654 iwl3945_calc_db_from_ratio(snr
);
655 rx_status
.qual
= iwl3945_calc_sig_qual(rx_status
.signal
,
658 /* If noise info not available, calculate signal quality indicator (%)
659 * using just the dBm signal level. */
661 rx_status
.noise
= priv
->last_rx_noise
;
662 rx_status
.qual
= iwl3945_calc_sig_qual(rx_status
.signal
, 0);
666 IWL_DEBUG_STATS(priv
, "Rssi %d noise %d qual %d sig_avg %d noise_diff %d\n",
667 rx_status
.signal
, rx_status
.noise
, rx_status
.qual
,
668 rx_stats_sig_avg
, rx_stats_noise_diff
);
670 header
= (struct ieee80211_hdr
*)IWL_RX_DATA(pkt
);
672 network_packet
= iwl3945_is_network_packet(priv
, header
);
674 IWL_DEBUG_STATS_LIMIT(priv
, "[%c] %d RSSI:%d Signal:%u, Noise:%u, Rate:%u\n",
675 network_packet
? '*' : ' ',
676 le16_to_cpu(rx_hdr
->channel
),
677 rx_status
.signal
, rx_status
.signal
,
678 rx_status
.noise
, rx_status
.rate_idx
);
680 /* Set "1" to report good data frames in groups of 100 */
681 iwl3945_dbg_report_frame(priv
, pkt
, header
, 1);
683 if (network_packet
) {
684 priv
->last_beacon_time
= le32_to_cpu(rx_end
->beacon_timestamp
);
685 priv
->last_tsf
= le64_to_cpu(rx_end
->timestamp
);
686 priv
->last_rx_rssi
= rx_status
.signal
;
687 priv
->last_rx_noise
= rx_status
.noise
;
690 iwl3945_pass_packet_to_mac80211(priv
, rxb
, &rx_status
);
693 int iwl3945_hw_txq_attach_buf_to_tfd(struct iwl_priv
*priv
,
694 struct iwl_tx_queue
*txq
,
695 dma_addr_t addr
, u16 len
, u8 reset
, u8 pad
)
699 struct iwl3945_tfd
*tfd
, *tfd_tmp
;
702 tfd_tmp
= (struct iwl3945_tfd
*)txq
->tfds
;
703 tfd
= &tfd_tmp
[q
->write_ptr
];
706 memset(tfd
, 0, sizeof(*tfd
));
708 count
= TFD_CTL_COUNT_GET(le32_to_cpu(tfd
->control_flags
));
710 if ((count
>= NUM_TFD_CHUNKS
) || (count
< 0)) {
711 IWL_ERR(priv
, "Error can not send more than %d chunks\n",
716 tfd
->tbs
[count
].addr
= cpu_to_le32(addr
);
717 tfd
->tbs
[count
].len
= cpu_to_le32(len
);
721 tfd
->control_flags
= cpu_to_le32(TFD_CTL_COUNT_SET(count
) |
722 TFD_CTL_PAD_SET(pad
));
728 * iwl3945_hw_txq_free_tfd - Free one TFD, those at index [txq->q.read_ptr]
730 * Does NOT advance any indexes
732 void iwl3945_hw_txq_free_tfd(struct iwl_priv
*priv
, struct iwl_tx_queue
*txq
)
734 struct iwl3945_tfd
*tfd_tmp
= (struct iwl3945_tfd
*)txq
->tfds
;
735 int index
= txq
->q
.read_ptr
;
736 struct iwl3945_tfd
*tfd
= &tfd_tmp
[index
];
737 struct pci_dev
*dev
= priv
->pci_dev
;
742 counter
= TFD_CTL_COUNT_GET(le32_to_cpu(tfd
->control_flags
));
743 if (counter
> NUM_TFD_CHUNKS
) {
744 IWL_ERR(priv
, "Too many chunks: %i\n", counter
);
745 /* @todo issue fatal error, it is quite serious situation */
751 pci_unmap_single(dev
,
752 pci_unmap_addr(&txq
->cmd
[index
]->meta
, mapping
),
753 pci_unmap_len(&txq
->cmd
[index
]->meta
, len
),
756 /* unmap chunks if any */
758 for (i
= 1; i
< counter
; i
++) {
759 pci_unmap_single(dev
, le32_to_cpu(tfd
->tbs
[i
].addr
),
760 le32_to_cpu(tfd
->tbs
[i
].len
), PCI_DMA_TODEVICE
);
761 if (txq
->txb
[txq
->q
.read_ptr
].skb
[0]) {
762 struct sk_buff
*skb
= txq
->txb
[txq
->q
.read_ptr
].skb
[0];
763 if (txq
->txb
[txq
->q
.read_ptr
].skb
[0]) {
764 /* Can be called from interrupt context */
765 dev_kfree_skb_any(skb
);
766 txq
->txb
[txq
->q
.read_ptr
].skb
[0] = NULL
;
774 * iwl3945_hw_build_tx_cmd_rate - Add rate portion to TX_CMD:
777 void iwl3945_hw_build_tx_cmd_rate(struct iwl_priv
*priv
, struct iwl_cmd
*cmd
,
778 struct ieee80211_tx_info
*info
,
779 struct ieee80211_hdr
*hdr
, int sta_id
, int tx_id
)
781 u16 hw_value
= ieee80211_get_tx_rate(priv
->hw
, info
)->hw_value
;
782 u16 rate_index
= min(hw_value
& 0xffff, IWL_RATE_COUNT
- 1);
788 __le16 fc
= hdr
->frame_control
;
789 struct iwl3945_tx_cmd
*tx
= (struct iwl3945_tx_cmd
*)cmd
->cmd
.payload
;
791 rate
= iwl3945_rates
[rate_index
].plcp
;
792 tx_flags
= tx
->tx_flags
;
794 /* We need to figure out how to get the sta->supp_rates while
795 * in this running context */
796 rate_mask
= IWL_RATES_MASK
;
798 if (tx_id
>= IWL_CMD_QUEUE_NUM
)
803 if (ieee80211_is_probe_resp(fc
)) {
804 data_retry_limit
= 3;
805 if (data_retry_limit
< rts_retry_limit
)
806 rts_retry_limit
= data_retry_limit
;
808 data_retry_limit
= IWL_DEFAULT_TX_RETRY
;
810 if (priv
->data_retry_limit
!= -1)
811 data_retry_limit
= priv
->data_retry_limit
;
813 if (ieee80211_is_mgmt(fc
)) {
814 switch (fc
& cpu_to_le16(IEEE80211_FCTL_STYPE
)) {
815 case cpu_to_le16(IEEE80211_STYPE_AUTH
):
816 case cpu_to_le16(IEEE80211_STYPE_DEAUTH
):
817 case cpu_to_le16(IEEE80211_STYPE_ASSOC_REQ
):
818 case cpu_to_le16(IEEE80211_STYPE_REASSOC_REQ
):
819 if (tx_flags
& TX_CMD_FLG_RTS_MSK
) {
820 tx_flags
&= ~TX_CMD_FLG_RTS_MSK
;
821 tx_flags
|= TX_CMD_FLG_CTS_MSK
;
829 tx
->rts_retry_limit
= rts_retry_limit
;
830 tx
->data_retry_limit
= data_retry_limit
;
832 tx
->tx_flags
= tx_flags
;
836 ((rate_mask
& IWL_OFDM_RATES_MASK
) >> IWL_FIRST_OFDM_RATE
) & 0xFF;
839 tx
->supp_rates
[1] = (rate_mask
& 0xF);
841 IWL_DEBUG_RATE(priv
, "Tx sta id: %d, rate: %d (plcp), flags: 0x%4X "
842 "cck/ofdm mask: 0x%x/0x%x\n", sta_id
,
843 tx
->rate
, le32_to_cpu(tx
->tx_flags
),
844 tx
->supp_rates
[1], tx
->supp_rates
[0]);
847 u8
iwl3945_sync_sta(struct iwl_priv
*priv
, int sta_id
, u16 tx_rate
, u8 flags
)
849 unsigned long flags_spin
;
850 struct iwl_station_entry
*station
;
852 if (sta_id
== IWL_INVALID_STATION
)
853 return IWL_INVALID_STATION
;
855 spin_lock_irqsave(&priv
->sta_lock
, flags_spin
);
856 station
= &priv
->stations
[sta_id
];
858 station
->sta
.sta
.modify_mask
= STA_MODIFY_TX_RATE_MSK
;
859 station
->sta
.rate_n_flags
= cpu_to_le16(tx_rate
);
860 station
->sta
.mode
= STA_CONTROL_MODIFY_MSK
;
862 spin_unlock_irqrestore(&priv
->sta_lock
, flags_spin
);
864 iwl_send_add_sta(priv
, &station
->sta
, flags
);
865 IWL_DEBUG_RATE(priv
, "SCALE sync station %d to rate %d\n",
870 static int iwl3945_set_pwr_src(struct iwl_priv
*priv
, enum iwl_pwr_src src
)
872 if (src
== IWL_PWR_SRC_VAUX
) {
873 if (pci_pme_capable(priv
->pci_dev
, PCI_D3cold
)) {
874 iwl_set_bits_mask_prph(priv
, APMG_PS_CTRL_REG
,
875 APMG_PS_CTRL_VAL_PWR_SRC_VAUX
,
876 ~APMG_PS_CTRL_MSK_PWR_SRC
);
878 iwl_poll_bit(priv
, CSR_GPIO_IN
,
879 CSR_GPIO_IN_VAL_VAUX_PWR_SRC
,
880 CSR_GPIO_IN_BIT_AUX_POWER
, 5000);
883 iwl_set_bits_mask_prph(priv
, APMG_PS_CTRL_REG
,
884 APMG_PS_CTRL_VAL_PWR_SRC_VMAIN
,
885 ~APMG_PS_CTRL_MSK_PWR_SRC
);
887 iwl_poll_bit(priv
, CSR_GPIO_IN
, CSR_GPIO_IN_VAL_VMAIN_PWR_SRC
,
888 CSR_GPIO_IN_BIT_AUX_POWER
, 5000); /* uS */
894 static int iwl3945_rx_init(struct iwl_priv
*priv
, struct iwl_rx_queue
*rxq
)
896 iwl_write_direct32(priv
, FH39_RCSR_RBD_BASE(0), rxq
->dma_addr
);
897 iwl_write_direct32(priv
, FH39_RCSR_RPTR_ADDR(0), rxq
->rb_stts_dma
);
898 iwl_write_direct32(priv
, FH39_RCSR_WPTR(0), 0);
899 iwl_write_direct32(priv
, FH39_RCSR_CONFIG(0),
900 FH39_RCSR_RX_CONFIG_REG_VAL_DMA_CHNL_EN_ENABLE
|
901 FH39_RCSR_RX_CONFIG_REG_VAL_RDRBD_EN_ENABLE
|
902 FH39_RCSR_RX_CONFIG_REG_BIT_WR_STTS_EN
|
903 FH39_RCSR_RX_CONFIG_REG_VAL_MAX_FRAG_SIZE_128
|
904 (RX_QUEUE_SIZE_LOG
<< FH39_RCSR_RX_CONFIG_REG_POS_RBDC_SIZE
) |
905 FH39_RCSR_RX_CONFIG_REG_VAL_IRQ_DEST_INT_HOST
|
906 (1 << FH39_RCSR_RX_CONFIG_REG_POS_IRQ_RBTH
) |
907 FH39_RCSR_RX_CONFIG_REG_VAL_MSG_MODE_FH
);
909 /* fake read to flush all prev I/O */
910 iwl_read_direct32(priv
, FH39_RSSR_CTRL
);
915 static int iwl3945_tx_reset(struct iwl_priv
*priv
)
919 iwl_write_prph(priv
, ALM_SCD_MODE_REG
, 0x2);
922 iwl_write_prph(priv
, ALM_SCD_ARASTAT_REG
, 0x01);
924 /* all 6 fifo are active */
925 iwl_write_prph(priv
, ALM_SCD_TXFACT_REG
, 0x3f);
927 iwl_write_prph(priv
, ALM_SCD_SBYP_MODE_1_REG
, 0x010000);
928 iwl_write_prph(priv
, ALM_SCD_SBYP_MODE_2_REG
, 0x030002);
929 iwl_write_prph(priv
, ALM_SCD_TXF4MF_REG
, 0x000004);
930 iwl_write_prph(priv
, ALM_SCD_TXF5MF_REG
, 0x000005);
932 iwl_write_direct32(priv
, FH39_TSSR_CBB_BASE
,
935 iwl_write_direct32(priv
, FH39_TSSR_MSG_CONFIG
,
936 FH39_TSSR_TX_MSG_CONFIG_REG_VAL_SNOOP_RD_TXPD_ON
|
937 FH39_TSSR_TX_MSG_CONFIG_REG_VAL_ORDER_RD_TXPD_ON
|
938 FH39_TSSR_TX_MSG_CONFIG_REG_VAL_MAX_FRAG_SIZE_128B
|
939 FH39_TSSR_TX_MSG_CONFIG_REG_VAL_SNOOP_RD_TFD_ON
|
940 FH39_TSSR_TX_MSG_CONFIG_REG_VAL_ORDER_RD_CBB_ON
|
941 FH39_TSSR_TX_MSG_CONFIG_REG_VAL_ORDER_RSP_WAIT_TH
|
942 FH39_TSSR_TX_MSG_CONFIG_REG_VAL_RSP_WAIT_TH
);
949 * iwl3945_txq_ctx_reset - Reset TX queue context
951 * Destroys all DMA structures and initialize them again
953 static int iwl3945_txq_ctx_reset(struct iwl_priv
*priv
)
956 int txq_id
, slots_num
;
958 iwl3945_hw_txq_ctx_free(priv
);
961 rc
= iwl3945_tx_reset(priv
);
966 for (txq_id
= 0; txq_id
< priv
->hw_params
.max_txq_num
; txq_id
++) {
967 slots_num
= (txq_id
== IWL_CMD_QUEUE_NUM
) ?
968 TFD_CMD_SLOTS
: TFD_TX_CMD_SLOTS
;
969 rc
= iwl_tx_queue_init(priv
, &priv
->txq
[txq_id
], slots_num
,
972 IWL_ERR(priv
, "Tx %d queue init failed\n", txq_id
);
980 iwl3945_hw_txq_ctx_free(priv
);
984 static int iwl3945_apm_init(struct iwl_priv
*priv
)
988 iwl_power_initialize(priv
);
990 iwl_set_bit(priv
, CSR_GIO_CHICKEN_BITS
,
991 CSR_GIO_CHICKEN_BITS_REG_BIT_DIS_L0S_EXIT_TIMER
);
993 /* disable L0s without affecting L1 :don't wait for ICH L0s bug W/A) */
994 iwl_set_bit(priv
, CSR_GIO_CHICKEN_BITS
,
995 CSR_GIO_CHICKEN_BITS_REG_BIT_L1A_NO_L0S_RX
);
997 /* set "initialization complete" bit to move adapter
998 * D0U* --> D0A* state */
999 iwl_set_bit(priv
, CSR_GP_CNTRL
, CSR_GP_CNTRL_REG_FLAG_INIT_DONE
);
1001 ret
= iwl_poll_direct_bit(priv
, CSR_GP_CNTRL
,
1002 CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY
, 25000);
1004 IWL_DEBUG_INFO(priv
, "Failed to init the card\n");
1009 iwl_write_prph(priv
, APMG_CLK_CTRL_REG
, APMG_CLK_VAL_DMA_CLK_RQT
|
1010 APMG_CLK_VAL_BSM_CLK_RQT
);
1014 /* disable L1-Active */
1015 iwl_set_bits_prph(priv
, APMG_PCIDEV_STT_REG
,
1016 APMG_PCIDEV_STT_VAL_L1_ACT_DIS
);
1022 static void iwl3945_nic_config(struct iwl_priv
*priv
)
1024 struct iwl3945_eeprom
*eeprom
= (struct iwl3945_eeprom
*)priv
->eeprom
;
1025 unsigned long flags
;
1028 spin_lock_irqsave(&priv
->lock
, flags
);
1030 /* Determine HW type */
1031 pci_read_config_byte(priv
->pci_dev
, PCI_REVISION_ID
, &rev_id
);
1033 IWL_DEBUG_INFO(priv
, "HW Revision ID = 0x%X\n", rev_id
);
1035 if (rev_id
& PCI_CFG_REV_ID_BIT_RTP
)
1036 IWL_DEBUG_INFO(priv
, "RTP type \n");
1037 else if (rev_id
& PCI_CFG_REV_ID_BIT_BASIC_SKU
) {
1038 IWL_DEBUG_INFO(priv
, "3945 RADIO-MB type\n");
1039 iwl_set_bit(priv
, CSR_HW_IF_CONFIG_REG
,
1040 CSR39_HW_IF_CONFIG_REG_BIT_3945_MB
);
1042 IWL_DEBUG_INFO(priv
, "3945 RADIO-MM type\n");
1043 iwl_set_bit(priv
, CSR_HW_IF_CONFIG_REG
,
1044 CSR39_HW_IF_CONFIG_REG_BIT_3945_MM
);
1047 if (EEPROM_SKU_CAP_OP_MODE_MRC
== eeprom
->sku_cap
) {
1048 IWL_DEBUG_INFO(priv
, "SKU OP mode is mrc\n");
1049 iwl_set_bit(priv
, CSR_HW_IF_CONFIG_REG
,
1050 CSR39_HW_IF_CONFIG_REG_BIT_SKU_MRC
);
1052 IWL_DEBUG_INFO(priv
, "SKU OP mode is basic\n");
1054 if ((eeprom
->board_revision
& 0xF0) == 0xD0) {
1055 IWL_DEBUG_INFO(priv
, "3945ABG revision is 0x%X\n",
1056 eeprom
->board_revision
);
1057 iwl_set_bit(priv
, CSR_HW_IF_CONFIG_REG
,
1058 CSR39_HW_IF_CONFIG_REG_BIT_BOARD_TYPE
);
1060 IWL_DEBUG_INFO(priv
, "3945ABG revision is 0x%X\n",
1061 eeprom
->board_revision
);
1062 iwl_clear_bit(priv
, CSR_HW_IF_CONFIG_REG
,
1063 CSR39_HW_IF_CONFIG_REG_BIT_BOARD_TYPE
);
1066 if (eeprom
->almgor_m_version
<= 1) {
1067 iwl_set_bit(priv
, CSR_HW_IF_CONFIG_REG
,
1068 CSR39_HW_IF_CONFIG_REG_BITS_SILICON_TYPE_A
);
1069 IWL_DEBUG_INFO(priv
, "Card M type A version is 0x%X\n",
1070 eeprom
->almgor_m_version
);
1072 IWL_DEBUG_INFO(priv
, "Card M type B version is 0x%X\n",
1073 eeprom
->almgor_m_version
);
1074 iwl_set_bit(priv
, CSR_HW_IF_CONFIG_REG
,
1075 CSR39_HW_IF_CONFIG_REG_BITS_SILICON_TYPE_B
);
1077 spin_unlock_irqrestore(&priv
->lock
, flags
);
1079 if (eeprom
->sku_cap
& EEPROM_SKU_CAP_SW_RF_KILL_ENABLE
)
1080 IWL_DEBUG_RF_KILL(priv
, "SW RF KILL supported in EEPROM.\n");
1082 if (eeprom
->sku_cap
& EEPROM_SKU_CAP_HW_RF_KILL_ENABLE
)
1083 IWL_DEBUG_RF_KILL(priv
, "HW RF KILL supported in EEPROM.\n");
1086 int iwl3945_hw_nic_init(struct iwl_priv
*priv
)
1089 unsigned long flags
;
1090 struct iwl_rx_queue
*rxq
= &priv
->rxq
;
1092 spin_lock_irqsave(&priv
->lock
, flags
);
1093 priv
->cfg
->ops
->lib
->apm_ops
.init(priv
);
1094 spin_unlock_irqrestore(&priv
->lock
, flags
);
1096 rc
= priv
->cfg
->ops
->lib
->apm_ops
.set_pwr_src(priv
, IWL_PWR_SRC_VMAIN
);
1100 priv
->cfg
->ops
->lib
->apm_ops
.config(priv
);
1102 /* Allocate the RX queue, or reset if it is already allocated */
1104 rc
= iwl_rx_queue_alloc(priv
);
1106 IWL_ERR(priv
, "Unable to initialize Rx queue\n");
1110 iwl3945_rx_queue_reset(priv
, rxq
);
1112 iwl3945_rx_replenish(priv
);
1114 iwl3945_rx_init(priv
, rxq
);
1117 /* Look at using this instead:
1118 rxq->need_update = 1;
1119 iwl_rx_queue_update_write_ptr(priv, rxq);
1122 iwl_write_direct32(priv
, FH39_RCSR_WPTR(0), rxq
->write
& ~7);
1124 rc
= iwl3945_txq_ctx_reset(priv
);
1128 set_bit(STATUS_INIT
, &priv
->status
);
1134 * iwl3945_hw_txq_ctx_free - Free TXQ Context
1136 * Destroy all TX DMA queues and structures
1138 void iwl3945_hw_txq_ctx_free(struct iwl_priv
*priv
)
1143 for (txq_id
= 0; txq_id
< priv
->hw_params
.max_txq_num
; txq_id
++)
1144 if (txq_id
== IWL_CMD_QUEUE_NUM
)
1145 iwl_cmd_queue_free(priv
);
1147 iwl_tx_queue_free(priv
, txq_id
);
1151 void iwl3945_hw_txq_ctx_stop(struct iwl_priv
*priv
)
1156 iwl_write_prph(priv
, ALM_SCD_MODE_REG
, 0);
1158 /* reset TFD queues */
1159 for (txq_id
= 0; txq_id
< priv
->hw_params
.max_txq_num
; txq_id
++) {
1160 iwl_write_direct32(priv
, FH39_TCSR_CONFIG(txq_id
), 0x0);
1161 iwl_poll_direct_bit(priv
, FH39_TSSR_TX_STATUS
,
1162 FH39_TSSR_TX_STATUS_REG_MSK_CHNL_IDLE(txq_id
),
1166 iwl3945_hw_txq_ctx_free(priv
);
1169 static int iwl3945_apm_stop_master(struct iwl_priv
*priv
)
1172 unsigned long flags
;
1174 spin_lock_irqsave(&priv
->lock
, flags
);
1176 /* set stop master bit */
1177 iwl_set_bit(priv
, CSR_RESET
, CSR_RESET_REG_FLAG_STOP_MASTER
);
1179 iwl_poll_direct_bit(priv
, CSR_RESET
,
1180 CSR_RESET_REG_FLAG_MASTER_DISABLED
, 100);
1186 spin_unlock_irqrestore(&priv
->lock
, flags
);
1187 IWL_DEBUG_INFO(priv
, "stop master\n");
1192 static void iwl3945_apm_stop(struct iwl_priv
*priv
)
1194 unsigned long flags
;
1196 iwl3945_apm_stop_master(priv
);
1198 spin_lock_irqsave(&priv
->lock
, flags
);
1200 iwl_set_bit(priv
, CSR_RESET
, CSR_RESET_REG_FLAG_SW_RESET
);
1203 /* clear "init complete" move adapter D0A* --> D0U state */
1204 iwl_clear_bit(priv
, CSR_GP_CNTRL
, CSR_GP_CNTRL_REG_FLAG_INIT_DONE
);
1205 spin_unlock_irqrestore(&priv
->lock
, flags
);
1208 static int iwl3945_apm_reset(struct iwl_priv
*priv
)
1210 iwl3945_apm_stop_master(priv
);
1213 iwl_set_bit(priv
, CSR_RESET
, CSR_RESET_REG_FLAG_SW_RESET
);
1216 iwl_set_bit(priv
, CSR_GP_CNTRL
, CSR_GP_CNTRL_REG_FLAG_INIT_DONE
);
1218 iwl_poll_direct_bit(priv
, CSR_GP_CNTRL
,
1219 CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY
, 25000);
1221 iwl_write_prph(priv
, APMG_CLK_CTRL_REG
,
1222 APMG_CLK_VAL_BSM_CLK_RQT
);
1224 iwl_write_prph(priv
, APMG_RTC_INT_MSK_REG
, 0x0);
1225 iwl_write_prph(priv
, APMG_RTC_INT_STT_REG
,
1229 iwl_write_prph(priv
, APMG_CLK_EN_REG
,
1230 APMG_CLK_VAL_DMA_CLK_RQT
|
1231 APMG_CLK_VAL_BSM_CLK_RQT
);
1234 iwl_set_bits_prph(priv
, APMG_PS_CTRL_REG
,
1235 APMG_PS_CTRL_VAL_RESET_REQ
);
1237 iwl_clear_bits_prph(priv
, APMG_PS_CTRL_REG
,
1238 APMG_PS_CTRL_VAL_RESET_REQ
);
1240 /* Clear the 'host command active' bit... */
1241 clear_bit(STATUS_HCMD_ACTIVE
, &priv
->status
);
1243 wake_up_interruptible(&priv
->wait_command_queue
);
1249 * iwl3945_hw_reg_adjust_power_by_temp
1250 * return index delta into power gain settings table
1252 static int iwl3945_hw_reg_adjust_power_by_temp(int new_reading
, int old_reading
)
1254 return (new_reading
- old_reading
) * (-11) / 100;
1258 * iwl3945_hw_reg_temp_out_of_range - Keep temperature in sane range
1260 static inline int iwl3945_hw_reg_temp_out_of_range(int temperature
)
1262 return ((temperature
< -260) || (temperature
> 25)) ? 1 : 0;
1265 int iwl3945_hw_get_temperature(struct iwl_priv
*priv
)
1267 return iwl_read32(priv
, CSR_UCODE_DRV_GP2
);
1271 * iwl3945_hw_reg_txpower_get_temperature
1272 * get the current temperature by reading from NIC
1274 static int iwl3945_hw_reg_txpower_get_temperature(struct iwl_priv
*priv
)
1276 struct iwl3945_eeprom
*eeprom
= (struct iwl3945_eeprom
*)priv
->eeprom
;
1279 temperature
= iwl3945_hw_get_temperature(priv
);
1281 /* driver's okay range is -260 to +25.
1282 * human readable okay range is 0 to +285 */
1283 IWL_DEBUG_INFO(priv
, "Temperature: %d\n", temperature
+ IWL_TEMP_CONVERT
);
1285 /* handle insane temp reading */
1286 if (iwl3945_hw_reg_temp_out_of_range(temperature
)) {
1287 IWL_ERR(priv
, "Error bad temperature value %d\n", temperature
);
1289 /* if really really hot(?),
1290 * substitute the 3rd band/group's temp measured at factory */
1291 if (priv
->last_temperature
> 100)
1292 temperature
= eeprom
->groups
[2].temperature
;
1293 else /* else use most recent "sane" value from driver */
1294 temperature
= priv
->last_temperature
;
1297 return temperature
; /* raw, not "human readable" */
1300 /* Adjust Txpower only if temperature variance is greater than threshold.
1302 * Both are lower than older versions' 9 degrees */
1303 #define IWL_TEMPERATURE_LIMIT_TIMER 6
1306 * is_temp_calib_needed - determines if new calibration is needed
1308 * records new temperature in tx_mgr->temperature.
1309 * replaces tx_mgr->last_temperature *only* if calib needed
1310 * (assumes caller will actually do the calibration!). */
1311 static int is_temp_calib_needed(struct iwl_priv
*priv
)
1315 priv
->temperature
= iwl3945_hw_reg_txpower_get_temperature(priv
);
1316 temp_diff
= priv
->temperature
- priv
->last_temperature
;
1318 /* get absolute value */
1319 if (temp_diff
< 0) {
1320 IWL_DEBUG_POWER(priv
, "Getting cooler, delta %d,\n", temp_diff
);
1321 temp_diff
= -temp_diff
;
1322 } else if (temp_diff
== 0)
1323 IWL_DEBUG_POWER(priv
, "Same temp,\n");
1325 IWL_DEBUG_POWER(priv
, "Getting warmer, delta %d,\n", temp_diff
);
1327 /* if we don't need calibration, *don't* update last_temperature */
1328 if (temp_diff
< IWL_TEMPERATURE_LIMIT_TIMER
) {
1329 IWL_DEBUG_POWER(priv
, "Timed thermal calib not needed\n");
1333 IWL_DEBUG_POWER(priv
, "Timed thermal calib needed\n");
1335 /* assume that caller will actually do calib ...
1336 * update the "last temperature" value */
1337 priv
->last_temperature
= priv
->temperature
;
1341 #define IWL_MAX_GAIN_ENTRIES 78
1342 #define IWL_CCK_FROM_OFDM_POWER_DIFF -5
1343 #define IWL_CCK_FROM_OFDM_INDEX_DIFF (10)
1345 /* radio and DSP power table, each step is 1/2 dB.
1346 * 1st number is for RF analog gain, 2nd number is for DSP pre-DAC gain. */
1347 static struct iwl3945_tx_power power_gain_table
[2][IWL_MAX_GAIN_ENTRIES
] = {
1349 {251, 127}, /* 2.4 GHz, highest power */
1426 {3, 95} }, /* 2.4 GHz, lowest power */
1428 {251, 127}, /* 5.x GHz, highest power */
1505 {3, 120} } /* 5.x GHz, lowest power */
1508 static inline u8
iwl3945_hw_reg_fix_power_index(int index
)
1512 if (index
>= IWL_MAX_GAIN_ENTRIES
)
1513 return IWL_MAX_GAIN_ENTRIES
- 1;
1517 /* Kick off thermal recalibration check every 60 seconds */
1518 #define REG_RECALIB_PERIOD (60)
1521 * iwl3945_hw_reg_set_scan_power - Set Tx power for scan probe requests
1523 * Set (in our channel info database) the direct scan Tx power for 1 Mbit (CCK)
1524 * or 6 Mbit (OFDM) rates.
1526 static void iwl3945_hw_reg_set_scan_power(struct iwl_priv
*priv
, u32 scan_tbl_index
,
1527 s32 rate_index
, const s8
*clip_pwrs
,
1528 struct iwl_channel_info
*ch_info
,
1531 struct iwl3945_scan_power_info
*scan_power_info
;
1535 scan_power_info
= &ch_info
->scan_pwr_info
[scan_tbl_index
];
1537 /* use this channel group's 6Mbit clipping/saturation pwr,
1538 * but cap at regulatory scan power restriction (set during init
1539 * based on eeprom channel data) for this channel. */
1540 power
= min(ch_info
->scan_power
, clip_pwrs
[IWL_RATE_6M_INDEX_TABLE
]);
1542 /* further limit to user's max power preference.
1543 * FIXME: Other spectrum management power limitations do not
1544 * seem to apply?? */
1545 power
= min(power
, priv
->tx_power_user_lmt
);
1546 scan_power_info
->requested_power
= power
;
1548 /* find difference between new scan *power* and current "normal"
1549 * Tx *power* for 6Mb. Use this difference (x2) to adjust the
1550 * current "normal" temperature-compensated Tx power *index* for
1551 * this rate (1Mb or 6Mb) to yield new temp-compensated scan power
1553 power_index
= ch_info
->power_info
[rate_index
].power_table_index
1554 - (power
- ch_info
->power_info
1555 [IWL_RATE_6M_INDEX_TABLE
].requested_power
) * 2;
1557 /* store reference index that we use when adjusting *all* scan
1558 * powers. So we can accommodate user (all channel) or spectrum
1559 * management (single channel) power changes "between" temperature
1560 * feedback compensation procedures.
1561 * don't force fit this reference index into gain table; it may be a
1562 * negative number. This will help avoid errors when we're at
1563 * the lower bounds (highest gains, for warmest temperatures)
1566 /* don't exceed table bounds for "real" setting */
1567 power_index
= iwl3945_hw_reg_fix_power_index(power_index
);
1569 scan_power_info
->power_table_index
= power_index
;
1570 scan_power_info
->tpc
.tx_gain
=
1571 power_gain_table
[band_index
][power_index
].tx_gain
;
1572 scan_power_info
->tpc
.dsp_atten
=
1573 power_gain_table
[band_index
][power_index
].dsp_atten
;
1577 * iwl3945_send_tx_power - fill in Tx Power command with gain settings
1579 * Configures power settings for all rates for the current channel,
1580 * using values from channel info struct, and send to NIC
1582 static int iwl3945_send_tx_power(struct iwl_priv
*priv
)
1585 const struct iwl_channel_info
*ch_info
= NULL
;
1586 struct iwl3945_txpowertable_cmd txpower
= {
1587 .channel
= priv
->active_rxon
.channel
,
1590 txpower
.band
= (priv
->band
== IEEE80211_BAND_5GHZ
) ? 0 : 1;
1591 ch_info
= iwl_get_channel_info(priv
,
1593 le16_to_cpu(priv
->active_rxon
.channel
));
1596 "Failed to get channel info for channel %d [%d]\n",
1597 le16_to_cpu(priv
->active_rxon
.channel
), priv
->band
);
1601 if (!is_channel_valid(ch_info
)) {
1602 IWL_DEBUG_POWER(priv
, "Not calling TX_PWR_TABLE_CMD on "
1603 "non-Tx channel.\n");
1607 /* fill cmd with power settings for all rates for current channel */
1608 /* Fill OFDM rate */
1609 for (rate_idx
= IWL_FIRST_OFDM_RATE
, i
= 0;
1610 rate_idx
<= IWL39_LAST_OFDM_RATE
; rate_idx
++, i
++) {
1612 txpower
.power
[i
].tpc
= ch_info
->power_info
[i
].tpc
;
1613 txpower
.power
[i
].rate
= iwl3945_rates
[rate_idx
].plcp
;
1615 IWL_DEBUG_POWER(priv
, "ch %d:%d rf %d dsp %3d rate code 0x%02x\n",
1616 le16_to_cpu(txpower
.channel
),
1618 txpower
.power
[i
].tpc
.tx_gain
,
1619 txpower
.power
[i
].tpc
.dsp_atten
,
1620 txpower
.power
[i
].rate
);
1622 /* Fill CCK rates */
1623 for (rate_idx
= IWL_FIRST_CCK_RATE
;
1624 rate_idx
<= IWL_LAST_CCK_RATE
; rate_idx
++, i
++) {
1625 txpower
.power
[i
].tpc
= ch_info
->power_info
[i
].tpc
;
1626 txpower
.power
[i
].rate
= iwl3945_rates
[rate_idx
].plcp
;
1628 IWL_DEBUG_POWER(priv
, "ch %d:%d rf %d dsp %3d rate code 0x%02x\n",
1629 le16_to_cpu(txpower
.channel
),
1631 txpower
.power
[i
].tpc
.tx_gain
,
1632 txpower
.power
[i
].tpc
.dsp_atten
,
1633 txpower
.power
[i
].rate
);
1636 return iwl_send_cmd_pdu(priv
, REPLY_TX_PWR_TABLE_CMD
,
1637 sizeof(struct iwl3945_txpowertable_cmd
),
1643 * iwl3945_hw_reg_set_new_power - Configures power tables at new levels
1644 * @ch_info: Channel to update. Uses power_info.requested_power.
1646 * Replace requested_power and base_power_index ch_info fields for
1649 * Called if user or spectrum management changes power preferences.
1650 * Takes into account h/w and modulation limitations (clip power).
1652 * This does *not* send anything to NIC, just sets up ch_info for one channel.
1654 * NOTE: reg_compensate_for_temperature_dif() *must* be run after this to
1655 * properly fill out the scan powers, and actual h/w gain settings,
1656 * and send changes to NIC
1658 static int iwl3945_hw_reg_set_new_power(struct iwl_priv
*priv
,
1659 struct iwl_channel_info
*ch_info
)
1661 struct iwl3945_channel_power_info
*power_info
;
1662 int power_changed
= 0;
1664 const s8
*clip_pwrs
;
1667 /* Get this chnlgrp's rate-to-max/clip-powers table */
1668 clip_pwrs
= priv
->clip39_groups
[ch_info
->group_index
].clip_powers
;
1670 /* Get this channel's rate-to-current-power settings table */
1671 power_info
= ch_info
->power_info
;
1673 /* update OFDM Txpower settings */
1674 for (i
= IWL_RATE_6M_INDEX_TABLE
; i
<= IWL_RATE_54M_INDEX_TABLE
;
1675 i
++, ++power_info
) {
1678 /* limit new power to be no more than h/w capability */
1679 power
= min(ch_info
->curr_txpow
, clip_pwrs
[i
]);
1680 if (power
== power_info
->requested_power
)
1683 /* find difference between old and new requested powers,
1684 * update base (non-temp-compensated) power index */
1685 delta_idx
= (power
- power_info
->requested_power
) * 2;
1686 power_info
->base_power_index
-= delta_idx
;
1688 /* save new requested power value */
1689 power_info
->requested_power
= power
;
1694 /* update CCK Txpower settings, based on OFDM 12M setting ...
1695 * ... all CCK power settings for a given channel are the *same*. */
1696 if (power_changed
) {
1698 ch_info
->power_info
[IWL_RATE_12M_INDEX_TABLE
].
1699 requested_power
+ IWL_CCK_FROM_OFDM_POWER_DIFF
;
1701 /* do all CCK rates' iwl3945_channel_power_info structures */
1702 for (i
= IWL_RATE_1M_INDEX_TABLE
; i
<= IWL_RATE_11M_INDEX_TABLE
; i
++) {
1703 power_info
->requested_power
= power
;
1704 power_info
->base_power_index
=
1705 ch_info
->power_info
[IWL_RATE_12M_INDEX_TABLE
].
1706 base_power_index
+ IWL_CCK_FROM_OFDM_INDEX_DIFF
;
1715 * iwl3945_hw_reg_get_ch_txpower_limit - returns new power limit for channel
1717 * NOTE: Returned power limit may be less (but not more) than requested,
1718 * based strictly on regulatory (eeprom and spectrum mgt) limitations
1719 * (no consideration for h/w clipping limitations).
1721 static int iwl3945_hw_reg_get_ch_txpower_limit(struct iwl_channel_info
*ch_info
)
1726 /* if we're using TGd limits, use lower of TGd or EEPROM */
1727 if (ch_info
->tgd_data
.max_power
!= 0)
1728 max_power
= min(ch_info
->tgd_data
.max_power
,
1729 ch_info
->eeprom
.max_power_avg
);
1731 /* else just use EEPROM limits */
1734 max_power
= ch_info
->eeprom
.max_power_avg
;
1736 return min(max_power
, ch_info
->max_power_avg
);
1740 * iwl3945_hw_reg_comp_txpower_temp - Compensate for temperature
1742 * Compensate txpower settings of *all* channels for temperature.
1743 * This only accounts for the difference between current temperature
1744 * and the factory calibration temperatures, and bases the new settings
1745 * on the channel's base_power_index.
1747 * If RxOn is "associated", this sends the new Txpower to NIC!
1749 static int iwl3945_hw_reg_comp_txpower_temp(struct iwl_priv
*priv
)
1751 struct iwl_channel_info
*ch_info
= NULL
;
1752 struct iwl3945_eeprom
*eeprom
= (struct iwl3945_eeprom
*)priv
->eeprom
;
1754 const s8
*clip_pwrs
; /* array of h/w max power levels for each rate */
1760 int temperature
= priv
->temperature
;
1762 /* set up new Tx power info for each and every channel, 2.4 and 5.x */
1763 for (i
= 0; i
< priv
->channel_count
; i
++) {
1764 ch_info
= &priv
->channel_info
[i
];
1765 a_band
= is_channel_a_band(ch_info
);
1767 /* Get this chnlgrp's factory calibration temperature */
1768 ref_temp
= (s16
)eeprom
->groups
[ch_info
->group_index
].
1771 /* get power index adjustment based on current and factory
1773 delta_index
= iwl3945_hw_reg_adjust_power_by_temp(temperature
,
1776 /* set tx power value for all rates, OFDM and CCK */
1777 for (rate_index
= 0; rate_index
< IWL_RATE_COUNT
;
1780 ch_info
->power_info
[rate_index
].base_power_index
;
1782 /* temperature compensate */
1783 power_idx
+= delta_index
;
1785 /* stay within table range */
1786 power_idx
= iwl3945_hw_reg_fix_power_index(power_idx
);
1787 ch_info
->power_info
[rate_index
].
1788 power_table_index
= (u8
) power_idx
;
1789 ch_info
->power_info
[rate_index
].tpc
=
1790 power_gain_table
[a_band
][power_idx
];
1793 /* Get this chnlgrp's rate-to-max/clip-powers table */
1794 clip_pwrs
= priv
->clip39_groups
[ch_info
->group_index
].clip_powers
;
1796 /* set scan tx power, 1Mbit for CCK, 6Mbit for OFDM */
1797 for (scan_tbl_index
= 0;
1798 scan_tbl_index
< IWL_NUM_SCAN_RATES
; scan_tbl_index
++) {
1799 s32 actual_index
= (scan_tbl_index
== 0) ?
1800 IWL_RATE_1M_INDEX_TABLE
: IWL_RATE_6M_INDEX_TABLE
;
1801 iwl3945_hw_reg_set_scan_power(priv
, scan_tbl_index
,
1802 actual_index
, clip_pwrs
,
1807 /* send Txpower command for current channel to ucode */
1808 return priv
->cfg
->ops
->lib
->send_tx_power(priv
);
1811 int iwl3945_hw_reg_set_txpower(struct iwl_priv
*priv
, s8 power
)
1813 struct iwl_channel_info
*ch_info
;
1818 if (priv
->tx_power_user_lmt
== power
) {
1819 IWL_DEBUG_POWER(priv
, "Requested Tx power same as current "
1820 "limit: %ddBm.\n", power
);
1824 IWL_DEBUG_POWER(priv
, "Setting upper limit clamp to %ddBm.\n", power
);
1825 priv
->tx_power_user_lmt
= power
;
1827 /* set up new Tx powers for each and every channel, 2.4 and 5.x */
1829 for (i
= 0; i
< priv
->channel_count
; i
++) {
1830 ch_info
= &priv
->channel_info
[i
];
1831 a_band
= is_channel_a_band(ch_info
);
1833 /* find minimum power of all user and regulatory constraints
1834 * (does not consider h/w clipping limitations) */
1835 max_power
= iwl3945_hw_reg_get_ch_txpower_limit(ch_info
);
1836 max_power
= min(power
, max_power
);
1837 if (max_power
!= ch_info
->curr_txpow
) {
1838 ch_info
->curr_txpow
= max_power
;
1840 /* this considers the h/w clipping limitations */
1841 iwl3945_hw_reg_set_new_power(priv
, ch_info
);
1845 /* update txpower settings for all channels,
1846 * send to NIC if associated. */
1847 is_temp_calib_needed(priv
);
1848 iwl3945_hw_reg_comp_txpower_temp(priv
);
1853 static int iwl3945_send_rxon_assoc(struct iwl_priv
*priv
)
1856 struct iwl_rx_packet
*res
= NULL
;
1857 struct iwl3945_rxon_assoc_cmd rxon_assoc
;
1858 struct iwl_host_cmd cmd
= {
1859 .id
= REPLY_RXON_ASSOC
,
1860 .len
= sizeof(rxon_assoc
),
1861 .meta
.flags
= CMD_WANT_SKB
,
1862 .data
= &rxon_assoc
,
1864 const struct iwl_rxon_cmd
*rxon1
= &priv
->staging_rxon
;
1865 const struct iwl_rxon_cmd
*rxon2
= &priv
->active_rxon
;
1867 if ((rxon1
->flags
== rxon2
->flags
) &&
1868 (rxon1
->filter_flags
== rxon2
->filter_flags
) &&
1869 (rxon1
->cck_basic_rates
== rxon2
->cck_basic_rates
) &&
1870 (rxon1
->ofdm_basic_rates
== rxon2
->ofdm_basic_rates
)) {
1871 IWL_DEBUG_INFO(priv
, "Using current RXON_ASSOC. Not resending.\n");
1875 rxon_assoc
.flags
= priv
->staging_rxon
.flags
;
1876 rxon_assoc
.filter_flags
= priv
->staging_rxon
.filter_flags
;
1877 rxon_assoc
.ofdm_basic_rates
= priv
->staging_rxon
.ofdm_basic_rates
;
1878 rxon_assoc
.cck_basic_rates
= priv
->staging_rxon
.cck_basic_rates
;
1879 rxon_assoc
.reserved
= 0;
1881 rc
= iwl_send_cmd_sync(priv
, &cmd
);
1885 res
= (struct iwl_rx_packet
*)cmd
.meta
.u
.skb
->data
;
1886 if (res
->hdr
.flags
& IWL_CMD_FAILED_MSK
) {
1887 IWL_ERR(priv
, "Bad return from REPLY_RXON_ASSOC command\n");
1891 priv
->alloc_rxb_skb
--;
1892 dev_kfree_skb_any(cmd
.meta
.u
.skb
);
1898 * iwl3945_commit_rxon - commit staging_rxon to hardware
1900 * The RXON command in staging_rxon is committed to the hardware and
1901 * the active_rxon structure is updated with the new data. This
1902 * function correctly transitions out of the RXON_ASSOC_MSK state if
1903 * a HW tune is required based on the RXON structure changes.
1905 static int iwl3945_commit_rxon(struct iwl_priv
*priv
)
1907 /* cast away the const for active_rxon in this function */
1908 struct iwl3945_rxon_cmd
*active_rxon
= (void *)&priv
->active_rxon
;
1909 struct iwl3945_rxon_cmd
*staging_rxon
= (void *)&priv
->staging_rxon
;
1912 !!(priv
->staging_rxon
.filter_flags
& RXON_FILTER_ASSOC_MSK
);
1914 if (!iwl_is_alive(priv
))
1917 /* always get timestamp with Rx frame */
1918 staging_rxon
->flags
|= RXON_FLG_TSF2HOST_MSK
;
1920 /* select antenna */
1921 staging_rxon
->flags
&=
1922 ~(RXON_FLG_DIS_DIV_MSK
| RXON_FLG_ANT_SEL_MSK
);
1923 staging_rxon
->flags
|= iwl3945_get_antenna_flags(priv
);
1925 rc
= iwl_check_rxon_cmd(priv
);
1927 IWL_ERR(priv
, "Invalid RXON configuration. Not committing.\n");
1931 /* If we don't need to send a full RXON, we can use
1932 * iwl3945_rxon_assoc_cmd which is used to reconfigure filter
1933 * and other flags for the current radio configuration. */
1934 if (!iwl_full_rxon_required(priv
)) {
1935 rc
= iwl_send_rxon_assoc(priv
);
1937 IWL_ERR(priv
, "Error setting RXON_ASSOC "
1938 "configuration (%d).\n", rc
);
1942 memcpy(active_rxon
, staging_rxon
, sizeof(*active_rxon
));
1947 /* If we are currently associated and the new config requires
1948 * an RXON_ASSOC and the new config wants the associated mask enabled,
1949 * we must clear the associated from the active configuration
1950 * before we apply the new config */
1951 if (iwl_is_associated(priv
) && new_assoc
) {
1952 IWL_DEBUG_INFO(priv
, "Toggling associated bit on current RXON\n");
1953 active_rxon
->filter_flags
&= ~RXON_FILTER_ASSOC_MSK
;
1956 * reserved4 and 5 could have been filled by the iwlcore code.
1957 * Let's clear them before pushing to the 3945.
1959 active_rxon
->reserved4
= 0;
1960 active_rxon
->reserved5
= 0;
1961 rc
= iwl_send_cmd_pdu(priv
, REPLY_RXON
,
1962 sizeof(struct iwl3945_rxon_cmd
),
1963 &priv
->active_rxon
);
1965 /* If the mask clearing failed then we set
1966 * active_rxon back to what it was previously */
1968 active_rxon
->filter_flags
|= RXON_FILTER_ASSOC_MSK
;
1969 IWL_ERR(priv
, "Error clearing ASSOC_MSK on current "
1970 "configuration (%d).\n", rc
);
1975 IWL_DEBUG_INFO(priv
, "Sending RXON\n"
1976 "* with%s RXON_FILTER_ASSOC_MSK\n"
1979 (new_assoc
? "" : "out"),
1980 le16_to_cpu(staging_rxon
->channel
),
1981 staging_rxon
->bssid_addr
);
1984 * reserved4 and 5 could have been filled by the iwlcore code.
1985 * Let's clear them before pushing to the 3945.
1987 staging_rxon
->reserved4
= 0;
1988 staging_rxon
->reserved5
= 0;
1990 iwl_set_rxon_hwcrypto(priv
, !iwl3945_mod_params
.sw_crypto
);
1992 /* Apply the new configuration */
1993 rc
= iwl_send_cmd_pdu(priv
, REPLY_RXON
,
1994 sizeof(struct iwl3945_rxon_cmd
),
1997 IWL_ERR(priv
, "Error setting new configuration (%d).\n", rc
);
2001 memcpy(active_rxon
, staging_rxon
, sizeof(*active_rxon
));
2003 iwl_clear_stations_table(priv
);
2005 /* If we issue a new RXON command which required a tune then we must
2006 * send a new TXPOWER command or we won't be able to Tx any frames */
2007 rc
= priv
->cfg
->ops
->lib
->send_tx_power(priv
);
2009 IWL_ERR(priv
, "Error setting Tx power (%d).\n", rc
);
2013 /* Add the broadcast address so we can send broadcast frames */
2014 if (iwl_add_station(priv
, iwl_bcast_addr
, false, CMD_SYNC
, NULL
) ==
2015 IWL_INVALID_STATION
) {
2016 IWL_ERR(priv
, "Error adding BROADCAST address for transmit.\n");
2020 /* If we have set the ASSOC_MSK and we are in BSS mode then
2021 * add the IWL_AP_ID to the station rate table */
2022 if (iwl_is_associated(priv
) &&
2023 (priv
->iw_mode
== NL80211_IFTYPE_STATION
))
2024 if (iwl_add_station(priv
, priv
->active_rxon
.bssid_addr
,
2025 true, CMD_SYNC
, NULL
) == IWL_INVALID_STATION
) {
2026 IWL_ERR(priv
, "Error adding AP address for transmit\n");
2030 /* Init the hardware's rate fallback order based on the band */
2031 rc
= iwl3945_init_hw_rate_table(priv
);
2033 IWL_ERR(priv
, "Error setting HW rate table: %02X\n", rc
);
2040 /* will add 3945 channel switch cmd handling later */
2041 int iwl3945_hw_channel_switch(struct iwl_priv
*priv
, u16 channel
)
2047 * iwl3945_reg_txpower_periodic - called when time to check our temperature.
2049 * -- reset periodic timer
2050 * -- see if temp has changed enough to warrant re-calibration ... if so:
2051 * -- correct coeffs for temp (can reset temp timer)
2052 * -- save this temp as "last",
2053 * -- send new set of gain settings to NIC
2054 * NOTE: This should continue working, even when we're not associated,
2055 * so we can keep our internal table of scan powers current. */
2056 void iwl3945_reg_txpower_periodic(struct iwl_priv
*priv
)
2058 /* This will kick in the "brute force"
2059 * iwl3945_hw_reg_comp_txpower_temp() below */
2060 if (!is_temp_calib_needed(priv
))
2063 /* Set up a new set of temp-adjusted TxPowers, send to NIC.
2064 * This is based *only* on current temperature,
2065 * ignoring any previous power measurements */
2066 iwl3945_hw_reg_comp_txpower_temp(priv
);
2069 queue_delayed_work(priv
->workqueue
,
2070 &priv
->thermal_periodic
, REG_RECALIB_PERIOD
* HZ
);
2073 static void iwl3945_bg_reg_txpower_periodic(struct work_struct
*work
)
2075 struct iwl_priv
*priv
= container_of(work
, struct iwl_priv
,
2076 thermal_periodic
.work
);
2078 if (test_bit(STATUS_EXIT_PENDING
, &priv
->status
))
2081 mutex_lock(&priv
->mutex
);
2082 iwl3945_reg_txpower_periodic(priv
);
2083 mutex_unlock(&priv
->mutex
);
2087 * iwl3945_hw_reg_get_ch_grp_index - find the channel-group index (0-4)
2090 * This function is used when initializing channel-info structs.
2092 * NOTE: These channel groups do *NOT* match the bands above!
2093 * These channel groups are based on factory-tested channels;
2094 * on A-band, EEPROM's "group frequency" entries represent the top
2095 * channel in each group 1-4. Group 5 All B/G channels are in group 0.
2097 static u16
iwl3945_hw_reg_get_ch_grp_index(struct iwl_priv
*priv
,
2098 const struct iwl_channel_info
*ch_info
)
2100 struct iwl3945_eeprom
*eeprom
= (struct iwl3945_eeprom
*)priv
->eeprom
;
2101 struct iwl3945_eeprom_txpower_group
*ch_grp
= &eeprom
->groups
[0];
2103 u16 group_index
= 0; /* based on factory calib frequencies */
2106 /* Find the group index for the channel ... don't use index 1(?) */
2107 if (is_channel_a_band(ch_info
)) {
2108 for (group
= 1; group
< 5; group
++) {
2109 grp_channel
= ch_grp
[group
].group_channel
;
2110 if (ch_info
->channel
<= grp_channel
) {
2111 group_index
= group
;
2115 /* group 4 has a few channels *above* its factory cal freq */
2119 group_index
= 0; /* 2.4 GHz, group 0 */
2121 IWL_DEBUG_POWER(priv
, "Chnl %d mapped to grp %d\n", ch_info
->channel
,
2127 * iwl3945_hw_reg_get_matched_power_index - Interpolate to get nominal index
2129 * Interpolate to get nominal (i.e. at factory calibration temperature) index
2130 * into radio/DSP gain settings table for requested power.
2132 static int iwl3945_hw_reg_get_matched_power_index(struct iwl_priv
*priv
,
2134 s32 setting_index
, s32
*new_index
)
2136 const struct iwl3945_eeprom_txpower_group
*chnl_grp
= NULL
;
2137 struct iwl3945_eeprom
*eeprom
= (struct iwl3945_eeprom
*)priv
->eeprom
;
2139 s32 power
= 2 * requested_power
;
2141 const struct iwl3945_eeprom_txpower_sample
*samples
;
2146 chnl_grp
= &eeprom
->groups
[setting_index
];
2147 samples
= chnl_grp
->samples
;
2148 for (i
= 0; i
< 5; i
++) {
2149 if (power
== samples
[i
].power
) {
2150 *new_index
= samples
[i
].gain_index
;
2155 if (power
> samples
[1].power
) {
2158 } else if (power
> samples
[2].power
) {
2161 } else if (power
> samples
[3].power
) {
2169 denominator
= (s32
) samples
[index1
].power
- (s32
) samples
[index0
].power
;
2170 if (denominator
== 0)
2172 gains0
= (s32
) samples
[index0
].gain_index
* (1 << 19);
2173 gains1
= (s32
) samples
[index1
].gain_index
* (1 << 19);
2174 res
= gains0
+ (gains1
- gains0
) *
2175 ((s32
) power
- (s32
) samples
[index0
].power
) / denominator
+
2177 *new_index
= res
>> 19;
2181 static void iwl3945_hw_reg_init_channel_groups(struct iwl_priv
*priv
)
2185 struct iwl3945_eeprom
*eeprom
= (struct iwl3945_eeprom
*)priv
->eeprom
;
2186 const struct iwl3945_eeprom_txpower_group
*group
;
2188 IWL_DEBUG_POWER(priv
, "Initializing factory calib info from EEPROM\n");
2190 for (i
= 0; i
< IWL_NUM_TX_CALIB_GROUPS
; i
++) {
2191 s8
*clip_pwrs
; /* table of power levels for each rate */
2192 s8 satur_pwr
; /* saturation power for each chnl group */
2193 group
= &eeprom
->groups
[i
];
2195 /* sanity check on factory saturation power value */
2196 if (group
->saturation_power
< 40) {
2197 IWL_WARN(priv
, "Error: saturation power is %d, "
2198 "less than minimum expected 40\n",
2199 group
->saturation_power
);
2204 * Derive requested power levels for each rate, based on
2205 * hardware capabilities (saturation power for band).
2206 * Basic value is 3dB down from saturation, with further
2207 * power reductions for highest 3 data rates. These
2208 * backoffs provide headroom for high rate modulation
2209 * power peaks, without too much distortion (clipping).
2211 /* we'll fill in this array with h/w max power levels */
2212 clip_pwrs
= (s8
*) priv
->clip39_groups
[i
].clip_powers
;
2214 /* divide factory saturation power by 2 to find -3dB level */
2215 satur_pwr
= (s8
) (group
->saturation_power
>> 1);
2217 /* fill in channel group's nominal powers for each rate */
2218 for (rate_index
= 0;
2219 rate_index
< IWL_RATE_COUNT
; rate_index
++, clip_pwrs
++) {
2220 switch (rate_index
) {
2221 case IWL_RATE_36M_INDEX_TABLE
:
2222 if (i
== 0) /* B/G */
2223 *clip_pwrs
= satur_pwr
;
2225 *clip_pwrs
= satur_pwr
- 5;
2227 case IWL_RATE_48M_INDEX_TABLE
:
2229 *clip_pwrs
= satur_pwr
- 7;
2231 *clip_pwrs
= satur_pwr
- 10;
2233 case IWL_RATE_54M_INDEX_TABLE
:
2235 *clip_pwrs
= satur_pwr
- 9;
2237 *clip_pwrs
= satur_pwr
- 12;
2240 *clip_pwrs
= satur_pwr
;
2248 * iwl3945_txpower_set_from_eeprom - Set channel power info based on EEPROM
2250 * Second pass (during init) to set up priv->channel_info
2252 * Set up Tx-power settings in our channel info database for each VALID
2253 * (for this geo/SKU) channel, at all Tx data rates, based on eeprom values
2254 * and current temperature.
2256 * Since this is based on current temperature (at init time), these values may
2257 * not be valid for very long, but it gives us a starting/default point,
2258 * and allows us to active (i.e. using Tx) scan.
2260 * This does *not* write values to NIC, just sets up our internal table.
2262 int iwl3945_txpower_set_from_eeprom(struct iwl_priv
*priv
)
2264 struct iwl_channel_info
*ch_info
= NULL
;
2265 struct iwl3945_channel_power_info
*pwr_info
;
2266 struct iwl3945_eeprom
*eeprom
= (struct iwl3945_eeprom
*)priv
->eeprom
;
2270 const s8
*clip_pwrs
; /* array of power levels for each rate */
2273 u8 pwr_index
, base_pwr_index
, a_band
;
2277 /* save temperature reference,
2278 * so we can determine next time to calibrate */
2279 temperature
= iwl3945_hw_reg_txpower_get_temperature(priv
);
2280 priv
->last_temperature
= temperature
;
2282 iwl3945_hw_reg_init_channel_groups(priv
);
2284 /* initialize Tx power info for each and every channel, 2.4 and 5.x */
2285 for (i
= 0, ch_info
= priv
->channel_info
; i
< priv
->channel_count
;
2287 a_band
= is_channel_a_band(ch_info
);
2288 if (!is_channel_valid(ch_info
))
2291 /* find this channel's channel group (*not* "band") index */
2292 ch_info
->group_index
=
2293 iwl3945_hw_reg_get_ch_grp_index(priv
, ch_info
);
2295 /* Get this chnlgrp's rate->max/clip-powers table */
2296 clip_pwrs
= priv
->clip39_groups
[ch_info
->group_index
].clip_powers
;
2298 /* calculate power index *adjustment* value according to
2299 * diff between current temperature and factory temperature */
2300 delta_index
= iwl3945_hw_reg_adjust_power_by_temp(temperature
,
2301 eeprom
->groups
[ch_info
->group_index
].
2304 IWL_DEBUG_POWER(priv
, "Delta index for channel %d: %d [%d]\n",
2305 ch_info
->channel
, delta_index
, temperature
+
2308 /* set tx power value for all OFDM rates */
2309 for (rate_index
= 0; rate_index
< IWL_OFDM_RATES
;
2311 s32
uninitialized_var(power_idx
);
2314 /* use channel group's clip-power table,
2315 * but don't exceed channel's max power */
2316 s8 pwr
= min(ch_info
->max_power_avg
,
2317 clip_pwrs
[rate_index
]);
2319 pwr_info
= &ch_info
->power_info
[rate_index
];
2321 /* get base (i.e. at factory-measured temperature)
2322 * power table index for this rate's power */
2323 rc
= iwl3945_hw_reg_get_matched_power_index(priv
, pwr
,
2324 ch_info
->group_index
,
2327 IWL_ERR(priv
, "Invalid power index\n");
2330 pwr_info
->base_power_index
= (u8
) power_idx
;
2332 /* temperature compensate */
2333 power_idx
+= delta_index
;
2335 /* stay within range of gain table */
2336 power_idx
= iwl3945_hw_reg_fix_power_index(power_idx
);
2338 /* fill 1 OFDM rate's iwl3945_channel_power_info struct */
2339 pwr_info
->requested_power
= pwr
;
2340 pwr_info
->power_table_index
= (u8
) power_idx
;
2341 pwr_info
->tpc
.tx_gain
=
2342 power_gain_table
[a_band
][power_idx
].tx_gain
;
2343 pwr_info
->tpc
.dsp_atten
=
2344 power_gain_table
[a_band
][power_idx
].dsp_atten
;
2347 /* set tx power for CCK rates, based on OFDM 12 Mbit settings*/
2348 pwr_info
= &ch_info
->power_info
[IWL_RATE_12M_INDEX_TABLE
];
2349 power
= pwr_info
->requested_power
+
2350 IWL_CCK_FROM_OFDM_POWER_DIFF
;
2351 pwr_index
= pwr_info
->power_table_index
+
2352 IWL_CCK_FROM_OFDM_INDEX_DIFF
;
2353 base_pwr_index
= pwr_info
->base_power_index
+
2354 IWL_CCK_FROM_OFDM_INDEX_DIFF
;
2356 /* stay within table range */
2357 pwr_index
= iwl3945_hw_reg_fix_power_index(pwr_index
);
2358 gain
= power_gain_table
[a_band
][pwr_index
].tx_gain
;
2359 dsp_atten
= power_gain_table
[a_band
][pwr_index
].dsp_atten
;
2361 /* fill each CCK rate's iwl3945_channel_power_info structure
2362 * NOTE: All CCK-rate Txpwrs are the same for a given chnl!
2363 * NOTE: CCK rates start at end of OFDM rates! */
2364 for (rate_index
= 0;
2365 rate_index
< IWL_CCK_RATES
; rate_index
++) {
2366 pwr_info
= &ch_info
->power_info
[rate_index
+IWL_OFDM_RATES
];
2367 pwr_info
->requested_power
= power
;
2368 pwr_info
->power_table_index
= pwr_index
;
2369 pwr_info
->base_power_index
= base_pwr_index
;
2370 pwr_info
->tpc
.tx_gain
= gain
;
2371 pwr_info
->tpc
.dsp_atten
= dsp_atten
;
2374 /* set scan tx power, 1Mbit for CCK, 6Mbit for OFDM */
2375 for (scan_tbl_index
= 0;
2376 scan_tbl_index
< IWL_NUM_SCAN_RATES
; scan_tbl_index
++) {
2377 s32 actual_index
= (scan_tbl_index
== 0) ?
2378 IWL_RATE_1M_INDEX_TABLE
: IWL_RATE_6M_INDEX_TABLE
;
2379 iwl3945_hw_reg_set_scan_power(priv
, scan_tbl_index
,
2380 actual_index
, clip_pwrs
, ch_info
, a_band
);
2387 int iwl3945_hw_rxq_stop(struct iwl_priv
*priv
)
2391 iwl_write_direct32(priv
, FH39_RCSR_CONFIG(0), 0);
2392 rc
= iwl_poll_direct_bit(priv
, FH39_RSSR_STATUS
,
2393 FH39_RSSR_CHNL0_RX_STATUS_CHNL_IDLE
, 1000);
2395 IWL_ERR(priv
, "Can't stop Rx DMA.\n");
2400 int iwl3945_hw_tx_queue_init(struct iwl_priv
*priv
, struct iwl_tx_queue
*txq
)
2402 int txq_id
= txq
->q
.id
;
2404 struct iwl3945_shared
*shared_data
= priv
->shared_virt
;
2406 shared_data
->tx_base_ptr
[txq_id
] = cpu_to_le32((u32
)txq
->q
.dma_addr
);
2408 iwl_write_direct32(priv
, FH39_CBCC_CTRL(txq_id
), 0);
2409 iwl_write_direct32(priv
, FH39_CBCC_BASE(txq_id
), 0);
2411 iwl_write_direct32(priv
, FH39_TCSR_CONFIG(txq_id
),
2412 FH39_TCSR_TX_CONFIG_REG_VAL_CIRQ_RTC_NOINT
|
2413 FH39_TCSR_TX_CONFIG_REG_VAL_MSG_MODE_TXF
|
2414 FH39_TCSR_TX_CONFIG_REG_VAL_CIRQ_HOST_IFTFD
|
2415 FH39_TCSR_TX_CONFIG_REG_VAL_DMA_CREDIT_ENABLE_VAL
|
2416 FH39_TCSR_TX_CONFIG_REG_VAL_DMA_CHNL_ENABLE
);
2418 /* fake read to flush all prev. writes */
2419 iwl_read32(priv
, FH39_TSSR_CBB_BASE
);
2427 static u16
iwl3945_get_hcmd_size(u8 cmd_id
, u16 len
)
2431 return sizeof(struct iwl3945_rxon_cmd
);
2432 case POWER_TABLE_CMD
:
2433 return sizeof(struct iwl3945_powertable_cmd
);
2440 static u16
iwl3945_build_addsta_hcmd(const struct iwl_addsta_cmd
*cmd
, u8
*data
)
2442 struct iwl3945_addsta_cmd
*addsta
= (struct iwl3945_addsta_cmd
*)data
;
2443 addsta
->mode
= cmd
->mode
;
2444 memcpy(&addsta
->sta
, &cmd
->sta
, sizeof(struct sta_id_modify
));
2445 memcpy(&addsta
->key
, &cmd
->key
, sizeof(struct iwl4965_keyinfo
));
2446 addsta
->station_flags
= cmd
->station_flags
;
2447 addsta
->station_flags_msk
= cmd
->station_flags_msk
;
2448 addsta
->tid_disable_tx
= cpu_to_le16(0);
2449 addsta
->rate_n_flags
= cmd
->rate_n_flags
;
2450 addsta
->add_immediate_ba_tid
= cmd
->add_immediate_ba_tid
;
2451 addsta
->remove_immediate_ba_tid
= cmd
->remove_immediate_ba_tid
;
2452 addsta
->add_immediate_ba_ssn
= cmd
->add_immediate_ba_ssn
;
2454 return (u16
)sizeof(struct iwl3945_addsta_cmd
);
2459 * iwl3945_init_hw_rate_table - Initialize the hardware rate fallback table
2461 int iwl3945_init_hw_rate_table(struct iwl_priv
*priv
)
2463 int rc
, i
, index
, prev_index
;
2464 struct iwl3945_rate_scaling_cmd rate_cmd
= {
2465 .reserved
= {0, 0, 0},
2467 struct iwl3945_rate_scaling_info
*table
= rate_cmd
.table
;
2469 for (i
= 0; i
< ARRAY_SIZE(iwl3945_rates
); i
++) {
2470 index
= iwl3945_rates
[i
].table_rs_index
;
2472 table
[index
].rate_n_flags
=
2473 iwl3945_hw_set_rate_n_flags(iwl3945_rates
[i
].plcp
, 0);
2474 table
[index
].try_cnt
= priv
->retry_rate
;
2475 prev_index
= iwl3945_get_prev_ieee_rate(i
);
2476 table
[index
].next_rate_index
=
2477 iwl3945_rates
[prev_index
].table_rs_index
;
2480 switch (priv
->band
) {
2481 case IEEE80211_BAND_5GHZ
:
2482 IWL_DEBUG_RATE(priv
, "Select A mode rate scale\n");
2483 /* If one of the following CCK rates is used,
2484 * have it fall back to the 6M OFDM rate */
2485 for (i
= IWL_RATE_1M_INDEX_TABLE
;
2486 i
<= IWL_RATE_11M_INDEX_TABLE
; i
++)
2487 table
[i
].next_rate_index
=
2488 iwl3945_rates
[IWL_FIRST_OFDM_RATE
].table_rs_index
;
2490 /* Don't fall back to CCK rates */
2491 table
[IWL_RATE_12M_INDEX_TABLE
].next_rate_index
=
2492 IWL_RATE_9M_INDEX_TABLE
;
2494 /* Don't drop out of OFDM rates */
2495 table
[IWL_RATE_6M_INDEX_TABLE
].next_rate_index
=
2496 iwl3945_rates
[IWL_FIRST_OFDM_RATE
].table_rs_index
;
2499 case IEEE80211_BAND_2GHZ
:
2500 IWL_DEBUG_RATE(priv
, "Select B/G mode rate scale\n");
2501 /* If an OFDM rate is used, have it fall back to the
2504 if (!(priv
->sta_supp_rates
& IWL_OFDM_RATES_MASK
) &&
2505 iwl_is_associated(priv
)) {
2507 index
= IWL_FIRST_CCK_RATE
;
2508 for (i
= IWL_RATE_6M_INDEX_TABLE
;
2509 i
<= IWL_RATE_54M_INDEX_TABLE
; i
++)
2510 table
[i
].next_rate_index
=
2511 iwl3945_rates
[index
].table_rs_index
;
2513 index
= IWL_RATE_11M_INDEX_TABLE
;
2514 /* CCK shouldn't fall back to OFDM... */
2515 table
[index
].next_rate_index
= IWL_RATE_5M_INDEX_TABLE
;
2524 /* Update the rate scaling for control frame Tx */
2525 rate_cmd
.table_id
= 0;
2526 rc
= iwl_send_cmd_pdu(priv
, REPLY_RATE_SCALE
, sizeof(rate_cmd
),
2531 /* Update the rate scaling for data frame Tx */
2532 rate_cmd
.table_id
= 1;
2533 return iwl_send_cmd_pdu(priv
, REPLY_RATE_SCALE
, sizeof(rate_cmd
),
2537 /* Called when initializing driver */
2538 int iwl3945_hw_set_hw_params(struct iwl_priv
*priv
)
2540 memset((void *)&priv
->hw_params
, 0,
2541 sizeof(struct iwl_hw_params
));
2544 pci_alloc_consistent(priv
->pci_dev
,
2545 sizeof(struct iwl3945_shared
),
2546 &priv
->shared_phys
);
2548 if (!priv
->shared_virt
) {
2549 IWL_ERR(priv
, "failed to allocate pci memory\n");
2550 mutex_unlock(&priv
->mutex
);
2554 /* Assign number of Usable TX queues */
2555 priv
->hw_params
.max_txq_num
= IWL39_NUM_QUEUES
;
2557 priv
->hw_params
.tfd_size
= sizeof(struct iwl3945_tfd
);
2558 priv
->hw_params
.rx_buf_size
= IWL_RX_BUF_SIZE_3K
;
2559 priv
->hw_params
.max_pkt_size
= 2342;
2560 priv
->hw_params
.max_rxq_size
= RX_QUEUE_SIZE
;
2561 priv
->hw_params
.max_rxq_log
= RX_QUEUE_SIZE_LOG
;
2562 priv
->hw_params
.max_stations
= IWL3945_STATION_COUNT
;
2563 priv
->hw_params
.bcast_sta_id
= IWL3945_BROADCAST_ID
;
2565 priv
->hw_params
.rx_wrt_ptr_reg
= FH39_RSCSR_CHNL0_WPTR
;
2566 priv
->hw_params
.max_beacon_itrvl
= IWL39_MAX_UCODE_BEACON_INTERVAL
;
2571 unsigned int iwl3945_hw_get_beacon_cmd(struct iwl_priv
*priv
,
2572 struct iwl3945_frame
*frame
, u8 rate
)
2574 struct iwl3945_tx_beacon_cmd
*tx_beacon_cmd
;
2575 unsigned int frame_size
;
2577 tx_beacon_cmd
= (struct iwl3945_tx_beacon_cmd
*)&frame
->u
;
2578 memset(tx_beacon_cmd
, 0, sizeof(*tx_beacon_cmd
));
2580 tx_beacon_cmd
->tx
.sta_id
= priv
->hw_params
.bcast_sta_id
;
2581 tx_beacon_cmd
->tx
.stop_time
.life_time
= TX_CMD_LIFE_TIME_INFINITE
;
2583 frame_size
= iwl3945_fill_beacon_frame(priv
,
2584 tx_beacon_cmd
->frame
,
2585 sizeof(frame
->u
) - sizeof(*tx_beacon_cmd
));
2587 BUG_ON(frame_size
> MAX_MPDU_SIZE
);
2588 tx_beacon_cmd
->tx
.len
= cpu_to_le16((u16
)frame_size
);
2590 tx_beacon_cmd
->tx
.rate
= rate
;
2591 tx_beacon_cmd
->tx
.tx_flags
= (TX_CMD_FLG_SEQ_CTL_MSK
|
2592 TX_CMD_FLG_TSF_MSK
);
2594 /* supp_rates[0] == OFDM start at IWL_FIRST_OFDM_RATE*/
2595 tx_beacon_cmd
->tx
.supp_rates
[0] =
2596 (IWL_OFDM_BASIC_RATES_MASK
>> IWL_FIRST_OFDM_RATE
) & 0xFF;
2598 tx_beacon_cmd
->tx
.supp_rates
[1] =
2599 (IWL_CCK_BASIC_RATES_MASK
& 0xF);
2601 return sizeof(struct iwl3945_tx_beacon_cmd
) + frame_size
;
2604 void iwl3945_hw_rx_handler_setup(struct iwl_priv
*priv
)
2606 priv
->rx_handlers
[REPLY_TX
] = iwl3945_rx_reply_tx
;
2607 priv
->rx_handlers
[REPLY_3945_RX
] = iwl3945_rx_reply_rx
;
2610 void iwl3945_hw_setup_deferred_work(struct iwl_priv
*priv
)
2612 INIT_DELAYED_WORK(&priv
->thermal_periodic
,
2613 iwl3945_bg_reg_txpower_periodic
);
2616 void iwl3945_hw_cancel_deferred_work(struct iwl_priv
*priv
)
2618 cancel_delayed_work(&priv
->thermal_periodic
);
2621 /* check contents of special bootstrap uCode SRAM */
2622 static int iwl3945_verify_bsm(struct iwl_priv
*priv
)
2624 __le32
*image
= priv
->ucode_boot
.v_addr
;
2625 u32 len
= priv
->ucode_boot
.len
;
2629 IWL_DEBUG_INFO(priv
, "Begin verify bsm\n");
2631 /* verify BSM SRAM contents */
2632 val
= iwl_read_prph(priv
, BSM_WR_DWCOUNT_REG
);
2633 for (reg
= BSM_SRAM_LOWER_BOUND
;
2634 reg
< BSM_SRAM_LOWER_BOUND
+ len
;
2635 reg
+= sizeof(u32
), image
++) {
2636 val
= iwl_read_prph(priv
, reg
);
2637 if (val
!= le32_to_cpu(*image
)) {
2638 IWL_ERR(priv
, "BSM uCode verification failed at "
2639 "addr 0x%08X+%u (of %u), is 0x%x, s/b 0x%x\n",
2640 BSM_SRAM_LOWER_BOUND
,
2641 reg
- BSM_SRAM_LOWER_BOUND
, len
,
2642 val
, le32_to_cpu(*image
));
2647 IWL_DEBUG_INFO(priv
, "BSM bootstrap uCode image OK\n");
2653 /******************************************************************************
2655 * EEPROM related functions
2657 ******************************************************************************/
2660 * Clear the OWNER_MSK, to establish driver (instead of uCode running on
2661 * embedded controller) as EEPROM reader; each read is a series of pulses
2662 * to/from the EEPROM chip, not a single event, so even reads could conflict
2663 * if they weren't arbitrated by some ownership mechanism. Here, the driver
2664 * simply claims ownership, which should be safe when this function is called
2665 * (i.e. before loading uCode!).
2667 static int iwl3945_eeprom_acquire_semaphore(struct iwl_priv
*priv
)
2669 _iwl_clear_bit(priv
, CSR_EEPROM_GP
, CSR_EEPROM_GP_IF_OWNER_MSK
);
2674 static void iwl3945_eeprom_release_semaphore(struct iwl_priv
*priv
)
2680 * iwl3945_load_bsm - Load bootstrap instructions
2684 * The Bootstrap State Machine (BSM) stores a short bootstrap uCode program
2685 * in special SRAM that does not power down during RFKILL. When powering back
2686 * up after power-saving sleeps (or during initial uCode load), the BSM loads
2687 * the bootstrap program into the on-board processor, and starts it.
2689 * The bootstrap program loads (via DMA) instructions and data for a new
2690 * program from host DRAM locations indicated by the host driver in the
2691 * BSM_DRAM_* registers. Once the new program is loaded, it starts
2694 * When initializing the NIC, the host driver points the BSM to the
2695 * "initialize" uCode image. This uCode sets up some internal data, then
2696 * notifies host via "initialize alive" that it is complete.
2698 * The host then replaces the BSM_DRAM_* pointer values to point to the
2699 * normal runtime uCode instructions and a backup uCode data cache buffer
2700 * (filled initially with starting data values for the on-board processor),
2701 * then triggers the "initialize" uCode to load and launch the runtime uCode,
2702 * which begins normal operation.
2704 * When doing a power-save shutdown, runtime uCode saves data SRAM into
2705 * the backup data cache in DRAM before SRAM is powered down.
2707 * When powering back up, the BSM loads the bootstrap program. This reloads
2708 * the runtime uCode instructions and the backup data cache into SRAM,
2709 * and re-launches the runtime uCode from where it left off.
2711 static int iwl3945_load_bsm(struct iwl_priv
*priv
)
2713 __le32
*image
= priv
->ucode_boot
.v_addr
;
2714 u32 len
= priv
->ucode_boot
.len
;
2724 IWL_DEBUG_INFO(priv
, "Begin load bsm\n");
2726 /* make sure bootstrap program is no larger than BSM's SRAM size */
2727 if (len
> IWL39_MAX_BSM_SIZE
)
2730 /* Tell bootstrap uCode where to find the "Initialize" uCode
2731 * in host DRAM ... host DRAM physical address bits 31:0 for 3945.
2732 * NOTE: iwl3945_initialize_alive_start() will replace these values,
2733 * after the "initialize" uCode has run, to point to
2734 * runtime/protocol instructions and backup data cache. */
2735 pinst
= priv
->ucode_init
.p_addr
;
2736 pdata
= priv
->ucode_init_data
.p_addr
;
2737 inst_len
= priv
->ucode_init
.len
;
2738 data_len
= priv
->ucode_init_data
.len
;
2740 iwl_write_prph(priv
, BSM_DRAM_INST_PTR_REG
, pinst
);
2741 iwl_write_prph(priv
, BSM_DRAM_DATA_PTR_REG
, pdata
);
2742 iwl_write_prph(priv
, BSM_DRAM_INST_BYTECOUNT_REG
, inst_len
);
2743 iwl_write_prph(priv
, BSM_DRAM_DATA_BYTECOUNT_REG
, data_len
);
2745 /* Fill BSM memory with bootstrap instructions */
2746 for (reg_offset
= BSM_SRAM_LOWER_BOUND
;
2747 reg_offset
< BSM_SRAM_LOWER_BOUND
+ len
;
2748 reg_offset
+= sizeof(u32
), image
++)
2749 _iwl_write_prph(priv
, reg_offset
,
2750 le32_to_cpu(*image
));
2752 rc
= iwl3945_verify_bsm(priv
);
2756 /* Tell BSM to copy from BSM SRAM into instruction SRAM, when asked */
2757 iwl_write_prph(priv
, BSM_WR_MEM_SRC_REG
, 0x0);
2758 iwl_write_prph(priv
, BSM_WR_MEM_DST_REG
,
2759 IWL39_RTC_INST_LOWER_BOUND
);
2760 iwl_write_prph(priv
, BSM_WR_DWCOUNT_REG
, len
/ sizeof(u32
));
2762 /* Load bootstrap code into instruction SRAM now,
2763 * to prepare to load "initialize" uCode */
2764 iwl_write_prph(priv
, BSM_WR_CTRL_REG
,
2765 BSM_WR_CTRL_REG_BIT_START
);
2767 /* Wait for load of bootstrap uCode to finish */
2768 for (i
= 0; i
< 100; i
++) {
2769 done
= iwl_read_prph(priv
, BSM_WR_CTRL_REG
);
2770 if (!(done
& BSM_WR_CTRL_REG_BIT_START
))
2775 IWL_DEBUG_INFO(priv
, "BSM write complete, poll %d iterations\n", i
);
2777 IWL_ERR(priv
, "BSM write did not complete!\n");
2781 /* Enable future boot loads whenever power management unit triggers it
2782 * (e.g. when powering back up after power-save shutdown) */
2783 iwl_write_prph(priv
, BSM_WR_CTRL_REG
,
2784 BSM_WR_CTRL_REG_BIT_START_EN
);
2789 #define IWL3945_UCODE_GET(item) \
2790 static u32 iwl3945_ucode_get_##item(const struct iwl_ucode_header *ucode,\
2793 return le32_to_cpu(ucode->u.v1.item); \
2796 static u32
iwl3945_ucode_get_header_size(u32 api_ver
)
2798 return UCODE_HEADER_SIZE(1);
2800 static u32
iwl3945_ucode_get_build(const struct iwl_ucode_header
*ucode
,
2805 static u8
*iwl3945_ucode_get_data(const struct iwl_ucode_header
*ucode
,
2808 return (u8
*) ucode
->u
.v1
.data
;
2811 IWL3945_UCODE_GET(inst_size
);
2812 IWL3945_UCODE_GET(data_size
);
2813 IWL3945_UCODE_GET(init_size
);
2814 IWL3945_UCODE_GET(init_data_size
);
2815 IWL3945_UCODE_GET(boot_size
);
2817 static struct iwl_hcmd_ops iwl3945_hcmd
= {
2818 .rxon_assoc
= iwl3945_send_rxon_assoc
,
2819 .commit_rxon
= iwl3945_commit_rxon
,
2822 static struct iwl_ucode_ops iwl3945_ucode
= {
2823 .get_header_size
= iwl3945_ucode_get_header_size
,
2824 .get_build
= iwl3945_ucode_get_build
,
2825 .get_inst_size
= iwl3945_ucode_get_inst_size
,
2826 .get_data_size
= iwl3945_ucode_get_data_size
,
2827 .get_init_size
= iwl3945_ucode_get_init_size
,
2828 .get_init_data_size
= iwl3945_ucode_get_init_data_size
,
2829 .get_boot_size
= iwl3945_ucode_get_boot_size
,
2830 .get_data
= iwl3945_ucode_get_data
,
2833 static struct iwl_lib_ops iwl3945_lib
= {
2834 .txq_attach_buf_to_tfd
= iwl3945_hw_txq_attach_buf_to_tfd
,
2835 .txq_free_tfd
= iwl3945_hw_txq_free_tfd
,
2836 .txq_init
= iwl3945_hw_tx_queue_init
,
2837 .load_ucode
= iwl3945_load_bsm
,
2839 .init
= iwl3945_apm_init
,
2840 .reset
= iwl3945_apm_reset
,
2841 .stop
= iwl3945_apm_stop
,
2842 .config
= iwl3945_nic_config
,
2843 .set_pwr_src
= iwl3945_set_pwr_src
,
2846 .regulatory_bands
= {
2847 EEPROM_REGULATORY_BAND_1_CHANNELS
,
2848 EEPROM_REGULATORY_BAND_2_CHANNELS
,
2849 EEPROM_REGULATORY_BAND_3_CHANNELS
,
2850 EEPROM_REGULATORY_BAND_4_CHANNELS
,
2851 EEPROM_REGULATORY_BAND_5_CHANNELS
,
2852 EEPROM_REGULATORY_BAND_NO_FAT
,
2853 EEPROM_REGULATORY_BAND_NO_FAT
,
2855 .verify_signature
= iwlcore_eeprom_verify_signature
,
2856 .acquire_semaphore
= iwl3945_eeprom_acquire_semaphore
,
2857 .release_semaphore
= iwl3945_eeprom_release_semaphore
,
2858 .query_addr
= iwlcore_eeprom_query_addr
,
2860 .send_tx_power
= iwl3945_send_tx_power
,
2861 .is_valid_rtc_data_addr
= iwl3945_hw_valid_rtc_data_addr
,
2862 .post_associate
= iwl3945_post_associate
,
2863 .isr
= iwl_isr_legacy
,
2864 .config_ap
= iwl3945_config_ap
,
2867 static struct iwl_hcmd_utils_ops iwl3945_hcmd_utils
= {
2868 .get_hcmd_size
= iwl3945_get_hcmd_size
,
2869 .build_addsta_hcmd
= iwl3945_build_addsta_hcmd
,
2872 static struct iwl_ops iwl3945_ops
= {
2873 .ucode
= &iwl3945_ucode
,
2874 .lib
= &iwl3945_lib
,
2875 .hcmd
= &iwl3945_hcmd
,
2876 .utils
= &iwl3945_hcmd_utils
,
2879 static struct iwl_cfg iwl3945_bg_cfg
= {
2881 .fw_name_pre
= IWL3945_FW_PRE
,
2882 .ucode_api_max
= IWL3945_UCODE_API_MAX
,
2883 .ucode_api_min
= IWL3945_UCODE_API_MIN
,
2885 .eeprom_size
= IWL3945_EEPROM_IMG_SIZE
,
2886 .eeprom_ver
= EEPROM_3945_EEPROM_VERSION
,
2887 .ops
= &iwl3945_ops
,
2888 .mod_params
= &iwl3945_mod_params
,
2889 .use_isr_legacy
= true
2892 static struct iwl_cfg iwl3945_abg_cfg
= {
2894 .fw_name_pre
= IWL3945_FW_PRE
,
2895 .ucode_api_max
= IWL3945_UCODE_API_MAX
,
2896 .ucode_api_min
= IWL3945_UCODE_API_MIN
,
2897 .sku
= IWL_SKU_A
|IWL_SKU_G
,
2898 .eeprom_size
= IWL3945_EEPROM_IMG_SIZE
,
2899 .eeprom_ver
= EEPROM_3945_EEPROM_VERSION
,
2900 .ops
= &iwl3945_ops
,
2901 .mod_params
= &iwl3945_mod_params
,
2902 .use_isr_legacy
= true
2905 struct pci_device_id iwl3945_hw_card_ids
[] = {
2906 {IWL_PCI_DEVICE(0x4222, 0x1005, iwl3945_bg_cfg
)},
2907 {IWL_PCI_DEVICE(0x4222, 0x1034, iwl3945_bg_cfg
)},
2908 {IWL_PCI_DEVICE(0x4222, 0x1044, iwl3945_bg_cfg
)},
2909 {IWL_PCI_DEVICE(0x4227, 0x1014, iwl3945_bg_cfg
)},
2910 {IWL_PCI_DEVICE(0x4222, PCI_ANY_ID
, iwl3945_abg_cfg
)},
2911 {IWL_PCI_DEVICE(0x4227, PCI_ANY_ID
, iwl3945_abg_cfg
)},
2915 MODULE_DEVICE_TABLE(pci
, iwl3945_hw_card_ids
);