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iwlwifi: re-introduce per device debugging
[mirror_ubuntu-artful-kernel.git] / drivers / net / wireless / iwlwifi / iwl-agn.c
1 /******************************************************************************
2 *
3 * Copyright(c) 2003 - 2009 Intel Corporation. All rights reserved.
4 *
5 * Portions of this file are derived from the ipw3945 project, as well
6 * as portions of the ieee80211 subsystem header files.
7 *
8 * This program is free software; you can redistribute it and/or modify it
9 * under the terms of version 2 of the GNU General Public License as
10 * published by the Free Software Foundation.
11 *
12 * This program is distributed in the hope that it will be useful, but WITHOUT
13 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
14 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
15 * more details.
16 *
17 * You should have received a copy of the GNU General Public License along with
18 * this program; if not, write to the Free Software Foundation, Inc.,
19 * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
20 *
21 * The full GNU General Public License is included in this distribution in the
22 * file called LICENSE.
23 *
24 * Contact Information:
25 * Intel Linux Wireless <ilw@linux.intel.com>
26 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
27 *
28 *****************************************************************************/
29
30 #include <linux/kernel.h>
31 #include <linux/module.h>
32 #include <linux/init.h>
33 #include <linux/pci.h>
34 #include <linux/dma-mapping.h>
35 #include <linux/delay.h>
36 #include <linux/skbuff.h>
37 #include <linux/netdevice.h>
38 #include <linux/wireless.h>
39 #include <linux/firmware.h>
40 #include <linux/etherdevice.h>
41 #include <linux/if_arp.h>
42
43 #include <net/mac80211.h>
44
45 #include <asm/div64.h>
46
47 #define DRV_NAME "iwlagn"
48
49 #include "iwl-eeprom.h"
50 #include "iwl-dev.h"
51 #include "iwl-core.h"
52 #include "iwl-io.h"
53 #include "iwl-helpers.h"
54 #include "iwl-sta.h"
55 #include "iwl-calib.h"
56
57
58 /******************************************************************************
59 *
60 * module boiler plate
61 *
62 ******************************************************************************/
63
64 /*
65 * module name, copyright, version, etc.
66 */
67 #define DRV_DESCRIPTION "Intel(R) Wireless WiFi Link AGN driver for Linux"
68
69 #ifdef CONFIG_IWLWIFI_DEBUG
70 #define VD "d"
71 #else
72 #define VD
73 #endif
74
75 #ifdef CONFIG_IWLWIFI_SPECTRUM_MEASUREMENT
76 #define VS "s"
77 #else
78 #define VS
79 #endif
80
81 #define DRV_VERSION IWLWIFI_VERSION VD VS
82
83
84 MODULE_DESCRIPTION(DRV_DESCRIPTION);
85 MODULE_VERSION(DRV_VERSION);
86 MODULE_AUTHOR(DRV_COPYRIGHT " " DRV_AUTHOR);
87 MODULE_LICENSE("GPL");
88 MODULE_ALIAS("iwl4965");
89
90 /*************** STATION TABLE MANAGEMENT ****
91 * mac80211 should be examined to determine if sta_info is duplicating
92 * the functionality provided here
93 */
94
95 /**************************************************************/
96
97 /**
98 * iwl_commit_rxon - commit staging_rxon to hardware
99 *
100 * The RXON command in staging_rxon is committed to the hardware and
101 * the active_rxon structure is updated with the new data. This
102 * function correctly transitions out of the RXON_ASSOC_MSK state if
103 * a HW tune is required based on the RXON structure changes.
104 */
105 int iwl_commit_rxon(struct iwl_priv *priv)
106 {
107 /* cast away the const for active_rxon in this function */
108 struct iwl_rxon_cmd *active_rxon = (void *)&priv->active_rxon;
109 int ret;
110 bool new_assoc =
111 !!(priv->staging_rxon.filter_flags & RXON_FILTER_ASSOC_MSK);
112
113 if (!iwl_is_alive(priv))
114 return -EBUSY;
115
116 /* always get timestamp with Rx frame */
117 priv->staging_rxon.flags |= RXON_FLG_TSF2HOST_MSK;
118 /* allow CTS-to-self if possible. this is relevant only for
119 * 5000, but will not damage 4965 */
120 priv->staging_rxon.flags |= RXON_FLG_SELF_CTS_EN;
121
122 ret = iwl_check_rxon_cmd(priv);
123 if (ret) {
124 IWL_ERR(priv, "Invalid RXON configuration. Not committing.\n");
125 return -EINVAL;
126 }
127
128 /* If we don't need to send a full RXON, we can use
129 * iwl_rxon_assoc_cmd which is used to reconfigure filter
130 * and other flags for the current radio configuration. */
131 if (!iwl_full_rxon_required(priv)) {
132 ret = iwl_send_rxon_assoc(priv);
133 if (ret) {
134 IWL_ERR(priv, "Error setting RXON_ASSOC (%d)\n", ret);
135 return ret;
136 }
137
138 memcpy(active_rxon, &priv->staging_rxon, sizeof(*active_rxon));
139 return 0;
140 }
141
142 /* station table will be cleared */
143 priv->assoc_station_added = 0;
144
145 /* If we are currently associated and the new config requires
146 * an RXON_ASSOC and the new config wants the associated mask enabled,
147 * we must clear the associated from the active configuration
148 * before we apply the new config */
149 if (iwl_is_associated(priv) && new_assoc) {
150 IWL_DEBUG_INFO(priv, "Toggling associated bit on current RXON\n");
151 active_rxon->filter_flags &= ~RXON_FILTER_ASSOC_MSK;
152
153 ret = iwl_send_cmd_pdu(priv, REPLY_RXON,
154 sizeof(struct iwl_rxon_cmd),
155 &priv->active_rxon);
156
157 /* If the mask clearing failed then we set
158 * active_rxon back to what it was previously */
159 if (ret) {
160 active_rxon->filter_flags |= RXON_FILTER_ASSOC_MSK;
161 IWL_ERR(priv, "Error clearing ASSOC_MSK (%d)\n", ret);
162 return ret;
163 }
164 }
165
166 IWL_DEBUG_INFO(priv, "Sending RXON\n"
167 "* with%s RXON_FILTER_ASSOC_MSK\n"
168 "* channel = %d\n"
169 "* bssid = %pM\n",
170 (new_assoc ? "" : "out"),
171 le16_to_cpu(priv->staging_rxon.channel),
172 priv->staging_rxon.bssid_addr);
173
174 iwl_set_rxon_hwcrypto(priv, !priv->cfg->mod_params->sw_crypto);
175
176 /* Apply the new configuration
177 * RXON unassoc clears the station table in uCode, send it before
178 * we add the bcast station. If assoc bit is set, we will send RXON
179 * after having added the bcast and bssid station.
180 */
181 if (!new_assoc) {
182 ret = iwl_send_cmd_pdu(priv, REPLY_RXON,
183 sizeof(struct iwl_rxon_cmd), &priv->staging_rxon);
184 if (ret) {
185 IWL_ERR(priv, "Error setting new RXON (%d)\n", ret);
186 return ret;
187 }
188 memcpy(active_rxon, &priv->staging_rxon, sizeof(*active_rxon));
189 }
190
191 iwl_clear_stations_table(priv);
192
193 priv->start_calib = 0;
194
195 /* Add the broadcast address so we can send broadcast frames */
196 if (iwl_rxon_add_station(priv, iwl_bcast_addr, 0) ==
197 IWL_INVALID_STATION) {
198 IWL_ERR(priv, "Error adding BROADCAST address for transmit.\n");
199 return -EIO;
200 }
201
202 /* If we have set the ASSOC_MSK and we are in BSS mode then
203 * add the IWL_AP_ID to the station rate table */
204 if (new_assoc) {
205 if (priv->iw_mode == NL80211_IFTYPE_STATION) {
206 ret = iwl_rxon_add_station(priv,
207 priv->active_rxon.bssid_addr, 1);
208 if (ret == IWL_INVALID_STATION) {
209 IWL_ERR(priv,
210 "Error adding AP address for TX.\n");
211 return -EIO;
212 }
213 priv->assoc_station_added = 1;
214 if (priv->default_wep_key &&
215 iwl_send_static_wepkey_cmd(priv, 0))
216 IWL_ERR(priv,
217 "Could not send WEP static key.\n");
218 }
219
220 /* Apply the new configuration
221 * RXON assoc doesn't clear the station table in uCode,
222 */
223 ret = iwl_send_cmd_pdu(priv, REPLY_RXON,
224 sizeof(struct iwl_rxon_cmd), &priv->staging_rxon);
225 if (ret) {
226 IWL_ERR(priv, "Error setting new RXON (%d)\n", ret);
227 return ret;
228 }
229 memcpy(active_rxon, &priv->staging_rxon, sizeof(*active_rxon));
230 }
231
232 iwl_init_sensitivity(priv);
233
234 /* If we issue a new RXON command which required a tune then we must
235 * send a new TXPOWER command or we won't be able to Tx any frames */
236 ret = iwl_set_tx_power(priv, priv->tx_power_user_lmt, true);
237 if (ret) {
238 IWL_ERR(priv, "Error sending TX power (%d)\n", ret);
239 return ret;
240 }
241
242 return 0;
243 }
244
245 void iwl_update_chain_flags(struct iwl_priv *priv)
246 {
247
248 if (priv->cfg->ops->hcmd->set_rxon_chain)
249 priv->cfg->ops->hcmd->set_rxon_chain(priv);
250 iwlcore_commit_rxon(priv);
251 }
252
253 static void iwl_clear_free_frames(struct iwl_priv *priv)
254 {
255 struct list_head *element;
256
257 IWL_DEBUG_INFO(priv, "%d frames on pre-allocated heap on clear.\n",
258 priv->frames_count);
259
260 while (!list_empty(&priv->free_frames)) {
261 element = priv->free_frames.next;
262 list_del(element);
263 kfree(list_entry(element, struct iwl_frame, list));
264 priv->frames_count--;
265 }
266
267 if (priv->frames_count) {
268 IWL_WARN(priv, "%d frames still in use. Did we lose one?\n",
269 priv->frames_count);
270 priv->frames_count = 0;
271 }
272 }
273
274 static struct iwl_frame *iwl_get_free_frame(struct iwl_priv *priv)
275 {
276 struct iwl_frame *frame;
277 struct list_head *element;
278 if (list_empty(&priv->free_frames)) {
279 frame = kzalloc(sizeof(*frame), GFP_KERNEL);
280 if (!frame) {
281 IWL_ERR(priv, "Could not allocate frame!\n");
282 return NULL;
283 }
284
285 priv->frames_count++;
286 return frame;
287 }
288
289 element = priv->free_frames.next;
290 list_del(element);
291 return list_entry(element, struct iwl_frame, list);
292 }
293
294 static void iwl_free_frame(struct iwl_priv *priv, struct iwl_frame *frame)
295 {
296 memset(frame, 0, sizeof(*frame));
297 list_add(&frame->list, &priv->free_frames);
298 }
299
300 static unsigned int iwl_fill_beacon_frame(struct iwl_priv *priv,
301 struct ieee80211_hdr *hdr,
302 int left)
303 {
304 if (!iwl_is_associated(priv) || !priv->ibss_beacon ||
305 ((priv->iw_mode != NL80211_IFTYPE_ADHOC) &&
306 (priv->iw_mode != NL80211_IFTYPE_AP)))
307 return 0;
308
309 if (priv->ibss_beacon->len > left)
310 return 0;
311
312 memcpy(hdr, priv->ibss_beacon->data, priv->ibss_beacon->len);
313
314 return priv->ibss_beacon->len;
315 }
316
317 static unsigned int iwl_hw_get_beacon_cmd(struct iwl_priv *priv,
318 struct iwl_frame *frame, u8 rate)
319 {
320 struct iwl_tx_beacon_cmd *tx_beacon_cmd;
321 unsigned int frame_size;
322
323 tx_beacon_cmd = &frame->u.beacon;
324 memset(tx_beacon_cmd, 0, sizeof(*tx_beacon_cmd));
325
326 tx_beacon_cmd->tx.sta_id = priv->hw_params.bcast_sta_id;
327 tx_beacon_cmd->tx.stop_time.life_time = TX_CMD_LIFE_TIME_INFINITE;
328
329 frame_size = iwl_fill_beacon_frame(priv, tx_beacon_cmd->frame,
330 sizeof(frame->u) - sizeof(*tx_beacon_cmd));
331
332 BUG_ON(frame_size > MAX_MPDU_SIZE);
333 tx_beacon_cmd->tx.len = cpu_to_le16((u16)frame_size);
334
335 if ((rate == IWL_RATE_1M_PLCP) || (rate >= IWL_RATE_2M_PLCP))
336 tx_beacon_cmd->tx.rate_n_flags =
337 iwl_hw_set_rate_n_flags(rate, RATE_MCS_CCK_MSK);
338 else
339 tx_beacon_cmd->tx.rate_n_flags =
340 iwl_hw_set_rate_n_flags(rate, 0);
341
342 tx_beacon_cmd->tx.tx_flags = TX_CMD_FLG_SEQ_CTL_MSK |
343 TX_CMD_FLG_TSF_MSK |
344 TX_CMD_FLG_STA_RATE_MSK;
345
346 return sizeof(*tx_beacon_cmd) + frame_size;
347 }
348 static int iwl_send_beacon_cmd(struct iwl_priv *priv)
349 {
350 struct iwl_frame *frame;
351 unsigned int frame_size;
352 int rc;
353 u8 rate;
354
355 frame = iwl_get_free_frame(priv);
356
357 if (!frame) {
358 IWL_ERR(priv, "Could not obtain free frame buffer for beacon "
359 "command.\n");
360 return -ENOMEM;
361 }
362
363 rate = iwl_rate_get_lowest_plcp(priv);
364
365 frame_size = iwl_hw_get_beacon_cmd(priv, frame, rate);
366
367 rc = iwl_send_cmd_pdu(priv, REPLY_TX_BEACON, frame_size,
368 &frame->u.cmd[0]);
369
370 iwl_free_frame(priv, frame);
371
372 return rc;
373 }
374
375 static inline dma_addr_t iwl_tfd_tb_get_addr(struct iwl_tfd *tfd, u8 idx)
376 {
377 struct iwl_tfd_tb *tb = &tfd->tbs[idx];
378
379 dma_addr_t addr = get_unaligned_le32(&tb->lo);
380 if (sizeof(dma_addr_t) > sizeof(u32))
381 addr |=
382 ((dma_addr_t)(le16_to_cpu(tb->hi_n_len) & 0xF) << 16) << 16;
383
384 return addr;
385 }
386
387 static inline u16 iwl_tfd_tb_get_len(struct iwl_tfd *tfd, u8 idx)
388 {
389 struct iwl_tfd_tb *tb = &tfd->tbs[idx];
390
391 return le16_to_cpu(tb->hi_n_len) >> 4;
392 }
393
394 static inline void iwl_tfd_set_tb(struct iwl_tfd *tfd, u8 idx,
395 dma_addr_t addr, u16 len)
396 {
397 struct iwl_tfd_tb *tb = &tfd->tbs[idx];
398 u16 hi_n_len = len << 4;
399
400 put_unaligned_le32(addr, &tb->lo);
401 if (sizeof(dma_addr_t) > sizeof(u32))
402 hi_n_len |= ((addr >> 16) >> 16) & 0xF;
403
404 tb->hi_n_len = cpu_to_le16(hi_n_len);
405
406 tfd->num_tbs = idx + 1;
407 }
408
409 static inline u8 iwl_tfd_get_num_tbs(struct iwl_tfd *tfd)
410 {
411 return tfd->num_tbs & 0x1f;
412 }
413
414 /**
415 * iwl_hw_txq_free_tfd - Free all chunks referenced by TFD [txq->q.read_ptr]
416 * @priv - driver private data
417 * @txq - tx queue
418 *
419 * Does NOT advance any TFD circular buffer read/write indexes
420 * Does NOT free the TFD itself (which is within circular buffer)
421 */
422 void iwl_hw_txq_free_tfd(struct iwl_priv *priv, struct iwl_tx_queue *txq)
423 {
424 struct iwl_tfd *tfd_tmp = (struct iwl_tfd *)txq->tfds;
425 struct iwl_tfd *tfd;
426 struct pci_dev *dev = priv->pci_dev;
427 int index = txq->q.read_ptr;
428 int i;
429 int num_tbs;
430
431 tfd = &tfd_tmp[index];
432
433 /* Sanity check on number of chunks */
434 num_tbs = iwl_tfd_get_num_tbs(tfd);
435
436 if (num_tbs >= IWL_NUM_OF_TBS) {
437 IWL_ERR(priv, "Too many chunks: %i\n", num_tbs);
438 /* @todo issue fatal error, it is quite serious situation */
439 return;
440 }
441
442 /* Unmap tx_cmd */
443 if (num_tbs)
444 pci_unmap_single(dev,
445 pci_unmap_addr(&txq->meta[index], mapping),
446 pci_unmap_len(&txq->meta[index], len),
447 PCI_DMA_BIDIRECTIONAL);
448
449 /* Unmap chunks, if any. */
450 for (i = 1; i < num_tbs; i++) {
451 pci_unmap_single(dev, iwl_tfd_tb_get_addr(tfd, i),
452 iwl_tfd_tb_get_len(tfd, i), PCI_DMA_TODEVICE);
453
454 if (txq->txb) {
455 dev_kfree_skb(txq->txb[txq->q.read_ptr].skb[i - 1]);
456 txq->txb[txq->q.read_ptr].skb[i - 1] = NULL;
457 }
458 }
459 }
460
461 int iwl_hw_txq_attach_buf_to_tfd(struct iwl_priv *priv,
462 struct iwl_tx_queue *txq,
463 dma_addr_t addr, u16 len,
464 u8 reset, u8 pad)
465 {
466 struct iwl_queue *q;
467 struct iwl_tfd *tfd, *tfd_tmp;
468 u32 num_tbs;
469
470 q = &txq->q;
471 tfd_tmp = (struct iwl_tfd *)txq->tfds;
472 tfd = &tfd_tmp[q->write_ptr];
473
474 if (reset)
475 memset(tfd, 0, sizeof(*tfd));
476
477 num_tbs = iwl_tfd_get_num_tbs(tfd);
478
479 /* Each TFD can point to a maximum 20 Tx buffers */
480 if (num_tbs >= IWL_NUM_OF_TBS) {
481 IWL_ERR(priv, "Error can not send more than %d chunks\n",
482 IWL_NUM_OF_TBS);
483 return -EINVAL;
484 }
485
486 BUG_ON(addr & ~DMA_BIT_MASK(36));
487 if (unlikely(addr & ~IWL_TX_DMA_MASK))
488 IWL_ERR(priv, "Unaligned address = %llx\n",
489 (unsigned long long)addr);
490
491 iwl_tfd_set_tb(tfd, num_tbs, addr, len);
492
493 return 0;
494 }
495
496 /*
497 * Tell nic where to find circular buffer of Tx Frame Descriptors for
498 * given Tx queue, and enable the DMA channel used for that queue.
499 *
500 * 4965 supports up to 16 Tx queues in DRAM, mapped to up to 8 Tx DMA
501 * channels supported in hardware.
502 */
503 int iwl_hw_tx_queue_init(struct iwl_priv *priv,
504 struct iwl_tx_queue *txq)
505 {
506 int txq_id = txq->q.id;
507
508 /* Circular buffer (TFD queue in DRAM) physical base address */
509 iwl_write_direct32(priv, FH_MEM_CBBC_QUEUE(txq_id),
510 txq->q.dma_addr >> 8);
511
512 return 0;
513 }
514
515 /******************************************************************************
516 *
517 * Generic RX handler implementations
518 *
519 ******************************************************************************/
520 static void iwl_rx_reply_alive(struct iwl_priv *priv,
521 struct iwl_rx_mem_buffer *rxb)
522 {
523 struct iwl_rx_packet *pkt = (struct iwl_rx_packet *)rxb->skb->data;
524 struct iwl_alive_resp *palive;
525 struct delayed_work *pwork;
526
527 palive = &pkt->u.alive_frame;
528
529 IWL_DEBUG_INFO(priv, "Alive ucode status 0x%08X revision "
530 "0x%01X 0x%01X\n",
531 palive->is_valid, palive->ver_type,
532 palive->ver_subtype);
533
534 if (palive->ver_subtype == INITIALIZE_SUBTYPE) {
535 IWL_DEBUG_INFO(priv, "Initialization Alive received.\n");
536 set_bit(STATUS_INIT_UCODE_ALIVE, &priv->status);
537 wake_up_interruptible(&priv->wait_command_queue);
538 memcpy(&priv->card_alive_init,
539 &pkt->u.alive_frame,
540 sizeof(struct iwl_init_alive_resp));
541 pwork = &priv->init_alive_start;
542 } else {
543 IWL_DEBUG_INFO(priv, "Runtime Alive received.\n");
544 set_bit(STATUS_RT_UCODE_ALIVE, &priv->status);
545 wake_up_interruptible(&priv->wait_command_queue);
546 memcpy(&priv->card_alive, &pkt->u.alive_frame,
547 sizeof(struct iwl_alive_resp));
548 pwork = &priv->alive_start;
549 }
550
551 /* We delay the ALIVE response by 5ms to
552 * give the HW RF Kill time to activate... */
553 if (palive->is_valid == UCODE_VALID_OK)
554 queue_delayed_work(priv->workqueue, pwork,
555 msecs_to_jiffies(5));
556 else
557 IWL_WARN(priv, "uCode did not respond OK.\n");
558 }
559
560 static void iwl_bg_beacon_update(struct work_struct *work)
561 {
562 struct iwl_priv *priv =
563 container_of(work, struct iwl_priv, beacon_update);
564 struct sk_buff *beacon;
565
566 /* Pull updated AP beacon from mac80211. will fail if not in AP mode */
567 beacon = ieee80211_beacon_get(priv->hw, priv->vif);
568
569 if (!beacon) {
570 IWL_ERR(priv, "update beacon failed\n");
571 return;
572 }
573
574 mutex_lock(&priv->mutex);
575 /* new beacon skb is allocated every time; dispose previous.*/
576 if (priv->ibss_beacon)
577 dev_kfree_skb(priv->ibss_beacon);
578
579 priv->ibss_beacon = beacon;
580 mutex_unlock(&priv->mutex);
581
582 iwl_send_beacon_cmd(priv);
583 }
584
585 /**
586 * iwl_bg_statistics_periodic - Timer callback to queue statistics
587 *
588 * This callback is provided in order to send a statistics request.
589 *
590 * This timer function is continually reset to execute within
591 * REG_RECALIB_PERIOD seconds since the last STATISTICS_NOTIFICATION
592 * was received. We need to ensure we receive the statistics in order
593 * to update the temperature used for calibrating the TXPOWER.
594 */
595 static void iwl_bg_statistics_periodic(unsigned long data)
596 {
597 struct iwl_priv *priv = (struct iwl_priv *)data;
598
599 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
600 return;
601
602 /* dont send host command if rf-kill is on */
603 if (!iwl_is_ready_rf(priv))
604 return;
605
606 iwl_send_statistics_request(priv, CMD_ASYNC);
607 }
608
609 static void iwl_rx_beacon_notif(struct iwl_priv *priv,
610 struct iwl_rx_mem_buffer *rxb)
611 {
612 #ifdef CONFIG_IWLWIFI_DEBUG
613 struct iwl_rx_packet *pkt = (struct iwl_rx_packet *)rxb->skb->data;
614 struct iwl4965_beacon_notif *beacon =
615 (struct iwl4965_beacon_notif *)pkt->u.raw;
616 u8 rate = iwl_hw_get_rate(beacon->beacon_notify_hdr.rate_n_flags);
617
618 IWL_DEBUG_RX(priv, "beacon status %x retries %d iss %d "
619 "tsf %d %d rate %d\n",
620 le32_to_cpu(beacon->beacon_notify_hdr.u.status) & TX_STATUS_MSK,
621 beacon->beacon_notify_hdr.failure_frame,
622 le32_to_cpu(beacon->ibss_mgr_status),
623 le32_to_cpu(beacon->high_tsf),
624 le32_to_cpu(beacon->low_tsf), rate);
625 #endif
626
627 if ((priv->iw_mode == NL80211_IFTYPE_AP) &&
628 (!test_bit(STATUS_EXIT_PENDING, &priv->status)))
629 queue_work(priv->workqueue, &priv->beacon_update);
630 }
631
632 /* Handle notification from uCode that card's power state is changing
633 * due to software, hardware, or critical temperature RFKILL */
634 static void iwl_rx_card_state_notif(struct iwl_priv *priv,
635 struct iwl_rx_mem_buffer *rxb)
636 {
637 struct iwl_rx_packet *pkt = (struct iwl_rx_packet *)rxb->skb->data;
638 u32 flags = le32_to_cpu(pkt->u.card_state_notif.flags);
639 unsigned long status = priv->status;
640
641 IWL_DEBUG_RF_KILL(priv, "Card state received: HW:%s SW:%s\n",
642 (flags & HW_CARD_DISABLED) ? "Kill" : "On",
643 (flags & SW_CARD_DISABLED) ? "Kill" : "On");
644
645 if (flags & (SW_CARD_DISABLED | HW_CARD_DISABLED |
646 RF_CARD_DISABLED)) {
647
648 iwl_write32(priv, CSR_UCODE_DRV_GP1_SET,
649 CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
650
651 iwl_write_direct32(priv, HBUS_TARG_MBX_C,
652 HBUS_TARG_MBX_C_REG_BIT_CMD_BLOCKED);
653
654 if (!(flags & RXON_CARD_DISABLED)) {
655 iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR,
656 CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
657 iwl_write_direct32(priv, HBUS_TARG_MBX_C,
658 HBUS_TARG_MBX_C_REG_BIT_CMD_BLOCKED);
659 }
660 if (flags & RF_CARD_DISABLED)
661 iwl_tt_enter_ct_kill(priv);
662 }
663 if (!(flags & RF_CARD_DISABLED))
664 iwl_tt_exit_ct_kill(priv);
665
666 if (flags & HW_CARD_DISABLED)
667 set_bit(STATUS_RF_KILL_HW, &priv->status);
668 else
669 clear_bit(STATUS_RF_KILL_HW, &priv->status);
670
671
672 if (!(flags & RXON_CARD_DISABLED))
673 iwl_scan_cancel(priv);
674
675 if ((test_bit(STATUS_RF_KILL_HW, &status) !=
676 test_bit(STATUS_RF_KILL_HW, &priv->status)))
677 wiphy_rfkill_set_hw_state(priv->hw->wiphy,
678 test_bit(STATUS_RF_KILL_HW, &priv->status));
679 else
680 wake_up_interruptible(&priv->wait_command_queue);
681 }
682
683 int iwl_set_pwr_src(struct iwl_priv *priv, enum iwl_pwr_src src)
684 {
685 if (src == IWL_PWR_SRC_VAUX) {
686 if (pci_pme_capable(priv->pci_dev, PCI_D3cold))
687 iwl_set_bits_mask_prph(priv, APMG_PS_CTRL_REG,
688 APMG_PS_CTRL_VAL_PWR_SRC_VAUX,
689 ~APMG_PS_CTRL_MSK_PWR_SRC);
690 } else {
691 iwl_set_bits_mask_prph(priv, APMG_PS_CTRL_REG,
692 APMG_PS_CTRL_VAL_PWR_SRC_VMAIN,
693 ~APMG_PS_CTRL_MSK_PWR_SRC);
694 }
695
696 return 0;
697 }
698
699 /**
700 * iwl_setup_rx_handlers - Initialize Rx handler callbacks
701 *
702 * Setup the RX handlers for each of the reply types sent from the uCode
703 * to the host.
704 *
705 * This function chains into the hardware specific files for them to setup
706 * any hardware specific handlers as well.
707 */
708 static void iwl_setup_rx_handlers(struct iwl_priv *priv)
709 {
710 priv->rx_handlers[REPLY_ALIVE] = iwl_rx_reply_alive;
711 priv->rx_handlers[REPLY_ERROR] = iwl_rx_reply_error;
712 priv->rx_handlers[CHANNEL_SWITCH_NOTIFICATION] = iwl_rx_csa;
713 priv->rx_handlers[PM_SLEEP_NOTIFICATION] = iwl_rx_pm_sleep_notif;
714 priv->rx_handlers[PM_DEBUG_STATISTIC_NOTIFIC] =
715 iwl_rx_pm_debug_statistics_notif;
716 priv->rx_handlers[BEACON_NOTIFICATION] = iwl_rx_beacon_notif;
717
718 /*
719 * The same handler is used for both the REPLY to a discrete
720 * statistics request from the host as well as for the periodic
721 * statistics notifications (after received beacons) from the uCode.
722 */
723 priv->rx_handlers[REPLY_STATISTICS_CMD] = iwl_rx_statistics;
724 priv->rx_handlers[STATISTICS_NOTIFICATION] = iwl_rx_statistics;
725
726 iwl_setup_spectrum_handlers(priv);
727 iwl_setup_rx_scan_handlers(priv);
728
729 /* status change handler */
730 priv->rx_handlers[CARD_STATE_NOTIFICATION] = iwl_rx_card_state_notif;
731
732 priv->rx_handlers[MISSED_BEACONS_NOTIFICATION] =
733 iwl_rx_missed_beacon_notif;
734 /* Rx handlers */
735 priv->rx_handlers[REPLY_RX_PHY_CMD] = iwl_rx_reply_rx_phy;
736 priv->rx_handlers[REPLY_RX_MPDU_CMD] = iwl_rx_reply_rx;
737 /* block ack */
738 priv->rx_handlers[REPLY_COMPRESSED_BA] = iwl_rx_reply_compressed_ba;
739 /* Set up hardware specific Rx handlers */
740 priv->cfg->ops->lib->rx_handler_setup(priv);
741 }
742
743 /**
744 * iwl_rx_handle - Main entry function for receiving responses from uCode
745 *
746 * Uses the priv->rx_handlers callback function array to invoke
747 * the appropriate handlers, including command responses,
748 * frame-received notifications, and other notifications.
749 */
750 void iwl_rx_handle(struct iwl_priv *priv)
751 {
752 struct iwl_rx_mem_buffer *rxb;
753 struct iwl_rx_packet *pkt;
754 struct iwl_rx_queue *rxq = &priv->rxq;
755 u32 r, i;
756 int reclaim;
757 unsigned long flags;
758 u8 fill_rx = 0;
759 u32 count = 8;
760 int total_empty;
761
762 /* uCode's read index (stored in shared DRAM) indicates the last Rx
763 * buffer that the driver may process (last buffer filled by ucode). */
764 r = le16_to_cpu(rxq->rb_stts->closed_rb_num) & 0x0FFF;
765 i = rxq->read;
766
767 /* Rx interrupt, but nothing sent from uCode */
768 if (i == r)
769 IWL_DEBUG_RX(priv, "r = %d, i = %d\n", r, i);
770
771 /* calculate total frames need to be restock after handling RX */
772 total_empty = r - priv->rxq.write_actual;
773 if (total_empty < 0)
774 total_empty += RX_QUEUE_SIZE;
775
776 if (total_empty > (RX_QUEUE_SIZE / 2))
777 fill_rx = 1;
778
779 while (i != r) {
780 rxb = rxq->queue[i];
781
782 /* If an RXB doesn't have a Rx queue slot associated with it,
783 * then a bug has been introduced in the queue refilling
784 * routines -- catch it here */
785 BUG_ON(rxb == NULL);
786
787 rxq->queue[i] = NULL;
788
789 pci_unmap_single(priv->pci_dev, rxb->real_dma_addr,
790 priv->hw_params.rx_buf_size + 256,
791 PCI_DMA_FROMDEVICE);
792 pkt = (struct iwl_rx_packet *)rxb->skb->data;
793
794 /* Reclaim a command buffer only if this packet is a response
795 * to a (driver-originated) command.
796 * If the packet (e.g. Rx frame) originated from uCode,
797 * there is no command buffer to reclaim.
798 * Ucode should set SEQ_RX_FRAME bit if ucode-originated,
799 * but apparently a few don't get set; catch them here. */
800 reclaim = !(pkt->hdr.sequence & SEQ_RX_FRAME) &&
801 (pkt->hdr.cmd != REPLY_RX_PHY_CMD) &&
802 (pkt->hdr.cmd != REPLY_RX) &&
803 (pkt->hdr.cmd != REPLY_RX_MPDU_CMD) &&
804 (pkt->hdr.cmd != REPLY_COMPRESSED_BA) &&
805 (pkt->hdr.cmd != STATISTICS_NOTIFICATION) &&
806 (pkt->hdr.cmd != REPLY_TX);
807
808 /* Based on type of command response or notification,
809 * handle those that need handling via function in
810 * rx_handlers table. See iwl_setup_rx_handlers() */
811 if (priv->rx_handlers[pkt->hdr.cmd]) {
812 IWL_DEBUG_RX(priv, "r = %d, i = %d, %s, 0x%02x\n", r,
813 i, get_cmd_string(pkt->hdr.cmd), pkt->hdr.cmd);
814 priv->rx_handlers[pkt->hdr.cmd] (priv, rxb);
815 priv->isr_stats.rx_handlers[pkt->hdr.cmd]++;
816 } else {
817 /* No handling needed */
818 IWL_DEBUG_RX(priv,
819 "r %d i %d No handler needed for %s, 0x%02x\n",
820 r, i, get_cmd_string(pkt->hdr.cmd),
821 pkt->hdr.cmd);
822 }
823
824 if (reclaim) {
825 /* Invoke any callbacks, transfer the skb to caller, and
826 * fire off the (possibly) blocking iwl_send_cmd()
827 * as we reclaim the driver command queue */
828 if (rxb && rxb->skb)
829 iwl_tx_cmd_complete(priv, rxb);
830 else
831 IWL_WARN(priv, "Claim null rxb?\n");
832 }
833
834 /* For now we just don't re-use anything. We can tweak this
835 * later to try and re-use notification packets and SKBs that
836 * fail to Rx correctly */
837 if (rxb->skb != NULL) {
838 priv->alloc_rxb_skb--;
839 dev_kfree_skb_any(rxb->skb);
840 rxb->skb = NULL;
841 }
842
843 spin_lock_irqsave(&rxq->lock, flags);
844 list_add_tail(&rxb->list, &priv->rxq.rx_used);
845 spin_unlock_irqrestore(&rxq->lock, flags);
846 i = (i + 1) & RX_QUEUE_MASK;
847 /* If there are a lot of unused frames,
848 * restock the Rx queue so ucode wont assert. */
849 if (fill_rx) {
850 count++;
851 if (count >= 8) {
852 priv->rxq.read = i;
853 iwl_rx_replenish_now(priv);
854 count = 0;
855 }
856 }
857 }
858
859 /* Backtrack one entry */
860 priv->rxq.read = i;
861 if (fill_rx)
862 iwl_rx_replenish_now(priv);
863 else
864 iwl_rx_queue_restock(priv);
865 }
866
867 /* call this function to flush any scheduled tasklet */
868 static inline void iwl_synchronize_irq(struct iwl_priv *priv)
869 {
870 /* wait to make sure we flush pending tasklet*/
871 synchronize_irq(priv->pci_dev->irq);
872 tasklet_kill(&priv->irq_tasklet);
873 }
874
875 static void iwl_irq_tasklet_legacy(struct iwl_priv *priv)
876 {
877 u32 inta, handled = 0;
878 u32 inta_fh;
879 unsigned long flags;
880 #ifdef CONFIG_IWLWIFI_DEBUG
881 u32 inta_mask;
882 #endif
883
884 spin_lock_irqsave(&priv->lock, flags);
885
886 /* Ack/clear/reset pending uCode interrupts.
887 * Note: Some bits in CSR_INT are "OR" of bits in CSR_FH_INT_STATUS,
888 * and will clear only when CSR_FH_INT_STATUS gets cleared. */
889 inta = iwl_read32(priv, CSR_INT);
890 iwl_write32(priv, CSR_INT, inta);
891
892 /* Ack/clear/reset pending flow-handler (DMA) interrupts.
893 * Any new interrupts that happen after this, either while we're
894 * in this tasklet, or later, will show up in next ISR/tasklet. */
895 inta_fh = iwl_read32(priv, CSR_FH_INT_STATUS);
896 iwl_write32(priv, CSR_FH_INT_STATUS, inta_fh);
897
898 #ifdef CONFIG_IWLWIFI_DEBUG
899 if (iwl_get_debug_level(priv) & IWL_DL_ISR) {
900 /* just for debug */
901 inta_mask = iwl_read32(priv, CSR_INT_MASK);
902 IWL_DEBUG_ISR(priv, "inta 0x%08x, enabled 0x%08x, fh 0x%08x\n",
903 inta, inta_mask, inta_fh);
904 }
905 #endif
906
907 /* Since CSR_INT and CSR_FH_INT_STATUS reads and clears are not
908 * atomic, make sure that inta covers all the interrupts that
909 * we've discovered, even if FH interrupt came in just after
910 * reading CSR_INT. */
911 if (inta_fh & CSR49_FH_INT_RX_MASK)
912 inta |= CSR_INT_BIT_FH_RX;
913 if (inta_fh & CSR49_FH_INT_TX_MASK)
914 inta |= CSR_INT_BIT_FH_TX;
915
916 /* Now service all interrupt bits discovered above. */
917 if (inta & CSR_INT_BIT_HW_ERR) {
918 IWL_ERR(priv, "Hardware error detected. Restarting.\n");
919
920 /* Tell the device to stop sending interrupts */
921 iwl_disable_interrupts(priv);
922
923 priv->isr_stats.hw++;
924 iwl_irq_handle_error(priv);
925
926 handled |= CSR_INT_BIT_HW_ERR;
927
928 spin_unlock_irqrestore(&priv->lock, flags);
929
930 return;
931 }
932
933 #ifdef CONFIG_IWLWIFI_DEBUG
934 if (iwl_get_debug_level(priv) & (IWL_DL_ISR)) {
935 /* NIC fires this, but we don't use it, redundant with WAKEUP */
936 if (inta & CSR_INT_BIT_SCD) {
937 IWL_DEBUG_ISR(priv, "Scheduler finished to transmit "
938 "the frame/frames.\n");
939 priv->isr_stats.sch++;
940 }
941
942 /* Alive notification via Rx interrupt will do the real work */
943 if (inta & CSR_INT_BIT_ALIVE) {
944 IWL_DEBUG_ISR(priv, "Alive interrupt\n");
945 priv->isr_stats.alive++;
946 }
947 }
948 #endif
949 /* Safely ignore these bits for debug checks below */
950 inta &= ~(CSR_INT_BIT_SCD | CSR_INT_BIT_ALIVE);
951
952 /* HW RF KILL switch toggled */
953 if (inta & CSR_INT_BIT_RF_KILL) {
954 int hw_rf_kill = 0;
955 if (!(iwl_read32(priv, CSR_GP_CNTRL) &
956 CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW))
957 hw_rf_kill = 1;
958
959 IWL_WARN(priv, "RF_KILL bit toggled to %s.\n",
960 hw_rf_kill ? "disable radio" : "enable radio");
961
962 priv->isr_stats.rfkill++;
963
964 /* driver only loads ucode once setting the interface up.
965 * the driver allows loading the ucode even if the radio
966 * is killed. Hence update the killswitch state here. The
967 * rfkill handler will care about restarting if needed.
968 */
969 if (!test_bit(STATUS_ALIVE, &priv->status)) {
970 if (hw_rf_kill)
971 set_bit(STATUS_RF_KILL_HW, &priv->status);
972 else
973 clear_bit(STATUS_RF_KILL_HW, &priv->status);
974 wiphy_rfkill_set_hw_state(priv->hw->wiphy, hw_rf_kill);
975 }
976
977 handled |= CSR_INT_BIT_RF_KILL;
978 }
979
980 /* Chip got too hot and stopped itself */
981 if (inta & CSR_INT_BIT_CT_KILL) {
982 IWL_ERR(priv, "Microcode CT kill error detected.\n");
983 priv->isr_stats.ctkill++;
984 handled |= CSR_INT_BIT_CT_KILL;
985 }
986
987 /* Error detected by uCode */
988 if (inta & CSR_INT_BIT_SW_ERR) {
989 IWL_ERR(priv, "Microcode SW error detected. "
990 " Restarting 0x%X.\n", inta);
991 priv->isr_stats.sw++;
992 priv->isr_stats.sw_err = inta;
993 iwl_irq_handle_error(priv);
994 handled |= CSR_INT_BIT_SW_ERR;
995 }
996
997 /* uCode wakes up after power-down sleep */
998 if (inta & CSR_INT_BIT_WAKEUP) {
999 IWL_DEBUG_ISR(priv, "Wakeup interrupt\n");
1000 iwl_rx_queue_update_write_ptr(priv, &priv->rxq);
1001 iwl_txq_update_write_ptr(priv, &priv->txq[0]);
1002 iwl_txq_update_write_ptr(priv, &priv->txq[1]);
1003 iwl_txq_update_write_ptr(priv, &priv->txq[2]);
1004 iwl_txq_update_write_ptr(priv, &priv->txq[3]);
1005 iwl_txq_update_write_ptr(priv, &priv->txq[4]);
1006 iwl_txq_update_write_ptr(priv, &priv->txq[5]);
1007
1008 priv->isr_stats.wakeup++;
1009
1010 handled |= CSR_INT_BIT_WAKEUP;
1011 }
1012
1013 /* All uCode command responses, including Tx command responses,
1014 * Rx "responses" (frame-received notification), and other
1015 * notifications from uCode come through here*/
1016 if (inta & (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX)) {
1017 iwl_rx_handle(priv);
1018 priv->isr_stats.rx++;
1019 handled |= (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX);
1020 }
1021
1022 if (inta & CSR_INT_BIT_FH_TX) {
1023 IWL_DEBUG_ISR(priv, "Tx interrupt\n");
1024 priv->isr_stats.tx++;
1025 handled |= CSR_INT_BIT_FH_TX;
1026 /* FH finished to write, send event */
1027 priv->ucode_write_complete = 1;
1028 wake_up_interruptible(&priv->wait_command_queue);
1029 }
1030
1031 if (inta & ~handled) {
1032 IWL_ERR(priv, "Unhandled INTA bits 0x%08x\n", inta & ~handled);
1033 priv->isr_stats.unhandled++;
1034 }
1035
1036 if (inta & ~(priv->inta_mask)) {
1037 IWL_WARN(priv, "Disabled INTA bits 0x%08x were pending\n",
1038 inta & ~priv->inta_mask);
1039 IWL_WARN(priv, " with FH_INT = 0x%08x\n", inta_fh);
1040 }
1041
1042 /* Re-enable all interrupts */
1043 /* only Re-enable if diabled by irq */
1044 if (test_bit(STATUS_INT_ENABLED, &priv->status))
1045 iwl_enable_interrupts(priv);
1046
1047 #ifdef CONFIG_IWLWIFI_DEBUG
1048 if (iwl_get_debug_level(priv) & (IWL_DL_ISR)) {
1049 inta = iwl_read32(priv, CSR_INT);
1050 inta_mask = iwl_read32(priv, CSR_INT_MASK);
1051 inta_fh = iwl_read32(priv, CSR_FH_INT_STATUS);
1052 IWL_DEBUG_ISR(priv, "End inta 0x%08x, enabled 0x%08x, fh 0x%08x, "
1053 "flags 0x%08lx\n", inta, inta_mask, inta_fh, flags);
1054 }
1055 #endif
1056 spin_unlock_irqrestore(&priv->lock, flags);
1057 }
1058
1059 /* tasklet for iwlagn interrupt */
1060 static void iwl_irq_tasklet(struct iwl_priv *priv)
1061 {
1062 u32 inta = 0;
1063 u32 handled = 0;
1064 unsigned long flags;
1065 #ifdef CONFIG_IWLWIFI_DEBUG
1066 u32 inta_mask;
1067 #endif
1068
1069 spin_lock_irqsave(&priv->lock, flags);
1070
1071 /* Ack/clear/reset pending uCode interrupts.
1072 * Note: Some bits in CSR_INT are "OR" of bits in CSR_FH_INT_STATUS,
1073 */
1074 iwl_write32(priv, CSR_INT, priv->inta);
1075
1076 inta = priv->inta;
1077
1078 #ifdef CONFIG_IWLWIFI_DEBUG
1079 if (iwl_get_debug_level(priv) & IWL_DL_ISR) {
1080 /* just for debug */
1081 inta_mask = iwl_read32(priv, CSR_INT_MASK);
1082 IWL_DEBUG_ISR(priv, "inta 0x%08x, enabled 0x%08x\n ",
1083 inta, inta_mask);
1084 }
1085 #endif
1086 /* saved interrupt in inta variable now we can reset priv->inta */
1087 priv->inta = 0;
1088
1089 /* Now service all interrupt bits discovered above. */
1090 if (inta & CSR_INT_BIT_HW_ERR) {
1091 IWL_ERR(priv, "Hardware error detected. Restarting.\n");
1092
1093 /* Tell the device to stop sending interrupts */
1094 iwl_disable_interrupts(priv);
1095
1096 priv->isr_stats.hw++;
1097 iwl_irq_handle_error(priv);
1098
1099 handled |= CSR_INT_BIT_HW_ERR;
1100
1101 spin_unlock_irqrestore(&priv->lock, flags);
1102
1103 return;
1104 }
1105
1106 #ifdef CONFIG_IWLWIFI_DEBUG
1107 if (iwl_get_debug_level(priv) & (IWL_DL_ISR)) {
1108 /* NIC fires this, but we don't use it, redundant with WAKEUP */
1109 if (inta & CSR_INT_BIT_SCD) {
1110 IWL_DEBUG_ISR(priv, "Scheduler finished to transmit "
1111 "the frame/frames.\n");
1112 priv->isr_stats.sch++;
1113 }
1114
1115 /* Alive notification via Rx interrupt will do the real work */
1116 if (inta & CSR_INT_BIT_ALIVE) {
1117 IWL_DEBUG_ISR(priv, "Alive interrupt\n");
1118 priv->isr_stats.alive++;
1119 }
1120 }
1121 #endif
1122 /* Safely ignore these bits for debug checks below */
1123 inta &= ~(CSR_INT_BIT_SCD | CSR_INT_BIT_ALIVE);
1124
1125 /* HW RF KILL switch toggled */
1126 if (inta & CSR_INT_BIT_RF_KILL) {
1127 int hw_rf_kill = 0;
1128 if (!(iwl_read32(priv, CSR_GP_CNTRL) &
1129 CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW))
1130 hw_rf_kill = 1;
1131
1132 IWL_WARN(priv, "RF_KILL bit toggled to %s.\n",
1133 hw_rf_kill ? "disable radio" : "enable radio");
1134
1135 priv->isr_stats.rfkill++;
1136
1137 /* driver only loads ucode once setting the interface up.
1138 * the driver allows loading the ucode even if the radio
1139 * is killed. Hence update the killswitch state here. The
1140 * rfkill handler will care about restarting if needed.
1141 */
1142 if (!test_bit(STATUS_ALIVE, &priv->status)) {
1143 if (hw_rf_kill)
1144 set_bit(STATUS_RF_KILL_HW, &priv->status);
1145 else
1146 clear_bit(STATUS_RF_KILL_HW, &priv->status);
1147 wiphy_rfkill_set_hw_state(priv->hw->wiphy, hw_rf_kill);
1148 }
1149
1150 handled |= CSR_INT_BIT_RF_KILL;
1151 }
1152
1153 /* Chip got too hot and stopped itself */
1154 if (inta & CSR_INT_BIT_CT_KILL) {
1155 IWL_ERR(priv, "Microcode CT kill error detected.\n");
1156 priv->isr_stats.ctkill++;
1157 handled |= CSR_INT_BIT_CT_KILL;
1158 }
1159
1160 /* Error detected by uCode */
1161 if (inta & CSR_INT_BIT_SW_ERR) {
1162 IWL_ERR(priv, "Microcode SW error detected. "
1163 " Restarting 0x%X.\n", inta);
1164 priv->isr_stats.sw++;
1165 priv->isr_stats.sw_err = inta;
1166 iwl_irq_handle_error(priv);
1167 handled |= CSR_INT_BIT_SW_ERR;
1168 }
1169
1170 /* uCode wakes up after power-down sleep */
1171 if (inta & CSR_INT_BIT_WAKEUP) {
1172 IWL_DEBUG_ISR(priv, "Wakeup interrupt\n");
1173 iwl_rx_queue_update_write_ptr(priv, &priv->rxq);
1174 iwl_txq_update_write_ptr(priv, &priv->txq[0]);
1175 iwl_txq_update_write_ptr(priv, &priv->txq[1]);
1176 iwl_txq_update_write_ptr(priv, &priv->txq[2]);
1177 iwl_txq_update_write_ptr(priv, &priv->txq[3]);
1178 iwl_txq_update_write_ptr(priv, &priv->txq[4]);
1179 iwl_txq_update_write_ptr(priv, &priv->txq[5]);
1180
1181 priv->isr_stats.wakeup++;
1182
1183 handled |= CSR_INT_BIT_WAKEUP;
1184 }
1185
1186 /* All uCode command responses, including Tx command responses,
1187 * Rx "responses" (frame-received notification), and other
1188 * notifications from uCode come through here*/
1189 if (inta & (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX |
1190 CSR_INT_BIT_RX_PERIODIC)) {
1191 IWL_DEBUG_ISR(priv, "Rx interrupt\n");
1192 if (inta & (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX)) {
1193 handled |= (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX);
1194 iwl_write32(priv, CSR_FH_INT_STATUS,
1195 CSR49_FH_INT_RX_MASK);
1196 }
1197 if (inta & CSR_INT_BIT_RX_PERIODIC) {
1198 handled |= CSR_INT_BIT_RX_PERIODIC;
1199 iwl_write32(priv, CSR_INT, CSR_INT_BIT_RX_PERIODIC);
1200 }
1201 /* Sending RX interrupt require many steps to be done in the
1202 * the device:
1203 * 1- write interrupt to current index in ICT table.
1204 * 2- dma RX frame.
1205 * 3- update RX shared data to indicate last write index.
1206 * 4- send interrupt.
1207 * This could lead to RX race, driver could receive RX interrupt
1208 * but the shared data changes does not reflect this.
1209 * this could lead to RX race, RX periodic will solve this race
1210 */
1211 iwl_write32(priv, CSR_INT_PERIODIC_REG,
1212 CSR_INT_PERIODIC_DIS);
1213 iwl_rx_handle(priv);
1214 /* Only set RX periodic if real RX is received. */
1215 if (inta & (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX))
1216 iwl_write32(priv, CSR_INT_PERIODIC_REG,
1217 CSR_INT_PERIODIC_ENA);
1218
1219 priv->isr_stats.rx++;
1220 }
1221
1222 if (inta & CSR_INT_BIT_FH_TX) {
1223 iwl_write32(priv, CSR_FH_INT_STATUS, CSR49_FH_INT_TX_MASK);
1224 IWL_DEBUG_ISR(priv, "Tx interrupt\n");
1225 priv->isr_stats.tx++;
1226 handled |= CSR_INT_BIT_FH_TX;
1227 /* FH finished to write, send event */
1228 priv->ucode_write_complete = 1;
1229 wake_up_interruptible(&priv->wait_command_queue);
1230 }
1231
1232 if (inta & ~handled) {
1233 IWL_ERR(priv, "Unhandled INTA bits 0x%08x\n", inta & ~handled);
1234 priv->isr_stats.unhandled++;
1235 }
1236
1237 if (inta & ~(priv->inta_mask)) {
1238 IWL_WARN(priv, "Disabled INTA bits 0x%08x were pending\n",
1239 inta & ~priv->inta_mask);
1240 }
1241
1242
1243 /* Re-enable all interrupts */
1244 /* only Re-enable if diabled by irq */
1245 if (test_bit(STATUS_INT_ENABLED, &priv->status))
1246 iwl_enable_interrupts(priv);
1247
1248 spin_unlock_irqrestore(&priv->lock, flags);
1249
1250 }
1251
1252
1253 /******************************************************************************
1254 *
1255 * uCode download functions
1256 *
1257 ******************************************************************************/
1258
1259 static void iwl_dealloc_ucode_pci(struct iwl_priv *priv)
1260 {
1261 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_code);
1262 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_data);
1263 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_data_backup);
1264 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_init);
1265 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_init_data);
1266 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_boot);
1267 }
1268
1269 static void iwl_nic_start(struct iwl_priv *priv)
1270 {
1271 /* Remove all resets to allow NIC to operate */
1272 iwl_write32(priv, CSR_RESET, 0);
1273 }
1274
1275
1276 /**
1277 * iwl_read_ucode - Read uCode images from disk file.
1278 *
1279 * Copy into buffers for card to fetch via bus-mastering
1280 */
1281 static int iwl_read_ucode(struct iwl_priv *priv)
1282 {
1283 struct iwl_ucode_header *ucode;
1284 int ret = -EINVAL, index;
1285 const struct firmware *ucode_raw;
1286 const char *name_pre = priv->cfg->fw_name_pre;
1287 const unsigned int api_max = priv->cfg->ucode_api_max;
1288 const unsigned int api_min = priv->cfg->ucode_api_min;
1289 char buf[25];
1290 u8 *src;
1291 size_t len;
1292 u32 api_ver, build;
1293 u32 inst_size, data_size, init_size, init_data_size, boot_size;
1294 u16 eeprom_ver;
1295
1296 /* Ask kernel firmware_class module to get the boot firmware off disk.
1297 * request_firmware() is synchronous, file is in memory on return. */
1298 for (index = api_max; index >= api_min; index--) {
1299 sprintf(buf, "%s%d%s", name_pre, index, ".ucode");
1300 ret = request_firmware(&ucode_raw, buf, &priv->pci_dev->dev);
1301 if (ret < 0) {
1302 IWL_ERR(priv, "%s firmware file req failed: %d\n",
1303 buf, ret);
1304 if (ret == -ENOENT)
1305 continue;
1306 else
1307 goto error;
1308 } else {
1309 if (index < api_max)
1310 IWL_ERR(priv, "Loaded firmware %s, "
1311 "which is deprecated. "
1312 "Please use API v%u instead.\n",
1313 buf, api_max);
1314
1315 IWL_DEBUG_INFO(priv, "Got firmware '%s' file (%zd bytes) from disk\n",
1316 buf, ucode_raw->size);
1317 break;
1318 }
1319 }
1320
1321 if (ret < 0)
1322 goto error;
1323
1324 /* Make sure that we got at least the v1 header! */
1325 if (ucode_raw->size < priv->cfg->ops->ucode->get_header_size(1)) {
1326 IWL_ERR(priv, "File size way too small!\n");
1327 ret = -EINVAL;
1328 goto err_release;
1329 }
1330
1331 /* Data from ucode file: header followed by uCode images */
1332 ucode = (struct iwl_ucode_header *)ucode_raw->data;
1333
1334 priv->ucode_ver = le32_to_cpu(ucode->ver);
1335 api_ver = IWL_UCODE_API(priv->ucode_ver);
1336 build = priv->cfg->ops->ucode->get_build(ucode, api_ver);
1337 inst_size = priv->cfg->ops->ucode->get_inst_size(ucode, api_ver);
1338 data_size = priv->cfg->ops->ucode->get_data_size(ucode, api_ver);
1339 init_size = priv->cfg->ops->ucode->get_init_size(ucode, api_ver);
1340 init_data_size =
1341 priv->cfg->ops->ucode->get_init_data_size(ucode, api_ver);
1342 boot_size = priv->cfg->ops->ucode->get_boot_size(ucode, api_ver);
1343 src = priv->cfg->ops->ucode->get_data(ucode, api_ver);
1344
1345 /* api_ver should match the api version forming part of the
1346 * firmware filename ... but we don't check for that and only rely
1347 * on the API version read from firmware header from here on forward */
1348
1349 if (api_ver < api_min || api_ver > api_max) {
1350 IWL_ERR(priv, "Driver unable to support your firmware API. "
1351 "Driver supports v%u, firmware is v%u.\n",
1352 api_max, api_ver);
1353 priv->ucode_ver = 0;
1354 ret = -EINVAL;
1355 goto err_release;
1356 }
1357 if (api_ver != api_max)
1358 IWL_ERR(priv, "Firmware has old API version. Expected v%u, "
1359 "got v%u. New firmware can be obtained "
1360 "from http://www.intellinuxwireless.org.\n",
1361 api_max, api_ver);
1362
1363 IWL_INFO(priv, "loaded firmware version %u.%u.%u.%u\n",
1364 IWL_UCODE_MAJOR(priv->ucode_ver),
1365 IWL_UCODE_MINOR(priv->ucode_ver),
1366 IWL_UCODE_API(priv->ucode_ver),
1367 IWL_UCODE_SERIAL(priv->ucode_ver));
1368
1369 if (build)
1370 IWL_DEBUG_INFO(priv, "Build %u\n", build);
1371
1372 eeprom_ver = iwl_eeprom_query16(priv, EEPROM_VERSION);
1373 IWL_DEBUG_INFO(priv, "NVM Type: %s, version: 0x%x\n",
1374 (priv->nvm_device_type == NVM_DEVICE_TYPE_OTP)
1375 ? "OTP" : "EEPROM", eeprom_ver);
1376
1377 IWL_DEBUG_INFO(priv, "f/w package hdr ucode version raw = 0x%x\n",
1378 priv->ucode_ver);
1379 IWL_DEBUG_INFO(priv, "f/w package hdr runtime inst size = %u\n",
1380 inst_size);
1381 IWL_DEBUG_INFO(priv, "f/w package hdr runtime data size = %u\n",
1382 data_size);
1383 IWL_DEBUG_INFO(priv, "f/w package hdr init inst size = %u\n",
1384 init_size);
1385 IWL_DEBUG_INFO(priv, "f/w package hdr init data size = %u\n",
1386 init_data_size);
1387 IWL_DEBUG_INFO(priv, "f/w package hdr boot inst size = %u\n",
1388 boot_size);
1389
1390 /* Verify size of file vs. image size info in file's header */
1391 if (ucode_raw->size !=
1392 priv->cfg->ops->ucode->get_header_size(api_ver) +
1393 inst_size + data_size + init_size +
1394 init_data_size + boot_size) {
1395
1396 IWL_DEBUG_INFO(priv,
1397 "uCode file size %d does not match expected size\n",
1398 (int)ucode_raw->size);
1399 ret = -EINVAL;
1400 goto err_release;
1401 }
1402
1403 /* Verify that uCode images will fit in card's SRAM */
1404 if (inst_size > priv->hw_params.max_inst_size) {
1405 IWL_DEBUG_INFO(priv, "uCode instr len %d too large to fit in\n",
1406 inst_size);
1407 ret = -EINVAL;
1408 goto err_release;
1409 }
1410
1411 if (data_size > priv->hw_params.max_data_size) {
1412 IWL_DEBUG_INFO(priv, "uCode data len %d too large to fit in\n",
1413 data_size);
1414 ret = -EINVAL;
1415 goto err_release;
1416 }
1417 if (init_size > priv->hw_params.max_inst_size) {
1418 IWL_INFO(priv, "uCode init instr len %d too large to fit in\n",
1419 init_size);
1420 ret = -EINVAL;
1421 goto err_release;
1422 }
1423 if (init_data_size > priv->hw_params.max_data_size) {
1424 IWL_INFO(priv, "uCode init data len %d too large to fit in\n",
1425 init_data_size);
1426 ret = -EINVAL;
1427 goto err_release;
1428 }
1429 if (boot_size > priv->hw_params.max_bsm_size) {
1430 IWL_INFO(priv, "uCode boot instr len %d too large to fit in\n",
1431 boot_size);
1432 ret = -EINVAL;
1433 goto err_release;
1434 }
1435
1436 /* Allocate ucode buffers for card's bus-master loading ... */
1437
1438 /* Runtime instructions and 2 copies of data:
1439 * 1) unmodified from disk
1440 * 2) backup cache for save/restore during power-downs */
1441 priv->ucode_code.len = inst_size;
1442 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_code);
1443
1444 priv->ucode_data.len = data_size;
1445 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_data);
1446
1447 priv->ucode_data_backup.len = data_size;
1448 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_data_backup);
1449
1450 if (!priv->ucode_code.v_addr || !priv->ucode_data.v_addr ||
1451 !priv->ucode_data_backup.v_addr)
1452 goto err_pci_alloc;
1453
1454 /* Initialization instructions and data */
1455 if (init_size && init_data_size) {
1456 priv->ucode_init.len = init_size;
1457 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_init);
1458
1459 priv->ucode_init_data.len = init_data_size;
1460 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_init_data);
1461
1462 if (!priv->ucode_init.v_addr || !priv->ucode_init_data.v_addr)
1463 goto err_pci_alloc;
1464 }
1465
1466 /* Bootstrap (instructions only, no data) */
1467 if (boot_size) {
1468 priv->ucode_boot.len = boot_size;
1469 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_boot);
1470
1471 if (!priv->ucode_boot.v_addr)
1472 goto err_pci_alloc;
1473 }
1474
1475 /* Copy images into buffers for card's bus-master reads ... */
1476
1477 /* Runtime instructions (first block of data in file) */
1478 len = inst_size;
1479 IWL_DEBUG_INFO(priv, "Copying (but not loading) uCode instr len %Zd\n", len);
1480 memcpy(priv->ucode_code.v_addr, src, len);
1481 src += len;
1482
1483 IWL_DEBUG_INFO(priv, "uCode instr buf vaddr = 0x%p, paddr = 0x%08x\n",
1484 priv->ucode_code.v_addr, (u32)priv->ucode_code.p_addr);
1485
1486 /* Runtime data (2nd block)
1487 * NOTE: Copy into backup buffer will be done in iwl_up() */
1488 len = data_size;
1489 IWL_DEBUG_INFO(priv, "Copying (but not loading) uCode data len %Zd\n", len);
1490 memcpy(priv->ucode_data.v_addr, src, len);
1491 memcpy(priv->ucode_data_backup.v_addr, src, len);
1492 src += len;
1493
1494 /* Initialization instructions (3rd block) */
1495 if (init_size) {
1496 len = init_size;
1497 IWL_DEBUG_INFO(priv, "Copying (but not loading) init instr len %Zd\n",
1498 len);
1499 memcpy(priv->ucode_init.v_addr, src, len);
1500 src += len;
1501 }
1502
1503 /* Initialization data (4th block) */
1504 if (init_data_size) {
1505 len = init_data_size;
1506 IWL_DEBUG_INFO(priv, "Copying (but not loading) init data len %Zd\n",
1507 len);
1508 memcpy(priv->ucode_init_data.v_addr, src, len);
1509 src += len;
1510 }
1511
1512 /* Bootstrap instructions (5th block) */
1513 len = boot_size;
1514 IWL_DEBUG_INFO(priv, "Copying (but not loading) boot instr len %Zd\n", len);
1515 memcpy(priv->ucode_boot.v_addr, src, len);
1516
1517 /* We have our copies now, allow OS release its copies */
1518 release_firmware(ucode_raw);
1519 return 0;
1520
1521 err_pci_alloc:
1522 IWL_ERR(priv, "failed to allocate pci memory\n");
1523 ret = -ENOMEM;
1524 iwl_dealloc_ucode_pci(priv);
1525
1526 err_release:
1527 release_firmware(ucode_raw);
1528
1529 error:
1530 return ret;
1531 }
1532
1533 /**
1534 * iwl_alive_start - called after REPLY_ALIVE notification received
1535 * from protocol/runtime uCode (initialization uCode's
1536 * Alive gets handled by iwl_init_alive_start()).
1537 */
1538 static void iwl_alive_start(struct iwl_priv *priv)
1539 {
1540 int ret = 0;
1541
1542 IWL_DEBUG_INFO(priv, "Runtime Alive received.\n");
1543
1544 if (priv->card_alive.is_valid != UCODE_VALID_OK) {
1545 /* We had an error bringing up the hardware, so take it
1546 * all the way back down so we can try again */
1547 IWL_DEBUG_INFO(priv, "Alive failed.\n");
1548 goto restart;
1549 }
1550
1551 /* Initialize uCode has loaded Runtime uCode ... verify inst image.
1552 * This is a paranoid check, because we would not have gotten the
1553 * "runtime" alive if code weren't properly loaded. */
1554 if (iwl_verify_ucode(priv)) {
1555 /* Runtime instruction load was bad;
1556 * take it all the way back down so we can try again */
1557 IWL_DEBUG_INFO(priv, "Bad runtime uCode load.\n");
1558 goto restart;
1559 }
1560
1561 iwl_clear_stations_table(priv);
1562 ret = priv->cfg->ops->lib->alive_notify(priv);
1563 if (ret) {
1564 IWL_WARN(priv,
1565 "Could not complete ALIVE transition [ntf]: %d\n", ret);
1566 goto restart;
1567 }
1568
1569 /* After the ALIVE response, we can send host commands to the uCode */
1570 set_bit(STATUS_ALIVE, &priv->status);
1571
1572 if (iwl_is_rfkill(priv))
1573 return;
1574
1575 ieee80211_wake_queues(priv->hw);
1576
1577 priv->active_rate = priv->rates_mask;
1578 priv->active_rate_basic = priv->rates_mask & IWL_BASIC_RATES_MASK;
1579
1580 if (iwl_is_associated(priv)) {
1581 struct iwl_rxon_cmd *active_rxon =
1582 (struct iwl_rxon_cmd *)&priv->active_rxon;
1583 /* apply any changes in staging */
1584 priv->staging_rxon.filter_flags |= RXON_FILTER_ASSOC_MSK;
1585 active_rxon->filter_flags &= ~RXON_FILTER_ASSOC_MSK;
1586 } else {
1587 /* Initialize our rx_config data */
1588 iwl_connection_init_rx_config(priv, priv->iw_mode);
1589
1590 if (priv->cfg->ops->hcmd->set_rxon_chain)
1591 priv->cfg->ops->hcmd->set_rxon_chain(priv);
1592
1593 memcpy(priv->staging_rxon.node_addr, priv->mac_addr, ETH_ALEN);
1594 }
1595
1596 /* Configure Bluetooth device coexistence support */
1597 iwl_send_bt_config(priv);
1598
1599 iwl_reset_run_time_calib(priv);
1600
1601 /* Configure the adapter for unassociated operation */
1602 iwlcore_commit_rxon(priv);
1603
1604 /* At this point, the NIC is initialized and operational */
1605 iwl_rf_kill_ct_config(priv);
1606
1607 iwl_leds_register(priv);
1608
1609 IWL_DEBUG_INFO(priv, "ALIVE processing complete.\n");
1610 set_bit(STATUS_READY, &priv->status);
1611 wake_up_interruptible(&priv->wait_command_queue);
1612
1613 iwl_power_update_mode(priv, 1);
1614
1615 /* reassociate for ADHOC mode */
1616 if (priv->vif && (priv->iw_mode == NL80211_IFTYPE_ADHOC)) {
1617 struct sk_buff *beacon = ieee80211_beacon_get(priv->hw,
1618 priv->vif);
1619 if (beacon)
1620 iwl_mac_beacon_update(priv->hw, beacon);
1621 }
1622
1623
1624 if (test_and_clear_bit(STATUS_MODE_PENDING, &priv->status))
1625 iwl_set_mode(priv, priv->iw_mode);
1626
1627 return;
1628
1629 restart:
1630 queue_work(priv->workqueue, &priv->restart);
1631 }
1632
1633 static void iwl_cancel_deferred_work(struct iwl_priv *priv);
1634
1635 static void __iwl_down(struct iwl_priv *priv)
1636 {
1637 unsigned long flags;
1638 int exit_pending = test_bit(STATUS_EXIT_PENDING, &priv->status);
1639
1640 IWL_DEBUG_INFO(priv, DRV_NAME " is going down\n");
1641
1642 if (!exit_pending)
1643 set_bit(STATUS_EXIT_PENDING, &priv->status);
1644
1645 iwl_leds_unregister(priv);
1646
1647 iwl_clear_stations_table(priv);
1648
1649 /* Unblock any waiting calls */
1650 wake_up_interruptible_all(&priv->wait_command_queue);
1651
1652 /* Wipe out the EXIT_PENDING status bit if we are not actually
1653 * exiting the module */
1654 if (!exit_pending)
1655 clear_bit(STATUS_EXIT_PENDING, &priv->status);
1656
1657 /* stop and reset the on-board processor */
1658 iwl_write32(priv, CSR_RESET, CSR_RESET_REG_FLAG_NEVO_RESET);
1659
1660 /* tell the device to stop sending interrupts */
1661 spin_lock_irqsave(&priv->lock, flags);
1662 iwl_disable_interrupts(priv);
1663 spin_unlock_irqrestore(&priv->lock, flags);
1664 iwl_synchronize_irq(priv);
1665
1666 if (priv->mac80211_registered)
1667 ieee80211_stop_queues(priv->hw);
1668
1669 /* If we have not previously called iwl_init() then
1670 * clear all bits but the RF Kill bit and return */
1671 if (!iwl_is_init(priv)) {
1672 priv->status = test_bit(STATUS_RF_KILL_HW, &priv->status) <<
1673 STATUS_RF_KILL_HW |
1674 test_bit(STATUS_GEO_CONFIGURED, &priv->status) <<
1675 STATUS_GEO_CONFIGURED |
1676 test_bit(STATUS_EXIT_PENDING, &priv->status) <<
1677 STATUS_EXIT_PENDING;
1678 goto exit;
1679 }
1680
1681 /* ...otherwise clear out all the status bits but the RF Kill
1682 * bit and continue taking the NIC down. */
1683 priv->status &= test_bit(STATUS_RF_KILL_HW, &priv->status) <<
1684 STATUS_RF_KILL_HW |
1685 test_bit(STATUS_GEO_CONFIGURED, &priv->status) <<
1686 STATUS_GEO_CONFIGURED |
1687 test_bit(STATUS_FW_ERROR, &priv->status) <<
1688 STATUS_FW_ERROR |
1689 test_bit(STATUS_EXIT_PENDING, &priv->status) <<
1690 STATUS_EXIT_PENDING;
1691
1692 /* device going down, Stop using ICT table */
1693 iwl_disable_ict(priv);
1694 spin_lock_irqsave(&priv->lock, flags);
1695 iwl_clear_bit(priv, CSR_GP_CNTRL,
1696 CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
1697 spin_unlock_irqrestore(&priv->lock, flags);
1698
1699 iwl_txq_ctx_stop(priv);
1700 iwl_rxq_stop(priv);
1701
1702 iwl_write_prph(priv, APMG_CLK_DIS_REG,
1703 APMG_CLK_VAL_DMA_CLK_RQT);
1704
1705 udelay(5);
1706
1707 /* FIXME: apm_ops.suspend(priv) */
1708 if (exit_pending)
1709 priv->cfg->ops->lib->apm_ops.stop(priv);
1710 else
1711 priv->cfg->ops->lib->apm_ops.reset(priv);
1712 exit:
1713 memset(&priv->card_alive, 0, sizeof(struct iwl_alive_resp));
1714
1715 if (priv->ibss_beacon)
1716 dev_kfree_skb(priv->ibss_beacon);
1717 priv->ibss_beacon = NULL;
1718
1719 /* clear out any free frames */
1720 iwl_clear_free_frames(priv);
1721 }
1722
1723 static void iwl_down(struct iwl_priv *priv)
1724 {
1725 mutex_lock(&priv->mutex);
1726 __iwl_down(priv);
1727 mutex_unlock(&priv->mutex);
1728
1729 iwl_cancel_deferred_work(priv);
1730 }
1731
1732 #define HW_READY_TIMEOUT (50)
1733
1734 static int iwl_set_hw_ready(struct iwl_priv *priv)
1735 {
1736 int ret = 0;
1737
1738 iwl_set_bit(priv, CSR_HW_IF_CONFIG_REG,
1739 CSR_HW_IF_CONFIG_REG_BIT_NIC_READY);
1740
1741 /* See if we got it */
1742 ret = iwl_poll_bit(priv, CSR_HW_IF_CONFIG_REG,
1743 CSR_HW_IF_CONFIG_REG_BIT_NIC_READY,
1744 CSR_HW_IF_CONFIG_REG_BIT_NIC_READY,
1745 HW_READY_TIMEOUT);
1746 if (ret != -ETIMEDOUT)
1747 priv->hw_ready = true;
1748 else
1749 priv->hw_ready = false;
1750
1751 IWL_DEBUG_INFO(priv, "hardware %s\n",
1752 (priv->hw_ready == 1) ? "ready" : "not ready");
1753 return ret;
1754 }
1755
1756 static int iwl_prepare_card_hw(struct iwl_priv *priv)
1757 {
1758 int ret = 0;
1759
1760 IWL_DEBUG_INFO(priv, "iwl_prepare_card_hw enter \n");
1761
1762 ret = iwl_set_hw_ready(priv);
1763 if (priv->hw_ready)
1764 return ret;
1765
1766 /* If HW is not ready, prepare the conditions to check again */
1767 iwl_set_bit(priv, CSR_HW_IF_CONFIG_REG,
1768 CSR_HW_IF_CONFIG_REG_PREPARE);
1769
1770 ret = iwl_poll_bit(priv, CSR_HW_IF_CONFIG_REG,
1771 ~CSR_HW_IF_CONFIG_REG_BIT_NIC_PREPARE_DONE,
1772 CSR_HW_IF_CONFIG_REG_BIT_NIC_PREPARE_DONE, 150000);
1773
1774 /* HW should be ready by now, check again. */
1775 if (ret != -ETIMEDOUT)
1776 iwl_set_hw_ready(priv);
1777
1778 return ret;
1779 }
1780
1781 #define MAX_HW_RESTARTS 5
1782
1783 static int __iwl_up(struct iwl_priv *priv)
1784 {
1785 int i;
1786 int ret;
1787 unsigned long status;
1788
1789 if (test_bit(STATUS_EXIT_PENDING, &priv->status)) {
1790 IWL_WARN(priv, "Exit pending; will not bring the NIC up\n");
1791 return -EIO;
1792 }
1793
1794 if (!priv->ucode_data_backup.v_addr || !priv->ucode_data.v_addr) {
1795 IWL_ERR(priv, "ucode not available for device bringup\n");
1796 return -EIO;
1797 }
1798
1799 iwl_prepare_card_hw(priv);
1800
1801 if (!priv->hw_ready) {
1802 IWL_WARN(priv, "Exit HW not ready\n");
1803 return -EIO;
1804 }
1805
1806 /* If platform's RF_KILL switch is NOT set to KILL */
1807 if (iwl_read32(priv, CSR_GP_CNTRL) & CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW)
1808 clear_bit(STATUS_RF_KILL_HW, &priv->status);
1809 else
1810 set_bit(STATUS_RF_KILL_HW, &priv->status);
1811
1812 if (iwl_is_rfkill(priv)) {
1813 wiphy_rfkill_set_hw_state(priv->hw->wiphy, true);
1814
1815 iwl_enable_interrupts(priv);
1816 IWL_WARN(priv, "Radio disabled by HW RF Kill switch\n");
1817 return 0;
1818 }
1819
1820 iwl_write32(priv, CSR_INT, 0xFFFFFFFF);
1821
1822 ret = iwl_hw_nic_init(priv);
1823 if (ret) {
1824 IWL_ERR(priv, "Unable to init nic\n");
1825 return ret;
1826 }
1827
1828 /* make sure rfkill handshake bits are cleared */
1829 iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
1830 iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR,
1831 CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
1832
1833 /* clear (again), then enable host interrupts */
1834 iwl_write32(priv, CSR_INT, 0xFFFFFFFF);
1835 iwl_enable_interrupts(priv);
1836
1837 /* really make sure rfkill handshake bits are cleared */
1838 iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
1839 iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
1840
1841 /* Copy original ucode data image from disk into backup cache.
1842 * This will be used to initialize the on-board processor's
1843 * data SRAM for a clean start when the runtime program first loads. */
1844 memcpy(priv->ucode_data_backup.v_addr, priv->ucode_data.v_addr,
1845 priv->ucode_data.len);
1846
1847 for (i = 0; i < MAX_HW_RESTARTS; i++) {
1848
1849 iwl_clear_stations_table(priv);
1850
1851 /* load bootstrap state machine,
1852 * load bootstrap program into processor's memory,
1853 * prepare to load the "initialize" uCode */
1854 ret = priv->cfg->ops->lib->load_ucode(priv);
1855
1856 if (ret) {
1857 IWL_ERR(priv, "Unable to set up bootstrap uCode: %d\n",
1858 ret);
1859 continue;
1860 }
1861
1862 /* start card; "initialize" will load runtime ucode */
1863 iwl_nic_start(priv);
1864
1865 /* Just finish download Init or Runtime uCode image to device
1866 * now we wait here for uCode send REPLY_ALIVE notification
1867 * to indicate uCode is ready.
1868 * 1) For Init uCode image, all iwlagn devices should wait here
1869 * on STATUS_INIT_UCODE_ALIVE status bit; if timeout before
1870 * receive the REPLY_ALIVE notification, go back and try to
1871 * download the Init uCode image again.
1872 * 2) For Runtime uCode image, all iwlagn devices except 4965
1873 * wait here on STATUS_RT_UCODE_ALIVE status bit; if
1874 * timeout before receive the REPLY_ALIVE notification, go back
1875 * and download the Runtime uCode image again.
1876 * 3) For 4965 Runtime uCode, it will not go through this path,
1877 * need to wait for STATUS_RT_UCODE_ALIVE status bit in
1878 * iwl4965_init_alive_start() function; if timeout, need to
1879 * restart and download Init uCode image.
1880 */
1881 if (priv->ucode_type == UCODE_INIT)
1882 status = STATUS_INIT_UCODE_ALIVE;
1883 else
1884 status = STATUS_RT_UCODE_ALIVE;
1885 if (test_bit(status, &priv->status)) {
1886 IWL_WARN(priv,
1887 "%s uCode already alive? "
1888 "Waiting for alive anyway\n",
1889 (status == STATUS_INIT_UCODE_ALIVE)
1890 ? "INIT" : "Runtime");
1891 clear_bit(status, &priv->status);
1892 }
1893 ret = wait_event_interruptible_timeout(
1894 priv->wait_command_queue,
1895 test_bit(status, &priv->status),
1896 UCODE_ALIVE_TIMEOUT);
1897 if (!ret) {
1898 if (!test_bit(status, &priv->status)) {
1899 priv->ucode_type =
1900 (status == STATUS_INIT_UCODE_ALIVE)
1901 ? UCODE_NONE : UCODE_INIT;
1902 IWL_ERR(priv,
1903 "%s timeout after %dms\n",
1904 (status == STATUS_INIT_UCODE_ALIVE)
1905 ? "INIT" : "Runtime",
1906 jiffies_to_msecs(UCODE_ALIVE_TIMEOUT));
1907 continue;
1908 }
1909 }
1910 IWL_DEBUG_INFO(priv, DRV_NAME " is coming up\n");
1911
1912 return 0;
1913 }
1914
1915 set_bit(STATUS_EXIT_PENDING, &priv->status);
1916 __iwl_down(priv);
1917 clear_bit(STATUS_EXIT_PENDING, &priv->status);
1918
1919 /* tried to restart and config the device for as long as our
1920 * patience could withstand */
1921 IWL_ERR(priv, "Unable to initialize device after %d attempts.\n", i);
1922 return -EIO;
1923 }
1924
1925
1926 /*****************************************************************************
1927 *
1928 * Workqueue callbacks
1929 *
1930 *****************************************************************************/
1931
1932 static void iwl_bg_init_alive_start(struct work_struct *data)
1933 {
1934 struct iwl_priv *priv =
1935 container_of(data, struct iwl_priv, init_alive_start.work);
1936
1937 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
1938 return;
1939
1940 mutex_lock(&priv->mutex);
1941 priv->cfg->ops->lib->init_alive_start(priv);
1942 mutex_unlock(&priv->mutex);
1943 }
1944
1945 static void iwl_bg_alive_start(struct work_struct *data)
1946 {
1947 struct iwl_priv *priv =
1948 container_of(data, struct iwl_priv, alive_start.work);
1949
1950 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
1951 return;
1952
1953 /* enable dram interrupt */
1954 iwl_reset_ict(priv);
1955
1956 mutex_lock(&priv->mutex);
1957 iwl_alive_start(priv);
1958 mutex_unlock(&priv->mutex);
1959 }
1960
1961 static void iwl_bg_run_time_calib_work(struct work_struct *work)
1962 {
1963 struct iwl_priv *priv = container_of(work, struct iwl_priv,
1964 run_time_calib_work);
1965
1966 mutex_lock(&priv->mutex);
1967
1968 if (test_bit(STATUS_EXIT_PENDING, &priv->status) ||
1969 test_bit(STATUS_SCANNING, &priv->status)) {
1970 mutex_unlock(&priv->mutex);
1971 return;
1972 }
1973
1974 if (priv->start_calib) {
1975 iwl_chain_noise_calibration(priv, &priv->statistics);
1976
1977 iwl_sensitivity_calibration(priv, &priv->statistics);
1978 }
1979
1980 mutex_unlock(&priv->mutex);
1981 return;
1982 }
1983
1984 static void iwl_bg_up(struct work_struct *data)
1985 {
1986 struct iwl_priv *priv = container_of(data, struct iwl_priv, up);
1987
1988 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
1989 return;
1990
1991 mutex_lock(&priv->mutex);
1992 __iwl_up(priv);
1993 mutex_unlock(&priv->mutex);
1994 }
1995
1996 static void iwl_bg_restart(struct work_struct *data)
1997 {
1998 struct iwl_priv *priv = container_of(data, struct iwl_priv, restart);
1999
2000 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2001 return;
2002
2003 if (test_and_clear_bit(STATUS_FW_ERROR, &priv->status)) {
2004 mutex_lock(&priv->mutex);
2005 priv->vif = NULL;
2006 priv->is_open = 0;
2007 mutex_unlock(&priv->mutex);
2008 iwl_down(priv);
2009 ieee80211_restart_hw(priv->hw);
2010 } else {
2011 iwl_down(priv);
2012 queue_work(priv->workqueue, &priv->up);
2013 }
2014 }
2015
2016 static void iwl_bg_rx_replenish(struct work_struct *data)
2017 {
2018 struct iwl_priv *priv =
2019 container_of(data, struct iwl_priv, rx_replenish);
2020
2021 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2022 return;
2023
2024 mutex_lock(&priv->mutex);
2025 iwl_rx_replenish(priv);
2026 mutex_unlock(&priv->mutex);
2027 }
2028
2029 #define IWL_DELAY_NEXT_SCAN (HZ*2)
2030
2031 void iwl_post_associate(struct iwl_priv *priv)
2032 {
2033 struct ieee80211_conf *conf = NULL;
2034 int ret = 0;
2035 unsigned long flags;
2036
2037 if (priv->iw_mode == NL80211_IFTYPE_AP) {
2038 IWL_ERR(priv, "%s Should not be called in AP mode\n", __func__);
2039 return;
2040 }
2041
2042 IWL_DEBUG_ASSOC(priv, "Associated as %d to: %pM\n",
2043 priv->assoc_id, priv->active_rxon.bssid_addr);
2044
2045
2046 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2047 return;
2048
2049
2050 if (!priv->vif || !priv->is_open)
2051 return;
2052
2053 iwl_scan_cancel_timeout(priv, 200);
2054
2055 conf = ieee80211_get_hw_conf(priv->hw);
2056
2057 priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
2058 iwlcore_commit_rxon(priv);
2059
2060 iwl_setup_rxon_timing(priv);
2061 ret = iwl_send_cmd_pdu(priv, REPLY_RXON_TIMING,
2062 sizeof(priv->rxon_timing), &priv->rxon_timing);
2063 if (ret)
2064 IWL_WARN(priv, "REPLY_RXON_TIMING failed - "
2065 "Attempting to continue.\n");
2066
2067 priv->staging_rxon.filter_flags |= RXON_FILTER_ASSOC_MSK;
2068
2069 iwl_set_rxon_ht(priv, &priv->current_ht_config);
2070
2071 if (priv->cfg->ops->hcmd->set_rxon_chain)
2072 priv->cfg->ops->hcmd->set_rxon_chain(priv);
2073
2074 priv->staging_rxon.assoc_id = cpu_to_le16(priv->assoc_id);
2075
2076 IWL_DEBUG_ASSOC(priv, "assoc id %d beacon interval %d\n",
2077 priv->assoc_id, priv->beacon_int);
2078
2079 if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_PREAMBLE)
2080 priv->staging_rxon.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
2081 else
2082 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
2083
2084 if (priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) {
2085 if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_SLOT_TIME)
2086 priv->staging_rxon.flags |= RXON_FLG_SHORT_SLOT_MSK;
2087 else
2088 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
2089
2090 if (priv->iw_mode == NL80211_IFTYPE_ADHOC)
2091 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
2092
2093 }
2094
2095 iwlcore_commit_rxon(priv);
2096
2097 switch (priv->iw_mode) {
2098 case NL80211_IFTYPE_STATION:
2099 break;
2100
2101 case NL80211_IFTYPE_ADHOC:
2102
2103 /* assume default assoc id */
2104 priv->assoc_id = 1;
2105
2106 iwl_rxon_add_station(priv, priv->bssid, 0);
2107 iwl_send_beacon_cmd(priv);
2108
2109 break;
2110
2111 default:
2112 IWL_ERR(priv, "%s Should not be called in %d mode\n",
2113 __func__, priv->iw_mode);
2114 break;
2115 }
2116
2117 if (priv->iw_mode == NL80211_IFTYPE_ADHOC)
2118 priv->assoc_station_added = 1;
2119
2120 spin_lock_irqsave(&priv->lock, flags);
2121 iwl_activate_qos(priv, 0);
2122 spin_unlock_irqrestore(&priv->lock, flags);
2123
2124 /* the chain noise calibration will enabled PM upon completion
2125 * If chain noise has already been run, then we need to enable
2126 * power management here */
2127 if (priv->chain_noise_data.state == IWL_CHAIN_NOISE_DONE)
2128 iwl_power_update_mode(priv, 0);
2129
2130 /* Enable Rx differential gain and sensitivity calibrations */
2131 iwl_chain_noise_reset(priv);
2132 priv->start_calib = 1;
2133
2134 }
2135
2136 /*****************************************************************************
2137 *
2138 * mac80211 entry point functions
2139 *
2140 *****************************************************************************/
2141
2142 #define UCODE_READY_TIMEOUT (4 * HZ)
2143
2144 static int iwl_mac_start(struct ieee80211_hw *hw)
2145 {
2146 struct iwl_priv *priv = hw->priv;
2147 int ret;
2148
2149 IWL_DEBUG_MAC80211(priv, "enter\n");
2150
2151 /* we should be verifying the device is ready to be opened */
2152 mutex_lock(&priv->mutex);
2153
2154 /* fetch ucode file from disk, alloc and copy to bus-master buffers ...
2155 * ucode filename and max sizes are card-specific. */
2156
2157 if (!priv->ucode_code.len) {
2158 ret = iwl_read_ucode(priv);
2159 if (ret) {
2160 IWL_ERR(priv, "Could not read microcode: %d\n", ret);
2161 mutex_unlock(&priv->mutex);
2162 return ret;
2163 }
2164 }
2165
2166 ret = __iwl_up(priv);
2167
2168 mutex_unlock(&priv->mutex);
2169
2170 if (ret)
2171 return ret;
2172
2173 if (iwl_is_rfkill(priv))
2174 goto out;
2175
2176 IWL_DEBUG_INFO(priv, "Start UP work done.\n");
2177
2178 /* Wait for START_ALIVE from Run Time ucode. Otherwise callbacks from
2179 * mac80211 will not be run successfully. */
2180 ret = wait_event_interruptible_timeout(priv->wait_command_queue,
2181 test_bit(STATUS_READY, &priv->status),
2182 UCODE_READY_TIMEOUT);
2183 if (!ret) {
2184 if (!test_bit(STATUS_READY, &priv->status)) {
2185 IWL_ERR(priv, "START_ALIVE timeout after %dms.\n",
2186 jiffies_to_msecs(UCODE_READY_TIMEOUT));
2187 return -ETIMEDOUT;
2188 }
2189 }
2190
2191 out:
2192 priv->is_open = 1;
2193 IWL_DEBUG_MAC80211(priv, "leave\n");
2194 return 0;
2195 }
2196
2197 static void iwl_mac_stop(struct ieee80211_hw *hw)
2198 {
2199 struct iwl_priv *priv = hw->priv;
2200
2201 IWL_DEBUG_MAC80211(priv, "enter\n");
2202
2203 if (!priv->is_open)
2204 return;
2205
2206 priv->is_open = 0;
2207
2208 if (iwl_is_ready_rf(priv)) {
2209 /* stop mac, cancel any scan request and clear
2210 * RXON_FILTER_ASSOC_MSK BIT
2211 */
2212 mutex_lock(&priv->mutex);
2213 iwl_scan_cancel_timeout(priv, 100);
2214 mutex_unlock(&priv->mutex);
2215 }
2216
2217 iwl_down(priv);
2218
2219 flush_workqueue(priv->workqueue);
2220
2221 /* enable interrupts again in order to receive rfkill changes */
2222 iwl_write32(priv, CSR_INT, 0xFFFFFFFF);
2223 iwl_enable_interrupts(priv);
2224
2225 IWL_DEBUG_MAC80211(priv, "leave\n");
2226 }
2227
2228 static int iwl_mac_tx(struct ieee80211_hw *hw, struct sk_buff *skb)
2229 {
2230 struct iwl_priv *priv = hw->priv;
2231
2232 IWL_DEBUG_MACDUMP(priv, "enter\n");
2233
2234 IWL_DEBUG_TX(priv, "dev->xmit(%d bytes) at rate 0x%02x\n", skb->len,
2235 ieee80211_get_tx_rate(hw, IEEE80211_SKB_CB(skb))->bitrate);
2236
2237 if (iwl_tx_skb(priv, skb))
2238 dev_kfree_skb_any(skb);
2239
2240 IWL_DEBUG_MACDUMP(priv, "leave\n");
2241 return NETDEV_TX_OK;
2242 }
2243
2244 void iwl_config_ap(struct iwl_priv *priv)
2245 {
2246 int ret = 0;
2247 unsigned long flags;
2248
2249 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2250 return;
2251
2252 /* The following should be done only at AP bring up */
2253 if (!iwl_is_associated(priv)) {
2254
2255 /* RXON - unassoc (to set timing command) */
2256 priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
2257 iwlcore_commit_rxon(priv);
2258
2259 /* RXON Timing */
2260 iwl_setup_rxon_timing(priv);
2261 ret = iwl_send_cmd_pdu(priv, REPLY_RXON_TIMING,
2262 sizeof(priv->rxon_timing), &priv->rxon_timing);
2263 if (ret)
2264 IWL_WARN(priv, "REPLY_RXON_TIMING failed - "
2265 "Attempting to continue.\n");
2266
2267 if (priv->cfg->ops->hcmd->set_rxon_chain)
2268 priv->cfg->ops->hcmd->set_rxon_chain(priv);
2269
2270 /* FIXME: what should be the assoc_id for AP? */
2271 priv->staging_rxon.assoc_id = cpu_to_le16(priv->assoc_id);
2272 if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_PREAMBLE)
2273 priv->staging_rxon.flags |=
2274 RXON_FLG_SHORT_PREAMBLE_MSK;
2275 else
2276 priv->staging_rxon.flags &=
2277 ~RXON_FLG_SHORT_PREAMBLE_MSK;
2278
2279 if (priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) {
2280 if (priv->assoc_capability &
2281 WLAN_CAPABILITY_SHORT_SLOT_TIME)
2282 priv->staging_rxon.flags |=
2283 RXON_FLG_SHORT_SLOT_MSK;
2284 else
2285 priv->staging_rxon.flags &=
2286 ~RXON_FLG_SHORT_SLOT_MSK;
2287
2288 if (priv->iw_mode == NL80211_IFTYPE_ADHOC)
2289 priv->staging_rxon.flags &=
2290 ~RXON_FLG_SHORT_SLOT_MSK;
2291 }
2292 /* restore RXON assoc */
2293 priv->staging_rxon.filter_flags |= RXON_FILTER_ASSOC_MSK;
2294 iwlcore_commit_rxon(priv);
2295 spin_lock_irqsave(&priv->lock, flags);
2296 iwl_activate_qos(priv, 1);
2297 spin_unlock_irqrestore(&priv->lock, flags);
2298 iwl_rxon_add_station(priv, iwl_bcast_addr, 0);
2299 }
2300 iwl_send_beacon_cmd(priv);
2301
2302 /* FIXME - we need to add code here to detect a totally new
2303 * configuration, reset the AP, unassoc, rxon timing, assoc,
2304 * clear sta table, add BCAST sta... */
2305 }
2306
2307 static void iwl_mac_update_tkip_key(struct ieee80211_hw *hw,
2308 struct ieee80211_key_conf *keyconf, const u8 *addr,
2309 u32 iv32, u16 *phase1key)
2310 {
2311
2312 struct iwl_priv *priv = hw->priv;
2313 IWL_DEBUG_MAC80211(priv, "enter\n");
2314
2315 iwl_update_tkip_key(priv, keyconf, addr, iv32, phase1key);
2316
2317 IWL_DEBUG_MAC80211(priv, "leave\n");
2318 }
2319
2320 static int iwl_mac_set_key(struct ieee80211_hw *hw, enum set_key_cmd cmd,
2321 struct ieee80211_vif *vif,
2322 struct ieee80211_sta *sta,
2323 struct ieee80211_key_conf *key)
2324 {
2325 struct iwl_priv *priv = hw->priv;
2326 const u8 *addr;
2327 int ret;
2328 u8 sta_id;
2329 bool is_default_wep_key = false;
2330
2331 IWL_DEBUG_MAC80211(priv, "enter\n");
2332
2333 if (priv->cfg->mod_params->sw_crypto) {
2334 IWL_DEBUG_MAC80211(priv, "leave - hwcrypto disabled\n");
2335 return -EOPNOTSUPP;
2336 }
2337 addr = sta ? sta->addr : iwl_bcast_addr;
2338 sta_id = iwl_find_station(priv, addr);
2339 if (sta_id == IWL_INVALID_STATION) {
2340 IWL_DEBUG_MAC80211(priv, "leave - %pM not in station map.\n",
2341 addr);
2342 return -EINVAL;
2343
2344 }
2345
2346 mutex_lock(&priv->mutex);
2347 iwl_scan_cancel_timeout(priv, 100);
2348 mutex_unlock(&priv->mutex);
2349
2350 /* If we are getting WEP group key and we didn't receive any key mapping
2351 * so far, we are in legacy wep mode (group key only), otherwise we are
2352 * in 1X mode.
2353 * In legacy wep mode, we use another host command to the uCode */
2354 if (key->alg == ALG_WEP && sta_id == priv->hw_params.bcast_sta_id &&
2355 priv->iw_mode != NL80211_IFTYPE_AP) {
2356 if (cmd == SET_KEY)
2357 is_default_wep_key = !priv->key_mapping_key;
2358 else
2359 is_default_wep_key =
2360 (key->hw_key_idx == HW_KEY_DEFAULT);
2361 }
2362
2363 switch (cmd) {
2364 case SET_KEY:
2365 if (is_default_wep_key)
2366 ret = iwl_set_default_wep_key(priv, key);
2367 else
2368 ret = iwl_set_dynamic_key(priv, key, sta_id);
2369
2370 IWL_DEBUG_MAC80211(priv, "enable hwcrypto key\n");
2371 break;
2372 case DISABLE_KEY:
2373 if (is_default_wep_key)
2374 ret = iwl_remove_default_wep_key(priv, key);
2375 else
2376 ret = iwl_remove_dynamic_key(priv, key, sta_id);
2377
2378 IWL_DEBUG_MAC80211(priv, "disable hwcrypto key\n");
2379 break;
2380 default:
2381 ret = -EINVAL;
2382 }
2383
2384 IWL_DEBUG_MAC80211(priv, "leave\n");
2385
2386 return ret;
2387 }
2388
2389 static int iwl_mac_ampdu_action(struct ieee80211_hw *hw,
2390 enum ieee80211_ampdu_mlme_action action,
2391 struct ieee80211_sta *sta, u16 tid, u16 *ssn)
2392 {
2393 struct iwl_priv *priv = hw->priv;
2394 int ret;
2395
2396 IWL_DEBUG_HT(priv, "A-MPDU action on addr %pM tid %d\n",
2397 sta->addr, tid);
2398
2399 if (!(priv->cfg->sku & IWL_SKU_N))
2400 return -EACCES;
2401
2402 switch (action) {
2403 case IEEE80211_AMPDU_RX_START:
2404 IWL_DEBUG_HT(priv, "start Rx\n");
2405 return iwl_sta_rx_agg_start(priv, sta->addr, tid, *ssn);
2406 case IEEE80211_AMPDU_RX_STOP:
2407 IWL_DEBUG_HT(priv, "stop Rx\n");
2408 ret = iwl_sta_rx_agg_stop(priv, sta->addr, tid);
2409 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2410 return 0;
2411 else
2412 return ret;
2413 case IEEE80211_AMPDU_TX_START:
2414 IWL_DEBUG_HT(priv, "start Tx\n");
2415 return iwl_tx_agg_start(priv, sta->addr, tid, ssn);
2416 case IEEE80211_AMPDU_TX_STOP:
2417 IWL_DEBUG_HT(priv, "stop Tx\n");
2418 ret = iwl_tx_agg_stop(priv, sta->addr, tid);
2419 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2420 return 0;
2421 else
2422 return ret;
2423 default:
2424 IWL_DEBUG_HT(priv, "unknown\n");
2425 return -EINVAL;
2426 break;
2427 }
2428 return 0;
2429 }
2430
2431 static int iwl_mac_get_stats(struct ieee80211_hw *hw,
2432 struct ieee80211_low_level_stats *stats)
2433 {
2434 struct iwl_priv *priv = hw->priv;
2435
2436 priv = hw->priv;
2437 IWL_DEBUG_MAC80211(priv, "enter\n");
2438 IWL_DEBUG_MAC80211(priv, "leave\n");
2439
2440 return 0;
2441 }
2442
2443 /*****************************************************************************
2444 *
2445 * sysfs attributes
2446 *
2447 *****************************************************************************/
2448
2449 #ifdef CONFIG_IWLWIFI_DEBUG
2450
2451 /*
2452 * The following adds a new attribute to the sysfs representation
2453 * of this device driver (i.e. a new file in /sys/class/net/wlan0/device/)
2454 * used for controlling the debug level.
2455 *
2456 * See the level definitions in iwl for details.
2457 *
2458 * The debug_level being managed using sysfs below is a per device debug
2459 * level that is used instead of the global debug level if it (the per
2460 * device debug level) is set.
2461 */
2462 static ssize_t show_debug_level(struct device *d,
2463 struct device_attribute *attr, char *buf)
2464 {
2465 struct iwl_priv *priv = dev_get_drvdata(d);
2466 return sprintf(buf, "0x%08X\n", iwl_get_debug_level(priv));
2467 }
2468 static ssize_t store_debug_level(struct device *d,
2469 struct device_attribute *attr,
2470 const char *buf, size_t count)
2471 {
2472 struct iwl_priv *priv = dev_get_drvdata(d);
2473 unsigned long val;
2474 int ret;
2475
2476 ret = strict_strtoul(buf, 0, &val);
2477 if (ret)
2478 IWL_ERR(priv, "%s is not in hex or decimal form.\n", buf);
2479 else
2480 priv->debug_level = val;
2481
2482 return strnlen(buf, count);
2483 }
2484
2485 static DEVICE_ATTR(debug_level, S_IWUSR | S_IRUGO,
2486 show_debug_level, store_debug_level);
2487
2488
2489 #endif /* CONFIG_IWLWIFI_DEBUG */
2490
2491
2492 static ssize_t show_temperature(struct device *d,
2493 struct device_attribute *attr, char *buf)
2494 {
2495 struct iwl_priv *priv = dev_get_drvdata(d);
2496
2497 if (!iwl_is_alive(priv))
2498 return -EAGAIN;
2499
2500 return sprintf(buf, "%d\n", priv->temperature);
2501 }
2502
2503 static DEVICE_ATTR(temperature, S_IRUGO, show_temperature, NULL);
2504
2505 static ssize_t show_tx_power(struct device *d,
2506 struct device_attribute *attr, char *buf)
2507 {
2508 struct iwl_priv *priv = dev_get_drvdata(d);
2509
2510 if (!iwl_is_ready_rf(priv))
2511 return sprintf(buf, "off\n");
2512 else
2513 return sprintf(buf, "%d\n", priv->tx_power_user_lmt);
2514 }
2515
2516 static ssize_t store_tx_power(struct device *d,
2517 struct device_attribute *attr,
2518 const char *buf, size_t count)
2519 {
2520 struct iwl_priv *priv = dev_get_drvdata(d);
2521 unsigned long val;
2522 int ret;
2523
2524 ret = strict_strtoul(buf, 10, &val);
2525 if (ret)
2526 IWL_INFO(priv, "%s is not in decimal form.\n", buf);
2527 else
2528 iwl_set_tx_power(priv, val, false);
2529
2530 return count;
2531 }
2532
2533 static DEVICE_ATTR(tx_power, S_IWUSR | S_IRUGO, show_tx_power, store_tx_power);
2534
2535 static ssize_t show_flags(struct device *d,
2536 struct device_attribute *attr, char *buf)
2537 {
2538 struct iwl_priv *priv = dev_get_drvdata(d);
2539
2540 return sprintf(buf, "0x%04X\n", priv->active_rxon.flags);
2541 }
2542
2543 static ssize_t store_flags(struct device *d,
2544 struct device_attribute *attr,
2545 const char *buf, size_t count)
2546 {
2547 struct iwl_priv *priv = dev_get_drvdata(d);
2548 unsigned long val;
2549 u32 flags;
2550 int ret = strict_strtoul(buf, 0, &val);
2551 if (ret)
2552 return ret;
2553 flags = (u32)val;
2554
2555 mutex_lock(&priv->mutex);
2556 if (le32_to_cpu(priv->staging_rxon.flags) != flags) {
2557 /* Cancel any currently running scans... */
2558 if (iwl_scan_cancel_timeout(priv, 100))
2559 IWL_WARN(priv, "Could not cancel scan.\n");
2560 else {
2561 IWL_DEBUG_INFO(priv, "Commit rxon.flags = 0x%04X\n", flags);
2562 priv->staging_rxon.flags = cpu_to_le32(flags);
2563 iwlcore_commit_rxon(priv);
2564 }
2565 }
2566 mutex_unlock(&priv->mutex);
2567
2568 return count;
2569 }
2570
2571 static DEVICE_ATTR(flags, S_IWUSR | S_IRUGO, show_flags, store_flags);
2572
2573 static ssize_t show_filter_flags(struct device *d,
2574 struct device_attribute *attr, char *buf)
2575 {
2576 struct iwl_priv *priv = dev_get_drvdata(d);
2577
2578 return sprintf(buf, "0x%04X\n",
2579 le32_to_cpu(priv->active_rxon.filter_flags));
2580 }
2581
2582 static ssize_t store_filter_flags(struct device *d,
2583 struct device_attribute *attr,
2584 const char *buf, size_t count)
2585 {
2586 struct iwl_priv *priv = dev_get_drvdata(d);
2587 unsigned long val;
2588 u32 filter_flags;
2589 int ret = strict_strtoul(buf, 0, &val);
2590 if (ret)
2591 return ret;
2592 filter_flags = (u32)val;
2593
2594 mutex_lock(&priv->mutex);
2595 if (le32_to_cpu(priv->staging_rxon.filter_flags) != filter_flags) {
2596 /* Cancel any currently running scans... */
2597 if (iwl_scan_cancel_timeout(priv, 100))
2598 IWL_WARN(priv, "Could not cancel scan.\n");
2599 else {
2600 IWL_DEBUG_INFO(priv, "Committing rxon.filter_flags = "
2601 "0x%04X\n", filter_flags);
2602 priv->staging_rxon.filter_flags =
2603 cpu_to_le32(filter_flags);
2604 iwlcore_commit_rxon(priv);
2605 }
2606 }
2607 mutex_unlock(&priv->mutex);
2608
2609 return count;
2610 }
2611
2612 static DEVICE_ATTR(filter_flags, S_IWUSR | S_IRUGO, show_filter_flags,
2613 store_filter_flags);
2614
2615 static ssize_t store_power_level(struct device *d,
2616 struct device_attribute *attr,
2617 const char *buf, size_t count)
2618 {
2619 struct iwl_priv *priv = dev_get_drvdata(d);
2620 int ret;
2621 unsigned long mode;
2622
2623
2624 mutex_lock(&priv->mutex);
2625
2626 ret = strict_strtoul(buf, 10, &mode);
2627 if (ret)
2628 goto out;
2629
2630 ret = iwl_power_set_user_mode(priv, mode);
2631 if (ret) {
2632 IWL_DEBUG_MAC80211(priv, "failed setting power mode.\n");
2633 goto out;
2634 }
2635 ret = count;
2636
2637 out:
2638 mutex_unlock(&priv->mutex);
2639 return ret;
2640 }
2641
2642 static ssize_t show_power_level(struct device *d,
2643 struct device_attribute *attr, char *buf)
2644 {
2645 struct iwl_priv *priv = dev_get_drvdata(d);
2646 int level = priv->power_data.power_mode;
2647 char *p = buf;
2648
2649 p += sprintf(p, "%d\n", level);
2650 return p - buf + 1;
2651 }
2652
2653 static DEVICE_ATTR(power_level, S_IWUSR | S_IRUSR, show_power_level,
2654 store_power_level);
2655
2656
2657 static ssize_t show_statistics(struct device *d,
2658 struct device_attribute *attr, char *buf)
2659 {
2660 struct iwl_priv *priv = dev_get_drvdata(d);
2661 u32 size = sizeof(struct iwl_notif_statistics);
2662 u32 len = 0, ofs = 0;
2663 u8 *data = (u8 *)&priv->statistics;
2664 int rc = 0;
2665
2666 if (!iwl_is_alive(priv))
2667 return -EAGAIN;
2668
2669 mutex_lock(&priv->mutex);
2670 rc = iwl_send_statistics_request(priv, 0);
2671 mutex_unlock(&priv->mutex);
2672
2673 if (rc) {
2674 len = sprintf(buf,
2675 "Error sending statistics request: 0x%08X\n", rc);
2676 return len;
2677 }
2678
2679 while (size && (PAGE_SIZE - len)) {
2680 hex_dump_to_buffer(data + ofs, size, 16, 1, buf + len,
2681 PAGE_SIZE - len, 1);
2682 len = strlen(buf);
2683 if (PAGE_SIZE - len)
2684 buf[len++] = '\n';
2685
2686 ofs += 16;
2687 size -= min(size, 16U);
2688 }
2689
2690 return len;
2691 }
2692
2693 static DEVICE_ATTR(statistics, S_IRUGO, show_statistics, NULL);
2694
2695
2696 /*****************************************************************************
2697 *
2698 * driver setup and teardown
2699 *
2700 *****************************************************************************/
2701
2702 static void iwl_setup_deferred_work(struct iwl_priv *priv)
2703 {
2704 priv->workqueue = create_singlethread_workqueue(DRV_NAME);
2705
2706 init_waitqueue_head(&priv->wait_command_queue);
2707
2708 INIT_WORK(&priv->up, iwl_bg_up);
2709 INIT_WORK(&priv->restart, iwl_bg_restart);
2710 INIT_WORK(&priv->rx_replenish, iwl_bg_rx_replenish);
2711 INIT_WORK(&priv->beacon_update, iwl_bg_beacon_update);
2712 INIT_WORK(&priv->run_time_calib_work, iwl_bg_run_time_calib_work);
2713 INIT_DELAYED_WORK(&priv->init_alive_start, iwl_bg_init_alive_start);
2714 INIT_DELAYED_WORK(&priv->alive_start, iwl_bg_alive_start);
2715
2716 iwl_setup_scan_deferred_work(priv);
2717
2718 if (priv->cfg->ops->lib->setup_deferred_work)
2719 priv->cfg->ops->lib->setup_deferred_work(priv);
2720
2721 init_timer(&priv->statistics_periodic);
2722 priv->statistics_periodic.data = (unsigned long)priv;
2723 priv->statistics_periodic.function = iwl_bg_statistics_periodic;
2724
2725 if (!priv->cfg->use_isr_legacy)
2726 tasklet_init(&priv->irq_tasklet, (void (*)(unsigned long))
2727 iwl_irq_tasklet, (unsigned long)priv);
2728 else
2729 tasklet_init(&priv->irq_tasklet, (void (*)(unsigned long))
2730 iwl_irq_tasklet_legacy, (unsigned long)priv);
2731 }
2732
2733 static void iwl_cancel_deferred_work(struct iwl_priv *priv)
2734 {
2735 if (priv->cfg->ops->lib->cancel_deferred_work)
2736 priv->cfg->ops->lib->cancel_deferred_work(priv);
2737
2738 cancel_delayed_work_sync(&priv->init_alive_start);
2739 cancel_delayed_work(&priv->scan_check);
2740 cancel_delayed_work(&priv->alive_start);
2741 cancel_work_sync(&priv->beacon_update);
2742 del_timer_sync(&priv->statistics_periodic);
2743 }
2744
2745 static struct attribute *iwl_sysfs_entries[] = {
2746 &dev_attr_flags.attr,
2747 &dev_attr_filter_flags.attr,
2748 &dev_attr_power_level.attr,
2749 &dev_attr_statistics.attr,
2750 &dev_attr_temperature.attr,
2751 &dev_attr_tx_power.attr,
2752 #ifdef CONFIG_IWLWIFI_DEBUG
2753 &dev_attr_debug_level.attr,
2754 #endif
2755 NULL
2756 };
2757
2758 static struct attribute_group iwl_attribute_group = {
2759 .name = NULL, /* put in device directory */
2760 .attrs = iwl_sysfs_entries,
2761 };
2762
2763 static struct ieee80211_ops iwl_hw_ops = {
2764 .tx = iwl_mac_tx,
2765 .start = iwl_mac_start,
2766 .stop = iwl_mac_stop,
2767 .add_interface = iwl_mac_add_interface,
2768 .remove_interface = iwl_mac_remove_interface,
2769 .config = iwl_mac_config,
2770 .configure_filter = iwl_configure_filter,
2771 .set_key = iwl_mac_set_key,
2772 .update_tkip_key = iwl_mac_update_tkip_key,
2773 .get_stats = iwl_mac_get_stats,
2774 .get_tx_stats = iwl_mac_get_tx_stats,
2775 .conf_tx = iwl_mac_conf_tx,
2776 .reset_tsf = iwl_mac_reset_tsf,
2777 .bss_info_changed = iwl_bss_info_changed,
2778 .ampdu_action = iwl_mac_ampdu_action,
2779 .hw_scan = iwl_mac_hw_scan
2780 };
2781
2782 static int iwl_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
2783 {
2784 int err = 0;
2785 struct iwl_priv *priv;
2786 struct ieee80211_hw *hw;
2787 struct iwl_cfg *cfg = (struct iwl_cfg *)(ent->driver_data);
2788 unsigned long flags;
2789 u16 pci_cmd;
2790
2791 /************************
2792 * 1. Allocating HW data
2793 ************************/
2794
2795 /* Disabling hardware scan means that mac80211 will perform scans
2796 * "the hard way", rather than using device's scan. */
2797 if (cfg->mod_params->disable_hw_scan) {
2798 if (iwl_debug_level & IWL_DL_INFO)
2799 dev_printk(KERN_DEBUG, &(pdev->dev),
2800 "Disabling hw_scan\n");
2801 iwl_hw_ops.hw_scan = NULL;
2802 }
2803
2804 hw = iwl_alloc_all(cfg, &iwl_hw_ops);
2805 if (!hw) {
2806 err = -ENOMEM;
2807 goto out;
2808 }
2809 priv = hw->priv;
2810 /* At this point both hw and priv are allocated. */
2811
2812 SET_IEEE80211_DEV(hw, &pdev->dev);
2813
2814 IWL_DEBUG_INFO(priv, "*** LOAD DRIVER ***\n");
2815 priv->cfg = cfg;
2816 priv->pci_dev = pdev;
2817 priv->inta_mask = CSR_INI_SET_MASK;
2818
2819 #ifdef CONFIG_IWLWIFI_DEBUG
2820 atomic_set(&priv->restrict_refcnt, 0);
2821 #endif
2822
2823 /**************************
2824 * 2. Initializing PCI bus
2825 **************************/
2826 if (pci_enable_device(pdev)) {
2827 err = -ENODEV;
2828 goto out_ieee80211_free_hw;
2829 }
2830
2831 pci_set_master(pdev);
2832
2833 err = pci_set_dma_mask(pdev, DMA_BIT_MASK(36));
2834 if (!err)
2835 err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(36));
2836 if (err) {
2837 err = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
2838 if (!err)
2839 err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32));
2840 /* both attempts failed: */
2841 if (err) {
2842 IWL_WARN(priv, "No suitable DMA available.\n");
2843 goto out_pci_disable_device;
2844 }
2845 }
2846
2847 err = pci_request_regions(pdev, DRV_NAME);
2848 if (err)
2849 goto out_pci_disable_device;
2850
2851 pci_set_drvdata(pdev, priv);
2852
2853
2854 /***********************
2855 * 3. Read REV register
2856 ***********************/
2857 priv->hw_base = pci_iomap(pdev, 0, 0);
2858 if (!priv->hw_base) {
2859 err = -ENODEV;
2860 goto out_pci_release_regions;
2861 }
2862
2863 IWL_DEBUG_INFO(priv, "pci_resource_len = 0x%08llx\n",
2864 (unsigned long long) pci_resource_len(pdev, 0));
2865 IWL_DEBUG_INFO(priv, "pci_resource_base = %p\n", priv->hw_base);
2866
2867 /* this spin lock will be used in apm_ops.init and EEPROM access
2868 * we should init now
2869 */
2870 spin_lock_init(&priv->reg_lock);
2871 iwl_hw_detect(priv);
2872 IWL_INFO(priv, "Detected Intel Wireless WiFi Link %s REV=0x%X\n",
2873 priv->cfg->name, priv->hw_rev);
2874
2875 /* We disable the RETRY_TIMEOUT register (0x41) to keep
2876 * PCI Tx retries from interfering with C3 CPU state */
2877 pci_write_config_byte(pdev, PCI_CFG_RETRY_TIMEOUT, 0x00);
2878
2879 iwl_prepare_card_hw(priv);
2880 if (!priv->hw_ready) {
2881 IWL_WARN(priv, "Failed, HW not ready\n");
2882 goto out_iounmap;
2883 }
2884
2885 /* amp init */
2886 err = priv->cfg->ops->lib->apm_ops.init(priv);
2887 if (err < 0) {
2888 IWL_ERR(priv, "Failed to init APMG\n");
2889 goto out_iounmap;
2890 }
2891 /*****************
2892 * 4. Read EEPROM
2893 *****************/
2894 /* Read the EEPROM */
2895 err = iwl_eeprom_init(priv);
2896 if (err) {
2897 IWL_ERR(priv, "Unable to init EEPROM\n");
2898 goto out_iounmap;
2899 }
2900 err = iwl_eeprom_check_version(priv);
2901 if (err)
2902 goto out_free_eeprom;
2903
2904 /* extract MAC Address */
2905 iwl_eeprom_get_mac(priv, priv->mac_addr);
2906 IWL_DEBUG_INFO(priv, "MAC address: %pM\n", priv->mac_addr);
2907 SET_IEEE80211_PERM_ADDR(priv->hw, priv->mac_addr);
2908
2909 /************************
2910 * 5. Setup HW constants
2911 ************************/
2912 if (iwl_set_hw_params(priv)) {
2913 IWL_ERR(priv, "failed to set hw parameters\n");
2914 goto out_free_eeprom;
2915 }
2916
2917 /*******************
2918 * 6. Setup priv
2919 *******************/
2920
2921 err = iwl_init_drv(priv);
2922 if (err)
2923 goto out_free_eeprom;
2924 /* At this point both hw and priv are initialized. */
2925
2926 /********************
2927 * 7. Setup services
2928 ********************/
2929 spin_lock_irqsave(&priv->lock, flags);
2930 iwl_disable_interrupts(priv);
2931 spin_unlock_irqrestore(&priv->lock, flags);
2932
2933 pci_enable_msi(priv->pci_dev);
2934
2935 iwl_alloc_isr_ict(priv);
2936 err = request_irq(priv->pci_dev->irq, priv->cfg->ops->lib->isr,
2937 IRQF_SHARED, DRV_NAME, priv);
2938 if (err) {
2939 IWL_ERR(priv, "Error allocating IRQ %d\n", priv->pci_dev->irq);
2940 goto out_disable_msi;
2941 }
2942 err = sysfs_create_group(&pdev->dev.kobj, &iwl_attribute_group);
2943 if (err) {
2944 IWL_ERR(priv, "failed to create sysfs device attributes\n");
2945 goto out_free_irq;
2946 }
2947
2948 iwl_setup_deferred_work(priv);
2949 iwl_setup_rx_handlers(priv);
2950
2951 /**********************************
2952 * 8. Setup and register mac80211
2953 **********************************/
2954
2955 /* enable interrupts if needed: hw bug w/a */
2956 pci_read_config_word(priv->pci_dev, PCI_COMMAND, &pci_cmd);
2957 if (pci_cmd & PCI_COMMAND_INTX_DISABLE) {
2958 pci_cmd &= ~PCI_COMMAND_INTX_DISABLE;
2959 pci_write_config_word(priv->pci_dev, PCI_COMMAND, pci_cmd);
2960 }
2961
2962 iwl_enable_interrupts(priv);
2963
2964 err = iwl_setup_mac(priv);
2965 if (err)
2966 goto out_remove_sysfs;
2967
2968 err = iwl_dbgfs_register(priv, DRV_NAME);
2969 if (err)
2970 IWL_ERR(priv, "failed to create debugfs files. Ignoring error: %d\n", err);
2971
2972 /* If platform's RF_KILL switch is NOT set to KILL */
2973 if (iwl_read32(priv, CSR_GP_CNTRL) & CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW)
2974 clear_bit(STATUS_RF_KILL_HW, &priv->status);
2975 else
2976 set_bit(STATUS_RF_KILL_HW, &priv->status);
2977
2978 wiphy_rfkill_set_hw_state(priv->hw->wiphy,
2979 test_bit(STATUS_RF_KILL_HW, &priv->status));
2980
2981 iwl_power_initialize(priv);
2982 iwl_tt_initialize(priv);
2983 return 0;
2984
2985 out_remove_sysfs:
2986 destroy_workqueue(priv->workqueue);
2987 priv->workqueue = NULL;
2988 sysfs_remove_group(&pdev->dev.kobj, &iwl_attribute_group);
2989 out_free_irq:
2990 free_irq(priv->pci_dev->irq, priv);
2991 iwl_free_isr_ict(priv);
2992 out_disable_msi:
2993 pci_disable_msi(priv->pci_dev);
2994 iwl_uninit_drv(priv);
2995 out_free_eeprom:
2996 iwl_eeprom_free(priv);
2997 out_iounmap:
2998 pci_iounmap(pdev, priv->hw_base);
2999 out_pci_release_regions:
3000 pci_set_drvdata(pdev, NULL);
3001 pci_release_regions(pdev);
3002 out_pci_disable_device:
3003 pci_disable_device(pdev);
3004 out_ieee80211_free_hw:
3005 ieee80211_free_hw(priv->hw);
3006 out:
3007 return err;
3008 }
3009
3010 static void __devexit iwl_pci_remove(struct pci_dev *pdev)
3011 {
3012 struct iwl_priv *priv = pci_get_drvdata(pdev);
3013 unsigned long flags;
3014
3015 if (!priv)
3016 return;
3017
3018 IWL_DEBUG_INFO(priv, "*** UNLOAD DRIVER ***\n");
3019
3020 iwl_dbgfs_unregister(priv);
3021 sysfs_remove_group(&pdev->dev.kobj, &iwl_attribute_group);
3022
3023 /* ieee80211_unregister_hw call wil cause iwl_mac_stop to
3024 * to be called and iwl_down since we are removing the device
3025 * we need to set STATUS_EXIT_PENDING bit.
3026 */
3027 set_bit(STATUS_EXIT_PENDING, &priv->status);
3028 if (priv->mac80211_registered) {
3029 ieee80211_unregister_hw(priv->hw);
3030 priv->mac80211_registered = 0;
3031 } else {
3032 iwl_down(priv);
3033 }
3034
3035 iwl_tt_exit(priv);
3036
3037 /* make sure we flush any pending irq or
3038 * tasklet for the driver
3039 */
3040 spin_lock_irqsave(&priv->lock, flags);
3041 iwl_disable_interrupts(priv);
3042 spin_unlock_irqrestore(&priv->lock, flags);
3043
3044 iwl_synchronize_irq(priv);
3045
3046 iwl_dealloc_ucode_pci(priv);
3047
3048 if (priv->rxq.bd)
3049 iwl_rx_queue_free(priv, &priv->rxq);
3050 iwl_hw_txq_ctx_free(priv);
3051
3052 iwl_clear_stations_table(priv);
3053 iwl_eeprom_free(priv);
3054
3055
3056 /*netif_stop_queue(dev); */
3057 flush_workqueue(priv->workqueue);
3058
3059 /* ieee80211_unregister_hw calls iwl_mac_stop, which flushes
3060 * priv->workqueue... so we can't take down the workqueue
3061 * until now... */
3062 destroy_workqueue(priv->workqueue);
3063 priv->workqueue = NULL;
3064
3065 free_irq(priv->pci_dev->irq, priv);
3066 pci_disable_msi(priv->pci_dev);
3067 pci_iounmap(pdev, priv->hw_base);
3068 pci_release_regions(pdev);
3069 pci_disable_device(pdev);
3070 pci_set_drvdata(pdev, NULL);
3071
3072 iwl_uninit_drv(priv);
3073
3074 iwl_free_isr_ict(priv);
3075
3076 if (priv->ibss_beacon)
3077 dev_kfree_skb(priv->ibss_beacon);
3078
3079 ieee80211_free_hw(priv->hw);
3080 }
3081
3082
3083 /*****************************************************************************
3084 *
3085 * driver and module entry point
3086 *
3087 *****************************************************************************/
3088
3089 /* Hardware specific file defines the PCI IDs table for that hardware module */
3090 static struct pci_device_id iwl_hw_card_ids[] = {
3091 #ifdef CONFIG_IWL4965
3092 {IWL_PCI_DEVICE(0x4229, PCI_ANY_ID, iwl4965_agn_cfg)},
3093 {IWL_PCI_DEVICE(0x4230, PCI_ANY_ID, iwl4965_agn_cfg)},
3094 #endif /* CONFIG_IWL4965 */
3095 #ifdef CONFIG_IWL5000
3096 {IWL_PCI_DEVICE(0x4232, 0x1205, iwl5100_bg_cfg)},
3097 {IWL_PCI_DEVICE(0x4232, 0x1305, iwl5100_bg_cfg)},
3098 {IWL_PCI_DEVICE(0x4232, 0x1206, iwl5100_abg_cfg)},
3099 {IWL_PCI_DEVICE(0x4232, 0x1306, iwl5100_abg_cfg)},
3100 {IWL_PCI_DEVICE(0x4232, 0x1326, iwl5100_abg_cfg)},
3101 {IWL_PCI_DEVICE(0x4237, 0x1216, iwl5100_abg_cfg)},
3102 {IWL_PCI_DEVICE(0x4232, PCI_ANY_ID, iwl5100_agn_cfg)},
3103 {IWL_PCI_DEVICE(0x4235, PCI_ANY_ID, iwl5300_agn_cfg)},
3104 {IWL_PCI_DEVICE(0x4236, PCI_ANY_ID, iwl5300_agn_cfg)},
3105 {IWL_PCI_DEVICE(0x4237, PCI_ANY_ID, iwl5100_agn_cfg)},
3106 /* 5350 WiFi/WiMax */
3107 {IWL_PCI_DEVICE(0x423A, 0x1001, iwl5350_agn_cfg)},
3108 {IWL_PCI_DEVICE(0x423A, 0x1021, iwl5350_agn_cfg)},
3109 {IWL_PCI_DEVICE(0x423B, 0x1011, iwl5350_agn_cfg)},
3110 /* 5150 Wifi/WiMax */
3111 {IWL_PCI_DEVICE(0x423C, PCI_ANY_ID, iwl5150_agn_cfg)},
3112 {IWL_PCI_DEVICE(0x423D, PCI_ANY_ID, iwl5150_agn_cfg)},
3113 /* 6000/6050 Series */
3114 {IWL_PCI_DEVICE(0x008D, PCI_ANY_ID, iwl6000h_2agn_cfg)},
3115 {IWL_PCI_DEVICE(0x008E, PCI_ANY_ID, iwl6000h_2agn_cfg)},
3116 {IWL_PCI_DEVICE(0x422B, PCI_ANY_ID, iwl6000_3agn_cfg)},
3117 {IWL_PCI_DEVICE(0x422C, PCI_ANY_ID, iwl6000i_2agn_cfg)},
3118 {IWL_PCI_DEVICE(0x4238, PCI_ANY_ID, iwl6000_3agn_cfg)},
3119 {IWL_PCI_DEVICE(0x4239, PCI_ANY_ID, iwl6000i_2agn_cfg)},
3120 {IWL_PCI_DEVICE(0x0086, PCI_ANY_ID, iwl6050_3agn_cfg)},
3121 {IWL_PCI_DEVICE(0x0087, PCI_ANY_ID, iwl6050_2agn_cfg)},
3122 {IWL_PCI_DEVICE(0x0088, PCI_ANY_ID, iwl6050_3agn_cfg)},
3123 {IWL_PCI_DEVICE(0x0089, PCI_ANY_ID, iwl6050_2agn_cfg)},
3124 /* 1000 Series WiFi */
3125 {IWL_PCI_DEVICE(0x0083, PCI_ANY_ID, iwl1000_bgn_cfg)},
3126 {IWL_PCI_DEVICE(0x0084, PCI_ANY_ID, iwl1000_bgn_cfg)},
3127 #endif /* CONFIG_IWL5000 */
3128
3129 {0}
3130 };
3131 MODULE_DEVICE_TABLE(pci, iwl_hw_card_ids);
3132
3133 static struct pci_driver iwl_driver = {
3134 .name = DRV_NAME,
3135 .id_table = iwl_hw_card_ids,
3136 .probe = iwl_pci_probe,
3137 .remove = __devexit_p(iwl_pci_remove),
3138 #ifdef CONFIG_PM
3139 .suspend = iwl_pci_suspend,
3140 .resume = iwl_pci_resume,
3141 #endif
3142 };
3143
3144 static int __init iwl_init(void)
3145 {
3146
3147 int ret;
3148 printk(KERN_INFO DRV_NAME ": " DRV_DESCRIPTION ", " DRV_VERSION "\n");
3149 printk(KERN_INFO DRV_NAME ": " DRV_COPYRIGHT "\n");
3150
3151 ret = iwlagn_rate_control_register();
3152 if (ret) {
3153 printk(KERN_ERR DRV_NAME
3154 "Unable to register rate control algorithm: %d\n", ret);
3155 return ret;
3156 }
3157
3158 ret = pci_register_driver(&iwl_driver);
3159 if (ret) {
3160 printk(KERN_ERR DRV_NAME "Unable to initialize PCI module\n");
3161 goto error_register;
3162 }
3163
3164 return ret;
3165
3166 error_register:
3167 iwlagn_rate_control_unregister();
3168 return ret;
3169 }
3170
3171 static void __exit iwl_exit(void)
3172 {
3173 pci_unregister_driver(&iwl_driver);
3174 iwlagn_rate_control_unregister();
3175 }
3176
3177 module_exit(iwl_exit);
3178 module_init(iwl_init);
3179
3180 #ifdef CONFIG_IWLWIFI_DEBUG
3181 module_param_named(debug50, iwl_debug_level, uint, 0444);
3182 MODULE_PARM_DESC(debug50, "50XX debug output mask (deprecated)");
3183 module_param_named(debug, iwl_debug_level, uint, 0644);
3184 MODULE_PARM_DESC(debug, "debug output mask");
3185 #endif
3186
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