]> git.proxmox.com Git - mirror_ubuntu-artful-kernel.git/blob - drivers/net/wireless/iwlwifi/iwl-core.c
Merge branch 'wireless-2.6' into wireless-next-2.6
[mirror_ubuntu-artful-kernel.git] / drivers / net / wireless / iwlwifi / iwl-core.c
1 /******************************************************************************
2 *
3 * GPL LICENSE SUMMARY
4 *
5 * Copyright(c) 2008 - 2010 Intel Corporation. All rights reserved.
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of version 2 of the GNU General Public License as
9 * published by the Free Software Foundation.
10 *
11 * This program is distributed in the hope that it will be useful, but
12 * WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
14 * General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110,
19 * USA
20 *
21 * The full GNU General Public License is included in this distribution
22 * in the file called LICENSE.GPL.
23 *
24 * Contact Information:
25 * Intel Linux Wireless <ilw@linux.intel.com>
26 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
27 *****************************************************************************/
28
29 #include <linux/kernel.h>
30 #include <linux/module.h>
31 #include <linux/etherdevice.h>
32 #include <linux/sched.h>
33 #include <net/mac80211.h>
34
35 #include "iwl-eeprom.h"
36 #include "iwl-dev.h" /* FIXME: remove */
37 #include "iwl-debug.h"
38 #include "iwl-core.h"
39 #include "iwl-io.h"
40 #include "iwl-power.h"
41 #include "iwl-sta.h"
42 #include "iwl-helpers.h"
43
44
45 MODULE_DESCRIPTION("iwl core");
46 MODULE_VERSION(IWLWIFI_VERSION);
47 MODULE_AUTHOR(DRV_COPYRIGHT " " DRV_AUTHOR);
48 MODULE_LICENSE("GPL");
49
50 /*
51 * set bt_coex_active to true, uCode will do kill/defer
52 * every time the priority line is asserted (BT is sending signals on the
53 * priority line in the PCIx).
54 * set bt_coex_active to false, uCode will ignore the BT activity and
55 * perform the normal operation
56 *
57 * User might experience transmit issue on some platform due to WiFi/BT
58 * co-exist problem. The possible behaviors are:
59 * Able to scan and finding all the available AP
60 * Not able to associate with any AP
61 * On those platforms, WiFi communication can be restored by set
62 * "bt_coex_active" module parameter to "false"
63 *
64 * default: bt_coex_active = true (BT_COEX_ENABLE)
65 */
66 static bool bt_coex_active = true;
67 module_param(bt_coex_active, bool, S_IRUGO);
68 MODULE_PARM_DESC(bt_coex_active, "enable wifi/bluetooth co-exist");
69
70 static struct iwl_wimax_coex_event_entry cu_priorities[COEX_NUM_OF_EVENTS] = {
71 {COEX_CU_UNASSOC_IDLE_RP, COEX_CU_UNASSOC_IDLE_WP,
72 0, COEX_UNASSOC_IDLE_FLAGS},
73 {COEX_CU_UNASSOC_MANUAL_SCAN_RP, COEX_CU_UNASSOC_MANUAL_SCAN_WP,
74 0, COEX_UNASSOC_MANUAL_SCAN_FLAGS},
75 {COEX_CU_UNASSOC_AUTO_SCAN_RP, COEX_CU_UNASSOC_AUTO_SCAN_WP,
76 0, COEX_UNASSOC_AUTO_SCAN_FLAGS},
77 {COEX_CU_CALIBRATION_RP, COEX_CU_CALIBRATION_WP,
78 0, COEX_CALIBRATION_FLAGS},
79 {COEX_CU_PERIODIC_CALIBRATION_RP, COEX_CU_PERIODIC_CALIBRATION_WP,
80 0, COEX_PERIODIC_CALIBRATION_FLAGS},
81 {COEX_CU_CONNECTION_ESTAB_RP, COEX_CU_CONNECTION_ESTAB_WP,
82 0, COEX_CONNECTION_ESTAB_FLAGS},
83 {COEX_CU_ASSOCIATED_IDLE_RP, COEX_CU_ASSOCIATED_IDLE_WP,
84 0, COEX_ASSOCIATED_IDLE_FLAGS},
85 {COEX_CU_ASSOC_MANUAL_SCAN_RP, COEX_CU_ASSOC_MANUAL_SCAN_WP,
86 0, COEX_ASSOC_MANUAL_SCAN_FLAGS},
87 {COEX_CU_ASSOC_AUTO_SCAN_RP, COEX_CU_ASSOC_AUTO_SCAN_WP,
88 0, COEX_ASSOC_AUTO_SCAN_FLAGS},
89 {COEX_CU_ASSOC_ACTIVE_LEVEL_RP, COEX_CU_ASSOC_ACTIVE_LEVEL_WP,
90 0, COEX_ASSOC_ACTIVE_LEVEL_FLAGS},
91 {COEX_CU_RF_ON_RP, COEX_CU_RF_ON_WP, 0, COEX_CU_RF_ON_FLAGS},
92 {COEX_CU_RF_OFF_RP, COEX_CU_RF_OFF_WP, 0, COEX_RF_OFF_FLAGS},
93 {COEX_CU_STAND_ALONE_DEBUG_RP, COEX_CU_STAND_ALONE_DEBUG_WP,
94 0, COEX_STAND_ALONE_DEBUG_FLAGS},
95 {COEX_CU_IPAN_ASSOC_LEVEL_RP, COEX_CU_IPAN_ASSOC_LEVEL_WP,
96 0, COEX_IPAN_ASSOC_LEVEL_FLAGS},
97 {COEX_CU_RSRVD1_RP, COEX_CU_RSRVD1_WP, 0, COEX_RSRVD1_FLAGS},
98 {COEX_CU_RSRVD2_RP, COEX_CU_RSRVD2_WP, 0, COEX_RSRVD2_FLAGS}
99 };
100
101 #define IWL_DECLARE_RATE_INFO(r, s, ip, in, rp, rn, pp, np) \
102 [IWL_RATE_##r##M_INDEX] = { IWL_RATE_##r##M_PLCP, \
103 IWL_RATE_SISO_##s##M_PLCP, \
104 IWL_RATE_MIMO2_##s##M_PLCP,\
105 IWL_RATE_MIMO3_##s##M_PLCP,\
106 IWL_RATE_##r##M_IEEE, \
107 IWL_RATE_##ip##M_INDEX, \
108 IWL_RATE_##in##M_INDEX, \
109 IWL_RATE_##rp##M_INDEX, \
110 IWL_RATE_##rn##M_INDEX, \
111 IWL_RATE_##pp##M_INDEX, \
112 IWL_RATE_##np##M_INDEX }
113
114 u32 iwl_debug_level;
115 EXPORT_SYMBOL(iwl_debug_level);
116
117 /*
118 * Parameter order:
119 * rate, ht rate, prev rate, next rate, prev tgg rate, next tgg rate
120 *
121 * If there isn't a valid next or previous rate then INV is used which
122 * maps to IWL_RATE_INVALID
123 *
124 */
125 const struct iwl_rate_info iwl_rates[IWL_RATE_COUNT] = {
126 IWL_DECLARE_RATE_INFO(1, INV, INV, 2, INV, 2, INV, 2), /* 1mbps */
127 IWL_DECLARE_RATE_INFO(2, INV, 1, 5, 1, 5, 1, 5), /* 2mbps */
128 IWL_DECLARE_RATE_INFO(5, INV, 2, 6, 2, 11, 2, 11), /*5.5mbps */
129 IWL_DECLARE_RATE_INFO(11, INV, 9, 12, 9, 12, 5, 18), /* 11mbps */
130 IWL_DECLARE_RATE_INFO(6, 6, 5, 9, 5, 11, 5, 11), /* 6mbps */
131 IWL_DECLARE_RATE_INFO(9, 6, 6, 11, 6, 11, 5, 11), /* 9mbps */
132 IWL_DECLARE_RATE_INFO(12, 12, 11, 18, 11, 18, 11, 18), /* 12mbps */
133 IWL_DECLARE_RATE_INFO(18, 18, 12, 24, 12, 24, 11, 24), /* 18mbps */
134 IWL_DECLARE_RATE_INFO(24, 24, 18, 36, 18, 36, 18, 36), /* 24mbps */
135 IWL_DECLARE_RATE_INFO(36, 36, 24, 48, 24, 48, 24, 48), /* 36mbps */
136 IWL_DECLARE_RATE_INFO(48, 48, 36, 54, 36, 54, 36, 54), /* 48mbps */
137 IWL_DECLARE_RATE_INFO(54, 54, 48, INV, 48, INV, 48, INV),/* 54mbps */
138 IWL_DECLARE_RATE_INFO(60, 60, 48, INV, 48, INV, 48, INV),/* 60mbps */
139 /* FIXME:RS: ^^ should be INV (legacy) */
140 };
141 EXPORT_SYMBOL(iwl_rates);
142
143 int iwl_hwrate_to_plcp_idx(u32 rate_n_flags)
144 {
145 int idx = 0;
146
147 /* HT rate format */
148 if (rate_n_flags & RATE_MCS_HT_MSK) {
149 idx = (rate_n_flags & 0xff);
150
151 if (idx >= IWL_RATE_MIMO3_6M_PLCP)
152 idx = idx - IWL_RATE_MIMO3_6M_PLCP;
153 else if (idx >= IWL_RATE_MIMO2_6M_PLCP)
154 idx = idx - IWL_RATE_MIMO2_6M_PLCP;
155
156 idx += IWL_FIRST_OFDM_RATE;
157 /* skip 9M not supported in ht*/
158 if (idx >= IWL_RATE_9M_INDEX)
159 idx += 1;
160 if ((idx >= IWL_FIRST_OFDM_RATE) && (idx <= IWL_LAST_OFDM_RATE))
161 return idx;
162
163 /* legacy rate format, search for match in table */
164 } else {
165 for (idx = 0; idx < ARRAY_SIZE(iwl_rates); idx++)
166 if (iwl_rates[idx].plcp == (rate_n_flags & 0xFF))
167 return idx;
168 }
169
170 return -1;
171 }
172 EXPORT_SYMBOL(iwl_hwrate_to_plcp_idx);
173
174 u8 iwl_toggle_tx_ant(struct iwl_priv *priv, u8 ant)
175 {
176 int i;
177 u8 ind = ant;
178 for (i = 0; i < RATE_ANT_NUM - 1; i++) {
179 ind = (ind + 1) < RATE_ANT_NUM ? ind + 1 : 0;
180 if (priv->hw_params.valid_tx_ant & BIT(ind))
181 return ind;
182 }
183 return ant;
184 }
185 EXPORT_SYMBOL(iwl_toggle_tx_ant);
186
187 const u8 iwl_bcast_addr[ETH_ALEN] = { 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF };
188 EXPORT_SYMBOL(iwl_bcast_addr);
189
190
191 /* This function both allocates and initializes hw and priv. */
192 struct ieee80211_hw *iwl_alloc_all(struct iwl_cfg *cfg,
193 struct ieee80211_ops *hw_ops)
194 {
195 struct iwl_priv *priv;
196
197 /* mac80211 allocates memory for this device instance, including
198 * space for this driver's private structure */
199 struct ieee80211_hw *hw =
200 ieee80211_alloc_hw(sizeof(struct iwl_priv), hw_ops);
201 if (hw == NULL) {
202 printk(KERN_ERR "%s: Can not allocate network device\n",
203 cfg->name);
204 goto out;
205 }
206
207 priv = hw->priv;
208 priv->hw = hw;
209
210 out:
211 return hw;
212 }
213 EXPORT_SYMBOL(iwl_alloc_all);
214
215 void iwl_hw_detect(struct iwl_priv *priv)
216 {
217 priv->hw_rev = _iwl_read32(priv, CSR_HW_REV);
218 priv->hw_wa_rev = _iwl_read32(priv, CSR_HW_REV_WA_REG);
219 pci_read_config_byte(priv->pci_dev, PCI_REVISION_ID, &priv->rev_id);
220 }
221 EXPORT_SYMBOL(iwl_hw_detect);
222
223 /*
224 * QoS support
225 */
226 static void iwl_update_qos(struct iwl_priv *priv)
227 {
228 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
229 return;
230
231 priv->qos_data.def_qos_parm.qos_flags = 0;
232
233 if (priv->qos_data.qos_active)
234 priv->qos_data.def_qos_parm.qos_flags |=
235 QOS_PARAM_FLG_UPDATE_EDCA_MSK;
236
237 if (priv->current_ht_config.is_ht)
238 priv->qos_data.def_qos_parm.qos_flags |= QOS_PARAM_FLG_TGN_MSK;
239
240 IWL_DEBUG_QOS(priv, "send QoS cmd with Qos active=%d FLAGS=0x%X\n",
241 priv->qos_data.qos_active,
242 priv->qos_data.def_qos_parm.qos_flags);
243
244 iwl_send_cmd_pdu_async(priv, REPLY_QOS_PARAM,
245 sizeof(struct iwl_qosparam_cmd),
246 &priv->qos_data.def_qos_parm, NULL);
247 }
248
249 #define MAX_BIT_RATE_40_MHZ 150 /* Mbps */
250 #define MAX_BIT_RATE_20_MHZ 72 /* Mbps */
251 static void iwlcore_init_ht_hw_capab(const struct iwl_priv *priv,
252 struct ieee80211_sta_ht_cap *ht_info,
253 enum ieee80211_band band)
254 {
255 u16 max_bit_rate = 0;
256 u8 rx_chains_num = priv->hw_params.rx_chains_num;
257 u8 tx_chains_num = priv->hw_params.tx_chains_num;
258
259 ht_info->cap = 0;
260 memset(&ht_info->mcs, 0, sizeof(ht_info->mcs));
261
262 ht_info->ht_supported = true;
263
264 if (priv->cfg->ht_greenfield_support)
265 ht_info->cap |= IEEE80211_HT_CAP_GRN_FLD;
266 ht_info->cap |= IEEE80211_HT_CAP_SGI_20;
267 max_bit_rate = MAX_BIT_RATE_20_MHZ;
268 if (priv->hw_params.ht40_channel & BIT(band)) {
269 ht_info->cap |= IEEE80211_HT_CAP_SUP_WIDTH_20_40;
270 ht_info->cap |= IEEE80211_HT_CAP_SGI_40;
271 ht_info->mcs.rx_mask[4] = 0x01;
272 max_bit_rate = MAX_BIT_RATE_40_MHZ;
273 }
274
275 if (priv->cfg->mod_params->amsdu_size_8K)
276 ht_info->cap |= IEEE80211_HT_CAP_MAX_AMSDU;
277
278 ht_info->ampdu_factor = CFG_HT_RX_AMPDU_FACTOR_DEF;
279 ht_info->ampdu_density = CFG_HT_MPDU_DENSITY_DEF;
280
281 ht_info->mcs.rx_mask[0] = 0xFF;
282 if (rx_chains_num >= 2)
283 ht_info->mcs.rx_mask[1] = 0xFF;
284 if (rx_chains_num >= 3)
285 ht_info->mcs.rx_mask[2] = 0xFF;
286
287 /* Highest supported Rx data rate */
288 max_bit_rate *= rx_chains_num;
289 WARN_ON(max_bit_rate & ~IEEE80211_HT_MCS_RX_HIGHEST_MASK);
290 ht_info->mcs.rx_highest = cpu_to_le16(max_bit_rate);
291
292 /* Tx MCS capabilities */
293 ht_info->mcs.tx_params = IEEE80211_HT_MCS_TX_DEFINED;
294 if (tx_chains_num != rx_chains_num) {
295 ht_info->mcs.tx_params |= IEEE80211_HT_MCS_TX_RX_DIFF;
296 ht_info->mcs.tx_params |= ((tx_chains_num - 1) <<
297 IEEE80211_HT_MCS_TX_MAX_STREAMS_SHIFT);
298 }
299 }
300
301 /**
302 * iwlcore_init_geos - Initialize mac80211's geo/channel info based from eeprom
303 */
304 int iwlcore_init_geos(struct iwl_priv *priv)
305 {
306 struct iwl_channel_info *ch;
307 struct ieee80211_supported_band *sband;
308 struct ieee80211_channel *channels;
309 struct ieee80211_channel *geo_ch;
310 struct ieee80211_rate *rates;
311 int i = 0;
312
313 if (priv->bands[IEEE80211_BAND_2GHZ].n_bitrates ||
314 priv->bands[IEEE80211_BAND_5GHZ].n_bitrates) {
315 IWL_DEBUG_INFO(priv, "Geography modes already initialized.\n");
316 set_bit(STATUS_GEO_CONFIGURED, &priv->status);
317 return 0;
318 }
319
320 channels = kzalloc(sizeof(struct ieee80211_channel) *
321 priv->channel_count, GFP_KERNEL);
322 if (!channels)
323 return -ENOMEM;
324
325 rates = kzalloc((sizeof(struct ieee80211_rate) * IWL_RATE_COUNT_LEGACY),
326 GFP_KERNEL);
327 if (!rates) {
328 kfree(channels);
329 return -ENOMEM;
330 }
331
332 /* 5.2GHz channels start after the 2.4GHz channels */
333 sband = &priv->bands[IEEE80211_BAND_5GHZ];
334 sband->channels = &channels[ARRAY_SIZE(iwl_eeprom_band_1)];
335 /* just OFDM */
336 sband->bitrates = &rates[IWL_FIRST_OFDM_RATE];
337 sband->n_bitrates = IWL_RATE_COUNT_LEGACY - IWL_FIRST_OFDM_RATE;
338
339 if (priv->cfg->sku & IWL_SKU_N)
340 iwlcore_init_ht_hw_capab(priv, &sband->ht_cap,
341 IEEE80211_BAND_5GHZ);
342
343 sband = &priv->bands[IEEE80211_BAND_2GHZ];
344 sband->channels = channels;
345 /* OFDM & CCK */
346 sband->bitrates = rates;
347 sband->n_bitrates = IWL_RATE_COUNT_LEGACY;
348
349 if (priv->cfg->sku & IWL_SKU_N)
350 iwlcore_init_ht_hw_capab(priv, &sband->ht_cap,
351 IEEE80211_BAND_2GHZ);
352
353 priv->ieee_channels = channels;
354 priv->ieee_rates = rates;
355
356 for (i = 0; i < priv->channel_count; i++) {
357 ch = &priv->channel_info[i];
358
359 /* FIXME: might be removed if scan is OK */
360 if (!is_channel_valid(ch))
361 continue;
362
363 if (is_channel_a_band(ch))
364 sband = &priv->bands[IEEE80211_BAND_5GHZ];
365 else
366 sband = &priv->bands[IEEE80211_BAND_2GHZ];
367
368 geo_ch = &sband->channels[sband->n_channels++];
369
370 geo_ch->center_freq =
371 ieee80211_channel_to_frequency(ch->channel);
372 geo_ch->max_power = ch->max_power_avg;
373 geo_ch->max_antenna_gain = 0xff;
374 geo_ch->hw_value = ch->channel;
375
376 if (is_channel_valid(ch)) {
377 if (!(ch->flags & EEPROM_CHANNEL_IBSS))
378 geo_ch->flags |= IEEE80211_CHAN_NO_IBSS;
379
380 if (!(ch->flags & EEPROM_CHANNEL_ACTIVE))
381 geo_ch->flags |= IEEE80211_CHAN_PASSIVE_SCAN;
382
383 if (ch->flags & EEPROM_CHANNEL_RADAR)
384 geo_ch->flags |= IEEE80211_CHAN_RADAR;
385
386 geo_ch->flags |= ch->ht40_extension_channel;
387
388 if (ch->max_power_avg > priv->tx_power_device_lmt)
389 priv->tx_power_device_lmt = ch->max_power_avg;
390 } else {
391 geo_ch->flags |= IEEE80211_CHAN_DISABLED;
392 }
393
394 IWL_DEBUG_INFO(priv, "Channel %d Freq=%d[%sGHz] %s flag=0x%X\n",
395 ch->channel, geo_ch->center_freq,
396 is_channel_a_band(ch) ? "5.2" : "2.4",
397 geo_ch->flags & IEEE80211_CHAN_DISABLED ?
398 "restricted" : "valid",
399 geo_ch->flags);
400 }
401
402 if ((priv->bands[IEEE80211_BAND_5GHZ].n_channels == 0) &&
403 priv->cfg->sku & IWL_SKU_A) {
404 IWL_INFO(priv, "Incorrectly detected BG card as ABG. "
405 "Please send your PCI ID 0x%04X:0x%04X to maintainer.\n",
406 priv->pci_dev->device,
407 priv->pci_dev->subsystem_device);
408 priv->cfg->sku &= ~IWL_SKU_A;
409 }
410
411 IWL_INFO(priv, "Tunable channels: %d 802.11bg, %d 802.11a channels\n",
412 priv->bands[IEEE80211_BAND_2GHZ].n_channels,
413 priv->bands[IEEE80211_BAND_5GHZ].n_channels);
414
415 set_bit(STATUS_GEO_CONFIGURED, &priv->status);
416
417 return 0;
418 }
419 EXPORT_SYMBOL(iwlcore_init_geos);
420
421 /*
422 * iwlcore_free_geos - undo allocations in iwlcore_init_geos
423 */
424 void iwlcore_free_geos(struct iwl_priv *priv)
425 {
426 kfree(priv->ieee_channels);
427 kfree(priv->ieee_rates);
428 clear_bit(STATUS_GEO_CONFIGURED, &priv->status);
429 }
430 EXPORT_SYMBOL(iwlcore_free_geos);
431
432 /*
433 * iwlcore_rts_tx_cmd_flag: Set rts/cts. 3945 and 4965 only share this
434 * function.
435 */
436 void iwlcore_rts_tx_cmd_flag(struct ieee80211_tx_info *info,
437 __le32 *tx_flags)
438 {
439 if (info->control.rates[0].flags & IEEE80211_TX_RC_USE_RTS_CTS) {
440 *tx_flags |= TX_CMD_FLG_RTS_MSK;
441 *tx_flags &= ~TX_CMD_FLG_CTS_MSK;
442 } else if (info->control.rates[0].flags & IEEE80211_TX_RC_USE_CTS_PROTECT) {
443 *tx_flags &= ~TX_CMD_FLG_RTS_MSK;
444 *tx_flags |= TX_CMD_FLG_CTS_MSK;
445 }
446 }
447 EXPORT_SYMBOL(iwlcore_rts_tx_cmd_flag);
448
449 static bool is_single_rx_stream(struct iwl_priv *priv)
450 {
451 return priv->current_ht_config.smps == IEEE80211_SMPS_STATIC ||
452 priv->current_ht_config.single_chain_sufficient;
453 }
454
455 static u8 iwl_is_channel_extension(struct iwl_priv *priv,
456 enum ieee80211_band band,
457 u16 channel, u8 extension_chan_offset)
458 {
459 const struct iwl_channel_info *ch_info;
460
461 ch_info = iwl_get_channel_info(priv, band, channel);
462 if (!is_channel_valid(ch_info))
463 return 0;
464
465 if (extension_chan_offset == IEEE80211_HT_PARAM_CHA_SEC_ABOVE)
466 return !(ch_info->ht40_extension_channel &
467 IEEE80211_CHAN_NO_HT40PLUS);
468 else if (extension_chan_offset == IEEE80211_HT_PARAM_CHA_SEC_BELOW)
469 return !(ch_info->ht40_extension_channel &
470 IEEE80211_CHAN_NO_HT40MINUS);
471
472 return 0;
473 }
474
475 u8 iwl_is_ht40_tx_allowed(struct iwl_priv *priv,
476 struct ieee80211_sta_ht_cap *sta_ht_inf)
477 {
478 struct iwl_ht_config *ht_conf = &priv->current_ht_config;
479
480 if (!ht_conf->is_ht || !ht_conf->is_40mhz)
481 return 0;
482
483 /* We do not check for IEEE80211_HT_CAP_SUP_WIDTH_20_40
484 * the bit will not set if it is pure 40MHz case
485 */
486 if (sta_ht_inf) {
487 if (!sta_ht_inf->ht_supported)
488 return 0;
489 }
490 #ifdef CONFIG_IWLWIFI_DEBUG
491 if (priv->disable_ht40)
492 return 0;
493 #endif
494 return iwl_is_channel_extension(priv, priv->band,
495 le16_to_cpu(priv->staging_rxon.channel),
496 ht_conf->extension_chan_offset);
497 }
498 EXPORT_SYMBOL(iwl_is_ht40_tx_allowed);
499
500 static u16 iwl_adjust_beacon_interval(u16 beacon_val, u16 max_beacon_val)
501 {
502 u16 new_val = 0;
503 u16 beacon_factor = 0;
504
505 beacon_factor = (beacon_val + max_beacon_val) / max_beacon_val;
506 new_val = beacon_val / beacon_factor;
507
508 if (!new_val)
509 new_val = max_beacon_val;
510
511 return new_val;
512 }
513
514 void iwl_setup_rxon_timing(struct iwl_priv *priv)
515 {
516 u64 tsf;
517 s32 interval_tm, rem;
518 unsigned long flags;
519 struct ieee80211_conf *conf = NULL;
520 u16 beacon_int;
521
522 conf = ieee80211_get_hw_conf(priv->hw);
523
524 spin_lock_irqsave(&priv->lock, flags);
525 priv->rxon_timing.timestamp = cpu_to_le64(priv->timestamp);
526 priv->rxon_timing.listen_interval = cpu_to_le16(conf->listen_interval);
527
528 if (priv->iw_mode == NL80211_IFTYPE_STATION) {
529 beacon_int = priv->beacon_int;
530 priv->rxon_timing.atim_window = 0;
531 } else {
532 beacon_int = priv->vif->bss_conf.beacon_int;
533
534 /* TODO: we need to get atim_window from upper stack
535 * for now we set to 0 */
536 priv->rxon_timing.atim_window = 0;
537 }
538
539 beacon_int = iwl_adjust_beacon_interval(beacon_int,
540 priv->hw_params.max_beacon_itrvl * 1024);
541 priv->rxon_timing.beacon_interval = cpu_to_le16(beacon_int);
542
543 tsf = priv->timestamp; /* tsf is modifed by do_div: copy it */
544 interval_tm = beacon_int * 1024;
545 rem = do_div(tsf, interval_tm);
546 priv->rxon_timing.beacon_init_val = cpu_to_le32(interval_tm - rem);
547
548 spin_unlock_irqrestore(&priv->lock, flags);
549 IWL_DEBUG_ASSOC(priv,
550 "beacon interval %d beacon timer %d beacon tim %d\n",
551 le16_to_cpu(priv->rxon_timing.beacon_interval),
552 le32_to_cpu(priv->rxon_timing.beacon_init_val),
553 le16_to_cpu(priv->rxon_timing.atim_window));
554 }
555 EXPORT_SYMBOL(iwl_setup_rxon_timing);
556
557 void iwl_set_rxon_hwcrypto(struct iwl_priv *priv, int hw_decrypt)
558 {
559 struct iwl_rxon_cmd *rxon = &priv->staging_rxon;
560
561 if (hw_decrypt)
562 rxon->filter_flags &= ~RXON_FILTER_DIS_DECRYPT_MSK;
563 else
564 rxon->filter_flags |= RXON_FILTER_DIS_DECRYPT_MSK;
565
566 }
567 EXPORT_SYMBOL(iwl_set_rxon_hwcrypto);
568
569 /**
570 * iwl_check_rxon_cmd - validate RXON structure is valid
571 *
572 * NOTE: This is really only useful during development and can eventually
573 * be #ifdef'd out once the driver is stable and folks aren't actively
574 * making changes
575 */
576 int iwl_check_rxon_cmd(struct iwl_priv *priv)
577 {
578 int error = 0;
579 int counter = 1;
580 struct iwl_rxon_cmd *rxon = &priv->staging_rxon;
581
582 if (rxon->flags & RXON_FLG_BAND_24G_MSK) {
583 error |= le32_to_cpu(rxon->flags &
584 (RXON_FLG_TGJ_NARROW_BAND_MSK |
585 RXON_FLG_RADAR_DETECT_MSK));
586 if (error)
587 IWL_WARN(priv, "check 24G fields %d | %d\n",
588 counter++, error);
589 } else {
590 error |= (rxon->flags & RXON_FLG_SHORT_SLOT_MSK) ?
591 0 : le32_to_cpu(RXON_FLG_SHORT_SLOT_MSK);
592 if (error)
593 IWL_WARN(priv, "check 52 fields %d | %d\n",
594 counter++, error);
595 error |= le32_to_cpu(rxon->flags & RXON_FLG_CCK_MSK);
596 if (error)
597 IWL_WARN(priv, "check 52 CCK %d | %d\n",
598 counter++, error);
599 }
600 error |= (rxon->node_addr[0] | rxon->bssid_addr[0]) & 0x1;
601 if (error)
602 IWL_WARN(priv, "check mac addr %d | %d\n", counter++, error);
603
604 /* make sure basic rates 6Mbps and 1Mbps are supported */
605 error |= (((rxon->ofdm_basic_rates & IWL_RATE_6M_MASK) == 0) &&
606 ((rxon->cck_basic_rates & IWL_RATE_1M_MASK) == 0));
607 if (error)
608 IWL_WARN(priv, "check basic rate %d | %d\n", counter++, error);
609
610 error |= (le16_to_cpu(rxon->assoc_id) > 2007);
611 if (error)
612 IWL_WARN(priv, "check assoc id %d | %d\n", counter++, error);
613
614 error |= ((rxon->flags & (RXON_FLG_CCK_MSK | RXON_FLG_SHORT_SLOT_MSK))
615 == (RXON_FLG_CCK_MSK | RXON_FLG_SHORT_SLOT_MSK));
616 if (error)
617 IWL_WARN(priv, "check CCK and short slot %d | %d\n",
618 counter++, error);
619
620 error |= ((rxon->flags & (RXON_FLG_CCK_MSK | RXON_FLG_AUTO_DETECT_MSK))
621 == (RXON_FLG_CCK_MSK | RXON_FLG_AUTO_DETECT_MSK));
622 if (error)
623 IWL_WARN(priv, "check CCK & auto detect %d | %d\n",
624 counter++, error);
625
626 error |= ((rxon->flags & (RXON_FLG_AUTO_DETECT_MSK |
627 RXON_FLG_TGG_PROTECT_MSK)) == RXON_FLG_TGG_PROTECT_MSK);
628 if (error)
629 IWL_WARN(priv, "check TGG and auto detect %d | %d\n",
630 counter++, error);
631
632 if (error)
633 IWL_WARN(priv, "Tuning to channel %d\n",
634 le16_to_cpu(rxon->channel));
635
636 if (error) {
637 IWL_ERR(priv, "Not a valid iwl_rxon_assoc_cmd field values\n");
638 return -1;
639 }
640 return 0;
641 }
642 EXPORT_SYMBOL(iwl_check_rxon_cmd);
643
644 /**
645 * iwl_full_rxon_required - check if full RXON (vs RXON_ASSOC) cmd is needed
646 * @priv: staging_rxon is compared to active_rxon
647 *
648 * If the RXON structure is changing enough to require a new tune,
649 * or is clearing the RXON_FILTER_ASSOC_MSK, then return 1 to indicate that
650 * a new tune (full RXON command, rather than RXON_ASSOC cmd) is required.
651 */
652 int iwl_full_rxon_required(struct iwl_priv *priv)
653 {
654
655 /* These items are only settable from the full RXON command */
656 if (!(iwl_is_associated(priv)) ||
657 compare_ether_addr(priv->staging_rxon.bssid_addr,
658 priv->active_rxon.bssid_addr) ||
659 compare_ether_addr(priv->staging_rxon.node_addr,
660 priv->active_rxon.node_addr) ||
661 compare_ether_addr(priv->staging_rxon.wlap_bssid_addr,
662 priv->active_rxon.wlap_bssid_addr) ||
663 (priv->staging_rxon.dev_type != priv->active_rxon.dev_type) ||
664 (priv->staging_rxon.channel != priv->active_rxon.channel) ||
665 (priv->staging_rxon.air_propagation !=
666 priv->active_rxon.air_propagation) ||
667 (priv->staging_rxon.ofdm_ht_single_stream_basic_rates !=
668 priv->active_rxon.ofdm_ht_single_stream_basic_rates) ||
669 (priv->staging_rxon.ofdm_ht_dual_stream_basic_rates !=
670 priv->active_rxon.ofdm_ht_dual_stream_basic_rates) ||
671 (priv->staging_rxon.ofdm_ht_triple_stream_basic_rates !=
672 priv->active_rxon.ofdm_ht_triple_stream_basic_rates) ||
673 (priv->staging_rxon.assoc_id != priv->active_rxon.assoc_id))
674 return 1;
675
676 /* flags, filter_flags, ofdm_basic_rates, and cck_basic_rates can
677 * be updated with the RXON_ASSOC command -- however only some
678 * flag transitions are allowed using RXON_ASSOC */
679
680 /* Check if we are not switching bands */
681 if ((priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) !=
682 (priv->active_rxon.flags & RXON_FLG_BAND_24G_MSK))
683 return 1;
684
685 /* Check if we are switching association toggle */
686 if ((priv->staging_rxon.filter_flags & RXON_FILTER_ASSOC_MSK) !=
687 (priv->active_rxon.filter_flags & RXON_FILTER_ASSOC_MSK))
688 return 1;
689
690 return 0;
691 }
692 EXPORT_SYMBOL(iwl_full_rxon_required);
693
694 u8 iwl_rate_get_lowest_plcp(struct iwl_priv *priv)
695 {
696 /*
697 * Assign the lowest rate -- should really get this from
698 * the beacon skb from mac80211.
699 */
700 if (priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK)
701 return IWL_RATE_1M_PLCP;
702 else
703 return IWL_RATE_6M_PLCP;
704 }
705 EXPORT_SYMBOL(iwl_rate_get_lowest_plcp);
706
707 void iwl_set_rxon_ht(struct iwl_priv *priv, struct iwl_ht_config *ht_conf)
708 {
709 struct iwl_rxon_cmd *rxon = &priv->staging_rxon;
710
711 if (!ht_conf->is_ht) {
712 rxon->flags &= ~(RXON_FLG_CHANNEL_MODE_MSK |
713 RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK |
714 RXON_FLG_HT40_PROT_MSK |
715 RXON_FLG_HT_PROT_MSK);
716 return;
717 }
718
719 /* FIXME: if the definition of ht_protection changed, the "translation"
720 * will be needed for rxon->flags
721 */
722 rxon->flags |= cpu_to_le32(ht_conf->ht_protection << RXON_FLG_HT_OPERATING_MODE_POS);
723
724 /* Set up channel bandwidth:
725 * 20 MHz only, 20/40 mixed or pure 40 if ht40 ok */
726 /* clear the HT channel mode before set the mode */
727 rxon->flags &= ~(RXON_FLG_CHANNEL_MODE_MSK |
728 RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK);
729 if (iwl_is_ht40_tx_allowed(priv, NULL)) {
730 /* pure ht40 */
731 if (ht_conf->ht_protection == IEEE80211_HT_OP_MODE_PROTECTION_20MHZ) {
732 rxon->flags |= RXON_FLG_CHANNEL_MODE_PURE_40;
733 /* Note: control channel is opposite of extension channel */
734 switch (ht_conf->extension_chan_offset) {
735 case IEEE80211_HT_PARAM_CHA_SEC_ABOVE:
736 rxon->flags &= ~RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK;
737 break;
738 case IEEE80211_HT_PARAM_CHA_SEC_BELOW:
739 rxon->flags |= RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK;
740 break;
741 }
742 } else {
743 /* Note: control channel is opposite of extension channel */
744 switch (ht_conf->extension_chan_offset) {
745 case IEEE80211_HT_PARAM_CHA_SEC_ABOVE:
746 rxon->flags &= ~(RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK);
747 rxon->flags |= RXON_FLG_CHANNEL_MODE_MIXED;
748 break;
749 case IEEE80211_HT_PARAM_CHA_SEC_BELOW:
750 rxon->flags |= RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK;
751 rxon->flags |= RXON_FLG_CHANNEL_MODE_MIXED;
752 break;
753 case IEEE80211_HT_PARAM_CHA_SEC_NONE:
754 default:
755 /* channel location only valid if in Mixed mode */
756 IWL_ERR(priv, "invalid extension channel offset\n");
757 break;
758 }
759 }
760 } else {
761 rxon->flags |= RXON_FLG_CHANNEL_MODE_LEGACY;
762 }
763
764 if (priv->cfg->ops->hcmd->set_rxon_chain)
765 priv->cfg->ops->hcmd->set_rxon_chain(priv);
766
767 IWL_DEBUG_ASSOC(priv, "rxon flags 0x%X operation mode :0x%X "
768 "extension channel offset 0x%x\n",
769 le32_to_cpu(rxon->flags), ht_conf->ht_protection,
770 ht_conf->extension_chan_offset);
771 return;
772 }
773 EXPORT_SYMBOL(iwl_set_rxon_ht);
774
775 #define IWL_NUM_RX_CHAINS_MULTIPLE 3
776 #define IWL_NUM_RX_CHAINS_SINGLE 2
777 #define IWL_NUM_IDLE_CHAINS_DUAL 2
778 #define IWL_NUM_IDLE_CHAINS_SINGLE 1
779
780 /*
781 * Determine how many receiver/antenna chains to use.
782 *
783 * More provides better reception via diversity. Fewer saves power
784 * at the expense of throughput, but only when not in powersave to
785 * start with.
786 *
787 * MIMO (dual stream) requires at least 2, but works better with 3.
788 * This does not determine *which* chains to use, just how many.
789 */
790 static int iwl_get_active_rx_chain_count(struct iwl_priv *priv)
791 {
792 /* # of Rx chains to use when expecting MIMO. */
793 if (is_single_rx_stream(priv))
794 return IWL_NUM_RX_CHAINS_SINGLE;
795 else
796 return IWL_NUM_RX_CHAINS_MULTIPLE;
797 }
798
799 /*
800 * When we are in power saving mode, unless device support spatial
801 * multiplexing power save, use the active count for rx chain count.
802 */
803 static int iwl_get_idle_rx_chain_count(struct iwl_priv *priv, int active_cnt)
804 {
805 /* # Rx chains when idling, depending on SMPS mode */
806 switch (priv->current_ht_config.smps) {
807 case IEEE80211_SMPS_STATIC:
808 case IEEE80211_SMPS_DYNAMIC:
809 return IWL_NUM_IDLE_CHAINS_SINGLE;
810 case IEEE80211_SMPS_OFF:
811 return active_cnt;
812 default:
813 WARN(1, "invalid SMPS mode %d",
814 priv->current_ht_config.smps);
815 return active_cnt;
816 }
817 }
818
819 /* up to 4 chains */
820 static u8 iwl_count_chain_bitmap(u32 chain_bitmap)
821 {
822 u8 res;
823 res = (chain_bitmap & BIT(0)) >> 0;
824 res += (chain_bitmap & BIT(1)) >> 1;
825 res += (chain_bitmap & BIT(2)) >> 2;
826 res += (chain_bitmap & BIT(3)) >> 3;
827 return res;
828 }
829
830 /**
831 * iwl_set_rxon_chain - Set up Rx chain usage in "staging" RXON image
832 *
833 * Selects how many and which Rx receivers/antennas/chains to use.
834 * This should not be used for scan command ... it puts data in wrong place.
835 */
836 void iwl_set_rxon_chain(struct iwl_priv *priv)
837 {
838 bool is_single = is_single_rx_stream(priv);
839 bool is_cam = !test_bit(STATUS_POWER_PMI, &priv->status);
840 u8 idle_rx_cnt, active_rx_cnt, valid_rx_cnt;
841 u32 active_chains;
842 u16 rx_chain;
843
844 /* Tell uCode which antennas are actually connected.
845 * Before first association, we assume all antennas are connected.
846 * Just after first association, iwl_chain_noise_calibration()
847 * checks which antennas actually *are* connected. */
848 if (priv->chain_noise_data.active_chains)
849 active_chains = priv->chain_noise_data.active_chains;
850 else
851 active_chains = priv->hw_params.valid_rx_ant;
852
853 rx_chain = active_chains << RXON_RX_CHAIN_VALID_POS;
854
855 /* How many receivers should we use? */
856 active_rx_cnt = iwl_get_active_rx_chain_count(priv);
857 idle_rx_cnt = iwl_get_idle_rx_chain_count(priv, active_rx_cnt);
858
859
860 /* correct rx chain count according hw settings
861 * and chain noise calibration
862 */
863 valid_rx_cnt = iwl_count_chain_bitmap(active_chains);
864 if (valid_rx_cnt < active_rx_cnt)
865 active_rx_cnt = valid_rx_cnt;
866
867 if (valid_rx_cnt < idle_rx_cnt)
868 idle_rx_cnt = valid_rx_cnt;
869
870 rx_chain |= active_rx_cnt << RXON_RX_CHAIN_MIMO_CNT_POS;
871 rx_chain |= idle_rx_cnt << RXON_RX_CHAIN_CNT_POS;
872
873 priv->staging_rxon.rx_chain = cpu_to_le16(rx_chain);
874
875 if (!is_single && (active_rx_cnt >= IWL_NUM_RX_CHAINS_SINGLE) && is_cam)
876 priv->staging_rxon.rx_chain |= RXON_RX_CHAIN_MIMO_FORCE_MSK;
877 else
878 priv->staging_rxon.rx_chain &= ~RXON_RX_CHAIN_MIMO_FORCE_MSK;
879
880 IWL_DEBUG_ASSOC(priv, "rx_chain=0x%X active=%d idle=%d\n",
881 priv->staging_rxon.rx_chain,
882 active_rx_cnt, idle_rx_cnt);
883
884 WARN_ON(active_rx_cnt == 0 || idle_rx_cnt == 0 ||
885 active_rx_cnt < idle_rx_cnt);
886 }
887 EXPORT_SYMBOL(iwl_set_rxon_chain);
888
889 /**
890 * iwl_set_rxon_channel - Set the phymode and channel values in staging RXON
891 * @phymode: MODE_IEEE80211A sets to 5.2GHz; all else set to 2.4GHz
892 * @channel: Any channel valid for the requested phymode
893
894 * In addition to setting the staging RXON, priv->phymode is also set.
895 *
896 * NOTE: Does not commit to the hardware; it sets appropriate bit fields
897 * in the staging RXON flag structure based on the phymode
898 */
899 int iwl_set_rxon_channel(struct iwl_priv *priv, struct ieee80211_channel *ch)
900 {
901 enum ieee80211_band band = ch->band;
902 u16 channel = ieee80211_frequency_to_channel(ch->center_freq);
903
904 if (!iwl_get_channel_info(priv, band, channel)) {
905 IWL_DEBUG_INFO(priv, "Could not set channel to %d [%d]\n",
906 channel, band);
907 return -EINVAL;
908 }
909
910 if ((le16_to_cpu(priv->staging_rxon.channel) == channel) &&
911 (priv->band == band))
912 return 0;
913
914 priv->staging_rxon.channel = cpu_to_le16(channel);
915 if (band == IEEE80211_BAND_5GHZ)
916 priv->staging_rxon.flags &= ~RXON_FLG_BAND_24G_MSK;
917 else
918 priv->staging_rxon.flags |= RXON_FLG_BAND_24G_MSK;
919
920 priv->band = band;
921
922 IWL_DEBUG_INFO(priv, "Staging channel set to %d [%d]\n", channel, band);
923
924 return 0;
925 }
926 EXPORT_SYMBOL(iwl_set_rxon_channel);
927
928 void iwl_set_flags_for_band(struct iwl_priv *priv,
929 enum ieee80211_band band)
930 {
931 if (band == IEEE80211_BAND_5GHZ) {
932 priv->staging_rxon.flags &=
933 ~(RXON_FLG_BAND_24G_MSK | RXON_FLG_AUTO_DETECT_MSK
934 | RXON_FLG_CCK_MSK);
935 priv->staging_rxon.flags |= RXON_FLG_SHORT_SLOT_MSK;
936 } else {
937 /* Copied from iwl_post_associate() */
938 if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_SLOT_TIME)
939 priv->staging_rxon.flags |= RXON_FLG_SHORT_SLOT_MSK;
940 else
941 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
942
943 if (priv->iw_mode == NL80211_IFTYPE_ADHOC)
944 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
945
946 priv->staging_rxon.flags |= RXON_FLG_BAND_24G_MSK;
947 priv->staging_rxon.flags |= RXON_FLG_AUTO_DETECT_MSK;
948 priv->staging_rxon.flags &= ~RXON_FLG_CCK_MSK;
949 }
950 }
951
952 /*
953 * initialize rxon structure with default values from eeprom
954 */
955 void iwl_connection_init_rx_config(struct iwl_priv *priv, int mode)
956 {
957 const struct iwl_channel_info *ch_info;
958
959 memset(&priv->staging_rxon, 0, sizeof(priv->staging_rxon));
960
961 switch (mode) {
962 case NL80211_IFTYPE_AP:
963 priv->staging_rxon.dev_type = RXON_DEV_TYPE_AP;
964 break;
965
966 case NL80211_IFTYPE_STATION:
967 priv->staging_rxon.dev_type = RXON_DEV_TYPE_ESS;
968 priv->staging_rxon.filter_flags = RXON_FILTER_ACCEPT_GRP_MSK;
969 break;
970
971 case NL80211_IFTYPE_ADHOC:
972 priv->staging_rxon.dev_type = RXON_DEV_TYPE_IBSS;
973 priv->staging_rxon.flags = RXON_FLG_SHORT_PREAMBLE_MSK;
974 priv->staging_rxon.filter_flags = RXON_FILTER_BCON_AWARE_MSK |
975 RXON_FILTER_ACCEPT_GRP_MSK;
976 break;
977
978 default:
979 IWL_ERR(priv, "Unsupported interface type %d\n", mode);
980 break;
981 }
982
983 #if 0
984 /* TODO: Figure out when short_preamble would be set and cache from
985 * that */
986 if (!hw_to_local(priv->hw)->short_preamble)
987 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
988 else
989 priv->staging_rxon.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
990 #endif
991
992 ch_info = iwl_get_channel_info(priv, priv->band,
993 le16_to_cpu(priv->active_rxon.channel));
994
995 if (!ch_info)
996 ch_info = &priv->channel_info[0];
997
998 priv->staging_rxon.channel = cpu_to_le16(ch_info->channel);
999 priv->band = ch_info->band;
1000
1001 iwl_set_flags_for_band(priv, priv->band);
1002
1003 priv->staging_rxon.ofdm_basic_rates =
1004 (IWL_OFDM_RATES_MASK >> IWL_FIRST_OFDM_RATE) & 0xFF;
1005 priv->staging_rxon.cck_basic_rates =
1006 (IWL_CCK_RATES_MASK >> IWL_FIRST_CCK_RATE) & 0xF;
1007
1008 /* clear both MIX and PURE40 mode flag */
1009 priv->staging_rxon.flags &= ~(RXON_FLG_CHANNEL_MODE_MIXED |
1010 RXON_FLG_CHANNEL_MODE_PURE_40);
1011 memcpy(priv->staging_rxon.node_addr, priv->mac_addr, ETH_ALEN);
1012 memcpy(priv->staging_rxon.wlap_bssid_addr, priv->mac_addr, ETH_ALEN);
1013 priv->staging_rxon.ofdm_ht_single_stream_basic_rates = 0xff;
1014 priv->staging_rxon.ofdm_ht_dual_stream_basic_rates = 0xff;
1015 priv->staging_rxon.ofdm_ht_triple_stream_basic_rates = 0xff;
1016 }
1017 EXPORT_SYMBOL(iwl_connection_init_rx_config);
1018
1019 static void iwl_set_rate(struct iwl_priv *priv)
1020 {
1021 const struct ieee80211_supported_band *hw = NULL;
1022 struct ieee80211_rate *rate;
1023 int i;
1024
1025 hw = iwl_get_hw_mode(priv, priv->band);
1026 if (!hw) {
1027 IWL_ERR(priv, "Failed to set rate: unable to get hw mode\n");
1028 return;
1029 }
1030
1031 priv->active_rate = 0;
1032
1033 for (i = 0; i < hw->n_bitrates; i++) {
1034 rate = &(hw->bitrates[i]);
1035 if (rate->hw_value < IWL_RATE_COUNT_LEGACY)
1036 priv->active_rate |= (1 << rate->hw_value);
1037 }
1038
1039 IWL_DEBUG_RATE(priv, "Set active_rate = %0x\n", priv->active_rate);
1040
1041 priv->staging_rxon.cck_basic_rates =
1042 (IWL_CCK_BASIC_RATES_MASK >> IWL_FIRST_CCK_RATE) & 0xF;
1043
1044 priv->staging_rxon.ofdm_basic_rates =
1045 (IWL_OFDM_BASIC_RATES_MASK >> IWL_FIRST_OFDM_RATE) & 0xFF;
1046 }
1047
1048 void iwl_rx_csa(struct iwl_priv *priv, struct iwl_rx_mem_buffer *rxb)
1049 {
1050 struct iwl_rx_packet *pkt = rxb_addr(rxb);
1051 struct iwl_rxon_cmd *rxon = (void *)&priv->active_rxon;
1052 struct iwl_csa_notification *csa = &(pkt->u.csa_notif);
1053
1054 if (priv->switch_rxon.switch_in_progress) {
1055 if (!le32_to_cpu(csa->status) &&
1056 (csa->channel == priv->switch_rxon.channel)) {
1057 rxon->channel = csa->channel;
1058 priv->staging_rxon.channel = csa->channel;
1059 IWL_DEBUG_11H(priv, "CSA notif: channel %d\n",
1060 le16_to_cpu(csa->channel));
1061 } else
1062 IWL_ERR(priv, "CSA notif (fail) : channel %d\n",
1063 le16_to_cpu(csa->channel));
1064
1065 priv->switch_rxon.switch_in_progress = false;
1066 }
1067 }
1068 EXPORT_SYMBOL(iwl_rx_csa);
1069
1070 #ifdef CONFIG_IWLWIFI_DEBUG
1071 void iwl_print_rx_config_cmd(struct iwl_priv *priv)
1072 {
1073 struct iwl_rxon_cmd *rxon = &priv->staging_rxon;
1074
1075 IWL_DEBUG_RADIO(priv, "RX CONFIG:\n");
1076 iwl_print_hex_dump(priv, IWL_DL_RADIO, (u8 *) rxon, sizeof(*rxon));
1077 IWL_DEBUG_RADIO(priv, "u16 channel: 0x%x\n", le16_to_cpu(rxon->channel));
1078 IWL_DEBUG_RADIO(priv, "u32 flags: 0x%08X\n", le32_to_cpu(rxon->flags));
1079 IWL_DEBUG_RADIO(priv, "u32 filter_flags: 0x%08x\n",
1080 le32_to_cpu(rxon->filter_flags));
1081 IWL_DEBUG_RADIO(priv, "u8 dev_type: 0x%x\n", rxon->dev_type);
1082 IWL_DEBUG_RADIO(priv, "u8 ofdm_basic_rates: 0x%02x\n",
1083 rxon->ofdm_basic_rates);
1084 IWL_DEBUG_RADIO(priv, "u8 cck_basic_rates: 0x%02x\n", rxon->cck_basic_rates);
1085 IWL_DEBUG_RADIO(priv, "u8[6] node_addr: %pM\n", rxon->node_addr);
1086 IWL_DEBUG_RADIO(priv, "u8[6] bssid_addr: %pM\n", rxon->bssid_addr);
1087 IWL_DEBUG_RADIO(priv, "u16 assoc_id: 0x%x\n", le16_to_cpu(rxon->assoc_id));
1088 }
1089 EXPORT_SYMBOL(iwl_print_rx_config_cmd);
1090 #endif
1091 /**
1092 * iwl_irq_handle_error - called for HW or SW error interrupt from card
1093 */
1094 void iwl_irq_handle_error(struct iwl_priv *priv)
1095 {
1096 /* Set the FW error flag -- cleared on iwl_down */
1097 set_bit(STATUS_FW_ERROR, &priv->status);
1098
1099 /* Cancel currently queued command. */
1100 clear_bit(STATUS_HCMD_ACTIVE, &priv->status);
1101
1102 priv->cfg->ops->lib->dump_nic_error_log(priv);
1103 if (priv->cfg->ops->lib->dump_csr)
1104 priv->cfg->ops->lib->dump_csr(priv);
1105 if (priv->cfg->ops->lib->dump_fh)
1106 priv->cfg->ops->lib->dump_fh(priv, NULL, false);
1107 priv->cfg->ops->lib->dump_nic_event_log(priv, false, NULL, false);
1108 #ifdef CONFIG_IWLWIFI_DEBUG
1109 if (iwl_get_debug_level(priv) & IWL_DL_FW_ERRORS)
1110 iwl_print_rx_config_cmd(priv);
1111 #endif
1112
1113 wake_up_interruptible(&priv->wait_command_queue);
1114
1115 /* Keep the restart process from trying to send host
1116 * commands by clearing the INIT status bit */
1117 clear_bit(STATUS_READY, &priv->status);
1118
1119 if (!test_bit(STATUS_EXIT_PENDING, &priv->status)) {
1120 IWL_DEBUG(priv, IWL_DL_FW_ERRORS,
1121 "Restarting adapter due to uCode error.\n");
1122
1123 if (priv->cfg->mod_params->restart_fw)
1124 queue_work(priv->workqueue, &priv->restart);
1125 }
1126 }
1127 EXPORT_SYMBOL(iwl_irq_handle_error);
1128
1129 static int iwl_apm_stop_master(struct iwl_priv *priv)
1130 {
1131 int ret = 0;
1132
1133 /* stop device's busmaster DMA activity */
1134 iwl_set_bit(priv, CSR_RESET, CSR_RESET_REG_FLAG_STOP_MASTER);
1135
1136 ret = iwl_poll_bit(priv, CSR_RESET, CSR_RESET_REG_FLAG_MASTER_DISABLED,
1137 CSR_RESET_REG_FLAG_MASTER_DISABLED, 100);
1138 if (ret)
1139 IWL_WARN(priv, "Master Disable Timed Out, 100 usec\n");
1140
1141 IWL_DEBUG_INFO(priv, "stop master\n");
1142
1143 return ret;
1144 }
1145
1146 void iwl_apm_stop(struct iwl_priv *priv)
1147 {
1148 IWL_DEBUG_INFO(priv, "Stop card, put in low power state\n");
1149
1150 /* Stop device's DMA activity */
1151 iwl_apm_stop_master(priv);
1152
1153 /* Reset the entire device */
1154 iwl_set_bit(priv, CSR_RESET, CSR_RESET_REG_FLAG_SW_RESET);
1155
1156 udelay(10);
1157
1158 /*
1159 * Clear "initialization complete" bit to move adapter from
1160 * D0A* (powered-up Active) --> D0U* (Uninitialized) state.
1161 */
1162 iwl_clear_bit(priv, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_INIT_DONE);
1163 }
1164 EXPORT_SYMBOL(iwl_apm_stop);
1165
1166
1167 /*
1168 * Start up NIC's basic functionality after it has been reset
1169 * (e.g. after platform boot, or shutdown via iwl_apm_stop())
1170 * NOTE: This does not load uCode nor start the embedded processor
1171 */
1172 int iwl_apm_init(struct iwl_priv *priv)
1173 {
1174 int ret = 0;
1175 u16 lctl;
1176
1177 IWL_DEBUG_INFO(priv, "Init card's basic functions\n");
1178
1179 /*
1180 * Use "set_bit" below rather than "write", to preserve any hardware
1181 * bits already set by default after reset.
1182 */
1183
1184 /* Disable L0S exit timer (platform NMI Work/Around) */
1185 iwl_set_bit(priv, CSR_GIO_CHICKEN_BITS,
1186 CSR_GIO_CHICKEN_BITS_REG_BIT_DIS_L0S_EXIT_TIMER);
1187
1188 /*
1189 * Disable L0s without affecting L1;
1190 * don't wait for ICH L0s (ICH bug W/A)
1191 */
1192 iwl_set_bit(priv, CSR_GIO_CHICKEN_BITS,
1193 CSR_GIO_CHICKEN_BITS_REG_BIT_L1A_NO_L0S_RX);
1194
1195 /* Set FH wait threshold to maximum (HW error during stress W/A) */
1196 iwl_set_bit(priv, CSR_DBG_HPET_MEM_REG, CSR_DBG_HPET_MEM_REG_VAL);
1197
1198 /*
1199 * Enable HAP INTA (interrupt from management bus) to
1200 * wake device's PCI Express link L1a -> L0s
1201 * NOTE: This is no-op for 3945 (non-existant bit)
1202 */
1203 iwl_set_bit(priv, CSR_HW_IF_CONFIG_REG,
1204 CSR_HW_IF_CONFIG_REG_BIT_HAP_WAKE_L1A);
1205
1206 /*
1207 * HW bug W/A for instability in PCIe bus L0->L0S->L1 transition.
1208 * Check if BIOS (or OS) enabled L1-ASPM on this device.
1209 * If so (likely), disable L0S, so device moves directly L0->L1;
1210 * costs negligible amount of power savings.
1211 * If not (unlikely), enable L0S, so there is at least some
1212 * power savings, even without L1.
1213 */
1214 if (priv->cfg->set_l0s) {
1215 lctl = iwl_pcie_link_ctl(priv);
1216 if ((lctl & PCI_CFG_LINK_CTRL_VAL_L1_EN) ==
1217 PCI_CFG_LINK_CTRL_VAL_L1_EN) {
1218 /* L1-ASPM enabled; disable(!) L0S */
1219 iwl_set_bit(priv, CSR_GIO_REG,
1220 CSR_GIO_REG_VAL_L0S_ENABLED);
1221 IWL_DEBUG_POWER(priv, "L1 Enabled; Disabling L0S\n");
1222 } else {
1223 /* L1-ASPM disabled; enable(!) L0S */
1224 iwl_clear_bit(priv, CSR_GIO_REG,
1225 CSR_GIO_REG_VAL_L0S_ENABLED);
1226 IWL_DEBUG_POWER(priv, "L1 Disabled; Enabling L0S\n");
1227 }
1228 }
1229
1230 /* Configure analog phase-lock-loop before activating to D0A */
1231 if (priv->cfg->pll_cfg_val)
1232 iwl_set_bit(priv, CSR_ANA_PLL_CFG, priv->cfg->pll_cfg_val);
1233
1234 /*
1235 * Set "initialization complete" bit to move adapter from
1236 * D0U* --> D0A* (powered-up active) state.
1237 */
1238 iwl_set_bit(priv, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_INIT_DONE);
1239
1240 /*
1241 * Wait for clock stabilization; once stabilized, access to
1242 * device-internal resources is supported, e.g. iwl_write_prph()
1243 * and accesses to uCode SRAM.
1244 */
1245 ret = iwl_poll_bit(priv, CSR_GP_CNTRL,
1246 CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY,
1247 CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY, 25000);
1248 if (ret < 0) {
1249 IWL_DEBUG_INFO(priv, "Failed to init the card\n");
1250 goto out;
1251 }
1252
1253 /*
1254 * Enable DMA and BSM (if used) clocks, wait for them to stabilize.
1255 * BSM (Boostrap State Machine) is only in 3945 and 4965;
1256 * later devices (i.e. 5000 and later) have non-volatile SRAM,
1257 * and don't need BSM to restore data after power-saving sleep.
1258 *
1259 * Write to "CLK_EN_REG"; "1" bits enable clocks, while "0" bits
1260 * do not disable clocks. This preserves any hardware bits already
1261 * set by default in "CLK_CTRL_REG" after reset.
1262 */
1263 if (priv->cfg->use_bsm)
1264 iwl_write_prph(priv, APMG_CLK_EN_REG,
1265 APMG_CLK_VAL_DMA_CLK_RQT | APMG_CLK_VAL_BSM_CLK_RQT);
1266 else
1267 iwl_write_prph(priv, APMG_CLK_EN_REG,
1268 APMG_CLK_VAL_DMA_CLK_RQT);
1269 udelay(20);
1270
1271 /* Disable L1-Active */
1272 iwl_set_bits_prph(priv, APMG_PCIDEV_STT_REG,
1273 APMG_PCIDEV_STT_VAL_L1_ACT_DIS);
1274
1275 out:
1276 return ret;
1277 }
1278 EXPORT_SYMBOL(iwl_apm_init);
1279
1280
1281
1282 void iwl_configure_filter(struct ieee80211_hw *hw,
1283 unsigned int changed_flags,
1284 unsigned int *total_flags,
1285 u64 multicast)
1286 {
1287 struct iwl_priv *priv = hw->priv;
1288 __le32 *filter_flags = &priv->staging_rxon.filter_flags;
1289
1290 IWL_DEBUG_MAC80211(priv, "Enter: changed: 0x%x, total: 0x%x\n",
1291 changed_flags, *total_flags);
1292
1293 if (changed_flags & (FIF_OTHER_BSS | FIF_PROMISC_IN_BSS)) {
1294 if (*total_flags & (FIF_OTHER_BSS | FIF_PROMISC_IN_BSS))
1295 *filter_flags |= RXON_FILTER_PROMISC_MSK;
1296 else
1297 *filter_flags &= ~RXON_FILTER_PROMISC_MSK;
1298 }
1299 if (changed_flags & FIF_ALLMULTI) {
1300 if (*total_flags & FIF_ALLMULTI)
1301 *filter_flags |= RXON_FILTER_ACCEPT_GRP_MSK;
1302 else
1303 *filter_flags &= ~RXON_FILTER_ACCEPT_GRP_MSK;
1304 }
1305 if (changed_flags & FIF_CONTROL) {
1306 if (*total_flags & FIF_CONTROL)
1307 *filter_flags |= RXON_FILTER_CTL2HOST_MSK;
1308 else
1309 *filter_flags &= ~RXON_FILTER_CTL2HOST_MSK;
1310 }
1311 if (changed_flags & FIF_BCN_PRBRESP_PROMISC) {
1312 if (*total_flags & FIF_BCN_PRBRESP_PROMISC)
1313 *filter_flags |= RXON_FILTER_BCON_AWARE_MSK;
1314 else
1315 *filter_flags &= ~RXON_FILTER_BCON_AWARE_MSK;
1316 }
1317
1318 /* We avoid iwl_commit_rxon here to commit the new filter flags
1319 * since mac80211 will call ieee80211_hw_config immediately.
1320 * (mc_list is not supported at this time). Otherwise, we need to
1321 * queue a background iwl_commit_rxon work.
1322 */
1323
1324 *total_flags &= FIF_OTHER_BSS | FIF_ALLMULTI | FIF_PROMISC_IN_BSS |
1325 FIF_BCN_PRBRESP_PROMISC | FIF_CONTROL;
1326 }
1327 EXPORT_SYMBOL(iwl_configure_filter);
1328
1329 int iwl_set_hw_params(struct iwl_priv *priv)
1330 {
1331 priv->hw_params.max_rxq_size = RX_QUEUE_SIZE;
1332 priv->hw_params.max_rxq_log = RX_QUEUE_SIZE_LOG;
1333 if (priv->cfg->mod_params->amsdu_size_8K)
1334 priv->hw_params.rx_page_order = get_order(IWL_RX_BUF_SIZE_8K);
1335 else
1336 priv->hw_params.rx_page_order = get_order(IWL_RX_BUF_SIZE_4K);
1337
1338 priv->hw_params.max_beacon_itrvl = IWL_MAX_UCODE_BEACON_INTERVAL;
1339
1340 if (priv->cfg->mod_params->disable_11n)
1341 priv->cfg->sku &= ~IWL_SKU_N;
1342
1343 /* Device-specific setup */
1344 return priv->cfg->ops->lib->set_hw_params(priv);
1345 }
1346 EXPORT_SYMBOL(iwl_set_hw_params);
1347
1348 int iwl_set_tx_power(struct iwl_priv *priv, s8 tx_power, bool force)
1349 {
1350 int ret = 0;
1351 s8 prev_tx_power = priv->tx_power_user_lmt;
1352
1353 if (tx_power < IWLAGN_TX_POWER_TARGET_POWER_MIN) {
1354 IWL_WARN(priv,
1355 "Requested user TXPOWER %d below lower limit %d.\n",
1356 tx_power,
1357 IWLAGN_TX_POWER_TARGET_POWER_MIN);
1358 return -EINVAL;
1359 }
1360
1361 if (tx_power > priv->tx_power_device_lmt) {
1362 IWL_WARN(priv,
1363 "Requested user TXPOWER %d above upper limit %d.\n",
1364 tx_power, priv->tx_power_device_lmt);
1365 return -EINVAL;
1366 }
1367
1368 if (priv->tx_power_user_lmt != tx_power)
1369 force = true;
1370
1371 /* if nic is not up don't send command */
1372 if (iwl_is_ready_rf(priv)) {
1373 priv->tx_power_user_lmt = tx_power;
1374 if (force && priv->cfg->ops->lib->send_tx_power)
1375 ret = priv->cfg->ops->lib->send_tx_power(priv);
1376 else if (!priv->cfg->ops->lib->send_tx_power)
1377 ret = -EOPNOTSUPP;
1378 /*
1379 * if fail to set tx_power, restore the orig. tx power
1380 */
1381 if (ret)
1382 priv->tx_power_user_lmt = prev_tx_power;
1383 }
1384
1385 /*
1386 * Even this is an async host command, the command
1387 * will always report success from uCode
1388 * So once driver can placing the command into the queue
1389 * successfully, driver can use priv->tx_power_user_lmt
1390 * to reflect the current tx power
1391 */
1392 return ret;
1393 }
1394 EXPORT_SYMBOL(iwl_set_tx_power);
1395
1396 irqreturn_t iwl_isr_legacy(int irq, void *data)
1397 {
1398 struct iwl_priv *priv = data;
1399 u32 inta, inta_mask;
1400 u32 inta_fh;
1401 unsigned long flags;
1402 if (!priv)
1403 return IRQ_NONE;
1404
1405 spin_lock_irqsave(&priv->lock, flags);
1406
1407 /* Disable (but don't clear!) interrupts here to avoid
1408 * back-to-back ISRs and sporadic interrupts from our NIC.
1409 * If we have something to service, the tasklet will re-enable ints.
1410 * If we *don't* have something, we'll re-enable before leaving here. */
1411 inta_mask = iwl_read32(priv, CSR_INT_MASK); /* just for debug */
1412 iwl_write32(priv, CSR_INT_MASK, 0x00000000);
1413
1414 /* Discover which interrupts are active/pending */
1415 inta = iwl_read32(priv, CSR_INT);
1416 inta_fh = iwl_read32(priv, CSR_FH_INT_STATUS);
1417
1418 /* Ignore interrupt if there's nothing in NIC to service.
1419 * This may be due to IRQ shared with another device,
1420 * or due to sporadic interrupts thrown from our NIC. */
1421 if (!inta && !inta_fh) {
1422 IWL_DEBUG_ISR(priv, "Ignore interrupt, inta == 0, inta_fh == 0\n");
1423 goto none;
1424 }
1425
1426 if ((inta == 0xFFFFFFFF) || ((inta & 0xFFFFFFF0) == 0xa5a5a5a0)) {
1427 /* Hardware disappeared. It might have already raised
1428 * an interrupt */
1429 IWL_WARN(priv, "HARDWARE GONE?? INTA == 0x%08x\n", inta);
1430 goto unplugged;
1431 }
1432
1433 IWL_DEBUG_ISR(priv, "ISR inta 0x%08x, enabled 0x%08x, fh 0x%08x\n",
1434 inta, inta_mask, inta_fh);
1435
1436 inta &= ~CSR_INT_BIT_SCD;
1437
1438 /* iwl_irq_tasklet() will service interrupts and re-enable them */
1439 if (likely(inta || inta_fh))
1440 tasklet_schedule(&priv->irq_tasklet);
1441
1442 unplugged:
1443 spin_unlock_irqrestore(&priv->lock, flags);
1444 return IRQ_HANDLED;
1445
1446 none:
1447 /* re-enable interrupts here since we don't have anything to service. */
1448 /* only Re-enable if diabled by irq */
1449 if (test_bit(STATUS_INT_ENABLED, &priv->status))
1450 iwl_enable_interrupts(priv);
1451 spin_unlock_irqrestore(&priv->lock, flags);
1452 return IRQ_NONE;
1453 }
1454 EXPORT_SYMBOL(iwl_isr_legacy);
1455
1456 void iwl_send_bt_config(struct iwl_priv *priv)
1457 {
1458 struct iwl_bt_cmd bt_cmd = {
1459 .lead_time = BT_LEAD_TIME_DEF,
1460 .max_kill = BT_MAX_KILL_DEF,
1461 .kill_ack_mask = 0,
1462 .kill_cts_mask = 0,
1463 };
1464
1465 if (!bt_coex_active)
1466 bt_cmd.flags = BT_COEX_DISABLE;
1467 else
1468 bt_cmd.flags = BT_COEX_ENABLE;
1469
1470 IWL_DEBUG_INFO(priv, "BT coex %s\n",
1471 (bt_cmd.flags == BT_COEX_DISABLE) ? "disable" : "active");
1472
1473 if (iwl_send_cmd_pdu(priv, REPLY_BT_CONFIG,
1474 sizeof(struct iwl_bt_cmd), &bt_cmd))
1475 IWL_ERR(priv, "failed to send BT Coex Config\n");
1476 }
1477 EXPORT_SYMBOL(iwl_send_bt_config);
1478
1479 int iwl_send_statistics_request(struct iwl_priv *priv, u8 flags, bool clear)
1480 {
1481 struct iwl_statistics_cmd statistics_cmd = {
1482 .configuration_flags =
1483 clear ? IWL_STATS_CONF_CLEAR_STATS : 0,
1484 };
1485
1486 if (flags & CMD_ASYNC)
1487 return iwl_send_cmd_pdu_async(priv, REPLY_STATISTICS_CMD,
1488 sizeof(struct iwl_statistics_cmd),
1489 &statistics_cmd, NULL);
1490 else
1491 return iwl_send_cmd_pdu(priv, REPLY_STATISTICS_CMD,
1492 sizeof(struct iwl_statistics_cmd),
1493 &statistics_cmd);
1494 }
1495 EXPORT_SYMBOL(iwl_send_statistics_request);
1496
1497 /**
1498 * iwl_verify_inst_sparse - verify runtime uCode image in card vs. host,
1499 * using sample data 100 bytes apart. If these sample points are good,
1500 * it's a pretty good bet that everything between them is good, too.
1501 */
1502 static int iwlcore_verify_inst_sparse(struct iwl_priv *priv, __le32 *image, u32 len)
1503 {
1504 u32 val;
1505 int ret = 0;
1506 u32 errcnt = 0;
1507 u32 i;
1508
1509 IWL_DEBUG_INFO(priv, "ucode inst image size is %u\n", len);
1510
1511 for (i = 0; i < len; i += 100, image += 100/sizeof(u32)) {
1512 /* read data comes through single port, auto-incr addr */
1513 /* NOTE: Use the debugless read so we don't flood kernel log
1514 * if IWL_DL_IO is set */
1515 iwl_write_direct32(priv, HBUS_TARG_MEM_RADDR,
1516 i + IWL49_RTC_INST_LOWER_BOUND);
1517 val = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT);
1518 if (val != le32_to_cpu(*image)) {
1519 ret = -EIO;
1520 errcnt++;
1521 if (errcnt >= 3)
1522 break;
1523 }
1524 }
1525
1526 return ret;
1527 }
1528
1529 /**
1530 * iwlcore_verify_inst_full - verify runtime uCode image in card vs. host,
1531 * looking at all data.
1532 */
1533 static int iwl_verify_inst_full(struct iwl_priv *priv, __le32 *image,
1534 u32 len)
1535 {
1536 u32 val;
1537 u32 save_len = len;
1538 int ret = 0;
1539 u32 errcnt;
1540
1541 IWL_DEBUG_INFO(priv, "ucode inst image size is %u\n", len);
1542
1543 iwl_write_direct32(priv, HBUS_TARG_MEM_RADDR,
1544 IWL49_RTC_INST_LOWER_BOUND);
1545
1546 errcnt = 0;
1547 for (; len > 0; len -= sizeof(u32), image++) {
1548 /* read data comes through single port, auto-incr addr */
1549 /* NOTE: Use the debugless read so we don't flood kernel log
1550 * if IWL_DL_IO is set */
1551 val = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT);
1552 if (val != le32_to_cpu(*image)) {
1553 IWL_ERR(priv, "uCode INST section is invalid at "
1554 "offset 0x%x, is 0x%x, s/b 0x%x\n",
1555 save_len - len, val, le32_to_cpu(*image));
1556 ret = -EIO;
1557 errcnt++;
1558 if (errcnt >= 20)
1559 break;
1560 }
1561 }
1562
1563 if (!errcnt)
1564 IWL_DEBUG_INFO(priv,
1565 "ucode image in INSTRUCTION memory is good\n");
1566
1567 return ret;
1568 }
1569
1570 /**
1571 * iwl_verify_ucode - determine which instruction image is in SRAM,
1572 * and verify its contents
1573 */
1574 int iwl_verify_ucode(struct iwl_priv *priv)
1575 {
1576 __le32 *image;
1577 u32 len;
1578 int ret;
1579
1580 /* Try bootstrap */
1581 image = (__le32 *)priv->ucode_boot.v_addr;
1582 len = priv->ucode_boot.len;
1583 ret = iwlcore_verify_inst_sparse(priv, image, len);
1584 if (!ret) {
1585 IWL_DEBUG_INFO(priv, "Bootstrap uCode is good in inst SRAM\n");
1586 return 0;
1587 }
1588
1589 /* Try initialize */
1590 image = (__le32 *)priv->ucode_init.v_addr;
1591 len = priv->ucode_init.len;
1592 ret = iwlcore_verify_inst_sparse(priv, image, len);
1593 if (!ret) {
1594 IWL_DEBUG_INFO(priv, "Initialize uCode is good in inst SRAM\n");
1595 return 0;
1596 }
1597
1598 /* Try runtime/protocol */
1599 image = (__le32 *)priv->ucode_code.v_addr;
1600 len = priv->ucode_code.len;
1601 ret = iwlcore_verify_inst_sparse(priv, image, len);
1602 if (!ret) {
1603 IWL_DEBUG_INFO(priv, "Runtime uCode is good in inst SRAM\n");
1604 return 0;
1605 }
1606
1607 IWL_ERR(priv, "NO VALID UCODE IMAGE IN INSTRUCTION SRAM!!\n");
1608
1609 /* Since nothing seems to match, show first several data entries in
1610 * instruction SRAM, so maybe visual inspection will give a clue.
1611 * Selection of bootstrap image (vs. other images) is arbitrary. */
1612 image = (__le32 *)priv->ucode_boot.v_addr;
1613 len = priv->ucode_boot.len;
1614 ret = iwl_verify_inst_full(priv, image, len);
1615
1616 return ret;
1617 }
1618 EXPORT_SYMBOL(iwl_verify_ucode);
1619
1620
1621 void iwl_rf_kill_ct_config(struct iwl_priv *priv)
1622 {
1623 struct iwl_ct_kill_config cmd;
1624 struct iwl_ct_kill_throttling_config adv_cmd;
1625 unsigned long flags;
1626 int ret = 0;
1627
1628 spin_lock_irqsave(&priv->lock, flags);
1629 iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR,
1630 CSR_UCODE_DRV_GP1_REG_BIT_CT_KILL_EXIT);
1631 spin_unlock_irqrestore(&priv->lock, flags);
1632 priv->thermal_throttle.ct_kill_toggle = false;
1633
1634 if (priv->cfg->support_ct_kill_exit) {
1635 adv_cmd.critical_temperature_enter =
1636 cpu_to_le32(priv->hw_params.ct_kill_threshold);
1637 adv_cmd.critical_temperature_exit =
1638 cpu_to_le32(priv->hw_params.ct_kill_exit_threshold);
1639
1640 ret = iwl_send_cmd_pdu(priv, REPLY_CT_KILL_CONFIG_CMD,
1641 sizeof(adv_cmd), &adv_cmd);
1642 if (ret)
1643 IWL_ERR(priv, "REPLY_CT_KILL_CONFIG_CMD failed\n");
1644 else
1645 IWL_DEBUG_INFO(priv, "REPLY_CT_KILL_CONFIG_CMD "
1646 "succeeded, "
1647 "critical temperature enter is %d,"
1648 "exit is %d\n",
1649 priv->hw_params.ct_kill_threshold,
1650 priv->hw_params.ct_kill_exit_threshold);
1651 } else {
1652 cmd.critical_temperature_R =
1653 cpu_to_le32(priv->hw_params.ct_kill_threshold);
1654
1655 ret = iwl_send_cmd_pdu(priv, REPLY_CT_KILL_CONFIG_CMD,
1656 sizeof(cmd), &cmd);
1657 if (ret)
1658 IWL_ERR(priv, "REPLY_CT_KILL_CONFIG_CMD failed\n");
1659 else
1660 IWL_DEBUG_INFO(priv, "REPLY_CT_KILL_CONFIG_CMD "
1661 "succeeded, "
1662 "critical temperature is %d\n",
1663 priv->hw_params.ct_kill_threshold);
1664 }
1665 }
1666 EXPORT_SYMBOL(iwl_rf_kill_ct_config);
1667
1668
1669 /*
1670 * CARD_STATE_CMD
1671 *
1672 * Use: Sets the device's internal card state to enable, disable, or halt
1673 *
1674 * When in the 'enable' state the card operates as normal.
1675 * When in the 'disable' state, the card enters into a low power mode.
1676 * When in the 'halt' state, the card is shut down and must be fully
1677 * restarted to come back on.
1678 */
1679 int iwl_send_card_state(struct iwl_priv *priv, u32 flags, u8 meta_flag)
1680 {
1681 struct iwl_host_cmd cmd = {
1682 .id = REPLY_CARD_STATE_CMD,
1683 .len = sizeof(u32),
1684 .data = &flags,
1685 .flags = meta_flag,
1686 };
1687
1688 return iwl_send_cmd(priv, &cmd);
1689 }
1690
1691 void iwl_rx_pm_sleep_notif(struct iwl_priv *priv,
1692 struct iwl_rx_mem_buffer *rxb)
1693 {
1694 #ifdef CONFIG_IWLWIFI_DEBUG
1695 struct iwl_rx_packet *pkt = rxb_addr(rxb);
1696 struct iwl_sleep_notification *sleep = &(pkt->u.sleep_notif);
1697 IWL_DEBUG_RX(priv, "sleep mode: %d, src: %d\n",
1698 sleep->pm_sleep_mode, sleep->pm_wakeup_src);
1699 #endif
1700 }
1701 EXPORT_SYMBOL(iwl_rx_pm_sleep_notif);
1702
1703 void iwl_rx_pm_debug_statistics_notif(struct iwl_priv *priv,
1704 struct iwl_rx_mem_buffer *rxb)
1705 {
1706 struct iwl_rx_packet *pkt = rxb_addr(rxb);
1707 u32 len = le32_to_cpu(pkt->len_n_flags) & FH_RSCSR_FRAME_SIZE_MSK;
1708 IWL_DEBUG_RADIO(priv, "Dumping %d bytes of unhandled "
1709 "notification for %s:\n", len,
1710 get_cmd_string(pkt->hdr.cmd));
1711 iwl_print_hex_dump(priv, IWL_DL_RADIO, pkt->u.raw, len);
1712 }
1713 EXPORT_SYMBOL(iwl_rx_pm_debug_statistics_notif);
1714
1715 void iwl_rx_reply_error(struct iwl_priv *priv,
1716 struct iwl_rx_mem_buffer *rxb)
1717 {
1718 struct iwl_rx_packet *pkt = rxb_addr(rxb);
1719
1720 IWL_ERR(priv, "Error Reply type 0x%08X cmd %s (0x%02X) "
1721 "seq 0x%04X ser 0x%08X\n",
1722 le32_to_cpu(pkt->u.err_resp.error_type),
1723 get_cmd_string(pkt->u.err_resp.cmd_id),
1724 pkt->u.err_resp.cmd_id,
1725 le16_to_cpu(pkt->u.err_resp.bad_cmd_seq_num),
1726 le32_to_cpu(pkt->u.err_resp.error_info));
1727 }
1728 EXPORT_SYMBOL(iwl_rx_reply_error);
1729
1730 void iwl_clear_isr_stats(struct iwl_priv *priv)
1731 {
1732 memset(&priv->isr_stats, 0, sizeof(priv->isr_stats));
1733 }
1734
1735 int iwl_mac_conf_tx(struct ieee80211_hw *hw, u16 queue,
1736 const struct ieee80211_tx_queue_params *params)
1737 {
1738 struct iwl_priv *priv = hw->priv;
1739 unsigned long flags;
1740 int q;
1741
1742 IWL_DEBUG_MAC80211(priv, "enter\n");
1743
1744 if (!iwl_is_ready_rf(priv)) {
1745 IWL_DEBUG_MAC80211(priv, "leave - RF not ready\n");
1746 return -EIO;
1747 }
1748
1749 if (queue >= AC_NUM) {
1750 IWL_DEBUG_MAC80211(priv, "leave - queue >= AC_NUM %d\n", queue);
1751 return 0;
1752 }
1753
1754 q = AC_NUM - 1 - queue;
1755
1756 spin_lock_irqsave(&priv->lock, flags);
1757
1758 priv->qos_data.def_qos_parm.ac[q].cw_min = cpu_to_le16(params->cw_min);
1759 priv->qos_data.def_qos_parm.ac[q].cw_max = cpu_to_le16(params->cw_max);
1760 priv->qos_data.def_qos_parm.ac[q].aifsn = params->aifs;
1761 priv->qos_data.def_qos_parm.ac[q].edca_txop =
1762 cpu_to_le16((params->txop * 32));
1763
1764 priv->qos_data.def_qos_parm.ac[q].reserved1 = 0;
1765
1766 spin_unlock_irqrestore(&priv->lock, flags);
1767
1768 IWL_DEBUG_MAC80211(priv, "leave\n");
1769 return 0;
1770 }
1771 EXPORT_SYMBOL(iwl_mac_conf_tx);
1772
1773 static void iwl_ht_conf(struct iwl_priv *priv,
1774 struct ieee80211_bss_conf *bss_conf)
1775 {
1776 struct iwl_ht_config *ht_conf = &priv->current_ht_config;
1777 struct ieee80211_sta *sta;
1778
1779 IWL_DEBUG_MAC80211(priv, "enter:\n");
1780
1781 if (!ht_conf->is_ht)
1782 return;
1783
1784 ht_conf->ht_protection =
1785 bss_conf->ht_operation_mode & IEEE80211_HT_OP_MODE_PROTECTION;
1786 ht_conf->non_GF_STA_present =
1787 !!(bss_conf->ht_operation_mode & IEEE80211_HT_OP_MODE_NON_GF_STA_PRSNT);
1788
1789 ht_conf->single_chain_sufficient = false;
1790
1791 switch (priv->iw_mode) {
1792 case NL80211_IFTYPE_STATION:
1793 rcu_read_lock();
1794 sta = ieee80211_find_sta(priv->vif, priv->bssid);
1795 if (sta) {
1796 struct ieee80211_sta_ht_cap *ht_cap = &sta->ht_cap;
1797 int maxstreams;
1798
1799 maxstreams = (ht_cap->mcs.tx_params &
1800 IEEE80211_HT_MCS_TX_MAX_STREAMS_MASK)
1801 >> IEEE80211_HT_MCS_TX_MAX_STREAMS_SHIFT;
1802 maxstreams += 1;
1803
1804 if ((ht_cap->mcs.rx_mask[1] == 0) &&
1805 (ht_cap->mcs.rx_mask[2] == 0))
1806 ht_conf->single_chain_sufficient = true;
1807 if (maxstreams <= 1)
1808 ht_conf->single_chain_sufficient = true;
1809 } else {
1810 /*
1811 * If at all, this can only happen through a race
1812 * when the AP disconnects us while we're still
1813 * setting up the connection, in that case mac80211
1814 * will soon tell us about that.
1815 */
1816 ht_conf->single_chain_sufficient = true;
1817 }
1818 rcu_read_unlock();
1819 break;
1820 case NL80211_IFTYPE_ADHOC:
1821 ht_conf->single_chain_sufficient = true;
1822 break;
1823 default:
1824 break;
1825 }
1826
1827 IWL_DEBUG_MAC80211(priv, "leave\n");
1828 }
1829
1830 static inline void iwl_set_no_assoc(struct iwl_priv *priv)
1831 {
1832 priv->assoc_id = 0;
1833 iwl_led_disassociate(priv);
1834 /*
1835 * inform the ucode that there is no longer an
1836 * association and that no more packets should be
1837 * sent
1838 */
1839 priv->staging_rxon.filter_flags &=
1840 ~RXON_FILTER_ASSOC_MSK;
1841 priv->staging_rxon.assoc_id = 0;
1842 iwlcore_commit_rxon(priv);
1843 }
1844
1845 void iwl_bss_info_changed(struct ieee80211_hw *hw,
1846 struct ieee80211_vif *vif,
1847 struct ieee80211_bss_conf *bss_conf,
1848 u32 changes)
1849 {
1850 struct iwl_priv *priv = hw->priv;
1851 int ret;
1852
1853 IWL_DEBUG_MAC80211(priv, "changes = 0x%X\n", changes);
1854
1855 if (!iwl_is_alive(priv))
1856 return;
1857
1858 mutex_lock(&priv->mutex);
1859
1860 if (changes & BSS_CHANGED_BEACON &&
1861 priv->iw_mode == NL80211_IFTYPE_AP) {
1862 dev_kfree_skb(priv->ibss_beacon);
1863 priv->ibss_beacon = ieee80211_beacon_get(hw, vif);
1864 }
1865
1866 if (changes & BSS_CHANGED_BEACON_INT) {
1867 priv->beacon_int = bss_conf->beacon_int;
1868 /* TODO: in AP mode, do something to make this take effect */
1869 }
1870
1871 if (changes & BSS_CHANGED_BSSID) {
1872 IWL_DEBUG_MAC80211(priv, "BSSID %pM\n", bss_conf->bssid);
1873
1874 /*
1875 * If there is currently a HW scan going on in the
1876 * background then we need to cancel it else the RXON
1877 * below/in post_associate will fail.
1878 */
1879 if (iwl_scan_cancel_timeout(priv, 100)) {
1880 IWL_WARN(priv, "Aborted scan still in progress after 100ms\n");
1881 IWL_DEBUG_MAC80211(priv, "leaving - scan abort failed.\n");
1882 mutex_unlock(&priv->mutex);
1883 return;
1884 }
1885
1886 /* mac80211 only sets assoc when in STATION mode */
1887 if (priv->iw_mode == NL80211_IFTYPE_ADHOC ||
1888 bss_conf->assoc) {
1889 memcpy(priv->staging_rxon.bssid_addr,
1890 bss_conf->bssid, ETH_ALEN);
1891
1892 /* currently needed in a few places */
1893 memcpy(priv->bssid, bss_conf->bssid, ETH_ALEN);
1894 } else {
1895 priv->staging_rxon.filter_flags &=
1896 ~RXON_FILTER_ASSOC_MSK;
1897 }
1898
1899 }
1900
1901 /*
1902 * This needs to be after setting the BSSID in case
1903 * mac80211 decides to do both changes at once because
1904 * it will invoke post_associate.
1905 */
1906 if (priv->iw_mode == NL80211_IFTYPE_ADHOC &&
1907 changes & BSS_CHANGED_BEACON) {
1908 struct sk_buff *beacon = ieee80211_beacon_get(hw, vif);
1909
1910 if (beacon)
1911 iwl_mac_beacon_update(hw, beacon);
1912 }
1913
1914 if (changes & BSS_CHANGED_ERP_PREAMBLE) {
1915 IWL_DEBUG_MAC80211(priv, "ERP_PREAMBLE %d\n",
1916 bss_conf->use_short_preamble);
1917 if (bss_conf->use_short_preamble)
1918 priv->staging_rxon.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
1919 else
1920 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
1921 }
1922
1923 if (changes & BSS_CHANGED_ERP_CTS_PROT) {
1924 IWL_DEBUG_MAC80211(priv, "ERP_CTS %d\n", bss_conf->use_cts_prot);
1925 if (bss_conf->use_cts_prot && (priv->band != IEEE80211_BAND_5GHZ))
1926 priv->staging_rxon.flags |= RXON_FLG_TGG_PROTECT_MSK;
1927 else
1928 priv->staging_rxon.flags &= ~RXON_FLG_TGG_PROTECT_MSK;
1929 }
1930
1931 if (changes & BSS_CHANGED_BASIC_RATES) {
1932 /* XXX use this information
1933 *
1934 * To do that, remove code from iwl_set_rate() and put something
1935 * like this here:
1936 *
1937 if (A-band)
1938 priv->staging_rxon.ofdm_basic_rates =
1939 bss_conf->basic_rates;
1940 else
1941 priv->staging_rxon.ofdm_basic_rates =
1942 bss_conf->basic_rates >> 4;
1943 priv->staging_rxon.cck_basic_rates =
1944 bss_conf->basic_rates & 0xF;
1945 */
1946 }
1947
1948 if (changes & BSS_CHANGED_HT) {
1949 iwl_ht_conf(priv, bss_conf);
1950
1951 if (priv->cfg->ops->hcmd->set_rxon_chain)
1952 priv->cfg->ops->hcmd->set_rxon_chain(priv);
1953 }
1954
1955 if (changes & BSS_CHANGED_ASSOC) {
1956 IWL_DEBUG_MAC80211(priv, "ASSOC %d\n", bss_conf->assoc);
1957 if (bss_conf->assoc) {
1958 priv->assoc_id = bss_conf->aid;
1959 priv->beacon_int = bss_conf->beacon_int;
1960 priv->timestamp = bss_conf->timestamp;
1961 priv->assoc_capability = bss_conf->assoc_capability;
1962
1963 iwl_led_associate(priv);
1964
1965 if (!iwl_is_rfkill(priv))
1966 priv->cfg->ops->lib->post_associate(priv);
1967 } else
1968 iwl_set_no_assoc(priv);
1969 }
1970
1971 if (changes && iwl_is_associated(priv) && priv->assoc_id) {
1972 IWL_DEBUG_MAC80211(priv, "Changes (%#x) while associated\n",
1973 changes);
1974 ret = iwl_send_rxon_assoc(priv);
1975 if (!ret) {
1976 /* Sync active_rxon with latest change. */
1977 memcpy((void *)&priv->active_rxon,
1978 &priv->staging_rxon,
1979 sizeof(struct iwl_rxon_cmd));
1980 }
1981 }
1982
1983 if (changes & BSS_CHANGED_BEACON_ENABLED) {
1984 if (vif->bss_conf.enable_beacon) {
1985 memcpy(priv->staging_rxon.bssid_addr,
1986 bss_conf->bssid, ETH_ALEN);
1987 memcpy(priv->bssid, bss_conf->bssid, ETH_ALEN);
1988 iwlcore_config_ap(priv);
1989 } else
1990 iwl_set_no_assoc(priv);
1991 }
1992
1993 mutex_unlock(&priv->mutex);
1994
1995 IWL_DEBUG_MAC80211(priv, "leave\n");
1996 }
1997 EXPORT_SYMBOL(iwl_bss_info_changed);
1998
1999 int iwl_mac_beacon_update(struct ieee80211_hw *hw, struct sk_buff *skb)
2000 {
2001 struct iwl_priv *priv = hw->priv;
2002 unsigned long flags;
2003 __le64 timestamp;
2004
2005 IWL_DEBUG_MAC80211(priv, "enter\n");
2006
2007 if (!iwl_is_ready_rf(priv)) {
2008 IWL_DEBUG_MAC80211(priv, "leave - RF not ready\n");
2009 return -EIO;
2010 }
2011
2012 spin_lock_irqsave(&priv->lock, flags);
2013
2014 if (priv->ibss_beacon)
2015 dev_kfree_skb(priv->ibss_beacon);
2016
2017 priv->ibss_beacon = skb;
2018
2019 priv->assoc_id = 0;
2020 timestamp = ((struct ieee80211_mgmt *)skb->data)->u.beacon.timestamp;
2021 priv->timestamp = le64_to_cpu(timestamp);
2022
2023 IWL_DEBUG_MAC80211(priv, "leave\n");
2024 spin_unlock_irqrestore(&priv->lock, flags);
2025
2026 priv->cfg->ops->lib->post_associate(priv);
2027
2028 return 0;
2029 }
2030 EXPORT_SYMBOL(iwl_mac_beacon_update);
2031
2032 static int iwl_set_mode(struct iwl_priv *priv, struct ieee80211_vif *vif)
2033 {
2034 iwl_connection_init_rx_config(priv, vif->type);
2035
2036 if (priv->cfg->ops->hcmd->set_rxon_chain)
2037 priv->cfg->ops->hcmd->set_rxon_chain(priv);
2038
2039 memcpy(priv->staging_rxon.node_addr, priv->mac_addr, ETH_ALEN);
2040
2041 return iwlcore_commit_rxon(priv);
2042 }
2043
2044 int iwl_mac_add_interface(struct ieee80211_hw *hw, struct ieee80211_vif *vif)
2045 {
2046 struct iwl_priv *priv = hw->priv;
2047 int err = 0;
2048
2049 IWL_DEBUG_MAC80211(priv, "enter: type %d\n", vif->type);
2050
2051 mutex_lock(&priv->mutex);
2052
2053 if (WARN_ON(!iwl_is_ready_rf(priv))) {
2054 err = -EINVAL;
2055 goto out;
2056 }
2057
2058 if (priv->vif) {
2059 IWL_DEBUG_MAC80211(priv, "leave - vif != NULL\n");
2060 err = -EOPNOTSUPP;
2061 goto out;
2062 }
2063
2064 priv->vif = vif;
2065 priv->iw_mode = vif->type;
2066
2067 IWL_DEBUG_MAC80211(priv, "Set %pM\n", vif->addr);
2068 memcpy(priv->mac_addr, vif->addr, ETH_ALEN);
2069
2070 err = iwl_set_mode(priv, vif);
2071 if (err)
2072 goto out_err;
2073
2074 /* Add the broadcast address so we can send broadcast frames */
2075 priv->cfg->ops->lib->add_bcast_station(priv);
2076
2077 goto out;
2078
2079 out_err:
2080 priv->vif = NULL;
2081 priv->iw_mode = NL80211_IFTYPE_STATION;
2082 out:
2083 mutex_unlock(&priv->mutex);
2084
2085 IWL_DEBUG_MAC80211(priv, "leave\n");
2086 return err;
2087 }
2088 EXPORT_SYMBOL(iwl_mac_add_interface);
2089
2090 void iwl_mac_remove_interface(struct ieee80211_hw *hw,
2091 struct ieee80211_vif *vif)
2092 {
2093 struct iwl_priv *priv = hw->priv;
2094
2095 IWL_DEBUG_MAC80211(priv, "enter\n");
2096
2097 mutex_lock(&priv->mutex);
2098
2099 iwl_clear_ucode_stations(priv, true);
2100
2101 if (iwl_is_ready_rf(priv)) {
2102 iwl_scan_cancel_timeout(priv, 100);
2103 priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
2104 iwlcore_commit_rxon(priv);
2105 }
2106 if (priv->vif == vif) {
2107 priv->vif = NULL;
2108 memset(priv->bssid, 0, ETH_ALEN);
2109 }
2110 mutex_unlock(&priv->mutex);
2111
2112 IWL_DEBUG_MAC80211(priv, "leave\n");
2113
2114 }
2115 EXPORT_SYMBOL(iwl_mac_remove_interface);
2116
2117 /**
2118 * iwl_mac_config - mac80211 config callback
2119 */
2120 int iwl_mac_config(struct ieee80211_hw *hw, u32 changed)
2121 {
2122 struct iwl_priv *priv = hw->priv;
2123 const struct iwl_channel_info *ch_info;
2124 struct ieee80211_conf *conf = &hw->conf;
2125 struct iwl_ht_config *ht_conf = &priv->current_ht_config;
2126 unsigned long flags = 0;
2127 int ret = 0;
2128 u16 ch;
2129 int scan_active = 0;
2130
2131 mutex_lock(&priv->mutex);
2132
2133 IWL_DEBUG_MAC80211(priv, "enter to channel %d changed 0x%X\n",
2134 conf->channel->hw_value, changed);
2135
2136 if (unlikely(!priv->cfg->mod_params->disable_hw_scan &&
2137 test_bit(STATUS_SCANNING, &priv->status))) {
2138 scan_active = 1;
2139 IWL_DEBUG_MAC80211(priv, "leave - scanning\n");
2140 }
2141
2142 if (changed & (IEEE80211_CONF_CHANGE_SMPS |
2143 IEEE80211_CONF_CHANGE_CHANNEL)) {
2144 /* mac80211 uses static for non-HT which is what we want */
2145 priv->current_ht_config.smps = conf->smps_mode;
2146
2147 /*
2148 * Recalculate chain counts.
2149 *
2150 * If monitor mode is enabled then mac80211 will
2151 * set up the SM PS mode to OFF if an HT channel is
2152 * configured.
2153 */
2154 if (priv->cfg->ops->hcmd->set_rxon_chain)
2155 priv->cfg->ops->hcmd->set_rxon_chain(priv);
2156 }
2157
2158 /* during scanning mac80211 will delay channel setting until
2159 * scan finish with changed = 0
2160 */
2161 if (!changed || (changed & IEEE80211_CONF_CHANGE_CHANNEL)) {
2162 if (scan_active)
2163 goto set_ch_out;
2164
2165 ch = ieee80211_frequency_to_channel(conf->channel->center_freq);
2166 ch_info = iwl_get_channel_info(priv, conf->channel->band, ch);
2167 if (!is_channel_valid(ch_info)) {
2168 IWL_DEBUG_MAC80211(priv, "leave - invalid channel\n");
2169 ret = -EINVAL;
2170 goto set_ch_out;
2171 }
2172
2173 spin_lock_irqsave(&priv->lock, flags);
2174
2175 /* Configure HT40 channels */
2176 ht_conf->is_ht = conf_is_ht(conf);
2177 if (ht_conf->is_ht) {
2178 if (conf_is_ht40_minus(conf)) {
2179 ht_conf->extension_chan_offset =
2180 IEEE80211_HT_PARAM_CHA_SEC_BELOW;
2181 ht_conf->is_40mhz = true;
2182 } else if (conf_is_ht40_plus(conf)) {
2183 ht_conf->extension_chan_offset =
2184 IEEE80211_HT_PARAM_CHA_SEC_ABOVE;
2185 ht_conf->is_40mhz = true;
2186 } else {
2187 ht_conf->extension_chan_offset =
2188 IEEE80211_HT_PARAM_CHA_SEC_NONE;
2189 ht_conf->is_40mhz = false;
2190 }
2191 } else
2192 ht_conf->is_40mhz = false;
2193 /* Default to no protection. Protection mode will later be set
2194 * from BSS config in iwl_ht_conf */
2195 ht_conf->ht_protection = IEEE80211_HT_OP_MODE_PROTECTION_NONE;
2196
2197 /* if we are switching from ht to 2.4 clear flags
2198 * from any ht related info since 2.4 does not
2199 * support ht */
2200 if ((le16_to_cpu(priv->staging_rxon.channel) != ch))
2201 priv->staging_rxon.flags = 0;
2202
2203 iwl_set_rxon_channel(priv, conf->channel);
2204 iwl_set_rxon_ht(priv, ht_conf);
2205
2206 iwl_set_flags_for_band(priv, conf->channel->band);
2207 spin_unlock_irqrestore(&priv->lock, flags);
2208 if (iwl_is_associated(priv) &&
2209 (le16_to_cpu(priv->active_rxon.channel) != ch) &&
2210 priv->cfg->ops->lib->set_channel_switch) {
2211 iwl_set_rate(priv);
2212 /*
2213 * at this point, staging_rxon has the
2214 * configuration for channel switch
2215 */
2216 ret = priv->cfg->ops->lib->set_channel_switch(priv,
2217 ch);
2218 if (!ret) {
2219 iwl_print_rx_config_cmd(priv);
2220 goto out;
2221 }
2222 priv->switch_rxon.switch_in_progress = false;
2223 }
2224 set_ch_out:
2225 /* The list of supported rates and rate mask can be different
2226 * for each band; since the band may have changed, reset
2227 * the rate mask to what mac80211 lists */
2228 iwl_set_rate(priv);
2229 }
2230
2231 if (changed & (IEEE80211_CONF_CHANGE_PS |
2232 IEEE80211_CONF_CHANGE_IDLE)) {
2233 ret = iwl_power_update_mode(priv, false);
2234 if (ret)
2235 IWL_DEBUG_MAC80211(priv, "Error setting sleep level\n");
2236 }
2237
2238 if (changed & IEEE80211_CONF_CHANGE_POWER) {
2239 IWL_DEBUG_MAC80211(priv, "TX Power old=%d new=%d\n",
2240 priv->tx_power_user_lmt, conf->power_level);
2241
2242 iwl_set_tx_power(priv, conf->power_level, false);
2243 }
2244
2245 if (changed & IEEE80211_CONF_CHANGE_QOS) {
2246 bool qos_active = !!(conf->flags & IEEE80211_CONF_QOS);
2247
2248 spin_lock_irqsave(&priv->lock, flags);
2249 priv->qos_data.qos_active = qos_active;
2250 iwl_update_qos(priv);
2251 spin_unlock_irqrestore(&priv->lock, flags);
2252 }
2253
2254 if (!iwl_is_ready(priv)) {
2255 IWL_DEBUG_MAC80211(priv, "leave - not ready\n");
2256 goto out;
2257 }
2258
2259 if (scan_active)
2260 goto out;
2261
2262 if (memcmp(&priv->active_rxon,
2263 &priv->staging_rxon, sizeof(priv->staging_rxon)))
2264 iwlcore_commit_rxon(priv);
2265 else
2266 IWL_DEBUG_INFO(priv, "Not re-sending same RXON configuration.\n");
2267
2268
2269 out:
2270 IWL_DEBUG_MAC80211(priv, "leave\n");
2271 mutex_unlock(&priv->mutex);
2272 return ret;
2273 }
2274 EXPORT_SYMBOL(iwl_mac_config);
2275
2276 void iwl_mac_reset_tsf(struct ieee80211_hw *hw)
2277 {
2278 struct iwl_priv *priv = hw->priv;
2279 unsigned long flags;
2280
2281 mutex_lock(&priv->mutex);
2282 IWL_DEBUG_MAC80211(priv, "enter\n");
2283
2284 spin_lock_irqsave(&priv->lock, flags);
2285 memset(&priv->current_ht_config, 0, sizeof(struct iwl_ht_config));
2286 spin_unlock_irqrestore(&priv->lock, flags);
2287
2288 spin_lock_irqsave(&priv->lock, flags);
2289 priv->assoc_id = 0;
2290 priv->assoc_capability = 0;
2291
2292 /* new association get rid of ibss beacon skb */
2293 if (priv->ibss_beacon)
2294 dev_kfree_skb(priv->ibss_beacon);
2295
2296 priv->ibss_beacon = NULL;
2297
2298 priv->beacon_int = priv->vif->bss_conf.beacon_int;
2299 priv->timestamp = 0;
2300
2301 spin_unlock_irqrestore(&priv->lock, flags);
2302
2303 if (!iwl_is_ready_rf(priv)) {
2304 IWL_DEBUG_MAC80211(priv, "leave - not ready\n");
2305 mutex_unlock(&priv->mutex);
2306 return;
2307 }
2308
2309 /* we are restarting association process
2310 * clear RXON_FILTER_ASSOC_MSK bit
2311 */
2312 iwl_scan_cancel_timeout(priv, 100);
2313 priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
2314 iwlcore_commit_rxon(priv);
2315
2316 iwl_set_rate(priv);
2317
2318 mutex_unlock(&priv->mutex);
2319
2320 IWL_DEBUG_MAC80211(priv, "leave\n");
2321 }
2322 EXPORT_SYMBOL(iwl_mac_reset_tsf);
2323
2324 int iwl_alloc_txq_mem(struct iwl_priv *priv)
2325 {
2326 if (!priv->txq)
2327 priv->txq = kzalloc(
2328 sizeof(struct iwl_tx_queue) * priv->cfg->num_of_queues,
2329 GFP_KERNEL);
2330 if (!priv->txq) {
2331 IWL_ERR(priv, "Not enough memory for txq\n");
2332 return -ENOMEM;
2333 }
2334 return 0;
2335 }
2336 EXPORT_SYMBOL(iwl_alloc_txq_mem);
2337
2338 void iwl_free_txq_mem(struct iwl_priv *priv)
2339 {
2340 kfree(priv->txq);
2341 priv->txq = NULL;
2342 }
2343 EXPORT_SYMBOL(iwl_free_txq_mem);
2344
2345 int iwl_send_wimax_coex(struct iwl_priv *priv)
2346 {
2347 struct iwl_wimax_coex_cmd coex_cmd;
2348
2349 if (priv->cfg->support_wimax_coexist) {
2350 /* UnMask wake up src at associated sleep */
2351 coex_cmd.flags = COEX_FLAGS_ASSOC_WA_UNMASK_MSK;
2352
2353 /* UnMask wake up src at unassociated sleep */
2354 coex_cmd.flags |= COEX_FLAGS_UNASSOC_WA_UNMASK_MSK;
2355 memcpy(coex_cmd.sta_prio, cu_priorities,
2356 sizeof(struct iwl_wimax_coex_event_entry) *
2357 COEX_NUM_OF_EVENTS);
2358
2359 /* enabling the coexistence feature */
2360 coex_cmd.flags |= COEX_FLAGS_COEX_ENABLE_MSK;
2361
2362 /* enabling the priorities tables */
2363 coex_cmd.flags |= COEX_FLAGS_STA_TABLE_VALID_MSK;
2364 } else {
2365 /* coexistence is disabled */
2366 memset(&coex_cmd, 0, sizeof(coex_cmd));
2367 }
2368 return iwl_send_cmd_pdu(priv, COEX_PRIORITY_TABLE_CMD,
2369 sizeof(coex_cmd), &coex_cmd);
2370 }
2371 EXPORT_SYMBOL(iwl_send_wimax_coex);
2372
2373 #ifdef CONFIG_IWLWIFI_DEBUGFS
2374
2375 #define IWL_TRAFFIC_DUMP_SIZE (IWL_TRAFFIC_ENTRY_SIZE * IWL_TRAFFIC_ENTRIES)
2376
2377 void iwl_reset_traffic_log(struct iwl_priv *priv)
2378 {
2379 priv->tx_traffic_idx = 0;
2380 priv->rx_traffic_idx = 0;
2381 if (priv->tx_traffic)
2382 memset(priv->tx_traffic, 0, IWL_TRAFFIC_DUMP_SIZE);
2383 if (priv->rx_traffic)
2384 memset(priv->rx_traffic, 0, IWL_TRAFFIC_DUMP_SIZE);
2385 }
2386
2387 int iwl_alloc_traffic_mem(struct iwl_priv *priv)
2388 {
2389 u32 traffic_size = IWL_TRAFFIC_DUMP_SIZE;
2390
2391 if (iwl_debug_level & IWL_DL_TX) {
2392 if (!priv->tx_traffic) {
2393 priv->tx_traffic =
2394 kzalloc(traffic_size, GFP_KERNEL);
2395 if (!priv->tx_traffic)
2396 return -ENOMEM;
2397 }
2398 }
2399 if (iwl_debug_level & IWL_DL_RX) {
2400 if (!priv->rx_traffic) {
2401 priv->rx_traffic =
2402 kzalloc(traffic_size, GFP_KERNEL);
2403 if (!priv->rx_traffic)
2404 return -ENOMEM;
2405 }
2406 }
2407 iwl_reset_traffic_log(priv);
2408 return 0;
2409 }
2410 EXPORT_SYMBOL(iwl_alloc_traffic_mem);
2411
2412 void iwl_free_traffic_mem(struct iwl_priv *priv)
2413 {
2414 kfree(priv->tx_traffic);
2415 priv->tx_traffic = NULL;
2416
2417 kfree(priv->rx_traffic);
2418 priv->rx_traffic = NULL;
2419 }
2420 EXPORT_SYMBOL(iwl_free_traffic_mem);
2421
2422 void iwl_dbg_log_tx_data_frame(struct iwl_priv *priv,
2423 u16 length, struct ieee80211_hdr *header)
2424 {
2425 __le16 fc;
2426 u16 len;
2427
2428 if (likely(!(iwl_debug_level & IWL_DL_TX)))
2429 return;
2430
2431 if (!priv->tx_traffic)
2432 return;
2433
2434 fc = header->frame_control;
2435 if (ieee80211_is_data(fc)) {
2436 len = (length > IWL_TRAFFIC_ENTRY_SIZE)
2437 ? IWL_TRAFFIC_ENTRY_SIZE : length;
2438 memcpy((priv->tx_traffic +
2439 (priv->tx_traffic_idx * IWL_TRAFFIC_ENTRY_SIZE)),
2440 header, len);
2441 priv->tx_traffic_idx =
2442 (priv->tx_traffic_idx + 1) % IWL_TRAFFIC_ENTRIES;
2443 }
2444 }
2445 EXPORT_SYMBOL(iwl_dbg_log_tx_data_frame);
2446
2447 void iwl_dbg_log_rx_data_frame(struct iwl_priv *priv,
2448 u16 length, struct ieee80211_hdr *header)
2449 {
2450 __le16 fc;
2451 u16 len;
2452
2453 if (likely(!(iwl_debug_level & IWL_DL_RX)))
2454 return;
2455
2456 if (!priv->rx_traffic)
2457 return;
2458
2459 fc = header->frame_control;
2460 if (ieee80211_is_data(fc)) {
2461 len = (length > IWL_TRAFFIC_ENTRY_SIZE)
2462 ? IWL_TRAFFIC_ENTRY_SIZE : length;
2463 memcpy((priv->rx_traffic +
2464 (priv->rx_traffic_idx * IWL_TRAFFIC_ENTRY_SIZE)),
2465 header, len);
2466 priv->rx_traffic_idx =
2467 (priv->rx_traffic_idx + 1) % IWL_TRAFFIC_ENTRIES;
2468 }
2469 }
2470 EXPORT_SYMBOL(iwl_dbg_log_rx_data_frame);
2471
2472 const char *get_mgmt_string(int cmd)
2473 {
2474 switch (cmd) {
2475 IWL_CMD(MANAGEMENT_ASSOC_REQ);
2476 IWL_CMD(MANAGEMENT_ASSOC_RESP);
2477 IWL_CMD(MANAGEMENT_REASSOC_REQ);
2478 IWL_CMD(MANAGEMENT_REASSOC_RESP);
2479 IWL_CMD(MANAGEMENT_PROBE_REQ);
2480 IWL_CMD(MANAGEMENT_PROBE_RESP);
2481 IWL_CMD(MANAGEMENT_BEACON);
2482 IWL_CMD(MANAGEMENT_ATIM);
2483 IWL_CMD(MANAGEMENT_DISASSOC);
2484 IWL_CMD(MANAGEMENT_AUTH);
2485 IWL_CMD(MANAGEMENT_DEAUTH);
2486 IWL_CMD(MANAGEMENT_ACTION);
2487 default:
2488 return "UNKNOWN";
2489
2490 }
2491 }
2492
2493 const char *get_ctrl_string(int cmd)
2494 {
2495 switch (cmd) {
2496 IWL_CMD(CONTROL_BACK_REQ);
2497 IWL_CMD(CONTROL_BACK);
2498 IWL_CMD(CONTROL_PSPOLL);
2499 IWL_CMD(CONTROL_RTS);
2500 IWL_CMD(CONTROL_CTS);
2501 IWL_CMD(CONTROL_ACK);
2502 IWL_CMD(CONTROL_CFEND);
2503 IWL_CMD(CONTROL_CFENDACK);
2504 default:
2505 return "UNKNOWN";
2506
2507 }
2508 }
2509
2510 void iwl_clear_traffic_stats(struct iwl_priv *priv)
2511 {
2512 memset(&priv->tx_stats, 0, sizeof(struct traffic_stats));
2513 memset(&priv->rx_stats, 0, sizeof(struct traffic_stats));
2514 priv->led_tpt = 0;
2515 }
2516
2517 /*
2518 * if CONFIG_IWLWIFI_DEBUGFS defined, iwl_update_stats function will
2519 * record all the MGMT, CTRL and DATA pkt for both TX and Rx pass.
2520 * Use debugFs to display the rx/rx_statistics
2521 * if CONFIG_IWLWIFI_DEBUGFS not being defined, then no MGMT and CTRL
2522 * information will be recorded, but DATA pkt still will be recorded
2523 * for the reason of iwl_led.c need to control the led blinking based on
2524 * number of tx and rx data.
2525 *
2526 */
2527 void iwl_update_stats(struct iwl_priv *priv, bool is_tx, __le16 fc, u16 len)
2528 {
2529 struct traffic_stats *stats;
2530
2531 if (is_tx)
2532 stats = &priv->tx_stats;
2533 else
2534 stats = &priv->rx_stats;
2535
2536 if (ieee80211_is_mgmt(fc)) {
2537 switch (fc & cpu_to_le16(IEEE80211_FCTL_STYPE)) {
2538 case cpu_to_le16(IEEE80211_STYPE_ASSOC_REQ):
2539 stats->mgmt[MANAGEMENT_ASSOC_REQ]++;
2540 break;
2541 case cpu_to_le16(IEEE80211_STYPE_ASSOC_RESP):
2542 stats->mgmt[MANAGEMENT_ASSOC_RESP]++;
2543 break;
2544 case cpu_to_le16(IEEE80211_STYPE_REASSOC_REQ):
2545 stats->mgmt[MANAGEMENT_REASSOC_REQ]++;
2546 break;
2547 case cpu_to_le16(IEEE80211_STYPE_REASSOC_RESP):
2548 stats->mgmt[MANAGEMENT_REASSOC_RESP]++;
2549 break;
2550 case cpu_to_le16(IEEE80211_STYPE_PROBE_REQ):
2551 stats->mgmt[MANAGEMENT_PROBE_REQ]++;
2552 break;
2553 case cpu_to_le16(IEEE80211_STYPE_PROBE_RESP):
2554 stats->mgmt[MANAGEMENT_PROBE_RESP]++;
2555 break;
2556 case cpu_to_le16(IEEE80211_STYPE_BEACON):
2557 stats->mgmt[MANAGEMENT_BEACON]++;
2558 break;
2559 case cpu_to_le16(IEEE80211_STYPE_ATIM):
2560 stats->mgmt[MANAGEMENT_ATIM]++;
2561 break;
2562 case cpu_to_le16(IEEE80211_STYPE_DISASSOC):
2563 stats->mgmt[MANAGEMENT_DISASSOC]++;
2564 break;
2565 case cpu_to_le16(IEEE80211_STYPE_AUTH):
2566 stats->mgmt[MANAGEMENT_AUTH]++;
2567 break;
2568 case cpu_to_le16(IEEE80211_STYPE_DEAUTH):
2569 stats->mgmt[MANAGEMENT_DEAUTH]++;
2570 break;
2571 case cpu_to_le16(IEEE80211_STYPE_ACTION):
2572 stats->mgmt[MANAGEMENT_ACTION]++;
2573 break;
2574 }
2575 } else if (ieee80211_is_ctl(fc)) {
2576 switch (fc & cpu_to_le16(IEEE80211_FCTL_STYPE)) {
2577 case cpu_to_le16(IEEE80211_STYPE_BACK_REQ):
2578 stats->ctrl[CONTROL_BACK_REQ]++;
2579 break;
2580 case cpu_to_le16(IEEE80211_STYPE_BACK):
2581 stats->ctrl[CONTROL_BACK]++;
2582 break;
2583 case cpu_to_le16(IEEE80211_STYPE_PSPOLL):
2584 stats->ctrl[CONTROL_PSPOLL]++;
2585 break;
2586 case cpu_to_le16(IEEE80211_STYPE_RTS):
2587 stats->ctrl[CONTROL_RTS]++;
2588 break;
2589 case cpu_to_le16(IEEE80211_STYPE_CTS):
2590 stats->ctrl[CONTROL_CTS]++;
2591 break;
2592 case cpu_to_le16(IEEE80211_STYPE_ACK):
2593 stats->ctrl[CONTROL_ACK]++;
2594 break;
2595 case cpu_to_le16(IEEE80211_STYPE_CFEND):
2596 stats->ctrl[CONTROL_CFEND]++;
2597 break;
2598 case cpu_to_le16(IEEE80211_STYPE_CFENDACK):
2599 stats->ctrl[CONTROL_CFENDACK]++;
2600 break;
2601 }
2602 } else {
2603 /* data */
2604 stats->data_cnt++;
2605 stats->data_bytes += len;
2606 }
2607 iwl_leds_background(priv);
2608 }
2609 EXPORT_SYMBOL(iwl_update_stats);
2610 #endif
2611
2612 const static char *get_csr_string(int cmd)
2613 {
2614 switch (cmd) {
2615 IWL_CMD(CSR_HW_IF_CONFIG_REG);
2616 IWL_CMD(CSR_INT_COALESCING);
2617 IWL_CMD(CSR_INT);
2618 IWL_CMD(CSR_INT_MASK);
2619 IWL_CMD(CSR_FH_INT_STATUS);
2620 IWL_CMD(CSR_GPIO_IN);
2621 IWL_CMD(CSR_RESET);
2622 IWL_CMD(CSR_GP_CNTRL);
2623 IWL_CMD(CSR_HW_REV);
2624 IWL_CMD(CSR_EEPROM_REG);
2625 IWL_CMD(CSR_EEPROM_GP);
2626 IWL_CMD(CSR_OTP_GP_REG);
2627 IWL_CMD(CSR_GIO_REG);
2628 IWL_CMD(CSR_GP_UCODE_REG);
2629 IWL_CMD(CSR_GP_DRIVER_REG);
2630 IWL_CMD(CSR_UCODE_DRV_GP1);
2631 IWL_CMD(CSR_UCODE_DRV_GP2);
2632 IWL_CMD(CSR_LED_REG);
2633 IWL_CMD(CSR_DRAM_INT_TBL_REG);
2634 IWL_CMD(CSR_GIO_CHICKEN_BITS);
2635 IWL_CMD(CSR_ANA_PLL_CFG);
2636 IWL_CMD(CSR_HW_REV_WA_REG);
2637 IWL_CMD(CSR_DBG_HPET_MEM_REG);
2638 default:
2639 return "UNKNOWN";
2640
2641 }
2642 }
2643
2644 void iwl_dump_csr(struct iwl_priv *priv)
2645 {
2646 int i;
2647 u32 csr_tbl[] = {
2648 CSR_HW_IF_CONFIG_REG,
2649 CSR_INT_COALESCING,
2650 CSR_INT,
2651 CSR_INT_MASK,
2652 CSR_FH_INT_STATUS,
2653 CSR_GPIO_IN,
2654 CSR_RESET,
2655 CSR_GP_CNTRL,
2656 CSR_HW_REV,
2657 CSR_EEPROM_REG,
2658 CSR_EEPROM_GP,
2659 CSR_OTP_GP_REG,
2660 CSR_GIO_REG,
2661 CSR_GP_UCODE_REG,
2662 CSR_GP_DRIVER_REG,
2663 CSR_UCODE_DRV_GP1,
2664 CSR_UCODE_DRV_GP2,
2665 CSR_LED_REG,
2666 CSR_DRAM_INT_TBL_REG,
2667 CSR_GIO_CHICKEN_BITS,
2668 CSR_ANA_PLL_CFG,
2669 CSR_HW_REV_WA_REG,
2670 CSR_DBG_HPET_MEM_REG
2671 };
2672 IWL_ERR(priv, "CSR values:\n");
2673 IWL_ERR(priv, "(2nd byte of CSR_INT_COALESCING is "
2674 "CSR_INT_PERIODIC_REG)\n");
2675 for (i = 0; i < ARRAY_SIZE(csr_tbl); i++) {
2676 IWL_ERR(priv, " %25s: 0X%08x\n",
2677 get_csr_string(csr_tbl[i]),
2678 iwl_read32(priv, csr_tbl[i]));
2679 }
2680 }
2681 EXPORT_SYMBOL(iwl_dump_csr);
2682
2683 const static char *get_fh_string(int cmd)
2684 {
2685 switch (cmd) {
2686 IWL_CMD(FH_RSCSR_CHNL0_STTS_WPTR_REG);
2687 IWL_CMD(FH_RSCSR_CHNL0_RBDCB_BASE_REG);
2688 IWL_CMD(FH_RSCSR_CHNL0_WPTR);
2689 IWL_CMD(FH_MEM_RCSR_CHNL0_CONFIG_REG);
2690 IWL_CMD(FH_MEM_RSSR_SHARED_CTRL_REG);
2691 IWL_CMD(FH_MEM_RSSR_RX_STATUS_REG);
2692 IWL_CMD(FH_MEM_RSSR_RX_ENABLE_ERR_IRQ2DRV);
2693 IWL_CMD(FH_TSSR_TX_STATUS_REG);
2694 IWL_CMD(FH_TSSR_TX_ERROR_REG);
2695 default:
2696 return "UNKNOWN";
2697
2698 }
2699 }
2700
2701 int iwl_dump_fh(struct iwl_priv *priv, char **buf, bool display)
2702 {
2703 int i;
2704 #ifdef CONFIG_IWLWIFI_DEBUG
2705 int pos = 0;
2706 size_t bufsz = 0;
2707 #endif
2708 u32 fh_tbl[] = {
2709 FH_RSCSR_CHNL0_STTS_WPTR_REG,
2710 FH_RSCSR_CHNL0_RBDCB_BASE_REG,
2711 FH_RSCSR_CHNL0_WPTR,
2712 FH_MEM_RCSR_CHNL0_CONFIG_REG,
2713 FH_MEM_RSSR_SHARED_CTRL_REG,
2714 FH_MEM_RSSR_RX_STATUS_REG,
2715 FH_MEM_RSSR_RX_ENABLE_ERR_IRQ2DRV,
2716 FH_TSSR_TX_STATUS_REG,
2717 FH_TSSR_TX_ERROR_REG
2718 };
2719 #ifdef CONFIG_IWLWIFI_DEBUG
2720 if (display) {
2721 bufsz = ARRAY_SIZE(fh_tbl) * 48 + 40;
2722 *buf = kmalloc(bufsz, GFP_KERNEL);
2723 if (!*buf)
2724 return -ENOMEM;
2725 pos += scnprintf(*buf + pos, bufsz - pos,
2726 "FH register values:\n");
2727 for (i = 0; i < ARRAY_SIZE(fh_tbl); i++) {
2728 pos += scnprintf(*buf + pos, bufsz - pos,
2729 " %34s: 0X%08x\n",
2730 get_fh_string(fh_tbl[i]),
2731 iwl_read_direct32(priv, fh_tbl[i]));
2732 }
2733 return pos;
2734 }
2735 #endif
2736 IWL_ERR(priv, "FH register values:\n");
2737 for (i = 0; i < ARRAY_SIZE(fh_tbl); i++) {
2738 IWL_ERR(priv, " %34s: 0X%08x\n",
2739 get_fh_string(fh_tbl[i]),
2740 iwl_read_direct32(priv, fh_tbl[i]));
2741 }
2742 return 0;
2743 }
2744 EXPORT_SYMBOL(iwl_dump_fh);
2745
2746 static void iwl_force_rf_reset(struct iwl_priv *priv)
2747 {
2748 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2749 return;
2750
2751 if (!iwl_is_associated(priv)) {
2752 IWL_DEBUG_SCAN(priv, "force reset rejected: not associated\n");
2753 return;
2754 }
2755 /*
2756 * There is no easy and better way to force reset the radio,
2757 * the only known method is switching channel which will force to
2758 * reset and tune the radio.
2759 * Use internal short scan (single channel) operation to should
2760 * achieve this objective.
2761 * Driver should reset the radio when number of consecutive missed
2762 * beacon, or any other uCode error condition detected.
2763 */
2764 IWL_DEBUG_INFO(priv, "perform radio reset.\n");
2765 iwl_internal_short_hw_scan(priv);
2766 }
2767
2768
2769 int iwl_force_reset(struct iwl_priv *priv, int mode)
2770 {
2771 struct iwl_force_reset *force_reset;
2772
2773 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2774 return -EINVAL;
2775
2776 if (mode >= IWL_MAX_FORCE_RESET) {
2777 IWL_DEBUG_INFO(priv, "invalid reset request.\n");
2778 return -EINVAL;
2779 }
2780 force_reset = &priv->force_reset[mode];
2781 force_reset->reset_request_count++;
2782 if (force_reset->last_force_reset_jiffies &&
2783 time_after(force_reset->last_force_reset_jiffies +
2784 force_reset->reset_duration, jiffies)) {
2785 IWL_DEBUG_INFO(priv, "force reset rejected\n");
2786 force_reset->reset_reject_count++;
2787 return -EAGAIN;
2788 }
2789 force_reset->reset_success_count++;
2790 force_reset->last_force_reset_jiffies = jiffies;
2791 IWL_DEBUG_INFO(priv, "perform force reset (%d)\n", mode);
2792 switch (mode) {
2793 case IWL_RF_RESET:
2794 iwl_force_rf_reset(priv);
2795 break;
2796 case IWL_FW_RESET:
2797 IWL_ERR(priv, "On demand firmware reload\n");
2798 /* Set the FW error flag -- cleared on iwl_down */
2799 set_bit(STATUS_FW_ERROR, &priv->status);
2800 wake_up_interruptible(&priv->wait_command_queue);
2801 /*
2802 * Keep the restart process from trying to send host
2803 * commands by clearing the INIT status bit
2804 */
2805 clear_bit(STATUS_READY, &priv->status);
2806 queue_work(priv->workqueue, &priv->restart);
2807 break;
2808 }
2809 return 0;
2810 }
2811 EXPORT_SYMBOL(iwl_force_reset);
2812
2813 /**
2814 * iwl_bg_monitor_recover - Timer callback to check for stuck queue and recover
2815 *
2816 * During normal condition (no queue is stuck), the timer is continually set to
2817 * execute every monitor_recover_period milliseconds after the last timer
2818 * expired. When the queue read_ptr is at the same place, the timer is
2819 * shorten to 100mSecs. This is
2820 * 1) to reduce the chance that the read_ptr may wrap around (not stuck)
2821 * 2) to detect the stuck queues quicker before the station and AP can
2822 * disassociate each other.
2823 *
2824 * This function monitors all the tx queues and recover from it if any
2825 * of the queues are stuck.
2826 * 1. It first check the cmd queue for stuck conditions. If it is stuck,
2827 * it will recover by resetting the firmware and return.
2828 * 2. Then, it checks for station association. If it associates it will check
2829 * other queues. If any queue is stuck, it will recover by resetting
2830 * the firmware.
2831 * Note: It the number of times the queue read_ptr to be at the same place to
2832 * be MAX_REPEAT+1 in order to consider to be stuck.
2833 */
2834 /*
2835 * The maximum number of times the read pointer of the tx queue at the
2836 * same place without considering to be stuck.
2837 */
2838 #define MAX_REPEAT (2)
2839 static int iwl_check_stuck_queue(struct iwl_priv *priv, int cnt)
2840 {
2841 struct iwl_tx_queue *txq;
2842 struct iwl_queue *q;
2843
2844 txq = &priv->txq[cnt];
2845 q = &txq->q;
2846 /* queue is empty, skip */
2847 if (q->read_ptr != q->write_ptr) {
2848 if (q->read_ptr == q->last_read_ptr) {
2849 /* a queue has not been read from last time */
2850 if (q->repeat_same_read_ptr > MAX_REPEAT) {
2851 IWL_ERR(priv,
2852 "queue %d stuck %d time. Fw reload.\n",
2853 q->id, q->repeat_same_read_ptr);
2854 q->repeat_same_read_ptr = 0;
2855 iwl_force_reset(priv, IWL_FW_RESET);
2856 } else {
2857 q->repeat_same_read_ptr++;
2858 IWL_DEBUG_RADIO(priv,
2859 "queue %d, not read %d time\n",
2860 q->id,
2861 q->repeat_same_read_ptr);
2862 mod_timer(&priv->monitor_recover, jiffies +
2863 msecs_to_jiffies(IWL_ONE_HUNDRED_MSECS));
2864 }
2865 return 1;
2866 } else {
2867 q->last_read_ptr = q->read_ptr;
2868 q->repeat_same_read_ptr = 0;
2869 }
2870 }
2871 return 0;
2872 }
2873
2874 void iwl_bg_monitor_recover(unsigned long data)
2875 {
2876 struct iwl_priv *priv = (struct iwl_priv *)data;
2877 int cnt;
2878
2879 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2880 return;
2881
2882 /* monitor and check for stuck cmd queue */
2883 if (iwl_check_stuck_queue(priv, IWL_CMD_QUEUE_NUM))
2884 return;
2885
2886 /* monitor and check for other stuck queues */
2887 if (iwl_is_associated(priv)) {
2888 for (cnt = 0; cnt < priv->hw_params.max_txq_num; cnt++) {
2889 /* skip as we already checked the command queue */
2890 if (cnt == IWL_CMD_QUEUE_NUM)
2891 continue;
2892 if (iwl_check_stuck_queue(priv, cnt))
2893 return;
2894 }
2895 }
2896 /*
2897 * Reschedule the timer to occur in
2898 * priv->cfg->monitor_recover_period
2899 */
2900 mod_timer(&priv->monitor_recover,
2901 jiffies + msecs_to_jiffies(priv->cfg->monitor_recover_period));
2902 }
2903 EXPORT_SYMBOL(iwl_bg_monitor_recover);
2904
2905 #ifdef CONFIG_PM
2906
2907 int iwl_pci_suspend(struct pci_dev *pdev, pm_message_t state)
2908 {
2909 struct iwl_priv *priv = pci_get_drvdata(pdev);
2910
2911 /*
2912 * This function is called when system goes into suspend state
2913 * mac80211 will call iwl_mac_stop() from the mac80211 suspend function
2914 * first but since iwl_mac_stop() has no knowledge of who the caller is,
2915 * it will not call apm_ops.stop() to stop the DMA operation.
2916 * Calling apm_ops.stop here to make sure we stop the DMA.
2917 */
2918 priv->cfg->ops->lib->apm_ops.stop(priv);
2919
2920 pci_save_state(pdev);
2921 pci_disable_device(pdev);
2922 pci_set_power_state(pdev, PCI_D3hot);
2923
2924 return 0;
2925 }
2926 EXPORT_SYMBOL(iwl_pci_suspend);
2927
2928 int iwl_pci_resume(struct pci_dev *pdev)
2929 {
2930 struct iwl_priv *priv = pci_get_drvdata(pdev);
2931 int ret;
2932
2933 /*
2934 * We disable the RETRY_TIMEOUT register (0x41) to keep
2935 * PCI Tx retries from interfering with C3 CPU state.
2936 */
2937 pci_write_config_byte(pdev, PCI_CFG_RETRY_TIMEOUT, 0x00);
2938
2939 pci_set_power_state(pdev, PCI_D0);
2940 ret = pci_enable_device(pdev);
2941 if (ret)
2942 return ret;
2943 pci_restore_state(pdev);
2944 iwl_enable_interrupts(priv);
2945
2946 return 0;
2947 }
2948 EXPORT_SYMBOL(iwl_pci_resume);
2949
2950 #endif /* CONFIG_PM */