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1 /******************************************************************************
2 *
3 * Copyright(c) 2003 - 2008 Intel Corporation. All rights reserved.
4 *
5 * Portions of this file are derived from the ipw3945 project, as well
6 * as portions of the ieee80211 subsystem header files.
7 *
8 * This program is free software; you can redistribute it and/or modify it
9 * under the terms of version 2 of the GNU General Public License as
10 * published by the Free Software Foundation.
11 *
12 * This program is distributed in the hope that it will be useful, but WITHOUT
13 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
14 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
15 * more details.
16 *
17 * You should have received a copy of the GNU General Public License along with
18 * this program; if not, write to the Free Software Foundation, Inc.,
19 * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
20 *
21 * The full GNU General Public License is included in this distribution in the
22 * file called LICENSE.
23 *
24 * Contact Information:
25 * Intel Linux Wireless <ilw@linux.intel.com>
26 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
27 *
28 *****************************************************************************/
29
30 #include <linux/kernel.h>
31 #include <linux/module.h>
32 #include <linux/init.h>
33 #include <linux/pci.h>
34 #include <linux/dma-mapping.h>
35 #include <linux/delay.h>
36 #include <linux/skbuff.h>
37 #include <linux/netdevice.h>
38 #include <linux/wireless.h>
39 #include <linux/firmware.h>
40 #include <linux/etherdevice.h>
41 #include <linux/if_arp.h>
42
43 #include <net/ieee80211_radiotap.h>
44 #include <net/lib80211.h>
45 #include <net/mac80211.h>
46
47 #include <asm/div64.h>
48
49 #include "iwl-3945-core.h"
50 #include "iwl-commands.h"
51 #include "iwl-3945-commands.h"
52 #include "iwl-3945.h"
53 #include "iwl-3945-fh.h"
54 #include "iwl-helpers.h"
55
56 #ifdef CONFIG_IWL3945_DEBUG
57 u32 iwl3945_debug_level;
58 #endif
59
60 static int iwl3945_tx_queue_update_write_ptr(struct iwl3945_priv *priv,
61 struct iwl3945_tx_queue *txq);
62
63 /******************************************************************************
64 *
65 * module boiler plate
66 *
67 ******************************************************************************/
68
69 /* module parameters */
70 static int iwl3945_param_disable_hw_scan; /* def: 0 = use 3945's h/w scan */
71 static u32 iwl3945_param_debug; /* def: 0 = minimal debug log messages */
72 static int iwl3945_param_disable; /* def: 0 = enable radio */
73 static int iwl3945_param_antenna; /* def: 0 = both antennas (use diversity) */
74 int iwl3945_param_hwcrypto; /* def: 0 = use software encryption */
75 int iwl3945_param_queues_num = IWL39_MAX_NUM_QUEUES; /* def: 8 Tx queues */
76
77 /*
78 * module name, copyright, version, etc.
79 * NOTE: DRV_NAME is defined in iwlwifi.h for use by iwl-debug.h and printk
80 */
81
82 #define DRV_DESCRIPTION \
83 "Intel(R) PRO/Wireless 3945ABG/BG Network Connection driver for Linux"
84
85 #ifdef CONFIG_IWL3945_DEBUG
86 #define VD "d"
87 #else
88 #define VD
89 #endif
90
91 #ifdef CONFIG_IWL3945_SPECTRUM_MEASUREMENT
92 #define VS "s"
93 #else
94 #define VS
95 #endif
96
97 #define IWLWIFI_VERSION "1.2.26k" VD VS
98 #define DRV_COPYRIGHT "Copyright(c) 2003-2008 Intel Corporation"
99 #define DRV_AUTHOR "<ilw@linux.intel.com>"
100 #define DRV_VERSION IWLWIFI_VERSION
101
102
103 MODULE_DESCRIPTION(DRV_DESCRIPTION);
104 MODULE_VERSION(DRV_VERSION);
105 MODULE_AUTHOR(DRV_COPYRIGHT " " DRV_AUTHOR);
106 MODULE_LICENSE("GPL");
107
108 static const struct ieee80211_supported_band *iwl3945_get_band(
109 struct iwl3945_priv *priv, enum ieee80211_band band)
110 {
111 return priv->hw->wiphy->bands[band];
112 }
113
114 /*************** DMA-QUEUE-GENERAL-FUNCTIONS *****
115 * DMA services
116 *
117 * Theory of operation
118 *
119 * A Tx or Rx queue resides in host DRAM, and is comprised of a circular buffer
120 * of buffer descriptors, each of which points to one or more data buffers for
121 * the device to read from or fill. Driver and device exchange status of each
122 * queue via "read" and "write" pointers. Driver keeps minimum of 2 empty
123 * entries in each circular buffer, to protect against confusing empty and full
124 * queue states.
125 *
126 * The device reads or writes the data in the queues via the device's several
127 * DMA/FIFO channels. Each queue is mapped to a single DMA channel.
128 *
129 * For Tx queue, there are low mark and high mark limits. If, after queuing
130 * the packet for Tx, free space become < low mark, Tx queue stopped. When
131 * reclaiming packets (on 'tx done IRQ), if free space become > high mark,
132 * Tx queue resumed.
133 *
134 * The 3945 operates with six queues: One receive queue, one transmit queue
135 * (#4) for sending commands to the device firmware, and four transmit queues
136 * (#0-3) for data tx via EDCA. An additional 2 HCCA queues are unused.
137 ***************************************************/
138
139 int iwl3945_queue_space(const struct iwl3945_queue *q)
140 {
141 int s = q->read_ptr - q->write_ptr;
142
143 if (q->read_ptr > q->write_ptr)
144 s -= q->n_bd;
145
146 if (s <= 0)
147 s += q->n_window;
148 /* keep some reserve to not confuse empty and full situations */
149 s -= 2;
150 if (s < 0)
151 s = 0;
152 return s;
153 }
154
155 int iwl3945_x2_queue_used(const struct iwl3945_queue *q, int i)
156 {
157 return q->write_ptr > q->read_ptr ?
158 (i >= q->read_ptr && i < q->write_ptr) :
159 !(i < q->read_ptr && i >= q->write_ptr);
160 }
161
162
163 static inline u8 get_cmd_index(struct iwl3945_queue *q, u32 index, int is_huge)
164 {
165 /* This is for scan command, the big buffer at end of command array */
166 if (is_huge)
167 return q->n_window; /* must be power of 2 */
168
169 /* Otherwise, use normal size buffers */
170 return index & (q->n_window - 1);
171 }
172
173 /**
174 * iwl3945_queue_init - Initialize queue's high/low-water and read/write indexes
175 */
176 static int iwl3945_queue_init(struct iwl3945_priv *priv, struct iwl3945_queue *q,
177 int count, int slots_num, u32 id)
178 {
179 q->n_bd = count;
180 q->n_window = slots_num;
181 q->id = id;
182
183 /* count must be power-of-two size, otherwise iwl_queue_inc_wrap
184 * and iwl_queue_dec_wrap are broken. */
185 BUG_ON(!is_power_of_2(count));
186
187 /* slots_num must be power-of-two size, otherwise
188 * get_cmd_index is broken. */
189 BUG_ON(!is_power_of_2(slots_num));
190
191 q->low_mark = q->n_window / 4;
192 if (q->low_mark < 4)
193 q->low_mark = 4;
194
195 q->high_mark = q->n_window / 8;
196 if (q->high_mark < 2)
197 q->high_mark = 2;
198
199 q->write_ptr = q->read_ptr = 0;
200
201 return 0;
202 }
203
204 /**
205 * iwl3945_tx_queue_alloc - Alloc driver data and TFD CB for one Tx/cmd queue
206 */
207 static int iwl3945_tx_queue_alloc(struct iwl3945_priv *priv,
208 struct iwl3945_tx_queue *txq, u32 id)
209 {
210 struct pci_dev *dev = priv->pci_dev;
211
212 /* Driver private data, only for Tx (not command) queues,
213 * not shared with device. */
214 if (id != IWL_CMD_QUEUE_NUM) {
215 txq->txb = kmalloc(sizeof(txq->txb[0]) *
216 TFD_QUEUE_SIZE_MAX, GFP_KERNEL);
217 if (!txq->txb) {
218 IWL_ERROR("kmalloc for auxiliary BD "
219 "structures failed\n");
220 goto error;
221 }
222 } else
223 txq->txb = NULL;
224
225 /* Circular buffer of transmit frame descriptors (TFDs),
226 * shared with device */
227 txq->bd = pci_alloc_consistent(dev,
228 sizeof(txq->bd[0]) * TFD_QUEUE_SIZE_MAX,
229 &txq->q.dma_addr);
230
231 if (!txq->bd) {
232 IWL_ERROR("pci_alloc_consistent(%zd) failed\n",
233 sizeof(txq->bd[0]) * TFD_QUEUE_SIZE_MAX);
234 goto error;
235 }
236 txq->q.id = id;
237
238 return 0;
239
240 error:
241 kfree(txq->txb);
242 txq->txb = NULL;
243
244 return -ENOMEM;
245 }
246
247 /**
248 * iwl3945_tx_queue_init - Allocate and initialize one tx/cmd queue
249 */
250 int iwl3945_tx_queue_init(struct iwl3945_priv *priv,
251 struct iwl3945_tx_queue *txq, int slots_num, u32 txq_id)
252 {
253 struct pci_dev *dev = priv->pci_dev;
254 int len;
255 int rc = 0;
256
257 /*
258 * Alloc buffer array for commands (Tx or other types of commands).
259 * For the command queue (#4), allocate command space + one big
260 * command for scan, since scan command is very huge; the system will
261 * not have two scans at the same time, so only one is needed.
262 * For data Tx queues (all other queues), no super-size command
263 * space is needed.
264 */
265 len = sizeof(struct iwl3945_cmd) * slots_num;
266 if (txq_id == IWL_CMD_QUEUE_NUM)
267 len += IWL_MAX_SCAN_SIZE;
268 txq->cmd = pci_alloc_consistent(dev, len, &txq->dma_addr_cmd);
269 if (!txq->cmd)
270 return -ENOMEM;
271
272 /* Alloc driver data array and TFD circular buffer */
273 rc = iwl3945_tx_queue_alloc(priv, txq, txq_id);
274 if (rc) {
275 pci_free_consistent(dev, len, txq->cmd, txq->dma_addr_cmd);
276
277 return -ENOMEM;
278 }
279 txq->need_update = 0;
280
281 /* TFD_QUEUE_SIZE_MAX must be power-of-two size, otherwise
282 * iwl_queue_inc_wrap and iwl_queue_dec_wrap are broken. */
283 BUILD_BUG_ON(TFD_QUEUE_SIZE_MAX & (TFD_QUEUE_SIZE_MAX - 1));
284
285 /* Initialize queue high/low-water, head/tail indexes */
286 iwl3945_queue_init(priv, &txq->q, TFD_QUEUE_SIZE_MAX, slots_num, txq_id);
287
288 /* Tell device where to find queue, enable DMA channel. */
289 iwl3945_hw_tx_queue_init(priv, txq);
290
291 return 0;
292 }
293
294 /**
295 * iwl3945_tx_queue_free - Deallocate DMA queue.
296 * @txq: Transmit queue to deallocate.
297 *
298 * Empty queue by removing and destroying all BD's.
299 * Free all buffers.
300 * 0-fill, but do not free "txq" descriptor structure.
301 */
302 void iwl3945_tx_queue_free(struct iwl3945_priv *priv, struct iwl3945_tx_queue *txq)
303 {
304 struct iwl3945_queue *q = &txq->q;
305 struct pci_dev *dev = priv->pci_dev;
306 int len;
307
308 if (q->n_bd == 0)
309 return;
310
311 /* first, empty all BD's */
312 for (; q->write_ptr != q->read_ptr;
313 q->read_ptr = iwl_queue_inc_wrap(q->read_ptr, q->n_bd))
314 iwl3945_hw_txq_free_tfd(priv, txq);
315
316 len = sizeof(struct iwl3945_cmd) * q->n_window;
317 if (q->id == IWL_CMD_QUEUE_NUM)
318 len += IWL_MAX_SCAN_SIZE;
319
320 /* De-alloc array of command/tx buffers */
321 pci_free_consistent(dev, len, txq->cmd, txq->dma_addr_cmd);
322
323 /* De-alloc circular buffer of TFDs */
324 if (txq->q.n_bd)
325 pci_free_consistent(dev, sizeof(struct iwl3945_tfd_frame) *
326 txq->q.n_bd, txq->bd, txq->q.dma_addr);
327
328 /* De-alloc array of per-TFD driver data */
329 kfree(txq->txb);
330 txq->txb = NULL;
331
332 /* 0-fill queue descriptor structure */
333 memset(txq, 0, sizeof(*txq));
334 }
335
336 const u8 iwl3945_broadcast_addr[ETH_ALEN] = { 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF };
337
338 /*************** STATION TABLE MANAGEMENT ****
339 * mac80211 should be examined to determine if sta_info is duplicating
340 * the functionality provided here
341 */
342
343 /**************************************************************/
344 #if 0 /* temporary disable till we add real remove station */
345 /**
346 * iwl3945_remove_station - Remove driver's knowledge of station.
347 *
348 * NOTE: This does not remove station from device's station table.
349 */
350 static u8 iwl3945_remove_station(struct iwl3945_priv *priv, const u8 *addr, int is_ap)
351 {
352 int index = IWL_INVALID_STATION;
353 int i;
354 unsigned long flags;
355
356 spin_lock_irqsave(&priv->sta_lock, flags);
357
358 if (is_ap)
359 index = IWL_AP_ID;
360 else if (is_broadcast_ether_addr(addr))
361 index = priv->hw_setting.bcast_sta_id;
362 else
363 for (i = IWL_STA_ID; i < priv->hw_setting.max_stations; i++)
364 if (priv->stations[i].used &&
365 !compare_ether_addr(priv->stations[i].sta.sta.addr,
366 addr)) {
367 index = i;
368 break;
369 }
370
371 if (unlikely(index == IWL_INVALID_STATION))
372 goto out;
373
374 if (priv->stations[index].used) {
375 priv->stations[index].used = 0;
376 priv->num_stations--;
377 }
378
379 BUG_ON(priv->num_stations < 0);
380
381 out:
382 spin_unlock_irqrestore(&priv->sta_lock, flags);
383 return 0;
384 }
385 #endif
386
387 /**
388 * iwl3945_clear_stations_table - Clear the driver's station table
389 *
390 * NOTE: This does not clear or otherwise alter the device's station table.
391 */
392 static void iwl3945_clear_stations_table(struct iwl3945_priv *priv)
393 {
394 unsigned long flags;
395
396 spin_lock_irqsave(&priv->sta_lock, flags);
397
398 priv->num_stations = 0;
399 memset(priv->stations, 0, sizeof(priv->stations));
400
401 spin_unlock_irqrestore(&priv->sta_lock, flags);
402 }
403
404 /**
405 * iwl3945_add_station - Add station to station tables in driver and device
406 */
407 u8 iwl3945_add_station(struct iwl3945_priv *priv, const u8 *addr, int is_ap, u8 flags)
408 {
409 int i;
410 int index = IWL_INVALID_STATION;
411 struct iwl3945_station_entry *station;
412 unsigned long flags_spin;
413 u8 rate;
414
415 spin_lock_irqsave(&priv->sta_lock, flags_spin);
416 if (is_ap)
417 index = IWL_AP_ID;
418 else if (is_broadcast_ether_addr(addr))
419 index = priv->hw_setting.bcast_sta_id;
420 else
421 for (i = IWL_STA_ID; i < priv->hw_setting.max_stations; i++) {
422 if (!compare_ether_addr(priv->stations[i].sta.sta.addr,
423 addr)) {
424 index = i;
425 break;
426 }
427
428 if (!priv->stations[i].used &&
429 index == IWL_INVALID_STATION)
430 index = i;
431 }
432
433 /* These two conditions has the same outcome but keep them separate
434 since they have different meaning */
435 if (unlikely(index == IWL_INVALID_STATION)) {
436 spin_unlock_irqrestore(&priv->sta_lock, flags_spin);
437 return index;
438 }
439
440 if (priv->stations[index].used &&
441 !compare_ether_addr(priv->stations[index].sta.sta.addr, addr)) {
442 spin_unlock_irqrestore(&priv->sta_lock, flags_spin);
443 return index;
444 }
445
446 IWL_DEBUG_ASSOC("Add STA ID %d: %pM\n", index, addr);
447 station = &priv->stations[index];
448 station->used = 1;
449 priv->num_stations++;
450
451 /* Set up the REPLY_ADD_STA command to send to device */
452 memset(&station->sta, 0, sizeof(struct iwl3945_addsta_cmd));
453 memcpy(station->sta.sta.addr, addr, ETH_ALEN);
454 station->sta.mode = 0;
455 station->sta.sta.sta_id = index;
456 station->sta.station_flags = 0;
457
458 if (priv->band == IEEE80211_BAND_5GHZ)
459 rate = IWL_RATE_6M_PLCP;
460 else
461 rate = IWL_RATE_1M_PLCP;
462
463 /* Turn on both antennas for the station... */
464 station->sta.rate_n_flags =
465 iwl3945_hw_set_rate_n_flags(rate, RATE_MCS_ANT_AB_MSK);
466
467 spin_unlock_irqrestore(&priv->sta_lock, flags_spin);
468
469 /* Add station to device's station table */
470 iwl3945_send_add_station(priv, &station->sta, flags);
471 return index;
472
473 }
474
475 /*************** DRIVER STATUS FUNCTIONS *****/
476
477 static inline int iwl3945_is_ready(struct iwl3945_priv *priv)
478 {
479 /* The adapter is 'ready' if READY and GEO_CONFIGURED bits are
480 * set but EXIT_PENDING is not */
481 return test_bit(STATUS_READY, &priv->status) &&
482 test_bit(STATUS_GEO_CONFIGURED, &priv->status) &&
483 !test_bit(STATUS_EXIT_PENDING, &priv->status);
484 }
485
486 static inline int iwl3945_is_alive(struct iwl3945_priv *priv)
487 {
488 return test_bit(STATUS_ALIVE, &priv->status);
489 }
490
491 static inline int iwl3945_is_init(struct iwl3945_priv *priv)
492 {
493 return test_bit(STATUS_INIT, &priv->status);
494 }
495
496 static inline int iwl3945_is_rfkill_sw(struct iwl3945_priv *priv)
497 {
498 return test_bit(STATUS_RF_KILL_SW, &priv->status);
499 }
500
501 static inline int iwl3945_is_rfkill_hw(struct iwl3945_priv *priv)
502 {
503 return test_bit(STATUS_RF_KILL_HW, &priv->status);
504 }
505
506 static inline int iwl3945_is_rfkill(struct iwl3945_priv *priv)
507 {
508 return iwl3945_is_rfkill_hw(priv) ||
509 iwl3945_is_rfkill_sw(priv);
510 }
511
512 static inline int iwl3945_is_ready_rf(struct iwl3945_priv *priv)
513 {
514
515 if (iwl3945_is_rfkill(priv))
516 return 0;
517
518 return iwl3945_is_ready(priv);
519 }
520
521 /*************** HOST COMMAND QUEUE FUNCTIONS *****/
522
523 #define IWL_CMD(x) case x: return #x
524
525 static const char *get_cmd_string(u8 cmd)
526 {
527 switch (cmd) {
528 IWL_CMD(REPLY_ALIVE);
529 IWL_CMD(REPLY_ERROR);
530 IWL_CMD(REPLY_RXON);
531 IWL_CMD(REPLY_RXON_ASSOC);
532 IWL_CMD(REPLY_QOS_PARAM);
533 IWL_CMD(REPLY_RXON_TIMING);
534 IWL_CMD(REPLY_ADD_STA);
535 IWL_CMD(REPLY_REMOVE_STA);
536 IWL_CMD(REPLY_REMOVE_ALL_STA);
537 IWL_CMD(REPLY_3945_RX);
538 IWL_CMD(REPLY_TX);
539 IWL_CMD(REPLY_RATE_SCALE);
540 IWL_CMD(REPLY_LEDS_CMD);
541 IWL_CMD(REPLY_TX_LINK_QUALITY_CMD);
542 IWL_CMD(RADAR_NOTIFICATION);
543 IWL_CMD(REPLY_QUIET_CMD);
544 IWL_CMD(REPLY_CHANNEL_SWITCH);
545 IWL_CMD(CHANNEL_SWITCH_NOTIFICATION);
546 IWL_CMD(REPLY_SPECTRUM_MEASUREMENT_CMD);
547 IWL_CMD(SPECTRUM_MEASURE_NOTIFICATION);
548 IWL_CMD(POWER_TABLE_CMD);
549 IWL_CMD(PM_SLEEP_NOTIFICATION);
550 IWL_CMD(PM_DEBUG_STATISTIC_NOTIFIC);
551 IWL_CMD(REPLY_SCAN_CMD);
552 IWL_CMD(REPLY_SCAN_ABORT_CMD);
553 IWL_CMD(SCAN_START_NOTIFICATION);
554 IWL_CMD(SCAN_RESULTS_NOTIFICATION);
555 IWL_CMD(SCAN_COMPLETE_NOTIFICATION);
556 IWL_CMD(BEACON_NOTIFICATION);
557 IWL_CMD(REPLY_TX_BEACON);
558 IWL_CMD(WHO_IS_AWAKE_NOTIFICATION);
559 IWL_CMD(QUIET_NOTIFICATION);
560 IWL_CMD(REPLY_TX_PWR_TABLE_CMD);
561 IWL_CMD(MEASURE_ABORT_NOTIFICATION);
562 IWL_CMD(REPLY_BT_CONFIG);
563 IWL_CMD(REPLY_STATISTICS_CMD);
564 IWL_CMD(STATISTICS_NOTIFICATION);
565 IWL_CMD(REPLY_CARD_STATE_CMD);
566 IWL_CMD(CARD_STATE_NOTIFICATION);
567 IWL_CMD(MISSED_BEACONS_NOTIFICATION);
568 default:
569 return "UNKNOWN";
570
571 }
572 }
573
574 #define HOST_COMPLETE_TIMEOUT (HZ / 2)
575
576 /**
577 * iwl3945_enqueue_hcmd - enqueue a uCode command
578 * @priv: device private data point
579 * @cmd: a point to the ucode command structure
580 *
581 * The function returns < 0 values to indicate the operation is
582 * failed. On success, it turns the index (> 0) of command in the
583 * command queue.
584 */
585 static int iwl3945_enqueue_hcmd(struct iwl3945_priv *priv, struct iwl3945_host_cmd *cmd)
586 {
587 struct iwl3945_tx_queue *txq = &priv->txq[IWL_CMD_QUEUE_NUM];
588 struct iwl3945_queue *q = &txq->q;
589 struct iwl3945_tfd_frame *tfd;
590 u32 *control_flags;
591 struct iwl3945_cmd *out_cmd;
592 u32 idx;
593 u16 fix_size = (u16)(cmd->len + sizeof(out_cmd->hdr));
594 dma_addr_t phys_addr;
595 int pad;
596 u16 count;
597 int ret;
598 unsigned long flags;
599
600 /* If any of the command structures end up being larger than
601 * the TFD_MAX_PAYLOAD_SIZE, and it sent as a 'small' command then
602 * we will need to increase the size of the TFD entries */
603 BUG_ON((fix_size > TFD_MAX_PAYLOAD_SIZE) &&
604 !(cmd->meta.flags & CMD_SIZE_HUGE));
605
606
607 if (iwl3945_is_rfkill(priv)) {
608 IWL_DEBUG_INFO("Not sending command - RF KILL");
609 return -EIO;
610 }
611
612 if (iwl3945_queue_space(q) < ((cmd->meta.flags & CMD_ASYNC) ? 2 : 1)) {
613 IWL_ERROR("No space for Tx\n");
614 return -ENOSPC;
615 }
616
617 spin_lock_irqsave(&priv->hcmd_lock, flags);
618
619 tfd = &txq->bd[q->write_ptr];
620 memset(tfd, 0, sizeof(*tfd));
621
622 control_flags = (u32 *) tfd;
623
624 idx = get_cmd_index(q, q->write_ptr, cmd->meta.flags & CMD_SIZE_HUGE);
625 out_cmd = &txq->cmd[idx];
626
627 out_cmd->hdr.cmd = cmd->id;
628 memcpy(&out_cmd->meta, &cmd->meta, sizeof(cmd->meta));
629 memcpy(&out_cmd->cmd.payload, cmd->data, cmd->len);
630
631 /* At this point, the out_cmd now has all of the incoming cmd
632 * information */
633
634 out_cmd->hdr.flags = 0;
635 out_cmd->hdr.sequence = cpu_to_le16(QUEUE_TO_SEQ(IWL_CMD_QUEUE_NUM) |
636 INDEX_TO_SEQ(q->write_ptr));
637 if (out_cmd->meta.flags & CMD_SIZE_HUGE)
638 out_cmd->hdr.sequence |= SEQ_HUGE_FRAME;
639
640 phys_addr = txq->dma_addr_cmd + sizeof(txq->cmd[0]) * idx +
641 offsetof(struct iwl3945_cmd, hdr);
642 iwl3945_hw_txq_attach_buf_to_tfd(priv, tfd, phys_addr, fix_size);
643
644 pad = U32_PAD(cmd->len);
645 count = TFD_CTL_COUNT_GET(*control_flags);
646 *control_flags = TFD_CTL_COUNT_SET(count) | TFD_CTL_PAD_SET(pad);
647
648 IWL_DEBUG_HC("Sending command %s (#%x), seq: 0x%04X, "
649 "%d bytes at %d[%d]:%d\n",
650 get_cmd_string(out_cmd->hdr.cmd),
651 out_cmd->hdr.cmd, le16_to_cpu(out_cmd->hdr.sequence),
652 fix_size, q->write_ptr, idx, IWL_CMD_QUEUE_NUM);
653
654 txq->need_update = 1;
655
656 /* Increment and update queue's write index */
657 q->write_ptr = iwl_queue_inc_wrap(q->write_ptr, q->n_bd);
658 ret = iwl3945_tx_queue_update_write_ptr(priv, txq);
659
660 spin_unlock_irqrestore(&priv->hcmd_lock, flags);
661 return ret ? ret : idx;
662 }
663
664 static int iwl3945_send_cmd_async(struct iwl3945_priv *priv, struct iwl3945_host_cmd *cmd)
665 {
666 int ret;
667
668 BUG_ON(!(cmd->meta.flags & CMD_ASYNC));
669
670 /* An asynchronous command can not expect an SKB to be set. */
671 BUG_ON(cmd->meta.flags & CMD_WANT_SKB);
672
673 /* An asynchronous command MUST have a callback. */
674 BUG_ON(!cmd->meta.u.callback);
675
676 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
677 return -EBUSY;
678
679 ret = iwl3945_enqueue_hcmd(priv, cmd);
680 if (ret < 0) {
681 IWL_ERROR("Error sending %s: iwl3945_enqueue_hcmd failed: %d\n",
682 get_cmd_string(cmd->id), ret);
683 return ret;
684 }
685 return 0;
686 }
687
688 static int iwl3945_send_cmd_sync(struct iwl3945_priv *priv, struct iwl3945_host_cmd *cmd)
689 {
690 int cmd_idx;
691 int ret;
692
693 BUG_ON(cmd->meta.flags & CMD_ASYNC);
694
695 /* A synchronous command can not have a callback set. */
696 BUG_ON(cmd->meta.u.callback != NULL);
697
698 if (test_and_set_bit(STATUS_HCMD_SYNC_ACTIVE, &priv->status)) {
699 IWL_ERROR("Error sending %s: Already sending a host command\n",
700 get_cmd_string(cmd->id));
701 ret = -EBUSY;
702 goto out;
703 }
704
705 set_bit(STATUS_HCMD_ACTIVE, &priv->status);
706
707 if (cmd->meta.flags & CMD_WANT_SKB)
708 cmd->meta.source = &cmd->meta;
709
710 cmd_idx = iwl3945_enqueue_hcmd(priv, cmd);
711 if (cmd_idx < 0) {
712 ret = cmd_idx;
713 IWL_ERROR("Error sending %s: iwl3945_enqueue_hcmd failed: %d\n",
714 get_cmd_string(cmd->id), ret);
715 goto out;
716 }
717
718 ret = wait_event_interruptible_timeout(priv->wait_command_queue,
719 !test_bit(STATUS_HCMD_ACTIVE, &priv->status),
720 HOST_COMPLETE_TIMEOUT);
721 if (!ret) {
722 if (test_bit(STATUS_HCMD_ACTIVE, &priv->status)) {
723 IWL_ERROR("Error sending %s: time out after %dms.\n",
724 get_cmd_string(cmd->id),
725 jiffies_to_msecs(HOST_COMPLETE_TIMEOUT));
726
727 clear_bit(STATUS_HCMD_ACTIVE, &priv->status);
728 ret = -ETIMEDOUT;
729 goto cancel;
730 }
731 }
732
733 if (test_bit(STATUS_RF_KILL_HW, &priv->status)) {
734 IWL_DEBUG_INFO("Command %s aborted: RF KILL Switch\n",
735 get_cmd_string(cmd->id));
736 ret = -ECANCELED;
737 goto fail;
738 }
739 if (test_bit(STATUS_FW_ERROR, &priv->status)) {
740 IWL_DEBUG_INFO("Command %s failed: FW Error\n",
741 get_cmd_string(cmd->id));
742 ret = -EIO;
743 goto fail;
744 }
745 if ((cmd->meta.flags & CMD_WANT_SKB) && !cmd->meta.u.skb) {
746 IWL_ERROR("Error: Response NULL in '%s'\n",
747 get_cmd_string(cmd->id));
748 ret = -EIO;
749 goto cancel;
750 }
751
752 ret = 0;
753 goto out;
754
755 cancel:
756 if (cmd->meta.flags & CMD_WANT_SKB) {
757 struct iwl3945_cmd *qcmd;
758
759 /* Cancel the CMD_WANT_SKB flag for the cmd in the
760 * TX cmd queue. Otherwise in case the cmd comes
761 * in later, it will possibly set an invalid
762 * address (cmd->meta.source). */
763 qcmd = &priv->txq[IWL_CMD_QUEUE_NUM].cmd[cmd_idx];
764 qcmd->meta.flags &= ~CMD_WANT_SKB;
765 }
766 fail:
767 if (cmd->meta.u.skb) {
768 dev_kfree_skb_any(cmd->meta.u.skb);
769 cmd->meta.u.skb = NULL;
770 }
771 out:
772 clear_bit(STATUS_HCMD_SYNC_ACTIVE, &priv->status);
773 return ret;
774 }
775
776 int iwl3945_send_cmd(struct iwl3945_priv *priv, struct iwl3945_host_cmd *cmd)
777 {
778 if (cmd->meta.flags & CMD_ASYNC)
779 return iwl3945_send_cmd_async(priv, cmd);
780
781 return iwl3945_send_cmd_sync(priv, cmd);
782 }
783
784 int iwl3945_send_cmd_pdu(struct iwl3945_priv *priv, u8 id, u16 len, const void *data)
785 {
786 struct iwl3945_host_cmd cmd = {
787 .id = id,
788 .len = len,
789 .data = data,
790 };
791
792 return iwl3945_send_cmd_sync(priv, &cmd);
793 }
794
795 static int __must_check iwl3945_send_cmd_u32(struct iwl3945_priv *priv, u8 id, u32 val)
796 {
797 struct iwl3945_host_cmd cmd = {
798 .id = id,
799 .len = sizeof(val),
800 .data = &val,
801 };
802
803 return iwl3945_send_cmd_sync(priv, &cmd);
804 }
805
806 int iwl3945_send_statistics_request(struct iwl3945_priv *priv)
807 {
808 return iwl3945_send_cmd_u32(priv, REPLY_STATISTICS_CMD, 0);
809 }
810
811 /**
812 * iwl3945_set_rxon_channel - Set the phymode and channel values in staging RXON
813 * @band: 2.4 or 5 GHz band
814 * @channel: Any channel valid for the requested band
815
816 * In addition to setting the staging RXON, priv->band is also set.
817 *
818 * NOTE: Does not commit to the hardware; it sets appropriate bit fields
819 * in the staging RXON flag structure based on the band
820 */
821 static int iwl3945_set_rxon_channel(struct iwl3945_priv *priv,
822 enum ieee80211_band band,
823 u16 channel)
824 {
825 if (!iwl3945_get_channel_info(priv, band, channel)) {
826 IWL_DEBUG_INFO("Could not set channel to %d [%d]\n",
827 channel, band);
828 return -EINVAL;
829 }
830
831 if ((le16_to_cpu(priv->staging_rxon.channel) == channel) &&
832 (priv->band == band))
833 return 0;
834
835 priv->staging_rxon.channel = cpu_to_le16(channel);
836 if (band == IEEE80211_BAND_5GHZ)
837 priv->staging_rxon.flags &= ~RXON_FLG_BAND_24G_MSK;
838 else
839 priv->staging_rxon.flags |= RXON_FLG_BAND_24G_MSK;
840
841 priv->band = band;
842
843 IWL_DEBUG_INFO("Staging channel set to %d [%d]\n", channel, band);
844
845 return 0;
846 }
847
848 /**
849 * iwl3945_check_rxon_cmd - validate RXON structure is valid
850 *
851 * NOTE: This is really only useful during development and can eventually
852 * be #ifdef'd out once the driver is stable and folks aren't actively
853 * making changes
854 */
855 static int iwl3945_check_rxon_cmd(struct iwl3945_rxon_cmd *rxon)
856 {
857 int error = 0;
858 int counter = 1;
859
860 if (rxon->flags & RXON_FLG_BAND_24G_MSK) {
861 error |= le32_to_cpu(rxon->flags &
862 (RXON_FLG_TGJ_NARROW_BAND_MSK |
863 RXON_FLG_RADAR_DETECT_MSK));
864 if (error)
865 IWL_WARNING("check 24G fields %d | %d\n",
866 counter++, error);
867 } else {
868 error |= (rxon->flags & RXON_FLG_SHORT_SLOT_MSK) ?
869 0 : le32_to_cpu(RXON_FLG_SHORT_SLOT_MSK);
870 if (error)
871 IWL_WARNING("check 52 fields %d | %d\n",
872 counter++, error);
873 error |= le32_to_cpu(rxon->flags & RXON_FLG_CCK_MSK);
874 if (error)
875 IWL_WARNING("check 52 CCK %d | %d\n",
876 counter++, error);
877 }
878 error |= (rxon->node_addr[0] | rxon->bssid_addr[0]) & 0x1;
879 if (error)
880 IWL_WARNING("check mac addr %d | %d\n", counter++, error);
881
882 /* make sure basic rates 6Mbps and 1Mbps are supported */
883 error |= (((rxon->ofdm_basic_rates & IWL_RATE_6M_MASK) == 0) &&
884 ((rxon->cck_basic_rates & IWL_RATE_1M_MASK) == 0));
885 if (error)
886 IWL_WARNING("check basic rate %d | %d\n", counter++, error);
887
888 error |= (le16_to_cpu(rxon->assoc_id) > 2007);
889 if (error)
890 IWL_WARNING("check assoc id %d | %d\n", counter++, error);
891
892 error |= ((rxon->flags & (RXON_FLG_CCK_MSK | RXON_FLG_SHORT_SLOT_MSK))
893 == (RXON_FLG_CCK_MSK | RXON_FLG_SHORT_SLOT_MSK));
894 if (error)
895 IWL_WARNING("check CCK and short slot %d | %d\n",
896 counter++, error);
897
898 error |= ((rxon->flags & (RXON_FLG_CCK_MSK | RXON_FLG_AUTO_DETECT_MSK))
899 == (RXON_FLG_CCK_MSK | RXON_FLG_AUTO_DETECT_MSK));
900 if (error)
901 IWL_WARNING("check CCK & auto detect %d | %d\n",
902 counter++, error);
903
904 error |= ((rxon->flags & (RXON_FLG_AUTO_DETECT_MSK |
905 RXON_FLG_TGG_PROTECT_MSK)) == RXON_FLG_TGG_PROTECT_MSK);
906 if (error)
907 IWL_WARNING("check TGG and auto detect %d | %d\n",
908 counter++, error);
909
910 if ((rxon->flags & RXON_FLG_DIS_DIV_MSK))
911 error |= ((rxon->flags & (RXON_FLG_ANT_B_MSK |
912 RXON_FLG_ANT_A_MSK)) == 0);
913 if (error)
914 IWL_WARNING("check antenna %d %d\n", counter++, error);
915
916 if (error)
917 IWL_WARNING("Tuning to channel %d\n",
918 le16_to_cpu(rxon->channel));
919
920 if (error) {
921 IWL_ERROR("Not a valid iwl3945_rxon_assoc_cmd field values\n");
922 return -1;
923 }
924 return 0;
925 }
926
927 /**
928 * iwl3945_full_rxon_required - check if full RXON (vs RXON_ASSOC) cmd is needed
929 * @priv: staging_rxon is compared to active_rxon
930 *
931 * If the RXON structure is changing enough to require a new tune,
932 * or is clearing the RXON_FILTER_ASSOC_MSK, then return 1 to indicate that
933 * a new tune (full RXON command, rather than RXON_ASSOC cmd) is required.
934 */
935 static int iwl3945_full_rxon_required(struct iwl3945_priv *priv)
936 {
937
938 /* These items are only settable from the full RXON command */
939 if (!(iwl3945_is_associated(priv)) ||
940 compare_ether_addr(priv->staging_rxon.bssid_addr,
941 priv->active_rxon.bssid_addr) ||
942 compare_ether_addr(priv->staging_rxon.node_addr,
943 priv->active_rxon.node_addr) ||
944 compare_ether_addr(priv->staging_rxon.wlap_bssid_addr,
945 priv->active_rxon.wlap_bssid_addr) ||
946 (priv->staging_rxon.dev_type != priv->active_rxon.dev_type) ||
947 (priv->staging_rxon.channel != priv->active_rxon.channel) ||
948 (priv->staging_rxon.air_propagation !=
949 priv->active_rxon.air_propagation) ||
950 (priv->staging_rxon.assoc_id != priv->active_rxon.assoc_id))
951 return 1;
952
953 /* flags, filter_flags, ofdm_basic_rates, and cck_basic_rates can
954 * be updated with the RXON_ASSOC command -- however only some
955 * flag transitions are allowed using RXON_ASSOC */
956
957 /* Check if we are not switching bands */
958 if ((priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) !=
959 (priv->active_rxon.flags & RXON_FLG_BAND_24G_MSK))
960 return 1;
961
962 /* Check if we are switching association toggle */
963 if ((priv->staging_rxon.filter_flags & RXON_FILTER_ASSOC_MSK) !=
964 (priv->active_rxon.filter_flags & RXON_FILTER_ASSOC_MSK))
965 return 1;
966
967 return 0;
968 }
969
970 static int iwl3945_send_rxon_assoc(struct iwl3945_priv *priv)
971 {
972 int rc = 0;
973 struct iwl3945_rx_packet *res = NULL;
974 struct iwl3945_rxon_assoc_cmd rxon_assoc;
975 struct iwl3945_host_cmd cmd = {
976 .id = REPLY_RXON_ASSOC,
977 .len = sizeof(rxon_assoc),
978 .meta.flags = CMD_WANT_SKB,
979 .data = &rxon_assoc,
980 };
981 const struct iwl3945_rxon_cmd *rxon1 = &priv->staging_rxon;
982 const struct iwl3945_rxon_cmd *rxon2 = &priv->active_rxon;
983
984 if ((rxon1->flags == rxon2->flags) &&
985 (rxon1->filter_flags == rxon2->filter_flags) &&
986 (rxon1->cck_basic_rates == rxon2->cck_basic_rates) &&
987 (rxon1->ofdm_basic_rates == rxon2->ofdm_basic_rates)) {
988 IWL_DEBUG_INFO("Using current RXON_ASSOC. Not resending.\n");
989 return 0;
990 }
991
992 rxon_assoc.flags = priv->staging_rxon.flags;
993 rxon_assoc.filter_flags = priv->staging_rxon.filter_flags;
994 rxon_assoc.ofdm_basic_rates = priv->staging_rxon.ofdm_basic_rates;
995 rxon_assoc.cck_basic_rates = priv->staging_rxon.cck_basic_rates;
996 rxon_assoc.reserved = 0;
997
998 rc = iwl3945_send_cmd_sync(priv, &cmd);
999 if (rc)
1000 return rc;
1001
1002 res = (struct iwl3945_rx_packet *)cmd.meta.u.skb->data;
1003 if (res->hdr.flags & IWL_CMD_FAILED_MSK) {
1004 IWL_ERROR("Bad return from REPLY_RXON_ASSOC command\n");
1005 rc = -EIO;
1006 }
1007
1008 priv->alloc_rxb_skb--;
1009 dev_kfree_skb_any(cmd.meta.u.skb);
1010
1011 return rc;
1012 }
1013
1014 /**
1015 * iwl3945_commit_rxon - commit staging_rxon to hardware
1016 *
1017 * The RXON command in staging_rxon is committed to the hardware and
1018 * the active_rxon structure is updated with the new data. This
1019 * function correctly transitions out of the RXON_ASSOC_MSK state if
1020 * a HW tune is required based on the RXON structure changes.
1021 */
1022 static int iwl3945_commit_rxon(struct iwl3945_priv *priv)
1023 {
1024 /* cast away the const for active_rxon in this function */
1025 struct iwl3945_rxon_cmd *active_rxon = (void *)&priv->active_rxon;
1026 int rc = 0;
1027
1028 if (!iwl3945_is_alive(priv))
1029 return -1;
1030
1031 /* always get timestamp with Rx frame */
1032 priv->staging_rxon.flags |= RXON_FLG_TSF2HOST_MSK;
1033
1034 /* select antenna */
1035 priv->staging_rxon.flags &=
1036 ~(RXON_FLG_DIS_DIV_MSK | RXON_FLG_ANT_SEL_MSK);
1037 priv->staging_rxon.flags |= iwl3945_get_antenna_flags(priv);
1038
1039 rc = iwl3945_check_rxon_cmd(&priv->staging_rxon);
1040 if (rc) {
1041 IWL_ERROR("Invalid RXON configuration. Not committing.\n");
1042 return -EINVAL;
1043 }
1044
1045 /* If we don't need to send a full RXON, we can use
1046 * iwl3945_rxon_assoc_cmd which is used to reconfigure filter
1047 * and other flags for the current radio configuration. */
1048 if (!iwl3945_full_rxon_required(priv)) {
1049 rc = iwl3945_send_rxon_assoc(priv);
1050 if (rc) {
1051 IWL_ERROR("Error setting RXON_ASSOC "
1052 "configuration (%d).\n", rc);
1053 return rc;
1054 }
1055
1056 memcpy(active_rxon, &priv->staging_rxon, sizeof(*active_rxon));
1057
1058 return 0;
1059 }
1060
1061 /* If we are currently associated and the new config requires
1062 * an RXON_ASSOC and the new config wants the associated mask enabled,
1063 * we must clear the associated from the active configuration
1064 * before we apply the new config */
1065 if (iwl3945_is_associated(priv) &&
1066 (priv->staging_rxon.filter_flags & RXON_FILTER_ASSOC_MSK)) {
1067 IWL_DEBUG_INFO("Toggling associated bit on current RXON\n");
1068 active_rxon->filter_flags &= ~RXON_FILTER_ASSOC_MSK;
1069
1070 rc = iwl3945_send_cmd_pdu(priv, REPLY_RXON,
1071 sizeof(struct iwl3945_rxon_cmd),
1072 &priv->active_rxon);
1073
1074 /* If the mask clearing failed then we set
1075 * active_rxon back to what it was previously */
1076 if (rc) {
1077 active_rxon->filter_flags |= RXON_FILTER_ASSOC_MSK;
1078 IWL_ERROR("Error clearing ASSOC_MSK on current "
1079 "configuration (%d).\n", rc);
1080 return rc;
1081 }
1082 }
1083
1084 IWL_DEBUG_INFO("Sending RXON\n"
1085 "* with%s RXON_FILTER_ASSOC_MSK\n"
1086 "* channel = %d\n"
1087 "* bssid = %pM\n",
1088 ((priv->staging_rxon.filter_flags &
1089 RXON_FILTER_ASSOC_MSK) ? "" : "out"),
1090 le16_to_cpu(priv->staging_rxon.channel),
1091 priv->staging_rxon.bssid_addr);
1092
1093 /* Apply the new configuration */
1094 rc = iwl3945_send_cmd_pdu(priv, REPLY_RXON,
1095 sizeof(struct iwl3945_rxon_cmd), &priv->staging_rxon);
1096 if (rc) {
1097 IWL_ERROR("Error setting new configuration (%d).\n", rc);
1098 return rc;
1099 }
1100
1101 memcpy(active_rxon, &priv->staging_rxon, sizeof(*active_rxon));
1102
1103 iwl3945_clear_stations_table(priv);
1104
1105 /* If we issue a new RXON command which required a tune then we must
1106 * send a new TXPOWER command or we won't be able to Tx any frames */
1107 rc = iwl3945_hw_reg_send_txpower(priv);
1108 if (rc) {
1109 IWL_ERROR("Error setting Tx power (%d).\n", rc);
1110 return rc;
1111 }
1112
1113 /* Add the broadcast address so we can send broadcast frames */
1114 if (iwl3945_add_station(priv, iwl3945_broadcast_addr, 0, 0) ==
1115 IWL_INVALID_STATION) {
1116 IWL_ERROR("Error adding BROADCAST address for transmit.\n");
1117 return -EIO;
1118 }
1119
1120 /* If we have set the ASSOC_MSK and we are in BSS mode then
1121 * add the IWL_AP_ID to the station rate table */
1122 if (iwl3945_is_associated(priv) &&
1123 (priv->iw_mode == NL80211_IFTYPE_STATION))
1124 if (iwl3945_add_station(priv, priv->active_rxon.bssid_addr, 1, 0)
1125 == IWL_INVALID_STATION) {
1126 IWL_ERROR("Error adding AP address for transmit.\n");
1127 return -EIO;
1128 }
1129
1130 /* Init the hardware's rate fallback order based on the band */
1131 rc = iwl3945_init_hw_rate_table(priv);
1132 if (rc) {
1133 IWL_ERROR("Error setting HW rate table: %02X\n", rc);
1134 return -EIO;
1135 }
1136
1137 return 0;
1138 }
1139
1140 static int iwl3945_send_bt_config(struct iwl3945_priv *priv)
1141 {
1142 struct iwl_bt_cmd bt_cmd = {
1143 .flags = 3,
1144 .lead_time = 0xAA,
1145 .max_kill = 1,
1146 .kill_ack_mask = 0,
1147 .kill_cts_mask = 0,
1148 };
1149
1150 return iwl3945_send_cmd_pdu(priv, REPLY_BT_CONFIG,
1151 sizeof(bt_cmd), &bt_cmd);
1152 }
1153
1154 static int iwl3945_send_scan_abort(struct iwl3945_priv *priv)
1155 {
1156 int rc = 0;
1157 struct iwl3945_rx_packet *res;
1158 struct iwl3945_host_cmd cmd = {
1159 .id = REPLY_SCAN_ABORT_CMD,
1160 .meta.flags = CMD_WANT_SKB,
1161 };
1162
1163 /* If there isn't a scan actively going on in the hardware
1164 * then we are in between scan bands and not actually
1165 * actively scanning, so don't send the abort command */
1166 if (!test_bit(STATUS_SCAN_HW, &priv->status)) {
1167 clear_bit(STATUS_SCAN_ABORTING, &priv->status);
1168 return 0;
1169 }
1170
1171 rc = iwl3945_send_cmd_sync(priv, &cmd);
1172 if (rc) {
1173 clear_bit(STATUS_SCAN_ABORTING, &priv->status);
1174 return rc;
1175 }
1176
1177 res = (struct iwl3945_rx_packet *)cmd.meta.u.skb->data;
1178 if (res->u.status != CAN_ABORT_STATUS) {
1179 /* The scan abort will return 1 for success or
1180 * 2 for "failure". A failure condition can be
1181 * due to simply not being in an active scan which
1182 * can occur if we send the scan abort before we
1183 * the microcode has notified us that a scan is
1184 * completed. */
1185 IWL_DEBUG_INFO("SCAN_ABORT returned %d.\n", res->u.status);
1186 clear_bit(STATUS_SCAN_ABORTING, &priv->status);
1187 clear_bit(STATUS_SCAN_HW, &priv->status);
1188 }
1189
1190 dev_kfree_skb_any(cmd.meta.u.skb);
1191
1192 return rc;
1193 }
1194
1195 static int iwl3945_card_state_sync_callback(struct iwl3945_priv *priv,
1196 struct iwl3945_cmd *cmd,
1197 struct sk_buff *skb)
1198 {
1199 return 1;
1200 }
1201
1202 /*
1203 * CARD_STATE_CMD
1204 *
1205 * Use: Sets the device's internal card state to enable, disable, or halt
1206 *
1207 * When in the 'enable' state the card operates as normal.
1208 * When in the 'disable' state, the card enters into a low power mode.
1209 * When in the 'halt' state, the card is shut down and must be fully
1210 * restarted to come back on.
1211 */
1212 static int iwl3945_send_card_state(struct iwl3945_priv *priv, u32 flags, u8 meta_flag)
1213 {
1214 struct iwl3945_host_cmd cmd = {
1215 .id = REPLY_CARD_STATE_CMD,
1216 .len = sizeof(u32),
1217 .data = &flags,
1218 .meta.flags = meta_flag,
1219 };
1220
1221 if (meta_flag & CMD_ASYNC)
1222 cmd.meta.u.callback = iwl3945_card_state_sync_callback;
1223
1224 return iwl3945_send_cmd(priv, &cmd);
1225 }
1226
1227 static int iwl3945_add_sta_sync_callback(struct iwl3945_priv *priv,
1228 struct iwl3945_cmd *cmd, struct sk_buff *skb)
1229 {
1230 struct iwl3945_rx_packet *res = NULL;
1231
1232 if (!skb) {
1233 IWL_ERROR("Error: Response NULL in REPLY_ADD_STA.\n");
1234 return 1;
1235 }
1236
1237 res = (struct iwl3945_rx_packet *)skb->data;
1238 if (res->hdr.flags & IWL_CMD_FAILED_MSK) {
1239 IWL_ERROR("Bad return from REPLY_ADD_STA (0x%08X)\n",
1240 res->hdr.flags);
1241 return 1;
1242 }
1243
1244 switch (res->u.add_sta.status) {
1245 case ADD_STA_SUCCESS_MSK:
1246 break;
1247 default:
1248 break;
1249 }
1250
1251 /* We didn't cache the SKB; let the caller free it */
1252 return 1;
1253 }
1254
1255 int iwl3945_send_add_station(struct iwl3945_priv *priv,
1256 struct iwl3945_addsta_cmd *sta, u8 flags)
1257 {
1258 struct iwl3945_rx_packet *res = NULL;
1259 int rc = 0;
1260 struct iwl3945_host_cmd cmd = {
1261 .id = REPLY_ADD_STA,
1262 .len = sizeof(struct iwl3945_addsta_cmd),
1263 .meta.flags = flags,
1264 .data = sta,
1265 };
1266
1267 if (flags & CMD_ASYNC)
1268 cmd.meta.u.callback = iwl3945_add_sta_sync_callback;
1269 else
1270 cmd.meta.flags |= CMD_WANT_SKB;
1271
1272 rc = iwl3945_send_cmd(priv, &cmd);
1273
1274 if (rc || (flags & CMD_ASYNC))
1275 return rc;
1276
1277 res = (struct iwl3945_rx_packet *)cmd.meta.u.skb->data;
1278 if (res->hdr.flags & IWL_CMD_FAILED_MSK) {
1279 IWL_ERROR("Bad return from REPLY_ADD_STA (0x%08X)\n",
1280 res->hdr.flags);
1281 rc = -EIO;
1282 }
1283
1284 if (rc == 0) {
1285 switch (res->u.add_sta.status) {
1286 case ADD_STA_SUCCESS_MSK:
1287 IWL_DEBUG_INFO("REPLY_ADD_STA PASSED\n");
1288 break;
1289 default:
1290 rc = -EIO;
1291 IWL_WARNING("REPLY_ADD_STA failed\n");
1292 break;
1293 }
1294 }
1295
1296 priv->alloc_rxb_skb--;
1297 dev_kfree_skb_any(cmd.meta.u.skb);
1298
1299 return rc;
1300 }
1301
1302 static int iwl3945_update_sta_key_info(struct iwl3945_priv *priv,
1303 struct ieee80211_key_conf *keyconf,
1304 u8 sta_id)
1305 {
1306 unsigned long flags;
1307 __le16 key_flags = 0;
1308
1309 switch (keyconf->alg) {
1310 case ALG_CCMP:
1311 key_flags |= STA_KEY_FLG_CCMP;
1312 key_flags |= cpu_to_le16(
1313 keyconf->keyidx << STA_KEY_FLG_KEYID_POS);
1314 key_flags &= ~STA_KEY_FLG_INVALID;
1315 break;
1316 case ALG_TKIP:
1317 case ALG_WEP:
1318 default:
1319 return -EINVAL;
1320 }
1321 spin_lock_irqsave(&priv->sta_lock, flags);
1322 priv->stations[sta_id].keyinfo.alg = keyconf->alg;
1323 priv->stations[sta_id].keyinfo.keylen = keyconf->keylen;
1324 memcpy(priv->stations[sta_id].keyinfo.key, keyconf->key,
1325 keyconf->keylen);
1326
1327 memcpy(priv->stations[sta_id].sta.key.key, keyconf->key,
1328 keyconf->keylen);
1329 priv->stations[sta_id].sta.key.key_flags = key_flags;
1330 priv->stations[sta_id].sta.sta.modify_mask = STA_MODIFY_KEY_MASK;
1331 priv->stations[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK;
1332
1333 spin_unlock_irqrestore(&priv->sta_lock, flags);
1334
1335 IWL_DEBUG_INFO("hwcrypto: modify ucode station key info\n");
1336 iwl3945_send_add_station(priv, &priv->stations[sta_id].sta, 0);
1337 return 0;
1338 }
1339
1340 static int iwl3945_clear_sta_key_info(struct iwl3945_priv *priv, u8 sta_id)
1341 {
1342 unsigned long flags;
1343
1344 spin_lock_irqsave(&priv->sta_lock, flags);
1345 memset(&priv->stations[sta_id].keyinfo, 0, sizeof(struct iwl3945_hw_key));
1346 memset(&priv->stations[sta_id].sta.key, 0,
1347 sizeof(struct iwl4965_keyinfo));
1348 priv->stations[sta_id].sta.key.key_flags = STA_KEY_FLG_NO_ENC;
1349 priv->stations[sta_id].sta.sta.modify_mask = STA_MODIFY_KEY_MASK;
1350 priv->stations[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK;
1351 spin_unlock_irqrestore(&priv->sta_lock, flags);
1352
1353 IWL_DEBUG_INFO("hwcrypto: clear ucode station key info\n");
1354 iwl3945_send_add_station(priv, &priv->stations[sta_id].sta, 0);
1355 return 0;
1356 }
1357
1358 static void iwl3945_clear_free_frames(struct iwl3945_priv *priv)
1359 {
1360 struct list_head *element;
1361
1362 IWL_DEBUG_INFO("%d frames on pre-allocated heap on clear.\n",
1363 priv->frames_count);
1364
1365 while (!list_empty(&priv->free_frames)) {
1366 element = priv->free_frames.next;
1367 list_del(element);
1368 kfree(list_entry(element, struct iwl3945_frame, list));
1369 priv->frames_count--;
1370 }
1371
1372 if (priv->frames_count) {
1373 IWL_WARNING("%d frames still in use. Did we lose one?\n",
1374 priv->frames_count);
1375 priv->frames_count = 0;
1376 }
1377 }
1378
1379 static struct iwl3945_frame *iwl3945_get_free_frame(struct iwl3945_priv *priv)
1380 {
1381 struct iwl3945_frame *frame;
1382 struct list_head *element;
1383 if (list_empty(&priv->free_frames)) {
1384 frame = kzalloc(sizeof(*frame), GFP_KERNEL);
1385 if (!frame) {
1386 IWL_ERROR("Could not allocate frame!\n");
1387 return NULL;
1388 }
1389
1390 priv->frames_count++;
1391 return frame;
1392 }
1393
1394 element = priv->free_frames.next;
1395 list_del(element);
1396 return list_entry(element, struct iwl3945_frame, list);
1397 }
1398
1399 static void iwl3945_free_frame(struct iwl3945_priv *priv, struct iwl3945_frame *frame)
1400 {
1401 memset(frame, 0, sizeof(*frame));
1402 list_add(&frame->list, &priv->free_frames);
1403 }
1404
1405 unsigned int iwl3945_fill_beacon_frame(struct iwl3945_priv *priv,
1406 struct ieee80211_hdr *hdr,
1407 int left)
1408 {
1409
1410 if (!iwl3945_is_associated(priv) || !priv->ibss_beacon ||
1411 ((priv->iw_mode != NL80211_IFTYPE_ADHOC) &&
1412 (priv->iw_mode != NL80211_IFTYPE_AP)))
1413 return 0;
1414
1415 if (priv->ibss_beacon->len > left)
1416 return 0;
1417
1418 memcpy(hdr, priv->ibss_beacon->data, priv->ibss_beacon->len);
1419
1420 return priv->ibss_beacon->len;
1421 }
1422
1423 static u8 iwl3945_rate_get_lowest_plcp(struct iwl3945_priv *priv)
1424 {
1425 u8 i;
1426 int rate_mask;
1427
1428 /* Set rate mask*/
1429 if (priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK)
1430 rate_mask = priv->active_rate_basic & IWL_CCK_RATES_MASK;
1431 else
1432 rate_mask = priv->active_rate_basic & IWL_OFDM_RATES_MASK;
1433
1434 for (i = IWL_RATE_1M_INDEX; i != IWL_RATE_INVALID;
1435 i = iwl3945_rates[i].next_ieee) {
1436 if (rate_mask & (1 << i))
1437 return iwl3945_rates[i].plcp;
1438 }
1439
1440 /* No valid rate was found. Assign the lowest one */
1441 if (priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK)
1442 return IWL_RATE_1M_PLCP;
1443 else
1444 return IWL_RATE_6M_PLCP;
1445 }
1446
1447 static int iwl3945_send_beacon_cmd(struct iwl3945_priv *priv)
1448 {
1449 struct iwl3945_frame *frame;
1450 unsigned int frame_size;
1451 int rc;
1452 u8 rate;
1453
1454 frame = iwl3945_get_free_frame(priv);
1455
1456 if (!frame) {
1457 IWL_ERROR("Could not obtain free frame buffer for beacon "
1458 "command.\n");
1459 return -ENOMEM;
1460 }
1461
1462 rate = iwl3945_rate_get_lowest_plcp(priv);
1463
1464 frame_size = iwl3945_hw_get_beacon_cmd(priv, frame, rate);
1465
1466 rc = iwl3945_send_cmd_pdu(priv, REPLY_TX_BEACON, frame_size,
1467 &frame->u.cmd[0]);
1468
1469 iwl3945_free_frame(priv, frame);
1470
1471 return rc;
1472 }
1473
1474 /******************************************************************************
1475 *
1476 * EEPROM related functions
1477 *
1478 ******************************************************************************/
1479
1480 static void get_eeprom_mac(struct iwl3945_priv *priv, u8 *mac)
1481 {
1482 memcpy(mac, priv->eeprom.mac_address, 6);
1483 }
1484
1485 /*
1486 * Clear the OWNER_MSK, to establish driver (instead of uCode running on
1487 * embedded controller) as EEPROM reader; each read is a series of pulses
1488 * to/from the EEPROM chip, not a single event, so even reads could conflict
1489 * if they weren't arbitrated by some ownership mechanism. Here, the driver
1490 * simply claims ownership, which should be safe when this function is called
1491 * (i.e. before loading uCode!).
1492 */
1493 static inline int iwl3945_eeprom_acquire_semaphore(struct iwl3945_priv *priv)
1494 {
1495 _iwl3945_clear_bit(priv, CSR_EEPROM_GP, CSR_EEPROM_GP_IF_OWNER_MSK);
1496 return 0;
1497 }
1498
1499 /**
1500 * iwl3945_eeprom_init - read EEPROM contents
1501 *
1502 * Load the EEPROM contents from adapter into priv->eeprom
1503 *
1504 * NOTE: This routine uses the non-debug IO access functions.
1505 */
1506 int iwl3945_eeprom_init(struct iwl3945_priv *priv)
1507 {
1508 u16 *e = (u16 *)&priv->eeprom;
1509 u32 gp = iwl3945_read32(priv, CSR_EEPROM_GP);
1510 int sz = sizeof(priv->eeprom);
1511 int ret;
1512 u16 addr;
1513
1514 /* The EEPROM structure has several padding buffers within it
1515 * and when adding new EEPROM maps is subject to programmer errors
1516 * which may be very difficult to identify without explicitly
1517 * checking the resulting size of the eeprom map. */
1518 BUILD_BUG_ON(sizeof(priv->eeprom) != IWL_EEPROM_IMAGE_SIZE);
1519
1520 if ((gp & CSR_EEPROM_GP_VALID_MSK) == CSR_EEPROM_GP_BAD_SIGNATURE) {
1521 IWL_ERROR("EEPROM not found, EEPROM_GP=0x%08x\n", gp);
1522 return -ENOENT;
1523 }
1524
1525 /* Make sure driver (instead of uCode) is allowed to read EEPROM */
1526 ret = iwl3945_eeprom_acquire_semaphore(priv);
1527 if (ret < 0) {
1528 IWL_ERROR("Failed to acquire EEPROM semaphore.\n");
1529 return -ENOENT;
1530 }
1531
1532 /* eeprom is an array of 16bit values */
1533 for (addr = 0; addr < sz; addr += sizeof(u16)) {
1534 u32 r;
1535
1536 _iwl3945_write32(priv, CSR_EEPROM_REG,
1537 CSR_EEPROM_REG_MSK_ADDR & (addr << 1));
1538 _iwl3945_clear_bit(priv, CSR_EEPROM_REG, CSR_EEPROM_REG_BIT_CMD);
1539 ret = iwl3945_poll_direct_bit(priv, CSR_EEPROM_REG,
1540 CSR_EEPROM_REG_READ_VALID_MSK,
1541 IWL_EEPROM_ACCESS_TIMEOUT);
1542 if (ret < 0) {
1543 IWL_ERROR("Time out reading EEPROM[%d]\n", addr);
1544 return ret;
1545 }
1546
1547 r = _iwl3945_read_direct32(priv, CSR_EEPROM_REG);
1548 e[addr / 2] = le16_to_cpu((__force __le16)(r >> 16));
1549 }
1550
1551 return 0;
1552 }
1553
1554 static void iwl3945_unset_hw_setting(struct iwl3945_priv *priv)
1555 {
1556 if (priv->hw_setting.shared_virt)
1557 pci_free_consistent(priv->pci_dev,
1558 sizeof(struct iwl3945_shared),
1559 priv->hw_setting.shared_virt,
1560 priv->hw_setting.shared_phys);
1561 }
1562
1563 /**
1564 * iwl3945_supported_rate_to_ie - fill in the supported rate in IE field
1565 *
1566 * return : set the bit for each supported rate insert in ie
1567 */
1568 static u16 iwl3945_supported_rate_to_ie(u8 *ie, u16 supported_rate,
1569 u16 basic_rate, int *left)
1570 {
1571 u16 ret_rates = 0, bit;
1572 int i;
1573 u8 *cnt = ie;
1574 u8 *rates = ie + 1;
1575
1576 for (bit = 1, i = 0; i < IWL_RATE_COUNT; i++, bit <<= 1) {
1577 if (bit & supported_rate) {
1578 ret_rates |= bit;
1579 rates[*cnt] = iwl3945_rates[i].ieee |
1580 ((bit & basic_rate) ? 0x80 : 0x00);
1581 (*cnt)++;
1582 (*left)--;
1583 if ((*left <= 0) ||
1584 (*cnt >= IWL_SUPPORTED_RATES_IE_LEN))
1585 break;
1586 }
1587 }
1588
1589 return ret_rates;
1590 }
1591
1592 /**
1593 * iwl3945_fill_probe_req - fill in all required fields and IE for probe request
1594 */
1595 static u16 iwl3945_fill_probe_req(struct iwl3945_priv *priv,
1596 struct ieee80211_mgmt *frame,
1597 int left)
1598 {
1599 int len = 0;
1600 u8 *pos = NULL;
1601 u16 active_rates, ret_rates, cck_rates;
1602
1603 /* Make sure there is enough space for the probe request,
1604 * two mandatory IEs and the data */
1605 left -= 24;
1606 if (left < 0)
1607 return 0;
1608 len += 24;
1609
1610 frame->frame_control = cpu_to_le16(IEEE80211_STYPE_PROBE_REQ);
1611 memcpy(frame->da, iwl3945_broadcast_addr, ETH_ALEN);
1612 memcpy(frame->sa, priv->mac_addr, ETH_ALEN);
1613 memcpy(frame->bssid, iwl3945_broadcast_addr, ETH_ALEN);
1614 frame->seq_ctrl = 0;
1615
1616 /* fill in our indirect SSID IE */
1617 /* ...next IE... */
1618
1619 left -= 2;
1620 if (left < 0)
1621 return 0;
1622 len += 2;
1623 pos = &(frame->u.probe_req.variable[0]);
1624 *pos++ = WLAN_EID_SSID;
1625 *pos++ = 0;
1626
1627 /* fill in supported rate */
1628 /* ...next IE... */
1629 left -= 2;
1630 if (left < 0)
1631 return 0;
1632
1633 /* ... fill it in... */
1634 *pos++ = WLAN_EID_SUPP_RATES;
1635 *pos = 0;
1636
1637 priv->active_rate = priv->rates_mask;
1638 active_rates = priv->active_rate;
1639 priv->active_rate_basic = priv->rates_mask & IWL_BASIC_RATES_MASK;
1640
1641 cck_rates = IWL_CCK_RATES_MASK & active_rates;
1642 ret_rates = iwl3945_supported_rate_to_ie(pos, cck_rates,
1643 priv->active_rate_basic, &left);
1644 active_rates &= ~ret_rates;
1645
1646 ret_rates = iwl3945_supported_rate_to_ie(pos, active_rates,
1647 priv->active_rate_basic, &left);
1648 active_rates &= ~ret_rates;
1649
1650 len += 2 + *pos;
1651 pos += (*pos) + 1;
1652 if (active_rates == 0)
1653 goto fill_end;
1654
1655 /* fill in supported extended rate */
1656 /* ...next IE... */
1657 left -= 2;
1658 if (left < 0)
1659 return 0;
1660 /* ... fill it in... */
1661 *pos++ = WLAN_EID_EXT_SUPP_RATES;
1662 *pos = 0;
1663 iwl3945_supported_rate_to_ie(pos, active_rates,
1664 priv->active_rate_basic, &left);
1665 if (*pos > 0)
1666 len += 2 + *pos;
1667
1668 fill_end:
1669 return (u16)len;
1670 }
1671
1672 /*
1673 * QoS support
1674 */
1675 static int iwl3945_send_qos_params_command(struct iwl3945_priv *priv,
1676 struct iwl_qosparam_cmd *qos)
1677 {
1678
1679 return iwl3945_send_cmd_pdu(priv, REPLY_QOS_PARAM,
1680 sizeof(struct iwl_qosparam_cmd), qos);
1681 }
1682
1683 static void iwl3945_reset_qos(struct iwl3945_priv *priv)
1684 {
1685 u16 cw_min = 15;
1686 u16 cw_max = 1023;
1687 u8 aifs = 2;
1688 u8 is_legacy = 0;
1689 unsigned long flags;
1690 int i;
1691
1692 spin_lock_irqsave(&priv->lock, flags);
1693 priv->qos_data.qos_active = 0;
1694
1695 /* QoS always active in AP and ADHOC mode
1696 * In STA mode wait for association
1697 */
1698 if (priv->iw_mode == NL80211_IFTYPE_ADHOC ||
1699 priv->iw_mode == NL80211_IFTYPE_AP)
1700 priv->qos_data.qos_active = 1;
1701 else
1702 priv->qos_data.qos_active = 0;
1703
1704
1705 /* check for legacy mode */
1706 if ((priv->iw_mode == NL80211_IFTYPE_ADHOC &&
1707 (priv->active_rate & IWL_OFDM_RATES_MASK) == 0) ||
1708 (priv->iw_mode == NL80211_IFTYPE_STATION &&
1709 (priv->staging_rxon.flags & RXON_FLG_SHORT_SLOT_MSK) == 0)) {
1710 cw_min = 31;
1711 is_legacy = 1;
1712 }
1713
1714 if (priv->qos_data.qos_active)
1715 aifs = 3;
1716
1717 priv->qos_data.def_qos_parm.ac[0].cw_min = cpu_to_le16(cw_min);
1718 priv->qos_data.def_qos_parm.ac[0].cw_max = cpu_to_le16(cw_max);
1719 priv->qos_data.def_qos_parm.ac[0].aifsn = aifs;
1720 priv->qos_data.def_qos_parm.ac[0].edca_txop = 0;
1721 priv->qos_data.def_qos_parm.ac[0].reserved1 = 0;
1722
1723 if (priv->qos_data.qos_active) {
1724 i = 1;
1725 priv->qos_data.def_qos_parm.ac[i].cw_min = cpu_to_le16(cw_min);
1726 priv->qos_data.def_qos_parm.ac[i].cw_max = cpu_to_le16(cw_max);
1727 priv->qos_data.def_qos_parm.ac[i].aifsn = 7;
1728 priv->qos_data.def_qos_parm.ac[i].edca_txop = 0;
1729 priv->qos_data.def_qos_parm.ac[i].reserved1 = 0;
1730
1731 i = 2;
1732 priv->qos_data.def_qos_parm.ac[i].cw_min =
1733 cpu_to_le16((cw_min + 1) / 2 - 1);
1734 priv->qos_data.def_qos_parm.ac[i].cw_max =
1735 cpu_to_le16(cw_max);
1736 priv->qos_data.def_qos_parm.ac[i].aifsn = 2;
1737 if (is_legacy)
1738 priv->qos_data.def_qos_parm.ac[i].edca_txop =
1739 cpu_to_le16(6016);
1740 else
1741 priv->qos_data.def_qos_parm.ac[i].edca_txop =
1742 cpu_to_le16(3008);
1743 priv->qos_data.def_qos_parm.ac[i].reserved1 = 0;
1744
1745 i = 3;
1746 priv->qos_data.def_qos_parm.ac[i].cw_min =
1747 cpu_to_le16((cw_min + 1) / 4 - 1);
1748 priv->qos_data.def_qos_parm.ac[i].cw_max =
1749 cpu_to_le16((cw_max + 1) / 2 - 1);
1750 priv->qos_data.def_qos_parm.ac[i].aifsn = 2;
1751 priv->qos_data.def_qos_parm.ac[i].reserved1 = 0;
1752 if (is_legacy)
1753 priv->qos_data.def_qos_parm.ac[i].edca_txop =
1754 cpu_to_le16(3264);
1755 else
1756 priv->qos_data.def_qos_parm.ac[i].edca_txop =
1757 cpu_to_le16(1504);
1758 } else {
1759 for (i = 1; i < 4; i++) {
1760 priv->qos_data.def_qos_parm.ac[i].cw_min =
1761 cpu_to_le16(cw_min);
1762 priv->qos_data.def_qos_parm.ac[i].cw_max =
1763 cpu_to_le16(cw_max);
1764 priv->qos_data.def_qos_parm.ac[i].aifsn = aifs;
1765 priv->qos_data.def_qos_parm.ac[i].edca_txop = 0;
1766 priv->qos_data.def_qos_parm.ac[i].reserved1 = 0;
1767 }
1768 }
1769 IWL_DEBUG_QOS("set QoS to default \n");
1770
1771 spin_unlock_irqrestore(&priv->lock, flags);
1772 }
1773
1774 static void iwl3945_activate_qos(struct iwl3945_priv *priv, u8 force)
1775 {
1776 unsigned long flags;
1777
1778 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
1779 return;
1780
1781 spin_lock_irqsave(&priv->lock, flags);
1782 priv->qos_data.def_qos_parm.qos_flags = 0;
1783
1784 if (priv->qos_data.qos_cap.q_AP.queue_request &&
1785 !priv->qos_data.qos_cap.q_AP.txop_request)
1786 priv->qos_data.def_qos_parm.qos_flags |=
1787 QOS_PARAM_FLG_TXOP_TYPE_MSK;
1788
1789 if (priv->qos_data.qos_active)
1790 priv->qos_data.def_qos_parm.qos_flags |=
1791 QOS_PARAM_FLG_UPDATE_EDCA_MSK;
1792
1793 spin_unlock_irqrestore(&priv->lock, flags);
1794
1795 if (force || iwl3945_is_associated(priv)) {
1796 IWL_DEBUG_QOS("send QoS cmd with QoS active %d \n",
1797 priv->qos_data.qos_active);
1798
1799 iwl3945_send_qos_params_command(priv,
1800 &(priv->qos_data.def_qos_parm));
1801 }
1802 }
1803
1804 /*
1805 * Power management (not Tx power!) functions
1806 */
1807 #define MSEC_TO_USEC 1024
1808
1809
1810 #define NOSLP __constant_cpu_to_le16(0), 0, 0
1811 #define SLP IWL_POWER_DRIVER_ALLOW_SLEEP_MSK, 0, 0
1812 #define SLP_TIMEOUT(T) __constant_cpu_to_le32((T) * MSEC_TO_USEC)
1813 #define SLP_VEC(X0, X1, X2, X3, X4) {__constant_cpu_to_le32(X0), \
1814 __constant_cpu_to_le32(X1), \
1815 __constant_cpu_to_le32(X2), \
1816 __constant_cpu_to_le32(X3), \
1817 __constant_cpu_to_le32(X4)}
1818
1819 /* default power management (not Tx power) table values */
1820 /* for TIM 0-10 */
1821 static struct iwl3945_power_vec_entry range_0[IWL_POWER_AC] = {
1822 {{NOSLP, SLP_TIMEOUT(0), SLP_TIMEOUT(0), SLP_VEC(0, 0, 0, 0, 0)}, 0},
1823 {{SLP, SLP_TIMEOUT(200), SLP_TIMEOUT(500), SLP_VEC(1, 2, 3, 4, 4)}, 0},
1824 {{SLP, SLP_TIMEOUT(200), SLP_TIMEOUT(300), SLP_VEC(2, 4, 6, 7, 7)}, 0},
1825 {{SLP, SLP_TIMEOUT(50), SLP_TIMEOUT(100), SLP_VEC(2, 6, 9, 9, 10)}, 0},
1826 {{SLP, SLP_TIMEOUT(50), SLP_TIMEOUT(25), SLP_VEC(2, 7, 9, 9, 10)}, 1},
1827 {{SLP, SLP_TIMEOUT(25), SLP_TIMEOUT(25), SLP_VEC(4, 7, 10, 10, 10)}, 1}
1828 };
1829
1830 /* for TIM > 10 */
1831 static struct iwl3945_power_vec_entry range_1[IWL_POWER_AC] = {
1832 {{NOSLP, SLP_TIMEOUT(0), SLP_TIMEOUT(0), SLP_VEC(0, 0, 0, 0, 0)}, 0},
1833 {{SLP, SLP_TIMEOUT(200), SLP_TIMEOUT(500),
1834 SLP_VEC(1, 2, 3, 4, 0xFF)}, 0},
1835 {{SLP, SLP_TIMEOUT(200), SLP_TIMEOUT(300),
1836 SLP_VEC(2, 4, 6, 7, 0xFF)}, 0},
1837 {{SLP, SLP_TIMEOUT(50), SLP_TIMEOUT(100),
1838 SLP_VEC(2, 6, 9, 9, 0xFF)}, 0},
1839 {{SLP, SLP_TIMEOUT(50), SLP_TIMEOUT(25), SLP_VEC(2, 7, 9, 9, 0xFF)}, 0},
1840 {{SLP, SLP_TIMEOUT(25), SLP_TIMEOUT(25),
1841 SLP_VEC(4, 7, 10, 10, 0xFF)}, 0}
1842 };
1843
1844 int iwl3945_power_init_handle(struct iwl3945_priv *priv)
1845 {
1846 int rc = 0, i;
1847 struct iwl3945_power_mgr *pow_data;
1848 int size = sizeof(struct iwl3945_power_vec_entry) * IWL_POWER_AC;
1849 u16 pci_pm;
1850
1851 IWL_DEBUG_POWER("Initialize power \n");
1852
1853 pow_data = &(priv->power_data);
1854
1855 memset(pow_data, 0, sizeof(*pow_data));
1856
1857 pow_data->active_index = IWL_POWER_RANGE_0;
1858 pow_data->dtim_val = 0xffff;
1859
1860 memcpy(&pow_data->pwr_range_0[0], &range_0[0], size);
1861 memcpy(&pow_data->pwr_range_1[0], &range_1[0], size);
1862
1863 rc = pci_read_config_word(priv->pci_dev, PCI_LINK_CTRL, &pci_pm);
1864 if (rc != 0)
1865 return 0;
1866 else {
1867 struct iwl_powertable_cmd *cmd;
1868
1869 IWL_DEBUG_POWER("adjust power command flags\n");
1870
1871 for (i = 0; i < IWL_POWER_AC; i++) {
1872 cmd = &pow_data->pwr_range_0[i].cmd;
1873
1874 if (pci_pm & 0x1)
1875 cmd->flags &= ~IWL_POWER_PCI_PM_MSK;
1876 else
1877 cmd->flags |= IWL_POWER_PCI_PM_MSK;
1878 }
1879 }
1880 return rc;
1881 }
1882
1883 static int iwl3945_update_power_cmd(struct iwl3945_priv *priv,
1884 struct iwl_powertable_cmd *cmd, u32 mode)
1885 {
1886 int rc = 0, i;
1887 u8 skip;
1888 u32 max_sleep = 0;
1889 struct iwl3945_power_vec_entry *range;
1890 u8 period = 0;
1891 struct iwl3945_power_mgr *pow_data;
1892
1893 if (mode > IWL_POWER_INDEX_5) {
1894 IWL_DEBUG_POWER("Error invalid power mode \n");
1895 return -1;
1896 }
1897 pow_data = &(priv->power_data);
1898
1899 if (pow_data->active_index == IWL_POWER_RANGE_0)
1900 range = &pow_data->pwr_range_0[0];
1901 else
1902 range = &pow_data->pwr_range_1[1];
1903
1904 memcpy(cmd, &range[mode].cmd, sizeof(struct iwl3945_powertable_cmd));
1905
1906 #ifdef IWL_MAC80211_DISABLE
1907 if (priv->assoc_network != NULL) {
1908 unsigned long flags;
1909
1910 period = priv->assoc_network->tim.tim_period;
1911 }
1912 #endif /*IWL_MAC80211_DISABLE */
1913 skip = range[mode].no_dtim;
1914
1915 if (period == 0) {
1916 period = 1;
1917 skip = 0;
1918 }
1919
1920 if (skip == 0) {
1921 max_sleep = period;
1922 cmd->flags &= ~IWL_POWER_SLEEP_OVER_DTIM_MSK;
1923 } else {
1924 __le32 slp_itrvl = cmd->sleep_interval[IWL_POWER_VEC_SIZE - 1];
1925 max_sleep = (le32_to_cpu(slp_itrvl) / period) * period;
1926 cmd->flags |= IWL_POWER_SLEEP_OVER_DTIM_MSK;
1927 }
1928
1929 for (i = 0; i < IWL_POWER_VEC_SIZE; i++) {
1930 if (le32_to_cpu(cmd->sleep_interval[i]) > max_sleep)
1931 cmd->sleep_interval[i] = cpu_to_le32(max_sleep);
1932 }
1933
1934 IWL_DEBUG_POWER("Flags value = 0x%08X\n", cmd->flags);
1935 IWL_DEBUG_POWER("Tx timeout = %u\n", le32_to_cpu(cmd->tx_data_timeout));
1936 IWL_DEBUG_POWER("Rx timeout = %u\n", le32_to_cpu(cmd->rx_data_timeout));
1937 IWL_DEBUG_POWER("Sleep interval vector = { %d , %d , %d , %d , %d }\n",
1938 le32_to_cpu(cmd->sleep_interval[0]),
1939 le32_to_cpu(cmd->sleep_interval[1]),
1940 le32_to_cpu(cmd->sleep_interval[2]),
1941 le32_to_cpu(cmd->sleep_interval[3]),
1942 le32_to_cpu(cmd->sleep_interval[4]));
1943
1944 return rc;
1945 }
1946
1947 static int iwl3945_send_power_mode(struct iwl3945_priv *priv, u32 mode)
1948 {
1949 u32 uninitialized_var(final_mode);
1950 int rc;
1951 struct iwl_powertable_cmd cmd;
1952
1953 /* If on battery, set to 3,
1954 * if plugged into AC power, set to CAM ("continuously aware mode"),
1955 * else user level */
1956 switch (mode) {
1957 case IWL_POWER_BATTERY:
1958 final_mode = IWL_POWER_INDEX_3;
1959 break;
1960 case IWL_POWER_AC:
1961 final_mode = IWL_POWER_MODE_CAM;
1962 break;
1963 default:
1964 final_mode = mode;
1965 break;
1966 }
1967
1968 iwl3945_update_power_cmd(priv, &cmd, final_mode);
1969
1970 /* FIXME use get_hcmd_size 3945 command is 4 bytes shorter */
1971 rc = iwl3945_send_cmd_pdu(priv, POWER_TABLE_CMD,
1972 sizeof(struct iwl3945_powertable_cmd), &cmd);
1973
1974 if (final_mode == IWL_POWER_MODE_CAM)
1975 clear_bit(STATUS_POWER_PMI, &priv->status);
1976 else
1977 set_bit(STATUS_POWER_PMI, &priv->status);
1978
1979 return rc;
1980 }
1981
1982 /**
1983 * iwl3945_scan_cancel - Cancel any currently executing HW scan
1984 *
1985 * NOTE: priv->mutex is not required before calling this function
1986 */
1987 static int iwl3945_scan_cancel(struct iwl3945_priv *priv)
1988 {
1989 if (!test_bit(STATUS_SCAN_HW, &priv->status)) {
1990 clear_bit(STATUS_SCANNING, &priv->status);
1991 return 0;
1992 }
1993
1994 if (test_bit(STATUS_SCANNING, &priv->status)) {
1995 if (!test_bit(STATUS_SCAN_ABORTING, &priv->status)) {
1996 IWL_DEBUG_SCAN("Queuing scan abort.\n");
1997 set_bit(STATUS_SCAN_ABORTING, &priv->status);
1998 queue_work(priv->workqueue, &priv->abort_scan);
1999
2000 } else
2001 IWL_DEBUG_SCAN("Scan abort already in progress.\n");
2002
2003 return test_bit(STATUS_SCANNING, &priv->status);
2004 }
2005
2006 return 0;
2007 }
2008
2009 /**
2010 * iwl3945_scan_cancel_timeout - Cancel any currently executing HW scan
2011 * @ms: amount of time to wait (in milliseconds) for scan to abort
2012 *
2013 * NOTE: priv->mutex must be held before calling this function
2014 */
2015 static int iwl3945_scan_cancel_timeout(struct iwl3945_priv *priv, unsigned long ms)
2016 {
2017 unsigned long now = jiffies;
2018 int ret;
2019
2020 ret = iwl3945_scan_cancel(priv);
2021 if (ret && ms) {
2022 mutex_unlock(&priv->mutex);
2023 while (!time_after(jiffies, now + msecs_to_jiffies(ms)) &&
2024 test_bit(STATUS_SCANNING, &priv->status))
2025 msleep(1);
2026 mutex_lock(&priv->mutex);
2027
2028 return test_bit(STATUS_SCANNING, &priv->status);
2029 }
2030
2031 return ret;
2032 }
2033
2034 #define MAX_UCODE_BEACON_INTERVAL 1024
2035 #define INTEL_CONN_LISTEN_INTERVAL __constant_cpu_to_le16(0xA)
2036
2037 static __le16 iwl3945_adjust_beacon_interval(u16 beacon_val)
2038 {
2039 u16 new_val = 0;
2040 u16 beacon_factor = 0;
2041
2042 beacon_factor =
2043 (beacon_val + MAX_UCODE_BEACON_INTERVAL)
2044 / MAX_UCODE_BEACON_INTERVAL;
2045 new_val = beacon_val / beacon_factor;
2046
2047 return cpu_to_le16(new_val);
2048 }
2049
2050 static void iwl3945_setup_rxon_timing(struct iwl3945_priv *priv)
2051 {
2052 u64 interval_tm_unit;
2053 u64 tsf, result;
2054 unsigned long flags;
2055 struct ieee80211_conf *conf = NULL;
2056 u16 beacon_int = 0;
2057
2058 conf = ieee80211_get_hw_conf(priv->hw);
2059
2060 spin_lock_irqsave(&priv->lock, flags);
2061 priv->rxon_timing.timestamp = cpu_to_le64(priv->timestamp);
2062 priv->rxon_timing.listen_interval = INTEL_CONN_LISTEN_INTERVAL;
2063
2064 tsf = priv->timestamp;
2065
2066 beacon_int = priv->beacon_int;
2067 spin_unlock_irqrestore(&priv->lock, flags);
2068
2069 if (priv->iw_mode == NL80211_IFTYPE_STATION) {
2070 if (beacon_int == 0) {
2071 priv->rxon_timing.beacon_interval = cpu_to_le16(100);
2072 priv->rxon_timing.beacon_init_val = cpu_to_le32(102400);
2073 } else {
2074 priv->rxon_timing.beacon_interval =
2075 cpu_to_le16(beacon_int);
2076 priv->rxon_timing.beacon_interval =
2077 iwl3945_adjust_beacon_interval(
2078 le16_to_cpu(priv->rxon_timing.beacon_interval));
2079 }
2080
2081 priv->rxon_timing.atim_window = 0;
2082 } else {
2083 priv->rxon_timing.beacon_interval =
2084 iwl3945_adjust_beacon_interval(conf->beacon_int);
2085 /* TODO: we need to get atim_window from upper stack
2086 * for now we set to 0 */
2087 priv->rxon_timing.atim_window = 0;
2088 }
2089
2090 interval_tm_unit =
2091 (le16_to_cpu(priv->rxon_timing.beacon_interval) * 1024);
2092 result = do_div(tsf, interval_tm_unit);
2093 priv->rxon_timing.beacon_init_val =
2094 cpu_to_le32((u32) ((u64) interval_tm_unit - result));
2095
2096 IWL_DEBUG_ASSOC
2097 ("beacon interval %d beacon timer %d beacon tim %d\n",
2098 le16_to_cpu(priv->rxon_timing.beacon_interval),
2099 le32_to_cpu(priv->rxon_timing.beacon_init_val),
2100 le16_to_cpu(priv->rxon_timing.atim_window));
2101 }
2102
2103 static int iwl3945_scan_initiate(struct iwl3945_priv *priv)
2104 {
2105 if (!iwl3945_is_ready_rf(priv)) {
2106 IWL_DEBUG_SCAN("Aborting scan due to not ready.\n");
2107 return -EIO;
2108 }
2109
2110 if (test_bit(STATUS_SCANNING, &priv->status)) {
2111 IWL_DEBUG_SCAN("Scan already in progress.\n");
2112 return -EAGAIN;
2113 }
2114
2115 if (test_bit(STATUS_SCAN_ABORTING, &priv->status)) {
2116 IWL_DEBUG_SCAN("Scan request while abort pending. "
2117 "Queuing.\n");
2118 return -EAGAIN;
2119 }
2120
2121 IWL_DEBUG_INFO("Starting scan...\n");
2122 if (priv->cfg->sku & IWL_SKU_G)
2123 priv->scan_bands |= BIT(IEEE80211_BAND_2GHZ);
2124 if (priv->cfg->sku & IWL_SKU_A)
2125 priv->scan_bands |= BIT(IEEE80211_BAND_5GHZ);
2126 set_bit(STATUS_SCANNING, &priv->status);
2127 priv->scan_start = jiffies;
2128 priv->scan_pass_start = priv->scan_start;
2129
2130 queue_work(priv->workqueue, &priv->request_scan);
2131
2132 return 0;
2133 }
2134
2135 static int iwl3945_set_rxon_hwcrypto(struct iwl3945_priv *priv, int hw_decrypt)
2136 {
2137 struct iwl3945_rxon_cmd *rxon = &priv->staging_rxon;
2138
2139 if (hw_decrypt)
2140 rxon->filter_flags &= ~RXON_FILTER_DIS_DECRYPT_MSK;
2141 else
2142 rxon->filter_flags |= RXON_FILTER_DIS_DECRYPT_MSK;
2143
2144 return 0;
2145 }
2146
2147 static void iwl3945_set_flags_for_phymode(struct iwl3945_priv *priv,
2148 enum ieee80211_band band)
2149 {
2150 if (band == IEEE80211_BAND_5GHZ) {
2151 priv->staging_rxon.flags &=
2152 ~(RXON_FLG_BAND_24G_MSK | RXON_FLG_AUTO_DETECT_MSK
2153 | RXON_FLG_CCK_MSK);
2154 priv->staging_rxon.flags |= RXON_FLG_SHORT_SLOT_MSK;
2155 } else {
2156 /* Copied from iwl3945_bg_post_associate() */
2157 if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_SLOT_TIME)
2158 priv->staging_rxon.flags |= RXON_FLG_SHORT_SLOT_MSK;
2159 else
2160 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
2161
2162 if (priv->iw_mode == NL80211_IFTYPE_ADHOC)
2163 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
2164
2165 priv->staging_rxon.flags |= RXON_FLG_BAND_24G_MSK;
2166 priv->staging_rxon.flags |= RXON_FLG_AUTO_DETECT_MSK;
2167 priv->staging_rxon.flags &= ~RXON_FLG_CCK_MSK;
2168 }
2169 }
2170
2171 /*
2172 * initialize rxon structure with default values from eeprom
2173 */
2174 static void iwl3945_connection_init_rx_config(struct iwl3945_priv *priv,
2175 int mode)
2176 {
2177 const struct iwl3945_channel_info *ch_info;
2178
2179 memset(&priv->staging_rxon, 0, sizeof(priv->staging_rxon));
2180
2181 switch (mode) {
2182 case NL80211_IFTYPE_AP:
2183 priv->staging_rxon.dev_type = RXON_DEV_TYPE_AP;
2184 break;
2185
2186 case NL80211_IFTYPE_STATION:
2187 priv->staging_rxon.dev_type = RXON_DEV_TYPE_ESS;
2188 priv->staging_rxon.filter_flags = RXON_FILTER_ACCEPT_GRP_MSK;
2189 break;
2190
2191 case NL80211_IFTYPE_ADHOC:
2192 priv->staging_rxon.dev_type = RXON_DEV_TYPE_IBSS;
2193 priv->staging_rxon.flags = RXON_FLG_SHORT_PREAMBLE_MSK;
2194 priv->staging_rxon.filter_flags = RXON_FILTER_BCON_AWARE_MSK |
2195 RXON_FILTER_ACCEPT_GRP_MSK;
2196 break;
2197
2198 case NL80211_IFTYPE_MONITOR:
2199 priv->staging_rxon.dev_type = RXON_DEV_TYPE_SNIFFER;
2200 priv->staging_rxon.filter_flags = RXON_FILTER_PROMISC_MSK |
2201 RXON_FILTER_CTL2HOST_MSK | RXON_FILTER_ACCEPT_GRP_MSK;
2202 break;
2203 default:
2204 IWL_ERROR("Unsupported interface type %d\n", mode);
2205 break;
2206 }
2207
2208 #if 0
2209 /* TODO: Figure out when short_preamble would be set and cache from
2210 * that */
2211 if (!hw_to_local(priv->hw)->short_preamble)
2212 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
2213 else
2214 priv->staging_rxon.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
2215 #endif
2216
2217 ch_info = iwl3945_get_channel_info(priv, priv->band,
2218 le16_to_cpu(priv->active_rxon.channel));
2219
2220 if (!ch_info)
2221 ch_info = &priv->channel_info[0];
2222
2223 /*
2224 * in some case A channels are all non IBSS
2225 * in this case force B/G channel
2226 */
2227 if ((mode == NL80211_IFTYPE_ADHOC) && !(is_channel_ibss(ch_info)))
2228 ch_info = &priv->channel_info[0];
2229
2230 priv->staging_rxon.channel = cpu_to_le16(ch_info->channel);
2231 if (is_channel_a_band(ch_info))
2232 priv->band = IEEE80211_BAND_5GHZ;
2233 else
2234 priv->band = IEEE80211_BAND_2GHZ;
2235
2236 iwl3945_set_flags_for_phymode(priv, priv->band);
2237
2238 priv->staging_rxon.ofdm_basic_rates =
2239 (IWL_OFDM_RATES_MASK >> IWL_FIRST_OFDM_RATE) & 0xFF;
2240 priv->staging_rxon.cck_basic_rates =
2241 (IWL_CCK_RATES_MASK >> IWL_FIRST_CCK_RATE) & 0xF;
2242 }
2243
2244 static int iwl3945_set_mode(struct iwl3945_priv *priv, int mode)
2245 {
2246 if (mode == NL80211_IFTYPE_ADHOC) {
2247 const struct iwl3945_channel_info *ch_info;
2248
2249 ch_info = iwl3945_get_channel_info(priv,
2250 priv->band,
2251 le16_to_cpu(priv->staging_rxon.channel));
2252
2253 if (!ch_info || !is_channel_ibss(ch_info)) {
2254 IWL_ERROR("channel %d not IBSS channel\n",
2255 le16_to_cpu(priv->staging_rxon.channel));
2256 return -EINVAL;
2257 }
2258 }
2259
2260 iwl3945_connection_init_rx_config(priv, mode);
2261 memcpy(priv->staging_rxon.node_addr, priv->mac_addr, ETH_ALEN);
2262
2263 iwl3945_clear_stations_table(priv);
2264
2265 /* don't commit rxon if rf-kill is on*/
2266 if (!iwl3945_is_ready_rf(priv))
2267 return -EAGAIN;
2268
2269 cancel_delayed_work(&priv->scan_check);
2270 if (iwl3945_scan_cancel_timeout(priv, 100)) {
2271 IWL_WARNING("Aborted scan still in progress after 100ms\n");
2272 IWL_DEBUG_MAC80211("leaving - scan abort failed.\n");
2273 return -EAGAIN;
2274 }
2275
2276 iwl3945_commit_rxon(priv);
2277
2278 return 0;
2279 }
2280
2281 static void iwl3945_build_tx_cmd_hwcrypto(struct iwl3945_priv *priv,
2282 struct ieee80211_tx_info *info,
2283 struct iwl3945_cmd *cmd,
2284 struct sk_buff *skb_frag,
2285 int last_frag)
2286 {
2287 struct iwl3945_hw_key *keyinfo =
2288 &priv->stations[info->control.hw_key->hw_key_idx].keyinfo;
2289
2290 switch (keyinfo->alg) {
2291 case ALG_CCMP:
2292 cmd->cmd.tx.sec_ctl = TX_CMD_SEC_CCM;
2293 memcpy(cmd->cmd.tx.key, keyinfo->key, keyinfo->keylen);
2294 IWL_DEBUG_TX("tx_cmd with AES hwcrypto\n");
2295 break;
2296
2297 case ALG_TKIP:
2298 #if 0
2299 cmd->cmd.tx.sec_ctl = TX_CMD_SEC_TKIP;
2300
2301 if (last_frag)
2302 memcpy(cmd->cmd.tx.tkip_mic.byte, skb_frag->tail - 8,
2303 8);
2304 else
2305 memset(cmd->cmd.tx.tkip_mic.byte, 0, 8);
2306 #endif
2307 break;
2308
2309 case ALG_WEP:
2310 cmd->cmd.tx.sec_ctl = TX_CMD_SEC_WEP |
2311 (info->control.hw_key->hw_key_idx & TX_CMD_SEC_MSK) << TX_CMD_SEC_SHIFT;
2312
2313 if (keyinfo->keylen == 13)
2314 cmd->cmd.tx.sec_ctl |= TX_CMD_SEC_KEY128;
2315
2316 memcpy(&cmd->cmd.tx.key[3], keyinfo->key, keyinfo->keylen);
2317
2318 IWL_DEBUG_TX("Configuring packet for WEP encryption "
2319 "with key %d\n", info->control.hw_key->hw_key_idx);
2320 break;
2321
2322 default:
2323 printk(KERN_ERR "Unknown encode alg %d\n", keyinfo->alg);
2324 break;
2325 }
2326 }
2327
2328 /*
2329 * handle build REPLY_TX command notification.
2330 */
2331 static void iwl3945_build_tx_cmd_basic(struct iwl3945_priv *priv,
2332 struct iwl3945_cmd *cmd,
2333 struct ieee80211_tx_info *info,
2334 struct ieee80211_hdr *hdr,
2335 int is_unicast, u8 std_id)
2336 {
2337 __le16 fc = hdr->frame_control;
2338 __le32 tx_flags = cmd->cmd.tx.tx_flags;
2339 u8 rc_flags = info->control.rates[0].flags;
2340
2341 cmd->cmd.tx.stop_time.life_time = TX_CMD_LIFE_TIME_INFINITE;
2342 if (!(info->flags & IEEE80211_TX_CTL_NO_ACK)) {
2343 tx_flags |= TX_CMD_FLG_ACK_MSK;
2344 if (ieee80211_is_mgmt(fc))
2345 tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK;
2346 if (ieee80211_is_probe_resp(fc) &&
2347 !(le16_to_cpu(hdr->seq_ctrl) & 0xf))
2348 tx_flags |= TX_CMD_FLG_TSF_MSK;
2349 } else {
2350 tx_flags &= (~TX_CMD_FLG_ACK_MSK);
2351 tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK;
2352 }
2353
2354 cmd->cmd.tx.sta_id = std_id;
2355 if (ieee80211_has_morefrags(fc))
2356 tx_flags |= TX_CMD_FLG_MORE_FRAG_MSK;
2357
2358 if (ieee80211_is_data_qos(fc)) {
2359 u8 *qc = ieee80211_get_qos_ctl(hdr);
2360 cmd->cmd.tx.tid_tspec = qc[0] & 0xf;
2361 tx_flags &= ~TX_CMD_FLG_SEQ_CTL_MSK;
2362 } else {
2363 tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK;
2364 }
2365
2366 if (rc_flags & IEEE80211_TX_RC_USE_RTS_CTS) {
2367 tx_flags |= TX_CMD_FLG_RTS_MSK;
2368 tx_flags &= ~TX_CMD_FLG_CTS_MSK;
2369 } else if (rc_flags & IEEE80211_TX_RC_USE_CTS_PROTECT) {
2370 tx_flags &= ~TX_CMD_FLG_RTS_MSK;
2371 tx_flags |= TX_CMD_FLG_CTS_MSK;
2372 }
2373
2374 if ((tx_flags & TX_CMD_FLG_RTS_MSK) || (tx_flags & TX_CMD_FLG_CTS_MSK))
2375 tx_flags |= TX_CMD_FLG_FULL_TXOP_PROT_MSK;
2376
2377 tx_flags &= ~(TX_CMD_FLG_ANT_SEL_MSK);
2378 if (ieee80211_is_mgmt(fc)) {
2379 if (ieee80211_is_assoc_req(fc) || ieee80211_is_reassoc_req(fc))
2380 cmd->cmd.tx.timeout.pm_frame_timeout = cpu_to_le16(3);
2381 else
2382 cmd->cmd.tx.timeout.pm_frame_timeout = cpu_to_le16(2);
2383 } else {
2384 cmd->cmd.tx.timeout.pm_frame_timeout = 0;
2385 #ifdef CONFIG_IWL3945_LEDS
2386 priv->rxtxpackets += le16_to_cpu(cmd->cmd.tx.len);
2387 #endif
2388 }
2389
2390 cmd->cmd.tx.driver_txop = 0;
2391 cmd->cmd.tx.tx_flags = tx_flags;
2392 cmd->cmd.tx.next_frame_len = 0;
2393 }
2394
2395 /**
2396 * iwl3945_get_sta_id - Find station's index within station table
2397 */
2398 static int iwl3945_get_sta_id(struct iwl3945_priv *priv, struct ieee80211_hdr *hdr)
2399 {
2400 int sta_id;
2401 u16 fc = le16_to_cpu(hdr->frame_control);
2402
2403 /* If this frame is broadcast or management, use broadcast station id */
2404 if (((fc & IEEE80211_FCTL_FTYPE) != IEEE80211_FTYPE_DATA) ||
2405 is_multicast_ether_addr(hdr->addr1))
2406 return priv->hw_setting.bcast_sta_id;
2407
2408 switch (priv->iw_mode) {
2409
2410 /* If we are a client station in a BSS network, use the special
2411 * AP station entry (that's the only station we communicate with) */
2412 case NL80211_IFTYPE_STATION:
2413 return IWL_AP_ID;
2414
2415 /* If we are an AP, then find the station, or use BCAST */
2416 case NL80211_IFTYPE_AP:
2417 sta_id = iwl3945_hw_find_station(priv, hdr->addr1);
2418 if (sta_id != IWL_INVALID_STATION)
2419 return sta_id;
2420 return priv->hw_setting.bcast_sta_id;
2421
2422 /* If this frame is going out to an IBSS network, find the station,
2423 * or create a new station table entry */
2424 case NL80211_IFTYPE_ADHOC: {
2425 /* Create new station table entry */
2426 sta_id = iwl3945_hw_find_station(priv, hdr->addr1);
2427 if (sta_id != IWL_INVALID_STATION)
2428 return sta_id;
2429
2430 sta_id = iwl3945_add_station(priv, hdr->addr1, 0, CMD_ASYNC);
2431
2432 if (sta_id != IWL_INVALID_STATION)
2433 return sta_id;
2434
2435 IWL_DEBUG_DROP("Station %pM not in station map. "
2436 "Defaulting to broadcast...\n",
2437 hdr->addr1);
2438 iwl3945_print_hex_dump(IWL_DL_DROP, (u8 *) hdr, sizeof(*hdr));
2439 return priv->hw_setting.bcast_sta_id;
2440 }
2441 /* If we are in monitor mode, use BCAST. This is required for
2442 * packet injection. */
2443 case NL80211_IFTYPE_MONITOR:
2444 return priv->hw_setting.bcast_sta_id;
2445
2446 default:
2447 IWL_WARNING("Unknown mode of operation: %d\n", priv->iw_mode);
2448 return priv->hw_setting.bcast_sta_id;
2449 }
2450 }
2451
2452 /*
2453 * start REPLY_TX command process
2454 */
2455 static int iwl3945_tx_skb(struct iwl3945_priv *priv, struct sk_buff *skb)
2456 {
2457 struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data;
2458 struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
2459 struct iwl3945_tfd_frame *tfd;
2460 u32 *control_flags;
2461 int txq_id = skb_get_queue_mapping(skb);
2462 struct iwl3945_tx_queue *txq = NULL;
2463 struct iwl3945_queue *q = NULL;
2464 dma_addr_t phys_addr;
2465 dma_addr_t txcmd_phys;
2466 struct iwl3945_cmd *out_cmd = NULL;
2467 u16 len, idx, len_org, hdr_len;
2468 u8 id;
2469 u8 unicast;
2470 u8 sta_id;
2471 u8 tid = 0;
2472 u16 seq_number = 0;
2473 __le16 fc;
2474 u8 wait_write_ptr = 0;
2475 u8 *qc = NULL;
2476 unsigned long flags;
2477 int rc;
2478
2479 spin_lock_irqsave(&priv->lock, flags);
2480 if (iwl3945_is_rfkill(priv)) {
2481 IWL_DEBUG_DROP("Dropping - RF KILL\n");
2482 goto drop_unlock;
2483 }
2484
2485 if ((ieee80211_get_tx_rate(priv->hw, info)->hw_value & 0xFF) == IWL_INVALID_RATE) {
2486 IWL_ERROR("ERROR: No TX rate available.\n");
2487 goto drop_unlock;
2488 }
2489
2490 unicast = !is_multicast_ether_addr(hdr->addr1);
2491 id = 0;
2492
2493 fc = hdr->frame_control;
2494
2495 #ifdef CONFIG_IWL3945_DEBUG
2496 if (ieee80211_is_auth(fc))
2497 IWL_DEBUG_TX("Sending AUTH frame\n");
2498 else if (ieee80211_is_assoc_req(fc))
2499 IWL_DEBUG_TX("Sending ASSOC frame\n");
2500 else if (ieee80211_is_reassoc_req(fc))
2501 IWL_DEBUG_TX("Sending REASSOC frame\n");
2502 #endif
2503
2504 /* drop all data frame if we are not associated */
2505 if (ieee80211_is_data(fc) &&
2506 (priv->iw_mode != NL80211_IFTYPE_MONITOR) && /* packet injection */
2507 (!iwl3945_is_associated(priv) ||
2508 ((priv->iw_mode == NL80211_IFTYPE_STATION) && !priv->assoc_id))) {
2509 IWL_DEBUG_DROP("Dropping - !iwl3945_is_associated\n");
2510 goto drop_unlock;
2511 }
2512
2513 spin_unlock_irqrestore(&priv->lock, flags);
2514
2515 hdr_len = ieee80211_hdrlen(fc);
2516
2517 /* Find (or create) index into station table for destination station */
2518 sta_id = iwl3945_get_sta_id(priv, hdr);
2519 if (sta_id == IWL_INVALID_STATION) {
2520 IWL_DEBUG_DROP("Dropping - INVALID STATION: %pM\n",
2521 hdr->addr1);
2522 goto drop;
2523 }
2524
2525 IWL_DEBUG_RATE("station Id %d\n", sta_id);
2526
2527 if (ieee80211_is_data_qos(fc)) {
2528 qc = ieee80211_get_qos_ctl(hdr);
2529 tid = qc[0] & IEEE80211_QOS_CTL_TID_MASK;
2530 seq_number = priv->stations[sta_id].tid[tid].seq_number &
2531 IEEE80211_SCTL_SEQ;
2532 hdr->seq_ctrl = cpu_to_le16(seq_number) |
2533 (hdr->seq_ctrl &
2534 __constant_cpu_to_le16(IEEE80211_SCTL_FRAG));
2535 seq_number += 0x10;
2536 }
2537
2538 /* Descriptor for chosen Tx queue */
2539 txq = &priv->txq[txq_id];
2540 q = &txq->q;
2541
2542 spin_lock_irqsave(&priv->lock, flags);
2543
2544 /* Set up first empty TFD within this queue's circular TFD buffer */
2545 tfd = &txq->bd[q->write_ptr];
2546 memset(tfd, 0, sizeof(*tfd));
2547 control_flags = (u32 *) tfd;
2548 idx = get_cmd_index(q, q->write_ptr, 0);
2549
2550 /* Set up driver data for this TFD */
2551 memset(&(txq->txb[q->write_ptr]), 0, sizeof(struct iwl3945_tx_info));
2552 txq->txb[q->write_ptr].skb[0] = skb;
2553
2554 /* Init first empty entry in queue's array of Tx/cmd buffers */
2555 out_cmd = &txq->cmd[idx];
2556 memset(&out_cmd->hdr, 0, sizeof(out_cmd->hdr));
2557 memset(&out_cmd->cmd.tx, 0, sizeof(out_cmd->cmd.tx));
2558
2559 /*
2560 * Set up the Tx-command (not MAC!) header.
2561 * Store the chosen Tx queue and TFD index within the sequence field;
2562 * after Tx, uCode's Tx response will return this value so driver can
2563 * locate the frame within the tx queue and do post-tx processing.
2564 */
2565 out_cmd->hdr.cmd = REPLY_TX;
2566 out_cmd->hdr.sequence = cpu_to_le16((u16)(QUEUE_TO_SEQ(txq_id) |
2567 INDEX_TO_SEQ(q->write_ptr)));
2568
2569 /* Copy MAC header from skb into command buffer */
2570 memcpy(out_cmd->cmd.tx.hdr, hdr, hdr_len);
2571
2572 /*
2573 * Use the first empty entry in this queue's command buffer array
2574 * to contain the Tx command and MAC header concatenated together
2575 * (payload data will be in another buffer).
2576 * Size of this varies, due to varying MAC header length.
2577 * If end is not dword aligned, we'll have 2 extra bytes at the end
2578 * of the MAC header (device reads on dword boundaries).
2579 * We'll tell device about this padding later.
2580 */
2581 len = priv->hw_setting.tx_cmd_len +
2582 sizeof(struct iwl_cmd_header) + hdr_len;
2583
2584 len_org = len;
2585 len = (len + 3) & ~3;
2586
2587 if (len_org != len)
2588 len_org = 1;
2589 else
2590 len_org = 0;
2591
2592 /* Physical address of this Tx command's header (not MAC header!),
2593 * within command buffer array. */
2594 txcmd_phys = txq->dma_addr_cmd + sizeof(struct iwl3945_cmd) * idx +
2595 offsetof(struct iwl3945_cmd, hdr);
2596
2597 /* Add buffer containing Tx command and MAC(!) header to TFD's
2598 * first entry */
2599 iwl3945_hw_txq_attach_buf_to_tfd(priv, tfd, txcmd_phys, len);
2600
2601 if (info->control.hw_key)
2602 iwl3945_build_tx_cmd_hwcrypto(priv, info, out_cmd, skb, 0);
2603
2604 /* Set up TFD's 2nd entry to point directly to remainder of skb,
2605 * if any (802.11 null frames have no payload). */
2606 len = skb->len - hdr_len;
2607 if (len) {
2608 phys_addr = pci_map_single(priv->pci_dev, skb->data + hdr_len,
2609 len, PCI_DMA_TODEVICE);
2610 iwl3945_hw_txq_attach_buf_to_tfd(priv, tfd, phys_addr, len);
2611 }
2612
2613 if (!len)
2614 /* If there is no payload, then we use only one Tx buffer */
2615 *control_flags = TFD_CTL_COUNT_SET(1);
2616 else
2617 /* Else use 2 buffers.
2618 * Tell 3945 about any padding after MAC header */
2619 *control_flags = TFD_CTL_COUNT_SET(2) |
2620 TFD_CTL_PAD_SET(U32_PAD(len));
2621
2622 /* Total # bytes to be transmitted */
2623 len = (u16)skb->len;
2624 out_cmd->cmd.tx.len = cpu_to_le16(len);
2625
2626 /* TODO need this for burst mode later on */
2627 iwl3945_build_tx_cmd_basic(priv, out_cmd, info, hdr, unicast, sta_id);
2628
2629 /* set is_hcca to 0; it probably will never be implemented */
2630 iwl3945_hw_build_tx_cmd_rate(priv, out_cmd, info, hdr, sta_id, 0);
2631
2632 out_cmd->cmd.tx.tx_flags &= ~TX_CMD_FLG_ANT_A_MSK;
2633 out_cmd->cmd.tx.tx_flags &= ~TX_CMD_FLG_ANT_B_MSK;
2634
2635 if (!ieee80211_has_morefrags(hdr->frame_control)) {
2636 txq->need_update = 1;
2637 if (qc)
2638 priv->stations[sta_id].tid[tid].seq_number = seq_number;
2639 } else {
2640 wait_write_ptr = 1;
2641 txq->need_update = 0;
2642 }
2643
2644 iwl3945_print_hex_dump(IWL_DL_TX, out_cmd->cmd.payload,
2645 sizeof(out_cmd->cmd.tx));
2646
2647 iwl3945_print_hex_dump(IWL_DL_TX, (u8 *)out_cmd->cmd.tx.hdr,
2648 ieee80211_hdrlen(fc));
2649
2650 /* Tell device the write index *just past* this latest filled TFD */
2651 q->write_ptr = iwl_queue_inc_wrap(q->write_ptr, q->n_bd);
2652 rc = iwl3945_tx_queue_update_write_ptr(priv, txq);
2653 spin_unlock_irqrestore(&priv->lock, flags);
2654
2655 if (rc)
2656 return rc;
2657
2658 if ((iwl3945_queue_space(q) < q->high_mark)
2659 && priv->mac80211_registered) {
2660 if (wait_write_ptr) {
2661 spin_lock_irqsave(&priv->lock, flags);
2662 txq->need_update = 1;
2663 iwl3945_tx_queue_update_write_ptr(priv, txq);
2664 spin_unlock_irqrestore(&priv->lock, flags);
2665 }
2666
2667 ieee80211_stop_queue(priv->hw, skb_get_queue_mapping(skb));
2668 }
2669
2670 return 0;
2671
2672 drop_unlock:
2673 spin_unlock_irqrestore(&priv->lock, flags);
2674 drop:
2675 return -1;
2676 }
2677
2678 static void iwl3945_set_rate(struct iwl3945_priv *priv)
2679 {
2680 const struct ieee80211_supported_band *sband = NULL;
2681 struct ieee80211_rate *rate;
2682 int i;
2683
2684 sband = iwl3945_get_band(priv, priv->band);
2685 if (!sband) {
2686 IWL_ERROR("Failed to set rate: unable to get hw mode\n");
2687 return;
2688 }
2689
2690 priv->active_rate = 0;
2691 priv->active_rate_basic = 0;
2692
2693 IWL_DEBUG_RATE("Setting rates for %s GHz\n",
2694 sband->band == IEEE80211_BAND_2GHZ ? "2.4" : "5");
2695
2696 for (i = 0; i < sband->n_bitrates; i++) {
2697 rate = &sband->bitrates[i];
2698 if ((rate->hw_value < IWL_RATE_COUNT) &&
2699 !(rate->flags & IEEE80211_CHAN_DISABLED)) {
2700 IWL_DEBUG_RATE("Adding rate index %d (plcp %d)\n",
2701 rate->hw_value, iwl3945_rates[rate->hw_value].plcp);
2702 priv->active_rate |= (1 << rate->hw_value);
2703 }
2704 }
2705
2706 IWL_DEBUG_RATE("Set active_rate = %0x, active_rate_basic = %0x\n",
2707 priv->active_rate, priv->active_rate_basic);
2708
2709 /*
2710 * If a basic rate is configured, then use it (adding IWL_RATE_1M_MASK)
2711 * otherwise set it to the default of all CCK rates and 6, 12, 24 for
2712 * OFDM
2713 */
2714 if (priv->active_rate_basic & IWL_CCK_BASIC_RATES_MASK)
2715 priv->staging_rxon.cck_basic_rates =
2716 ((priv->active_rate_basic &
2717 IWL_CCK_RATES_MASK) >> IWL_FIRST_CCK_RATE) & 0xF;
2718 else
2719 priv->staging_rxon.cck_basic_rates =
2720 (IWL_CCK_BASIC_RATES_MASK >> IWL_FIRST_CCK_RATE) & 0xF;
2721
2722 if (priv->active_rate_basic & IWL_OFDM_BASIC_RATES_MASK)
2723 priv->staging_rxon.ofdm_basic_rates =
2724 ((priv->active_rate_basic &
2725 (IWL_OFDM_BASIC_RATES_MASK | IWL_RATE_6M_MASK)) >>
2726 IWL_FIRST_OFDM_RATE) & 0xFF;
2727 else
2728 priv->staging_rxon.ofdm_basic_rates =
2729 (IWL_OFDM_BASIC_RATES_MASK >> IWL_FIRST_OFDM_RATE) & 0xFF;
2730 }
2731
2732 static void iwl3945_radio_kill_sw(struct iwl3945_priv *priv, int disable_radio)
2733 {
2734 unsigned long flags;
2735
2736 if (!!disable_radio == test_bit(STATUS_RF_KILL_SW, &priv->status))
2737 return;
2738
2739 IWL_DEBUG_RF_KILL("Manual SW RF KILL set to: RADIO %s\n",
2740 disable_radio ? "OFF" : "ON");
2741
2742 if (disable_radio) {
2743 iwl3945_scan_cancel(priv);
2744 /* FIXME: This is a workaround for AP */
2745 if (priv->iw_mode != NL80211_IFTYPE_AP) {
2746 spin_lock_irqsave(&priv->lock, flags);
2747 iwl3945_write32(priv, CSR_UCODE_DRV_GP1_SET,
2748 CSR_UCODE_SW_BIT_RFKILL);
2749 spin_unlock_irqrestore(&priv->lock, flags);
2750 iwl3945_send_card_state(priv, CARD_STATE_CMD_DISABLE, 0);
2751 set_bit(STATUS_RF_KILL_SW, &priv->status);
2752 }
2753 return;
2754 }
2755
2756 spin_lock_irqsave(&priv->lock, flags);
2757 iwl3945_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
2758
2759 clear_bit(STATUS_RF_KILL_SW, &priv->status);
2760 spin_unlock_irqrestore(&priv->lock, flags);
2761
2762 /* wake up ucode */
2763 msleep(10);
2764
2765 spin_lock_irqsave(&priv->lock, flags);
2766 iwl3945_read32(priv, CSR_UCODE_DRV_GP1);
2767 if (!iwl3945_grab_nic_access(priv))
2768 iwl3945_release_nic_access(priv);
2769 spin_unlock_irqrestore(&priv->lock, flags);
2770
2771 if (test_bit(STATUS_RF_KILL_HW, &priv->status)) {
2772 IWL_DEBUG_RF_KILL("Can not turn radio back on - "
2773 "disabled by HW switch\n");
2774 return;
2775 }
2776
2777 if (priv->is_open)
2778 queue_work(priv->workqueue, &priv->restart);
2779 return;
2780 }
2781
2782 void iwl3945_set_decrypted_flag(struct iwl3945_priv *priv, struct sk_buff *skb,
2783 u32 decrypt_res, struct ieee80211_rx_status *stats)
2784 {
2785 u16 fc =
2786 le16_to_cpu(((struct ieee80211_hdr *)skb->data)->frame_control);
2787
2788 if (priv->active_rxon.filter_flags & RXON_FILTER_DIS_DECRYPT_MSK)
2789 return;
2790
2791 if (!(fc & IEEE80211_FCTL_PROTECTED))
2792 return;
2793
2794 IWL_DEBUG_RX("decrypt_res:0x%x\n", decrypt_res);
2795 switch (decrypt_res & RX_RES_STATUS_SEC_TYPE_MSK) {
2796 case RX_RES_STATUS_SEC_TYPE_TKIP:
2797 if ((decrypt_res & RX_RES_STATUS_DECRYPT_TYPE_MSK) ==
2798 RX_RES_STATUS_BAD_ICV_MIC)
2799 stats->flag |= RX_FLAG_MMIC_ERROR;
2800 case RX_RES_STATUS_SEC_TYPE_WEP:
2801 case RX_RES_STATUS_SEC_TYPE_CCMP:
2802 if ((decrypt_res & RX_RES_STATUS_DECRYPT_TYPE_MSK) ==
2803 RX_RES_STATUS_DECRYPT_OK) {
2804 IWL_DEBUG_RX("hw decrypt successfully!!!\n");
2805 stats->flag |= RX_FLAG_DECRYPTED;
2806 }
2807 break;
2808
2809 default:
2810 break;
2811 }
2812 }
2813
2814 #ifdef CONFIG_IWL3945_SPECTRUM_MEASUREMENT
2815
2816 #include "iwl-spectrum.h"
2817
2818 #define BEACON_TIME_MASK_LOW 0x00FFFFFF
2819 #define BEACON_TIME_MASK_HIGH 0xFF000000
2820 #define TIME_UNIT 1024
2821
2822 /*
2823 * extended beacon time format
2824 * time in usec will be changed into a 32-bit value in 8:24 format
2825 * the high 1 byte is the beacon counts
2826 * the lower 3 bytes is the time in usec within one beacon interval
2827 */
2828
2829 static u32 iwl3945_usecs_to_beacons(u32 usec, u32 beacon_interval)
2830 {
2831 u32 quot;
2832 u32 rem;
2833 u32 interval = beacon_interval * 1024;
2834
2835 if (!interval || !usec)
2836 return 0;
2837
2838 quot = (usec / interval) & (BEACON_TIME_MASK_HIGH >> 24);
2839 rem = (usec % interval) & BEACON_TIME_MASK_LOW;
2840
2841 return (quot << 24) + rem;
2842 }
2843
2844 /* base is usually what we get from ucode with each received frame,
2845 * the same as HW timer counter counting down
2846 */
2847
2848 static __le32 iwl3945_add_beacon_time(u32 base, u32 addon, u32 beacon_interval)
2849 {
2850 u32 base_low = base & BEACON_TIME_MASK_LOW;
2851 u32 addon_low = addon & BEACON_TIME_MASK_LOW;
2852 u32 interval = beacon_interval * TIME_UNIT;
2853 u32 res = (base & BEACON_TIME_MASK_HIGH) +
2854 (addon & BEACON_TIME_MASK_HIGH);
2855
2856 if (base_low > addon_low)
2857 res += base_low - addon_low;
2858 else if (base_low < addon_low) {
2859 res += interval + base_low - addon_low;
2860 res += (1 << 24);
2861 } else
2862 res += (1 << 24);
2863
2864 return cpu_to_le32(res);
2865 }
2866
2867 static int iwl3945_get_measurement(struct iwl3945_priv *priv,
2868 struct ieee80211_measurement_params *params,
2869 u8 type)
2870 {
2871 struct iwl_spectrum_cmd spectrum;
2872 struct iwl3945_rx_packet *res;
2873 struct iwl3945_host_cmd cmd = {
2874 .id = REPLY_SPECTRUM_MEASUREMENT_CMD,
2875 .data = (void *)&spectrum,
2876 .meta.flags = CMD_WANT_SKB,
2877 };
2878 u32 add_time = le64_to_cpu(params->start_time);
2879 int rc;
2880 int spectrum_resp_status;
2881 int duration = le16_to_cpu(params->duration);
2882
2883 if (iwl3945_is_associated(priv))
2884 add_time =
2885 iwl3945_usecs_to_beacons(
2886 le64_to_cpu(params->start_time) - priv->last_tsf,
2887 le16_to_cpu(priv->rxon_timing.beacon_interval));
2888
2889 memset(&spectrum, 0, sizeof(spectrum));
2890
2891 spectrum.channel_count = cpu_to_le16(1);
2892 spectrum.flags =
2893 RXON_FLG_TSF2HOST_MSK | RXON_FLG_ANT_A_MSK | RXON_FLG_DIS_DIV_MSK;
2894 spectrum.filter_flags = MEASUREMENT_FILTER_FLAG;
2895 cmd.len = sizeof(spectrum);
2896 spectrum.len = cpu_to_le16(cmd.len - sizeof(spectrum.len));
2897
2898 if (iwl3945_is_associated(priv))
2899 spectrum.start_time =
2900 iwl3945_add_beacon_time(priv->last_beacon_time,
2901 add_time,
2902 le16_to_cpu(priv->rxon_timing.beacon_interval));
2903 else
2904 spectrum.start_time = 0;
2905
2906 spectrum.channels[0].duration = cpu_to_le32(duration * TIME_UNIT);
2907 spectrum.channels[0].channel = params->channel;
2908 spectrum.channels[0].type = type;
2909 if (priv->active_rxon.flags & RXON_FLG_BAND_24G_MSK)
2910 spectrum.flags |= RXON_FLG_BAND_24G_MSK |
2911 RXON_FLG_AUTO_DETECT_MSK | RXON_FLG_TGG_PROTECT_MSK;
2912
2913 rc = iwl3945_send_cmd_sync(priv, &cmd);
2914 if (rc)
2915 return rc;
2916
2917 res = (struct iwl3945_rx_packet *)cmd.meta.u.skb->data;
2918 if (res->hdr.flags & IWL_CMD_FAILED_MSK) {
2919 IWL_ERROR("Bad return from REPLY_RX_ON_ASSOC command\n");
2920 rc = -EIO;
2921 }
2922
2923 spectrum_resp_status = le16_to_cpu(res->u.spectrum.status);
2924 switch (spectrum_resp_status) {
2925 case 0: /* Command will be handled */
2926 if (res->u.spectrum.id != 0xff) {
2927 IWL_DEBUG_INFO("Replaced existing measurement: %d\n",
2928 res->u.spectrum.id);
2929 priv->measurement_status &= ~MEASUREMENT_READY;
2930 }
2931 priv->measurement_status |= MEASUREMENT_ACTIVE;
2932 rc = 0;
2933 break;
2934
2935 case 1: /* Command will not be handled */
2936 rc = -EAGAIN;
2937 break;
2938 }
2939
2940 dev_kfree_skb_any(cmd.meta.u.skb);
2941
2942 return rc;
2943 }
2944 #endif
2945
2946 static void iwl3945_rx_reply_alive(struct iwl3945_priv *priv,
2947 struct iwl3945_rx_mem_buffer *rxb)
2948 {
2949 struct iwl3945_rx_packet *pkt = (void *)rxb->skb->data;
2950 struct iwl3945_alive_resp *palive;
2951 struct delayed_work *pwork;
2952
2953 palive = &pkt->u.alive_frame;
2954
2955 IWL_DEBUG_INFO("Alive ucode status 0x%08X revision "
2956 "0x%01X 0x%01X\n",
2957 palive->is_valid, palive->ver_type,
2958 palive->ver_subtype);
2959
2960 if (palive->ver_subtype == INITIALIZE_SUBTYPE) {
2961 IWL_DEBUG_INFO("Initialization Alive received.\n");
2962 memcpy(&priv->card_alive_init,
2963 &pkt->u.alive_frame,
2964 sizeof(struct iwl3945_init_alive_resp));
2965 pwork = &priv->init_alive_start;
2966 } else {
2967 IWL_DEBUG_INFO("Runtime Alive received.\n");
2968 memcpy(&priv->card_alive, &pkt->u.alive_frame,
2969 sizeof(struct iwl3945_alive_resp));
2970 pwork = &priv->alive_start;
2971 iwl3945_disable_events(priv);
2972 }
2973
2974 /* We delay the ALIVE response by 5ms to
2975 * give the HW RF Kill time to activate... */
2976 if (palive->is_valid == UCODE_VALID_OK)
2977 queue_delayed_work(priv->workqueue, pwork,
2978 msecs_to_jiffies(5));
2979 else
2980 IWL_WARNING("uCode did not respond OK.\n");
2981 }
2982
2983 static void iwl3945_rx_reply_add_sta(struct iwl3945_priv *priv,
2984 struct iwl3945_rx_mem_buffer *rxb)
2985 {
2986 struct iwl3945_rx_packet *pkt = (void *)rxb->skb->data;
2987
2988 IWL_DEBUG_RX("Received REPLY_ADD_STA: 0x%02X\n", pkt->u.status);
2989 return;
2990 }
2991
2992 static void iwl3945_rx_reply_error(struct iwl3945_priv *priv,
2993 struct iwl3945_rx_mem_buffer *rxb)
2994 {
2995 struct iwl3945_rx_packet *pkt = (void *)rxb->skb->data;
2996
2997 IWL_ERROR("Error Reply type 0x%08X cmd %s (0x%02X) "
2998 "seq 0x%04X ser 0x%08X\n",
2999 le32_to_cpu(pkt->u.err_resp.error_type),
3000 get_cmd_string(pkt->u.err_resp.cmd_id),
3001 pkt->u.err_resp.cmd_id,
3002 le16_to_cpu(pkt->u.err_resp.bad_cmd_seq_num),
3003 le32_to_cpu(pkt->u.err_resp.error_info));
3004 }
3005
3006 #define TX_STATUS_ENTRY(x) case TX_STATUS_FAIL_ ## x: return #x
3007
3008 static void iwl3945_rx_csa(struct iwl3945_priv *priv, struct iwl3945_rx_mem_buffer *rxb)
3009 {
3010 struct iwl3945_rx_packet *pkt = (void *)rxb->skb->data;
3011 struct iwl3945_rxon_cmd *rxon = (void *)&priv->active_rxon;
3012 struct iwl_csa_notification *csa = &(pkt->u.csa_notif);
3013 IWL_DEBUG_11H("CSA notif: channel %d, status %d\n",
3014 le16_to_cpu(csa->channel), le32_to_cpu(csa->status));
3015 rxon->channel = csa->channel;
3016 priv->staging_rxon.channel = csa->channel;
3017 }
3018
3019 static void iwl3945_rx_spectrum_measure_notif(struct iwl3945_priv *priv,
3020 struct iwl3945_rx_mem_buffer *rxb)
3021 {
3022 #ifdef CONFIG_IWL3945_SPECTRUM_MEASUREMENT
3023 struct iwl3945_rx_packet *pkt = (void *)rxb->skb->data;
3024 struct iwl_spectrum_notification *report = &(pkt->u.spectrum_notif);
3025
3026 if (!report->state) {
3027 IWL_DEBUG(IWL_DL_11H | IWL_DL_INFO,
3028 "Spectrum Measure Notification: Start\n");
3029 return;
3030 }
3031
3032 memcpy(&priv->measure_report, report, sizeof(*report));
3033 priv->measurement_status |= MEASUREMENT_READY;
3034 #endif
3035 }
3036
3037 static void iwl3945_rx_pm_sleep_notif(struct iwl3945_priv *priv,
3038 struct iwl3945_rx_mem_buffer *rxb)
3039 {
3040 #ifdef CONFIG_IWL3945_DEBUG
3041 struct iwl3945_rx_packet *pkt = (void *)rxb->skb->data;
3042 struct iwl_sleep_notification *sleep = &(pkt->u.sleep_notif);
3043 IWL_DEBUG_RX("sleep mode: %d, src: %d\n",
3044 sleep->pm_sleep_mode, sleep->pm_wakeup_src);
3045 #endif
3046 }
3047
3048 static void iwl3945_rx_pm_debug_statistics_notif(struct iwl3945_priv *priv,
3049 struct iwl3945_rx_mem_buffer *rxb)
3050 {
3051 struct iwl3945_rx_packet *pkt = (void *)rxb->skb->data;
3052 IWL_DEBUG_RADIO("Dumping %d bytes of unhandled "
3053 "notification for %s:\n",
3054 le32_to_cpu(pkt->len), get_cmd_string(pkt->hdr.cmd));
3055 iwl3945_print_hex_dump(IWL_DL_RADIO, pkt->u.raw, le32_to_cpu(pkt->len));
3056 }
3057
3058 static void iwl3945_bg_beacon_update(struct work_struct *work)
3059 {
3060 struct iwl3945_priv *priv =
3061 container_of(work, struct iwl3945_priv, beacon_update);
3062 struct sk_buff *beacon;
3063
3064 /* Pull updated AP beacon from mac80211. will fail if not in AP mode */
3065 beacon = ieee80211_beacon_get(priv->hw, priv->vif);
3066
3067 if (!beacon) {
3068 IWL_ERROR("update beacon failed\n");
3069 return;
3070 }
3071
3072 mutex_lock(&priv->mutex);
3073 /* new beacon skb is allocated every time; dispose previous.*/
3074 if (priv->ibss_beacon)
3075 dev_kfree_skb(priv->ibss_beacon);
3076
3077 priv->ibss_beacon = beacon;
3078 mutex_unlock(&priv->mutex);
3079
3080 iwl3945_send_beacon_cmd(priv);
3081 }
3082
3083 static void iwl3945_rx_beacon_notif(struct iwl3945_priv *priv,
3084 struct iwl3945_rx_mem_buffer *rxb)
3085 {
3086 #ifdef CONFIG_IWL3945_DEBUG
3087 struct iwl3945_rx_packet *pkt = (void *)rxb->skb->data;
3088 struct iwl3945_beacon_notif *beacon = &(pkt->u.beacon_status);
3089 u8 rate = beacon->beacon_notify_hdr.rate;
3090
3091 IWL_DEBUG_RX("beacon status %x retries %d iss %d "
3092 "tsf %d %d rate %d\n",
3093 le32_to_cpu(beacon->beacon_notify_hdr.status) & TX_STATUS_MSK,
3094 beacon->beacon_notify_hdr.failure_frame,
3095 le32_to_cpu(beacon->ibss_mgr_status),
3096 le32_to_cpu(beacon->high_tsf),
3097 le32_to_cpu(beacon->low_tsf), rate);
3098 #endif
3099
3100 if ((priv->iw_mode == NL80211_IFTYPE_AP) &&
3101 (!test_bit(STATUS_EXIT_PENDING, &priv->status)))
3102 queue_work(priv->workqueue, &priv->beacon_update);
3103 }
3104
3105 /* Service response to REPLY_SCAN_CMD (0x80) */
3106 static void iwl3945_rx_reply_scan(struct iwl3945_priv *priv,
3107 struct iwl3945_rx_mem_buffer *rxb)
3108 {
3109 #ifdef CONFIG_IWL3945_DEBUG
3110 struct iwl3945_rx_packet *pkt = (void *)rxb->skb->data;
3111 struct iwl_scanreq_notification *notif =
3112 (struct iwl_scanreq_notification *)pkt->u.raw;
3113
3114 IWL_DEBUG_RX("Scan request status = 0x%x\n", notif->status);
3115 #endif
3116 }
3117
3118 /* Service SCAN_START_NOTIFICATION (0x82) */
3119 static void iwl3945_rx_scan_start_notif(struct iwl3945_priv *priv,
3120 struct iwl3945_rx_mem_buffer *rxb)
3121 {
3122 struct iwl3945_rx_packet *pkt = (void *)rxb->skb->data;
3123 struct iwl_scanstart_notification *notif =
3124 (struct iwl_scanstart_notification *)pkt->u.raw;
3125 priv->scan_start_tsf = le32_to_cpu(notif->tsf_low);
3126 IWL_DEBUG_SCAN("Scan start: "
3127 "%d [802.11%s] "
3128 "(TSF: 0x%08X:%08X) - %d (beacon timer %u)\n",
3129 notif->channel,
3130 notif->band ? "bg" : "a",
3131 notif->tsf_high,
3132 notif->tsf_low, notif->status, notif->beacon_timer);
3133 }
3134
3135 /* Service SCAN_RESULTS_NOTIFICATION (0x83) */
3136 static void iwl3945_rx_scan_results_notif(struct iwl3945_priv *priv,
3137 struct iwl3945_rx_mem_buffer *rxb)
3138 {
3139 struct iwl3945_rx_packet *pkt = (void *)rxb->skb->data;
3140 struct iwl_scanresults_notification *notif =
3141 (struct iwl_scanresults_notification *)pkt->u.raw;
3142
3143 IWL_DEBUG_SCAN("Scan ch.res: "
3144 "%d [802.11%s] "
3145 "(TSF: 0x%08X:%08X) - %d "
3146 "elapsed=%lu usec (%dms since last)\n",
3147 notif->channel,
3148 notif->band ? "bg" : "a",
3149 le32_to_cpu(notif->tsf_high),
3150 le32_to_cpu(notif->tsf_low),
3151 le32_to_cpu(notif->statistics[0]),
3152 le32_to_cpu(notif->tsf_low) - priv->scan_start_tsf,
3153 jiffies_to_msecs(elapsed_jiffies
3154 (priv->last_scan_jiffies, jiffies)));
3155
3156 priv->last_scan_jiffies = jiffies;
3157 priv->next_scan_jiffies = 0;
3158 }
3159
3160 /* Service SCAN_COMPLETE_NOTIFICATION (0x84) */
3161 static void iwl3945_rx_scan_complete_notif(struct iwl3945_priv *priv,
3162 struct iwl3945_rx_mem_buffer *rxb)
3163 {
3164 struct iwl3945_rx_packet *pkt = (void *)rxb->skb->data;
3165 struct iwl_scancomplete_notification *scan_notif = (void *)pkt->u.raw;
3166
3167 IWL_DEBUG_SCAN("Scan complete: %d channels (TSF 0x%08X:%08X) - %d\n",
3168 scan_notif->scanned_channels,
3169 scan_notif->tsf_low,
3170 scan_notif->tsf_high, scan_notif->status);
3171
3172 /* The HW is no longer scanning */
3173 clear_bit(STATUS_SCAN_HW, &priv->status);
3174
3175 /* The scan completion notification came in, so kill that timer... */
3176 cancel_delayed_work(&priv->scan_check);
3177
3178 IWL_DEBUG_INFO("Scan pass on %sGHz took %dms\n",
3179 (priv->scan_bands & BIT(IEEE80211_BAND_2GHZ)) ?
3180 "2.4" : "5.2",
3181 jiffies_to_msecs(elapsed_jiffies
3182 (priv->scan_pass_start, jiffies)));
3183
3184 /* Remove this scanned band from the list of pending
3185 * bands to scan, band G precedes A in order of scanning
3186 * as seen in iwl3945_bg_request_scan */
3187 if (priv->scan_bands & BIT(IEEE80211_BAND_2GHZ))
3188 priv->scan_bands &= ~BIT(IEEE80211_BAND_2GHZ);
3189 else if (priv->scan_bands & BIT(IEEE80211_BAND_5GHZ))
3190 priv->scan_bands &= ~BIT(IEEE80211_BAND_5GHZ);
3191
3192 /* If a request to abort was given, or the scan did not succeed
3193 * then we reset the scan state machine and terminate,
3194 * re-queuing another scan if one has been requested */
3195 if (test_bit(STATUS_SCAN_ABORTING, &priv->status)) {
3196 IWL_DEBUG_INFO("Aborted scan completed.\n");
3197 clear_bit(STATUS_SCAN_ABORTING, &priv->status);
3198 } else {
3199 /* If there are more bands on this scan pass reschedule */
3200 if (priv->scan_bands > 0)
3201 goto reschedule;
3202 }
3203
3204 priv->last_scan_jiffies = jiffies;
3205 priv->next_scan_jiffies = 0;
3206 IWL_DEBUG_INFO("Setting scan to off\n");
3207
3208 clear_bit(STATUS_SCANNING, &priv->status);
3209
3210 IWL_DEBUG_INFO("Scan took %dms\n",
3211 jiffies_to_msecs(elapsed_jiffies(priv->scan_start, jiffies)));
3212
3213 queue_work(priv->workqueue, &priv->scan_completed);
3214
3215 return;
3216
3217 reschedule:
3218 priv->scan_pass_start = jiffies;
3219 queue_work(priv->workqueue, &priv->request_scan);
3220 }
3221
3222 /* Handle notification from uCode that card's power state is changing
3223 * due to software, hardware, or critical temperature RFKILL */
3224 static void iwl3945_rx_card_state_notif(struct iwl3945_priv *priv,
3225 struct iwl3945_rx_mem_buffer *rxb)
3226 {
3227 struct iwl3945_rx_packet *pkt = (void *)rxb->skb->data;
3228 u32 flags = le32_to_cpu(pkt->u.card_state_notif.flags);
3229 unsigned long status = priv->status;
3230
3231 IWL_DEBUG_RF_KILL("Card state received: HW:%s SW:%s\n",
3232 (flags & HW_CARD_DISABLED) ? "Kill" : "On",
3233 (flags & SW_CARD_DISABLED) ? "Kill" : "On");
3234
3235 iwl3945_write32(priv, CSR_UCODE_DRV_GP1_SET,
3236 CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
3237
3238 if (flags & HW_CARD_DISABLED)
3239 set_bit(STATUS_RF_KILL_HW, &priv->status);
3240 else
3241 clear_bit(STATUS_RF_KILL_HW, &priv->status);
3242
3243
3244 if (flags & SW_CARD_DISABLED)
3245 set_bit(STATUS_RF_KILL_SW, &priv->status);
3246 else
3247 clear_bit(STATUS_RF_KILL_SW, &priv->status);
3248
3249 iwl3945_scan_cancel(priv);
3250
3251 if ((test_bit(STATUS_RF_KILL_HW, &status) !=
3252 test_bit(STATUS_RF_KILL_HW, &priv->status)) ||
3253 (test_bit(STATUS_RF_KILL_SW, &status) !=
3254 test_bit(STATUS_RF_KILL_SW, &priv->status)))
3255 queue_work(priv->workqueue, &priv->rf_kill);
3256 else
3257 wake_up_interruptible(&priv->wait_command_queue);
3258 }
3259
3260 /**
3261 * iwl3945_setup_rx_handlers - Initialize Rx handler callbacks
3262 *
3263 * Setup the RX handlers for each of the reply types sent from the uCode
3264 * to the host.
3265 *
3266 * This function chains into the hardware specific files for them to setup
3267 * any hardware specific handlers as well.
3268 */
3269 static void iwl3945_setup_rx_handlers(struct iwl3945_priv *priv)
3270 {
3271 priv->rx_handlers[REPLY_ALIVE] = iwl3945_rx_reply_alive;
3272 priv->rx_handlers[REPLY_ADD_STA] = iwl3945_rx_reply_add_sta;
3273 priv->rx_handlers[REPLY_ERROR] = iwl3945_rx_reply_error;
3274 priv->rx_handlers[CHANNEL_SWITCH_NOTIFICATION] = iwl3945_rx_csa;
3275 priv->rx_handlers[SPECTRUM_MEASURE_NOTIFICATION] =
3276 iwl3945_rx_spectrum_measure_notif;
3277 priv->rx_handlers[PM_SLEEP_NOTIFICATION] = iwl3945_rx_pm_sleep_notif;
3278 priv->rx_handlers[PM_DEBUG_STATISTIC_NOTIFIC] =
3279 iwl3945_rx_pm_debug_statistics_notif;
3280 priv->rx_handlers[BEACON_NOTIFICATION] = iwl3945_rx_beacon_notif;
3281
3282 /*
3283 * The same handler is used for both the REPLY to a discrete
3284 * statistics request from the host as well as for the periodic
3285 * statistics notifications (after received beacons) from the uCode.
3286 */
3287 priv->rx_handlers[REPLY_STATISTICS_CMD] = iwl3945_hw_rx_statistics;
3288 priv->rx_handlers[STATISTICS_NOTIFICATION] = iwl3945_hw_rx_statistics;
3289
3290 priv->rx_handlers[REPLY_SCAN_CMD] = iwl3945_rx_reply_scan;
3291 priv->rx_handlers[SCAN_START_NOTIFICATION] = iwl3945_rx_scan_start_notif;
3292 priv->rx_handlers[SCAN_RESULTS_NOTIFICATION] =
3293 iwl3945_rx_scan_results_notif;
3294 priv->rx_handlers[SCAN_COMPLETE_NOTIFICATION] =
3295 iwl3945_rx_scan_complete_notif;
3296 priv->rx_handlers[CARD_STATE_NOTIFICATION] = iwl3945_rx_card_state_notif;
3297
3298 /* Set up hardware specific Rx handlers */
3299 iwl3945_hw_rx_handler_setup(priv);
3300 }
3301
3302 /**
3303 * iwl3945_cmd_queue_reclaim - Reclaim CMD queue entries
3304 * When FW advances 'R' index, all entries between old and new 'R' index
3305 * need to be reclaimed.
3306 */
3307 static void iwl3945_cmd_queue_reclaim(struct iwl3945_priv *priv,
3308 int txq_id, int index)
3309 {
3310 struct iwl3945_tx_queue *txq = &priv->txq[txq_id];
3311 struct iwl3945_queue *q = &txq->q;
3312 int nfreed = 0;
3313
3314 if ((index >= q->n_bd) || (iwl3945_x2_queue_used(q, index) == 0)) {
3315 IWL_ERROR("Read index for DMA queue txq id (%d), index %d, "
3316 "is out of range [0-%d] %d %d.\n", txq_id,
3317 index, q->n_bd, q->write_ptr, q->read_ptr);
3318 return;
3319 }
3320
3321 for (index = iwl_queue_inc_wrap(index, q->n_bd); q->read_ptr != index;
3322 q->read_ptr = iwl_queue_inc_wrap(q->read_ptr, q->n_bd)) {
3323 if (nfreed > 1) {
3324 IWL_ERROR("HCMD skipped: index (%d) %d %d\n", index,
3325 q->write_ptr, q->read_ptr);
3326 queue_work(priv->workqueue, &priv->restart);
3327 break;
3328 }
3329 nfreed++;
3330 }
3331 }
3332
3333
3334 /**
3335 * iwl3945_tx_cmd_complete - Pull unused buffers off the queue and reclaim them
3336 * @rxb: Rx buffer to reclaim
3337 *
3338 * If an Rx buffer has an async callback associated with it the callback
3339 * will be executed. The attached skb (if present) will only be freed
3340 * if the callback returns 1
3341 */
3342 static void iwl3945_tx_cmd_complete(struct iwl3945_priv *priv,
3343 struct iwl3945_rx_mem_buffer *rxb)
3344 {
3345 struct iwl3945_rx_packet *pkt = (struct iwl3945_rx_packet *)rxb->skb->data;
3346 u16 sequence = le16_to_cpu(pkt->hdr.sequence);
3347 int txq_id = SEQ_TO_QUEUE(sequence);
3348 int index = SEQ_TO_INDEX(sequence);
3349 int huge = !!(pkt->hdr.sequence & SEQ_HUGE_FRAME);
3350 int cmd_index;
3351 struct iwl3945_cmd *cmd;
3352
3353 BUG_ON(txq_id != IWL_CMD_QUEUE_NUM);
3354
3355 cmd_index = get_cmd_index(&priv->txq[IWL_CMD_QUEUE_NUM].q, index, huge);
3356 cmd = &priv->txq[IWL_CMD_QUEUE_NUM].cmd[cmd_index];
3357
3358 /* Input error checking is done when commands are added to queue. */
3359 if (cmd->meta.flags & CMD_WANT_SKB) {
3360 cmd->meta.source->u.skb = rxb->skb;
3361 rxb->skb = NULL;
3362 } else if (cmd->meta.u.callback &&
3363 !cmd->meta.u.callback(priv, cmd, rxb->skb))
3364 rxb->skb = NULL;
3365
3366 iwl3945_cmd_queue_reclaim(priv, txq_id, index);
3367
3368 if (!(cmd->meta.flags & CMD_ASYNC)) {
3369 clear_bit(STATUS_HCMD_ACTIVE, &priv->status);
3370 wake_up_interruptible(&priv->wait_command_queue);
3371 }
3372 }
3373
3374 /************************** RX-FUNCTIONS ****************************/
3375 /*
3376 * Rx theory of operation
3377 *
3378 * The host allocates 32 DMA target addresses and passes the host address
3379 * to the firmware at register IWL_RFDS_TABLE_LOWER + N * RFD_SIZE where N is
3380 * 0 to 31
3381 *
3382 * Rx Queue Indexes
3383 * The host/firmware share two index registers for managing the Rx buffers.
3384 *
3385 * The READ index maps to the first position that the firmware may be writing
3386 * to -- the driver can read up to (but not including) this position and get
3387 * good data.
3388 * The READ index is managed by the firmware once the card is enabled.
3389 *
3390 * The WRITE index maps to the last position the driver has read from -- the
3391 * position preceding WRITE is the last slot the firmware can place a packet.
3392 *
3393 * The queue is empty (no good data) if WRITE = READ - 1, and is full if
3394 * WRITE = READ.
3395 *
3396 * During initialization, the host sets up the READ queue position to the first
3397 * INDEX position, and WRITE to the last (READ - 1 wrapped)
3398 *
3399 * When the firmware places a packet in a buffer, it will advance the READ index
3400 * and fire the RX interrupt. The driver can then query the READ index and
3401 * process as many packets as possible, moving the WRITE index forward as it
3402 * resets the Rx queue buffers with new memory.
3403 *
3404 * The management in the driver is as follows:
3405 * + A list of pre-allocated SKBs is stored in iwl->rxq->rx_free. When
3406 * iwl->rxq->free_count drops to or below RX_LOW_WATERMARK, work is scheduled
3407 * to replenish the iwl->rxq->rx_free.
3408 * + In iwl3945_rx_replenish (scheduled) if 'processed' != 'read' then the
3409 * iwl->rxq is replenished and the READ INDEX is updated (updating the
3410 * 'processed' and 'read' driver indexes as well)
3411 * + A received packet is processed and handed to the kernel network stack,
3412 * detached from the iwl->rxq. The driver 'processed' index is updated.
3413 * + The Host/Firmware iwl->rxq is replenished at tasklet time from the rx_free
3414 * list. If there are no allocated buffers in iwl->rxq->rx_free, the READ
3415 * INDEX is not incremented and iwl->status(RX_STALLED) is set. If there
3416 * were enough free buffers and RX_STALLED is set it is cleared.
3417 *
3418 *
3419 * Driver sequence:
3420 *
3421 * iwl3945_rx_queue_alloc() Allocates rx_free
3422 * iwl3945_rx_replenish() Replenishes rx_free list from rx_used, and calls
3423 * iwl3945_rx_queue_restock
3424 * iwl3945_rx_queue_restock() Moves available buffers from rx_free into Rx
3425 * queue, updates firmware pointers, and updates
3426 * the WRITE index. If insufficient rx_free buffers
3427 * are available, schedules iwl3945_rx_replenish
3428 *
3429 * -- enable interrupts --
3430 * ISR - iwl3945_rx() Detach iwl3945_rx_mem_buffers from pool up to the
3431 * READ INDEX, detaching the SKB from the pool.
3432 * Moves the packet buffer from queue to rx_used.
3433 * Calls iwl3945_rx_queue_restock to refill any empty
3434 * slots.
3435 * ...
3436 *
3437 */
3438
3439 /**
3440 * iwl3945_rx_queue_space - Return number of free slots available in queue.
3441 */
3442 static int iwl3945_rx_queue_space(const struct iwl3945_rx_queue *q)
3443 {
3444 int s = q->read - q->write;
3445 if (s <= 0)
3446 s += RX_QUEUE_SIZE;
3447 /* keep some buffer to not confuse full and empty queue */
3448 s -= 2;
3449 if (s < 0)
3450 s = 0;
3451 return s;
3452 }
3453
3454 /**
3455 * iwl3945_rx_queue_update_write_ptr - Update the write pointer for the RX queue
3456 */
3457 int iwl3945_rx_queue_update_write_ptr(struct iwl3945_priv *priv, struct iwl3945_rx_queue *q)
3458 {
3459 u32 reg = 0;
3460 int rc = 0;
3461 unsigned long flags;
3462
3463 spin_lock_irqsave(&q->lock, flags);
3464
3465 if (q->need_update == 0)
3466 goto exit_unlock;
3467
3468 /* If power-saving is in use, make sure device is awake */
3469 if (test_bit(STATUS_POWER_PMI, &priv->status)) {
3470 reg = iwl3945_read32(priv, CSR_UCODE_DRV_GP1);
3471
3472 if (reg & CSR_UCODE_DRV_GP1_BIT_MAC_SLEEP) {
3473 iwl3945_set_bit(priv, CSR_GP_CNTRL,
3474 CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
3475 goto exit_unlock;
3476 }
3477
3478 rc = iwl3945_grab_nic_access(priv);
3479 if (rc)
3480 goto exit_unlock;
3481
3482 /* Device expects a multiple of 8 */
3483 iwl3945_write_direct32(priv, FH39_RSCSR_CHNL0_WPTR,
3484 q->write & ~0x7);
3485 iwl3945_release_nic_access(priv);
3486
3487 /* Else device is assumed to be awake */
3488 } else
3489 /* Device expects a multiple of 8 */
3490 iwl3945_write32(priv, FH39_RSCSR_CHNL0_WPTR, q->write & ~0x7);
3491
3492
3493 q->need_update = 0;
3494
3495 exit_unlock:
3496 spin_unlock_irqrestore(&q->lock, flags);
3497 return rc;
3498 }
3499
3500 /**
3501 * iwl3945_dma_addr2rbd_ptr - convert a DMA address to a uCode read buffer ptr
3502 */
3503 static inline __le32 iwl3945_dma_addr2rbd_ptr(struct iwl3945_priv *priv,
3504 dma_addr_t dma_addr)
3505 {
3506 return cpu_to_le32((u32)dma_addr);
3507 }
3508
3509 /**
3510 * iwl3945_rx_queue_restock - refill RX queue from pre-allocated pool
3511 *
3512 * If there are slots in the RX queue that need to be restocked,
3513 * and we have free pre-allocated buffers, fill the ranks as much
3514 * as we can, pulling from rx_free.
3515 *
3516 * This moves the 'write' index forward to catch up with 'processed', and
3517 * also updates the memory address in the firmware to reference the new
3518 * target buffer.
3519 */
3520 static int iwl3945_rx_queue_restock(struct iwl3945_priv *priv)
3521 {
3522 struct iwl3945_rx_queue *rxq = &priv->rxq;
3523 struct list_head *element;
3524 struct iwl3945_rx_mem_buffer *rxb;
3525 unsigned long flags;
3526 int write, rc;
3527
3528 spin_lock_irqsave(&rxq->lock, flags);
3529 write = rxq->write & ~0x7;
3530 while ((iwl3945_rx_queue_space(rxq) > 0) && (rxq->free_count)) {
3531 /* Get next free Rx buffer, remove from free list */
3532 element = rxq->rx_free.next;
3533 rxb = list_entry(element, struct iwl3945_rx_mem_buffer, list);
3534 list_del(element);
3535
3536 /* Point to Rx buffer via next RBD in circular buffer */
3537 rxq->bd[rxq->write] = iwl3945_dma_addr2rbd_ptr(priv, rxb->dma_addr);
3538 rxq->queue[rxq->write] = rxb;
3539 rxq->write = (rxq->write + 1) & RX_QUEUE_MASK;
3540 rxq->free_count--;
3541 }
3542 spin_unlock_irqrestore(&rxq->lock, flags);
3543 /* If the pre-allocated buffer pool is dropping low, schedule to
3544 * refill it */
3545 if (rxq->free_count <= RX_LOW_WATERMARK)
3546 queue_work(priv->workqueue, &priv->rx_replenish);
3547
3548
3549 /* If we've added more space for the firmware to place data, tell it.
3550 * Increment device's write pointer in multiples of 8. */
3551 if ((write != (rxq->write & ~0x7))
3552 || (abs(rxq->write - rxq->read) > 7)) {
3553 spin_lock_irqsave(&rxq->lock, flags);
3554 rxq->need_update = 1;
3555 spin_unlock_irqrestore(&rxq->lock, flags);
3556 rc = iwl3945_rx_queue_update_write_ptr(priv, rxq);
3557 if (rc)
3558 return rc;
3559 }
3560
3561 return 0;
3562 }
3563
3564 /**
3565 * iwl3945_rx_replenish - Move all used packet from rx_used to rx_free
3566 *
3567 * When moving to rx_free an SKB is allocated for the slot.
3568 *
3569 * Also restock the Rx queue via iwl3945_rx_queue_restock.
3570 * This is called as a scheduled work item (except for during initialization)
3571 */
3572 static void iwl3945_rx_allocate(struct iwl3945_priv *priv)
3573 {
3574 struct iwl3945_rx_queue *rxq = &priv->rxq;
3575 struct list_head *element;
3576 struct iwl3945_rx_mem_buffer *rxb;
3577 unsigned long flags;
3578 spin_lock_irqsave(&rxq->lock, flags);
3579 while (!list_empty(&rxq->rx_used)) {
3580 element = rxq->rx_used.next;
3581 rxb = list_entry(element, struct iwl3945_rx_mem_buffer, list);
3582
3583 /* Alloc a new receive buffer */
3584 rxb->skb =
3585 alloc_skb(IWL_RX_BUF_SIZE, __GFP_NOWARN | GFP_ATOMIC);
3586 if (!rxb->skb) {
3587 if (net_ratelimit())
3588 printk(KERN_CRIT DRV_NAME
3589 ": Can not allocate SKB buffers\n");
3590 /* We don't reschedule replenish work here -- we will
3591 * call the restock method and if it still needs
3592 * more buffers it will schedule replenish */
3593 break;
3594 }
3595
3596 /* If radiotap head is required, reserve some headroom here.
3597 * The physical head count is a variable rx_stats->phy_count.
3598 * We reserve 4 bytes here. Plus these extra bytes, the
3599 * headroom of the physical head should be enough for the
3600 * radiotap head that iwl3945 supported. See iwl3945_rt.
3601 */
3602 skb_reserve(rxb->skb, 4);
3603
3604 priv->alloc_rxb_skb++;
3605 list_del(element);
3606
3607 /* Get physical address of RB/SKB */
3608 rxb->dma_addr =
3609 pci_map_single(priv->pci_dev, rxb->skb->data,
3610 IWL_RX_BUF_SIZE, PCI_DMA_FROMDEVICE);
3611 list_add_tail(&rxb->list, &rxq->rx_free);
3612 rxq->free_count++;
3613 }
3614 spin_unlock_irqrestore(&rxq->lock, flags);
3615 }
3616
3617 /*
3618 * this should be called while priv->lock is locked
3619 */
3620 static void __iwl3945_rx_replenish(void *data)
3621 {
3622 struct iwl3945_priv *priv = data;
3623
3624 iwl3945_rx_allocate(priv);
3625 iwl3945_rx_queue_restock(priv);
3626 }
3627
3628
3629 void iwl3945_rx_replenish(void *data)
3630 {
3631 struct iwl3945_priv *priv = data;
3632 unsigned long flags;
3633
3634 iwl3945_rx_allocate(priv);
3635
3636 spin_lock_irqsave(&priv->lock, flags);
3637 iwl3945_rx_queue_restock(priv);
3638 spin_unlock_irqrestore(&priv->lock, flags);
3639 }
3640
3641 /* Assumes that the skb field of the buffers in 'pool' is kept accurate.
3642 * If an SKB has been detached, the POOL needs to have its SKB set to NULL
3643 * This free routine walks the list of POOL entries and if SKB is set to
3644 * non NULL it is unmapped and freed
3645 */
3646 static void iwl3945_rx_queue_free(struct iwl3945_priv *priv, struct iwl3945_rx_queue *rxq)
3647 {
3648 int i;
3649 for (i = 0; i < RX_QUEUE_SIZE + RX_FREE_BUFFERS; i++) {
3650 if (rxq->pool[i].skb != NULL) {
3651 pci_unmap_single(priv->pci_dev,
3652 rxq->pool[i].dma_addr,
3653 IWL_RX_BUF_SIZE, PCI_DMA_FROMDEVICE);
3654 dev_kfree_skb(rxq->pool[i].skb);
3655 }
3656 }
3657
3658 pci_free_consistent(priv->pci_dev, 4 * RX_QUEUE_SIZE, rxq->bd,
3659 rxq->dma_addr);
3660 rxq->bd = NULL;
3661 }
3662
3663 int iwl3945_rx_queue_alloc(struct iwl3945_priv *priv)
3664 {
3665 struct iwl3945_rx_queue *rxq = &priv->rxq;
3666 struct pci_dev *dev = priv->pci_dev;
3667 int i;
3668
3669 spin_lock_init(&rxq->lock);
3670 INIT_LIST_HEAD(&rxq->rx_free);
3671 INIT_LIST_HEAD(&rxq->rx_used);
3672
3673 /* Alloc the circular buffer of Read Buffer Descriptors (RBDs) */
3674 rxq->bd = pci_alloc_consistent(dev, 4 * RX_QUEUE_SIZE, &rxq->dma_addr);
3675 if (!rxq->bd)
3676 return -ENOMEM;
3677
3678 /* Fill the rx_used queue with _all_ of the Rx buffers */
3679 for (i = 0; i < RX_FREE_BUFFERS + RX_QUEUE_SIZE; i++)
3680 list_add_tail(&rxq->pool[i].list, &rxq->rx_used);
3681
3682 /* Set us so that we have processed and used all buffers, but have
3683 * not restocked the Rx queue with fresh buffers */
3684 rxq->read = rxq->write = 0;
3685 rxq->free_count = 0;
3686 rxq->need_update = 0;
3687 return 0;
3688 }
3689
3690 void iwl3945_rx_queue_reset(struct iwl3945_priv *priv, struct iwl3945_rx_queue *rxq)
3691 {
3692 unsigned long flags;
3693 int i;
3694 spin_lock_irqsave(&rxq->lock, flags);
3695 INIT_LIST_HEAD(&rxq->rx_free);
3696 INIT_LIST_HEAD(&rxq->rx_used);
3697 /* Fill the rx_used queue with _all_ of the Rx buffers */
3698 for (i = 0; i < RX_FREE_BUFFERS + RX_QUEUE_SIZE; i++) {
3699 /* In the reset function, these buffers may have been allocated
3700 * to an SKB, so we need to unmap and free potential storage */
3701 if (rxq->pool[i].skb != NULL) {
3702 pci_unmap_single(priv->pci_dev,
3703 rxq->pool[i].dma_addr,
3704 IWL_RX_BUF_SIZE, PCI_DMA_FROMDEVICE);
3705 priv->alloc_rxb_skb--;
3706 dev_kfree_skb(rxq->pool[i].skb);
3707 rxq->pool[i].skb = NULL;
3708 }
3709 list_add_tail(&rxq->pool[i].list, &rxq->rx_used);
3710 }
3711
3712 /* Set us so that we have processed and used all buffers, but have
3713 * not restocked the Rx queue with fresh buffers */
3714 rxq->read = rxq->write = 0;
3715 rxq->free_count = 0;
3716 spin_unlock_irqrestore(&rxq->lock, flags);
3717 }
3718
3719 /* Convert linear signal-to-noise ratio into dB */
3720 static u8 ratio2dB[100] = {
3721 /* 0 1 2 3 4 5 6 7 8 9 */
3722 0, 0, 6, 10, 12, 14, 16, 17, 18, 19, /* 00 - 09 */
3723 20, 21, 22, 22, 23, 23, 24, 25, 26, 26, /* 10 - 19 */
3724 26, 26, 26, 27, 27, 28, 28, 28, 29, 29, /* 20 - 29 */
3725 29, 30, 30, 30, 31, 31, 31, 31, 32, 32, /* 30 - 39 */
3726 32, 32, 32, 33, 33, 33, 33, 33, 34, 34, /* 40 - 49 */
3727 34, 34, 34, 34, 35, 35, 35, 35, 35, 35, /* 50 - 59 */
3728 36, 36, 36, 36, 36, 36, 36, 37, 37, 37, /* 60 - 69 */
3729 37, 37, 37, 37, 37, 38, 38, 38, 38, 38, /* 70 - 79 */
3730 38, 38, 38, 38, 38, 39, 39, 39, 39, 39, /* 80 - 89 */
3731 39, 39, 39, 39, 39, 40, 40, 40, 40, 40 /* 90 - 99 */
3732 };
3733
3734 /* Calculates a relative dB value from a ratio of linear
3735 * (i.e. not dB) signal levels.
3736 * Conversion assumes that levels are voltages (20*log), not powers (10*log). */
3737 int iwl3945_calc_db_from_ratio(int sig_ratio)
3738 {
3739 /* 1000:1 or higher just report as 60 dB */
3740 if (sig_ratio >= 1000)
3741 return 60;
3742
3743 /* 100:1 or higher, divide by 10 and use table,
3744 * add 20 dB to make up for divide by 10 */
3745 if (sig_ratio >= 100)
3746 return 20 + (int)ratio2dB[sig_ratio/10];
3747
3748 /* We shouldn't see this */
3749 if (sig_ratio < 1)
3750 return 0;
3751
3752 /* Use table for ratios 1:1 - 99:1 */
3753 return (int)ratio2dB[sig_ratio];
3754 }
3755
3756 #define PERFECT_RSSI (-20) /* dBm */
3757 #define WORST_RSSI (-95) /* dBm */
3758 #define RSSI_RANGE (PERFECT_RSSI - WORST_RSSI)
3759
3760 /* Calculate an indication of rx signal quality (a percentage, not dBm!).
3761 * See http://www.ces.clemson.edu/linux/signal_quality.shtml for info
3762 * about formulas used below. */
3763 int iwl3945_calc_sig_qual(int rssi_dbm, int noise_dbm)
3764 {
3765 int sig_qual;
3766 int degradation = PERFECT_RSSI - rssi_dbm;
3767
3768 /* If we get a noise measurement, use signal-to-noise ratio (SNR)
3769 * as indicator; formula is (signal dbm - noise dbm).
3770 * SNR at or above 40 is a great signal (100%).
3771 * Below that, scale to fit SNR of 0 - 40 dB within 0 - 100% indicator.
3772 * Weakest usable signal is usually 10 - 15 dB SNR. */
3773 if (noise_dbm) {
3774 if (rssi_dbm - noise_dbm >= 40)
3775 return 100;
3776 else if (rssi_dbm < noise_dbm)
3777 return 0;
3778 sig_qual = ((rssi_dbm - noise_dbm) * 5) / 2;
3779
3780 /* Else use just the signal level.
3781 * This formula is a least squares fit of data points collected and
3782 * compared with a reference system that had a percentage (%) display
3783 * for signal quality. */
3784 } else
3785 sig_qual = (100 * (RSSI_RANGE * RSSI_RANGE) - degradation *
3786 (15 * RSSI_RANGE + 62 * degradation)) /
3787 (RSSI_RANGE * RSSI_RANGE);
3788
3789 if (sig_qual > 100)
3790 sig_qual = 100;
3791 else if (sig_qual < 1)
3792 sig_qual = 0;
3793
3794 return sig_qual;
3795 }
3796
3797 /**
3798 * iwl3945_rx_handle - Main entry function for receiving responses from uCode
3799 *
3800 * Uses the priv->rx_handlers callback function array to invoke
3801 * the appropriate handlers, including command responses,
3802 * frame-received notifications, and other notifications.
3803 */
3804 static void iwl3945_rx_handle(struct iwl3945_priv *priv)
3805 {
3806 struct iwl3945_rx_mem_buffer *rxb;
3807 struct iwl3945_rx_packet *pkt;
3808 struct iwl3945_rx_queue *rxq = &priv->rxq;
3809 u32 r, i;
3810 int reclaim;
3811 unsigned long flags;
3812 u8 fill_rx = 0;
3813 u32 count = 8;
3814
3815 /* uCode's read index (stored in shared DRAM) indicates the last Rx
3816 * buffer that the driver may process (last buffer filled by ucode). */
3817 r = iwl3945_hw_get_rx_read(priv);
3818 i = rxq->read;
3819
3820 if (iwl3945_rx_queue_space(rxq) > (RX_QUEUE_SIZE / 2))
3821 fill_rx = 1;
3822 /* Rx interrupt, but nothing sent from uCode */
3823 if (i == r)
3824 IWL_DEBUG(IWL_DL_RX | IWL_DL_ISR, "r = %d, i = %d\n", r, i);
3825
3826 while (i != r) {
3827 rxb = rxq->queue[i];
3828
3829 /* If an RXB doesn't have a Rx queue slot associated with it,
3830 * then a bug has been introduced in the queue refilling
3831 * routines -- catch it here */
3832 BUG_ON(rxb == NULL);
3833
3834 rxq->queue[i] = NULL;
3835
3836 pci_dma_sync_single_for_cpu(priv->pci_dev, rxb->dma_addr,
3837 IWL_RX_BUF_SIZE,
3838 PCI_DMA_FROMDEVICE);
3839 pkt = (struct iwl3945_rx_packet *)rxb->skb->data;
3840
3841 /* Reclaim a command buffer only if this packet is a response
3842 * to a (driver-originated) command.
3843 * If the packet (e.g. Rx frame) originated from uCode,
3844 * there is no command buffer to reclaim.
3845 * Ucode should set SEQ_RX_FRAME bit if ucode-originated,
3846 * but apparently a few don't get set; catch them here. */
3847 reclaim = !(pkt->hdr.sequence & SEQ_RX_FRAME) &&
3848 (pkt->hdr.cmd != STATISTICS_NOTIFICATION) &&
3849 (pkt->hdr.cmd != REPLY_TX);
3850
3851 /* Based on type of command response or notification,
3852 * handle those that need handling via function in
3853 * rx_handlers table. See iwl3945_setup_rx_handlers() */
3854 if (priv->rx_handlers[pkt->hdr.cmd]) {
3855 IWL_DEBUG(IWL_DL_HOST_COMMAND | IWL_DL_RX | IWL_DL_ISR,
3856 "r = %d, i = %d, %s, 0x%02x\n", r, i,
3857 get_cmd_string(pkt->hdr.cmd), pkt->hdr.cmd);
3858 priv->rx_handlers[pkt->hdr.cmd] (priv, rxb);
3859 } else {
3860 /* No handling needed */
3861 IWL_DEBUG(IWL_DL_HOST_COMMAND | IWL_DL_RX | IWL_DL_ISR,
3862 "r %d i %d No handler needed for %s, 0x%02x\n",
3863 r, i, get_cmd_string(pkt->hdr.cmd),
3864 pkt->hdr.cmd);
3865 }
3866
3867 if (reclaim) {
3868 /* Invoke any callbacks, transfer the skb to caller, and
3869 * fire off the (possibly) blocking iwl3945_send_cmd()
3870 * as we reclaim the driver command queue */
3871 if (rxb && rxb->skb)
3872 iwl3945_tx_cmd_complete(priv, rxb);
3873 else
3874 IWL_WARNING("Claim null rxb?\n");
3875 }
3876
3877 /* For now we just don't re-use anything. We can tweak this
3878 * later to try and re-use notification packets and SKBs that
3879 * fail to Rx correctly */
3880 if (rxb->skb != NULL) {
3881 priv->alloc_rxb_skb--;
3882 dev_kfree_skb_any(rxb->skb);
3883 rxb->skb = NULL;
3884 }
3885
3886 pci_unmap_single(priv->pci_dev, rxb->dma_addr,
3887 IWL_RX_BUF_SIZE, PCI_DMA_FROMDEVICE);
3888 spin_lock_irqsave(&rxq->lock, flags);
3889 list_add_tail(&rxb->list, &priv->rxq.rx_used);
3890 spin_unlock_irqrestore(&rxq->lock, flags);
3891 i = (i + 1) & RX_QUEUE_MASK;
3892 /* If there are a lot of unused frames,
3893 * restock the Rx queue so ucode won't assert. */
3894 if (fill_rx) {
3895 count++;
3896 if (count >= 8) {
3897 priv->rxq.read = i;
3898 __iwl3945_rx_replenish(priv);
3899 count = 0;
3900 }
3901 }
3902 }
3903
3904 /* Backtrack one entry */
3905 priv->rxq.read = i;
3906 iwl3945_rx_queue_restock(priv);
3907 }
3908
3909 /**
3910 * iwl3945_tx_queue_update_write_ptr - Send new write index to hardware
3911 */
3912 static int iwl3945_tx_queue_update_write_ptr(struct iwl3945_priv *priv,
3913 struct iwl3945_tx_queue *txq)
3914 {
3915 u32 reg = 0;
3916 int rc = 0;
3917 int txq_id = txq->q.id;
3918
3919 if (txq->need_update == 0)
3920 return rc;
3921
3922 /* if we're trying to save power */
3923 if (test_bit(STATUS_POWER_PMI, &priv->status)) {
3924 /* wake up nic if it's powered down ...
3925 * uCode will wake up, and interrupt us again, so next
3926 * time we'll skip this part. */
3927 reg = iwl3945_read32(priv, CSR_UCODE_DRV_GP1);
3928
3929 if (reg & CSR_UCODE_DRV_GP1_BIT_MAC_SLEEP) {
3930 IWL_DEBUG_INFO("Requesting wakeup, GP1 = 0x%x\n", reg);
3931 iwl3945_set_bit(priv, CSR_GP_CNTRL,
3932 CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
3933 return rc;
3934 }
3935
3936 /* restore this queue's parameters in nic hardware. */
3937 rc = iwl3945_grab_nic_access(priv);
3938 if (rc)
3939 return rc;
3940 iwl3945_write_direct32(priv, HBUS_TARG_WRPTR,
3941 txq->q.write_ptr | (txq_id << 8));
3942 iwl3945_release_nic_access(priv);
3943
3944 /* else not in power-save mode, uCode will never sleep when we're
3945 * trying to tx (during RFKILL, we're not trying to tx). */
3946 } else
3947 iwl3945_write32(priv, HBUS_TARG_WRPTR,
3948 txq->q.write_ptr | (txq_id << 8));
3949
3950 txq->need_update = 0;
3951
3952 return rc;
3953 }
3954
3955 #ifdef CONFIG_IWL3945_DEBUG
3956 static void iwl3945_print_rx_config_cmd(struct iwl3945_rxon_cmd *rxon)
3957 {
3958 IWL_DEBUG_RADIO("RX CONFIG:\n");
3959 iwl3945_print_hex_dump(IWL_DL_RADIO, (u8 *) rxon, sizeof(*rxon));
3960 IWL_DEBUG_RADIO("u16 channel: 0x%x\n", le16_to_cpu(rxon->channel));
3961 IWL_DEBUG_RADIO("u32 flags: 0x%08X\n", le32_to_cpu(rxon->flags));
3962 IWL_DEBUG_RADIO("u32 filter_flags: 0x%08x\n",
3963 le32_to_cpu(rxon->filter_flags));
3964 IWL_DEBUG_RADIO("u8 dev_type: 0x%x\n", rxon->dev_type);
3965 IWL_DEBUG_RADIO("u8 ofdm_basic_rates: 0x%02x\n",
3966 rxon->ofdm_basic_rates);
3967 IWL_DEBUG_RADIO("u8 cck_basic_rates: 0x%02x\n", rxon->cck_basic_rates);
3968 IWL_DEBUG_RADIO("u8[6] node_addr: %pM\n", rxon->node_addr);
3969 IWL_DEBUG_RADIO("u8[6] bssid_addr: %pM\n", rxon->bssid_addr);
3970 IWL_DEBUG_RADIO("u16 assoc_id: 0x%x\n", le16_to_cpu(rxon->assoc_id));
3971 }
3972 #endif
3973
3974 static void iwl3945_enable_interrupts(struct iwl3945_priv *priv)
3975 {
3976 IWL_DEBUG_ISR("Enabling interrupts\n");
3977 set_bit(STATUS_INT_ENABLED, &priv->status);
3978 iwl3945_write32(priv, CSR_INT_MASK, CSR_INI_SET_MASK);
3979 }
3980
3981
3982 /* call this function to flush any scheduled tasklet */
3983 static inline void iwl_synchronize_irq(struct iwl3945_priv *priv)
3984 {
3985 /* wait to make sure we flush pending tasklet*/
3986 synchronize_irq(priv->pci_dev->irq);
3987 tasklet_kill(&priv->irq_tasklet);
3988 }
3989
3990
3991 static inline void iwl3945_disable_interrupts(struct iwl3945_priv *priv)
3992 {
3993 clear_bit(STATUS_INT_ENABLED, &priv->status);
3994
3995 /* disable interrupts from uCode/NIC to host */
3996 iwl3945_write32(priv, CSR_INT_MASK, 0x00000000);
3997
3998 /* acknowledge/clear/reset any interrupts still pending
3999 * from uCode or flow handler (Rx/Tx DMA) */
4000 iwl3945_write32(priv, CSR_INT, 0xffffffff);
4001 iwl3945_write32(priv, CSR_FH_INT_STATUS, 0xffffffff);
4002 IWL_DEBUG_ISR("Disabled interrupts\n");
4003 }
4004
4005 static const char *desc_lookup(int i)
4006 {
4007 switch (i) {
4008 case 1:
4009 return "FAIL";
4010 case 2:
4011 return "BAD_PARAM";
4012 case 3:
4013 return "BAD_CHECKSUM";
4014 case 4:
4015 return "NMI_INTERRUPT";
4016 case 5:
4017 return "SYSASSERT";
4018 case 6:
4019 return "FATAL_ERROR";
4020 }
4021
4022 return "UNKNOWN";
4023 }
4024
4025 #define ERROR_START_OFFSET (1 * sizeof(u32))
4026 #define ERROR_ELEM_SIZE (7 * sizeof(u32))
4027
4028 static void iwl3945_dump_nic_error_log(struct iwl3945_priv *priv)
4029 {
4030 u32 i;
4031 u32 desc, time, count, base, data1;
4032 u32 blink1, blink2, ilink1, ilink2;
4033 int rc;
4034
4035 base = le32_to_cpu(priv->card_alive.error_event_table_ptr);
4036
4037 if (!iwl3945_hw_valid_rtc_data_addr(base)) {
4038 IWL_ERROR("Not valid error log pointer 0x%08X\n", base);
4039 return;
4040 }
4041
4042 rc = iwl3945_grab_nic_access(priv);
4043 if (rc) {
4044 IWL_WARNING("Can not read from adapter at this time.\n");
4045 return;
4046 }
4047
4048 count = iwl3945_read_targ_mem(priv, base);
4049
4050 if (ERROR_START_OFFSET <= count * ERROR_ELEM_SIZE) {
4051 IWL_ERROR("Start IWL Error Log Dump:\n");
4052 IWL_ERROR("Status: 0x%08lX, count: %d\n", priv->status, count);
4053 }
4054
4055 IWL_ERROR("Desc Time asrtPC blink2 "
4056 "ilink1 nmiPC Line\n");
4057 for (i = ERROR_START_OFFSET;
4058 i < (count * ERROR_ELEM_SIZE) + ERROR_START_OFFSET;
4059 i += ERROR_ELEM_SIZE) {
4060 desc = iwl3945_read_targ_mem(priv, base + i);
4061 time =
4062 iwl3945_read_targ_mem(priv, base + i + 1 * sizeof(u32));
4063 blink1 =
4064 iwl3945_read_targ_mem(priv, base + i + 2 * sizeof(u32));
4065 blink2 =
4066 iwl3945_read_targ_mem(priv, base + i + 3 * sizeof(u32));
4067 ilink1 =
4068 iwl3945_read_targ_mem(priv, base + i + 4 * sizeof(u32));
4069 ilink2 =
4070 iwl3945_read_targ_mem(priv, base + i + 5 * sizeof(u32));
4071 data1 =
4072 iwl3945_read_targ_mem(priv, base + i + 6 * sizeof(u32));
4073
4074 IWL_ERROR
4075 ("%-13s (#%d) %010u 0x%05X 0x%05X 0x%05X 0x%05X %u\n\n",
4076 desc_lookup(desc), desc, time, blink1, blink2,
4077 ilink1, ilink2, data1);
4078 }
4079
4080 iwl3945_release_nic_access(priv);
4081
4082 }
4083
4084 #define EVENT_START_OFFSET (6 * sizeof(u32))
4085
4086 /**
4087 * iwl3945_print_event_log - Dump error event log to syslog
4088 *
4089 * NOTE: Must be called with iwl3945_grab_nic_access() already obtained!
4090 */
4091 static void iwl3945_print_event_log(struct iwl3945_priv *priv, u32 start_idx,
4092 u32 num_events, u32 mode)
4093 {
4094 u32 i;
4095 u32 base; /* SRAM byte address of event log header */
4096 u32 event_size; /* 2 u32s, or 3 u32s if timestamp recorded */
4097 u32 ptr; /* SRAM byte address of log data */
4098 u32 ev, time, data; /* event log data */
4099
4100 if (num_events == 0)
4101 return;
4102
4103 base = le32_to_cpu(priv->card_alive.log_event_table_ptr);
4104
4105 if (mode == 0)
4106 event_size = 2 * sizeof(u32);
4107 else
4108 event_size = 3 * sizeof(u32);
4109
4110 ptr = base + EVENT_START_OFFSET + (start_idx * event_size);
4111
4112 /* "time" is actually "data" for mode 0 (no timestamp).
4113 * place event id # at far right for easier visual parsing. */
4114 for (i = 0; i < num_events; i++) {
4115 ev = iwl3945_read_targ_mem(priv, ptr);
4116 ptr += sizeof(u32);
4117 time = iwl3945_read_targ_mem(priv, ptr);
4118 ptr += sizeof(u32);
4119 if (mode == 0)
4120 IWL_ERROR("0x%08x\t%04u\n", time, ev); /* data, ev */
4121 else {
4122 data = iwl3945_read_targ_mem(priv, ptr);
4123 ptr += sizeof(u32);
4124 IWL_ERROR("%010u\t0x%08x\t%04u\n", time, data, ev);
4125 }
4126 }
4127 }
4128
4129 static void iwl3945_dump_nic_event_log(struct iwl3945_priv *priv)
4130 {
4131 int rc;
4132 u32 base; /* SRAM byte address of event log header */
4133 u32 capacity; /* event log capacity in # entries */
4134 u32 mode; /* 0 - no timestamp, 1 - timestamp recorded */
4135 u32 num_wraps; /* # times uCode wrapped to top of log */
4136 u32 next_entry; /* index of next entry to be written by uCode */
4137 u32 size; /* # entries that we'll print */
4138
4139 base = le32_to_cpu(priv->card_alive.log_event_table_ptr);
4140 if (!iwl3945_hw_valid_rtc_data_addr(base)) {
4141 IWL_ERROR("Invalid event log pointer 0x%08X\n", base);
4142 return;
4143 }
4144
4145 rc = iwl3945_grab_nic_access(priv);
4146 if (rc) {
4147 IWL_WARNING("Can not read from adapter at this time.\n");
4148 return;
4149 }
4150
4151 /* event log header */
4152 capacity = iwl3945_read_targ_mem(priv, base);
4153 mode = iwl3945_read_targ_mem(priv, base + (1 * sizeof(u32)));
4154 num_wraps = iwl3945_read_targ_mem(priv, base + (2 * sizeof(u32)));
4155 next_entry = iwl3945_read_targ_mem(priv, base + (3 * sizeof(u32)));
4156
4157 size = num_wraps ? capacity : next_entry;
4158
4159 /* bail out if nothing in log */
4160 if (size == 0) {
4161 IWL_ERROR("Start IWL Event Log Dump: nothing in log\n");
4162 iwl3945_release_nic_access(priv);
4163 return;
4164 }
4165
4166 IWL_ERROR("Start IWL Event Log Dump: display count %d, wraps %d\n",
4167 size, num_wraps);
4168
4169 /* if uCode has wrapped back to top of log, start at the oldest entry,
4170 * i.e the next one that uCode would fill. */
4171 if (num_wraps)
4172 iwl3945_print_event_log(priv, next_entry,
4173 capacity - next_entry, mode);
4174
4175 /* (then/else) start at top of log */
4176 iwl3945_print_event_log(priv, 0, next_entry, mode);
4177
4178 iwl3945_release_nic_access(priv);
4179 }
4180
4181 /**
4182 * iwl3945_irq_handle_error - called for HW or SW error interrupt from card
4183 */
4184 static void iwl3945_irq_handle_error(struct iwl3945_priv *priv)
4185 {
4186 /* Set the FW error flag -- cleared on iwl3945_down */
4187 set_bit(STATUS_FW_ERROR, &priv->status);
4188
4189 /* Cancel currently queued command. */
4190 clear_bit(STATUS_HCMD_ACTIVE, &priv->status);
4191
4192 #ifdef CONFIG_IWL3945_DEBUG
4193 if (iwl3945_debug_level & IWL_DL_FW_ERRORS) {
4194 iwl3945_dump_nic_error_log(priv);
4195 iwl3945_dump_nic_event_log(priv);
4196 iwl3945_print_rx_config_cmd(&priv->staging_rxon);
4197 }
4198 #endif
4199
4200 wake_up_interruptible(&priv->wait_command_queue);
4201
4202 /* Keep the restart process from trying to send host
4203 * commands by clearing the INIT status bit */
4204 clear_bit(STATUS_READY, &priv->status);
4205
4206 if (!test_bit(STATUS_EXIT_PENDING, &priv->status)) {
4207 IWL_DEBUG(IWL_DL_INFO | IWL_DL_FW_ERRORS,
4208 "Restarting adapter due to uCode error.\n");
4209
4210 if (iwl3945_is_associated(priv)) {
4211 memcpy(&priv->recovery_rxon, &priv->active_rxon,
4212 sizeof(priv->recovery_rxon));
4213 priv->error_recovering = 1;
4214 }
4215 queue_work(priv->workqueue, &priv->restart);
4216 }
4217 }
4218
4219 static void iwl3945_error_recovery(struct iwl3945_priv *priv)
4220 {
4221 unsigned long flags;
4222
4223 memcpy(&priv->staging_rxon, &priv->recovery_rxon,
4224 sizeof(priv->staging_rxon));
4225 priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
4226 iwl3945_commit_rxon(priv);
4227
4228 iwl3945_add_station(priv, priv->bssid, 1, 0);
4229
4230 spin_lock_irqsave(&priv->lock, flags);
4231 priv->assoc_id = le16_to_cpu(priv->staging_rxon.assoc_id);
4232 priv->error_recovering = 0;
4233 spin_unlock_irqrestore(&priv->lock, flags);
4234 }
4235
4236 static void iwl3945_irq_tasklet(struct iwl3945_priv *priv)
4237 {
4238 u32 inta, handled = 0;
4239 u32 inta_fh;
4240 unsigned long flags;
4241 #ifdef CONFIG_IWL3945_DEBUG
4242 u32 inta_mask;
4243 #endif
4244
4245 spin_lock_irqsave(&priv->lock, flags);
4246
4247 /* Ack/clear/reset pending uCode interrupts.
4248 * Note: Some bits in CSR_INT are "OR" of bits in CSR_FH_INT_STATUS,
4249 * and will clear only when CSR_FH_INT_STATUS gets cleared. */
4250 inta = iwl3945_read32(priv, CSR_INT);
4251 iwl3945_write32(priv, CSR_INT, inta);
4252
4253 /* Ack/clear/reset pending flow-handler (DMA) interrupts.
4254 * Any new interrupts that happen after this, either while we're
4255 * in this tasklet, or later, will show up in next ISR/tasklet. */
4256 inta_fh = iwl3945_read32(priv, CSR_FH_INT_STATUS);
4257 iwl3945_write32(priv, CSR_FH_INT_STATUS, inta_fh);
4258
4259 #ifdef CONFIG_IWL3945_DEBUG
4260 if (iwl3945_debug_level & IWL_DL_ISR) {
4261 /* just for debug */
4262 inta_mask = iwl3945_read32(priv, CSR_INT_MASK);
4263 IWL_DEBUG_ISR("inta 0x%08x, enabled 0x%08x, fh 0x%08x\n",
4264 inta, inta_mask, inta_fh);
4265 }
4266 #endif
4267
4268 /* Since CSR_INT and CSR_FH_INT_STATUS reads and clears are not
4269 * atomic, make sure that inta covers all the interrupts that
4270 * we've discovered, even if FH interrupt came in just after
4271 * reading CSR_INT. */
4272 if (inta_fh & CSR39_FH_INT_RX_MASK)
4273 inta |= CSR_INT_BIT_FH_RX;
4274 if (inta_fh & CSR39_FH_INT_TX_MASK)
4275 inta |= CSR_INT_BIT_FH_TX;
4276
4277 /* Now service all interrupt bits discovered above. */
4278 if (inta & CSR_INT_BIT_HW_ERR) {
4279 IWL_ERROR("Microcode HW error detected. Restarting.\n");
4280
4281 /* Tell the device to stop sending interrupts */
4282 iwl3945_disable_interrupts(priv);
4283
4284 iwl3945_irq_handle_error(priv);
4285
4286 handled |= CSR_INT_BIT_HW_ERR;
4287
4288 spin_unlock_irqrestore(&priv->lock, flags);
4289
4290 return;
4291 }
4292
4293 #ifdef CONFIG_IWL3945_DEBUG
4294 if (iwl3945_debug_level & (IWL_DL_ISR)) {
4295 /* NIC fires this, but we don't use it, redundant with WAKEUP */
4296 if (inta & CSR_INT_BIT_SCD)
4297 IWL_DEBUG_ISR("Scheduler finished to transmit "
4298 "the frame/frames.\n");
4299
4300 /* Alive notification via Rx interrupt will do the real work */
4301 if (inta & CSR_INT_BIT_ALIVE)
4302 IWL_DEBUG_ISR("Alive interrupt\n");
4303 }
4304 #endif
4305 /* Safely ignore these bits for debug checks below */
4306 inta &= ~(CSR_INT_BIT_SCD | CSR_INT_BIT_ALIVE);
4307
4308 /* Error detected by uCode */
4309 if (inta & CSR_INT_BIT_SW_ERR) {
4310 IWL_ERROR("Microcode SW error detected. Restarting 0x%X.\n",
4311 inta);
4312 iwl3945_irq_handle_error(priv);
4313 handled |= CSR_INT_BIT_SW_ERR;
4314 }
4315
4316 /* uCode wakes up after power-down sleep */
4317 if (inta & CSR_INT_BIT_WAKEUP) {
4318 IWL_DEBUG_ISR("Wakeup interrupt\n");
4319 iwl3945_rx_queue_update_write_ptr(priv, &priv->rxq);
4320 iwl3945_tx_queue_update_write_ptr(priv, &priv->txq[0]);
4321 iwl3945_tx_queue_update_write_ptr(priv, &priv->txq[1]);
4322 iwl3945_tx_queue_update_write_ptr(priv, &priv->txq[2]);
4323 iwl3945_tx_queue_update_write_ptr(priv, &priv->txq[3]);
4324 iwl3945_tx_queue_update_write_ptr(priv, &priv->txq[4]);
4325 iwl3945_tx_queue_update_write_ptr(priv, &priv->txq[5]);
4326
4327 handled |= CSR_INT_BIT_WAKEUP;
4328 }
4329
4330 /* All uCode command responses, including Tx command responses,
4331 * Rx "responses" (frame-received notification), and other
4332 * notifications from uCode come through here*/
4333 if (inta & (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX)) {
4334 iwl3945_rx_handle(priv);
4335 handled |= (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX);
4336 }
4337
4338 if (inta & CSR_INT_BIT_FH_TX) {
4339 IWL_DEBUG_ISR("Tx interrupt\n");
4340
4341 iwl3945_write32(priv, CSR_FH_INT_STATUS, (1 << 6));
4342 if (!iwl3945_grab_nic_access(priv)) {
4343 iwl3945_write_direct32(priv, FH39_TCSR_CREDIT
4344 (FH39_SRVC_CHNL), 0x0);
4345 iwl3945_release_nic_access(priv);
4346 }
4347 handled |= CSR_INT_BIT_FH_TX;
4348 }
4349
4350 if (inta & ~handled)
4351 IWL_ERROR("Unhandled INTA bits 0x%08x\n", inta & ~handled);
4352
4353 if (inta & ~CSR_INI_SET_MASK) {
4354 IWL_WARNING("Disabled INTA bits 0x%08x were pending\n",
4355 inta & ~CSR_INI_SET_MASK);
4356 IWL_WARNING(" with FH_INT = 0x%08x\n", inta_fh);
4357 }
4358
4359 /* Re-enable all interrupts */
4360 /* only Re-enable if disabled by irq */
4361 if (test_bit(STATUS_INT_ENABLED, &priv->status))
4362 iwl3945_enable_interrupts(priv);
4363
4364 #ifdef CONFIG_IWL3945_DEBUG
4365 if (iwl3945_debug_level & (IWL_DL_ISR)) {
4366 inta = iwl3945_read32(priv, CSR_INT);
4367 inta_mask = iwl3945_read32(priv, CSR_INT_MASK);
4368 inta_fh = iwl3945_read32(priv, CSR_FH_INT_STATUS);
4369 IWL_DEBUG_ISR("End inta 0x%08x, enabled 0x%08x, fh 0x%08x, "
4370 "flags 0x%08lx\n", inta, inta_mask, inta_fh, flags);
4371 }
4372 #endif
4373 spin_unlock_irqrestore(&priv->lock, flags);
4374 }
4375
4376 static irqreturn_t iwl3945_isr(int irq, void *data)
4377 {
4378 struct iwl3945_priv *priv = data;
4379 u32 inta, inta_mask;
4380 u32 inta_fh;
4381 if (!priv)
4382 return IRQ_NONE;
4383
4384 spin_lock(&priv->lock);
4385
4386 /* Disable (but don't clear!) interrupts here to avoid
4387 * back-to-back ISRs and sporadic interrupts from our NIC.
4388 * If we have something to service, the tasklet will re-enable ints.
4389 * If we *don't* have something, we'll re-enable before leaving here. */
4390 inta_mask = iwl3945_read32(priv, CSR_INT_MASK); /* just for debug */
4391 iwl3945_write32(priv, CSR_INT_MASK, 0x00000000);
4392
4393 /* Discover which interrupts are active/pending */
4394 inta = iwl3945_read32(priv, CSR_INT);
4395 inta_fh = iwl3945_read32(priv, CSR_FH_INT_STATUS);
4396
4397 /* Ignore interrupt if there's nothing in NIC to service.
4398 * This may be due to IRQ shared with another device,
4399 * or due to sporadic interrupts thrown from our NIC. */
4400 if (!inta && !inta_fh) {
4401 IWL_DEBUG_ISR("Ignore interrupt, inta == 0, inta_fh == 0\n");
4402 goto none;
4403 }
4404
4405 if ((inta == 0xFFFFFFFF) || ((inta & 0xFFFFFFF0) == 0xa5a5a5a0)) {
4406 /* Hardware disappeared */
4407 IWL_WARNING("HARDWARE GONE?? INTA == 0x%08x\n", inta);
4408 goto unplugged;
4409 }
4410
4411 IWL_DEBUG_ISR("ISR inta 0x%08x, enabled 0x%08x, fh 0x%08x\n",
4412 inta, inta_mask, inta_fh);
4413
4414 inta &= ~CSR_INT_BIT_SCD;
4415
4416 /* iwl3945_irq_tasklet() will service interrupts and re-enable them */
4417 if (likely(inta || inta_fh))
4418 tasklet_schedule(&priv->irq_tasklet);
4419 unplugged:
4420 spin_unlock(&priv->lock);
4421
4422 return IRQ_HANDLED;
4423
4424 none:
4425 /* re-enable interrupts here since we don't have anything to service. */
4426 /* only Re-enable if disabled by irq */
4427 if (test_bit(STATUS_INT_ENABLED, &priv->status))
4428 iwl3945_enable_interrupts(priv);
4429 spin_unlock(&priv->lock);
4430 return IRQ_NONE;
4431 }
4432
4433 /************************** EEPROM BANDS ****************************
4434 *
4435 * The iwl3945_eeprom_band definitions below provide the mapping from the
4436 * EEPROM contents to the specific channel number supported for each
4437 * band.
4438 *
4439 * For example, iwl3945_priv->eeprom.band_3_channels[4] from the band_3
4440 * definition below maps to physical channel 42 in the 5.2GHz spectrum.
4441 * The specific geography and calibration information for that channel
4442 * is contained in the eeprom map itself.
4443 *
4444 * During init, we copy the eeprom information and channel map
4445 * information into priv->channel_info_24/52 and priv->channel_map_24/52
4446 *
4447 * channel_map_24/52 provides the index in the channel_info array for a
4448 * given channel. We have to have two separate maps as there is channel
4449 * overlap with the 2.4GHz and 5.2GHz spectrum as seen in band_1 and
4450 * band_2
4451 *
4452 * A value of 0xff stored in the channel_map indicates that the channel
4453 * is not supported by the hardware at all.
4454 *
4455 * A value of 0xfe in the channel_map indicates that the channel is not
4456 * valid for Tx with the current hardware. This means that
4457 * while the system can tune and receive on a given channel, it may not
4458 * be able to associate or transmit any frames on that
4459 * channel. There is no corresponding channel information for that
4460 * entry.
4461 *
4462 *********************************************************************/
4463
4464 /* 2.4 GHz */
4465 static const u8 iwl3945_eeprom_band_1[14] = {
4466 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14
4467 };
4468
4469 /* 5.2 GHz bands */
4470 static const u8 iwl3945_eeprom_band_2[] = { /* 4915-5080MHz */
4471 183, 184, 185, 187, 188, 189, 192, 196, 7, 8, 11, 12, 16
4472 };
4473
4474 static const u8 iwl3945_eeprom_band_3[] = { /* 5170-5320MHz */
4475 34, 36, 38, 40, 42, 44, 46, 48, 52, 56, 60, 64
4476 };
4477
4478 static const u8 iwl3945_eeprom_band_4[] = { /* 5500-5700MHz */
4479 100, 104, 108, 112, 116, 120, 124, 128, 132, 136, 140
4480 };
4481
4482 static const u8 iwl3945_eeprom_band_5[] = { /* 5725-5825MHz */
4483 145, 149, 153, 157, 161, 165
4484 };
4485
4486 static void iwl3945_init_band_reference(const struct iwl3945_priv *priv, int band,
4487 int *eeprom_ch_count,
4488 const struct iwl3945_eeprom_channel
4489 **eeprom_ch_info,
4490 const u8 **eeprom_ch_index)
4491 {
4492 switch (band) {
4493 case 1: /* 2.4GHz band */
4494 *eeprom_ch_count = ARRAY_SIZE(iwl3945_eeprom_band_1);
4495 *eeprom_ch_info = priv->eeprom.band_1_channels;
4496 *eeprom_ch_index = iwl3945_eeprom_band_1;
4497 break;
4498 case 2: /* 4.9GHz band */
4499 *eeprom_ch_count = ARRAY_SIZE(iwl3945_eeprom_band_2);
4500 *eeprom_ch_info = priv->eeprom.band_2_channels;
4501 *eeprom_ch_index = iwl3945_eeprom_band_2;
4502 break;
4503 case 3: /* 5.2GHz band */
4504 *eeprom_ch_count = ARRAY_SIZE(iwl3945_eeprom_band_3);
4505 *eeprom_ch_info = priv->eeprom.band_3_channels;
4506 *eeprom_ch_index = iwl3945_eeprom_band_3;
4507 break;
4508 case 4: /* 5.5GHz band */
4509 *eeprom_ch_count = ARRAY_SIZE(iwl3945_eeprom_band_4);
4510 *eeprom_ch_info = priv->eeprom.band_4_channels;
4511 *eeprom_ch_index = iwl3945_eeprom_band_4;
4512 break;
4513 case 5: /* 5.7GHz band */
4514 *eeprom_ch_count = ARRAY_SIZE(iwl3945_eeprom_band_5);
4515 *eeprom_ch_info = priv->eeprom.band_5_channels;
4516 *eeprom_ch_index = iwl3945_eeprom_band_5;
4517 break;
4518 default:
4519 BUG();
4520 return;
4521 }
4522 }
4523
4524 /**
4525 * iwl3945_get_channel_info - Find driver's private channel info
4526 *
4527 * Based on band and channel number.
4528 */
4529 const struct iwl3945_channel_info *iwl3945_get_channel_info(const struct iwl3945_priv *priv,
4530 enum ieee80211_band band, u16 channel)
4531 {
4532 int i;
4533
4534 switch (band) {
4535 case IEEE80211_BAND_5GHZ:
4536 for (i = 14; i < priv->channel_count; i++) {
4537 if (priv->channel_info[i].channel == channel)
4538 return &priv->channel_info[i];
4539 }
4540 break;
4541
4542 case IEEE80211_BAND_2GHZ:
4543 if (channel >= 1 && channel <= 14)
4544 return &priv->channel_info[channel - 1];
4545 break;
4546 case IEEE80211_NUM_BANDS:
4547 WARN_ON(1);
4548 }
4549
4550 return NULL;
4551 }
4552
4553 #define CHECK_AND_PRINT(x) ((eeprom_ch_info[ch].flags & EEPROM_CHANNEL_##x) \
4554 ? # x " " : "")
4555
4556 /**
4557 * iwl3945_init_channel_map - Set up driver's info for all possible channels
4558 */
4559 static int iwl3945_init_channel_map(struct iwl3945_priv *priv)
4560 {
4561 int eeprom_ch_count = 0;
4562 const u8 *eeprom_ch_index = NULL;
4563 const struct iwl3945_eeprom_channel *eeprom_ch_info = NULL;
4564 int band, ch;
4565 struct iwl3945_channel_info *ch_info;
4566
4567 if (priv->channel_count) {
4568 IWL_DEBUG_INFO("Channel map already initialized.\n");
4569 return 0;
4570 }
4571
4572 if (priv->eeprom.version < 0x2f) {
4573 IWL_WARNING("Unsupported EEPROM version: 0x%04X\n",
4574 priv->eeprom.version);
4575 return -EINVAL;
4576 }
4577
4578 IWL_DEBUG_INFO("Initializing regulatory info from EEPROM\n");
4579
4580 priv->channel_count =
4581 ARRAY_SIZE(iwl3945_eeprom_band_1) +
4582 ARRAY_SIZE(iwl3945_eeprom_band_2) +
4583 ARRAY_SIZE(iwl3945_eeprom_band_3) +
4584 ARRAY_SIZE(iwl3945_eeprom_band_4) +
4585 ARRAY_SIZE(iwl3945_eeprom_band_5);
4586
4587 IWL_DEBUG_INFO("Parsing data for %d channels.\n", priv->channel_count);
4588
4589 priv->channel_info = kzalloc(sizeof(struct iwl3945_channel_info) *
4590 priv->channel_count, GFP_KERNEL);
4591 if (!priv->channel_info) {
4592 IWL_ERROR("Could not allocate channel_info\n");
4593 priv->channel_count = 0;
4594 return -ENOMEM;
4595 }
4596
4597 ch_info = priv->channel_info;
4598
4599 /* Loop through the 5 EEPROM bands adding them in order to the
4600 * channel map we maintain (that contains additional information than
4601 * what just in the EEPROM) */
4602 for (band = 1; band <= 5; band++) {
4603
4604 iwl3945_init_band_reference(priv, band, &eeprom_ch_count,
4605 &eeprom_ch_info, &eeprom_ch_index);
4606
4607 /* Loop through each band adding each of the channels */
4608 for (ch = 0; ch < eeprom_ch_count; ch++) {
4609 ch_info->channel = eeprom_ch_index[ch];
4610 ch_info->band = (band == 1) ? IEEE80211_BAND_2GHZ :
4611 IEEE80211_BAND_5GHZ;
4612
4613 /* permanently store EEPROM's channel regulatory flags
4614 * and max power in channel info database. */
4615 ch_info->eeprom = eeprom_ch_info[ch];
4616
4617 /* Copy the run-time flags so they are there even on
4618 * invalid channels */
4619 ch_info->flags = eeprom_ch_info[ch].flags;
4620
4621 if (!(is_channel_valid(ch_info))) {
4622 IWL_DEBUG_INFO("Ch. %d Flags %x [%sGHz] - "
4623 "No traffic\n",
4624 ch_info->channel,
4625 ch_info->flags,
4626 is_channel_a_band(ch_info) ?
4627 "5.2" : "2.4");
4628 ch_info++;
4629 continue;
4630 }
4631
4632 /* Initialize regulatory-based run-time data */
4633 ch_info->max_power_avg = ch_info->curr_txpow =
4634 eeprom_ch_info[ch].max_power_avg;
4635 ch_info->scan_power = eeprom_ch_info[ch].max_power_avg;
4636 ch_info->min_power = 0;
4637
4638 IWL_DEBUG_INFO("Ch. %d [%sGHz] %s%s%s%s%s%s(0x%02x"
4639 " %ddBm): Ad-Hoc %ssupported\n",
4640 ch_info->channel,
4641 is_channel_a_band(ch_info) ?
4642 "5.2" : "2.4",
4643 CHECK_AND_PRINT(VALID),
4644 CHECK_AND_PRINT(IBSS),
4645 CHECK_AND_PRINT(ACTIVE),
4646 CHECK_AND_PRINT(RADAR),
4647 CHECK_AND_PRINT(WIDE),
4648 CHECK_AND_PRINT(DFS),
4649 eeprom_ch_info[ch].flags,
4650 eeprom_ch_info[ch].max_power_avg,
4651 ((eeprom_ch_info[ch].
4652 flags & EEPROM_CHANNEL_IBSS)
4653 && !(eeprom_ch_info[ch].
4654 flags & EEPROM_CHANNEL_RADAR))
4655 ? "" : "not ");
4656
4657 /* Set the user_txpower_limit to the highest power
4658 * supported by any channel */
4659 if (eeprom_ch_info[ch].max_power_avg >
4660 priv->user_txpower_limit)
4661 priv->user_txpower_limit =
4662 eeprom_ch_info[ch].max_power_avg;
4663
4664 ch_info++;
4665 }
4666 }
4667
4668 /* Set up txpower settings in driver for all channels */
4669 if (iwl3945_txpower_set_from_eeprom(priv))
4670 return -EIO;
4671
4672 return 0;
4673 }
4674
4675 /*
4676 * iwl3945_free_channel_map - undo allocations in iwl3945_init_channel_map
4677 */
4678 static void iwl3945_free_channel_map(struct iwl3945_priv *priv)
4679 {
4680 kfree(priv->channel_info);
4681 priv->channel_count = 0;
4682 }
4683
4684 /* For active scan, listen ACTIVE_DWELL_TIME (msec) on each channel after
4685 * sending probe req. This should be set long enough to hear probe responses
4686 * from more than one AP. */
4687 #define IWL_ACTIVE_DWELL_TIME_24 (30) /* all times in msec */
4688 #define IWL_ACTIVE_DWELL_TIME_52 (20)
4689
4690 #define IWL_ACTIVE_DWELL_FACTOR_24GHZ (3)
4691 #define IWL_ACTIVE_DWELL_FACTOR_52GHZ (2)
4692
4693 /* For faster active scanning, scan will move to the next channel if fewer than
4694 * PLCP_QUIET_THRESH packets are heard on this channel within
4695 * ACTIVE_QUIET_TIME after sending probe request. This shortens the dwell
4696 * time if it's a quiet channel (nothing responded to our probe, and there's
4697 * no other traffic).
4698 * Disable "quiet" feature by setting PLCP_QUIET_THRESH to 0. */
4699 #define IWL_PLCP_QUIET_THRESH __constant_cpu_to_le16(1) /* packets */
4700 #define IWL_ACTIVE_QUIET_TIME __constant_cpu_to_le16(10) /* msec */
4701
4702 /* For passive scan, listen PASSIVE_DWELL_TIME (msec) on each channel.
4703 * Must be set longer than active dwell time.
4704 * For the most reliable scan, set > AP beacon interval (typically 100msec). */
4705 #define IWL_PASSIVE_DWELL_TIME_24 (20) /* all times in msec */
4706 #define IWL_PASSIVE_DWELL_TIME_52 (10)
4707 #define IWL_PASSIVE_DWELL_BASE (100)
4708 #define IWL_CHANNEL_TUNE_TIME 5
4709
4710 #define IWL_SCAN_PROBE_MASK(n) (BIT(n) | (BIT(n) - BIT(1)))
4711
4712 static inline u16 iwl3945_get_active_dwell_time(struct iwl3945_priv *priv,
4713 enum ieee80211_band band,
4714 u8 n_probes)
4715 {
4716 if (band == IEEE80211_BAND_5GHZ)
4717 return IWL_ACTIVE_DWELL_TIME_52 +
4718 IWL_ACTIVE_DWELL_FACTOR_52GHZ * (n_probes + 1);
4719 else
4720 return IWL_ACTIVE_DWELL_TIME_24 +
4721 IWL_ACTIVE_DWELL_FACTOR_24GHZ * (n_probes + 1);
4722 }
4723
4724 static u16 iwl3945_get_passive_dwell_time(struct iwl3945_priv *priv,
4725 enum ieee80211_band band)
4726 {
4727 u16 passive = (band == IEEE80211_BAND_2GHZ) ?
4728 IWL_PASSIVE_DWELL_BASE + IWL_PASSIVE_DWELL_TIME_24 :
4729 IWL_PASSIVE_DWELL_BASE + IWL_PASSIVE_DWELL_TIME_52;
4730
4731 if (iwl3945_is_associated(priv)) {
4732 /* If we're associated, we clamp the maximum passive
4733 * dwell time to be 98% of the beacon interval (minus
4734 * 2 * channel tune time) */
4735 passive = priv->beacon_int;
4736 if ((passive > IWL_PASSIVE_DWELL_BASE) || !passive)
4737 passive = IWL_PASSIVE_DWELL_BASE;
4738 passive = (passive * 98) / 100 - IWL_CHANNEL_TUNE_TIME * 2;
4739 }
4740
4741 return passive;
4742 }
4743
4744 static int iwl3945_get_channels_for_scan(struct iwl3945_priv *priv,
4745 enum ieee80211_band band,
4746 u8 is_active, u8 n_probes,
4747 struct iwl3945_scan_channel *scan_ch)
4748 {
4749 const struct ieee80211_channel *channels = NULL;
4750 const struct ieee80211_supported_band *sband;
4751 const struct iwl3945_channel_info *ch_info;
4752 u16 passive_dwell = 0;
4753 u16 active_dwell = 0;
4754 int added, i;
4755
4756 sband = iwl3945_get_band(priv, band);
4757 if (!sband)
4758 return 0;
4759
4760 channels = sband->channels;
4761
4762 active_dwell = iwl3945_get_active_dwell_time(priv, band, n_probes);
4763 passive_dwell = iwl3945_get_passive_dwell_time(priv, band);
4764
4765 if (passive_dwell <= active_dwell)
4766 passive_dwell = active_dwell + 1;
4767
4768 for (i = 0, added = 0; i < sband->n_channels; i++) {
4769 if (channels[i].flags & IEEE80211_CHAN_DISABLED)
4770 continue;
4771
4772 scan_ch->channel = channels[i].hw_value;
4773
4774 ch_info = iwl3945_get_channel_info(priv, band, scan_ch->channel);
4775 if (!is_channel_valid(ch_info)) {
4776 IWL_DEBUG_SCAN("Channel %d is INVALID for this band.\n",
4777 scan_ch->channel);
4778 continue;
4779 }
4780
4781 scan_ch->active_dwell = cpu_to_le16(active_dwell);
4782 scan_ch->passive_dwell = cpu_to_le16(passive_dwell);
4783 /* If passive , set up for auto-switch
4784 * and use long active_dwell time.
4785 */
4786 if (!is_active || is_channel_passive(ch_info) ||
4787 (channels[i].flags & IEEE80211_CHAN_PASSIVE_SCAN)) {
4788 scan_ch->type = 0; /* passive */
4789 if (IWL_UCODE_API(priv->ucode_ver) == 1)
4790 scan_ch->active_dwell = cpu_to_le16(passive_dwell - 1);
4791 } else {
4792 scan_ch->type = 1; /* active */
4793 }
4794
4795 /* Set direct probe bits. These may be used both for active
4796 * scan channels (probes gets sent right away),
4797 * or for passive channels (probes get se sent only after
4798 * hearing clear Rx packet).*/
4799 if (IWL_UCODE_API(priv->ucode_ver) >= 2) {
4800 if (n_probes)
4801 scan_ch->type |= IWL_SCAN_PROBE_MASK(n_probes);
4802 } else {
4803 /* uCode v1 does not allow setting direct probe bits on
4804 * passive channel. */
4805 if ((scan_ch->type & 1) && n_probes)
4806 scan_ch->type |= IWL_SCAN_PROBE_MASK(n_probes);
4807 }
4808
4809 /* Set txpower levels to defaults */
4810 scan_ch->tpc.dsp_atten = 110;
4811 /* scan_pwr_info->tpc.dsp_atten; */
4812
4813 /*scan_pwr_info->tpc.tx_gain; */
4814 if (band == IEEE80211_BAND_5GHZ)
4815 scan_ch->tpc.tx_gain = ((1 << 5) | (3 << 3)) | 3;
4816 else {
4817 scan_ch->tpc.tx_gain = ((1 << 5) | (5 << 3));
4818 /* NOTE: if we were doing 6Mb OFDM for scans we'd use
4819 * power level:
4820 * scan_ch->tpc.tx_gain = ((1 << 5) | (2 << 3)) | 3;
4821 */
4822 }
4823
4824 IWL_DEBUG_SCAN("Scanning %d [%s %d]\n",
4825 scan_ch->channel,
4826 (scan_ch->type & 1) ? "ACTIVE" : "PASSIVE",
4827 (scan_ch->type & 1) ?
4828 active_dwell : passive_dwell);
4829
4830 scan_ch++;
4831 added++;
4832 }
4833
4834 IWL_DEBUG_SCAN("total channels to scan %d \n", added);
4835 return added;
4836 }
4837
4838 static void iwl3945_init_hw_rates(struct iwl3945_priv *priv,
4839 struct ieee80211_rate *rates)
4840 {
4841 int i;
4842
4843 for (i = 0; i < IWL_RATE_COUNT; i++) {
4844 rates[i].bitrate = iwl3945_rates[i].ieee * 5;
4845 rates[i].hw_value = i; /* Rate scaling will work on indexes */
4846 rates[i].hw_value_short = i;
4847 rates[i].flags = 0;
4848 if ((i > IWL_LAST_OFDM_RATE) || (i < IWL_FIRST_OFDM_RATE)) {
4849 /*
4850 * If CCK != 1M then set short preamble rate flag.
4851 */
4852 rates[i].flags |= (iwl3945_rates[i].plcp == 10) ?
4853 0 : IEEE80211_RATE_SHORT_PREAMBLE;
4854 }
4855 }
4856 }
4857
4858 /**
4859 * iwl3945_init_geos - Initialize mac80211's geo/channel info based from eeprom
4860 */
4861 static int iwl3945_init_geos(struct iwl3945_priv *priv)
4862 {
4863 struct iwl3945_channel_info *ch;
4864 struct ieee80211_supported_band *sband;
4865 struct ieee80211_channel *channels;
4866 struct ieee80211_channel *geo_ch;
4867 struct ieee80211_rate *rates;
4868 int i = 0;
4869
4870 if (priv->bands[IEEE80211_BAND_2GHZ].n_bitrates ||
4871 priv->bands[IEEE80211_BAND_5GHZ].n_bitrates) {
4872 IWL_DEBUG_INFO("Geography modes already initialized.\n");
4873 set_bit(STATUS_GEO_CONFIGURED, &priv->status);
4874 return 0;
4875 }
4876
4877 channels = kzalloc(sizeof(struct ieee80211_channel) *
4878 priv->channel_count, GFP_KERNEL);
4879 if (!channels)
4880 return -ENOMEM;
4881
4882 rates = kzalloc((sizeof(struct ieee80211_rate) * (IWL_RATE_COUNT + 1)),
4883 GFP_KERNEL);
4884 if (!rates) {
4885 kfree(channels);
4886 return -ENOMEM;
4887 }
4888
4889 /* 5.2GHz channels start after the 2.4GHz channels */
4890 sband = &priv->bands[IEEE80211_BAND_5GHZ];
4891 sband->channels = &channels[ARRAY_SIZE(iwl3945_eeprom_band_1)];
4892 /* just OFDM */
4893 sband->bitrates = &rates[IWL_FIRST_OFDM_RATE];
4894 sband->n_bitrates = IWL_RATE_COUNT - IWL_FIRST_OFDM_RATE;
4895
4896 sband = &priv->bands[IEEE80211_BAND_2GHZ];
4897 sband->channels = channels;
4898 /* OFDM & CCK */
4899 sband->bitrates = rates;
4900 sband->n_bitrates = IWL_RATE_COUNT;
4901
4902 priv->ieee_channels = channels;
4903 priv->ieee_rates = rates;
4904
4905 iwl3945_init_hw_rates(priv, rates);
4906
4907 for (i = 0; i < priv->channel_count; i++) {
4908 ch = &priv->channel_info[i];
4909
4910 /* FIXME: might be removed if scan is OK*/
4911 if (!is_channel_valid(ch))
4912 continue;
4913
4914 if (is_channel_a_band(ch))
4915 sband = &priv->bands[IEEE80211_BAND_5GHZ];
4916 else
4917 sband = &priv->bands[IEEE80211_BAND_2GHZ];
4918
4919 geo_ch = &sband->channels[sband->n_channels++];
4920
4921 geo_ch->center_freq = ieee80211_channel_to_frequency(ch->channel);
4922 geo_ch->max_power = ch->max_power_avg;
4923 geo_ch->max_antenna_gain = 0xff;
4924 geo_ch->hw_value = ch->channel;
4925
4926 if (is_channel_valid(ch)) {
4927 if (!(ch->flags & EEPROM_CHANNEL_IBSS))
4928 geo_ch->flags |= IEEE80211_CHAN_NO_IBSS;
4929
4930 if (!(ch->flags & EEPROM_CHANNEL_ACTIVE))
4931 geo_ch->flags |= IEEE80211_CHAN_PASSIVE_SCAN;
4932
4933 if (ch->flags & EEPROM_CHANNEL_RADAR)
4934 geo_ch->flags |= IEEE80211_CHAN_RADAR;
4935
4936 if (ch->max_power_avg > priv->max_channel_txpower_limit)
4937 priv->max_channel_txpower_limit =
4938 ch->max_power_avg;
4939 } else {
4940 geo_ch->flags |= IEEE80211_CHAN_DISABLED;
4941 }
4942
4943 /* Save flags for reg domain usage */
4944 geo_ch->orig_flags = geo_ch->flags;
4945
4946 IWL_DEBUG_INFO("Channel %d Freq=%d[%sGHz] %s flag=0%X\n",
4947 ch->channel, geo_ch->center_freq,
4948 is_channel_a_band(ch) ? "5.2" : "2.4",
4949 geo_ch->flags & IEEE80211_CHAN_DISABLED ?
4950 "restricted" : "valid",
4951 geo_ch->flags);
4952 }
4953
4954 if ((priv->bands[IEEE80211_BAND_5GHZ].n_channels == 0) &&
4955 priv->cfg->sku & IWL_SKU_A) {
4956 printk(KERN_INFO DRV_NAME
4957 ": Incorrectly detected BG card as ABG. Please send "
4958 "your PCI ID 0x%04X:0x%04X to maintainer.\n",
4959 priv->pci_dev->device, priv->pci_dev->subsystem_device);
4960 priv->cfg->sku &= ~IWL_SKU_A;
4961 }
4962
4963 printk(KERN_INFO DRV_NAME
4964 ": Tunable channels: %d 802.11bg, %d 802.11a channels\n",
4965 priv->bands[IEEE80211_BAND_2GHZ].n_channels,
4966 priv->bands[IEEE80211_BAND_5GHZ].n_channels);
4967
4968 if (priv->bands[IEEE80211_BAND_2GHZ].n_channels)
4969 priv->hw->wiphy->bands[IEEE80211_BAND_2GHZ] =
4970 &priv->bands[IEEE80211_BAND_2GHZ];
4971 if (priv->bands[IEEE80211_BAND_5GHZ].n_channels)
4972 priv->hw->wiphy->bands[IEEE80211_BAND_5GHZ] =
4973 &priv->bands[IEEE80211_BAND_5GHZ];
4974
4975 set_bit(STATUS_GEO_CONFIGURED, &priv->status);
4976
4977 return 0;
4978 }
4979
4980 /*
4981 * iwl3945_free_geos - undo allocations in iwl3945_init_geos
4982 */
4983 static void iwl3945_free_geos(struct iwl3945_priv *priv)
4984 {
4985 kfree(priv->ieee_channels);
4986 kfree(priv->ieee_rates);
4987 clear_bit(STATUS_GEO_CONFIGURED, &priv->status);
4988 }
4989
4990 /******************************************************************************
4991 *
4992 * uCode download functions
4993 *
4994 ******************************************************************************/
4995
4996 static void iwl3945_dealloc_ucode_pci(struct iwl3945_priv *priv)
4997 {
4998 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_code);
4999 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_data);
5000 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_data_backup);
5001 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_init);
5002 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_init_data);
5003 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_boot);
5004 }
5005
5006 /**
5007 * iwl3945_verify_inst_full - verify runtime uCode image in card vs. host,
5008 * looking at all data.
5009 */
5010 static int iwl3945_verify_inst_full(struct iwl3945_priv *priv, __le32 *image, u32 len)
5011 {
5012 u32 val;
5013 u32 save_len = len;
5014 int rc = 0;
5015 u32 errcnt;
5016
5017 IWL_DEBUG_INFO("ucode inst image size is %u\n", len);
5018
5019 rc = iwl3945_grab_nic_access(priv);
5020 if (rc)
5021 return rc;
5022
5023 iwl3945_write_direct32(priv, HBUS_TARG_MEM_RADDR, RTC_INST_LOWER_BOUND);
5024
5025 errcnt = 0;
5026 for (; len > 0; len -= sizeof(u32), image++) {
5027 /* read data comes through single port, auto-incr addr */
5028 /* NOTE: Use the debugless read so we don't flood kernel log
5029 * if IWL_DL_IO is set */
5030 val = _iwl3945_read_direct32(priv, HBUS_TARG_MEM_RDAT);
5031 if (val != le32_to_cpu(*image)) {
5032 IWL_ERROR("uCode INST section is invalid at "
5033 "offset 0x%x, is 0x%x, s/b 0x%x\n",
5034 save_len - len, val, le32_to_cpu(*image));
5035 rc = -EIO;
5036 errcnt++;
5037 if (errcnt >= 20)
5038 break;
5039 }
5040 }
5041
5042 iwl3945_release_nic_access(priv);
5043
5044 if (!errcnt)
5045 IWL_DEBUG_INFO("ucode image in INSTRUCTION memory is good\n");
5046
5047 return rc;
5048 }
5049
5050
5051 /**
5052 * iwl3945_verify_inst_sparse - verify runtime uCode image in card vs. host,
5053 * using sample data 100 bytes apart. If these sample points are good,
5054 * it's a pretty good bet that everything between them is good, too.
5055 */
5056 static int iwl3945_verify_inst_sparse(struct iwl3945_priv *priv, __le32 *image, u32 len)
5057 {
5058 u32 val;
5059 int rc = 0;
5060 u32 errcnt = 0;
5061 u32 i;
5062
5063 IWL_DEBUG_INFO("ucode inst image size is %u\n", len);
5064
5065 rc = iwl3945_grab_nic_access(priv);
5066 if (rc)
5067 return rc;
5068
5069 for (i = 0; i < len; i += 100, image += 100/sizeof(u32)) {
5070 /* read data comes through single port, auto-incr addr */
5071 /* NOTE: Use the debugless read so we don't flood kernel log
5072 * if IWL_DL_IO is set */
5073 iwl3945_write_direct32(priv, HBUS_TARG_MEM_RADDR,
5074 i + RTC_INST_LOWER_BOUND);
5075 val = _iwl3945_read_direct32(priv, HBUS_TARG_MEM_RDAT);
5076 if (val != le32_to_cpu(*image)) {
5077 #if 0 /* Enable this if you want to see details */
5078 IWL_ERROR("uCode INST section is invalid at "
5079 "offset 0x%x, is 0x%x, s/b 0x%x\n",
5080 i, val, *image);
5081 #endif
5082 rc = -EIO;
5083 errcnt++;
5084 if (errcnt >= 3)
5085 break;
5086 }
5087 }
5088
5089 iwl3945_release_nic_access(priv);
5090
5091 return rc;
5092 }
5093
5094
5095 /**
5096 * iwl3945_verify_ucode - determine which instruction image is in SRAM,
5097 * and verify its contents
5098 */
5099 static int iwl3945_verify_ucode(struct iwl3945_priv *priv)
5100 {
5101 __le32 *image;
5102 u32 len;
5103 int rc = 0;
5104
5105 /* Try bootstrap */
5106 image = (__le32 *)priv->ucode_boot.v_addr;
5107 len = priv->ucode_boot.len;
5108 rc = iwl3945_verify_inst_sparse(priv, image, len);
5109 if (rc == 0) {
5110 IWL_DEBUG_INFO("Bootstrap uCode is good in inst SRAM\n");
5111 return 0;
5112 }
5113
5114 /* Try initialize */
5115 image = (__le32 *)priv->ucode_init.v_addr;
5116 len = priv->ucode_init.len;
5117 rc = iwl3945_verify_inst_sparse(priv, image, len);
5118 if (rc == 0) {
5119 IWL_DEBUG_INFO("Initialize uCode is good in inst SRAM\n");
5120 return 0;
5121 }
5122
5123 /* Try runtime/protocol */
5124 image = (__le32 *)priv->ucode_code.v_addr;
5125 len = priv->ucode_code.len;
5126 rc = iwl3945_verify_inst_sparse(priv, image, len);
5127 if (rc == 0) {
5128 IWL_DEBUG_INFO("Runtime uCode is good in inst SRAM\n");
5129 return 0;
5130 }
5131
5132 IWL_ERROR("NO VALID UCODE IMAGE IN INSTRUCTION SRAM!!\n");
5133
5134 /* Since nothing seems to match, show first several data entries in
5135 * instruction SRAM, so maybe visual inspection will give a clue.
5136 * Selection of bootstrap image (vs. other images) is arbitrary. */
5137 image = (__le32 *)priv->ucode_boot.v_addr;
5138 len = priv->ucode_boot.len;
5139 rc = iwl3945_verify_inst_full(priv, image, len);
5140
5141 return rc;
5142 }
5143
5144
5145 /* check contents of special bootstrap uCode SRAM */
5146 static int iwl3945_verify_bsm(struct iwl3945_priv *priv)
5147 {
5148 __le32 *image = priv->ucode_boot.v_addr;
5149 u32 len = priv->ucode_boot.len;
5150 u32 reg;
5151 u32 val;
5152
5153 IWL_DEBUG_INFO("Begin verify bsm\n");
5154
5155 /* verify BSM SRAM contents */
5156 val = iwl3945_read_prph(priv, BSM_WR_DWCOUNT_REG);
5157 for (reg = BSM_SRAM_LOWER_BOUND;
5158 reg < BSM_SRAM_LOWER_BOUND + len;
5159 reg += sizeof(u32), image++) {
5160 val = iwl3945_read_prph(priv, reg);
5161 if (val != le32_to_cpu(*image)) {
5162 IWL_ERROR("BSM uCode verification failed at "
5163 "addr 0x%08X+%u (of %u), is 0x%x, s/b 0x%x\n",
5164 BSM_SRAM_LOWER_BOUND,
5165 reg - BSM_SRAM_LOWER_BOUND, len,
5166 val, le32_to_cpu(*image));
5167 return -EIO;
5168 }
5169 }
5170
5171 IWL_DEBUG_INFO("BSM bootstrap uCode image OK\n");
5172
5173 return 0;
5174 }
5175
5176 /**
5177 * iwl3945_load_bsm - Load bootstrap instructions
5178 *
5179 * BSM operation:
5180 *
5181 * The Bootstrap State Machine (BSM) stores a short bootstrap uCode program
5182 * in special SRAM that does not power down during RFKILL. When powering back
5183 * up after power-saving sleeps (or during initial uCode load), the BSM loads
5184 * the bootstrap program into the on-board processor, and starts it.
5185 *
5186 * The bootstrap program loads (via DMA) instructions and data for a new
5187 * program from host DRAM locations indicated by the host driver in the
5188 * BSM_DRAM_* registers. Once the new program is loaded, it starts
5189 * automatically.
5190 *
5191 * When initializing the NIC, the host driver points the BSM to the
5192 * "initialize" uCode image. This uCode sets up some internal data, then
5193 * notifies host via "initialize alive" that it is complete.
5194 *
5195 * The host then replaces the BSM_DRAM_* pointer values to point to the
5196 * normal runtime uCode instructions and a backup uCode data cache buffer
5197 * (filled initially with starting data values for the on-board processor),
5198 * then triggers the "initialize" uCode to load and launch the runtime uCode,
5199 * which begins normal operation.
5200 *
5201 * When doing a power-save shutdown, runtime uCode saves data SRAM into
5202 * the backup data cache in DRAM before SRAM is powered down.
5203 *
5204 * When powering back up, the BSM loads the bootstrap program. This reloads
5205 * the runtime uCode instructions and the backup data cache into SRAM,
5206 * and re-launches the runtime uCode from where it left off.
5207 */
5208 static int iwl3945_load_bsm(struct iwl3945_priv *priv)
5209 {
5210 __le32 *image = priv->ucode_boot.v_addr;
5211 u32 len = priv->ucode_boot.len;
5212 dma_addr_t pinst;
5213 dma_addr_t pdata;
5214 u32 inst_len;
5215 u32 data_len;
5216 int rc;
5217 int i;
5218 u32 done;
5219 u32 reg_offset;
5220
5221 IWL_DEBUG_INFO("Begin load bsm\n");
5222
5223 /* make sure bootstrap program is no larger than BSM's SRAM size */
5224 if (len > IWL_MAX_BSM_SIZE)
5225 return -EINVAL;
5226
5227 /* Tell bootstrap uCode where to find the "Initialize" uCode
5228 * in host DRAM ... host DRAM physical address bits 31:0 for 3945.
5229 * NOTE: iwl3945_initialize_alive_start() will replace these values,
5230 * after the "initialize" uCode has run, to point to
5231 * runtime/protocol instructions and backup data cache. */
5232 pinst = priv->ucode_init.p_addr;
5233 pdata = priv->ucode_init_data.p_addr;
5234 inst_len = priv->ucode_init.len;
5235 data_len = priv->ucode_init_data.len;
5236
5237 rc = iwl3945_grab_nic_access(priv);
5238 if (rc)
5239 return rc;
5240
5241 iwl3945_write_prph(priv, BSM_DRAM_INST_PTR_REG, pinst);
5242 iwl3945_write_prph(priv, BSM_DRAM_DATA_PTR_REG, pdata);
5243 iwl3945_write_prph(priv, BSM_DRAM_INST_BYTECOUNT_REG, inst_len);
5244 iwl3945_write_prph(priv, BSM_DRAM_DATA_BYTECOUNT_REG, data_len);
5245
5246 /* Fill BSM memory with bootstrap instructions */
5247 for (reg_offset = BSM_SRAM_LOWER_BOUND;
5248 reg_offset < BSM_SRAM_LOWER_BOUND + len;
5249 reg_offset += sizeof(u32), image++)
5250 _iwl3945_write_prph(priv, reg_offset,
5251 le32_to_cpu(*image));
5252
5253 rc = iwl3945_verify_bsm(priv);
5254 if (rc) {
5255 iwl3945_release_nic_access(priv);
5256 return rc;
5257 }
5258
5259 /* Tell BSM to copy from BSM SRAM into instruction SRAM, when asked */
5260 iwl3945_write_prph(priv, BSM_WR_MEM_SRC_REG, 0x0);
5261 iwl3945_write_prph(priv, BSM_WR_MEM_DST_REG,
5262 RTC_INST_LOWER_BOUND);
5263 iwl3945_write_prph(priv, BSM_WR_DWCOUNT_REG, len / sizeof(u32));
5264
5265 /* Load bootstrap code into instruction SRAM now,
5266 * to prepare to load "initialize" uCode */
5267 iwl3945_write_prph(priv, BSM_WR_CTRL_REG,
5268 BSM_WR_CTRL_REG_BIT_START);
5269
5270 /* Wait for load of bootstrap uCode to finish */
5271 for (i = 0; i < 100; i++) {
5272 done = iwl3945_read_prph(priv, BSM_WR_CTRL_REG);
5273 if (!(done & BSM_WR_CTRL_REG_BIT_START))
5274 break;
5275 udelay(10);
5276 }
5277 if (i < 100)
5278 IWL_DEBUG_INFO("BSM write complete, poll %d iterations\n", i);
5279 else {
5280 IWL_ERROR("BSM write did not complete!\n");
5281 return -EIO;
5282 }
5283
5284 /* Enable future boot loads whenever power management unit triggers it
5285 * (e.g. when powering back up after power-save shutdown) */
5286 iwl3945_write_prph(priv, BSM_WR_CTRL_REG,
5287 BSM_WR_CTRL_REG_BIT_START_EN);
5288
5289 iwl3945_release_nic_access(priv);
5290
5291 return 0;
5292 }
5293
5294 static void iwl3945_nic_start(struct iwl3945_priv *priv)
5295 {
5296 /* Remove all resets to allow NIC to operate */
5297 iwl3945_write32(priv, CSR_RESET, 0);
5298 }
5299
5300 /**
5301 * iwl3945_read_ucode - Read uCode images from disk file.
5302 *
5303 * Copy into buffers for card to fetch via bus-mastering
5304 */
5305 static int iwl3945_read_ucode(struct iwl3945_priv *priv)
5306 {
5307 struct iwl3945_ucode *ucode;
5308 int ret = -EINVAL, index;
5309 const struct firmware *ucode_raw;
5310 /* firmware file name contains uCode/driver compatibility version */
5311 const char *name_pre = priv->cfg->fw_name_pre;
5312 const unsigned int api_max = priv->cfg->ucode_api_max;
5313 const unsigned int api_min = priv->cfg->ucode_api_min;
5314 char buf[25];
5315 u8 *src;
5316 size_t len;
5317 u32 api_ver, inst_size, data_size, init_size, init_data_size, boot_size;
5318
5319 /* Ask kernel firmware_class module to get the boot firmware off disk.
5320 * request_firmware() is synchronous, file is in memory on return. */
5321 for (index = api_max; index >= api_min; index--) {
5322 sprintf(buf, "%s%u%s", name_pre, index, ".ucode");
5323 ret = request_firmware(&ucode_raw, buf, &priv->pci_dev->dev);
5324 if (ret < 0) {
5325 IWL_ERROR("%s firmware file req failed: Reason %d\n",
5326 buf, ret);
5327 if (ret == -ENOENT)
5328 continue;
5329 else
5330 goto error;
5331 } else {
5332 if (index < api_max)
5333 IWL_ERROR("Loaded firmware %s, which is deprecated. Please use API v%u instead.\n",
5334 buf, api_max);
5335 IWL_DEBUG_INFO("Got firmware '%s' file (%zd bytes) from disk\n",
5336 buf, ucode_raw->size);
5337 break;
5338 }
5339 }
5340
5341 if (ret < 0)
5342 goto error;
5343
5344 /* Make sure that we got at least our header! */
5345 if (ucode_raw->size < sizeof(*ucode)) {
5346 IWL_ERROR("File size way too small!\n");
5347 ret = -EINVAL;
5348 goto err_release;
5349 }
5350
5351 /* Data from ucode file: header followed by uCode images */
5352 ucode = (void *)ucode_raw->data;
5353
5354 priv->ucode_ver = le32_to_cpu(ucode->ver);
5355 api_ver = IWL_UCODE_API(priv->ucode_ver);
5356 inst_size = le32_to_cpu(ucode->inst_size);
5357 data_size = le32_to_cpu(ucode->data_size);
5358 init_size = le32_to_cpu(ucode->init_size);
5359 init_data_size = le32_to_cpu(ucode->init_data_size);
5360 boot_size = le32_to_cpu(ucode->boot_size);
5361
5362 /* api_ver should match the api version forming part of the
5363 * firmware filename ... but we don't check for that and only rely
5364 * on the API version read from firware header from here on forward */
5365
5366 if (api_ver < api_min || api_ver > api_max) {
5367 IWL_ERROR("Driver unable to support your firmware API. "
5368 "Driver supports v%u, firmware is v%u.\n",
5369 api_max, api_ver);
5370 priv->ucode_ver = 0;
5371 ret = -EINVAL;
5372 goto err_release;
5373 }
5374 if (api_ver != api_max)
5375 IWL_ERROR("Firmware has old API version. Expected %u, "
5376 "got %u. New firmware can be obtained "
5377 "from http://www.intellinuxwireless.org.\n",
5378 api_max, api_ver);
5379
5380 printk(KERN_INFO DRV_NAME " loaded firmware version %u.%u.%u.%u\n",
5381 IWL_UCODE_MAJOR(priv->ucode_ver),
5382 IWL_UCODE_MINOR(priv->ucode_ver),
5383 IWL_UCODE_API(priv->ucode_ver),
5384 IWL_UCODE_SERIAL(priv->ucode_ver));
5385 IWL_DEBUG_INFO("f/w package hdr ucode version raw = 0x%x\n",
5386 priv->ucode_ver);
5387 IWL_DEBUG_INFO("f/w package hdr runtime inst size = %u\n", inst_size);
5388 IWL_DEBUG_INFO("f/w package hdr runtime data size = %u\n", data_size);
5389 IWL_DEBUG_INFO("f/w package hdr init inst size = %u\n", init_size);
5390 IWL_DEBUG_INFO("f/w package hdr init data size = %u\n", init_data_size);
5391 IWL_DEBUG_INFO("f/w package hdr boot inst size = %u\n", boot_size);
5392
5393
5394 /* Verify size of file vs. image size info in file's header */
5395 if (ucode_raw->size < sizeof(*ucode) +
5396 inst_size + data_size + init_size +
5397 init_data_size + boot_size) {
5398
5399 IWL_DEBUG_INFO("uCode file size %d too small\n",
5400 (int)ucode_raw->size);
5401 ret = -EINVAL;
5402 goto err_release;
5403 }
5404
5405 /* Verify that uCode images will fit in card's SRAM */
5406 if (inst_size > IWL_MAX_INST_SIZE) {
5407 IWL_DEBUG_INFO("uCode instr len %d too large to fit in\n",
5408 inst_size);
5409 ret = -EINVAL;
5410 goto err_release;
5411 }
5412
5413 if (data_size > IWL_MAX_DATA_SIZE) {
5414 IWL_DEBUG_INFO("uCode data len %d too large to fit in\n",
5415 data_size);
5416 ret = -EINVAL;
5417 goto err_release;
5418 }
5419 if (init_size > IWL_MAX_INST_SIZE) {
5420 IWL_DEBUG_INFO("uCode init instr len %d too large to fit in\n",
5421 init_size);
5422 ret = -EINVAL;
5423 goto err_release;
5424 }
5425 if (init_data_size > IWL_MAX_DATA_SIZE) {
5426 IWL_DEBUG_INFO("uCode init data len %d too large to fit in\n",
5427 init_data_size);
5428 ret = -EINVAL;
5429 goto err_release;
5430 }
5431 if (boot_size > IWL_MAX_BSM_SIZE) {
5432 IWL_DEBUG_INFO("uCode boot instr len %d too large to fit in\n",
5433 boot_size);
5434 ret = -EINVAL;
5435 goto err_release;
5436 }
5437
5438 /* Allocate ucode buffers for card's bus-master loading ... */
5439
5440 /* Runtime instructions and 2 copies of data:
5441 * 1) unmodified from disk
5442 * 2) backup cache for save/restore during power-downs */
5443 priv->ucode_code.len = inst_size;
5444 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_code);
5445
5446 priv->ucode_data.len = data_size;
5447 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_data);
5448
5449 priv->ucode_data_backup.len = data_size;
5450 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_data_backup);
5451
5452 if (!priv->ucode_code.v_addr || !priv->ucode_data.v_addr ||
5453 !priv->ucode_data_backup.v_addr)
5454 goto err_pci_alloc;
5455
5456 /* Initialization instructions and data */
5457 if (init_size && init_data_size) {
5458 priv->ucode_init.len = init_size;
5459 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_init);
5460
5461 priv->ucode_init_data.len = init_data_size;
5462 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_init_data);
5463
5464 if (!priv->ucode_init.v_addr || !priv->ucode_init_data.v_addr)
5465 goto err_pci_alloc;
5466 }
5467
5468 /* Bootstrap (instructions only, no data) */
5469 if (boot_size) {
5470 priv->ucode_boot.len = boot_size;
5471 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_boot);
5472
5473 if (!priv->ucode_boot.v_addr)
5474 goto err_pci_alloc;
5475 }
5476
5477 /* Copy images into buffers for card's bus-master reads ... */
5478
5479 /* Runtime instructions (first block of data in file) */
5480 src = &ucode->data[0];
5481 len = priv->ucode_code.len;
5482 IWL_DEBUG_INFO("Copying (but not loading) uCode instr len %Zd\n", len);
5483 memcpy(priv->ucode_code.v_addr, src, len);
5484 IWL_DEBUG_INFO("uCode instr buf vaddr = 0x%p, paddr = 0x%08x\n",
5485 priv->ucode_code.v_addr, (u32)priv->ucode_code.p_addr);
5486
5487 /* Runtime data (2nd block)
5488 * NOTE: Copy into backup buffer will be done in iwl3945_up() */
5489 src = &ucode->data[inst_size];
5490 len = priv->ucode_data.len;
5491 IWL_DEBUG_INFO("Copying (but not loading) uCode data len %Zd\n", len);
5492 memcpy(priv->ucode_data.v_addr, src, len);
5493 memcpy(priv->ucode_data_backup.v_addr, src, len);
5494
5495 /* Initialization instructions (3rd block) */
5496 if (init_size) {
5497 src = &ucode->data[inst_size + data_size];
5498 len = priv->ucode_init.len;
5499 IWL_DEBUG_INFO("Copying (but not loading) init instr len %Zd\n",
5500 len);
5501 memcpy(priv->ucode_init.v_addr, src, len);
5502 }
5503
5504 /* Initialization data (4th block) */
5505 if (init_data_size) {
5506 src = &ucode->data[inst_size + data_size + init_size];
5507 len = priv->ucode_init_data.len;
5508 IWL_DEBUG_INFO("Copying (but not loading) init data len %d\n",
5509 (int)len);
5510 memcpy(priv->ucode_init_data.v_addr, src, len);
5511 }
5512
5513 /* Bootstrap instructions (5th block) */
5514 src = &ucode->data[inst_size + data_size + init_size + init_data_size];
5515 len = priv->ucode_boot.len;
5516 IWL_DEBUG_INFO("Copying (but not loading) boot instr len %d\n",
5517 (int)len);
5518 memcpy(priv->ucode_boot.v_addr, src, len);
5519
5520 /* We have our copies now, allow OS release its copies */
5521 release_firmware(ucode_raw);
5522 return 0;
5523
5524 err_pci_alloc:
5525 IWL_ERROR("failed to allocate pci memory\n");
5526 ret = -ENOMEM;
5527 iwl3945_dealloc_ucode_pci(priv);
5528
5529 err_release:
5530 release_firmware(ucode_raw);
5531
5532 error:
5533 return ret;
5534 }
5535
5536
5537 /**
5538 * iwl3945_set_ucode_ptrs - Set uCode address location
5539 *
5540 * Tell initialization uCode where to find runtime uCode.
5541 *
5542 * BSM registers initially contain pointers to initialization uCode.
5543 * We need to replace them to load runtime uCode inst and data,
5544 * and to save runtime data when powering down.
5545 */
5546 static int iwl3945_set_ucode_ptrs(struct iwl3945_priv *priv)
5547 {
5548 dma_addr_t pinst;
5549 dma_addr_t pdata;
5550 int rc = 0;
5551 unsigned long flags;
5552
5553 /* bits 31:0 for 3945 */
5554 pinst = priv->ucode_code.p_addr;
5555 pdata = priv->ucode_data_backup.p_addr;
5556
5557 spin_lock_irqsave(&priv->lock, flags);
5558 rc = iwl3945_grab_nic_access(priv);
5559 if (rc) {
5560 spin_unlock_irqrestore(&priv->lock, flags);
5561 return rc;
5562 }
5563
5564 /* Tell bootstrap uCode where to find image to load */
5565 iwl3945_write_prph(priv, BSM_DRAM_INST_PTR_REG, pinst);
5566 iwl3945_write_prph(priv, BSM_DRAM_DATA_PTR_REG, pdata);
5567 iwl3945_write_prph(priv, BSM_DRAM_DATA_BYTECOUNT_REG,
5568 priv->ucode_data.len);
5569
5570 /* Inst byte count must be last to set up, bit 31 signals uCode
5571 * that all new ptr/size info is in place */
5572 iwl3945_write_prph(priv, BSM_DRAM_INST_BYTECOUNT_REG,
5573 priv->ucode_code.len | BSM_DRAM_INST_LOAD);
5574
5575 iwl3945_release_nic_access(priv);
5576
5577 spin_unlock_irqrestore(&priv->lock, flags);
5578
5579 IWL_DEBUG_INFO("Runtime uCode pointers are set.\n");
5580
5581 return rc;
5582 }
5583
5584 /**
5585 * iwl3945_init_alive_start - Called after REPLY_ALIVE notification received
5586 *
5587 * Called after REPLY_ALIVE notification received from "initialize" uCode.
5588 *
5589 * Tell "initialize" uCode to go ahead and load the runtime uCode.
5590 */
5591 static void iwl3945_init_alive_start(struct iwl3945_priv *priv)
5592 {
5593 /* Check alive response for "valid" sign from uCode */
5594 if (priv->card_alive_init.is_valid != UCODE_VALID_OK) {
5595 /* We had an error bringing up the hardware, so take it
5596 * all the way back down so we can try again */
5597 IWL_DEBUG_INFO("Initialize Alive failed.\n");
5598 goto restart;
5599 }
5600
5601 /* Bootstrap uCode has loaded initialize uCode ... verify inst image.
5602 * This is a paranoid check, because we would not have gotten the
5603 * "initialize" alive if code weren't properly loaded. */
5604 if (iwl3945_verify_ucode(priv)) {
5605 /* Runtime instruction load was bad;
5606 * take it all the way back down so we can try again */
5607 IWL_DEBUG_INFO("Bad \"initialize\" uCode load.\n");
5608 goto restart;
5609 }
5610
5611 /* Send pointers to protocol/runtime uCode image ... init code will
5612 * load and launch runtime uCode, which will send us another "Alive"
5613 * notification. */
5614 IWL_DEBUG_INFO("Initialization Alive received.\n");
5615 if (iwl3945_set_ucode_ptrs(priv)) {
5616 /* Runtime instruction load won't happen;
5617 * take it all the way back down so we can try again */
5618 IWL_DEBUG_INFO("Couldn't set up uCode pointers.\n");
5619 goto restart;
5620 }
5621 return;
5622
5623 restart:
5624 queue_work(priv->workqueue, &priv->restart);
5625 }
5626
5627
5628 /* temporary */
5629 static int iwl3945_mac_beacon_update(struct ieee80211_hw *hw,
5630 struct sk_buff *skb);
5631
5632 /**
5633 * iwl3945_alive_start - called after REPLY_ALIVE notification received
5634 * from protocol/runtime uCode (initialization uCode's
5635 * Alive gets handled by iwl3945_init_alive_start()).
5636 */
5637 static void iwl3945_alive_start(struct iwl3945_priv *priv)
5638 {
5639 int rc = 0;
5640 int thermal_spin = 0;
5641 u32 rfkill;
5642
5643 IWL_DEBUG_INFO("Runtime Alive received.\n");
5644
5645 if (priv->card_alive.is_valid != UCODE_VALID_OK) {
5646 /* We had an error bringing up the hardware, so take it
5647 * all the way back down so we can try again */
5648 IWL_DEBUG_INFO("Alive failed.\n");
5649 goto restart;
5650 }
5651
5652 /* Initialize uCode has loaded Runtime uCode ... verify inst image.
5653 * This is a paranoid check, because we would not have gotten the
5654 * "runtime" alive if code weren't properly loaded. */
5655 if (iwl3945_verify_ucode(priv)) {
5656 /* Runtime instruction load was bad;
5657 * take it all the way back down so we can try again */
5658 IWL_DEBUG_INFO("Bad runtime uCode load.\n");
5659 goto restart;
5660 }
5661
5662 iwl3945_clear_stations_table(priv);
5663
5664 rc = iwl3945_grab_nic_access(priv);
5665 if (rc) {
5666 IWL_WARNING("Can not read RFKILL status from adapter\n");
5667 return;
5668 }
5669
5670 rfkill = iwl3945_read_prph(priv, APMG_RFKILL_REG);
5671 IWL_DEBUG_INFO("RFKILL status: 0x%x\n", rfkill);
5672 iwl3945_release_nic_access(priv);
5673
5674 if (rfkill & 0x1) {
5675 clear_bit(STATUS_RF_KILL_HW, &priv->status);
5676 /* if RFKILL is not on, then wait for thermal
5677 * sensor in adapter to kick in */
5678 while (iwl3945_hw_get_temperature(priv) == 0) {
5679 thermal_spin++;
5680 udelay(10);
5681 }
5682
5683 if (thermal_spin)
5684 IWL_DEBUG_INFO("Thermal calibration took %dus\n",
5685 thermal_spin * 10);
5686 } else
5687 set_bit(STATUS_RF_KILL_HW, &priv->status);
5688
5689 /* After the ALIVE response, we can send commands to 3945 uCode */
5690 set_bit(STATUS_ALIVE, &priv->status);
5691
5692 /* Clear out the uCode error bit if it is set */
5693 clear_bit(STATUS_FW_ERROR, &priv->status);
5694
5695 if (iwl3945_is_rfkill(priv))
5696 return;
5697
5698 ieee80211_wake_queues(priv->hw);
5699
5700 priv->active_rate = priv->rates_mask;
5701 priv->active_rate_basic = priv->rates_mask & IWL_BASIC_RATES_MASK;
5702
5703 iwl3945_send_power_mode(priv, IWL_POWER_LEVEL(priv->power_mode));
5704
5705 if (iwl3945_is_associated(priv)) {
5706 struct iwl3945_rxon_cmd *active_rxon =
5707 (struct iwl3945_rxon_cmd *)(&priv->active_rxon);
5708
5709 memcpy(&priv->staging_rxon, &priv->active_rxon,
5710 sizeof(priv->staging_rxon));
5711 active_rxon->filter_flags &= ~RXON_FILTER_ASSOC_MSK;
5712 } else {
5713 /* Initialize our rx_config data */
5714 iwl3945_connection_init_rx_config(priv, priv->iw_mode);
5715 memcpy(priv->staging_rxon.node_addr, priv->mac_addr, ETH_ALEN);
5716 }
5717
5718 /* Configure Bluetooth device coexistence support */
5719 iwl3945_send_bt_config(priv);
5720
5721 /* Configure the adapter for unassociated operation */
5722 iwl3945_commit_rxon(priv);
5723
5724 iwl3945_reg_txpower_periodic(priv);
5725
5726 iwl3945_led_register(priv);
5727
5728 IWL_DEBUG_INFO("ALIVE processing complete.\n");
5729 set_bit(STATUS_READY, &priv->status);
5730 wake_up_interruptible(&priv->wait_command_queue);
5731
5732 if (priv->error_recovering)
5733 iwl3945_error_recovery(priv);
5734
5735 /* reassociate for ADHOC mode */
5736 if (priv->vif && (priv->iw_mode == NL80211_IFTYPE_ADHOC)) {
5737 struct sk_buff *beacon = ieee80211_beacon_get(priv->hw,
5738 priv->vif);
5739 if (beacon)
5740 iwl3945_mac_beacon_update(priv->hw, beacon);
5741 }
5742
5743 return;
5744
5745 restart:
5746 queue_work(priv->workqueue, &priv->restart);
5747 }
5748
5749 static void iwl3945_cancel_deferred_work(struct iwl3945_priv *priv);
5750
5751 static void __iwl3945_down(struct iwl3945_priv *priv)
5752 {
5753 unsigned long flags;
5754 int exit_pending = test_bit(STATUS_EXIT_PENDING, &priv->status);
5755 struct ieee80211_conf *conf = NULL;
5756
5757 IWL_DEBUG_INFO(DRV_NAME " is going down\n");
5758
5759 conf = ieee80211_get_hw_conf(priv->hw);
5760
5761 if (!exit_pending)
5762 set_bit(STATUS_EXIT_PENDING, &priv->status);
5763
5764 iwl3945_led_unregister(priv);
5765 iwl3945_clear_stations_table(priv);
5766
5767 /* Unblock any waiting calls */
5768 wake_up_interruptible_all(&priv->wait_command_queue);
5769
5770 /* Wipe out the EXIT_PENDING status bit if we are not actually
5771 * exiting the module */
5772 if (!exit_pending)
5773 clear_bit(STATUS_EXIT_PENDING, &priv->status);
5774
5775 /* stop and reset the on-board processor */
5776 iwl3945_write32(priv, CSR_RESET, CSR_RESET_REG_FLAG_NEVO_RESET);
5777
5778 /* tell the device to stop sending interrupts */
5779 spin_lock_irqsave(&priv->lock, flags);
5780 iwl3945_disable_interrupts(priv);
5781 spin_unlock_irqrestore(&priv->lock, flags);
5782 iwl_synchronize_irq(priv);
5783
5784 if (priv->mac80211_registered)
5785 ieee80211_stop_queues(priv->hw);
5786
5787 /* If we have not previously called iwl3945_init() then
5788 * clear all bits but the RF Kill and SUSPEND bits and return */
5789 if (!iwl3945_is_init(priv)) {
5790 priv->status = test_bit(STATUS_RF_KILL_HW, &priv->status) <<
5791 STATUS_RF_KILL_HW |
5792 test_bit(STATUS_RF_KILL_SW, &priv->status) <<
5793 STATUS_RF_KILL_SW |
5794 test_bit(STATUS_GEO_CONFIGURED, &priv->status) <<
5795 STATUS_GEO_CONFIGURED |
5796 test_bit(STATUS_IN_SUSPEND, &priv->status) <<
5797 STATUS_IN_SUSPEND |
5798 test_bit(STATUS_EXIT_PENDING, &priv->status) <<
5799 STATUS_EXIT_PENDING;
5800 goto exit;
5801 }
5802
5803 /* ...otherwise clear out all the status bits but the RF Kill and
5804 * SUSPEND bits and continue taking the NIC down. */
5805 priv->status &= test_bit(STATUS_RF_KILL_HW, &priv->status) <<
5806 STATUS_RF_KILL_HW |
5807 test_bit(STATUS_RF_KILL_SW, &priv->status) <<
5808 STATUS_RF_KILL_SW |
5809 test_bit(STATUS_GEO_CONFIGURED, &priv->status) <<
5810 STATUS_GEO_CONFIGURED |
5811 test_bit(STATUS_IN_SUSPEND, &priv->status) <<
5812 STATUS_IN_SUSPEND |
5813 test_bit(STATUS_FW_ERROR, &priv->status) <<
5814 STATUS_FW_ERROR |
5815 test_bit(STATUS_EXIT_PENDING, &priv->status) <<
5816 STATUS_EXIT_PENDING;
5817
5818 spin_lock_irqsave(&priv->lock, flags);
5819 iwl3945_clear_bit(priv, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
5820 spin_unlock_irqrestore(&priv->lock, flags);
5821
5822 iwl3945_hw_txq_ctx_stop(priv);
5823 iwl3945_hw_rxq_stop(priv);
5824
5825 spin_lock_irqsave(&priv->lock, flags);
5826 if (!iwl3945_grab_nic_access(priv)) {
5827 iwl3945_write_prph(priv, APMG_CLK_DIS_REG,
5828 APMG_CLK_VAL_DMA_CLK_RQT);
5829 iwl3945_release_nic_access(priv);
5830 }
5831 spin_unlock_irqrestore(&priv->lock, flags);
5832
5833 udelay(5);
5834
5835 iwl3945_hw_nic_stop_master(priv);
5836 iwl3945_set_bit(priv, CSR_RESET, CSR_RESET_REG_FLAG_SW_RESET);
5837 iwl3945_hw_nic_reset(priv);
5838
5839 exit:
5840 memset(&priv->card_alive, 0, sizeof(struct iwl3945_alive_resp));
5841
5842 if (priv->ibss_beacon)
5843 dev_kfree_skb(priv->ibss_beacon);
5844 priv->ibss_beacon = NULL;
5845
5846 /* clear out any free frames */
5847 iwl3945_clear_free_frames(priv);
5848 }
5849
5850 static void iwl3945_down(struct iwl3945_priv *priv)
5851 {
5852 mutex_lock(&priv->mutex);
5853 __iwl3945_down(priv);
5854 mutex_unlock(&priv->mutex);
5855
5856 iwl3945_cancel_deferred_work(priv);
5857 }
5858
5859 #define MAX_HW_RESTARTS 5
5860
5861 static int __iwl3945_up(struct iwl3945_priv *priv)
5862 {
5863 int rc, i;
5864
5865 if (test_bit(STATUS_EXIT_PENDING, &priv->status)) {
5866 IWL_WARNING("Exit pending; will not bring the NIC up\n");
5867 return -EIO;
5868 }
5869
5870 if (test_bit(STATUS_RF_KILL_SW, &priv->status)) {
5871 IWL_WARNING("Radio disabled by SW RF kill (module "
5872 "parameter)\n");
5873 return -ENODEV;
5874 }
5875
5876 if (!priv->ucode_data_backup.v_addr || !priv->ucode_data.v_addr) {
5877 IWL_ERROR("ucode not available for device bring up\n");
5878 return -EIO;
5879 }
5880
5881 /* If platform's RF_KILL switch is NOT set to KILL */
5882 if (iwl3945_read32(priv, CSR_GP_CNTRL) &
5883 CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW)
5884 clear_bit(STATUS_RF_KILL_HW, &priv->status);
5885 else {
5886 set_bit(STATUS_RF_KILL_HW, &priv->status);
5887 if (!test_bit(STATUS_IN_SUSPEND, &priv->status)) {
5888 IWL_WARNING("Radio disabled by HW RF Kill switch\n");
5889 return -ENODEV;
5890 }
5891 }
5892
5893 iwl3945_write32(priv, CSR_INT, 0xFFFFFFFF);
5894
5895 rc = iwl3945_hw_nic_init(priv);
5896 if (rc) {
5897 IWL_ERROR("Unable to int nic\n");
5898 return rc;
5899 }
5900
5901 /* make sure rfkill handshake bits are cleared */
5902 iwl3945_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
5903 iwl3945_write32(priv, CSR_UCODE_DRV_GP1_CLR,
5904 CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
5905
5906 /* clear (again), then enable host interrupts */
5907 iwl3945_write32(priv, CSR_INT, 0xFFFFFFFF);
5908 iwl3945_enable_interrupts(priv);
5909
5910 /* really make sure rfkill handshake bits are cleared */
5911 iwl3945_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
5912 iwl3945_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
5913
5914 /* Copy original ucode data image from disk into backup cache.
5915 * This will be used to initialize the on-board processor's
5916 * data SRAM for a clean start when the runtime program first loads. */
5917 memcpy(priv->ucode_data_backup.v_addr, priv->ucode_data.v_addr,
5918 priv->ucode_data.len);
5919
5920 /* We return success when we resume from suspend and rf_kill is on. */
5921 if (test_bit(STATUS_RF_KILL_HW, &priv->status))
5922 return 0;
5923
5924 for (i = 0; i < MAX_HW_RESTARTS; i++) {
5925
5926 iwl3945_clear_stations_table(priv);
5927
5928 /* load bootstrap state machine,
5929 * load bootstrap program into processor's memory,
5930 * prepare to load the "initialize" uCode */
5931 rc = iwl3945_load_bsm(priv);
5932
5933 if (rc) {
5934 IWL_ERROR("Unable to set up bootstrap uCode: %d\n", rc);
5935 continue;
5936 }
5937
5938 /* start card; "initialize" will load runtime ucode */
5939 iwl3945_nic_start(priv);
5940
5941 IWL_DEBUG_INFO(DRV_NAME " is coming up\n");
5942
5943 return 0;
5944 }
5945
5946 set_bit(STATUS_EXIT_PENDING, &priv->status);
5947 __iwl3945_down(priv);
5948 clear_bit(STATUS_EXIT_PENDING, &priv->status);
5949
5950 /* tried to restart and config the device for as long as our
5951 * patience could withstand */
5952 IWL_ERROR("Unable to initialize device after %d attempts.\n", i);
5953 return -EIO;
5954 }
5955
5956
5957 /*****************************************************************************
5958 *
5959 * Workqueue callbacks
5960 *
5961 *****************************************************************************/
5962
5963 static void iwl3945_bg_init_alive_start(struct work_struct *data)
5964 {
5965 struct iwl3945_priv *priv =
5966 container_of(data, struct iwl3945_priv, init_alive_start.work);
5967
5968 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
5969 return;
5970
5971 mutex_lock(&priv->mutex);
5972 iwl3945_init_alive_start(priv);
5973 mutex_unlock(&priv->mutex);
5974 }
5975
5976 static void iwl3945_bg_alive_start(struct work_struct *data)
5977 {
5978 struct iwl3945_priv *priv =
5979 container_of(data, struct iwl3945_priv, alive_start.work);
5980
5981 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
5982 return;
5983
5984 mutex_lock(&priv->mutex);
5985 iwl3945_alive_start(priv);
5986 mutex_unlock(&priv->mutex);
5987 }
5988
5989 static void iwl3945_bg_rf_kill(struct work_struct *work)
5990 {
5991 struct iwl3945_priv *priv = container_of(work, struct iwl3945_priv, rf_kill);
5992
5993 wake_up_interruptible(&priv->wait_command_queue);
5994
5995 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
5996 return;
5997
5998 mutex_lock(&priv->mutex);
5999
6000 if (!iwl3945_is_rfkill(priv)) {
6001 IWL_DEBUG(IWL_DL_INFO | IWL_DL_RF_KILL,
6002 "HW and/or SW RF Kill no longer active, restarting "
6003 "device\n");
6004 if (!test_bit(STATUS_EXIT_PENDING, &priv->status))
6005 queue_work(priv->workqueue, &priv->restart);
6006 } else {
6007
6008 if (!test_bit(STATUS_RF_KILL_HW, &priv->status))
6009 IWL_DEBUG_RF_KILL("Can not turn radio back on - "
6010 "disabled by SW switch\n");
6011 else
6012 IWL_WARNING("Radio Frequency Kill Switch is On:\n"
6013 "Kill switch must be turned off for "
6014 "wireless networking to work.\n");
6015 }
6016
6017 mutex_unlock(&priv->mutex);
6018 iwl3945_rfkill_set_hw_state(priv);
6019 }
6020
6021 #define IWL_SCAN_CHECK_WATCHDOG (7 * HZ)
6022
6023 static void iwl3945_bg_scan_check(struct work_struct *data)
6024 {
6025 struct iwl3945_priv *priv =
6026 container_of(data, struct iwl3945_priv, scan_check.work);
6027
6028 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
6029 return;
6030
6031 mutex_lock(&priv->mutex);
6032 if (test_bit(STATUS_SCANNING, &priv->status) ||
6033 test_bit(STATUS_SCAN_ABORTING, &priv->status)) {
6034 IWL_DEBUG(IWL_DL_INFO | IWL_DL_SCAN,
6035 "Scan completion watchdog resetting adapter (%dms)\n",
6036 jiffies_to_msecs(IWL_SCAN_CHECK_WATCHDOG));
6037
6038 if (!test_bit(STATUS_EXIT_PENDING, &priv->status))
6039 iwl3945_send_scan_abort(priv);
6040 }
6041 mutex_unlock(&priv->mutex);
6042 }
6043
6044 static void iwl3945_bg_request_scan(struct work_struct *data)
6045 {
6046 struct iwl3945_priv *priv =
6047 container_of(data, struct iwl3945_priv, request_scan);
6048 struct iwl3945_host_cmd cmd = {
6049 .id = REPLY_SCAN_CMD,
6050 .len = sizeof(struct iwl3945_scan_cmd),
6051 .meta.flags = CMD_SIZE_HUGE,
6052 };
6053 int rc = 0;
6054 struct iwl3945_scan_cmd *scan;
6055 struct ieee80211_conf *conf = NULL;
6056 u8 n_probes = 2;
6057 enum ieee80211_band band;
6058 DECLARE_SSID_BUF(ssid);
6059
6060 conf = ieee80211_get_hw_conf(priv->hw);
6061
6062 mutex_lock(&priv->mutex);
6063
6064 if (!iwl3945_is_ready(priv)) {
6065 IWL_WARNING("request scan called when driver not ready.\n");
6066 goto done;
6067 }
6068
6069 /* Make sure the scan wasn't canceled before this queued work
6070 * was given the chance to run... */
6071 if (!test_bit(STATUS_SCANNING, &priv->status))
6072 goto done;
6073
6074 /* This should never be called or scheduled if there is currently
6075 * a scan active in the hardware. */
6076 if (test_bit(STATUS_SCAN_HW, &priv->status)) {
6077 IWL_DEBUG_INFO("Multiple concurrent scan requests in parallel. "
6078 "Ignoring second request.\n");
6079 rc = -EIO;
6080 goto done;
6081 }
6082
6083 if (test_bit(STATUS_EXIT_PENDING, &priv->status)) {
6084 IWL_DEBUG_SCAN("Aborting scan due to device shutdown\n");
6085 goto done;
6086 }
6087
6088 if (test_bit(STATUS_SCAN_ABORTING, &priv->status)) {
6089 IWL_DEBUG_HC("Scan request while abort pending. Queuing.\n");
6090 goto done;
6091 }
6092
6093 if (iwl3945_is_rfkill(priv)) {
6094 IWL_DEBUG_HC("Aborting scan due to RF Kill activation\n");
6095 goto done;
6096 }
6097
6098 if (!test_bit(STATUS_READY, &priv->status)) {
6099 IWL_DEBUG_HC("Scan request while uninitialized. Queuing.\n");
6100 goto done;
6101 }
6102
6103 if (!priv->scan_bands) {
6104 IWL_DEBUG_HC("Aborting scan due to no requested bands\n");
6105 goto done;
6106 }
6107
6108 if (!priv->scan) {
6109 priv->scan = kmalloc(sizeof(struct iwl3945_scan_cmd) +
6110 IWL_MAX_SCAN_SIZE, GFP_KERNEL);
6111 if (!priv->scan) {
6112 rc = -ENOMEM;
6113 goto done;
6114 }
6115 }
6116 scan = priv->scan;
6117 memset(scan, 0, sizeof(struct iwl3945_scan_cmd) + IWL_MAX_SCAN_SIZE);
6118
6119 scan->quiet_plcp_th = IWL_PLCP_QUIET_THRESH;
6120 scan->quiet_time = IWL_ACTIVE_QUIET_TIME;
6121
6122 if (iwl3945_is_associated(priv)) {
6123 u16 interval = 0;
6124 u32 extra;
6125 u32 suspend_time = 100;
6126 u32 scan_suspend_time = 100;
6127 unsigned long flags;
6128
6129 IWL_DEBUG_INFO("Scanning while associated...\n");
6130
6131 spin_lock_irqsave(&priv->lock, flags);
6132 interval = priv->beacon_int;
6133 spin_unlock_irqrestore(&priv->lock, flags);
6134
6135 scan->suspend_time = 0;
6136 scan->max_out_time = cpu_to_le32(200 * 1024);
6137 if (!interval)
6138 interval = suspend_time;
6139 /*
6140 * suspend time format:
6141 * 0-19: beacon interval in usec (time before exec.)
6142 * 20-23: 0
6143 * 24-31: number of beacons (suspend between channels)
6144 */
6145
6146 extra = (suspend_time / interval) << 24;
6147 scan_suspend_time = 0xFF0FFFFF &
6148 (extra | ((suspend_time % interval) * 1024));
6149
6150 scan->suspend_time = cpu_to_le32(scan_suspend_time);
6151 IWL_DEBUG_SCAN("suspend_time 0x%X beacon interval %d\n",
6152 scan_suspend_time, interval);
6153 }
6154
6155 /* We should add the ability for user to lock to PASSIVE ONLY */
6156 if (priv->one_direct_scan) {
6157 IWL_DEBUG_SCAN
6158 ("Kicking off one direct scan for '%s'\n",
6159 print_ssid(ssid, priv->direct_ssid,
6160 priv->direct_ssid_len));
6161 scan->direct_scan[0].id = WLAN_EID_SSID;
6162 scan->direct_scan[0].len = priv->direct_ssid_len;
6163 memcpy(scan->direct_scan[0].ssid,
6164 priv->direct_ssid, priv->direct_ssid_len);
6165 n_probes++;
6166 } else
6167 IWL_DEBUG_SCAN("Kicking off one indirect scan.\n");
6168
6169 /* We don't build a direct scan probe request; the uCode will do
6170 * that based on the direct_mask added to each channel entry */
6171 scan->tx_cmd.len = cpu_to_le16(
6172 iwl3945_fill_probe_req(priv, (struct ieee80211_mgmt *)scan->data,
6173 IWL_MAX_SCAN_SIZE - sizeof(*scan)));
6174 scan->tx_cmd.tx_flags = TX_CMD_FLG_SEQ_CTL_MSK;
6175 scan->tx_cmd.sta_id = priv->hw_setting.bcast_sta_id;
6176 scan->tx_cmd.stop_time.life_time = TX_CMD_LIFE_TIME_INFINITE;
6177
6178 /* flags + rate selection */
6179
6180 if (priv->scan_bands & BIT(IEEE80211_BAND_2GHZ)) {
6181 scan->flags = RXON_FLG_BAND_24G_MSK | RXON_FLG_AUTO_DETECT_MSK;
6182 scan->tx_cmd.rate = IWL_RATE_1M_PLCP;
6183 scan->good_CRC_th = 0;
6184 band = IEEE80211_BAND_2GHZ;
6185 } else if (priv->scan_bands & BIT(IEEE80211_BAND_5GHZ)) {
6186 scan->tx_cmd.rate = IWL_RATE_6M_PLCP;
6187 scan->good_CRC_th = IWL_GOOD_CRC_TH;
6188 band = IEEE80211_BAND_5GHZ;
6189 } else {
6190 IWL_WARNING("Invalid scan band count\n");
6191 goto done;
6192 }
6193
6194 /* select Rx antennas */
6195 scan->flags |= iwl3945_get_antenna_flags(priv);
6196
6197 if (priv->iw_mode == NL80211_IFTYPE_MONITOR)
6198 scan->filter_flags = RXON_FILTER_PROMISC_MSK;
6199
6200 scan->channel_count =
6201 iwl3945_get_channels_for_scan(priv, band, 1, /* active */
6202 n_probes,
6203 (void *)&scan->data[le16_to_cpu(scan->tx_cmd.len)]);
6204
6205 if (scan->channel_count == 0) {
6206 IWL_DEBUG_SCAN("channel count %d\n", scan->channel_count);
6207 goto done;
6208 }
6209
6210 cmd.len += le16_to_cpu(scan->tx_cmd.len) +
6211 scan->channel_count * sizeof(struct iwl3945_scan_channel);
6212 cmd.data = scan;
6213 scan->len = cpu_to_le16(cmd.len);
6214
6215 set_bit(STATUS_SCAN_HW, &priv->status);
6216 rc = iwl3945_send_cmd_sync(priv, &cmd);
6217 if (rc)
6218 goto done;
6219
6220 queue_delayed_work(priv->workqueue, &priv->scan_check,
6221 IWL_SCAN_CHECK_WATCHDOG);
6222
6223 mutex_unlock(&priv->mutex);
6224 return;
6225
6226 done:
6227 /* can not perform scan make sure we clear scanning
6228 * bits from status so next scan request can be performed.
6229 * if we dont clear scanning status bit here all next scan
6230 * will fail
6231 */
6232 clear_bit(STATUS_SCAN_HW, &priv->status);
6233 clear_bit(STATUS_SCANNING, &priv->status);
6234
6235 /* inform mac80211 scan aborted */
6236 queue_work(priv->workqueue, &priv->scan_completed);
6237 mutex_unlock(&priv->mutex);
6238 }
6239
6240 static void iwl3945_bg_up(struct work_struct *data)
6241 {
6242 struct iwl3945_priv *priv = container_of(data, struct iwl3945_priv, up);
6243
6244 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
6245 return;
6246
6247 mutex_lock(&priv->mutex);
6248 __iwl3945_up(priv);
6249 mutex_unlock(&priv->mutex);
6250 iwl3945_rfkill_set_hw_state(priv);
6251 }
6252
6253 static void iwl3945_bg_restart(struct work_struct *data)
6254 {
6255 struct iwl3945_priv *priv = container_of(data, struct iwl3945_priv, restart);
6256
6257 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
6258 return;
6259
6260 iwl3945_down(priv);
6261 queue_work(priv->workqueue, &priv->up);
6262 }
6263
6264 static void iwl3945_bg_rx_replenish(struct work_struct *data)
6265 {
6266 struct iwl3945_priv *priv =
6267 container_of(data, struct iwl3945_priv, rx_replenish);
6268
6269 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
6270 return;
6271
6272 mutex_lock(&priv->mutex);
6273 iwl3945_rx_replenish(priv);
6274 mutex_unlock(&priv->mutex);
6275 }
6276
6277 #define IWL_DELAY_NEXT_SCAN (HZ*2)
6278
6279 static void iwl3945_post_associate(struct iwl3945_priv *priv)
6280 {
6281 int rc = 0;
6282 struct ieee80211_conf *conf = NULL;
6283
6284 if (priv->iw_mode == NL80211_IFTYPE_AP) {
6285 IWL_ERROR("%s Should not be called in AP mode\n", __func__);
6286 return;
6287 }
6288
6289
6290 IWL_DEBUG_ASSOC("Associated as %d to: %pM\n",
6291 priv->assoc_id, priv->active_rxon.bssid_addr);
6292
6293 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
6294 return;
6295
6296 if (!priv->vif || !priv->is_open)
6297 return;
6298
6299 iwl3945_scan_cancel_timeout(priv, 200);
6300
6301 conf = ieee80211_get_hw_conf(priv->hw);
6302
6303 priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
6304 iwl3945_commit_rxon(priv);
6305
6306 memset(&priv->rxon_timing, 0, sizeof(struct iwl_rxon_time_cmd));
6307 iwl3945_setup_rxon_timing(priv);
6308 rc = iwl3945_send_cmd_pdu(priv, REPLY_RXON_TIMING,
6309 sizeof(priv->rxon_timing), &priv->rxon_timing);
6310 if (rc)
6311 IWL_WARNING("REPLY_RXON_TIMING failed - "
6312 "Attempting to continue.\n");
6313
6314 priv->staging_rxon.filter_flags |= RXON_FILTER_ASSOC_MSK;
6315
6316 priv->staging_rxon.assoc_id = cpu_to_le16(priv->assoc_id);
6317
6318 IWL_DEBUG_ASSOC("assoc id %d beacon interval %d\n",
6319 priv->assoc_id, priv->beacon_int);
6320
6321 if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_PREAMBLE)
6322 priv->staging_rxon.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
6323 else
6324 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
6325
6326 if (priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) {
6327 if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_SLOT_TIME)
6328 priv->staging_rxon.flags |= RXON_FLG_SHORT_SLOT_MSK;
6329 else
6330 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
6331
6332 if (priv->iw_mode == NL80211_IFTYPE_ADHOC)
6333 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
6334
6335 }
6336
6337 iwl3945_commit_rxon(priv);
6338
6339 switch (priv->iw_mode) {
6340 case NL80211_IFTYPE_STATION:
6341 iwl3945_rate_scale_init(priv->hw, IWL_AP_ID);
6342 break;
6343
6344 case NL80211_IFTYPE_ADHOC:
6345
6346 priv->assoc_id = 1;
6347 iwl3945_add_station(priv, priv->bssid, 0, 0);
6348 iwl3945_sync_sta(priv, IWL_STA_ID,
6349 (priv->band == IEEE80211_BAND_5GHZ) ?
6350 IWL_RATE_6M_PLCP : IWL_RATE_1M_PLCP,
6351 CMD_ASYNC);
6352 iwl3945_rate_scale_init(priv->hw, IWL_STA_ID);
6353 iwl3945_send_beacon_cmd(priv);
6354
6355 break;
6356
6357 default:
6358 IWL_ERROR("%s Should not be called in %d mode\n",
6359 __func__, priv->iw_mode);
6360 break;
6361 }
6362
6363 iwl3945_activate_qos(priv, 0);
6364
6365 /* we have just associated, don't start scan too early */
6366 priv->next_scan_jiffies = jiffies + IWL_DELAY_NEXT_SCAN;
6367 }
6368
6369 static void iwl3945_bg_abort_scan(struct work_struct *work)
6370 {
6371 struct iwl3945_priv *priv = container_of(work, struct iwl3945_priv, abort_scan);
6372
6373 if (!iwl3945_is_ready(priv))
6374 return;
6375
6376 mutex_lock(&priv->mutex);
6377
6378 set_bit(STATUS_SCAN_ABORTING, &priv->status);
6379 iwl3945_send_scan_abort(priv);
6380
6381 mutex_unlock(&priv->mutex);
6382 }
6383
6384 static int iwl3945_mac_config(struct ieee80211_hw *hw, u32 changed);
6385
6386 static void iwl3945_bg_scan_completed(struct work_struct *work)
6387 {
6388 struct iwl3945_priv *priv =
6389 container_of(work, struct iwl3945_priv, scan_completed);
6390
6391 IWL_DEBUG(IWL_DL_INFO | IWL_DL_SCAN, "SCAN complete scan\n");
6392
6393 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
6394 return;
6395
6396 if (test_bit(STATUS_CONF_PENDING, &priv->status))
6397 iwl3945_mac_config(priv->hw, 0);
6398
6399 ieee80211_scan_completed(priv->hw);
6400
6401 /* Since setting the TXPOWER may have been deferred while
6402 * performing the scan, fire one off */
6403 mutex_lock(&priv->mutex);
6404 iwl3945_hw_reg_send_txpower(priv);
6405 mutex_unlock(&priv->mutex);
6406 }
6407
6408 /*****************************************************************************
6409 *
6410 * mac80211 entry point functions
6411 *
6412 *****************************************************************************/
6413
6414 #define UCODE_READY_TIMEOUT (2 * HZ)
6415
6416 static int iwl3945_mac_start(struct ieee80211_hw *hw)
6417 {
6418 struct iwl3945_priv *priv = hw->priv;
6419 int ret;
6420
6421 IWL_DEBUG_MAC80211("enter\n");
6422
6423 if (pci_enable_device(priv->pci_dev)) {
6424 IWL_ERROR("Fail to pci_enable_device\n");
6425 return -ENODEV;
6426 }
6427 pci_restore_state(priv->pci_dev);
6428 pci_enable_msi(priv->pci_dev);
6429
6430 ret = request_irq(priv->pci_dev->irq, iwl3945_isr, IRQF_SHARED,
6431 DRV_NAME, priv);
6432 if (ret) {
6433 IWL_ERROR("Error allocating IRQ %d\n", priv->pci_dev->irq);
6434 goto out_disable_msi;
6435 }
6436
6437 /* we should be verifying the device is ready to be opened */
6438 mutex_lock(&priv->mutex);
6439
6440 memset(&priv->staging_rxon, 0, sizeof(struct iwl3945_rxon_cmd));
6441 /* fetch ucode file from disk, alloc and copy to bus-master buffers ...
6442 * ucode filename and max sizes are card-specific. */
6443
6444 if (!priv->ucode_code.len) {
6445 ret = iwl3945_read_ucode(priv);
6446 if (ret) {
6447 IWL_ERROR("Could not read microcode: %d\n", ret);
6448 mutex_unlock(&priv->mutex);
6449 goto out_release_irq;
6450 }
6451 }
6452
6453 ret = __iwl3945_up(priv);
6454
6455 mutex_unlock(&priv->mutex);
6456
6457 iwl3945_rfkill_set_hw_state(priv);
6458
6459 if (ret)
6460 goto out_release_irq;
6461
6462 IWL_DEBUG_INFO("Start UP work.\n");
6463
6464 if (test_bit(STATUS_IN_SUSPEND, &priv->status))
6465 return 0;
6466
6467 /* Wait for START_ALIVE from ucode. Otherwise callbacks from
6468 * mac80211 will not be run successfully. */
6469 ret = wait_event_interruptible_timeout(priv->wait_command_queue,
6470 test_bit(STATUS_READY, &priv->status),
6471 UCODE_READY_TIMEOUT);
6472 if (!ret) {
6473 if (!test_bit(STATUS_READY, &priv->status)) {
6474 IWL_ERROR("Wait for START_ALIVE timeout after %dms.\n",
6475 jiffies_to_msecs(UCODE_READY_TIMEOUT));
6476 ret = -ETIMEDOUT;
6477 goto out_release_irq;
6478 }
6479 }
6480
6481 priv->is_open = 1;
6482 IWL_DEBUG_MAC80211("leave\n");
6483 return 0;
6484
6485 out_release_irq:
6486 free_irq(priv->pci_dev->irq, priv);
6487 out_disable_msi:
6488 pci_disable_msi(priv->pci_dev);
6489 pci_disable_device(priv->pci_dev);
6490 priv->is_open = 0;
6491 IWL_DEBUG_MAC80211("leave - failed\n");
6492 return ret;
6493 }
6494
6495 static void iwl3945_mac_stop(struct ieee80211_hw *hw)
6496 {
6497 struct iwl3945_priv *priv = hw->priv;
6498
6499 IWL_DEBUG_MAC80211("enter\n");
6500
6501 if (!priv->is_open) {
6502 IWL_DEBUG_MAC80211("leave - skip\n");
6503 return;
6504 }
6505
6506 priv->is_open = 0;
6507
6508 if (iwl3945_is_ready_rf(priv)) {
6509 /* stop mac, cancel any scan request and clear
6510 * RXON_FILTER_ASSOC_MSK BIT
6511 */
6512 mutex_lock(&priv->mutex);
6513 iwl3945_scan_cancel_timeout(priv, 100);
6514 mutex_unlock(&priv->mutex);
6515 }
6516
6517 iwl3945_down(priv);
6518
6519 flush_workqueue(priv->workqueue);
6520 free_irq(priv->pci_dev->irq, priv);
6521 pci_disable_msi(priv->pci_dev);
6522 pci_save_state(priv->pci_dev);
6523 pci_disable_device(priv->pci_dev);
6524
6525 IWL_DEBUG_MAC80211("leave\n");
6526 }
6527
6528 static int iwl3945_mac_tx(struct ieee80211_hw *hw, struct sk_buff *skb)
6529 {
6530 struct iwl3945_priv *priv = hw->priv;
6531
6532 IWL_DEBUG_MAC80211("enter\n");
6533
6534 IWL_DEBUG_TX("dev->xmit(%d bytes) at rate 0x%02x\n", skb->len,
6535 ieee80211_get_tx_rate(hw, IEEE80211_SKB_CB(skb))->bitrate);
6536
6537 if (iwl3945_tx_skb(priv, skb))
6538 dev_kfree_skb_any(skb);
6539
6540 IWL_DEBUG_MAC80211("leave\n");
6541 return NETDEV_TX_OK;
6542 }
6543
6544 static int iwl3945_mac_add_interface(struct ieee80211_hw *hw,
6545 struct ieee80211_if_init_conf *conf)
6546 {
6547 struct iwl3945_priv *priv = hw->priv;
6548 unsigned long flags;
6549
6550 IWL_DEBUG_MAC80211("enter: type %d\n", conf->type);
6551
6552 if (priv->vif) {
6553 IWL_DEBUG_MAC80211("leave - vif != NULL\n");
6554 return -EOPNOTSUPP;
6555 }
6556
6557 spin_lock_irqsave(&priv->lock, flags);
6558 priv->vif = conf->vif;
6559 priv->iw_mode = conf->type;
6560
6561 spin_unlock_irqrestore(&priv->lock, flags);
6562
6563 mutex_lock(&priv->mutex);
6564
6565 if (conf->mac_addr) {
6566 IWL_DEBUG_MAC80211("Set: %pM\n", conf->mac_addr);
6567 memcpy(priv->mac_addr, conf->mac_addr, ETH_ALEN);
6568 }
6569
6570 if (iwl3945_is_ready(priv))
6571 iwl3945_set_mode(priv, conf->type);
6572
6573 mutex_unlock(&priv->mutex);
6574
6575 IWL_DEBUG_MAC80211("leave\n");
6576 return 0;
6577 }
6578
6579 /**
6580 * iwl3945_mac_config - mac80211 config callback
6581 *
6582 * We ignore conf->flags & IEEE80211_CONF_SHORT_SLOT_TIME since it seems to
6583 * be set inappropriately and the driver currently sets the hardware up to
6584 * use it whenever needed.
6585 */
6586 static int iwl3945_mac_config(struct ieee80211_hw *hw, u32 changed)
6587 {
6588 struct iwl3945_priv *priv = hw->priv;
6589 const struct iwl3945_channel_info *ch_info;
6590 struct ieee80211_conf *conf = &hw->conf;
6591 unsigned long flags;
6592 int ret = 0;
6593
6594 mutex_lock(&priv->mutex);
6595 IWL_DEBUG_MAC80211("enter to channel %d\n", conf->channel->hw_value);
6596
6597 if (!iwl3945_is_ready(priv)) {
6598 IWL_DEBUG_MAC80211("leave - not ready\n");
6599 ret = -EIO;
6600 goto out;
6601 }
6602
6603 if (unlikely(!iwl3945_param_disable_hw_scan &&
6604 test_bit(STATUS_SCANNING, &priv->status))) {
6605 IWL_DEBUG_MAC80211("leave - scanning\n");
6606 set_bit(STATUS_CONF_PENDING, &priv->status);
6607 mutex_unlock(&priv->mutex);
6608 return 0;
6609 }
6610
6611 spin_lock_irqsave(&priv->lock, flags);
6612
6613 ch_info = iwl3945_get_channel_info(priv, conf->channel->band,
6614 conf->channel->hw_value);
6615 if (!is_channel_valid(ch_info)) {
6616 IWL_DEBUG_SCAN("Channel %d [%d] is INVALID for this band.\n",
6617 conf->channel->hw_value, conf->channel->band);
6618 IWL_DEBUG_MAC80211("leave - invalid channel\n");
6619 spin_unlock_irqrestore(&priv->lock, flags);
6620 ret = -EINVAL;
6621 goto out;
6622 }
6623
6624 iwl3945_set_rxon_channel(priv, conf->channel->band, conf->channel->hw_value);
6625
6626 iwl3945_set_flags_for_phymode(priv, conf->channel->band);
6627
6628 /* The list of supported rates and rate mask can be different
6629 * for each phymode; since the phymode may have changed, reset
6630 * the rate mask to what mac80211 lists */
6631 iwl3945_set_rate(priv);
6632
6633 spin_unlock_irqrestore(&priv->lock, flags);
6634
6635 #ifdef IEEE80211_CONF_CHANNEL_SWITCH
6636 if (conf->flags & IEEE80211_CONF_CHANNEL_SWITCH) {
6637 iwl3945_hw_channel_switch(priv, conf->channel);
6638 goto out;
6639 }
6640 #endif
6641
6642 iwl3945_radio_kill_sw(priv, !conf->radio_enabled);
6643
6644 if (!conf->radio_enabled) {
6645 IWL_DEBUG_MAC80211("leave - radio disabled\n");
6646 goto out;
6647 }
6648
6649 if (iwl3945_is_rfkill(priv)) {
6650 IWL_DEBUG_MAC80211("leave - RF kill\n");
6651 ret = -EIO;
6652 goto out;
6653 }
6654
6655 iwl3945_set_rate(priv);
6656
6657 if (memcmp(&priv->active_rxon,
6658 &priv->staging_rxon, sizeof(priv->staging_rxon)))
6659 iwl3945_commit_rxon(priv);
6660 else
6661 IWL_DEBUG_INFO("No re-sending same RXON configuration.\n");
6662
6663 IWL_DEBUG_MAC80211("leave\n");
6664
6665 out:
6666 clear_bit(STATUS_CONF_PENDING, &priv->status);
6667 mutex_unlock(&priv->mutex);
6668 return ret;
6669 }
6670
6671 static void iwl3945_config_ap(struct iwl3945_priv *priv)
6672 {
6673 int rc = 0;
6674
6675 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
6676 return;
6677
6678 /* The following should be done only at AP bring up */
6679 if (!(iwl3945_is_associated(priv))) {
6680
6681 /* RXON - unassoc (to set timing command) */
6682 priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
6683 iwl3945_commit_rxon(priv);
6684
6685 /* RXON Timing */
6686 memset(&priv->rxon_timing, 0, sizeof(struct iwl_rxon_time_cmd));
6687 iwl3945_setup_rxon_timing(priv);
6688 rc = iwl3945_send_cmd_pdu(priv, REPLY_RXON_TIMING,
6689 sizeof(priv->rxon_timing), &priv->rxon_timing);
6690 if (rc)
6691 IWL_WARNING("REPLY_RXON_TIMING failed - "
6692 "Attempting to continue.\n");
6693
6694 /* FIXME: what should be the assoc_id for AP? */
6695 priv->staging_rxon.assoc_id = cpu_to_le16(priv->assoc_id);
6696 if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_PREAMBLE)
6697 priv->staging_rxon.flags |=
6698 RXON_FLG_SHORT_PREAMBLE_MSK;
6699 else
6700 priv->staging_rxon.flags &=
6701 ~RXON_FLG_SHORT_PREAMBLE_MSK;
6702
6703 if (priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) {
6704 if (priv->assoc_capability &
6705 WLAN_CAPABILITY_SHORT_SLOT_TIME)
6706 priv->staging_rxon.flags |=
6707 RXON_FLG_SHORT_SLOT_MSK;
6708 else
6709 priv->staging_rxon.flags &=
6710 ~RXON_FLG_SHORT_SLOT_MSK;
6711
6712 if (priv->iw_mode == NL80211_IFTYPE_ADHOC)
6713 priv->staging_rxon.flags &=
6714 ~RXON_FLG_SHORT_SLOT_MSK;
6715 }
6716 /* restore RXON assoc */
6717 priv->staging_rxon.filter_flags |= RXON_FILTER_ASSOC_MSK;
6718 iwl3945_commit_rxon(priv);
6719 iwl3945_add_station(priv, iwl3945_broadcast_addr, 0, 0);
6720 }
6721 iwl3945_send_beacon_cmd(priv);
6722
6723 /* FIXME - we need to add code here to detect a totally new
6724 * configuration, reset the AP, unassoc, rxon timing, assoc,
6725 * clear sta table, add BCAST sta... */
6726 }
6727
6728 static int iwl3945_mac_config_interface(struct ieee80211_hw *hw,
6729 struct ieee80211_vif *vif,
6730 struct ieee80211_if_conf *conf)
6731 {
6732 struct iwl3945_priv *priv = hw->priv;
6733 int rc;
6734
6735 if (conf == NULL)
6736 return -EIO;
6737
6738 if (priv->vif != vif) {
6739 IWL_DEBUG_MAC80211("leave - priv->vif != vif\n");
6740 return 0;
6741 }
6742
6743 /* handle this temporarily here */
6744 if (priv->iw_mode == NL80211_IFTYPE_ADHOC &&
6745 conf->changed & IEEE80211_IFCC_BEACON) {
6746 struct sk_buff *beacon = ieee80211_beacon_get(hw, vif);
6747 if (!beacon)
6748 return -ENOMEM;
6749 mutex_lock(&priv->mutex);
6750 rc = iwl3945_mac_beacon_update(hw, beacon);
6751 mutex_unlock(&priv->mutex);
6752 if (rc)
6753 return rc;
6754 }
6755
6756 if (!iwl3945_is_alive(priv))
6757 return -EAGAIN;
6758
6759 mutex_lock(&priv->mutex);
6760
6761 if (conf->bssid)
6762 IWL_DEBUG_MAC80211("bssid: %pM\n", conf->bssid);
6763
6764 /*
6765 * very dubious code was here; the probe filtering flag is never set:
6766 *
6767 if (unlikely(test_bit(STATUS_SCANNING, &priv->status)) &&
6768 !(priv->hw->flags & IEEE80211_HW_NO_PROBE_FILTERING)) {
6769 */
6770
6771 if (priv->iw_mode == NL80211_IFTYPE_AP) {
6772 if (!conf->bssid) {
6773 conf->bssid = priv->mac_addr;
6774 memcpy(priv->bssid, priv->mac_addr, ETH_ALEN);
6775 IWL_DEBUG_MAC80211("bssid was set to: %pM\n",
6776 conf->bssid);
6777 }
6778 if (priv->ibss_beacon)
6779 dev_kfree_skb(priv->ibss_beacon);
6780
6781 priv->ibss_beacon = ieee80211_beacon_get(hw, vif);
6782 }
6783
6784 if (iwl3945_is_rfkill(priv))
6785 goto done;
6786
6787 if (conf->bssid && !is_zero_ether_addr(conf->bssid) &&
6788 !is_multicast_ether_addr(conf->bssid)) {
6789 /* If there is currently a HW scan going on in the background
6790 * then we need to cancel it else the RXON below will fail. */
6791 if (iwl3945_scan_cancel_timeout(priv, 100)) {
6792 IWL_WARNING("Aborted scan still in progress "
6793 "after 100ms\n");
6794 IWL_DEBUG_MAC80211("leaving - scan abort failed.\n");
6795 mutex_unlock(&priv->mutex);
6796 return -EAGAIN;
6797 }
6798 memcpy(priv->staging_rxon.bssid_addr, conf->bssid, ETH_ALEN);
6799
6800 /* TODO: Audit driver for usage of these members and see
6801 * if mac80211 deprecates them (priv->bssid looks like it
6802 * shouldn't be there, but I haven't scanned the IBSS code
6803 * to verify) - jpk */
6804 memcpy(priv->bssid, conf->bssid, ETH_ALEN);
6805
6806 if (priv->iw_mode == NL80211_IFTYPE_AP)
6807 iwl3945_config_ap(priv);
6808 else {
6809 rc = iwl3945_commit_rxon(priv);
6810 if ((priv->iw_mode == NL80211_IFTYPE_STATION) && rc)
6811 iwl3945_add_station(priv,
6812 priv->active_rxon.bssid_addr, 1, 0);
6813 }
6814
6815 } else {
6816 iwl3945_scan_cancel_timeout(priv, 100);
6817 priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
6818 iwl3945_commit_rxon(priv);
6819 }
6820
6821 done:
6822 IWL_DEBUG_MAC80211("leave\n");
6823 mutex_unlock(&priv->mutex);
6824
6825 return 0;
6826 }
6827
6828 static void iwl3945_configure_filter(struct ieee80211_hw *hw,
6829 unsigned int changed_flags,
6830 unsigned int *total_flags,
6831 int mc_count, struct dev_addr_list *mc_list)
6832 {
6833 struct iwl3945_priv *priv = hw->priv;
6834 __le32 *filter_flags = &priv->staging_rxon.filter_flags;
6835
6836 IWL_DEBUG_MAC80211("Enter: changed: 0x%x, total: 0x%x\n",
6837 changed_flags, *total_flags);
6838
6839 if (changed_flags & (FIF_OTHER_BSS | FIF_PROMISC_IN_BSS)) {
6840 if (*total_flags & (FIF_OTHER_BSS | FIF_PROMISC_IN_BSS))
6841 *filter_flags |= RXON_FILTER_PROMISC_MSK;
6842 else
6843 *filter_flags &= ~RXON_FILTER_PROMISC_MSK;
6844 }
6845 if (changed_flags & FIF_ALLMULTI) {
6846 if (*total_flags & FIF_ALLMULTI)
6847 *filter_flags |= RXON_FILTER_ACCEPT_GRP_MSK;
6848 else
6849 *filter_flags &= ~RXON_FILTER_ACCEPT_GRP_MSK;
6850 }
6851 if (changed_flags & FIF_CONTROL) {
6852 if (*total_flags & FIF_CONTROL)
6853 *filter_flags |= RXON_FILTER_CTL2HOST_MSK;
6854 else
6855 *filter_flags &= ~RXON_FILTER_CTL2HOST_MSK;
6856 }
6857 if (changed_flags & FIF_BCN_PRBRESP_PROMISC) {
6858 if (*total_flags & FIF_BCN_PRBRESP_PROMISC)
6859 *filter_flags |= RXON_FILTER_BCON_AWARE_MSK;
6860 else
6861 *filter_flags &= ~RXON_FILTER_BCON_AWARE_MSK;
6862 }
6863
6864 /* We avoid iwl_commit_rxon here to commit the new filter flags
6865 * since mac80211 will call ieee80211_hw_config immediately.
6866 * (mc_list is not supported at this time). Otherwise, we need to
6867 * queue a background iwl_commit_rxon work.
6868 */
6869
6870 *total_flags &= FIF_OTHER_BSS | FIF_ALLMULTI | FIF_PROMISC_IN_BSS |
6871 FIF_BCN_PRBRESP_PROMISC | FIF_CONTROL;
6872 }
6873
6874 static void iwl3945_mac_remove_interface(struct ieee80211_hw *hw,
6875 struct ieee80211_if_init_conf *conf)
6876 {
6877 struct iwl3945_priv *priv = hw->priv;
6878
6879 IWL_DEBUG_MAC80211("enter\n");
6880
6881 mutex_lock(&priv->mutex);
6882
6883 if (iwl3945_is_ready_rf(priv)) {
6884 iwl3945_scan_cancel_timeout(priv, 100);
6885 priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
6886 iwl3945_commit_rxon(priv);
6887 }
6888 if (priv->vif == conf->vif) {
6889 priv->vif = NULL;
6890 memset(priv->bssid, 0, ETH_ALEN);
6891 }
6892 mutex_unlock(&priv->mutex);
6893
6894 IWL_DEBUG_MAC80211("leave\n");
6895 }
6896
6897 #define IWL_DELAY_NEXT_SCAN_AFTER_ASSOC (HZ*6)
6898
6899 static void iwl3945_bss_info_changed(struct ieee80211_hw *hw,
6900 struct ieee80211_vif *vif,
6901 struct ieee80211_bss_conf *bss_conf,
6902 u32 changes)
6903 {
6904 struct iwl3945_priv *priv = hw->priv;
6905
6906 IWL_DEBUG_MAC80211("changes = 0x%X\n", changes);
6907
6908 if (changes & BSS_CHANGED_ERP_PREAMBLE) {
6909 IWL_DEBUG_MAC80211("ERP_PREAMBLE %d\n",
6910 bss_conf->use_short_preamble);
6911 if (bss_conf->use_short_preamble)
6912 priv->staging_rxon.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
6913 else
6914 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
6915 }
6916
6917 if (changes & BSS_CHANGED_ERP_CTS_PROT) {
6918 IWL_DEBUG_MAC80211("ERP_CTS %d\n", bss_conf->use_cts_prot);
6919 if (bss_conf->use_cts_prot && (priv->band != IEEE80211_BAND_5GHZ))
6920 priv->staging_rxon.flags |= RXON_FLG_TGG_PROTECT_MSK;
6921 else
6922 priv->staging_rxon.flags &= ~RXON_FLG_TGG_PROTECT_MSK;
6923 }
6924
6925 if (changes & BSS_CHANGED_ASSOC) {
6926 IWL_DEBUG_MAC80211("ASSOC %d\n", bss_conf->assoc);
6927 /* This should never happen as this function should
6928 * never be called from interrupt context. */
6929 if (WARN_ON_ONCE(in_interrupt()))
6930 return;
6931 if (bss_conf->assoc) {
6932 priv->assoc_id = bss_conf->aid;
6933 priv->beacon_int = bss_conf->beacon_int;
6934 priv->timestamp = bss_conf->timestamp;
6935 priv->assoc_capability = bss_conf->assoc_capability;
6936 priv->next_scan_jiffies = jiffies +
6937 IWL_DELAY_NEXT_SCAN_AFTER_ASSOC;
6938 mutex_lock(&priv->mutex);
6939 iwl3945_post_associate(priv);
6940 mutex_unlock(&priv->mutex);
6941 } else {
6942 priv->assoc_id = 0;
6943 IWL_DEBUG_MAC80211("DISASSOC %d\n", bss_conf->assoc);
6944 }
6945 } else if (changes && iwl3945_is_associated(priv) && priv->assoc_id) {
6946 IWL_DEBUG_MAC80211("Associated Changes %d\n", changes);
6947 iwl3945_send_rxon_assoc(priv);
6948 }
6949
6950 }
6951
6952 static int iwl3945_mac_hw_scan(struct ieee80211_hw *hw, u8 *ssid, size_t len)
6953 {
6954 int rc = 0;
6955 unsigned long flags;
6956 struct iwl3945_priv *priv = hw->priv;
6957 DECLARE_SSID_BUF(ssid_buf);
6958
6959 IWL_DEBUG_MAC80211("enter\n");
6960
6961 mutex_lock(&priv->mutex);
6962 spin_lock_irqsave(&priv->lock, flags);
6963
6964 if (!iwl3945_is_ready_rf(priv)) {
6965 rc = -EIO;
6966 IWL_DEBUG_MAC80211("leave - not ready or exit pending\n");
6967 goto out_unlock;
6968 }
6969
6970 /* we don't schedule scan within next_scan_jiffies period */
6971 if (priv->next_scan_jiffies &&
6972 time_after(priv->next_scan_jiffies, jiffies)) {
6973 rc = -EAGAIN;
6974 goto out_unlock;
6975 }
6976 /* if we just finished scan ask for delay for a broadcast scan */
6977 if ((len == 0) && priv->last_scan_jiffies &&
6978 time_after(priv->last_scan_jiffies + IWL_DELAY_NEXT_SCAN,
6979 jiffies)) {
6980 rc = -EAGAIN;
6981 goto out_unlock;
6982 }
6983 if (len) {
6984 IWL_DEBUG_SCAN("direct scan for %s [%d]\n ",
6985 print_ssid(ssid_buf, ssid, len), (int)len);
6986
6987 priv->one_direct_scan = 1;
6988 priv->direct_ssid_len = (u8)
6989 min((u8) len, (u8) IW_ESSID_MAX_SIZE);
6990 memcpy(priv->direct_ssid, ssid, priv->direct_ssid_len);
6991 } else
6992 priv->one_direct_scan = 0;
6993
6994 rc = iwl3945_scan_initiate(priv);
6995
6996 IWL_DEBUG_MAC80211("leave\n");
6997
6998 out_unlock:
6999 spin_unlock_irqrestore(&priv->lock, flags);
7000 mutex_unlock(&priv->mutex);
7001
7002 return rc;
7003 }
7004
7005 static int iwl3945_mac_set_key(struct ieee80211_hw *hw, enum set_key_cmd cmd,
7006 const u8 *local_addr, const u8 *addr,
7007 struct ieee80211_key_conf *key)
7008 {
7009 struct iwl3945_priv *priv = hw->priv;
7010 int rc = 0;
7011 u8 sta_id;
7012
7013 IWL_DEBUG_MAC80211("enter\n");
7014
7015 if (!iwl3945_param_hwcrypto) {
7016 IWL_DEBUG_MAC80211("leave - hwcrypto disabled\n");
7017 return -EOPNOTSUPP;
7018 }
7019
7020 if (is_zero_ether_addr(addr))
7021 /* only support pairwise keys */
7022 return -EOPNOTSUPP;
7023
7024 sta_id = iwl3945_hw_find_station(priv, addr);
7025 if (sta_id == IWL_INVALID_STATION) {
7026 IWL_DEBUG_MAC80211("leave - %pM not in station map.\n",
7027 addr);
7028 return -EINVAL;
7029 }
7030
7031 mutex_lock(&priv->mutex);
7032
7033 iwl3945_scan_cancel_timeout(priv, 100);
7034
7035 switch (cmd) {
7036 case SET_KEY:
7037 rc = iwl3945_update_sta_key_info(priv, key, sta_id);
7038 if (!rc) {
7039 iwl3945_set_rxon_hwcrypto(priv, 1);
7040 iwl3945_commit_rxon(priv);
7041 key->hw_key_idx = sta_id;
7042 IWL_DEBUG_MAC80211("set_key success, using hwcrypto\n");
7043 key->flags |= IEEE80211_KEY_FLAG_GENERATE_IV;
7044 }
7045 break;
7046 case DISABLE_KEY:
7047 rc = iwl3945_clear_sta_key_info(priv, sta_id);
7048 if (!rc) {
7049 iwl3945_set_rxon_hwcrypto(priv, 0);
7050 iwl3945_commit_rxon(priv);
7051 IWL_DEBUG_MAC80211("disable hwcrypto key\n");
7052 }
7053 break;
7054 default:
7055 rc = -EINVAL;
7056 }
7057
7058 IWL_DEBUG_MAC80211("leave\n");
7059 mutex_unlock(&priv->mutex);
7060
7061 return rc;
7062 }
7063
7064 static int iwl3945_mac_conf_tx(struct ieee80211_hw *hw, u16 queue,
7065 const struct ieee80211_tx_queue_params *params)
7066 {
7067 struct iwl3945_priv *priv = hw->priv;
7068 unsigned long flags;
7069 int q;
7070
7071 IWL_DEBUG_MAC80211("enter\n");
7072
7073 if (!iwl3945_is_ready_rf(priv)) {
7074 IWL_DEBUG_MAC80211("leave - RF not ready\n");
7075 return -EIO;
7076 }
7077
7078 if (queue >= AC_NUM) {
7079 IWL_DEBUG_MAC80211("leave - queue >= AC_NUM %d\n", queue);
7080 return 0;
7081 }
7082
7083 q = AC_NUM - 1 - queue;
7084
7085 spin_lock_irqsave(&priv->lock, flags);
7086
7087 priv->qos_data.def_qos_parm.ac[q].cw_min = cpu_to_le16(params->cw_min);
7088 priv->qos_data.def_qos_parm.ac[q].cw_max = cpu_to_le16(params->cw_max);
7089 priv->qos_data.def_qos_parm.ac[q].aifsn = params->aifs;
7090 priv->qos_data.def_qos_parm.ac[q].edca_txop =
7091 cpu_to_le16((params->txop * 32));
7092
7093 priv->qos_data.def_qos_parm.ac[q].reserved1 = 0;
7094 priv->qos_data.qos_active = 1;
7095
7096 spin_unlock_irqrestore(&priv->lock, flags);
7097
7098 mutex_lock(&priv->mutex);
7099 if (priv->iw_mode == NL80211_IFTYPE_AP)
7100 iwl3945_activate_qos(priv, 1);
7101 else if (priv->assoc_id && iwl3945_is_associated(priv))
7102 iwl3945_activate_qos(priv, 0);
7103
7104 mutex_unlock(&priv->mutex);
7105
7106 IWL_DEBUG_MAC80211("leave\n");
7107 return 0;
7108 }
7109
7110 static int iwl3945_mac_get_tx_stats(struct ieee80211_hw *hw,
7111 struct ieee80211_tx_queue_stats *stats)
7112 {
7113 struct iwl3945_priv *priv = hw->priv;
7114 int i, avail;
7115 struct iwl3945_tx_queue *txq;
7116 struct iwl3945_queue *q;
7117 unsigned long flags;
7118
7119 IWL_DEBUG_MAC80211("enter\n");
7120
7121 if (!iwl3945_is_ready_rf(priv)) {
7122 IWL_DEBUG_MAC80211("leave - RF not ready\n");
7123 return -EIO;
7124 }
7125
7126 spin_lock_irqsave(&priv->lock, flags);
7127
7128 for (i = 0; i < AC_NUM; i++) {
7129 txq = &priv->txq[i];
7130 q = &txq->q;
7131 avail = iwl3945_queue_space(q);
7132
7133 stats[i].len = q->n_window - avail;
7134 stats[i].limit = q->n_window - q->high_mark;
7135 stats[i].count = q->n_window;
7136
7137 }
7138 spin_unlock_irqrestore(&priv->lock, flags);
7139
7140 IWL_DEBUG_MAC80211("leave\n");
7141
7142 return 0;
7143 }
7144
7145 static int iwl3945_mac_get_stats(struct ieee80211_hw *hw,
7146 struct ieee80211_low_level_stats *stats)
7147 {
7148 IWL_DEBUG_MAC80211("enter\n");
7149 IWL_DEBUG_MAC80211("leave\n");
7150
7151 return 0;
7152 }
7153
7154 static void iwl3945_mac_reset_tsf(struct ieee80211_hw *hw)
7155 {
7156 struct iwl3945_priv *priv = hw->priv;
7157 unsigned long flags;
7158
7159 mutex_lock(&priv->mutex);
7160 IWL_DEBUG_MAC80211("enter\n");
7161
7162 iwl3945_reset_qos(priv);
7163
7164 spin_lock_irqsave(&priv->lock, flags);
7165 priv->assoc_id = 0;
7166 priv->assoc_capability = 0;
7167 priv->call_post_assoc_from_beacon = 0;
7168
7169 /* new association get rid of ibss beacon skb */
7170 if (priv->ibss_beacon)
7171 dev_kfree_skb(priv->ibss_beacon);
7172
7173 priv->ibss_beacon = NULL;
7174
7175 priv->beacon_int = priv->hw->conf.beacon_int;
7176 priv->timestamp = 0;
7177 if ((priv->iw_mode == NL80211_IFTYPE_STATION))
7178 priv->beacon_int = 0;
7179
7180 spin_unlock_irqrestore(&priv->lock, flags);
7181
7182 if (!iwl3945_is_ready_rf(priv)) {
7183 IWL_DEBUG_MAC80211("leave - not ready\n");
7184 mutex_unlock(&priv->mutex);
7185 return;
7186 }
7187
7188 /* we are restarting association process
7189 * clear RXON_FILTER_ASSOC_MSK bit
7190 */
7191 if (priv->iw_mode != NL80211_IFTYPE_AP) {
7192 iwl3945_scan_cancel_timeout(priv, 100);
7193 priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
7194 iwl3945_commit_rxon(priv);
7195 }
7196
7197 /* Per mac80211.h: This is only used in IBSS mode... */
7198 if (priv->iw_mode != NL80211_IFTYPE_ADHOC) {
7199
7200 IWL_DEBUG_MAC80211("leave - not in IBSS\n");
7201 mutex_unlock(&priv->mutex);
7202 return;
7203 }
7204
7205 iwl3945_set_rate(priv);
7206
7207 mutex_unlock(&priv->mutex);
7208
7209 IWL_DEBUG_MAC80211("leave\n");
7210
7211 }
7212
7213 static int iwl3945_mac_beacon_update(struct ieee80211_hw *hw, struct sk_buff *skb)
7214 {
7215 struct iwl3945_priv *priv = hw->priv;
7216 unsigned long flags;
7217
7218 IWL_DEBUG_MAC80211("enter\n");
7219
7220 if (!iwl3945_is_ready_rf(priv)) {
7221 IWL_DEBUG_MAC80211("leave - RF not ready\n");
7222 return -EIO;
7223 }
7224
7225 if (priv->iw_mode != NL80211_IFTYPE_ADHOC) {
7226 IWL_DEBUG_MAC80211("leave - not IBSS\n");
7227 return -EIO;
7228 }
7229
7230 spin_lock_irqsave(&priv->lock, flags);
7231
7232 if (priv->ibss_beacon)
7233 dev_kfree_skb(priv->ibss_beacon);
7234
7235 priv->ibss_beacon = skb;
7236
7237 priv->assoc_id = 0;
7238
7239 IWL_DEBUG_MAC80211("leave\n");
7240 spin_unlock_irqrestore(&priv->lock, flags);
7241
7242 iwl3945_reset_qos(priv);
7243
7244 iwl3945_post_associate(priv);
7245
7246
7247 return 0;
7248 }
7249
7250 /*****************************************************************************
7251 *
7252 * sysfs attributes
7253 *
7254 *****************************************************************************/
7255
7256 #ifdef CONFIG_IWL3945_DEBUG
7257
7258 /*
7259 * The following adds a new attribute to the sysfs representation
7260 * of this device driver (i.e. a new file in /sys/bus/pci/drivers/iwl/)
7261 * used for controlling the debug level.
7262 *
7263 * See the level definitions in iwl for details.
7264 */
7265
7266 static ssize_t show_debug_level(struct device_driver *d, char *buf)
7267 {
7268 return sprintf(buf, "0x%08X\n", iwl3945_debug_level);
7269 }
7270 static ssize_t store_debug_level(struct device_driver *d,
7271 const char *buf, size_t count)
7272 {
7273 char *p = (char *)buf;
7274 u32 val;
7275
7276 val = simple_strtoul(p, &p, 0);
7277 if (p == buf)
7278 printk(KERN_INFO DRV_NAME
7279 ": %s is not in hex or decimal form.\n", buf);
7280 else
7281 iwl3945_debug_level = val;
7282
7283 return strnlen(buf, count);
7284 }
7285
7286 static DRIVER_ATTR(debug_level, S_IWUSR | S_IRUGO,
7287 show_debug_level, store_debug_level);
7288
7289 #endif /* CONFIG_IWL3945_DEBUG */
7290
7291 static ssize_t show_temperature(struct device *d,
7292 struct device_attribute *attr, char *buf)
7293 {
7294 struct iwl3945_priv *priv = (struct iwl3945_priv *)d->driver_data;
7295
7296 if (!iwl3945_is_alive(priv))
7297 return -EAGAIN;
7298
7299 return sprintf(buf, "%d\n", iwl3945_hw_get_temperature(priv));
7300 }
7301
7302 static DEVICE_ATTR(temperature, S_IRUGO, show_temperature, NULL);
7303
7304 static ssize_t show_tx_power(struct device *d,
7305 struct device_attribute *attr, char *buf)
7306 {
7307 struct iwl3945_priv *priv = (struct iwl3945_priv *)d->driver_data;
7308 return sprintf(buf, "%d\n", priv->user_txpower_limit);
7309 }
7310
7311 static ssize_t store_tx_power(struct device *d,
7312 struct device_attribute *attr,
7313 const char *buf, size_t count)
7314 {
7315 struct iwl3945_priv *priv = (struct iwl3945_priv *)d->driver_data;
7316 char *p = (char *)buf;
7317 u32 val;
7318
7319 val = simple_strtoul(p, &p, 10);
7320 if (p == buf)
7321 printk(KERN_INFO DRV_NAME
7322 ": %s is not in decimal form.\n", buf);
7323 else
7324 iwl3945_hw_reg_set_txpower(priv, val);
7325
7326 return count;
7327 }
7328
7329 static DEVICE_ATTR(tx_power, S_IWUSR | S_IRUGO, show_tx_power, store_tx_power);
7330
7331 static ssize_t show_flags(struct device *d,
7332 struct device_attribute *attr, char *buf)
7333 {
7334 struct iwl3945_priv *priv = (struct iwl3945_priv *)d->driver_data;
7335
7336 return sprintf(buf, "0x%04X\n", priv->active_rxon.flags);
7337 }
7338
7339 static ssize_t store_flags(struct device *d,
7340 struct device_attribute *attr,
7341 const char *buf, size_t count)
7342 {
7343 struct iwl3945_priv *priv = (struct iwl3945_priv *)d->driver_data;
7344 u32 flags = simple_strtoul(buf, NULL, 0);
7345
7346 mutex_lock(&priv->mutex);
7347 if (le32_to_cpu(priv->staging_rxon.flags) != flags) {
7348 /* Cancel any currently running scans... */
7349 if (iwl3945_scan_cancel_timeout(priv, 100))
7350 IWL_WARNING("Could not cancel scan.\n");
7351 else {
7352 IWL_DEBUG_INFO("Committing rxon.flags = 0x%04X\n",
7353 flags);
7354 priv->staging_rxon.flags = cpu_to_le32(flags);
7355 iwl3945_commit_rxon(priv);
7356 }
7357 }
7358 mutex_unlock(&priv->mutex);
7359
7360 return count;
7361 }
7362
7363 static DEVICE_ATTR(flags, S_IWUSR | S_IRUGO, show_flags, store_flags);
7364
7365 static ssize_t show_filter_flags(struct device *d,
7366 struct device_attribute *attr, char *buf)
7367 {
7368 struct iwl3945_priv *priv = (struct iwl3945_priv *)d->driver_data;
7369
7370 return sprintf(buf, "0x%04X\n",
7371 le32_to_cpu(priv->active_rxon.filter_flags));
7372 }
7373
7374 static ssize_t store_filter_flags(struct device *d,
7375 struct device_attribute *attr,
7376 const char *buf, size_t count)
7377 {
7378 struct iwl3945_priv *priv = (struct iwl3945_priv *)d->driver_data;
7379 u32 filter_flags = simple_strtoul(buf, NULL, 0);
7380
7381 mutex_lock(&priv->mutex);
7382 if (le32_to_cpu(priv->staging_rxon.filter_flags) != filter_flags) {
7383 /* Cancel any currently running scans... */
7384 if (iwl3945_scan_cancel_timeout(priv, 100))
7385 IWL_WARNING("Could not cancel scan.\n");
7386 else {
7387 IWL_DEBUG_INFO("Committing rxon.filter_flags = "
7388 "0x%04X\n", filter_flags);
7389 priv->staging_rxon.filter_flags =
7390 cpu_to_le32(filter_flags);
7391 iwl3945_commit_rxon(priv);
7392 }
7393 }
7394 mutex_unlock(&priv->mutex);
7395
7396 return count;
7397 }
7398
7399 static DEVICE_ATTR(filter_flags, S_IWUSR | S_IRUGO, show_filter_flags,
7400 store_filter_flags);
7401
7402 #ifdef CONFIG_IWL3945_SPECTRUM_MEASUREMENT
7403
7404 static ssize_t show_measurement(struct device *d,
7405 struct device_attribute *attr, char *buf)
7406 {
7407 struct iwl3945_priv *priv = dev_get_drvdata(d);
7408 struct iwl_spectrum_notification measure_report;
7409 u32 size = sizeof(measure_report), len = 0, ofs = 0;
7410 u8 *data = (u8 *)&measure_report;
7411 unsigned long flags;
7412
7413 spin_lock_irqsave(&priv->lock, flags);
7414 if (!(priv->measurement_status & MEASUREMENT_READY)) {
7415 spin_unlock_irqrestore(&priv->lock, flags);
7416 return 0;
7417 }
7418 memcpy(&measure_report, &priv->measure_report, size);
7419 priv->measurement_status = 0;
7420 spin_unlock_irqrestore(&priv->lock, flags);
7421
7422 while (size && (PAGE_SIZE - len)) {
7423 hex_dump_to_buffer(data + ofs, size, 16, 1, buf + len,
7424 PAGE_SIZE - len, 1);
7425 len = strlen(buf);
7426 if (PAGE_SIZE - len)
7427 buf[len++] = '\n';
7428
7429 ofs += 16;
7430 size -= min(size, 16U);
7431 }
7432
7433 return len;
7434 }
7435
7436 static ssize_t store_measurement(struct device *d,
7437 struct device_attribute *attr,
7438 const char *buf, size_t count)
7439 {
7440 struct iwl3945_priv *priv = dev_get_drvdata(d);
7441 struct ieee80211_measurement_params params = {
7442 .channel = le16_to_cpu(priv->active_rxon.channel),
7443 .start_time = cpu_to_le64(priv->last_tsf),
7444 .duration = cpu_to_le16(1),
7445 };
7446 u8 type = IWL_MEASURE_BASIC;
7447 u8 buffer[32];
7448 u8 channel;
7449
7450 if (count) {
7451 char *p = buffer;
7452 strncpy(buffer, buf, min(sizeof(buffer), count));
7453 channel = simple_strtoul(p, NULL, 0);
7454 if (channel)
7455 params.channel = channel;
7456
7457 p = buffer;
7458 while (*p && *p != ' ')
7459 p++;
7460 if (*p)
7461 type = simple_strtoul(p + 1, NULL, 0);
7462 }
7463
7464 IWL_DEBUG_INFO("Invoking measurement of type %d on "
7465 "channel %d (for '%s')\n", type, params.channel, buf);
7466 iwl3945_get_measurement(priv, &params, type);
7467
7468 return count;
7469 }
7470
7471 static DEVICE_ATTR(measurement, S_IRUSR | S_IWUSR,
7472 show_measurement, store_measurement);
7473 #endif /* CONFIG_IWL3945_SPECTRUM_MEASUREMENT */
7474
7475 static ssize_t store_retry_rate(struct device *d,
7476 struct device_attribute *attr,
7477 const char *buf, size_t count)
7478 {
7479 struct iwl3945_priv *priv = dev_get_drvdata(d);
7480
7481 priv->retry_rate = simple_strtoul(buf, NULL, 0);
7482 if (priv->retry_rate <= 0)
7483 priv->retry_rate = 1;
7484
7485 return count;
7486 }
7487
7488 static ssize_t show_retry_rate(struct device *d,
7489 struct device_attribute *attr, char *buf)
7490 {
7491 struct iwl3945_priv *priv = dev_get_drvdata(d);
7492 return sprintf(buf, "%d", priv->retry_rate);
7493 }
7494
7495 static DEVICE_ATTR(retry_rate, S_IWUSR | S_IRUSR, show_retry_rate,
7496 store_retry_rate);
7497
7498 static ssize_t store_power_level(struct device *d,
7499 struct device_attribute *attr,
7500 const char *buf, size_t count)
7501 {
7502 struct iwl3945_priv *priv = dev_get_drvdata(d);
7503 int rc;
7504 int mode;
7505
7506 mode = simple_strtoul(buf, NULL, 0);
7507 mutex_lock(&priv->mutex);
7508
7509 if (!iwl3945_is_ready(priv)) {
7510 rc = -EAGAIN;
7511 goto out;
7512 }
7513
7514 if ((mode < 1) || (mode > IWL_POWER_LIMIT) || (mode == IWL_POWER_AC))
7515 mode = IWL_POWER_AC;
7516 else
7517 mode |= IWL_POWER_ENABLED;
7518
7519 if (mode != priv->power_mode) {
7520 rc = iwl3945_send_power_mode(priv, IWL_POWER_LEVEL(mode));
7521 if (rc) {
7522 IWL_DEBUG_MAC80211("failed setting power mode.\n");
7523 goto out;
7524 }
7525 priv->power_mode = mode;
7526 }
7527
7528 rc = count;
7529
7530 out:
7531 mutex_unlock(&priv->mutex);
7532 return rc;
7533 }
7534
7535 #define MAX_WX_STRING 80
7536
7537 /* Values are in microsecond */
7538 static const s32 timeout_duration[] = {
7539 350000,
7540 250000,
7541 75000,
7542 37000,
7543 25000,
7544 };
7545 static const s32 period_duration[] = {
7546 400000,
7547 700000,
7548 1000000,
7549 1000000,
7550 1000000
7551 };
7552
7553 static ssize_t show_power_level(struct device *d,
7554 struct device_attribute *attr, char *buf)
7555 {
7556 struct iwl3945_priv *priv = dev_get_drvdata(d);
7557 int level = IWL_POWER_LEVEL(priv->power_mode);
7558 char *p = buf;
7559
7560 p += sprintf(p, "%d ", level);
7561 switch (level) {
7562 case IWL_POWER_MODE_CAM:
7563 case IWL_POWER_AC:
7564 p += sprintf(p, "(AC)");
7565 break;
7566 case IWL_POWER_BATTERY:
7567 p += sprintf(p, "(BATTERY)");
7568 break;
7569 default:
7570 p += sprintf(p,
7571 "(Timeout %dms, Period %dms)",
7572 timeout_duration[level - 1] / 1000,
7573 period_duration[level - 1] / 1000);
7574 }
7575
7576 if (!(priv->power_mode & IWL_POWER_ENABLED))
7577 p += sprintf(p, " OFF\n");
7578 else
7579 p += sprintf(p, " \n");
7580
7581 return p - buf + 1;
7582
7583 }
7584
7585 static DEVICE_ATTR(power_level, S_IWUSR | S_IRUSR, show_power_level,
7586 store_power_level);
7587
7588 static ssize_t show_channels(struct device *d,
7589 struct device_attribute *attr, char *buf)
7590 {
7591 /* all this shit doesn't belong into sysfs anyway */
7592 return 0;
7593 }
7594
7595 static DEVICE_ATTR(channels, S_IRUSR, show_channels, NULL);
7596
7597 static ssize_t show_statistics(struct device *d,
7598 struct device_attribute *attr, char *buf)
7599 {
7600 struct iwl3945_priv *priv = dev_get_drvdata(d);
7601 u32 size = sizeof(struct iwl3945_notif_statistics);
7602 u32 len = 0, ofs = 0;
7603 u8 *data = (u8 *)&priv->statistics;
7604 int rc = 0;
7605
7606 if (!iwl3945_is_alive(priv))
7607 return -EAGAIN;
7608
7609 mutex_lock(&priv->mutex);
7610 rc = iwl3945_send_statistics_request(priv);
7611 mutex_unlock(&priv->mutex);
7612
7613 if (rc) {
7614 len = sprintf(buf,
7615 "Error sending statistics request: 0x%08X\n", rc);
7616 return len;
7617 }
7618
7619 while (size && (PAGE_SIZE - len)) {
7620 hex_dump_to_buffer(data + ofs, size, 16, 1, buf + len,
7621 PAGE_SIZE - len, 1);
7622 len = strlen(buf);
7623 if (PAGE_SIZE - len)
7624 buf[len++] = '\n';
7625
7626 ofs += 16;
7627 size -= min(size, 16U);
7628 }
7629
7630 return len;
7631 }
7632
7633 static DEVICE_ATTR(statistics, S_IRUGO, show_statistics, NULL);
7634
7635 static ssize_t show_antenna(struct device *d,
7636 struct device_attribute *attr, char *buf)
7637 {
7638 struct iwl3945_priv *priv = dev_get_drvdata(d);
7639
7640 if (!iwl3945_is_alive(priv))
7641 return -EAGAIN;
7642
7643 return sprintf(buf, "%d\n", priv->antenna);
7644 }
7645
7646 static ssize_t store_antenna(struct device *d,
7647 struct device_attribute *attr,
7648 const char *buf, size_t count)
7649 {
7650 int ant;
7651 struct iwl3945_priv *priv = dev_get_drvdata(d);
7652
7653 if (count == 0)
7654 return 0;
7655
7656 if (sscanf(buf, "%1i", &ant) != 1) {
7657 IWL_DEBUG_INFO("not in hex or decimal form.\n");
7658 return count;
7659 }
7660
7661 if ((ant >= 0) && (ant <= 2)) {
7662 IWL_DEBUG_INFO("Setting antenna select to %d.\n", ant);
7663 priv->antenna = (enum iwl3945_antenna)ant;
7664 } else
7665 IWL_DEBUG_INFO("Bad antenna select value %d.\n", ant);
7666
7667
7668 return count;
7669 }
7670
7671 static DEVICE_ATTR(antenna, S_IWUSR | S_IRUGO, show_antenna, store_antenna);
7672
7673 static ssize_t show_status(struct device *d,
7674 struct device_attribute *attr, char *buf)
7675 {
7676 struct iwl3945_priv *priv = (struct iwl3945_priv *)d->driver_data;
7677 if (!iwl3945_is_alive(priv))
7678 return -EAGAIN;
7679 return sprintf(buf, "0x%08x\n", (int)priv->status);
7680 }
7681
7682 static DEVICE_ATTR(status, S_IRUGO, show_status, NULL);
7683
7684 static ssize_t dump_error_log(struct device *d,
7685 struct device_attribute *attr,
7686 const char *buf, size_t count)
7687 {
7688 char *p = (char *)buf;
7689
7690 if (p[0] == '1')
7691 iwl3945_dump_nic_error_log((struct iwl3945_priv *)d->driver_data);
7692
7693 return strnlen(buf, count);
7694 }
7695
7696 static DEVICE_ATTR(dump_errors, S_IWUSR, NULL, dump_error_log);
7697
7698 static ssize_t dump_event_log(struct device *d,
7699 struct device_attribute *attr,
7700 const char *buf, size_t count)
7701 {
7702 char *p = (char *)buf;
7703
7704 if (p[0] == '1')
7705 iwl3945_dump_nic_event_log((struct iwl3945_priv *)d->driver_data);
7706
7707 return strnlen(buf, count);
7708 }
7709
7710 static DEVICE_ATTR(dump_events, S_IWUSR, NULL, dump_event_log);
7711
7712 /*****************************************************************************
7713 *
7714 * driver setup and tear down
7715 *
7716 *****************************************************************************/
7717
7718 static void iwl3945_setup_deferred_work(struct iwl3945_priv *priv)
7719 {
7720 priv->workqueue = create_workqueue(DRV_NAME);
7721
7722 init_waitqueue_head(&priv->wait_command_queue);
7723
7724 INIT_WORK(&priv->up, iwl3945_bg_up);
7725 INIT_WORK(&priv->restart, iwl3945_bg_restart);
7726 INIT_WORK(&priv->rx_replenish, iwl3945_bg_rx_replenish);
7727 INIT_WORK(&priv->scan_completed, iwl3945_bg_scan_completed);
7728 INIT_WORK(&priv->request_scan, iwl3945_bg_request_scan);
7729 INIT_WORK(&priv->abort_scan, iwl3945_bg_abort_scan);
7730 INIT_WORK(&priv->rf_kill, iwl3945_bg_rf_kill);
7731 INIT_WORK(&priv->beacon_update, iwl3945_bg_beacon_update);
7732 INIT_DELAYED_WORK(&priv->init_alive_start, iwl3945_bg_init_alive_start);
7733 INIT_DELAYED_WORK(&priv->alive_start, iwl3945_bg_alive_start);
7734 INIT_DELAYED_WORK(&priv->scan_check, iwl3945_bg_scan_check);
7735
7736 iwl3945_hw_setup_deferred_work(priv);
7737
7738 tasklet_init(&priv->irq_tasklet, (void (*)(unsigned long))
7739 iwl3945_irq_tasklet, (unsigned long)priv);
7740 }
7741
7742 static void iwl3945_cancel_deferred_work(struct iwl3945_priv *priv)
7743 {
7744 iwl3945_hw_cancel_deferred_work(priv);
7745
7746 cancel_delayed_work_sync(&priv->init_alive_start);
7747 cancel_delayed_work(&priv->scan_check);
7748 cancel_delayed_work(&priv->alive_start);
7749 cancel_work_sync(&priv->beacon_update);
7750 }
7751
7752 static struct attribute *iwl3945_sysfs_entries[] = {
7753 &dev_attr_antenna.attr,
7754 &dev_attr_channels.attr,
7755 &dev_attr_dump_errors.attr,
7756 &dev_attr_dump_events.attr,
7757 &dev_attr_flags.attr,
7758 &dev_attr_filter_flags.attr,
7759 #ifdef CONFIG_IWL3945_SPECTRUM_MEASUREMENT
7760 &dev_attr_measurement.attr,
7761 #endif
7762 &dev_attr_power_level.attr,
7763 &dev_attr_retry_rate.attr,
7764 &dev_attr_statistics.attr,
7765 &dev_attr_status.attr,
7766 &dev_attr_temperature.attr,
7767 &dev_attr_tx_power.attr,
7768
7769 NULL
7770 };
7771
7772 static struct attribute_group iwl3945_attribute_group = {
7773 .name = NULL, /* put in device directory */
7774 .attrs = iwl3945_sysfs_entries,
7775 };
7776
7777 static struct ieee80211_ops iwl3945_hw_ops = {
7778 .tx = iwl3945_mac_tx,
7779 .start = iwl3945_mac_start,
7780 .stop = iwl3945_mac_stop,
7781 .add_interface = iwl3945_mac_add_interface,
7782 .remove_interface = iwl3945_mac_remove_interface,
7783 .config = iwl3945_mac_config,
7784 .config_interface = iwl3945_mac_config_interface,
7785 .configure_filter = iwl3945_configure_filter,
7786 .set_key = iwl3945_mac_set_key,
7787 .get_stats = iwl3945_mac_get_stats,
7788 .get_tx_stats = iwl3945_mac_get_tx_stats,
7789 .conf_tx = iwl3945_mac_conf_tx,
7790 .reset_tsf = iwl3945_mac_reset_tsf,
7791 .bss_info_changed = iwl3945_bss_info_changed,
7792 .hw_scan = iwl3945_mac_hw_scan
7793 };
7794
7795 static int iwl3945_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
7796 {
7797 int err = 0;
7798 struct iwl3945_priv *priv;
7799 struct ieee80211_hw *hw;
7800 struct iwl_3945_cfg *cfg = (struct iwl_3945_cfg *)(ent->driver_data);
7801 unsigned long flags;
7802
7803 /***********************
7804 * 1. Allocating HW data
7805 * ********************/
7806
7807 /* Disabling hardware scan means that mac80211 will perform scans
7808 * "the hard way", rather than using device's scan. */
7809 if (iwl3945_param_disable_hw_scan) {
7810 IWL_DEBUG_INFO("Disabling hw_scan\n");
7811 iwl3945_hw_ops.hw_scan = NULL;
7812 }
7813
7814 if ((iwl3945_param_queues_num > IWL39_MAX_NUM_QUEUES) ||
7815 (iwl3945_param_queues_num < IWL_MIN_NUM_QUEUES)) {
7816 IWL_ERROR("invalid queues_num, should be between %d and %d\n",
7817 IWL_MIN_NUM_QUEUES, IWL39_MAX_NUM_QUEUES);
7818 err = -EINVAL;
7819 goto out;
7820 }
7821
7822 /* mac80211 allocates memory for this device instance, including
7823 * space for this driver's private structure */
7824 hw = ieee80211_alloc_hw(sizeof(struct iwl3945_priv), &iwl3945_hw_ops);
7825 if (hw == NULL) {
7826 IWL_ERROR("Can not allocate network device\n");
7827 err = -ENOMEM;
7828 goto out;
7829 }
7830
7831 SET_IEEE80211_DEV(hw, &pdev->dev);
7832
7833 priv = hw->priv;
7834 priv->hw = hw;
7835 priv->pci_dev = pdev;
7836 priv->cfg = cfg;
7837
7838 IWL_DEBUG_INFO("*** LOAD DRIVER ***\n");
7839 hw->rate_control_algorithm = "iwl-3945-rs";
7840 hw->sta_data_size = sizeof(struct iwl3945_sta_priv);
7841
7842 /* Select antenna (may be helpful if only one antenna is connected) */
7843 priv->antenna = (enum iwl3945_antenna)iwl3945_param_antenna;
7844 #ifdef CONFIG_IWL3945_DEBUG
7845 iwl3945_debug_level = iwl3945_param_debug;
7846 atomic_set(&priv->restrict_refcnt, 0);
7847 #endif
7848
7849 /* Tell mac80211 our characteristics */
7850 hw->flags = IEEE80211_HW_SIGNAL_DBM |
7851 IEEE80211_HW_NOISE_DBM;
7852
7853 hw->wiphy->interface_modes =
7854 BIT(NL80211_IFTYPE_STATION) |
7855 BIT(NL80211_IFTYPE_ADHOC);
7856
7857 hw->wiphy->fw_handles_regulatory = true;
7858
7859 /* 4 EDCA QOS priorities */
7860 hw->queues = 4;
7861
7862 /***************************
7863 * 2. Initializing PCI bus
7864 * *************************/
7865 if (pci_enable_device(pdev)) {
7866 err = -ENODEV;
7867 goto out_ieee80211_free_hw;
7868 }
7869
7870 pci_set_master(pdev);
7871
7872 err = pci_set_dma_mask(pdev, DMA_32BIT_MASK);
7873 if (!err)
7874 err = pci_set_consistent_dma_mask(pdev, DMA_32BIT_MASK);
7875 if (err) {
7876 printk(KERN_WARNING DRV_NAME ": No suitable DMA available.\n");
7877 goto out_pci_disable_device;
7878 }
7879
7880 pci_set_drvdata(pdev, priv);
7881 err = pci_request_regions(pdev, DRV_NAME);
7882 if (err)
7883 goto out_pci_disable_device;
7884
7885 /***********************
7886 * 3. Read REV Register
7887 * ********************/
7888 priv->hw_base = pci_iomap(pdev, 0, 0);
7889 if (!priv->hw_base) {
7890 err = -ENODEV;
7891 goto out_pci_release_regions;
7892 }
7893
7894 IWL_DEBUG_INFO("pci_resource_len = 0x%08llx\n",
7895 (unsigned long long) pci_resource_len(pdev, 0));
7896 IWL_DEBUG_INFO("pci_resource_base = %p\n", priv->hw_base);
7897
7898 /* We disable the RETRY_TIMEOUT register (0x41) to keep
7899 * PCI Tx retries from interfering with C3 CPU state */
7900 pci_write_config_byte(pdev, 0x41, 0x00);
7901
7902 /* nic init */
7903 iwl3945_set_bit(priv, CSR_GIO_CHICKEN_BITS,
7904 CSR_GIO_CHICKEN_BITS_REG_BIT_DIS_L0S_EXIT_TIMER);
7905
7906 iwl3945_set_bit(priv, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_INIT_DONE);
7907 err = iwl3945_poll_direct_bit(priv, CSR_GP_CNTRL,
7908 CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY, 25000);
7909 if (err < 0) {
7910 IWL_DEBUG_INFO("Failed to init the card\n");
7911 goto out_remove_sysfs;
7912 }
7913
7914 /***********************
7915 * 4. Read EEPROM
7916 * ********************/
7917 /* Read the EEPROM */
7918 err = iwl3945_eeprom_init(priv);
7919 if (err) {
7920 IWL_ERROR("Unable to init EEPROM\n");
7921 goto out_remove_sysfs;
7922 }
7923 /* MAC Address location in EEPROM same for 3945/4965 */
7924 get_eeprom_mac(priv, priv->mac_addr);
7925 IWL_DEBUG_INFO("MAC address: %pM\n", priv->mac_addr);
7926 SET_IEEE80211_PERM_ADDR(priv->hw, priv->mac_addr);
7927
7928 /***********************
7929 * 5. Setup HW Constants
7930 * ********************/
7931 /* Device-specific setup */
7932 if (iwl3945_hw_set_hw_setting(priv)) {
7933 IWL_ERROR("failed to set hw settings\n");
7934 goto out_iounmap;
7935 }
7936
7937 /***********************
7938 * 6. Setup priv
7939 * ********************/
7940 priv->retry_rate = 1;
7941 priv->ibss_beacon = NULL;
7942
7943 spin_lock_init(&priv->lock);
7944 spin_lock_init(&priv->power_data.lock);
7945 spin_lock_init(&priv->sta_lock);
7946 spin_lock_init(&priv->hcmd_lock);
7947
7948 INIT_LIST_HEAD(&priv->free_frames);
7949 mutex_init(&priv->mutex);
7950
7951 /* Clear the driver's (not device's) station table */
7952 iwl3945_clear_stations_table(priv);
7953
7954 priv->data_retry_limit = -1;
7955 priv->ieee_channels = NULL;
7956 priv->ieee_rates = NULL;
7957 priv->band = IEEE80211_BAND_2GHZ;
7958
7959 priv->iw_mode = NL80211_IFTYPE_STATION;
7960
7961 iwl3945_reset_qos(priv);
7962
7963 priv->qos_data.qos_active = 0;
7964 priv->qos_data.qos_cap.val = 0;
7965
7966
7967 priv->rates_mask = IWL_RATES_MASK;
7968 /* If power management is turned on, default to AC mode */
7969 priv->power_mode = IWL_POWER_AC;
7970 priv->user_txpower_limit = IWL_DEFAULT_TX_POWER;
7971
7972 err = iwl3945_init_channel_map(priv);
7973 if (err) {
7974 IWL_ERROR("initializing regulatory failed: %d\n", err);
7975 goto out_release_irq;
7976 }
7977
7978 err = iwl3945_init_geos(priv);
7979 if (err) {
7980 IWL_ERROR("initializing geos failed: %d\n", err);
7981 goto out_free_channel_map;
7982 }
7983
7984 printk(KERN_INFO DRV_NAME
7985 ": Detected Intel Wireless WiFi Link %s\n", priv->cfg->name);
7986
7987 /***********************************
7988 * 7. Initialize Module Parameters
7989 * **********************************/
7990
7991 /* Initialize module parameter values here */
7992 /* Disable radio (SW RF KILL) via parameter when loading driver */
7993 if (iwl3945_param_disable) {
7994 set_bit(STATUS_RF_KILL_SW, &priv->status);
7995 IWL_DEBUG_INFO("Radio disabled.\n");
7996 }
7997
7998
7999 /***********************
8000 * 8. Setup Services
8001 * ********************/
8002
8003 spin_lock_irqsave(&priv->lock, flags);
8004 iwl3945_disable_interrupts(priv);
8005 spin_unlock_irqrestore(&priv->lock, flags);
8006
8007 err = sysfs_create_group(&pdev->dev.kobj, &iwl3945_attribute_group);
8008 if (err) {
8009 IWL_ERROR("failed to create sysfs device attributes\n");
8010 goto out_free_geos;
8011 }
8012
8013 iwl3945_set_rxon_channel(priv, IEEE80211_BAND_2GHZ, 6);
8014 iwl3945_setup_deferred_work(priv);
8015 iwl3945_setup_rx_handlers(priv);
8016
8017 /***********************
8018 * 9. Conclude
8019 * ********************/
8020 pci_save_state(pdev);
8021 pci_disable_device(pdev);
8022
8023 /*********************************
8024 * 10. Setup and Register mac80211
8025 * *******************************/
8026
8027 err = ieee80211_register_hw(priv->hw);
8028 if (err) {
8029 IWL_ERROR("Failed to register network device (error %d)\n", err);
8030 goto out_remove_sysfs;
8031 }
8032
8033 priv->hw->conf.beacon_int = 100;
8034 priv->mac80211_registered = 1;
8035
8036
8037 err = iwl3945_rfkill_init(priv);
8038 if (err)
8039 IWL_ERROR("Unable to initialize RFKILL system. "
8040 "Ignoring error: %d\n", err);
8041
8042 return 0;
8043
8044 out_remove_sysfs:
8045 sysfs_remove_group(&pdev->dev.kobj, &iwl3945_attribute_group);
8046 out_free_geos:
8047 iwl3945_free_geos(priv);
8048 out_free_channel_map:
8049 iwl3945_free_channel_map(priv);
8050
8051
8052 out_release_irq:
8053 destroy_workqueue(priv->workqueue);
8054 priv->workqueue = NULL;
8055 iwl3945_unset_hw_setting(priv);
8056
8057 out_iounmap:
8058 pci_iounmap(pdev, priv->hw_base);
8059 out_pci_release_regions:
8060 pci_release_regions(pdev);
8061 out_pci_disable_device:
8062 pci_disable_device(pdev);
8063 pci_set_drvdata(pdev, NULL);
8064 out_ieee80211_free_hw:
8065 ieee80211_free_hw(priv->hw);
8066 out:
8067 return err;
8068 }
8069
8070 static void __devexit iwl3945_pci_remove(struct pci_dev *pdev)
8071 {
8072 struct iwl3945_priv *priv = pci_get_drvdata(pdev);
8073 unsigned long flags;
8074
8075 if (!priv)
8076 return;
8077
8078 IWL_DEBUG_INFO("*** UNLOAD DRIVER ***\n");
8079
8080 set_bit(STATUS_EXIT_PENDING, &priv->status);
8081
8082 iwl3945_down(priv);
8083
8084 /* make sure we flush any pending irq or
8085 * tasklet for the driver
8086 */
8087 spin_lock_irqsave(&priv->lock, flags);
8088 iwl3945_disable_interrupts(priv);
8089 spin_unlock_irqrestore(&priv->lock, flags);
8090
8091 iwl_synchronize_irq(priv);
8092
8093 sysfs_remove_group(&pdev->dev.kobj, &iwl3945_attribute_group);
8094
8095 iwl3945_rfkill_unregister(priv);
8096 iwl3945_dealloc_ucode_pci(priv);
8097
8098 if (priv->rxq.bd)
8099 iwl3945_rx_queue_free(priv, &priv->rxq);
8100 iwl3945_hw_txq_ctx_free(priv);
8101
8102 iwl3945_unset_hw_setting(priv);
8103 iwl3945_clear_stations_table(priv);
8104
8105 if (priv->mac80211_registered)
8106 ieee80211_unregister_hw(priv->hw);
8107
8108 /*netif_stop_queue(dev); */
8109 flush_workqueue(priv->workqueue);
8110
8111 /* ieee80211_unregister_hw calls iwl3945_mac_stop, which flushes
8112 * priv->workqueue... so we can't take down the workqueue
8113 * until now... */
8114 destroy_workqueue(priv->workqueue);
8115 priv->workqueue = NULL;
8116
8117 pci_iounmap(pdev, priv->hw_base);
8118 pci_release_regions(pdev);
8119 pci_disable_device(pdev);
8120 pci_set_drvdata(pdev, NULL);
8121
8122 iwl3945_free_channel_map(priv);
8123 iwl3945_free_geos(priv);
8124 kfree(priv->scan);
8125 if (priv->ibss_beacon)
8126 dev_kfree_skb(priv->ibss_beacon);
8127
8128 ieee80211_free_hw(priv->hw);
8129 }
8130
8131 #ifdef CONFIG_PM
8132
8133 static int iwl3945_pci_suspend(struct pci_dev *pdev, pm_message_t state)
8134 {
8135 struct iwl3945_priv *priv = pci_get_drvdata(pdev);
8136
8137 if (priv->is_open) {
8138 set_bit(STATUS_IN_SUSPEND, &priv->status);
8139 iwl3945_mac_stop(priv->hw);
8140 priv->is_open = 1;
8141 }
8142
8143 pci_set_power_state(pdev, PCI_D3hot);
8144
8145 return 0;
8146 }
8147
8148 static int iwl3945_pci_resume(struct pci_dev *pdev)
8149 {
8150 struct iwl3945_priv *priv = pci_get_drvdata(pdev);
8151
8152 pci_set_power_state(pdev, PCI_D0);
8153
8154 if (priv->is_open)
8155 iwl3945_mac_start(priv->hw);
8156
8157 clear_bit(STATUS_IN_SUSPEND, &priv->status);
8158 return 0;
8159 }
8160
8161 #endif /* CONFIG_PM */
8162
8163 /*************** RFKILL FUNCTIONS **********/
8164 #ifdef CONFIG_IWL3945_RFKILL
8165 /* software rf-kill from user */
8166 static int iwl3945_rfkill_soft_rf_kill(void *data, enum rfkill_state state)
8167 {
8168 struct iwl3945_priv *priv = data;
8169 int err = 0;
8170
8171 if (!priv->rfkill)
8172 return 0;
8173
8174 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
8175 return 0;
8176
8177 IWL_DEBUG_RF_KILL("we received soft RFKILL set to state %d\n", state);
8178 mutex_lock(&priv->mutex);
8179
8180 switch (state) {
8181 case RFKILL_STATE_UNBLOCKED:
8182 if (iwl3945_is_rfkill_hw(priv)) {
8183 err = -EBUSY;
8184 goto out_unlock;
8185 }
8186 iwl3945_radio_kill_sw(priv, 0);
8187 break;
8188 case RFKILL_STATE_SOFT_BLOCKED:
8189 iwl3945_radio_kill_sw(priv, 1);
8190 break;
8191 default:
8192 IWL_WARNING("we received unexpected RFKILL state %d\n", state);
8193 break;
8194 }
8195 out_unlock:
8196 mutex_unlock(&priv->mutex);
8197
8198 return err;
8199 }
8200
8201 int iwl3945_rfkill_init(struct iwl3945_priv *priv)
8202 {
8203 struct device *device = wiphy_dev(priv->hw->wiphy);
8204 int ret = 0;
8205
8206 BUG_ON(device == NULL);
8207
8208 IWL_DEBUG_RF_KILL("Initializing RFKILL.\n");
8209 priv->rfkill = rfkill_allocate(device, RFKILL_TYPE_WLAN);
8210 if (!priv->rfkill) {
8211 IWL_ERROR("Unable to allocate rfkill device.\n");
8212 ret = -ENOMEM;
8213 goto error;
8214 }
8215
8216 priv->rfkill->name = priv->cfg->name;
8217 priv->rfkill->data = priv;
8218 priv->rfkill->state = RFKILL_STATE_UNBLOCKED;
8219 priv->rfkill->toggle_radio = iwl3945_rfkill_soft_rf_kill;
8220 priv->rfkill->user_claim_unsupported = 1;
8221
8222 priv->rfkill->dev.class->suspend = NULL;
8223 priv->rfkill->dev.class->resume = NULL;
8224
8225 ret = rfkill_register(priv->rfkill);
8226 if (ret) {
8227 IWL_ERROR("Unable to register rfkill: %d\n", ret);
8228 goto freed_rfkill;
8229 }
8230
8231 IWL_DEBUG_RF_KILL("RFKILL initialization complete.\n");
8232 return ret;
8233
8234 freed_rfkill:
8235 if (priv->rfkill != NULL)
8236 rfkill_free(priv->rfkill);
8237 priv->rfkill = NULL;
8238
8239 error:
8240 IWL_DEBUG_RF_KILL("RFKILL initialization complete.\n");
8241 return ret;
8242 }
8243
8244 void iwl3945_rfkill_unregister(struct iwl3945_priv *priv)
8245 {
8246 if (priv->rfkill)
8247 rfkill_unregister(priv->rfkill);
8248
8249 priv->rfkill = NULL;
8250 }
8251
8252 /* set rf-kill to the right state. */
8253 void iwl3945_rfkill_set_hw_state(struct iwl3945_priv *priv)
8254 {
8255
8256 if (!priv->rfkill)
8257 return;
8258
8259 if (iwl3945_is_rfkill_hw(priv)) {
8260 rfkill_force_state(priv->rfkill, RFKILL_STATE_HARD_BLOCKED);
8261 return;
8262 }
8263
8264 if (!iwl3945_is_rfkill_sw(priv))
8265 rfkill_force_state(priv->rfkill, RFKILL_STATE_UNBLOCKED);
8266 else
8267 rfkill_force_state(priv->rfkill, RFKILL_STATE_SOFT_BLOCKED);
8268 }
8269 #endif
8270
8271 /*****************************************************************************
8272 *
8273 * driver and module entry point
8274 *
8275 *****************************************************************************/
8276
8277 static struct pci_driver iwl3945_driver = {
8278 .name = DRV_NAME,
8279 .id_table = iwl3945_hw_card_ids,
8280 .probe = iwl3945_pci_probe,
8281 .remove = __devexit_p(iwl3945_pci_remove),
8282 #ifdef CONFIG_PM
8283 .suspend = iwl3945_pci_suspend,
8284 .resume = iwl3945_pci_resume,
8285 #endif
8286 };
8287
8288 static int __init iwl3945_init(void)
8289 {
8290
8291 int ret;
8292 printk(KERN_INFO DRV_NAME ": " DRV_DESCRIPTION ", " DRV_VERSION "\n");
8293 printk(KERN_INFO DRV_NAME ": " DRV_COPYRIGHT "\n");
8294
8295 ret = iwl3945_rate_control_register();
8296 if (ret) {
8297 IWL_ERROR("Unable to register rate control algorithm: %d\n", ret);
8298 return ret;
8299 }
8300
8301 ret = pci_register_driver(&iwl3945_driver);
8302 if (ret) {
8303 IWL_ERROR("Unable to initialize PCI module\n");
8304 goto error_register;
8305 }
8306 #ifdef CONFIG_IWL3945_DEBUG
8307 ret = driver_create_file(&iwl3945_driver.driver, &driver_attr_debug_level);
8308 if (ret) {
8309 IWL_ERROR("Unable to create driver sysfs file\n");
8310 goto error_debug;
8311 }
8312 #endif
8313
8314 return ret;
8315
8316 #ifdef CONFIG_IWL3945_DEBUG
8317 error_debug:
8318 pci_unregister_driver(&iwl3945_driver);
8319 #endif
8320 error_register:
8321 iwl3945_rate_control_unregister();
8322 return ret;
8323 }
8324
8325 static void __exit iwl3945_exit(void)
8326 {
8327 #ifdef CONFIG_IWL3945_DEBUG
8328 driver_remove_file(&iwl3945_driver.driver, &driver_attr_debug_level);
8329 #endif
8330 pci_unregister_driver(&iwl3945_driver);
8331 iwl3945_rate_control_unregister();
8332 }
8333
8334 MODULE_FIRMWARE(IWL3945_MODULE_FIRMWARE(IWL3945_UCODE_API_MAX));
8335
8336 module_param_named(antenna, iwl3945_param_antenna, int, 0444);
8337 MODULE_PARM_DESC(antenna, "select antenna (1=Main, 2=Aux, default 0 [both])");
8338 module_param_named(disable, iwl3945_param_disable, int, 0444);
8339 MODULE_PARM_DESC(disable, "manually disable the radio (default 0 [radio on])");
8340 module_param_named(hwcrypto, iwl3945_param_hwcrypto, int, 0444);
8341 MODULE_PARM_DESC(hwcrypto,
8342 "using hardware crypto engine (default 0 [software])\n");
8343 module_param_named(debug, iwl3945_param_debug, uint, 0444);
8344 MODULE_PARM_DESC(debug, "debug output mask");
8345 module_param_named(disable_hw_scan, iwl3945_param_disable_hw_scan, int, 0444);
8346 MODULE_PARM_DESC(disable_hw_scan, "disable hardware scanning (default 0)");
8347
8348 module_param_named(queues_num, iwl3945_param_queues_num, int, 0444);
8349 MODULE_PARM_DESC(queues_num, "number of hw queues.");
8350
8351 module_exit(iwl3945_exit);
8352 module_init(iwl3945_init);