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1 /*
2 * Marvell Wireless LAN device driver: PCIE specific handling
3 *
4 * Copyright (C) 2011-2014, Marvell International Ltd.
5 *
6 * This software file (the "File") is distributed by Marvell International
7 * Ltd. under the terms of the GNU General Public License Version 2, June 1991
8 * (the "License"). You may use, redistribute and/or modify this File in
9 * accordance with the terms and conditions of the License, a copy of which
10 * is available by writing to the Free Software Foundation, Inc.,
11 * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA or on the
12 * worldwide web at http://www.gnu.org/licenses/old-licenses/gpl-2.0.txt.
13 *
14 * THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE
15 * IMPLIED WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE
16 * ARE EXPRESSLY DISCLAIMED. The License provides additional details about
17 * this warranty disclaimer.
18 */
19
20 #include <linux/firmware.h>
21
22 #include "decl.h"
23 #include "ioctl.h"
24 #include "util.h"
25 #include "fw.h"
26 #include "main.h"
27 #include "wmm.h"
28 #include "11n.h"
29 #include "pcie.h"
30
31 #define PCIE_VERSION "1.0"
32 #define DRV_NAME "Marvell mwifiex PCIe"
33
34 static struct mwifiex_if_ops pcie_ops;
35
36 static const struct of_device_id mwifiex_pcie_of_match_table[] = {
37 { .compatible = "pci11ab,2b42" },
38 { .compatible = "pci1b4b,2b42" },
39 { }
40 };
41
42 static int mwifiex_pcie_probe_of(struct device *dev)
43 {
44 if (!of_match_node(mwifiex_pcie_of_match_table, dev->of_node)) {
45 dev_err(dev, "required compatible string missing\n");
46 return -EINVAL;
47 }
48
49 return 0;
50 }
51
52 static void mwifiex_pcie_work(struct work_struct *work);
53
54 static int
55 mwifiex_map_pci_memory(struct mwifiex_adapter *adapter, struct sk_buff *skb,
56 size_t size, int flags)
57 {
58 struct pcie_service_card *card = adapter->card;
59 struct mwifiex_dma_mapping mapping;
60
61 mapping.addr = pci_map_single(card->dev, skb->data, size, flags);
62 if (pci_dma_mapping_error(card->dev, mapping.addr)) {
63 mwifiex_dbg(adapter, ERROR, "failed to map pci memory!\n");
64 return -1;
65 }
66 mapping.len = size;
67 mwifiex_store_mapping(skb, &mapping);
68 return 0;
69 }
70
71 static void mwifiex_unmap_pci_memory(struct mwifiex_adapter *adapter,
72 struct sk_buff *skb, int flags)
73 {
74 struct pcie_service_card *card = adapter->card;
75 struct mwifiex_dma_mapping mapping;
76
77 mwifiex_get_mapping(skb, &mapping);
78 pci_unmap_single(card->dev, mapping.addr, mapping.len, flags);
79 }
80
81 /*
82 * This function writes data into PCIE card register.
83 */
84 static int mwifiex_write_reg(struct mwifiex_adapter *adapter, int reg, u32 data)
85 {
86 struct pcie_service_card *card = adapter->card;
87
88 iowrite32(data, card->pci_mmap1 + reg);
89
90 return 0;
91 }
92
93 /* This function reads data from PCIE card register.
94 */
95 static int mwifiex_read_reg(struct mwifiex_adapter *adapter, int reg, u32 *data)
96 {
97 struct pcie_service_card *card = adapter->card;
98
99 *data = ioread32(card->pci_mmap1 + reg);
100 if (*data == 0xffffffff)
101 return 0xffffffff;
102
103 return 0;
104 }
105
106 /* This function reads u8 data from PCIE card register. */
107 static int mwifiex_read_reg_byte(struct mwifiex_adapter *adapter,
108 int reg, u8 *data)
109 {
110 struct pcie_service_card *card = adapter->card;
111
112 *data = ioread8(card->pci_mmap1 + reg);
113
114 return 0;
115 }
116
117 /*
118 * This function reads sleep cookie and checks if FW is ready
119 */
120 static bool mwifiex_pcie_ok_to_access_hw(struct mwifiex_adapter *adapter)
121 {
122 u32 cookie_value;
123 struct pcie_service_card *card = adapter->card;
124 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg;
125
126 if (!reg->sleep_cookie)
127 return true;
128
129 if (card->sleep_cookie_vbase) {
130 cookie_value = get_unaligned_le32(card->sleep_cookie_vbase);
131 mwifiex_dbg(adapter, INFO,
132 "info: ACCESS_HW: sleep cookie=0x%x\n",
133 cookie_value);
134 if (cookie_value == FW_AWAKE_COOKIE)
135 return true;
136 }
137
138 return false;
139 }
140
141 #ifdef CONFIG_PM_SLEEP
142 /*
143 * Kernel needs to suspend all functions separately. Therefore all
144 * registered functions must have drivers with suspend and resume
145 * methods. Failing that the kernel simply removes the whole card.
146 *
147 * If already not suspended, this function allocates and sends a host
148 * sleep activate request to the firmware and turns off the traffic.
149 */
150 static int mwifiex_pcie_suspend(struct device *dev)
151 {
152 struct mwifiex_adapter *adapter;
153 struct pcie_service_card *card;
154 struct pci_dev *pdev = to_pci_dev(dev);
155
156 card = pci_get_drvdata(pdev);
157
158 /* Might still be loading firmware */
159 wait_for_completion(&card->fw_done);
160
161 adapter = card->adapter;
162 if (!adapter) {
163 dev_err(dev, "adapter is not valid\n");
164 return 0;
165 }
166
167 mwifiex_enable_wake(adapter);
168
169 /* Enable the Host Sleep */
170 if (!mwifiex_enable_hs(adapter)) {
171 mwifiex_dbg(adapter, ERROR,
172 "cmd: failed to suspend\n");
173 adapter->hs_enabling = false;
174 mwifiex_disable_wake(adapter);
175 return -EFAULT;
176 }
177
178 flush_workqueue(adapter->workqueue);
179
180 /* Indicate device suspended */
181 adapter->is_suspended = true;
182 adapter->hs_enabling = false;
183
184 return 0;
185 }
186
187 /*
188 * Kernel needs to suspend all functions separately. Therefore all
189 * registered functions must have drivers with suspend and resume
190 * methods. Failing that the kernel simply removes the whole card.
191 *
192 * If already not resumed, this function turns on the traffic and
193 * sends a host sleep cancel request to the firmware.
194 */
195 static int mwifiex_pcie_resume(struct device *dev)
196 {
197 struct mwifiex_adapter *adapter;
198 struct pcie_service_card *card;
199 struct pci_dev *pdev = to_pci_dev(dev);
200
201 card = pci_get_drvdata(pdev);
202
203 if (!card->adapter) {
204 dev_err(dev, "adapter structure is not valid\n");
205 return 0;
206 }
207
208 adapter = card->adapter;
209
210 if (!adapter->is_suspended) {
211 mwifiex_dbg(adapter, WARN,
212 "Device already resumed\n");
213 return 0;
214 }
215
216 adapter->is_suspended = false;
217
218 mwifiex_cancel_hs(mwifiex_get_priv(adapter, MWIFIEX_BSS_ROLE_STA),
219 MWIFIEX_ASYNC_CMD);
220 mwifiex_disable_wake(adapter);
221
222 return 0;
223 }
224 #endif
225
226 /*
227 * This function probes an mwifiex device and registers it. It allocates
228 * the card structure, enables PCIE function number and initiates the
229 * device registration and initialization procedure by adding a logical
230 * interface.
231 */
232 static int mwifiex_pcie_probe(struct pci_dev *pdev,
233 const struct pci_device_id *ent)
234 {
235 struct pcie_service_card *card;
236 struct mwifiex_private *priv;
237 struct pci_dev *pdev_host;
238 int ret;
239
240 pr_debug("info: vendor=0x%4.04X device=0x%4.04X rev=%d\n",
241 pdev->vendor, pdev->device, pdev->revision);
242
243 card = devm_kzalloc(&pdev->dev, sizeof(*card), GFP_KERNEL);
244 if (!card)
245 return -ENOMEM;
246
247 init_completion(&card->fw_done);
248
249 card->dev = pdev;
250
251 if (ent->driver_data) {
252 struct mwifiex_pcie_device *data = (void *)ent->driver_data;
253 card->pcie.reg = data->reg;
254 card->pcie.blksz_fw_dl = data->blksz_fw_dl;
255 card->pcie.tx_buf_size = data->tx_buf_size;
256 card->pcie.can_dump_fw = data->can_dump_fw;
257 card->pcie.mem_type_mapping_tbl = data->mem_type_mapping_tbl;
258 card->pcie.num_mem_types = data->num_mem_types;
259 card->pcie.can_ext_scan = data->can_ext_scan;
260 INIT_WORK(&card->work, mwifiex_pcie_work);
261 }
262
263 /* device tree node parsing and platform specific configuration*/
264 if (pdev->dev.of_node) {
265 ret = mwifiex_pcie_probe_of(&pdev->dev);
266 if (ret)
267 return ret;
268 }
269
270 if (mwifiex_add_card(card, &card->fw_done, &pcie_ops,
271 MWIFIEX_PCIE, &pdev->dev)) {
272 pr_err("%s failed\n", __func__);
273 return -1;
274 }
275
276 priv = mwifiex_get_priv(card->adapter, MWIFIEX_BSS_ROLE_STA);
277 pdev_host = pci_get_subsys(PCI_ANY_ID, PCI_ANY_ID, 0x1028, 0x0720, NULL);
278 if (!pdev_host)
279 pdev_host = pci_get_subsys(PCI_ANY_ID, PCI_ANY_ID, 0x1028, 0x0733, NULL);
280 if (pdev_host) {
281 priv->is_edge_gateway = true;
282 pci_dev_put(pdev_host);
283 }
284 return 0;
285 }
286
287 /*
288 * This function removes the interface and frees up the card structure.
289 */
290 static void mwifiex_pcie_remove(struct pci_dev *pdev)
291 {
292 struct pcie_service_card *card;
293 struct mwifiex_adapter *adapter;
294 struct mwifiex_private *priv;
295 const struct mwifiex_pcie_card_reg *reg;
296 u32 fw_status;
297 int ret;
298
299 card = pci_get_drvdata(pdev);
300
301 wait_for_completion(&card->fw_done);
302
303 adapter = card->adapter;
304 if (!adapter || !adapter->priv_num)
305 return;
306
307 reg = card->pcie.reg;
308 if (reg)
309 ret = mwifiex_read_reg(adapter, reg->fw_status, &fw_status);
310 else
311 fw_status = -1;
312
313 if (fw_status == FIRMWARE_READY_PCIE && !adapter->mfg_mode) {
314 mwifiex_deauthenticate_all(adapter);
315
316 priv = mwifiex_get_priv(adapter, MWIFIEX_BSS_ROLE_ANY);
317
318 mwifiex_disable_auto_ds(priv);
319
320 mwifiex_init_shutdown_fw(priv, MWIFIEX_FUNC_SHUTDOWN);
321 }
322
323 mwifiex_remove_card(adapter);
324 }
325
326 static void mwifiex_pcie_shutdown(struct pci_dev *pdev)
327 {
328 mwifiex_pcie_remove(pdev);
329
330 return;
331 }
332
333 static const struct pci_device_id mwifiex_ids[] = {
334 {
335 PCIE_VENDOR_ID_MARVELL, PCIE_DEVICE_ID_MARVELL_88W8766P,
336 PCI_ANY_ID, PCI_ANY_ID, 0, 0,
337 .driver_data = (unsigned long)&mwifiex_pcie8766,
338 },
339 {
340 PCIE_VENDOR_ID_MARVELL, PCIE_DEVICE_ID_MARVELL_88W8897,
341 PCI_ANY_ID, PCI_ANY_ID, 0, 0,
342 .driver_data = (unsigned long)&mwifiex_pcie8897,
343 },
344 {
345 PCIE_VENDOR_ID_MARVELL, PCIE_DEVICE_ID_MARVELL_88W8997,
346 PCI_ANY_ID, PCI_ANY_ID, 0, 0,
347 .driver_data = (unsigned long)&mwifiex_pcie8997,
348 },
349 {
350 PCIE_VENDOR_ID_V2_MARVELL, PCIE_DEVICE_ID_MARVELL_88W8997,
351 PCI_ANY_ID, PCI_ANY_ID, 0, 0,
352 .driver_data = (unsigned long)&mwifiex_pcie8997,
353 },
354 {},
355 };
356
357 MODULE_DEVICE_TABLE(pci, mwifiex_ids);
358
359 /*
360 * Cleanup all software without cleaning anything related to PCIe and HW.
361 */
362 static void mwifiex_pcie_reset_prepare(struct pci_dev *pdev)
363 {
364 struct pcie_service_card *card = pci_get_drvdata(pdev);
365 struct mwifiex_adapter *adapter = card->adapter;
366
367 if (!adapter) {
368 dev_err(&pdev->dev, "%s: adapter structure is not valid\n",
369 __func__);
370 return;
371 }
372
373 mwifiex_dbg(adapter, INFO,
374 "%s: vendor=0x%4.04x device=0x%4.04x rev=%d Pre-FLR\n",
375 __func__, pdev->vendor, pdev->device, pdev->revision);
376
377 mwifiex_shutdown_sw(adapter);
378 clear_bit(MWIFIEX_IFACE_WORK_DEVICE_DUMP, &card->work_flags);
379 clear_bit(MWIFIEX_IFACE_WORK_CARD_RESET, &card->work_flags);
380 mwifiex_dbg(adapter, INFO, "%s, successful\n", __func__);
381 }
382
383 /*
384 * Kernel stores and restores PCIe function context before and after performing
385 * FLR respectively. Reconfigure the software and firmware including firmware
386 * redownload.
387 */
388 static void mwifiex_pcie_reset_done(struct pci_dev *pdev)
389 {
390 struct pcie_service_card *card = pci_get_drvdata(pdev);
391 struct mwifiex_adapter *adapter = card->adapter;
392 int ret;
393
394 if (!adapter) {
395 dev_err(&pdev->dev, "%s: adapter structure is not valid\n",
396 __func__);
397 return;
398 }
399
400 mwifiex_dbg(adapter, INFO,
401 "%s: vendor=0x%4.04x device=0x%4.04x rev=%d Post-FLR\n",
402 __func__, pdev->vendor, pdev->device, pdev->revision);
403
404 ret = mwifiex_reinit_sw(adapter);
405 if (ret)
406 dev_err(&pdev->dev, "reinit failed: %d\n", ret);
407 else
408 mwifiex_dbg(adapter, INFO, "%s, successful\n", __func__);
409 }
410
411 static const struct pci_error_handlers mwifiex_pcie_err_handler = {
412 .reset_prepare = mwifiex_pcie_reset_prepare,
413 .reset_done = mwifiex_pcie_reset_done,
414 };
415
416 #ifdef CONFIG_PM_SLEEP
417 /* Power Management Hooks */
418 static SIMPLE_DEV_PM_OPS(mwifiex_pcie_pm_ops, mwifiex_pcie_suspend,
419 mwifiex_pcie_resume);
420 #endif
421
422 /* PCI Device Driver */
423 static struct pci_driver __refdata mwifiex_pcie = {
424 .name = "mwifiex_pcie",
425 .id_table = mwifiex_ids,
426 .probe = mwifiex_pcie_probe,
427 .remove = mwifiex_pcie_remove,
428 #ifdef CONFIG_PM_SLEEP
429 .driver = {
430 .pm = &mwifiex_pcie_pm_ops,
431 },
432 #endif
433 .shutdown = mwifiex_pcie_shutdown,
434 .err_handler = &mwifiex_pcie_err_handler,
435 };
436
437 /*
438 * This function adds delay loop to ensure FW is awake before proceeding.
439 */
440 static void mwifiex_pcie_dev_wakeup_delay(struct mwifiex_adapter *adapter)
441 {
442 int i = 0;
443
444 while (mwifiex_pcie_ok_to_access_hw(adapter)) {
445 i++;
446 usleep_range(10, 20);
447 /* 50ms max wait */
448 if (i == 5000)
449 break;
450 }
451
452 return;
453 }
454
455 static void mwifiex_delay_for_sleep_cookie(struct mwifiex_adapter *adapter,
456 u32 max_delay_loop_cnt)
457 {
458 struct pcie_service_card *card = adapter->card;
459 u8 *buffer;
460 u32 sleep_cookie, count;
461 struct sk_buff *cmdrsp = card->cmdrsp_buf;
462
463 for (count = 0; count < max_delay_loop_cnt; count++) {
464 pci_dma_sync_single_for_cpu(card->dev,
465 MWIFIEX_SKB_DMA_ADDR(cmdrsp),
466 sizeof(sleep_cookie),
467 PCI_DMA_FROMDEVICE);
468 buffer = cmdrsp->data;
469 sleep_cookie = get_unaligned_le32(buffer);
470
471 if (sleep_cookie == MWIFIEX_DEF_SLEEP_COOKIE) {
472 mwifiex_dbg(adapter, INFO,
473 "sleep cookie found at count %d\n", count);
474 break;
475 }
476 pci_dma_sync_single_for_device(card->dev,
477 MWIFIEX_SKB_DMA_ADDR(cmdrsp),
478 sizeof(sleep_cookie),
479 PCI_DMA_FROMDEVICE);
480 usleep_range(20, 30);
481 }
482
483 if (count >= max_delay_loop_cnt)
484 mwifiex_dbg(adapter, INFO,
485 "max count reached while accessing sleep cookie\n");
486 }
487
488 /* This function wakes up the card by reading fw_status register. */
489 static int mwifiex_pm_wakeup_card(struct mwifiex_adapter *adapter)
490 {
491 struct pcie_service_card *card = adapter->card;
492 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg;
493
494 mwifiex_dbg(adapter, EVENT,
495 "event: Wakeup device...\n");
496
497 if (reg->sleep_cookie)
498 mwifiex_pcie_dev_wakeup_delay(adapter);
499
500 /* Accessing fw_status register will wakeup device */
501 if (mwifiex_write_reg(adapter, reg->fw_status, FIRMWARE_READY_PCIE)) {
502 mwifiex_dbg(adapter, ERROR,
503 "Writing fw_status register failed\n");
504 return -1;
505 }
506
507 if (reg->sleep_cookie) {
508 mwifiex_pcie_dev_wakeup_delay(adapter);
509 mwifiex_dbg(adapter, INFO,
510 "PCIE wakeup: Setting PS_STATE_AWAKE\n");
511 adapter->ps_state = PS_STATE_AWAKE;
512 }
513
514 return 0;
515 }
516
517 /*
518 * This function is called after the card has woken up.
519 *
520 * The card configuration register is reset.
521 */
522 static int mwifiex_pm_wakeup_card_complete(struct mwifiex_adapter *adapter)
523 {
524 mwifiex_dbg(adapter, CMD,
525 "cmd: Wakeup device completed\n");
526
527 return 0;
528 }
529
530 /*
531 * This function disables the host interrupt.
532 *
533 * The host interrupt mask is read, the disable bit is reset and
534 * written back to the card host interrupt mask register.
535 */
536 static int mwifiex_pcie_disable_host_int(struct mwifiex_adapter *adapter)
537 {
538 if (mwifiex_pcie_ok_to_access_hw(adapter)) {
539 if (mwifiex_write_reg(adapter, PCIE_HOST_INT_MASK,
540 0x00000000)) {
541 mwifiex_dbg(adapter, ERROR,
542 "Disable host interrupt failed\n");
543 return -1;
544 }
545 }
546
547 atomic_set(&adapter->tx_hw_pending, 0);
548 return 0;
549 }
550
551 static void mwifiex_pcie_disable_host_int_noerr(struct mwifiex_adapter *adapter)
552 {
553 WARN_ON(mwifiex_pcie_disable_host_int(adapter));
554 }
555
556 /*
557 * This function enables the host interrupt.
558 *
559 * The host interrupt enable mask is written to the card
560 * host interrupt mask register.
561 */
562 static int mwifiex_pcie_enable_host_int(struct mwifiex_adapter *adapter)
563 {
564 if (mwifiex_pcie_ok_to_access_hw(adapter)) {
565 /* Simply write the mask to the register */
566 if (mwifiex_write_reg(adapter, PCIE_HOST_INT_MASK,
567 HOST_INTR_MASK)) {
568 mwifiex_dbg(adapter, ERROR,
569 "Enable host interrupt failed\n");
570 return -1;
571 }
572 }
573
574 return 0;
575 }
576
577 /*
578 * This function initializes TX buffer ring descriptors
579 */
580 static int mwifiex_init_txq_ring(struct mwifiex_adapter *adapter)
581 {
582 struct pcie_service_card *card = adapter->card;
583 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg;
584 struct mwifiex_pcie_buf_desc *desc;
585 struct mwifiex_pfu_buf_desc *desc2;
586 int i;
587
588 for (i = 0; i < MWIFIEX_MAX_TXRX_BD; i++) {
589 card->tx_buf_list[i] = NULL;
590 if (reg->pfu_enabled) {
591 card->txbd_ring[i] = (void *)card->txbd_ring_vbase +
592 (sizeof(*desc2) * i);
593 desc2 = card->txbd_ring[i];
594 memset(desc2, 0, sizeof(*desc2));
595 } else {
596 card->txbd_ring[i] = (void *)card->txbd_ring_vbase +
597 (sizeof(*desc) * i);
598 desc = card->txbd_ring[i];
599 memset(desc, 0, sizeof(*desc));
600 }
601 }
602
603 return 0;
604 }
605
606 /* This function initializes RX buffer ring descriptors. Each SKB is allocated
607 * here and after mapping PCI memory, its physical address is assigned to
608 * PCIE Rx buffer descriptor's physical address.
609 */
610 static int mwifiex_init_rxq_ring(struct mwifiex_adapter *adapter)
611 {
612 struct pcie_service_card *card = adapter->card;
613 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg;
614 struct sk_buff *skb;
615 struct mwifiex_pcie_buf_desc *desc;
616 struct mwifiex_pfu_buf_desc *desc2;
617 dma_addr_t buf_pa;
618 int i;
619
620 for (i = 0; i < MWIFIEX_MAX_TXRX_BD; i++) {
621 /* Allocate skb here so that firmware can DMA data from it */
622 skb = mwifiex_alloc_dma_align_buf(MWIFIEX_RX_DATA_BUF_SIZE,
623 GFP_KERNEL);
624 if (!skb) {
625 mwifiex_dbg(adapter, ERROR,
626 "Unable to allocate skb for RX ring.\n");
627 kfree(card->rxbd_ring_vbase);
628 return -ENOMEM;
629 }
630
631 if (mwifiex_map_pci_memory(adapter, skb,
632 MWIFIEX_RX_DATA_BUF_SIZE,
633 PCI_DMA_FROMDEVICE))
634 return -1;
635
636 buf_pa = MWIFIEX_SKB_DMA_ADDR(skb);
637
638 mwifiex_dbg(adapter, INFO,
639 "info: RX ring: skb=%p len=%d data=%p buf_pa=%#x:%x\n",
640 skb, skb->len, skb->data, (u32)buf_pa,
641 (u32)((u64)buf_pa >> 32));
642
643 card->rx_buf_list[i] = skb;
644 if (reg->pfu_enabled) {
645 card->rxbd_ring[i] = (void *)card->rxbd_ring_vbase +
646 (sizeof(*desc2) * i);
647 desc2 = card->rxbd_ring[i];
648 desc2->paddr = buf_pa;
649 desc2->len = (u16)skb->len;
650 desc2->frag_len = (u16)skb->len;
651 desc2->flags = reg->ring_flag_eop | reg->ring_flag_sop;
652 desc2->offset = 0;
653 } else {
654 card->rxbd_ring[i] = (void *)(card->rxbd_ring_vbase +
655 (sizeof(*desc) * i));
656 desc = card->rxbd_ring[i];
657 desc->paddr = buf_pa;
658 desc->len = (u16)skb->len;
659 desc->flags = 0;
660 }
661 }
662
663 return 0;
664 }
665
666 /* This function initializes event buffer ring descriptors. Each SKB is
667 * allocated here and after mapping PCI memory, its physical address is assigned
668 * to PCIE Rx buffer descriptor's physical address
669 */
670 static int mwifiex_pcie_init_evt_ring(struct mwifiex_adapter *adapter)
671 {
672 struct pcie_service_card *card = adapter->card;
673 struct mwifiex_evt_buf_desc *desc;
674 struct sk_buff *skb;
675 dma_addr_t buf_pa;
676 int i;
677
678 for (i = 0; i < MWIFIEX_MAX_EVT_BD; i++) {
679 /* Allocate skb here so that firmware can DMA data from it */
680 skb = dev_alloc_skb(MAX_EVENT_SIZE);
681 if (!skb) {
682 mwifiex_dbg(adapter, ERROR,
683 "Unable to allocate skb for EVENT buf.\n");
684 kfree(card->evtbd_ring_vbase);
685 return -ENOMEM;
686 }
687 skb_put(skb, MAX_EVENT_SIZE);
688
689 if (mwifiex_map_pci_memory(adapter, skb, MAX_EVENT_SIZE,
690 PCI_DMA_FROMDEVICE))
691 return -1;
692
693 buf_pa = MWIFIEX_SKB_DMA_ADDR(skb);
694
695 mwifiex_dbg(adapter, EVENT,
696 "info: EVT ring: skb=%p len=%d data=%p buf_pa=%#x:%x\n",
697 skb, skb->len, skb->data, (u32)buf_pa,
698 (u32)((u64)buf_pa >> 32));
699
700 card->evt_buf_list[i] = skb;
701 card->evtbd_ring[i] = (void *)(card->evtbd_ring_vbase +
702 (sizeof(*desc) * i));
703 desc = card->evtbd_ring[i];
704 desc->paddr = buf_pa;
705 desc->len = (u16)skb->len;
706 desc->flags = 0;
707 }
708
709 return 0;
710 }
711
712 /* This function cleans up TX buffer rings. If any of the buffer list has valid
713 * SKB address, associated SKB is freed.
714 */
715 static void mwifiex_cleanup_txq_ring(struct mwifiex_adapter *adapter)
716 {
717 struct pcie_service_card *card = adapter->card;
718 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg;
719 struct sk_buff *skb;
720 struct mwifiex_pcie_buf_desc *desc;
721 struct mwifiex_pfu_buf_desc *desc2;
722 int i;
723
724 for (i = 0; i < MWIFIEX_MAX_TXRX_BD; i++) {
725 if (reg->pfu_enabled) {
726 desc2 = card->txbd_ring[i];
727 if (card->tx_buf_list[i]) {
728 skb = card->tx_buf_list[i];
729 mwifiex_unmap_pci_memory(adapter, skb,
730 PCI_DMA_TODEVICE);
731 dev_kfree_skb_any(skb);
732 }
733 memset(desc2, 0, sizeof(*desc2));
734 } else {
735 desc = card->txbd_ring[i];
736 if (card->tx_buf_list[i]) {
737 skb = card->tx_buf_list[i];
738 mwifiex_unmap_pci_memory(adapter, skb,
739 PCI_DMA_TODEVICE);
740 dev_kfree_skb_any(skb);
741 }
742 memset(desc, 0, sizeof(*desc));
743 }
744 card->tx_buf_list[i] = NULL;
745 }
746
747 atomic_set(&adapter->tx_hw_pending, 0);
748 return;
749 }
750
751 /* This function cleans up RX buffer rings. If any of the buffer list has valid
752 * SKB address, associated SKB is freed.
753 */
754 static void mwifiex_cleanup_rxq_ring(struct mwifiex_adapter *adapter)
755 {
756 struct pcie_service_card *card = adapter->card;
757 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg;
758 struct mwifiex_pcie_buf_desc *desc;
759 struct mwifiex_pfu_buf_desc *desc2;
760 struct sk_buff *skb;
761 int i;
762
763 for (i = 0; i < MWIFIEX_MAX_TXRX_BD; i++) {
764 if (reg->pfu_enabled) {
765 desc2 = card->rxbd_ring[i];
766 if (card->rx_buf_list[i]) {
767 skb = card->rx_buf_list[i];
768 mwifiex_unmap_pci_memory(adapter, skb,
769 PCI_DMA_FROMDEVICE);
770 dev_kfree_skb_any(skb);
771 }
772 memset(desc2, 0, sizeof(*desc2));
773 } else {
774 desc = card->rxbd_ring[i];
775 if (card->rx_buf_list[i]) {
776 skb = card->rx_buf_list[i];
777 mwifiex_unmap_pci_memory(adapter, skb,
778 PCI_DMA_FROMDEVICE);
779 dev_kfree_skb_any(skb);
780 }
781 memset(desc, 0, sizeof(*desc));
782 }
783 card->rx_buf_list[i] = NULL;
784 }
785
786 return;
787 }
788
789 /* This function cleans up event buffer rings. If any of the buffer list has
790 * valid SKB address, associated SKB is freed.
791 */
792 static void mwifiex_cleanup_evt_ring(struct mwifiex_adapter *adapter)
793 {
794 struct pcie_service_card *card = adapter->card;
795 struct mwifiex_evt_buf_desc *desc;
796 struct sk_buff *skb;
797 int i;
798
799 for (i = 0; i < MWIFIEX_MAX_EVT_BD; i++) {
800 desc = card->evtbd_ring[i];
801 if (card->evt_buf_list[i]) {
802 skb = card->evt_buf_list[i];
803 mwifiex_unmap_pci_memory(adapter, skb,
804 PCI_DMA_FROMDEVICE);
805 dev_kfree_skb_any(skb);
806 }
807 card->evt_buf_list[i] = NULL;
808 memset(desc, 0, sizeof(*desc));
809 }
810
811 return;
812 }
813
814 /* This function creates buffer descriptor ring for TX
815 */
816 static int mwifiex_pcie_create_txbd_ring(struct mwifiex_adapter *adapter)
817 {
818 struct pcie_service_card *card = adapter->card;
819 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg;
820
821 /*
822 * driver maintaines the write pointer and firmware maintaines the read
823 * pointer. The write pointer starts at 0 (zero) while the read pointer
824 * starts at zero with rollover bit set
825 */
826 card->txbd_wrptr = 0;
827
828 if (reg->pfu_enabled)
829 card->txbd_rdptr = 0;
830 else
831 card->txbd_rdptr |= reg->tx_rollover_ind;
832
833 /* allocate shared memory for the BD ring and divide the same in to
834 several descriptors */
835 if (reg->pfu_enabled)
836 card->txbd_ring_size = sizeof(struct mwifiex_pfu_buf_desc) *
837 MWIFIEX_MAX_TXRX_BD;
838 else
839 card->txbd_ring_size = sizeof(struct mwifiex_pcie_buf_desc) *
840 MWIFIEX_MAX_TXRX_BD;
841
842 mwifiex_dbg(adapter, INFO,
843 "info: txbd_ring: Allocating %d bytes\n",
844 card->txbd_ring_size);
845 card->txbd_ring_vbase = pci_alloc_consistent(card->dev,
846 card->txbd_ring_size,
847 &card->txbd_ring_pbase);
848 if (!card->txbd_ring_vbase) {
849 mwifiex_dbg(adapter, ERROR,
850 "allocate consistent memory (%d bytes) failed!\n",
851 card->txbd_ring_size);
852 return -ENOMEM;
853 }
854 mwifiex_dbg(adapter, DATA,
855 "info: txbd_ring - base: %p, pbase: %#x:%x, len: %x\n",
856 card->txbd_ring_vbase, (unsigned int)card->txbd_ring_pbase,
857 (u32)((u64)card->txbd_ring_pbase >> 32),
858 card->txbd_ring_size);
859
860 return mwifiex_init_txq_ring(adapter);
861 }
862
863 static int mwifiex_pcie_delete_txbd_ring(struct mwifiex_adapter *adapter)
864 {
865 struct pcie_service_card *card = adapter->card;
866 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg;
867
868 mwifiex_cleanup_txq_ring(adapter);
869
870 if (card->txbd_ring_vbase)
871 pci_free_consistent(card->dev, card->txbd_ring_size,
872 card->txbd_ring_vbase,
873 card->txbd_ring_pbase);
874 card->txbd_ring_size = 0;
875 card->txbd_wrptr = 0;
876 card->txbd_rdptr = 0 | reg->tx_rollover_ind;
877 card->txbd_ring_vbase = NULL;
878 card->txbd_ring_pbase = 0;
879
880 return 0;
881 }
882
883 /*
884 * This function creates buffer descriptor ring for RX
885 */
886 static int mwifiex_pcie_create_rxbd_ring(struct mwifiex_adapter *adapter)
887 {
888 struct pcie_service_card *card = adapter->card;
889 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg;
890
891 /*
892 * driver maintaines the read pointer and firmware maintaines the write
893 * pointer. The write pointer starts at 0 (zero) while the read pointer
894 * starts at zero with rollover bit set
895 */
896 card->rxbd_wrptr = 0;
897 card->rxbd_rdptr = reg->rx_rollover_ind;
898
899 if (reg->pfu_enabled)
900 card->rxbd_ring_size = sizeof(struct mwifiex_pfu_buf_desc) *
901 MWIFIEX_MAX_TXRX_BD;
902 else
903 card->rxbd_ring_size = sizeof(struct mwifiex_pcie_buf_desc) *
904 MWIFIEX_MAX_TXRX_BD;
905
906 mwifiex_dbg(adapter, INFO,
907 "info: rxbd_ring: Allocating %d bytes\n",
908 card->rxbd_ring_size);
909 card->rxbd_ring_vbase = pci_alloc_consistent(card->dev,
910 card->rxbd_ring_size,
911 &card->rxbd_ring_pbase);
912 if (!card->rxbd_ring_vbase) {
913 mwifiex_dbg(adapter, ERROR,
914 "allocate consistent memory (%d bytes) failed!\n",
915 card->rxbd_ring_size);
916 return -ENOMEM;
917 }
918
919 mwifiex_dbg(adapter, DATA,
920 "info: rxbd_ring - base: %p, pbase: %#x:%x, len: %#x\n",
921 card->rxbd_ring_vbase, (u32)card->rxbd_ring_pbase,
922 (u32)((u64)card->rxbd_ring_pbase >> 32),
923 card->rxbd_ring_size);
924
925 return mwifiex_init_rxq_ring(adapter);
926 }
927
928 /*
929 * This function deletes Buffer descriptor ring for RX
930 */
931 static int mwifiex_pcie_delete_rxbd_ring(struct mwifiex_adapter *adapter)
932 {
933 struct pcie_service_card *card = adapter->card;
934 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg;
935
936 mwifiex_cleanup_rxq_ring(adapter);
937
938 if (card->rxbd_ring_vbase)
939 pci_free_consistent(card->dev, card->rxbd_ring_size,
940 card->rxbd_ring_vbase,
941 card->rxbd_ring_pbase);
942 card->rxbd_ring_size = 0;
943 card->rxbd_wrptr = 0;
944 card->rxbd_rdptr = 0 | reg->rx_rollover_ind;
945 card->rxbd_ring_vbase = NULL;
946 card->rxbd_ring_pbase = 0;
947
948 return 0;
949 }
950
951 /*
952 * This function creates buffer descriptor ring for Events
953 */
954 static int mwifiex_pcie_create_evtbd_ring(struct mwifiex_adapter *adapter)
955 {
956 struct pcie_service_card *card = adapter->card;
957 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg;
958
959 /*
960 * driver maintaines the read pointer and firmware maintaines the write
961 * pointer. The write pointer starts at 0 (zero) while the read pointer
962 * starts at zero with rollover bit set
963 */
964 card->evtbd_wrptr = 0;
965 card->evtbd_rdptr = reg->evt_rollover_ind;
966
967 card->evtbd_ring_size = sizeof(struct mwifiex_evt_buf_desc) *
968 MWIFIEX_MAX_EVT_BD;
969
970 mwifiex_dbg(adapter, INFO,
971 "info: evtbd_ring: Allocating %d bytes\n",
972 card->evtbd_ring_size);
973 card->evtbd_ring_vbase = pci_alloc_consistent(card->dev,
974 card->evtbd_ring_size,
975 &card->evtbd_ring_pbase);
976 if (!card->evtbd_ring_vbase) {
977 mwifiex_dbg(adapter, ERROR,
978 "allocate consistent memory (%d bytes) failed!\n",
979 card->evtbd_ring_size);
980 return -ENOMEM;
981 }
982
983 mwifiex_dbg(adapter, EVENT,
984 "info: CMDRSP/EVT bd_ring - base: %p pbase: %#x:%x len: %#x\n",
985 card->evtbd_ring_vbase, (u32)card->evtbd_ring_pbase,
986 (u32)((u64)card->evtbd_ring_pbase >> 32),
987 card->evtbd_ring_size);
988
989 return mwifiex_pcie_init_evt_ring(adapter);
990 }
991
992 /*
993 * This function deletes Buffer descriptor ring for Events
994 */
995 static int mwifiex_pcie_delete_evtbd_ring(struct mwifiex_adapter *adapter)
996 {
997 struct pcie_service_card *card = adapter->card;
998 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg;
999
1000 mwifiex_cleanup_evt_ring(adapter);
1001
1002 if (card->evtbd_ring_vbase)
1003 pci_free_consistent(card->dev, card->evtbd_ring_size,
1004 card->evtbd_ring_vbase,
1005 card->evtbd_ring_pbase);
1006 card->evtbd_wrptr = 0;
1007 card->evtbd_rdptr = 0 | reg->evt_rollover_ind;
1008 card->evtbd_ring_size = 0;
1009 card->evtbd_ring_vbase = NULL;
1010 card->evtbd_ring_pbase = 0;
1011
1012 return 0;
1013 }
1014
1015 /*
1016 * This function allocates a buffer for CMDRSP
1017 */
1018 static int mwifiex_pcie_alloc_cmdrsp_buf(struct mwifiex_adapter *adapter)
1019 {
1020 struct pcie_service_card *card = adapter->card;
1021 struct sk_buff *skb;
1022
1023 /* Allocate memory for receiving command response data */
1024 skb = dev_alloc_skb(MWIFIEX_UPLD_SIZE);
1025 if (!skb) {
1026 mwifiex_dbg(adapter, ERROR,
1027 "Unable to allocate skb for command response data.\n");
1028 return -ENOMEM;
1029 }
1030 skb_put(skb, MWIFIEX_UPLD_SIZE);
1031 if (mwifiex_map_pci_memory(adapter, skb, MWIFIEX_UPLD_SIZE,
1032 PCI_DMA_FROMDEVICE))
1033 return -1;
1034
1035 card->cmdrsp_buf = skb;
1036
1037 return 0;
1038 }
1039
1040 /*
1041 * This function deletes a buffer for CMDRSP
1042 */
1043 static int mwifiex_pcie_delete_cmdrsp_buf(struct mwifiex_adapter *adapter)
1044 {
1045 struct pcie_service_card *card;
1046
1047 if (!adapter)
1048 return 0;
1049
1050 card = adapter->card;
1051
1052 if (card && card->cmdrsp_buf) {
1053 mwifiex_unmap_pci_memory(adapter, card->cmdrsp_buf,
1054 PCI_DMA_FROMDEVICE);
1055 dev_kfree_skb_any(card->cmdrsp_buf);
1056 card->cmdrsp_buf = NULL;
1057 }
1058
1059 if (card && card->cmd_buf) {
1060 mwifiex_unmap_pci_memory(adapter, card->cmd_buf,
1061 PCI_DMA_TODEVICE);
1062 dev_kfree_skb_any(card->cmd_buf);
1063 card->cmd_buf = NULL;
1064 }
1065 return 0;
1066 }
1067
1068 /*
1069 * This function allocates a buffer for sleep cookie
1070 */
1071 static int mwifiex_pcie_alloc_sleep_cookie_buf(struct mwifiex_adapter *adapter)
1072 {
1073 struct pcie_service_card *card = adapter->card;
1074 u32 tmp;
1075
1076 card->sleep_cookie_vbase = pci_alloc_consistent(card->dev, sizeof(u32),
1077 &card->sleep_cookie_pbase);
1078 if (!card->sleep_cookie_vbase) {
1079 mwifiex_dbg(adapter, ERROR,
1080 "pci_alloc_consistent failed!\n");
1081 return -ENOMEM;
1082 }
1083 /* Init val of Sleep Cookie */
1084 tmp = FW_AWAKE_COOKIE;
1085 put_unaligned(tmp, card->sleep_cookie_vbase);
1086
1087 mwifiex_dbg(adapter, INFO,
1088 "alloc_scook: sleep cookie=0x%x\n",
1089 get_unaligned(card->sleep_cookie_vbase));
1090
1091 return 0;
1092 }
1093
1094 /*
1095 * This function deletes buffer for sleep cookie
1096 */
1097 static int mwifiex_pcie_delete_sleep_cookie_buf(struct mwifiex_adapter *adapter)
1098 {
1099 struct pcie_service_card *card;
1100
1101 if (!adapter)
1102 return 0;
1103
1104 card = adapter->card;
1105
1106 if (card && card->sleep_cookie_vbase) {
1107 pci_free_consistent(card->dev, sizeof(u32),
1108 card->sleep_cookie_vbase,
1109 card->sleep_cookie_pbase);
1110 card->sleep_cookie_vbase = NULL;
1111 }
1112
1113 return 0;
1114 }
1115
1116 /* This function flushes the TX buffer descriptor ring
1117 * This function defined as handler is also called while cleaning TXRX
1118 * during disconnect/ bss stop.
1119 */
1120 static int mwifiex_clean_pcie_ring_buf(struct mwifiex_adapter *adapter)
1121 {
1122 struct pcie_service_card *card = adapter->card;
1123
1124 if (!mwifiex_pcie_txbd_empty(card, card->txbd_rdptr)) {
1125 card->txbd_flush = 1;
1126 /* write pointer already set at last send
1127 * send dnld-rdy intr again, wait for completion.
1128 */
1129 if (mwifiex_write_reg(adapter, PCIE_CPU_INT_EVENT,
1130 CPU_INTR_DNLD_RDY)) {
1131 mwifiex_dbg(adapter, ERROR,
1132 "failed to assert dnld-rdy interrupt.\n");
1133 return -1;
1134 }
1135 }
1136 return 0;
1137 }
1138
1139 /*
1140 * This function unmaps and frees downloaded data buffer
1141 */
1142 static int mwifiex_pcie_send_data_complete(struct mwifiex_adapter *adapter)
1143 {
1144 struct sk_buff *skb;
1145 u32 wrdoneidx, rdptr, num_tx_buffs, unmap_count = 0;
1146 struct mwifiex_pcie_buf_desc *desc;
1147 struct mwifiex_pfu_buf_desc *desc2;
1148 struct pcie_service_card *card = adapter->card;
1149 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg;
1150
1151 if (!mwifiex_pcie_ok_to_access_hw(adapter))
1152 mwifiex_pm_wakeup_card(adapter);
1153
1154 /* Read the TX ring read pointer set by firmware */
1155 if (mwifiex_read_reg(adapter, reg->tx_rdptr, &rdptr)) {
1156 mwifiex_dbg(adapter, ERROR,
1157 "SEND COMP: failed to read reg->tx_rdptr\n");
1158 return -1;
1159 }
1160
1161 mwifiex_dbg(adapter, DATA,
1162 "SEND COMP: rdptr_prev=0x%x, rdptr=0x%x\n",
1163 card->txbd_rdptr, rdptr);
1164
1165 num_tx_buffs = MWIFIEX_MAX_TXRX_BD << reg->tx_start_ptr;
1166 /* free from previous txbd_rdptr to current txbd_rdptr */
1167 while (((card->txbd_rdptr & reg->tx_mask) !=
1168 (rdptr & reg->tx_mask)) ||
1169 ((card->txbd_rdptr & reg->tx_rollover_ind) !=
1170 (rdptr & reg->tx_rollover_ind))) {
1171 wrdoneidx = (card->txbd_rdptr & reg->tx_mask) >>
1172 reg->tx_start_ptr;
1173
1174 skb = card->tx_buf_list[wrdoneidx];
1175
1176 if (skb) {
1177 mwifiex_dbg(adapter, DATA,
1178 "SEND COMP: Detach skb %p at txbd_rdidx=%d\n",
1179 skb, wrdoneidx);
1180 mwifiex_unmap_pci_memory(adapter, skb,
1181 PCI_DMA_TODEVICE);
1182
1183 unmap_count++;
1184
1185 if (card->txbd_flush)
1186 mwifiex_write_data_complete(adapter, skb, 0,
1187 -1);
1188 else
1189 mwifiex_write_data_complete(adapter, skb, 0, 0);
1190 atomic_dec(&adapter->tx_hw_pending);
1191 }
1192
1193 card->tx_buf_list[wrdoneidx] = NULL;
1194
1195 if (reg->pfu_enabled) {
1196 desc2 = card->txbd_ring[wrdoneidx];
1197 memset(desc2, 0, sizeof(*desc2));
1198 } else {
1199 desc = card->txbd_ring[wrdoneidx];
1200 memset(desc, 0, sizeof(*desc));
1201 }
1202 switch (card->dev->device) {
1203 case PCIE_DEVICE_ID_MARVELL_88W8766P:
1204 card->txbd_rdptr++;
1205 break;
1206 case PCIE_DEVICE_ID_MARVELL_88W8897:
1207 case PCIE_DEVICE_ID_MARVELL_88W8997:
1208 card->txbd_rdptr += reg->ring_tx_start_ptr;
1209 break;
1210 }
1211
1212
1213 if ((card->txbd_rdptr & reg->tx_mask) == num_tx_buffs)
1214 card->txbd_rdptr = ((card->txbd_rdptr &
1215 reg->tx_rollover_ind) ^
1216 reg->tx_rollover_ind);
1217 }
1218
1219 if (unmap_count)
1220 adapter->data_sent = false;
1221
1222 if (card->txbd_flush) {
1223 if (mwifiex_pcie_txbd_empty(card, card->txbd_rdptr))
1224 card->txbd_flush = 0;
1225 else
1226 mwifiex_clean_pcie_ring_buf(adapter);
1227 }
1228
1229 return 0;
1230 }
1231
1232 /* This function sends data buffer to device. First 4 bytes of payload
1233 * are filled with payload length and payload type. Then this payload
1234 * is mapped to PCI device memory. Tx ring pointers are advanced accordingly.
1235 * Download ready interrupt to FW is deffered if Tx ring is not full and
1236 * additional payload can be accomodated.
1237 * Caller must ensure tx_param parameter to this function is not NULL.
1238 */
1239 static int
1240 mwifiex_pcie_send_data(struct mwifiex_adapter *adapter, struct sk_buff *skb,
1241 struct mwifiex_tx_param *tx_param)
1242 {
1243 struct pcie_service_card *card = adapter->card;
1244 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg;
1245 u32 wrindx, num_tx_buffs, rx_val;
1246 int ret;
1247 dma_addr_t buf_pa;
1248 struct mwifiex_pcie_buf_desc *desc = NULL;
1249 struct mwifiex_pfu_buf_desc *desc2 = NULL;
1250
1251 if (!(skb->data && skb->len)) {
1252 mwifiex_dbg(adapter, ERROR,
1253 "%s(): invalid parameter <%p, %#x>\n",
1254 __func__, skb->data, skb->len);
1255 return -1;
1256 }
1257
1258 if (!mwifiex_pcie_ok_to_access_hw(adapter))
1259 mwifiex_pm_wakeup_card(adapter);
1260
1261 num_tx_buffs = MWIFIEX_MAX_TXRX_BD << reg->tx_start_ptr;
1262 mwifiex_dbg(adapter, DATA,
1263 "info: SEND DATA: <Rd: %#x, Wr: %#x>\n",
1264 card->txbd_rdptr, card->txbd_wrptr);
1265 if (mwifiex_pcie_txbd_not_full(card)) {
1266 u8 *payload;
1267
1268 adapter->data_sent = true;
1269 payload = skb->data;
1270 put_unaligned_le16((u16)skb->len, payload + 0);
1271 put_unaligned_le16(MWIFIEX_TYPE_DATA, payload + 2);
1272
1273 if (mwifiex_map_pci_memory(adapter, skb, skb->len,
1274 PCI_DMA_TODEVICE))
1275 return -1;
1276
1277 wrindx = (card->txbd_wrptr & reg->tx_mask) >> reg->tx_start_ptr;
1278 buf_pa = MWIFIEX_SKB_DMA_ADDR(skb);
1279 card->tx_buf_list[wrindx] = skb;
1280 atomic_inc(&adapter->tx_hw_pending);
1281
1282 if (reg->pfu_enabled) {
1283 desc2 = card->txbd_ring[wrindx];
1284 desc2->paddr = buf_pa;
1285 desc2->len = (u16)skb->len;
1286 desc2->frag_len = (u16)skb->len;
1287 desc2->offset = 0;
1288 desc2->flags = MWIFIEX_BD_FLAG_FIRST_DESC |
1289 MWIFIEX_BD_FLAG_LAST_DESC;
1290 } else {
1291 desc = card->txbd_ring[wrindx];
1292 desc->paddr = buf_pa;
1293 desc->len = (u16)skb->len;
1294 desc->flags = MWIFIEX_BD_FLAG_FIRST_DESC |
1295 MWIFIEX_BD_FLAG_LAST_DESC;
1296 }
1297
1298 switch (card->dev->device) {
1299 case PCIE_DEVICE_ID_MARVELL_88W8766P:
1300 card->txbd_wrptr++;
1301 break;
1302 case PCIE_DEVICE_ID_MARVELL_88W8897:
1303 case PCIE_DEVICE_ID_MARVELL_88W8997:
1304 card->txbd_wrptr += reg->ring_tx_start_ptr;
1305 break;
1306 }
1307
1308 if ((card->txbd_wrptr & reg->tx_mask) == num_tx_buffs)
1309 card->txbd_wrptr = ((card->txbd_wrptr &
1310 reg->tx_rollover_ind) ^
1311 reg->tx_rollover_ind);
1312
1313 rx_val = card->rxbd_rdptr & reg->rx_wrap_mask;
1314 /* Write the TX ring write pointer in to reg->tx_wrptr */
1315 if (mwifiex_write_reg(adapter, reg->tx_wrptr,
1316 card->txbd_wrptr | rx_val)) {
1317 mwifiex_dbg(adapter, ERROR,
1318 "SEND DATA: failed to write reg->tx_wrptr\n");
1319 ret = -1;
1320 goto done_unmap;
1321 }
1322 if ((mwifiex_pcie_txbd_not_full(card)) &&
1323 tx_param->next_pkt_len) {
1324 /* have more packets and TxBD still can hold more */
1325 mwifiex_dbg(adapter, DATA,
1326 "SEND DATA: delay dnld-rdy interrupt.\n");
1327 adapter->data_sent = false;
1328 } else {
1329 /* Send the TX ready interrupt */
1330 if (mwifiex_write_reg(adapter, PCIE_CPU_INT_EVENT,
1331 CPU_INTR_DNLD_RDY)) {
1332 mwifiex_dbg(adapter, ERROR,
1333 "SEND DATA: failed to assert dnld-rdy interrupt.\n");
1334 ret = -1;
1335 goto done_unmap;
1336 }
1337 }
1338 mwifiex_dbg(adapter, DATA,
1339 "info: SEND DATA: Updated <Rd: %#x, Wr:\t"
1340 "%#x> and sent packet to firmware successfully\n",
1341 card->txbd_rdptr, card->txbd_wrptr);
1342 } else {
1343 mwifiex_dbg(adapter, DATA,
1344 "info: TX Ring full, can't send packets to fw\n");
1345 adapter->data_sent = true;
1346 /* Send the TX ready interrupt */
1347 if (mwifiex_write_reg(adapter, PCIE_CPU_INT_EVENT,
1348 CPU_INTR_DNLD_RDY))
1349 mwifiex_dbg(adapter, ERROR,
1350 "SEND DATA: failed to assert door-bell intr\n");
1351 return -EBUSY;
1352 }
1353
1354 return -EINPROGRESS;
1355 done_unmap:
1356 mwifiex_unmap_pci_memory(adapter, skb, PCI_DMA_TODEVICE);
1357 card->tx_buf_list[wrindx] = NULL;
1358 atomic_dec(&adapter->tx_hw_pending);
1359 if (reg->pfu_enabled)
1360 memset(desc2, 0, sizeof(*desc2));
1361 else
1362 memset(desc, 0, sizeof(*desc));
1363
1364 return ret;
1365 }
1366
1367 /*
1368 * This function handles received buffer ring and
1369 * dispatches packets to upper
1370 */
1371 static int mwifiex_pcie_process_recv_data(struct mwifiex_adapter *adapter)
1372 {
1373 struct pcie_service_card *card = adapter->card;
1374 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg;
1375 u32 wrptr, rd_index, tx_val;
1376 dma_addr_t buf_pa;
1377 int ret = 0;
1378 struct sk_buff *skb_tmp = NULL;
1379 struct mwifiex_pcie_buf_desc *desc;
1380 struct mwifiex_pfu_buf_desc *desc2;
1381
1382 if (!mwifiex_pcie_ok_to_access_hw(adapter))
1383 mwifiex_pm_wakeup_card(adapter);
1384
1385 /* Read the RX ring Write pointer set by firmware */
1386 if (mwifiex_read_reg(adapter, reg->rx_wrptr, &wrptr)) {
1387 mwifiex_dbg(adapter, ERROR,
1388 "RECV DATA: failed to read reg->rx_wrptr\n");
1389 ret = -1;
1390 goto done;
1391 }
1392 card->rxbd_wrptr = wrptr;
1393
1394 while (((wrptr & reg->rx_mask) !=
1395 (card->rxbd_rdptr & reg->rx_mask)) ||
1396 ((wrptr & reg->rx_rollover_ind) ==
1397 (card->rxbd_rdptr & reg->rx_rollover_ind))) {
1398 struct sk_buff *skb_data;
1399 u16 rx_len;
1400
1401 rd_index = card->rxbd_rdptr & reg->rx_mask;
1402 skb_data = card->rx_buf_list[rd_index];
1403
1404 /* If skb allocation was failed earlier for Rx packet,
1405 * rx_buf_list[rd_index] would have been left with a NULL.
1406 */
1407 if (!skb_data)
1408 return -ENOMEM;
1409
1410 mwifiex_unmap_pci_memory(adapter, skb_data, PCI_DMA_FROMDEVICE);
1411 card->rx_buf_list[rd_index] = NULL;
1412
1413 /* Get data length from interface header -
1414 * first 2 bytes for len, next 2 bytes is for type
1415 */
1416 rx_len = get_unaligned_le16(skb_data->data);
1417 if (WARN_ON(rx_len <= adapter->intf_hdr_len ||
1418 rx_len > MWIFIEX_RX_DATA_BUF_SIZE)) {
1419 mwifiex_dbg(adapter, ERROR,
1420 "Invalid RX len %d, Rd=%#x, Wr=%#x\n",
1421 rx_len, card->rxbd_rdptr, wrptr);
1422 dev_kfree_skb_any(skb_data);
1423 } else {
1424 skb_put(skb_data, rx_len);
1425 mwifiex_dbg(adapter, DATA,
1426 "info: RECV DATA: Rd=%#x, Wr=%#x, Len=%d\n",
1427 card->rxbd_rdptr, wrptr, rx_len);
1428 skb_pull(skb_data, adapter->intf_hdr_len);
1429 if (adapter->rx_work_enabled) {
1430 skb_queue_tail(&adapter->rx_data_q, skb_data);
1431 adapter->data_received = true;
1432 atomic_inc(&adapter->rx_pending);
1433 } else {
1434 mwifiex_handle_rx_packet(adapter, skb_data);
1435 }
1436 }
1437
1438 skb_tmp = mwifiex_alloc_dma_align_buf(MWIFIEX_RX_DATA_BUF_SIZE,
1439 GFP_KERNEL);
1440 if (!skb_tmp) {
1441 mwifiex_dbg(adapter, ERROR,
1442 "Unable to allocate skb.\n");
1443 return -ENOMEM;
1444 }
1445
1446 if (mwifiex_map_pci_memory(adapter, skb_tmp,
1447 MWIFIEX_RX_DATA_BUF_SIZE,
1448 PCI_DMA_FROMDEVICE))
1449 return -1;
1450
1451 buf_pa = MWIFIEX_SKB_DMA_ADDR(skb_tmp);
1452
1453 mwifiex_dbg(adapter, INFO,
1454 "RECV DATA: Attach new sk_buff %p at rxbd_rdidx=%d\n",
1455 skb_tmp, rd_index);
1456 card->rx_buf_list[rd_index] = skb_tmp;
1457
1458 if (reg->pfu_enabled) {
1459 desc2 = card->rxbd_ring[rd_index];
1460 desc2->paddr = buf_pa;
1461 desc2->len = skb_tmp->len;
1462 desc2->frag_len = skb_tmp->len;
1463 desc2->offset = 0;
1464 desc2->flags = reg->ring_flag_sop | reg->ring_flag_eop;
1465 } else {
1466 desc = card->rxbd_ring[rd_index];
1467 desc->paddr = buf_pa;
1468 desc->len = skb_tmp->len;
1469 desc->flags = 0;
1470 }
1471
1472 if ((++card->rxbd_rdptr & reg->rx_mask) ==
1473 MWIFIEX_MAX_TXRX_BD) {
1474 card->rxbd_rdptr = ((card->rxbd_rdptr &
1475 reg->rx_rollover_ind) ^
1476 reg->rx_rollover_ind);
1477 }
1478 mwifiex_dbg(adapter, DATA,
1479 "info: RECV DATA: <Rd: %#x, Wr: %#x>\n",
1480 card->rxbd_rdptr, wrptr);
1481
1482 tx_val = card->txbd_wrptr & reg->tx_wrap_mask;
1483 /* Write the RX ring read pointer in to reg->rx_rdptr */
1484 if (mwifiex_write_reg(adapter, reg->rx_rdptr,
1485 card->rxbd_rdptr | tx_val)) {
1486 mwifiex_dbg(adapter, DATA,
1487 "RECV DATA: failed to write reg->rx_rdptr\n");
1488 ret = -1;
1489 goto done;
1490 }
1491
1492 /* Read the RX ring Write pointer set by firmware */
1493 if (mwifiex_read_reg(adapter, reg->rx_wrptr, &wrptr)) {
1494 mwifiex_dbg(adapter, ERROR,
1495 "RECV DATA: failed to read reg->rx_wrptr\n");
1496 ret = -1;
1497 goto done;
1498 }
1499 mwifiex_dbg(adapter, DATA,
1500 "info: RECV DATA: Rcvd packet from fw successfully\n");
1501 card->rxbd_wrptr = wrptr;
1502 }
1503
1504 done:
1505 return ret;
1506 }
1507
1508 /*
1509 * This function downloads the boot command to device
1510 */
1511 static int
1512 mwifiex_pcie_send_boot_cmd(struct mwifiex_adapter *adapter, struct sk_buff *skb)
1513 {
1514 dma_addr_t buf_pa;
1515 struct pcie_service_card *card = adapter->card;
1516 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg;
1517
1518 if (!(skb->data && skb->len)) {
1519 mwifiex_dbg(adapter, ERROR,
1520 "Invalid parameter in %s <%p. len %d>\n",
1521 __func__, skb->data, skb->len);
1522 return -1;
1523 }
1524
1525 if (mwifiex_map_pci_memory(adapter, skb, skb->len, PCI_DMA_TODEVICE))
1526 return -1;
1527
1528 buf_pa = MWIFIEX_SKB_DMA_ADDR(skb);
1529
1530 /* Write the lower 32bits of the physical address to low command
1531 * address scratch register
1532 */
1533 if (mwifiex_write_reg(adapter, reg->cmd_addr_lo, (u32)buf_pa)) {
1534 mwifiex_dbg(adapter, ERROR,
1535 "%s: failed to write download command to boot code.\n",
1536 __func__);
1537 mwifiex_unmap_pci_memory(adapter, skb, PCI_DMA_TODEVICE);
1538 return -1;
1539 }
1540
1541 /* Write the upper 32bits of the physical address to high command
1542 * address scratch register
1543 */
1544 if (mwifiex_write_reg(adapter, reg->cmd_addr_hi,
1545 (u32)((u64)buf_pa >> 32))) {
1546 mwifiex_dbg(adapter, ERROR,
1547 "%s: failed to write download command to boot code.\n",
1548 __func__);
1549 mwifiex_unmap_pci_memory(adapter, skb, PCI_DMA_TODEVICE);
1550 return -1;
1551 }
1552
1553 /* Write the command length to cmd_size scratch register */
1554 if (mwifiex_write_reg(adapter, reg->cmd_size, skb->len)) {
1555 mwifiex_dbg(adapter, ERROR,
1556 "%s: failed to write command len to cmd_size scratch reg\n",
1557 __func__);
1558 mwifiex_unmap_pci_memory(adapter, skb, PCI_DMA_TODEVICE);
1559 return -1;
1560 }
1561
1562 /* Ring the door bell */
1563 if (mwifiex_write_reg(adapter, PCIE_CPU_INT_EVENT,
1564 CPU_INTR_DOOR_BELL)) {
1565 mwifiex_dbg(adapter, ERROR,
1566 "%s: failed to assert door-bell intr\n", __func__);
1567 mwifiex_unmap_pci_memory(adapter, skb, PCI_DMA_TODEVICE);
1568 return -1;
1569 }
1570
1571 return 0;
1572 }
1573
1574 /* This function init rx port in firmware which in turn enables to receive data
1575 * from device before transmitting any packet.
1576 */
1577 static int mwifiex_pcie_init_fw_port(struct mwifiex_adapter *adapter)
1578 {
1579 struct pcie_service_card *card = adapter->card;
1580 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg;
1581 int tx_wrap = card->txbd_wrptr & reg->tx_wrap_mask;
1582
1583 /* Write the RX ring read pointer in to reg->rx_rdptr */
1584 if (mwifiex_write_reg(adapter, reg->rx_rdptr, card->rxbd_rdptr |
1585 tx_wrap)) {
1586 mwifiex_dbg(adapter, ERROR,
1587 "RECV DATA: failed to write reg->rx_rdptr\n");
1588 return -1;
1589 }
1590 return 0;
1591 }
1592
1593 /* This function downloads commands to the device
1594 */
1595 static int
1596 mwifiex_pcie_send_cmd(struct mwifiex_adapter *adapter, struct sk_buff *skb)
1597 {
1598 struct pcie_service_card *card = adapter->card;
1599 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg;
1600 int ret = 0;
1601 dma_addr_t cmd_buf_pa, cmdrsp_buf_pa;
1602 u8 *payload = (u8 *)skb->data;
1603
1604 if (!(skb->data && skb->len)) {
1605 mwifiex_dbg(adapter, ERROR,
1606 "Invalid parameter in %s <%p, %#x>\n",
1607 __func__, skb->data, skb->len);
1608 return -1;
1609 }
1610
1611 /* Make sure a command response buffer is available */
1612 if (!card->cmdrsp_buf) {
1613 mwifiex_dbg(adapter, ERROR,
1614 "No response buffer available, send command failed\n");
1615 return -EBUSY;
1616 }
1617
1618 if (!mwifiex_pcie_ok_to_access_hw(adapter))
1619 mwifiex_pm_wakeup_card(adapter);
1620
1621 adapter->cmd_sent = true;
1622
1623 put_unaligned_le16((u16)skb->len, &payload[0]);
1624 put_unaligned_le16(MWIFIEX_TYPE_CMD, &payload[2]);
1625
1626 if (mwifiex_map_pci_memory(adapter, skb, skb->len, PCI_DMA_TODEVICE))
1627 return -1;
1628
1629 card->cmd_buf = skb;
1630 /*
1631 * Need to keep a reference, since core driver might free up this
1632 * buffer before we've unmapped it.
1633 */
1634 skb_get(skb);
1635
1636 /* To send a command, the driver will:
1637 1. Write the 64bit physical address of the data buffer to
1638 cmd response address low + cmd response address high
1639 2. Ring the door bell (i.e. set the door bell interrupt)
1640
1641 In response to door bell interrupt, the firmware will perform
1642 the DMA of the command packet (first header to obtain the total
1643 length and then rest of the command).
1644 */
1645
1646 if (card->cmdrsp_buf) {
1647 cmdrsp_buf_pa = MWIFIEX_SKB_DMA_ADDR(card->cmdrsp_buf);
1648 /* Write the lower 32bits of the cmdrsp buffer physical
1649 address */
1650 if (mwifiex_write_reg(adapter, reg->cmdrsp_addr_lo,
1651 (u32)cmdrsp_buf_pa)) {
1652 mwifiex_dbg(adapter, ERROR,
1653 "Failed to write download cmd to boot code.\n");
1654 ret = -1;
1655 goto done;
1656 }
1657 /* Write the upper 32bits of the cmdrsp buffer physical
1658 address */
1659 if (mwifiex_write_reg(adapter, reg->cmdrsp_addr_hi,
1660 (u32)((u64)cmdrsp_buf_pa >> 32))) {
1661 mwifiex_dbg(adapter, ERROR,
1662 "Failed to write download cmd to boot code.\n");
1663 ret = -1;
1664 goto done;
1665 }
1666 }
1667
1668 cmd_buf_pa = MWIFIEX_SKB_DMA_ADDR(card->cmd_buf);
1669 /* Write the lower 32bits of the physical address to reg->cmd_addr_lo */
1670 if (mwifiex_write_reg(adapter, reg->cmd_addr_lo,
1671 (u32)cmd_buf_pa)) {
1672 mwifiex_dbg(adapter, ERROR,
1673 "Failed to write download cmd to boot code.\n");
1674 ret = -1;
1675 goto done;
1676 }
1677 /* Write the upper 32bits of the physical address to reg->cmd_addr_hi */
1678 if (mwifiex_write_reg(adapter, reg->cmd_addr_hi,
1679 (u32)((u64)cmd_buf_pa >> 32))) {
1680 mwifiex_dbg(adapter, ERROR,
1681 "Failed to write download cmd to boot code.\n");
1682 ret = -1;
1683 goto done;
1684 }
1685
1686 /* Write the command length to reg->cmd_size */
1687 if (mwifiex_write_reg(adapter, reg->cmd_size,
1688 card->cmd_buf->len)) {
1689 mwifiex_dbg(adapter, ERROR,
1690 "Failed to write cmd len to reg->cmd_size\n");
1691 ret = -1;
1692 goto done;
1693 }
1694
1695 /* Ring the door bell */
1696 if (mwifiex_write_reg(adapter, PCIE_CPU_INT_EVENT,
1697 CPU_INTR_DOOR_BELL)) {
1698 mwifiex_dbg(adapter, ERROR,
1699 "Failed to assert door-bell intr\n");
1700 ret = -1;
1701 goto done;
1702 }
1703
1704 done:
1705 if (ret)
1706 adapter->cmd_sent = false;
1707
1708 return 0;
1709 }
1710
1711 /*
1712 * This function handles command complete interrupt
1713 */
1714 static int mwifiex_pcie_process_cmd_complete(struct mwifiex_adapter *adapter)
1715 {
1716 struct pcie_service_card *card = adapter->card;
1717 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg;
1718 struct sk_buff *skb = card->cmdrsp_buf;
1719 int count = 0;
1720 u16 rx_len;
1721
1722 mwifiex_dbg(adapter, CMD,
1723 "info: Rx CMD Response\n");
1724
1725 if (adapter->curr_cmd)
1726 mwifiex_unmap_pci_memory(adapter, skb, PCI_DMA_FROMDEVICE);
1727 else
1728 pci_dma_sync_single_for_cpu(card->dev,
1729 MWIFIEX_SKB_DMA_ADDR(skb),
1730 MWIFIEX_UPLD_SIZE,
1731 PCI_DMA_FROMDEVICE);
1732
1733 /* Unmap the command as a response has been received. */
1734 if (card->cmd_buf) {
1735 mwifiex_unmap_pci_memory(adapter, card->cmd_buf,
1736 PCI_DMA_TODEVICE);
1737 dev_kfree_skb_any(card->cmd_buf);
1738 card->cmd_buf = NULL;
1739 }
1740
1741 rx_len = get_unaligned_le16(skb->data);
1742 skb_put(skb, MWIFIEX_UPLD_SIZE - skb->len);
1743 skb_trim(skb, rx_len);
1744
1745 if (!adapter->curr_cmd) {
1746 if (adapter->ps_state == PS_STATE_SLEEP_CFM) {
1747 pci_dma_sync_single_for_device(card->dev,
1748 MWIFIEX_SKB_DMA_ADDR(skb),
1749 MWIFIEX_SLEEP_COOKIE_SIZE,
1750 PCI_DMA_FROMDEVICE);
1751 if (mwifiex_write_reg(adapter,
1752 PCIE_CPU_INT_EVENT,
1753 CPU_INTR_SLEEP_CFM_DONE)) {
1754 mwifiex_dbg(adapter, ERROR,
1755 "Write register failed\n");
1756 return -1;
1757 }
1758 mwifiex_delay_for_sleep_cookie(adapter,
1759 MWIFIEX_MAX_DELAY_COUNT);
1760 mwifiex_unmap_pci_memory(adapter, skb,
1761 PCI_DMA_FROMDEVICE);
1762 skb_pull(skb, adapter->intf_hdr_len);
1763 while (reg->sleep_cookie && (count++ < 10) &&
1764 mwifiex_pcie_ok_to_access_hw(adapter))
1765 usleep_range(50, 60);
1766 mwifiex_pcie_enable_host_int(adapter);
1767 mwifiex_process_sleep_confirm_resp(adapter, skb->data,
1768 skb->len);
1769 } else {
1770 mwifiex_dbg(adapter, ERROR,
1771 "There is no command but got cmdrsp\n");
1772 }
1773 memcpy(adapter->upld_buf, skb->data,
1774 min_t(u32, MWIFIEX_SIZE_OF_CMD_BUFFER, skb->len));
1775 skb_push(skb, adapter->intf_hdr_len);
1776 if (mwifiex_map_pci_memory(adapter, skb, MWIFIEX_UPLD_SIZE,
1777 PCI_DMA_FROMDEVICE))
1778 return -1;
1779 } else if (mwifiex_pcie_ok_to_access_hw(adapter)) {
1780 skb_pull(skb, adapter->intf_hdr_len);
1781 adapter->curr_cmd->resp_skb = skb;
1782 adapter->cmd_resp_received = true;
1783 /* Take the pointer and set it to CMD node and will
1784 return in the response complete callback */
1785 card->cmdrsp_buf = NULL;
1786
1787 /* Clear the cmd-rsp buffer address in scratch registers. This
1788 will prevent firmware from writing to the same response
1789 buffer again. */
1790 if (mwifiex_write_reg(adapter, reg->cmdrsp_addr_lo, 0)) {
1791 mwifiex_dbg(adapter, ERROR,
1792 "cmd_done: failed to clear cmd_rsp_addr_lo\n");
1793 return -1;
1794 }
1795 /* Write the upper 32bits of the cmdrsp buffer physical
1796 address */
1797 if (mwifiex_write_reg(adapter, reg->cmdrsp_addr_hi, 0)) {
1798 mwifiex_dbg(adapter, ERROR,
1799 "cmd_done: failed to clear cmd_rsp_addr_hi\n");
1800 return -1;
1801 }
1802 }
1803
1804 return 0;
1805 }
1806
1807 /*
1808 * Command Response processing complete handler
1809 */
1810 static int mwifiex_pcie_cmdrsp_complete(struct mwifiex_adapter *adapter,
1811 struct sk_buff *skb)
1812 {
1813 struct pcie_service_card *card = adapter->card;
1814
1815 if (skb) {
1816 card->cmdrsp_buf = skb;
1817 skb_push(card->cmdrsp_buf, adapter->intf_hdr_len);
1818 if (mwifiex_map_pci_memory(adapter, skb, MWIFIEX_UPLD_SIZE,
1819 PCI_DMA_FROMDEVICE))
1820 return -1;
1821 }
1822
1823 return 0;
1824 }
1825
1826 /*
1827 * This function handles firmware event ready interrupt
1828 */
1829 static int mwifiex_pcie_process_event_ready(struct mwifiex_adapter *adapter)
1830 {
1831 struct pcie_service_card *card = adapter->card;
1832 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg;
1833 u32 rdptr = card->evtbd_rdptr & MWIFIEX_EVTBD_MASK;
1834 u32 wrptr, event;
1835 struct mwifiex_evt_buf_desc *desc;
1836
1837 if (!mwifiex_pcie_ok_to_access_hw(adapter))
1838 mwifiex_pm_wakeup_card(adapter);
1839
1840 if (adapter->event_received) {
1841 mwifiex_dbg(adapter, EVENT,
1842 "info: Event being processed,\t"
1843 "do not process this interrupt just yet\n");
1844 return 0;
1845 }
1846
1847 if (rdptr >= MWIFIEX_MAX_EVT_BD) {
1848 mwifiex_dbg(adapter, ERROR,
1849 "info: Invalid read pointer...\n");
1850 return -1;
1851 }
1852
1853 /* Read the event ring write pointer set by firmware */
1854 if (mwifiex_read_reg(adapter, reg->evt_wrptr, &wrptr)) {
1855 mwifiex_dbg(adapter, ERROR,
1856 "EventReady: failed to read reg->evt_wrptr\n");
1857 return -1;
1858 }
1859
1860 mwifiex_dbg(adapter, EVENT,
1861 "info: EventReady: Initial <Rd: 0x%x, Wr: 0x%x>",
1862 card->evtbd_rdptr, wrptr);
1863 if (((wrptr & MWIFIEX_EVTBD_MASK) != (card->evtbd_rdptr
1864 & MWIFIEX_EVTBD_MASK)) ||
1865 ((wrptr & reg->evt_rollover_ind) ==
1866 (card->evtbd_rdptr & reg->evt_rollover_ind))) {
1867 struct sk_buff *skb_cmd;
1868 __le16 data_len = 0;
1869 u16 evt_len;
1870
1871 mwifiex_dbg(adapter, INFO,
1872 "info: Read Index: %d\n", rdptr);
1873 skb_cmd = card->evt_buf_list[rdptr];
1874 mwifiex_unmap_pci_memory(adapter, skb_cmd, PCI_DMA_FROMDEVICE);
1875
1876 /* Take the pointer and set it to event pointer in adapter
1877 and will return back after event handling callback */
1878 card->evt_buf_list[rdptr] = NULL;
1879 desc = card->evtbd_ring[rdptr];
1880 memset(desc, 0, sizeof(*desc));
1881
1882 event = get_unaligned_le32(
1883 &skb_cmd->data[adapter->intf_hdr_len]);
1884 adapter->event_cause = event;
1885 /* The first 4bytes will be the event transfer header
1886 len is 2 bytes followed by type which is 2 bytes */
1887 memcpy(&data_len, skb_cmd->data, sizeof(__le16));
1888 evt_len = le16_to_cpu(data_len);
1889 skb_trim(skb_cmd, evt_len);
1890 skb_pull(skb_cmd, adapter->intf_hdr_len);
1891 mwifiex_dbg(adapter, EVENT,
1892 "info: Event length: %d\n", evt_len);
1893
1894 if ((evt_len > 0) && (evt_len < MAX_EVENT_SIZE))
1895 memcpy(adapter->event_body, skb_cmd->data +
1896 MWIFIEX_EVENT_HEADER_LEN, evt_len -
1897 MWIFIEX_EVENT_HEADER_LEN);
1898
1899 adapter->event_received = true;
1900 adapter->event_skb = skb_cmd;
1901
1902 /* Do not update the event read pointer here, wait till the
1903 buffer is released. This is just to make things simpler,
1904 we need to find a better method of managing these buffers.
1905 */
1906 } else {
1907 if (mwifiex_write_reg(adapter, PCIE_CPU_INT_EVENT,
1908 CPU_INTR_EVENT_DONE)) {
1909 mwifiex_dbg(adapter, ERROR,
1910 "Write register failed\n");
1911 return -1;
1912 }
1913 }
1914
1915 return 0;
1916 }
1917
1918 /*
1919 * Event processing complete handler
1920 */
1921 static int mwifiex_pcie_event_complete(struct mwifiex_adapter *adapter,
1922 struct sk_buff *skb)
1923 {
1924 struct pcie_service_card *card = adapter->card;
1925 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg;
1926 int ret = 0;
1927 u32 rdptr = card->evtbd_rdptr & MWIFIEX_EVTBD_MASK;
1928 u32 wrptr;
1929 struct mwifiex_evt_buf_desc *desc;
1930
1931 if (!skb)
1932 return 0;
1933
1934 if (rdptr >= MWIFIEX_MAX_EVT_BD) {
1935 mwifiex_dbg(adapter, ERROR,
1936 "event_complete: Invalid rdptr 0x%x\n",
1937 rdptr);
1938 return -EINVAL;
1939 }
1940
1941 /* Read the event ring write pointer set by firmware */
1942 if (mwifiex_read_reg(adapter, reg->evt_wrptr, &wrptr)) {
1943 mwifiex_dbg(adapter, ERROR,
1944 "event_complete: failed to read reg->evt_wrptr\n");
1945 return -1;
1946 }
1947
1948 if (!card->evt_buf_list[rdptr]) {
1949 skb_push(skb, adapter->intf_hdr_len);
1950 skb_put(skb, MAX_EVENT_SIZE - skb->len);
1951 if (mwifiex_map_pci_memory(adapter, skb,
1952 MAX_EVENT_SIZE,
1953 PCI_DMA_FROMDEVICE))
1954 return -1;
1955 card->evt_buf_list[rdptr] = skb;
1956 desc = card->evtbd_ring[rdptr];
1957 desc->paddr = MWIFIEX_SKB_DMA_ADDR(skb);
1958 desc->len = (u16)skb->len;
1959 desc->flags = 0;
1960 skb = NULL;
1961 } else {
1962 mwifiex_dbg(adapter, ERROR,
1963 "info: ERROR: buf still valid at index %d, <%p, %p>\n",
1964 rdptr, card->evt_buf_list[rdptr], skb);
1965 }
1966
1967 if ((++card->evtbd_rdptr & MWIFIEX_EVTBD_MASK) == MWIFIEX_MAX_EVT_BD) {
1968 card->evtbd_rdptr = ((card->evtbd_rdptr &
1969 reg->evt_rollover_ind) ^
1970 reg->evt_rollover_ind);
1971 }
1972
1973 mwifiex_dbg(adapter, EVENT,
1974 "info: Updated <Rd: 0x%x, Wr: 0x%x>",
1975 card->evtbd_rdptr, wrptr);
1976
1977 /* Write the event ring read pointer in to reg->evt_rdptr */
1978 if (mwifiex_write_reg(adapter, reg->evt_rdptr,
1979 card->evtbd_rdptr)) {
1980 mwifiex_dbg(adapter, ERROR,
1981 "event_complete: failed to read reg->evt_rdptr\n");
1982 return -1;
1983 }
1984
1985 mwifiex_dbg(adapter, EVENT,
1986 "info: Check Events Again\n");
1987 ret = mwifiex_pcie_process_event_ready(adapter);
1988
1989 return ret;
1990 }
1991
1992 /* Combo firmware image is a combination of
1993 * (1) combo crc heaer, start with CMD5
1994 * (2) bluetooth image, start with CMD7, end with CMD6, data wrapped in CMD1.
1995 * (3) wifi image.
1996 *
1997 * This function bypass the header and bluetooth part, return
1998 * the offset of tail wifi-only part. If the image is already wifi-only,
1999 * that is start with CMD1, return 0.
2000 */
2001
2002 static int mwifiex_extract_wifi_fw(struct mwifiex_adapter *adapter,
2003 const void *firmware, u32 firmware_len) {
2004 const struct mwifiex_fw_data *fwdata;
2005 u32 offset = 0, data_len, dnld_cmd;
2006 int ret = 0;
2007 bool cmd7_before = false, first_cmd = false;
2008
2009 while (1) {
2010 /* Check for integer and buffer overflow */
2011 if (offset + sizeof(fwdata->header) < sizeof(fwdata->header) ||
2012 offset + sizeof(fwdata->header) >= firmware_len) {
2013 mwifiex_dbg(adapter, ERROR,
2014 "extract wifi-only fw failure!\n");
2015 ret = -1;
2016 goto done;
2017 }
2018
2019 fwdata = firmware + offset;
2020 dnld_cmd = le32_to_cpu(fwdata->header.dnld_cmd);
2021 data_len = le32_to_cpu(fwdata->header.data_length);
2022
2023 /* Skip past header */
2024 offset += sizeof(fwdata->header);
2025
2026 switch (dnld_cmd) {
2027 case MWIFIEX_FW_DNLD_CMD_1:
2028 if (offset + data_len < data_len) {
2029 mwifiex_dbg(adapter, ERROR, "bad FW parse\n");
2030 ret = -1;
2031 goto done;
2032 }
2033
2034 /* Image start with cmd1, already wifi-only firmware */
2035 if (!first_cmd) {
2036 mwifiex_dbg(adapter, MSG,
2037 "input wifi-only firmware\n");
2038 return 0;
2039 }
2040
2041 if (!cmd7_before) {
2042 mwifiex_dbg(adapter, ERROR,
2043 "no cmd7 before cmd1!\n");
2044 ret = -1;
2045 goto done;
2046 }
2047 offset += data_len;
2048 break;
2049 case MWIFIEX_FW_DNLD_CMD_5:
2050 first_cmd = true;
2051 /* Check for integer overflow */
2052 if (offset + data_len < data_len) {
2053 mwifiex_dbg(adapter, ERROR, "bad FW parse\n");
2054 ret = -1;
2055 goto done;
2056 }
2057 offset += data_len;
2058 break;
2059 case MWIFIEX_FW_DNLD_CMD_6:
2060 first_cmd = true;
2061 /* Check for integer overflow */
2062 if (offset + data_len < data_len) {
2063 mwifiex_dbg(adapter, ERROR, "bad FW parse\n");
2064 ret = -1;
2065 goto done;
2066 }
2067 offset += data_len;
2068 if (offset >= firmware_len) {
2069 mwifiex_dbg(adapter, ERROR,
2070 "extract wifi-only fw failure!\n");
2071 ret = -1;
2072 } else {
2073 ret = offset;
2074 }
2075 goto done;
2076 case MWIFIEX_FW_DNLD_CMD_7:
2077 first_cmd = true;
2078 cmd7_before = true;
2079 break;
2080 default:
2081 mwifiex_dbg(adapter, ERROR, "unknown dnld_cmd %d\n",
2082 dnld_cmd);
2083 ret = -1;
2084 goto done;
2085 }
2086 }
2087
2088 done:
2089 return ret;
2090 }
2091
2092 /*
2093 * This function downloads the firmware to the card.
2094 *
2095 * Firmware is downloaded to the card in blocks. Every block download
2096 * is tested for CRC errors, and retried a number of times before
2097 * returning failure.
2098 */
2099 static int mwifiex_prog_fw_w_helper(struct mwifiex_adapter *adapter,
2100 struct mwifiex_fw_image *fw)
2101 {
2102 int ret;
2103 u8 *firmware = fw->fw_buf;
2104 u32 firmware_len = fw->fw_len;
2105 u32 offset = 0;
2106 struct sk_buff *skb;
2107 u32 txlen, tx_blocks = 0, tries, len, val;
2108 u32 block_retry_cnt = 0;
2109 struct pcie_service_card *card = adapter->card;
2110 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg;
2111
2112 if (!firmware || !firmware_len) {
2113 mwifiex_dbg(adapter, ERROR,
2114 "No firmware image found! Terminating download\n");
2115 return -1;
2116 }
2117
2118 mwifiex_dbg(adapter, INFO,
2119 "info: Downloading FW image (%d bytes)\n",
2120 firmware_len);
2121
2122 if (mwifiex_pcie_disable_host_int(adapter)) {
2123 mwifiex_dbg(adapter, ERROR,
2124 "%s: Disabling interrupts failed.\n", __func__);
2125 return -1;
2126 }
2127
2128 skb = dev_alloc_skb(MWIFIEX_UPLD_SIZE);
2129 if (!skb) {
2130 ret = -ENOMEM;
2131 goto done;
2132 }
2133
2134 ret = mwifiex_read_reg(adapter, PCIE_SCRATCH_13_REG, &val);
2135 if (ret) {
2136 mwifiex_dbg(adapter, FATAL, "Failed to read scratch register 13\n");
2137 goto done;
2138 }
2139
2140 /* PCIE FLR case: extract wifi part from combo firmware*/
2141 if (val == MWIFIEX_PCIE_FLR_HAPPENS) {
2142 ret = mwifiex_extract_wifi_fw(adapter, firmware, firmware_len);
2143 if (ret < 0) {
2144 mwifiex_dbg(adapter, ERROR, "Failed to extract wifi fw\n");
2145 goto done;
2146 }
2147 offset = ret;
2148 mwifiex_dbg(adapter, MSG,
2149 "info: dnld wifi firmware from %d bytes\n", offset);
2150 }
2151
2152 /* Perform firmware data transfer */
2153 do {
2154 u32 ireg_intr = 0;
2155
2156 /* More data? */
2157 if (offset >= firmware_len)
2158 break;
2159
2160 for (tries = 0; tries < MAX_POLL_TRIES; tries++) {
2161 ret = mwifiex_read_reg(adapter, reg->cmd_size,
2162 &len);
2163 if (ret) {
2164 mwifiex_dbg(adapter, FATAL,
2165 "Failed reading len from boot code\n");
2166 goto done;
2167 }
2168 if (len)
2169 break;
2170 usleep_range(10, 20);
2171 }
2172
2173 if (!len) {
2174 break;
2175 } else if (len > MWIFIEX_UPLD_SIZE) {
2176 mwifiex_dbg(adapter, ERROR,
2177 "FW download failure @ %d, invalid length %d\n",
2178 offset, len);
2179 ret = -1;
2180 goto done;
2181 }
2182
2183 txlen = len;
2184
2185 if (len & BIT(0)) {
2186 block_retry_cnt++;
2187 if (block_retry_cnt > MAX_WRITE_IOMEM_RETRY) {
2188 mwifiex_dbg(adapter, ERROR,
2189 "FW download failure @ %d, over max\t"
2190 "retry count\n", offset);
2191 ret = -1;
2192 goto done;
2193 }
2194 mwifiex_dbg(adapter, ERROR,
2195 "FW CRC error indicated by the\t"
2196 "helper: len = 0x%04X, txlen = %d\n",
2197 len, txlen);
2198 len &= ~BIT(0);
2199 /* Setting this to 0 to resend from same offset */
2200 txlen = 0;
2201 } else {
2202 block_retry_cnt = 0;
2203 /* Set blocksize to transfer - checking for
2204 last block */
2205 if (firmware_len - offset < txlen)
2206 txlen = firmware_len - offset;
2207
2208 tx_blocks = (txlen + card->pcie.blksz_fw_dl - 1) /
2209 card->pcie.blksz_fw_dl;
2210
2211 /* Copy payload to buffer */
2212 memmove(skb->data, &firmware[offset], txlen);
2213 }
2214
2215 skb_put(skb, MWIFIEX_UPLD_SIZE - skb->len);
2216 skb_trim(skb, tx_blocks * card->pcie.blksz_fw_dl);
2217
2218 /* Send the boot command to device */
2219 if (mwifiex_pcie_send_boot_cmd(adapter, skb)) {
2220 mwifiex_dbg(adapter, ERROR,
2221 "Failed to send firmware download command\n");
2222 ret = -1;
2223 goto done;
2224 }
2225
2226 /* Wait for the command done interrupt */
2227 for (tries = 0; tries < MAX_POLL_TRIES; tries++) {
2228 if (mwifiex_read_reg(adapter, PCIE_CPU_INT_STATUS,
2229 &ireg_intr)) {
2230 mwifiex_dbg(adapter, ERROR,
2231 "%s: Failed to read\t"
2232 "interrupt status during fw dnld.\n",
2233 __func__);
2234 mwifiex_unmap_pci_memory(adapter, skb,
2235 PCI_DMA_TODEVICE);
2236 ret = -1;
2237 goto done;
2238 }
2239 if (!(ireg_intr & CPU_INTR_DOOR_BELL))
2240 break;
2241 usleep_range(10, 20);
2242 }
2243 if (ireg_intr & CPU_INTR_DOOR_BELL) {
2244 mwifiex_dbg(adapter, ERROR, "%s: Card failed to ACK download\n",
2245 __func__);
2246 mwifiex_unmap_pci_memory(adapter, skb,
2247 PCI_DMA_TODEVICE);
2248 ret = -1;
2249 goto done;
2250 }
2251
2252 mwifiex_unmap_pci_memory(adapter, skb, PCI_DMA_TODEVICE);
2253
2254 offset += txlen;
2255 } while (true);
2256
2257 mwifiex_dbg(adapter, MSG,
2258 "info: FW download over, size %d bytes\n", offset);
2259
2260 ret = 0;
2261
2262 done:
2263 dev_kfree_skb_any(skb);
2264 return ret;
2265 }
2266
2267 /*
2268 * This function checks the firmware status in card.
2269 */
2270 static int
2271 mwifiex_check_fw_status(struct mwifiex_adapter *adapter, u32 poll_num)
2272 {
2273 int ret = 0;
2274 u32 firmware_stat;
2275 struct pcie_service_card *card = adapter->card;
2276 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg;
2277 u32 tries;
2278
2279 /* Mask spurios interrupts */
2280 if (mwifiex_write_reg(adapter, PCIE_HOST_INT_STATUS_MASK,
2281 HOST_INTR_MASK)) {
2282 mwifiex_dbg(adapter, ERROR,
2283 "Write register failed\n");
2284 return -1;
2285 }
2286
2287 mwifiex_dbg(adapter, INFO,
2288 "Setting driver ready signature\n");
2289 if (mwifiex_write_reg(adapter, reg->drv_rdy,
2290 FIRMWARE_READY_PCIE)) {
2291 mwifiex_dbg(adapter, ERROR,
2292 "Failed to write driver ready signature\n");
2293 return -1;
2294 }
2295
2296 /* Wait for firmware initialization event */
2297 for (tries = 0; tries < poll_num; tries++) {
2298 if (mwifiex_read_reg(adapter, reg->fw_status,
2299 &firmware_stat))
2300 ret = -1;
2301 else
2302 ret = 0;
2303
2304 mwifiex_dbg(adapter, INFO, "Try %d if FW is ready <%d,%#x>",
2305 tries, ret, firmware_stat);
2306
2307 if (ret)
2308 continue;
2309 if (firmware_stat == FIRMWARE_READY_PCIE) {
2310 ret = 0;
2311 break;
2312 } else {
2313 msleep(100);
2314 ret = -1;
2315 }
2316 }
2317
2318 return ret;
2319 }
2320
2321 /* This function checks if WLAN is the winner.
2322 */
2323 static int
2324 mwifiex_check_winner_status(struct mwifiex_adapter *adapter)
2325 {
2326 u32 winner = 0;
2327 int ret = 0;
2328 struct pcie_service_card *card = adapter->card;
2329 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg;
2330
2331 if (mwifiex_read_reg(adapter, reg->fw_status, &winner)) {
2332 ret = -1;
2333 } else if (!winner) {
2334 mwifiex_dbg(adapter, INFO, "PCI-E is the winner\n");
2335 adapter->winner = 1;
2336 } else {
2337 mwifiex_dbg(adapter, ERROR,
2338 "PCI-E is not the winner <%#x>", winner);
2339 }
2340
2341 return ret;
2342 }
2343
2344 /*
2345 * This function reads the interrupt status from card.
2346 */
2347 static void mwifiex_interrupt_status(struct mwifiex_adapter *adapter,
2348 int msg_id)
2349 {
2350 u32 pcie_ireg;
2351 unsigned long flags;
2352 struct pcie_service_card *card = adapter->card;
2353
2354 if (card->msi_enable) {
2355 spin_lock_irqsave(&adapter->int_lock, flags);
2356 adapter->int_status = 1;
2357 spin_unlock_irqrestore(&adapter->int_lock, flags);
2358 return;
2359 }
2360
2361 if (!mwifiex_pcie_ok_to_access_hw(adapter))
2362 return;
2363
2364 if (card->msix_enable && msg_id >= 0) {
2365 pcie_ireg = BIT(msg_id);
2366 } else {
2367 if (mwifiex_read_reg(adapter, PCIE_HOST_INT_STATUS,
2368 &pcie_ireg)) {
2369 mwifiex_dbg(adapter, ERROR, "Read register failed\n");
2370 return;
2371 }
2372
2373 if ((pcie_ireg == 0xFFFFFFFF) || !pcie_ireg)
2374 return;
2375
2376
2377 mwifiex_pcie_disable_host_int(adapter);
2378
2379 /* Clear the pending interrupts */
2380 if (mwifiex_write_reg(adapter, PCIE_HOST_INT_STATUS,
2381 ~pcie_ireg)) {
2382 mwifiex_dbg(adapter, ERROR,
2383 "Write register failed\n");
2384 return;
2385 }
2386 }
2387
2388 if (!adapter->pps_uapsd_mode &&
2389 adapter->ps_state == PS_STATE_SLEEP &&
2390 mwifiex_pcie_ok_to_access_hw(adapter)) {
2391 /* Potentially for PCIe we could get other
2392 * interrupts like shared. Don't change power
2393 * state until cookie is set
2394 */
2395 adapter->ps_state = PS_STATE_AWAKE;
2396 adapter->pm_wakeup_fw_try = false;
2397 del_timer(&adapter->wakeup_timer);
2398 }
2399
2400 spin_lock_irqsave(&adapter->int_lock, flags);
2401 adapter->int_status |= pcie_ireg;
2402 spin_unlock_irqrestore(&adapter->int_lock, flags);
2403 mwifiex_dbg(adapter, INTR, "ireg: 0x%08x\n", pcie_ireg);
2404 }
2405
2406 /*
2407 * Interrupt handler for PCIe root port
2408 *
2409 * This function reads the interrupt status from firmware and assigns
2410 * the main process in workqueue which will handle the interrupt.
2411 */
2412 static irqreturn_t mwifiex_pcie_interrupt(int irq, void *context)
2413 {
2414 struct mwifiex_msix_context *ctx = context;
2415 struct pci_dev *pdev = ctx->dev;
2416 struct pcie_service_card *card;
2417 struct mwifiex_adapter *adapter;
2418
2419 card = pci_get_drvdata(pdev);
2420
2421 if (!card->adapter) {
2422 pr_err("info: %s: card=%p adapter=%p\n", __func__, card,
2423 card ? card->adapter : NULL);
2424 goto exit;
2425 }
2426 adapter = card->adapter;
2427
2428 if (adapter->surprise_removed)
2429 goto exit;
2430
2431 if (card->msix_enable)
2432 mwifiex_interrupt_status(adapter, ctx->msg_id);
2433 else
2434 mwifiex_interrupt_status(adapter, -1);
2435
2436 mwifiex_queue_main_work(adapter);
2437
2438 exit:
2439 return IRQ_HANDLED;
2440 }
2441
2442 /*
2443 * This function checks the current interrupt status.
2444 *
2445 * The following interrupts are checked and handled by this function -
2446 * - Data sent
2447 * - Command sent
2448 * - Command received
2449 * - Packets received
2450 * - Events received
2451 *
2452 * In case of Rx packets received, the packets are uploaded from card to
2453 * host and processed accordingly.
2454 */
2455 static int mwifiex_process_int_status(struct mwifiex_adapter *adapter)
2456 {
2457 int ret;
2458 u32 pcie_ireg = 0;
2459 unsigned long flags;
2460 struct pcie_service_card *card = adapter->card;
2461
2462 spin_lock_irqsave(&adapter->int_lock, flags);
2463 if (!card->msi_enable) {
2464 /* Clear out unused interrupts */
2465 pcie_ireg = adapter->int_status;
2466 }
2467 adapter->int_status = 0;
2468 spin_unlock_irqrestore(&adapter->int_lock, flags);
2469
2470 if (card->msi_enable) {
2471 if (mwifiex_pcie_ok_to_access_hw(adapter)) {
2472 if (mwifiex_read_reg(adapter, PCIE_HOST_INT_STATUS,
2473 &pcie_ireg)) {
2474 mwifiex_dbg(adapter, ERROR,
2475 "Read register failed\n");
2476 return -1;
2477 }
2478
2479 if ((pcie_ireg != 0xFFFFFFFF) && (pcie_ireg)) {
2480 if (mwifiex_write_reg(adapter,
2481 PCIE_HOST_INT_STATUS,
2482 ~pcie_ireg)) {
2483 mwifiex_dbg(adapter, ERROR,
2484 "Write register failed\n");
2485 return -1;
2486 }
2487 if (!adapter->pps_uapsd_mode &&
2488 adapter->ps_state == PS_STATE_SLEEP) {
2489 adapter->ps_state = PS_STATE_AWAKE;
2490 adapter->pm_wakeup_fw_try = false;
2491 del_timer(&adapter->wakeup_timer);
2492 }
2493 }
2494 }
2495 }
2496
2497 if (pcie_ireg & HOST_INTR_DNLD_DONE) {
2498 mwifiex_dbg(adapter, INTR, "info: TX DNLD Done\n");
2499 ret = mwifiex_pcie_send_data_complete(adapter);
2500 if (ret)
2501 return ret;
2502 }
2503 if (pcie_ireg & HOST_INTR_UPLD_RDY) {
2504 mwifiex_dbg(adapter, INTR, "info: Rx DATA\n");
2505 ret = mwifiex_pcie_process_recv_data(adapter);
2506 if (ret)
2507 return ret;
2508 }
2509 if (pcie_ireg & HOST_INTR_EVENT_RDY) {
2510 mwifiex_dbg(adapter, INTR, "info: Rx EVENT\n");
2511 ret = mwifiex_pcie_process_event_ready(adapter);
2512 if (ret)
2513 return ret;
2514 }
2515 if (pcie_ireg & HOST_INTR_CMD_DONE) {
2516 if (adapter->cmd_sent) {
2517 mwifiex_dbg(adapter, INTR,
2518 "info: CMD sent Interrupt\n");
2519 adapter->cmd_sent = false;
2520 }
2521 /* Handle command response */
2522 ret = mwifiex_pcie_process_cmd_complete(adapter);
2523 if (ret)
2524 return ret;
2525 }
2526
2527 mwifiex_dbg(adapter, INTR,
2528 "info: cmd_sent=%d data_sent=%d\n",
2529 adapter->cmd_sent, adapter->data_sent);
2530 if (!card->msi_enable && !card->msix_enable &&
2531 adapter->ps_state != PS_STATE_SLEEP)
2532 mwifiex_pcie_enable_host_int(adapter);
2533
2534 return 0;
2535 }
2536
2537 /*
2538 * This function downloads data from driver to card.
2539 *
2540 * Both commands and data packets are transferred to the card by this
2541 * function.
2542 *
2543 * This function adds the PCIE specific header to the front of the buffer
2544 * before transferring. The header contains the length of the packet and
2545 * the type. The firmware handles the packets based upon this set type.
2546 */
2547 static int mwifiex_pcie_host_to_card(struct mwifiex_adapter *adapter, u8 type,
2548 struct sk_buff *skb,
2549 struct mwifiex_tx_param *tx_param)
2550 {
2551 if (!skb) {
2552 mwifiex_dbg(adapter, ERROR,
2553 "Passed NULL skb to %s\n", __func__);
2554 return -1;
2555 }
2556
2557 if (type == MWIFIEX_TYPE_DATA)
2558 return mwifiex_pcie_send_data(adapter, skb, tx_param);
2559 else if (type == MWIFIEX_TYPE_CMD)
2560 return mwifiex_pcie_send_cmd(adapter, skb);
2561
2562 return 0;
2563 }
2564
2565 /* Function to dump PCIE scratch registers in case of FW crash
2566 */
2567 static int
2568 mwifiex_pcie_reg_dump(struct mwifiex_adapter *adapter, char *drv_buf)
2569 {
2570 char *p = drv_buf;
2571 char buf[256], *ptr;
2572 int i;
2573 u32 value;
2574 struct pcie_service_card *card = adapter->card;
2575 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg;
2576 int pcie_scratch_reg[] = {PCIE_SCRATCH_12_REG,
2577 PCIE_SCRATCH_14_REG,
2578 PCIE_SCRATCH_15_REG};
2579
2580 if (!p)
2581 return 0;
2582
2583 mwifiex_dbg(adapter, MSG, "PCIE register dump start\n");
2584
2585 if (mwifiex_read_reg(adapter, reg->fw_status, &value)) {
2586 mwifiex_dbg(adapter, ERROR, "failed to read firmware status");
2587 return 0;
2588 }
2589
2590 ptr = buf;
2591 mwifiex_dbg(adapter, MSG, "pcie scratch register:");
2592 for (i = 0; i < ARRAY_SIZE(pcie_scratch_reg); i++) {
2593 mwifiex_read_reg(adapter, pcie_scratch_reg[i], &value);
2594 ptr += sprintf(ptr, "reg:0x%x, value=0x%x\n",
2595 pcie_scratch_reg[i], value);
2596 }
2597
2598 mwifiex_dbg(adapter, MSG, "%s\n", buf);
2599 p += sprintf(p, "%s\n", buf);
2600
2601 mwifiex_dbg(adapter, MSG, "PCIE register dump end\n");
2602
2603 return p - drv_buf;
2604 }
2605
2606 /* This function read/write firmware */
2607 static enum rdwr_status
2608 mwifiex_pcie_rdwr_firmware(struct mwifiex_adapter *adapter, u8 doneflag)
2609 {
2610 int ret, tries;
2611 u8 ctrl_data;
2612 u32 fw_status;
2613 struct pcie_service_card *card = adapter->card;
2614 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg;
2615
2616 if (mwifiex_read_reg(adapter, reg->fw_status, &fw_status))
2617 return RDWR_STATUS_FAILURE;
2618
2619 ret = mwifiex_write_reg(adapter, reg->fw_dump_ctrl,
2620 reg->fw_dump_host_ready);
2621 if (ret) {
2622 mwifiex_dbg(adapter, ERROR,
2623 "PCIE write err\n");
2624 return RDWR_STATUS_FAILURE;
2625 }
2626
2627 for (tries = 0; tries < MAX_POLL_TRIES; tries++) {
2628 mwifiex_read_reg_byte(adapter, reg->fw_dump_ctrl, &ctrl_data);
2629 if (ctrl_data == FW_DUMP_DONE)
2630 return RDWR_STATUS_SUCCESS;
2631 if (doneflag && ctrl_data == doneflag)
2632 return RDWR_STATUS_DONE;
2633 if (ctrl_data != reg->fw_dump_host_ready) {
2634 mwifiex_dbg(adapter, WARN,
2635 "The ctrl reg was changed, re-try again!\n");
2636 ret = mwifiex_write_reg(adapter, reg->fw_dump_ctrl,
2637 reg->fw_dump_host_ready);
2638 if (ret) {
2639 mwifiex_dbg(adapter, ERROR,
2640 "PCIE write err\n");
2641 return RDWR_STATUS_FAILURE;
2642 }
2643 }
2644 usleep_range(100, 200);
2645 }
2646
2647 mwifiex_dbg(adapter, ERROR, "Fail to pull ctrl_data\n");
2648 return RDWR_STATUS_FAILURE;
2649 }
2650
2651 /* This function dump firmware memory to file */
2652 static void mwifiex_pcie_fw_dump(struct mwifiex_adapter *adapter)
2653 {
2654 struct pcie_service_card *card = adapter->card;
2655 const struct mwifiex_pcie_card_reg *creg = card->pcie.reg;
2656 unsigned int reg, reg_start, reg_end;
2657 u8 *dbg_ptr, *end_ptr, *tmp_ptr, fw_dump_num, dump_num;
2658 u8 idx, i, read_reg, doneflag = 0;
2659 enum rdwr_status stat;
2660 u32 memory_size;
2661 int ret;
2662
2663 if (!card->pcie.can_dump_fw)
2664 return;
2665
2666 for (idx = 0; idx < adapter->num_mem_types; idx++) {
2667 struct memory_type_mapping *entry =
2668 &adapter->mem_type_mapping_tbl[idx];
2669
2670 if (entry->mem_ptr) {
2671 vfree(entry->mem_ptr);
2672 entry->mem_ptr = NULL;
2673 }
2674 entry->mem_size = 0;
2675 }
2676
2677 mwifiex_dbg(adapter, MSG, "== mwifiex firmware dump start ==\n");
2678
2679 /* Read the number of the memories which will dump */
2680 stat = mwifiex_pcie_rdwr_firmware(adapter, doneflag);
2681 if (stat == RDWR_STATUS_FAILURE)
2682 return;
2683
2684 reg = creg->fw_dump_start;
2685 mwifiex_read_reg_byte(adapter, reg, &fw_dump_num);
2686
2687 /* W8997 chipset firmware dump will be restore in single region*/
2688 if (fw_dump_num == 0)
2689 dump_num = 1;
2690 else
2691 dump_num = fw_dump_num;
2692
2693 /* Read the length of every memory which will dump */
2694 for (idx = 0; idx < dump_num; idx++) {
2695 struct memory_type_mapping *entry =
2696 &adapter->mem_type_mapping_tbl[idx];
2697 memory_size = 0;
2698 if (fw_dump_num != 0) {
2699 stat = mwifiex_pcie_rdwr_firmware(adapter, doneflag);
2700 if (stat == RDWR_STATUS_FAILURE)
2701 return;
2702
2703 reg = creg->fw_dump_start;
2704 for (i = 0; i < 4; i++) {
2705 mwifiex_read_reg_byte(adapter, reg, &read_reg);
2706 memory_size |= (read_reg << (i * 8));
2707 reg++;
2708 }
2709 } else {
2710 memory_size = MWIFIEX_FW_DUMP_MAX_MEMSIZE;
2711 }
2712
2713 if (memory_size == 0) {
2714 mwifiex_dbg(adapter, MSG, "Firmware dump Finished!\n");
2715 ret = mwifiex_write_reg(adapter, creg->fw_dump_ctrl,
2716 creg->fw_dump_read_done);
2717 if (ret) {
2718 mwifiex_dbg(adapter, ERROR, "PCIE write err\n");
2719 return;
2720 }
2721 break;
2722 }
2723
2724 mwifiex_dbg(adapter, DUMP,
2725 "%s_SIZE=0x%x\n", entry->mem_name, memory_size);
2726 entry->mem_ptr = vmalloc(memory_size + 1);
2727 entry->mem_size = memory_size;
2728 if (!entry->mem_ptr) {
2729 mwifiex_dbg(adapter, ERROR,
2730 "Vmalloc %s failed\n", entry->mem_name);
2731 return;
2732 }
2733 dbg_ptr = entry->mem_ptr;
2734 end_ptr = dbg_ptr + memory_size;
2735
2736 doneflag = entry->done_flag;
2737 mwifiex_dbg(adapter, DUMP, "Start %s output, please wait...\n",
2738 entry->mem_name);
2739
2740 do {
2741 stat = mwifiex_pcie_rdwr_firmware(adapter, doneflag);
2742 if (RDWR_STATUS_FAILURE == stat)
2743 return;
2744
2745 reg_start = creg->fw_dump_start;
2746 reg_end = creg->fw_dump_end;
2747 for (reg = reg_start; reg <= reg_end; reg++) {
2748 mwifiex_read_reg_byte(adapter, reg, dbg_ptr);
2749 if (dbg_ptr < end_ptr) {
2750 dbg_ptr++;
2751 continue;
2752 }
2753 mwifiex_dbg(adapter, ERROR,
2754 "pre-allocated buf not enough\n");
2755 tmp_ptr =
2756 vzalloc(memory_size + MWIFIEX_SIZE_4K);
2757 if (!tmp_ptr)
2758 return;
2759 memcpy(tmp_ptr, entry->mem_ptr, memory_size);
2760 vfree(entry->mem_ptr);
2761 entry->mem_ptr = tmp_ptr;
2762 tmp_ptr = NULL;
2763 dbg_ptr = entry->mem_ptr + memory_size;
2764 memory_size += MWIFIEX_SIZE_4K;
2765 end_ptr = entry->mem_ptr + memory_size;
2766 }
2767
2768 if (stat != RDWR_STATUS_DONE)
2769 continue;
2770
2771 mwifiex_dbg(adapter, DUMP,
2772 "%s done: size=0x%tx\n",
2773 entry->mem_name, dbg_ptr - entry->mem_ptr);
2774 break;
2775 } while (true);
2776 }
2777 mwifiex_dbg(adapter, MSG, "== mwifiex firmware dump end ==\n");
2778 }
2779
2780 static void mwifiex_pcie_device_dump_work(struct mwifiex_adapter *adapter)
2781 {
2782 int drv_info_size;
2783 void *drv_info;
2784
2785 drv_info_size = mwifiex_drv_info_dump(adapter, &drv_info);
2786 mwifiex_pcie_fw_dump(adapter);
2787 mwifiex_upload_device_dump(adapter, drv_info, drv_info_size);
2788 }
2789
2790 static void mwifiex_pcie_card_reset_work(struct mwifiex_adapter *adapter)
2791 {
2792 struct pcie_service_card *card = adapter->card;
2793
2794 /* We can't afford to wait here; remove() might be waiting on us. If we
2795 * can't grab the device lock, maybe we'll get another chance later.
2796 */
2797 pci_try_reset_function(card->dev);
2798 }
2799
2800 static void mwifiex_pcie_work(struct work_struct *work)
2801 {
2802 struct pcie_service_card *card =
2803 container_of(work, struct pcie_service_card, work);
2804
2805 if (test_and_clear_bit(MWIFIEX_IFACE_WORK_DEVICE_DUMP,
2806 &card->work_flags))
2807 mwifiex_pcie_device_dump_work(card->adapter);
2808 if (test_and_clear_bit(MWIFIEX_IFACE_WORK_CARD_RESET,
2809 &card->work_flags))
2810 mwifiex_pcie_card_reset_work(card->adapter);
2811 }
2812
2813 /* This function dumps FW information */
2814 static void mwifiex_pcie_device_dump(struct mwifiex_adapter *adapter)
2815 {
2816 struct pcie_service_card *card = adapter->card;
2817
2818 if (!test_and_set_bit(MWIFIEX_IFACE_WORK_DEVICE_DUMP,
2819 &card->work_flags))
2820 schedule_work(&card->work);
2821 }
2822
2823 static void mwifiex_pcie_card_reset(struct mwifiex_adapter *adapter)
2824 {
2825 struct pcie_service_card *card = adapter->card;
2826
2827 if (!test_and_set_bit(MWIFIEX_IFACE_WORK_CARD_RESET, &card->work_flags))
2828 schedule_work(&card->work);
2829 }
2830
2831 static int mwifiex_pcie_alloc_buffers(struct mwifiex_adapter *adapter)
2832 {
2833 struct pcie_service_card *card = adapter->card;
2834 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg;
2835 int ret;
2836
2837 card->cmdrsp_buf = NULL;
2838 ret = mwifiex_pcie_create_txbd_ring(adapter);
2839 if (ret) {
2840 mwifiex_dbg(adapter, ERROR, "Failed to create txbd ring\n");
2841 goto err_cre_txbd;
2842 }
2843
2844 ret = mwifiex_pcie_create_rxbd_ring(adapter);
2845 if (ret) {
2846 mwifiex_dbg(adapter, ERROR, "Failed to create rxbd ring\n");
2847 goto err_cre_rxbd;
2848 }
2849
2850 ret = mwifiex_pcie_create_evtbd_ring(adapter);
2851 if (ret) {
2852 mwifiex_dbg(adapter, ERROR, "Failed to create evtbd ring\n");
2853 goto err_cre_evtbd;
2854 }
2855
2856 ret = mwifiex_pcie_alloc_cmdrsp_buf(adapter);
2857 if (ret) {
2858 mwifiex_dbg(adapter, ERROR, "Failed to allocate cmdbuf buffer\n");
2859 goto err_alloc_cmdbuf;
2860 }
2861
2862 if (reg->sleep_cookie) {
2863 ret = mwifiex_pcie_alloc_sleep_cookie_buf(adapter);
2864 if (ret) {
2865 mwifiex_dbg(adapter, ERROR, "Failed to allocate sleep_cookie buffer\n");
2866 goto err_alloc_cookie;
2867 }
2868 } else {
2869 card->sleep_cookie_vbase = NULL;
2870 }
2871
2872 return 0;
2873
2874 err_alloc_cookie:
2875 mwifiex_pcie_delete_cmdrsp_buf(adapter);
2876 err_alloc_cmdbuf:
2877 mwifiex_pcie_delete_evtbd_ring(adapter);
2878 err_cre_evtbd:
2879 mwifiex_pcie_delete_rxbd_ring(adapter);
2880 err_cre_rxbd:
2881 mwifiex_pcie_delete_txbd_ring(adapter);
2882 err_cre_txbd:
2883 return ret;
2884 }
2885
2886 static void mwifiex_pcie_free_buffers(struct mwifiex_adapter *adapter)
2887 {
2888 struct pcie_service_card *card = adapter->card;
2889 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg;
2890
2891 if (reg->sleep_cookie)
2892 mwifiex_pcie_delete_sleep_cookie_buf(adapter);
2893
2894 mwifiex_pcie_delete_cmdrsp_buf(adapter);
2895 mwifiex_pcie_delete_evtbd_ring(adapter);
2896 mwifiex_pcie_delete_rxbd_ring(adapter);
2897 mwifiex_pcie_delete_txbd_ring(adapter);
2898 }
2899
2900 /*
2901 * This function initializes the PCI-E host memory space, WCB rings, etc.
2902 */
2903 static int mwifiex_init_pcie(struct mwifiex_adapter *adapter)
2904 {
2905 struct pcie_service_card *card = adapter->card;
2906 int ret;
2907 struct pci_dev *pdev = card->dev;
2908
2909 pci_set_drvdata(pdev, card);
2910
2911 ret = pci_enable_device(pdev);
2912 if (ret)
2913 goto err_enable_dev;
2914
2915 pci_set_master(pdev);
2916
2917 pr_notice("try set_consistent_dma_mask(32)\n");
2918 ret = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
2919 if (ret) {
2920 pr_err("set_dma_mask(32) failed\n");
2921 goto err_set_dma_mask;
2922 }
2923
2924 ret = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32));
2925 if (ret) {
2926 pr_err("set_consistent_dma_mask(64) failed\n");
2927 goto err_set_dma_mask;
2928 }
2929
2930 ret = pci_request_region(pdev, 0, DRV_NAME);
2931 if (ret) {
2932 pr_err("req_reg(0) error\n");
2933 goto err_req_region0;
2934 }
2935 card->pci_mmap = pci_iomap(pdev, 0, 0);
2936 if (!card->pci_mmap) {
2937 pr_err("iomap(0) error\n");
2938 ret = -EIO;
2939 goto err_iomap0;
2940 }
2941 ret = pci_request_region(pdev, 2, DRV_NAME);
2942 if (ret) {
2943 pr_err("req_reg(2) error\n");
2944 goto err_req_region2;
2945 }
2946 card->pci_mmap1 = pci_iomap(pdev, 2, 0);
2947 if (!card->pci_mmap1) {
2948 pr_err("iomap(2) error\n");
2949 ret = -EIO;
2950 goto err_iomap2;
2951 }
2952
2953 pr_notice("PCI memory map Virt0: %p PCI memory map Virt2: %p\n",
2954 card->pci_mmap, card->pci_mmap1);
2955
2956 ret = mwifiex_pcie_alloc_buffers(adapter);
2957 if (ret)
2958 goto err_alloc_buffers;
2959
2960 return 0;
2961
2962 err_alloc_buffers:
2963 pci_iounmap(pdev, card->pci_mmap1);
2964 err_iomap2:
2965 pci_release_region(pdev, 2);
2966 err_req_region2:
2967 pci_iounmap(pdev, card->pci_mmap);
2968 err_iomap0:
2969 pci_release_region(pdev, 0);
2970 err_req_region0:
2971 err_set_dma_mask:
2972 pci_disable_device(pdev);
2973 err_enable_dev:
2974 return ret;
2975 }
2976
2977 /*
2978 * This function cleans up the allocated card buffers.
2979 */
2980 static void mwifiex_cleanup_pcie(struct mwifiex_adapter *adapter)
2981 {
2982 struct pcie_service_card *card = adapter->card;
2983 struct pci_dev *pdev = card->dev;
2984 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg;
2985 int ret;
2986 u32 fw_status;
2987
2988 cancel_work_sync(&card->work);
2989
2990 ret = mwifiex_read_reg(adapter, reg->fw_status, &fw_status);
2991 if (fw_status == FIRMWARE_READY_PCIE) {
2992 mwifiex_dbg(adapter, INFO,
2993 "Clearing driver ready signature\n");
2994 if (mwifiex_write_reg(adapter, reg->drv_rdy, 0x00000000))
2995 mwifiex_dbg(adapter, ERROR,
2996 "Failed to write driver not-ready signature\n");
2997 }
2998
2999 pci_disable_device(pdev);
3000
3001 pci_iounmap(pdev, card->pci_mmap);
3002 pci_iounmap(pdev, card->pci_mmap1);
3003 pci_release_region(pdev, 2);
3004 pci_release_region(pdev, 0);
3005
3006 mwifiex_pcie_free_buffers(adapter);
3007 }
3008
3009 static int mwifiex_pcie_request_irq(struct mwifiex_adapter *adapter)
3010 {
3011 int ret, i, j;
3012 struct pcie_service_card *card = adapter->card;
3013 struct pci_dev *pdev = card->dev;
3014
3015 if (card->pcie.reg->msix_support) {
3016 for (i = 0; i < MWIFIEX_NUM_MSIX_VECTORS; i++)
3017 card->msix_entries[i].entry = i;
3018 ret = pci_enable_msix_exact(pdev, card->msix_entries,
3019 MWIFIEX_NUM_MSIX_VECTORS);
3020 if (!ret) {
3021 for (i = 0; i < MWIFIEX_NUM_MSIX_VECTORS; i++) {
3022 card->msix_ctx[i].dev = pdev;
3023 card->msix_ctx[i].msg_id = i;
3024
3025 ret = request_irq(card->msix_entries[i].vector,
3026 mwifiex_pcie_interrupt, 0,
3027 "MWIFIEX_PCIE_MSIX",
3028 &card->msix_ctx[i]);
3029 if (ret)
3030 break;
3031 }
3032
3033 if (ret) {
3034 mwifiex_dbg(adapter, INFO, "request_irq fail: %d\n",
3035 ret);
3036 for (j = 0; j < i; j++)
3037 free_irq(card->msix_entries[j].vector,
3038 &card->msix_ctx[i]);
3039 pci_disable_msix(pdev);
3040 } else {
3041 mwifiex_dbg(adapter, MSG, "MSIx enabled!");
3042 card->msix_enable = 1;
3043 return 0;
3044 }
3045 }
3046 }
3047
3048 if (pci_enable_msi(pdev) != 0)
3049 pci_disable_msi(pdev);
3050 else
3051 card->msi_enable = 1;
3052
3053 mwifiex_dbg(adapter, INFO, "msi_enable = %d\n", card->msi_enable);
3054
3055 card->share_irq_ctx.dev = pdev;
3056 card->share_irq_ctx.msg_id = -1;
3057 ret = request_irq(pdev->irq, mwifiex_pcie_interrupt, IRQF_SHARED,
3058 "MRVL_PCIE", &card->share_irq_ctx);
3059 if (ret) {
3060 pr_err("request_irq failed: ret=%d\n", ret);
3061 return -1;
3062 }
3063
3064 return 0;
3065 }
3066
3067 /*
3068 * This function gets the firmware name for downloading by revision id
3069 *
3070 * Read revision id register to get revision id
3071 */
3072 static void mwifiex_pcie_get_fw_name(struct mwifiex_adapter *adapter)
3073 {
3074 int revision_id = 0;
3075 int version, magic;
3076 struct pcie_service_card *card = adapter->card;
3077
3078 switch (card->dev->device) {
3079 case PCIE_DEVICE_ID_MARVELL_88W8766P:
3080 strcpy(adapter->fw_name, PCIE8766_DEFAULT_FW_NAME);
3081 break;
3082 case PCIE_DEVICE_ID_MARVELL_88W8897:
3083 mwifiex_write_reg(adapter, 0x0c58, 0x80c00000);
3084 mwifiex_read_reg(adapter, 0x0c58, &revision_id);
3085 revision_id &= 0xff00;
3086 switch (revision_id) {
3087 case PCIE8897_A0:
3088 strcpy(adapter->fw_name, PCIE8897_A0_FW_NAME);
3089 break;
3090 case PCIE8897_B0:
3091 strcpy(adapter->fw_name, PCIE8897_B0_FW_NAME);
3092 break;
3093 default:
3094 strcpy(adapter->fw_name, PCIE8897_DEFAULT_FW_NAME);
3095
3096 break;
3097 }
3098 break;
3099 case PCIE_DEVICE_ID_MARVELL_88W8997:
3100 mwifiex_read_reg(adapter, 0x8, &revision_id);
3101 mwifiex_read_reg(adapter, 0x0cd0, &version);
3102 mwifiex_read_reg(adapter, 0x0cd4, &magic);
3103 revision_id &= 0xff;
3104 version &= 0x7;
3105 magic &= 0xff;
3106 if (revision_id == PCIE8997_A1 &&
3107 magic == CHIP_MAGIC_VALUE &&
3108 version == CHIP_VER_PCIEUART)
3109 strcpy(adapter->fw_name, PCIEUART8997_FW_NAME_V4);
3110 else
3111 strcpy(adapter->fw_name, PCIEUSB8997_FW_NAME_V4);
3112 break;
3113 default:
3114 break;
3115 }
3116 }
3117
3118 /*
3119 * This function registers the PCIE device.
3120 *
3121 * PCIE IRQ is claimed, block size is set and driver data is initialized.
3122 */
3123 static int mwifiex_register_dev(struct mwifiex_adapter *adapter)
3124 {
3125 struct pcie_service_card *card = adapter->card;
3126
3127 /* save adapter pointer in card */
3128 card->adapter = adapter;
3129
3130 if (mwifiex_pcie_request_irq(adapter))
3131 return -1;
3132
3133 adapter->tx_buf_size = card->pcie.tx_buf_size;
3134 adapter->mem_type_mapping_tbl = card->pcie.mem_type_mapping_tbl;
3135 adapter->num_mem_types = card->pcie.num_mem_types;
3136 adapter->ext_scan = card->pcie.can_ext_scan;
3137 mwifiex_pcie_get_fw_name(adapter);
3138
3139 return 0;
3140 }
3141
3142 /*
3143 * This function unregisters the PCIE device.
3144 *
3145 * The PCIE IRQ is released, the function is disabled and driver
3146 * data is set to null.
3147 */
3148 static void mwifiex_unregister_dev(struct mwifiex_adapter *adapter)
3149 {
3150 struct pcie_service_card *card = adapter->card;
3151 struct pci_dev *pdev = card->dev;
3152 int i;
3153
3154 if (card->msix_enable) {
3155 for (i = 0; i < MWIFIEX_NUM_MSIX_VECTORS; i++)
3156 synchronize_irq(card->msix_entries[i].vector);
3157
3158 for (i = 0; i < MWIFIEX_NUM_MSIX_VECTORS; i++)
3159 free_irq(card->msix_entries[i].vector,
3160 &card->msix_ctx[i]);
3161
3162 card->msix_enable = 0;
3163 pci_disable_msix(pdev);
3164 } else {
3165 mwifiex_dbg(adapter, INFO,
3166 "%s(): calling free_irq()\n", __func__);
3167 free_irq(card->dev->irq, &card->share_irq_ctx);
3168
3169 if (card->msi_enable)
3170 pci_disable_msi(pdev);
3171 }
3172 card->adapter = NULL;
3173 }
3174
3175 /*
3176 * This function initializes the PCI-E host memory space, WCB rings, etc.,
3177 * similar to mwifiex_init_pcie(), but without resetting PCI-E state.
3178 */
3179 static void mwifiex_pcie_up_dev(struct mwifiex_adapter *adapter)
3180 {
3181 struct pcie_service_card *card = adapter->card;
3182 struct pci_dev *pdev = card->dev;
3183
3184 /* tx_buf_size might be changed to 3584 by firmware during
3185 * data transfer, we should reset it to default size.
3186 */
3187 adapter->tx_buf_size = card->pcie.tx_buf_size;
3188
3189 mwifiex_pcie_alloc_buffers(adapter);
3190
3191 pci_set_master(pdev);
3192 }
3193
3194 /* This function cleans up the PCI-E host memory space. */
3195 static void mwifiex_pcie_down_dev(struct mwifiex_adapter *adapter)
3196 {
3197 struct pcie_service_card *card = adapter->card;
3198 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg;
3199 struct pci_dev *pdev = card->dev;
3200
3201 if (mwifiex_write_reg(adapter, reg->drv_rdy, 0x00000000))
3202 mwifiex_dbg(adapter, ERROR, "Failed to write driver not-ready signature\n");
3203
3204 pci_clear_master(pdev);
3205
3206 adapter->seq_num = 0;
3207
3208 mwifiex_pcie_free_buffers(adapter);
3209 }
3210
3211 static struct mwifiex_if_ops pcie_ops = {
3212 .init_if = mwifiex_init_pcie,
3213 .cleanup_if = mwifiex_cleanup_pcie,
3214 .check_fw_status = mwifiex_check_fw_status,
3215 .check_winner_status = mwifiex_check_winner_status,
3216 .prog_fw = mwifiex_prog_fw_w_helper,
3217 .register_dev = mwifiex_register_dev,
3218 .unregister_dev = mwifiex_unregister_dev,
3219 .enable_int = mwifiex_pcie_enable_host_int,
3220 .disable_int = mwifiex_pcie_disable_host_int_noerr,
3221 .process_int_status = mwifiex_process_int_status,
3222 .host_to_card = mwifiex_pcie_host_to_card,
3223 .wakeup = mwifiex_pm_wakeup_card,
3224 .wakeup_complete = mwifiex_pm_wakeup_card_complete,
3225
3226 /* PCIE specific */
3227 .cmdrsp_complete = mwifiex_pcie_cmdrsp_complete,
3228 .event_complete = mwifiex_pcie_event_complete,
3229 .update_mp_end_port = NULL,
3230 .cleanup_mpa_buf = NULL,
3231 .init_fw_port = mwifiex_pcie_init_fw_port,
3232 .clean_pcie_ring = mwifiex_clean_pcie_ring_buf,
3233 .card_reset = mwifiex_pcie_card_reset,
3234 .reg_dump = mwifiex_pcie_reg_dump,
3235 .device_dump = mwifiex_pcie_device_dump,
3236 .down_dev = mwifiex_pcie_down_dev,
3237 .up_dev = mwifiex_pcie_up_dev,
3238 };
3239
3240 module_pci_driver(mwifiex_pcie);
3241
3242 MODULE_AUTHOR("Marvell International Ltd.");
3243 MODULE_DESCRIPTION("Marvell WiFi-Ex PCI-Express Driver version " PCIE_VERSION);
3244 MODULE_VERSION(PCIE_VERSION);
3245 MODULE_LICENSE("GPL v2");