1 /* SPDX-License-Identifier: ISC */
6 #include <linux/interrupt.h>
7 #include <linux/ktime.h>
11 #define MT7603_MAX_INTERFACES 4
12 #define MT7603_WTBL_SIZE 128
13 #define MT7603_WTBL_RESERVED (MT7603_WTBL_SIZE - 1)
14 #define MT7603_WTBL_STA (MT7603_WTBL_RESERVED - MT7603_MAX_INTERFACES)
16 #define MT7603_RATE_RETRY 2
18 #define MT7603_RX_RING_SIZE 128
20 #define MT7603_FIRMWARE_E1 "mt7603_e1.bin"
21 #define MT7603_FIRMWARE_E2 "mt7603_e2.bin"
22 #define MT7628_FIRMWARE_E1 "mt7628_e1.bin"
23 #define MT7628_FIRMWARE_E2 "mt7628_e2.bin"
25 #define MT7603_EEPROM_SIZE 1024
27 #define MT_AGG_SIZE_LIMIT(_n) (((_n) + 1) * 4)
29 #define MT7603_PRE_TBTT_TIME 5000 /* ms */
31 #define MT7603_WATCHDOG_TIME 100 /* ms */
32 #define MT7603_WATCHDOG_TIMEOUT 10 /* number of checks */
34 #define MT7603_EDCCA_BLOCK_TH 10
36 #define MT7603_CFEND_RATE_DEFAULT 0x69 /* chip default (24M) */
37 #define MT7603_CFEND_RATE_11B 0x03 /* 11B LP, 11M */
45 MT7628_REV_E1
= 0x8a00,
54 struct mt7603_rate_set
{
55 struct ieee80211_tx_rate probe_rate
;
56 struct ieee80211_tx_rate rates
[4];
60 struct mt76_wcid wcid
; /* must be first */
62 struct mt7603_vif
*vif
;
64 struct sk_buff_head psq
;
66 struct ieee80211_tx_rate rates
[4];
68 struct mt7603_rate_set rateset
[2];
81 struct mt7603_sta sta
; /* must be first */
86 enum mt7603_reset_cause
{
90 RESET_CAUSE_BEACON_STUCK
,
91 RESET_CAUSE_RX_PSE_BUSY
,
93 RESET_CAUSE_RESET_FAILED
,
98 struct mt76_dev mt76
; /* must be first */
100 const struct mt76_bus_ops
*bus_ops
;
106 struct mt7603_sta global_sta
;
109 u32 false_cca_ofdm
, false_cca_cck
;
110 unsigned long last_cca_adj
;
121 struct mt76_queue q_rx
;
129 u8 ed_monitor_enabled
;
144 enum mt7603_reset_cause cur_reset_cause
;
151 unsigned int reset_cause
[__RESET_CAUSE_MAX
];
154 extern const struct mt76_driver_ops mt7603_drv_ops
;
155 extern const struct ieee80211_ops mt7603_ops
;
156 extern struct pci_driver mt7603_pci_driver
;
157 extern struct platform_driver mt76_wmac_driver
;
159 static inline bool is_mt7603(struct mt7603_dev
*dev
)
161 return mt76xx_chip(dev
) == 0x7603;
164 static inline bool is_mt7628(struct mt7603_dev
*dev
)
166 return mt76xx_chip(dev
) == 0x7628;
169 /* need offset to prevent conflict with ampdu_ack_len */
170 #define MT_RATE_DRIVER_DATA_OFFSET 4
172 u32
mt7603_reg_map(struct mt7603_dev
*dev
, u32 addr
);
174 irqreturn_t
mt7603_irq_handler(int irq
, void *dev_instance
);
176 int mt7603_register_device(struct mt7603_dev
*dev
);
177 void mt7603_unregister_device(struct mt7603_dev
*dev
);
178 int mt7603_eeprom_init(struct mt7603_dev
*dev
);
179 int mt7603_dma_init(struct mt7603_dev
*dev
);
180 void mt7603_dma_cleanup(struct mt7603_dev
*dev
);
181 int mt7603_mcu_init(struct mt7603_dev
*dev
);
182 void mt7603_init_debugfs(struct mt7603_dev
*dev
);
184 static inline void mt7603_irq_enable(struct mt7603_dev
*dev
, u32 mask
)
186 mt76_set_irq_mask(&dev
->mt76
, MT_INT_MASK_CSR
, 0, mask
);
189 static inline void mt7603_irq_disable(struct mt7603_dev
*dev
, u32 mask
)
191 mt76_set_irq_mask(&dev
->mt76
, MT_INT_MASK_CSR
, mask
, 0);
194 void mt7603_mac_dma_start(struct mt7603_dev
*dev
);
195 void mt7603_mac_start(struct mt7603_dev
*dev
);
196 void mt7603_mac_stop(struct mt7603_dev
*dev
);
197 void mt7603_mac_work(struct work_struct
*work
);
198 void mt7603_mac_set_timing(struct mt7603_dev
*dev
);
199 void mt7603_beacon_set_timer(struct mt7603_dev
*dev
, int idx
, int intval
);
200 int mt7603_mac_fill_rx(struct mt7603_dev
*dev
, struct sk_buff
*skb
);
201 void mt7603_mac_add_txs(struct mt7603_dev
*dev
, void *data
);
202 void mt7603_mac_rx_ba_reset(struct mt7603_dev
*dev
, void *addr
, u8 tid
);
203 void mt7603_mac_tx_ba_reset(struct mt7603_dev
*dev
, int wcid
, int tid
,
206 void mt7603_pse_client_reset(struct mt7603_dev
*dev
);
208 int mt7603_mcu_set_channel(struct mt7603_dev
*dev
);
209 int mt7603_mcu_set_eeprom(struct mt7603_dev
*dev
);
210 void mt7603_mcu_exit(struct mt7603_dev
*dev
);
212 void mt7603_wtbl_init(struct mt7603_dev
*dev
, int idx
, int vif
,
214 void mt7603_wtbl_clear(struct mt7603_dev
*dev
, int idx
);
215 void mt7603_wtbl_update_cap(struct mt7603_dev
*dev
, struct ieee80211_sta
*sta
);
216 void mt7603_wtbl_set_rates(struct mt7603_dev
*dev
, struct mt7603_sta
*sta
,
217 struct ieee80211_tx_rate
*probe_rate
,
218 struct ieee80211_tx_rate
*rates
);
219 int mt7603_wtbl_set_key(struct mt7603_dev
*dev
, int wcid
,
220 struct ieee80211_key_conf
*key
);
221 void mt7603_wtbl_set_ps(struct mt7603_dev
*dev
, struct mt7603_sta
*sta
,
223 void mt7603_wtbl_set_smps(struct mt7603_dev
*dev
, struct mt7603_sta
*sta
,
225 void mt7603_filter_tx(struct mt7603_dev
*dev
, int idx
, bool abort
);
227 int mt7603_tx_prepare_skb(struct mt76_dev
*mdev
, void *txwi_ptr
,
228 enum mt76_txq_id qid
, struct mt76_wcid
*wcid
,
229 struct ieee80211_sta
*sta
,
230 struct mt76_tx_info
*tx_info
);
232 void mt7603_tx_complete_skb(struct mt76_dev
*mdev
, enum mt76_txq_id qid
,
233 struct mt76_queue_entry
*e
);
235 void mt7603_queue_rx_skb(struct mt76_dev
*mdev
, enum mt76_rxq_id q
,
236 struct sk_buff
*skb
);
237 void mt7603_rx_poll_complete(struct mt76_dev
*mdev
, enum mt76_rxq_id q
);
238 void mt7603_sta_ps(struct mt76_dev
*mdev
, struct ieee80211_sta
*sta
, bool ps
);
239 int mt7603_sta_add(struct mt76_dev
*mdev
, struct ieee80211_vif
*vif
,
240 struct ieee80211_sta
*sta
);
241 void mt7603_sta_assoc(struct mt76_dev
*mdev
, struct ieee80211_vif
*vif
,
242 struct ieee80211_sta
*sta
);
243 void mt7603_sta_remove(struct mt76_dev
*mdev
, struct ieee80211_vif
*vif
,
244 struct ieee80211_sta
*sta
);
246 void mt7603_pre_tbtt_tasklet(unsigned long arg
);
248 void mt7603_update_channel(struct mt76_dev
*mdev
);
250 void mt7603_edcca_set_strict(struct mt7603_dev
*dev
, bool val
);
251 void mt7603_cca_stats_reset(struct mt7603_dev
*dev
);
253 void mt7603_init_edcca(struct mt7603_dev
*dev
);