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Merge branches 'for-5.1/upstream-fixes', 'for-5.2/core', 'for-5.2/ish', 'for-5.2...
[mirror_ubuntu-kernels.git] / drivers / net / wireless / mediatek / mt76 / mt76x0 / initvals.h
1 /*
2 * (c) Copyright 2002-2010, Ralink Technology, Inc.
3 * Copyright (C) 2015 Jakub Kicinski <kubakici@wp.pl>
4 * Copyright (C) 2018 Stanislaw Gruszka <stf_xl@wp.pl>
5 * Copyright (C) 2018 Lorenzo Bianconi <lorenzo.bianconi83@gmail.com>
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2
9 * as published by the Free Software Foundation
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 */
16
17 #ifndef __MT76X0U_INITVALS_H
18 #define __MT76X0U_INITVALS_H
19
20 #include "phy.h"
21
22 static const struct mt76_reg_pair common_mac_reg_table[] = {
23 { MT_BCN_OFFSET(0), 0xf8f0e8e0 },
24 { MT_BCN_OFFSET(1), 0x6f77d0c8 },
25 { MT_LEGACY_BASIC_RATE, 0x0000013f },
26 { MT_HT_BASIC_RATE, 0x00008003 },
27 { MT_MAC_SYS_CTRL, 0x00000000 },
28 { MT_RX_FILTR_CFG, 0x00017f97 },
29 { MT_BKOFF_SLOT_CFG, 0x00000209 },
30 { MT_TX_SW_CFG0, 0x00000000 },
31 { MT_TX_SW_CFG1, 0x00080606 },
32 { MT_TX_LINK_CFG, 0x00001020 },
33 { MT_TX_TIMEOUT_CFG, 0x000a2090 },
34 { MT_MAX_LEN_CFG, 0xa0fff | 0x00001000 },
35 { MT_LED_CFG, 0x7f031e46 },
36 { MT_PBF_TX_MAX_PCNT, 0x1fbf1f1f },
37 { MT_PBF_RX_MAX_PCNT, 0x0000fe9f },
38 { MT_TX_RETRY_CFG, 0x47d01f0f },
39 { MT_AUTO_RSP_CFG, 0x00000013 },
40 { MT_CCK_PROT_CFG, 0x07f40003 },
41 { MT_OFDM_PROT_CFG, 0x07f42004 },
42 { MT_PBF_CFG, 0x00f40006 },
43 { MT_WPDMA_GLO_CFG, 0x00000030 },
44 { MT_GF20_PROT_CFG, 0x01742004 },
45 { MT_GF40_PROT_CFG, 0x03f42084 },
46 { MT_MM20_PROT_CFG, 0x01742004 },
47 { MT_MM40_PROT_CFG, 0x03f42084 },
48 { MT_TXOP_CTRL_CFG, 0x0000583f },
49 { MT_TX_RTS_CFG, 0x00ffff20 },
50 { MT_EXP_ACK_TIME, 0x002400ca },
51 { MT_TXOP_HLDR_ET, 0x00000002 },
52 { MT_XIFS_TIME_CFG, 0x33a41010 },
53 { MT_PWR_PIN_CFG, 0x00000000 },
54 };
55
56 static const struct mt76_reg_pair mt76x0_mac_reg_table[] = {
57 { MT_IOCFG_6, 0xa0040080 },
58 { MT_PBF_SYS_CTRL, 0x00080c00 },
59 { MT_PBF_CFG, 0x77723c1f },
60 { MT_FCE_PSE_CTRL, 0x00000001 },
61 { MT_AMPDU_MAX_LEN_20M1S, 0xAAA99887 },
62 { MT_TX_SW_CFG0, 0x00000601 },
63 { MT_TX_SW_CFG1, 0x00040000 },
64 { MT_TX_SW_CFG2, 0x00000000 },
65 { 0xa44, 0x00000000 },
66 { MT_HEADER_TRANS_CTRL_REG, 0x00000000 },
67 { MT_TSO_CTRL, 0x00000000 },
68 { MT_BB_PA_MODE_CFG1, 0x00500055 },
69 { MT_RF_PA_MODE_CFG1, 0x00500055 },
70 { MT_TX_ALC_CFG_0, 0x2F2F000C },
71 { MT_TX0_BB_GAIN_ATTEN, 0x00000000 },
72 { MT_TX_PWR_CFG_0, 0x3A3A3A3A },
73 { MT_TX_PWR_CFG_1, 0x3A3A3A3A },
74 { MT_TX_PWR_CFG_2, 0x3A3A3A3A },
75 { MT_TX_PWR_CFG_3, 0x3A3A3A3A },
76 { MT_TX_PWR_CFG_4, 0x3A3A3A3A },
77 { MT_TX_PWR_CFG_7, 0x3A3A3A3A },
78 { MT_TX_PWR_CFG_8, 0x0000003A },
79 { MT_TX_PWR_CFG_9, 0x0000003A },
80 { 0x150C, 0x00000002 },
81 { 0x1238, 0x001700C8 },
82 { MT_LDO_CTRL_0, 0x00A647B6 },
83 { MT_LDO_CTRL_1, 0x6B006464 },
84 { MT_HT_BASIC_RATE, 0x00004003 },
85 { MT_HT_CTRL_CFG, 0x000001FF },
86 { MT_TXOP_HLDR_ET, 0x00000000 },
87 { MT_PN_PAD_MODE, 0x00000003 },
88 { MT_TX_PROT_CFG6, 0xe3f42004 },
89 { MT_TX_PROT_CFG7, 0xe3f42084 },
90 { MT_TX_PROT_CFG8, 0xe3f42104 },
91 { MT_VHT_HT_FBK_CFG1, 0xedcba980 },
92 };
93
94 static const struct mt76_reg_pair mt76x0_bbp_init_tab[] = {
95 { MT_BBP(CORE, 1), 0x00000002 },
96 { MT_BBP(CORE, 4), 0x00000000 },
97 { MT_BBP(CORE, 24), 0x00000000 },
98 { MT_BBP(CORE, 32), 0x4003000a },
99 { MT_BBP(CORE, 42), 0x00000000 },
100 { MT_BBP(CORE, 44), 0x00000000 },
101 { MT_BBP(IBI, 11), 0x0FDE8081 },
102 { MT_BBP(AGC, 0), 0x00021400 },
103 { MT_BBP(AGC, 1), 0x00000003 },
104 { MT_BBP(AGC, 2), 0x003A6464 },
105 { MT_BBP(AGC, 15), 0x88A28CB8 },
106 { MT_BBP(AGC, 22), 0x00001E21 },
107 { MT_BBP(AGC, 23), 0x0000272C },
108 { MT_BBP(AGC, 24), 0x00002F3A },
109 { MT_BBP(AGC, 25), 0x8000005A },
110 { MT_BBP(AGC, 26), 0x007C2005 },
111 { MT_BBP(AGC, 33), 0x00003238 },
112 { MT_BBP(AGC, 34), 0x000A0C0C },
113 { MT_BBP(AGC, 37), 0x2121262C },
114 { MT_BBP(AGC, 41), 0x38383E45 },
115 { MT_BBP(AGC, 57), 0x00001010 },
116 { MT_BBP(AGC, 59), 0xBAA20E96 },
117 { MT_BBP(AGC, 63), 0x00000001 },
118 { MT_BBP(TXC, 0), 0x00280403 },
119 { MT_BBP(TXC, 1), 0x00000000 },
120 { MT_BBP(RXC, 1), 0x00000012 },
121 { MT_BBP(RXC, 2), 0x00000011 },
122 { MT_BBP(RXC, 3), 0x00000005 },
123 { MT_BBP(RXC, 4), 0x00000000 },
124 { MT_BBP(RXC, 5), 0xF977C4EC },
125 { MT_BBP(RXC, 7), 0x00000090 },
126 { MT_BBP(TXO, 8), 0x00000000 },
127 { MT_BBP(TXBE, 0), 0x00000000 },
128 { MT_BBP(TXBE, 4), 0x00000004 },
129 { MT_BBP(TXBE, 6), 0x00000000 },
130 { MT_BBP(TXBE, 8), 0x00000014 },
131 { MT_BBP(TXBE, 9), 0x20000000 },
132 { MT_BBP(TXBE, 10), 0x00000000 },
133 { MT_BBP(TXBE, 12), 0x00000000 },
134 { MT_BBP(TXBE, 13), 0x00000000 },
135 { MT_BBP(TXBE, 14), 0x00000000 },
136 { MT_BBP(TXBE, 15), 0x00000000 },
137 { MT_BBP(TXBE, 16), 0x00000000 },
138 { MT_BBP(TXBE, 17), 0x00000000 },
139 { MT_BBP(RXFE, 1), 0x00008800 },
140 { MT_BBP(RXFE, 3), 0x00000000 },
141 { MT_BBP(RXFE, 4), 0x00000000 },
142 { MT_BBP(RXO, 13), 0x00000192 },
143 { MT_BBP(RXO, 14), 0x00060612 },
144 { MT_BBP(RXO, 15), 0xC8321B18 },
145 { MT_BBP(RXO, 16), 0x0000001E },
146 { MT_BBP(RXO, 17), 0x00000000 },
147 { MT_BBP(RXO, 18), 0xCC00A993 },
148 { MT_BBP(RXO, 19), 0xB9CB9CB9 },
149 { MT_BBP(RXO, 20), 0x26c00057 },
150 { MT_BBP(RXO, 21), 0x00000001 },
151 { MT_BBP(RXO, 24), 0x00000006 },
152 { MT_BBP(RXO, 28), 0x0000003F },
153 };
154
155 static const struct mt76x0_bbp_switch_item mt76x0_bbp_switch_tab[] = {
156 { RF_G_BAND | RF_BW_20 | RF_BW_40, { MT_BBP(AGC, 4), 0x1FEDA049 } },
157 { RF_A_BAND | RF_BW_20 | RF_BW_40 | RF_BW_80, { MT_BBP(AGC, 4), 0x1FECA054 } },
158
159 { RF_G_BAND | RF_BW_20 | RF_BW_40, { MT_BBP(AGC, 6), 0x00000045 } },
160 { RF_A_BAND | RF_BW_20 | RF_BW_40 | RF_BW_80, { MT_BBP(AGC, 6), 0x0000000A } },
161
162 { RF_G_BAND | RF_BW_20 | RF_BW_40, { MT_BBP(AGC, 8), 0x16344EF0 } },
163 { RF_A_BAND | RF_BW_20 | RF_BW_40 | RF_BW_80, { MT_BBP(AGC, 8), 0x122C54F2 } },
164
165 { RF_G_BAND | RF_BW_20, { MT_BBP(AGC, 12), 0x05052879 } },
166 { RF_G_BAND | RF_BW_40, { MT_BBP(AGC, 12), 0x050528F9 } },
167 { RF_A_BAND | RF_BW_20 | RF_BW_40 | RF_BW_80, { MT_BBP(AGC, 12), 0x050528F9 } },
168
169 { RF_G_BAND | RF_BW_20 | RF_BW_40, { MT_BBP(AGC, 13), 0x35050004 } },
170 { RF_A_BAND | RF_BW_20 | RF_BW_40 | RF_BW_80, { MT_BBP(AGC, 13), 0x2C3A0406 } },
171
172 { RF_G_BAND | RF_BW_20 | RF_BW_40, { MT_BBP(AGC, 14), 0x310F2E3C } },
173 { RF_A_BAND | RF_BW_20 | RF_BW_40 | RF_BW_80, { MT_BBP(AGC, 14), 0x310F2A3F } },
174
175 { RF_G_BAND | RF_BW_20 | RF_BW_40, { MT_BBP(AGC, 26), 0x007C2005 } },
176 { RF_A_BAND | RF_BW_20 | RF_BW_40 | RF_BW_80, { MT_BBP(AGC, 26), 0x007C2005 } },
177
178 { RF_G_BAND | RF_BW_20 | RF_BW_40, { MT_BBP(AGC, 27), 0x000000E1 } },
179 { RF_A_BAND | RF_BW_20 | RF_BW_40 | RF_BW_80, { MT_BBP(AGC, 27), 0x000000EC } },
180
181 { RF_G_BAND | RF_BW_20, { MT_BBP(AGC, 28), 0x00060806 } },
182 { RF_G_BAND | RF_BW_40, { MT_BBP(AGC, 28), 0x00050806 } },
183 { RF_A_BAND | RF_BW_40, { MT_BBP(AGC, 28), 0x00060801 } },
184 { RF_A_BAND | RF_BW_20 | RF_BW_80, { MT_BBP(AGC, 28), 0x00060806 } },
185
186 { RF_A_BAND | RF_BW_20 | RF_BW_40 | RF_BW_80, { MT_BBP(RXO, 28), 0x0000008A } },
187
188 { RF_G_BAND | RF_BW_20 | RF_BW_40, { MT_BBP(AGC, 31), 0x00000E23 } },
189 { RF_A_BAND | RF_BW_20 | RF_BW_40 | RF_BW_80, { MT_BBP(AGC, 31), 0x00000E13 } },
190
191 { RF_G_BAND | RF_BW_20 | RF_BW_40, { MT_BBP(AGC, 32), 0x00003218 } },
192 { RF_A_BAND | RF_BW_20 | RF_BW_40 | RF_BW_80, { MT_BBP(AGC, 32), 0x0000181C } },
193
194 { RF_G_BAND | RF_BW_20 | RF_BW_40, { MT_BBP(AGC, 33), 0x00003240 } },
195 { RF_A_BAND | RF_BW_20 | RF_BW_40 | RF_BW_80, { MT_BBP(AGC, 33), 0x00003218 } },
196
197 { RF_G_BAND | RF_BW_20, { MT_BBP(AGC, 35), 0x11111616 } },
198 { RF_G_BAND | RF_BW_40, { MT_BBP(AGC, 35), 0x11111516 } },
199 { RF_A_BAND | RF_BW_20 | RF_BW_40 | RF_BW_80, { MT_BBP(AGC, 35), 0x11111111 } },
200
201 { RF_G_BAND | RF_BW_20, { MT_BBP(AGC, 39), 0x2A2A3036 } },
202 { RF_G_BAND | RF_BW_40, { MT_BBP(AGC, 39), 0x2A2A2C36 } },
203 { RF_A_BAND | RF_BW_20 | RF_BW_40 | RF_BW_80, { MT_BBP(AGC, 39), 0x2A2A2A2A } },
204
205 { RF_G_BAND | RF_BW_20, { MT_BBP(AGC, 43), 0x27273438 } },
206 { RF_G_BAND | RF_BW_40, { MT_BBP(AGC, 43), 0x27272D38 } },
207 { RF_A_BAND | RF_BW_20 | RF_BW_40 | RF_BW_80, { MT_BBP(AGC, 43), 0x27271A1A } },
208
209 { RF_G_BAND | RF_BW_20 | RF_BW_40, { MT_BBP(AGC, 51), 0x17171C1C } },
210 { RF_A_BAND | RF_BW_20 | RF_BW_40 | RF_BW_80, { MT_BBP(AGC, 51), 0xFFFFFFFF } },
211
212 { RF_G_BAND | RF_BW_20, { MT_BBP(AGC, 53), 0x26262A2F } },
213 { RF_G_BAND | RF_BW_40, { MT_BBP(AGC, 53), 0x2626322F } },
214 { RF_A_BAND | RF_BW_20 | RF_BW_40 | RF_BW_80, { MT_BBP(AGC, 53), 0xFFFFFFFF } },
215
216 { RF_G_BAND | RF_BW_20 | RF_BW_40, { MT_BBP(AGC, 55), 0x40404040 } },
217 { RF_A_BAND | RF_BW_20 | RF_BW_40 | RF_BW_80, { MT_BBP(AGC, 55), 0xFFFFFFFF } },
218
219 { RF_G_BAND | RF_BW_20 | RF_BW_40, { MT_BBP(AGC, 58), 0x00001010 } },
220 { RF_A_BAND | RF_BW_20 | RF_BW_40 | RF_BW_80, { MT_BBP(AGC, 58), 0x00000000 } },
221
222 { RF_G_BAND | RF_BW_20 | RF_BW_40, { MT_BBP(RXFE, 0), 0x3D5000E0 } },
223 { RF_A_BAND | RF_BW_20 | RF_BW_40 | RF_BW_80, { MT_BBP(RXFE, 0), 0x895000E0 } },
224 };
225
226 static const struct mt76_reg_pair mt76x0_dcoc_tab[] = {
227 { MT_BBP(CAL, 47), 0x000010F0 },
228 { MT_BBP(CAL, 48), 0x00008080 },
229 { MT_BBP(CAL, 49), 0x00000F07 },
230 { MT_BBP(CAL, 50), 0x00000040 },
231 { MT_BBP(CAL, 51), 0x00000404 },
232 { MT_BBP(CAL, 52), 0x00080803 },
233 { MT_BBP(CAL, 53), 0x00000704 },
234 { MT_BBP(CAL, 54), 0x00002828 },
235 { MT_BBP(CAL, 55), 0x00005050 },
236 };
237
238 #endif
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