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iwlagn: wait for asynchronous firmware loading
[mirror_ubuntu-artful-kernel.git] / drivers / net / wireless / mwl8k.c
1 /*
2 * drivers/net/wireless/mwl8k.c
3 * Driver for Marvell TOPDOG 802.11 Wireless cards
4 *
5 * Copyright (C) 2008, 2009, 2010 Marvell Semiconductor Inc.
6 *
7 * This file is licensed under the terms of the GNU General Public
8 * License version 2. This program is licensed "as is" without any
9 * warranty of any kind, whether express or implied.
10 */
11
12 #include <linux/init.h>
13 #include <linux/module.h>
14 #include <linux/kernel.h>
15 #include <linux/sched.h>
16 #include <linux/spinlock.h>
17 #include <linux/list.h>
18 #include <linux/pci.h>
19 #include <linux/delay.h>
20 #include <linux/completion.h>
21 #include <linux/etherdevice.h>
22 #include <net/mac80211.h>
23 #include <linux/moduleparam.h>
24 #include <linux/firmware.h>
25 #include <linux/workqueue.h>
26
27 #define MWL8K_DESC "Marvell TOPDOG(R) 802.11 Wireless Network Driver"
28 #define MWL8K_NAME KBUILD_MODNAME
29 #define MWL8K_VERSION "0.12"
30
31 /* Register definitions */
32 #define MWL8K_HIU_GEN_PTR 0x00000c10
33 #define MWL8K_MODE_STA 0x0000005a
34 #define MWL8K_MODE_AP 0x000000a5
35 #define MWL8K_HIU_INT_CODE 0x00000c14
36 #define MWL8K_FWSTA_READY 0xf0f1f2f4
37 #define MWL8K_FWAP_READY 0xf1f2f4a5
38 #define MWL8K_INT_CODE_CMD_FINISHED 0x00000005
39 #define MWL8K_HIU_SCRATCH 0x00000c40
40
41 /* Host->device communications */
42 #define MWL8K_HIU_H2A_INTERRUPT_EVENTS 0x00000c18
43 #define MWL8K_HIU_H2A_INTERRUPT_STATUS 0x00000c1c
44 #define MWL8K_HIU_H2A_INTERRUPT_MASK 0x00000c20
45 #define MWL8K_HIU_H2A_INTERRUPT_CLEAR_SEL 0x00000c24
46 #define MWL8K_HIU_H2A_INTERRUPT_STATUS_MASK 0x00000c28
47 #define MWL8K_H2A_INT_DUMMY (1 << 20)
48 #define MWL8K_H2A_INT_RESET (1 << 15)
49 #define MWL8K_H2A_INT_DOORBELL (1 << 1)
50 #define MWL8K_H2A_INT_PPA_READY (1 << 0)
51
52 /* Device->host communications */
53 #define MWL8K_HIU_A2H_INTERRUPT_EVENTS 0x00000c2c
54 #define MWL8K_HIU_A2H_INTERRUPT_STATUS 0x00000c30
55 #define MWL8K_HIU_A2H_INTERRUPT_MASK 0x00000c34
56 #define MWL8K_HIU_A2H_INTERRUPT_CLEAR_SEL 0x00000c38
57 #define MWL8K_HIU_A2H_INTERRUPT_STATUS_MASK 0x00000c3c
58 #define MWL8K_A2H_INT_DUMMY (1 << 20)
59 #define MWL8K_A2H_INT_CHNL_SWITCHED (1 << 11)
60 #define MWL8K_A2H_INT_QUEUE_EMPTY (1 << 10)
61 #define MWL8K_A2H_INT_RADAR_DETECT (1 << 7)
62 #define MWL8K_A2H_INT_RADIO_ON (1 << 6)
63 #define MWL8K_A2H_INT_RADIO_OFF (1 << 5)
64 #define MWL8K_A2H_INT_MAC_EVENT (1 << 3)
65 #define MWL8K_A2H_INT_OPC_DONE (1 << 2)
66 #define MWL8K_A2H_INT_RX_READY (1 << 1)
67 #define MWL8K_A2H_INT_TX_DONE (1 << 0)
68
69 #define MWL8K_A2H_EVENTS (MWL8K_A2H_INT_DUMMY | \
70 MWL8K_A2H_INT_CHNL_SWITCHED | \
71 MWL8K_A2H_INT_QUEUE_EMPTY | \
72 MWL8K_A2H_INT_RADAR_DETECT | \
73 MWL8K_A2H_INT_RADIO_ON | \
74 MWL8K_A2H_INT_RADIO_OFF | \
75 MWL8K_A2H_INT_MAC_EVENT | \
76 MWL8K_A2H_INT_OPC_DONE | \
77 MWL8K_A2H_INT_RX_READY | \
78 MWL8K_A2H_INT_TX_DONE)
79
80 #define MWL8K_RX_QUEUES 1
81 #define MWL8K_TX_QUEUES 4
82
83 struct rxd_ops {
84 int rxd_size;
85 void (*rxd_init)(void *rxd, dma_addr_t next_dma_addr);
86 void (*rxd_refill)(void *rxd, dma_addr_t addr, int len);
87 int (*rxd_process)(void *rxd, struct ieee80211_rx_status *status,
88 __le16 *qos);
89 };
90
91 struct mwl8k_device_info {
92 char *part_name;
93 char *helper_image;
94 char *fw_image;
95 struct rxd_ops *ap_rxd_ops;
96 };
97
98 struct mwl8k_rx_queue {
99 int rxd_count;
100
101 /* hw receives here */
102 int head;
103
104 /* refill descs here */
105 int tail;
106
107 void *rxd;
108 dma_addr_t rxd_dma;
109 struct {
110 struct sk_buff *skb;
111 DECLARE_PCI_UNMAP_ADDR(dma)
112 } *buf;
113 };
114
115 struct mwl8k_tx_queue {
116 /* hw transmits here */
117 int head;
118
119 /* sw appends here */
120 int tail;
121
122 unsigned int len;
123 struct mwl8k_tx_desc *txd;
124 dma_addr_t txd_dma;
125 struct sk_buff **skb;
126 };
127
128 struct mwl8k_priv {
129 struct ieee80211_hw *hw;
130 struct pci_dev *pdev;
131
132 struct mwl8k_device_info *device_info;
133
134 void __iomem *sram;
135 void __iomem *regs;
136
137 /* firmware */
138 struct firmware *fw_helper;
139 struct firmware *fw_ucode;
140
141 /* hardware/firmware parameters */
142 bool ap_fw;
143 struct rxd_ops *rxd_ops;
144 struct ieee80211_supported_band band_24;
145 struct ieee80211_channel channels_24[14];
146 struct ieee80211_rate rates_24[14];
147 struct ieee80211_supported_band band_50;
148 struct ieee80211_channel channels_50[4];
149 struct ieee80211_rate rates_50[9];
150 u32 ap_macids_supported;
151 u32 sta_macids_supported;
152
153 /* firmware access */
154 struct mutex fw_mutex;
155 struct task_struct *fw_mutex_owner;
156 int fw_mutex_depth;
157 struct completion *hostcmd_wait;
158
159 /* lock held over TX and TX reap */
160 spinlock_t tx_lock;
161
162 /* TX quiesce completion, protected by fw_mutex and tx_lock */
163 struct completion *tx_wait;
164
165 /* List of interfaces. */
166 u32 macids_used;
167 struct list_head vif_list;
168
169 /* power management status cookie from firmware */
170 u32 *cookie;
171 dma_addr_t cookie_dma;
172
173 u16 num_mcaddrs;
174 u8 hw_rev;
175 u32 fw_rev;
176
177 /*
178 * Running count of TX packets in flight, to avoid
179 * iterating over the transmit rings each time.
180 */
181 int pending_tx_pkts;
182
183 struct mwl8k_rx_queue rxq[MWL8K_RX_QUEUES];
184 struct mwl8k_tx_queue txq[MWL8K_TX_QUEUES];
185
186 bool radio_on;
187 bool radio_short_preamble;
188 bool sniffer_enabled;
189 bool wmm_enabled;
190
191 /* XXX need to convert this to handle multiple interfaces */
192 bool capture_beacon;
193 u8 capture_bssid[ETH_ALEN];
194 struct sk_buff *beacon_skb;
195
196 /*
197 * This FJ worker has to be global as it is scheduled from the
198 * RX handler. At this point we don't know which interface it
199 * belongs to until the list of bssids waiting to complete join
200 * is checked.
201 */
202 struct work_struct finalize_join_worker;
203
204 /* Tasklet to perform TX reclaim. */
205 struct tasklet_struct poll_tx_task;
206
207 /* Tasklet to perform RX. */
208 struct tasklet_struct poll_rx_task;
209 };
210
211 /* Per interface specific private data */
212 struct mwl8k_vif {
213 struct list_head list;
214 struct ieee80211_vif *vif;
215
216 /* Firmware macid for this vif. */
217 int macid;
218
219 /* Non AMPDU sequence number assigned by driver. */
220 u16 seqno;
221 };
222 #define MWL8K_VIF(_vif) ((struct mwl8k_vif *)&((_vif)->drv_priv))
223
224 struct mwl8k_sta {
225 /* Index into station database. Returned by UPDATE_STADB. */
226 u8 peer_id;
227 };
228 #define MWL8K_STA(_sta) ((struct mwl8k_sta *)&((_sta)->drv_priv))
229
230 static const struct ieee80211_channel mwl8k_channels_24[] = {
231 { .center_freq = 2412, .hw_value = 1, },
232 { .center_freq = 2417, .hw_value = 2, },
233 { .center_freq = 2422, .hw_value = 3, },
234 { .center_freq = 2427, .hw_value = 4, },
235 { .center_freq = 2432, .hw_value = 5, },
236 { .center_freq = 2437, .hw_value = 6, },
237 { .center_freq = 2442, .hw_value = 7, },
238 { .center_freq = 2447, .hw_value = 8, },
239 { .center_freq = 2452, .hw_value = 9, },
240 { .center_freq = 2457, .hw_value = 10, },
241 { .center_freq = 2462, .hw_value = 11, },
242 { .center_freq = 2467, .hw_value = 12, },
243 { .center_freq = 2472, .hw_value = 13, },
244 { .center_freq = 2484, .hw_value = 14, },
245 };
246
247 static const struct ieee80211_rate mwl8k_rates_24[] = {
248 { .bitrate = 10, .hw_value = 2, },
249 { .bitrate = 20, .hw_value = 4, },
250 { .bitrate = 55, .hw_value = 11, },
251 { .bitrate = 110, .hw_value = 22, },
252 { .bitrate = 220, .hw_value = 44, },
253 { .bitrate = 60, .hw_value = 12, },
254 { .bitrate = 90, .hw_value = 18, },
255 { .bitrate = 120, .hw_value = 24, },
256 { .bitrate = 180, .hw_value = 36, },
257 { .bitrate = 240, .hw_value = 48, },
258 { .bitrate = 360, .hw_value = 72, },
259 { .bitrate = 480, .hw_value = 96, },
260 { .bitrate = 540, .hw_value = 108, },
261 { .bitrate = 720, .hw_value = 144, },
262 };
263
264 static const struct ieee80211_channel mwl8k_channels_50[] = {
265 { .center_freq = 5180, .hw_value = 36, },
266 { .center_freq = 5200, .hw_value = 40, },
267 { .center_freq = 5220, .hw_value = 44, },
268 { .center_freq = 5240, .hw_value = 48, },
269 };
270
271 static const struct ieee80211_rate mwl8k_rates_50[] = {
272 { .bitrate = 60, .hw_value = 12, },
273 { .bitrate = 90, .hw_value = 18, },
274 { .bitrate = 120, .hw_value = 24, },
275 { .bitrate = 180, .hw_value = 36, },
276 { .bitrate = 240, .hw_value = 48, },
277 { .bitrate = 360, .hw_value = 72, },
278 { .bitrate = 480, .hw_value = 96, },
279 { .bitrate = 540, .hw_value = 108, },
280 { .bitrate = 720, .hw_value = 144, },
281 };
282
283 /* Set or get info from Firmware */
284 #define MWL8K_CMD_SET 0x0001
285 #define MWL8K_CMD_GET 0x0000
286
287 /* Firmware command codes */
288 #define MWL8K_CMD_CODE_DNLD 0x0001
289 #define MWL8K_CMD_GET_HW_SPEC 0x0003
290 #define MWL8K_CMD_SET_HW_SPEC 0x0004
291 #define MWL8K_CMD_MAC_MULTICAST_ADR 0x0010
292 #define MWL8K_CMD_GET_STAT 0x0014
293 #define MWL8K_CMD_RADIO_CONTROL 0x001c
294 #define MWL8K_CMD_RF_TX_POWER 0x001e
295 #define MWL8K_CMD_RF_ANTENNA 0x0020
296 #define MWL8K_CMD_SET_BEACON 0x0100 /* per-vif */
297 #define MWL8K_CMD_SET_PRE_SCAN 0x0107
298 #define MWL8K_CMD_SET_POST_SCAN 0x0108
299 #define MWL8K_CMD_SET_RF_CHANNEL 0x010a
300 #define MWL8K_CMD_SET_AID 0x010d
301 #define MWL8K_CMD_SET_RATE 0x0110
302 #define MWL8K_CMD_SET_FINALIZE_JOIN 0x0111
303 #define MWL8K_CMD_RTS_THRESHOLD 0x0113
304 #define MWL8K_CMD_SET_SLOT 0x0114
305 #define MWL8K_CMD_SET_EDCA_PARAMS 0x0115
306 #define MWL8K_CMD_SET_WMM_MODE 0x0123
307 #define MWL8K_CMD_MIMO_CONFIG 0x0125
308 #define MWL8K_CMD_USE_FIXED_RATE 0x0126
309 #define MWL8K_CMD_ENABLE_SNIFFER 0x0150
310 #define MWL8K_CMD_SET_MAC_ADDR 0x0202 /* per-vif */
311 #define MWL8K_CMD_SET_RATEADAPT_MODE 0x0203
312 #define MWL8K_CMD_BSS_START 0x1100 /* per-vif */
313 #define MWL8K_CMD_SET_NEW_STN 0x1111 /* per-vif */
314 #define MWL8K_CMD_UPDATE_STADB 0x1123
315
316 static const char *mwl8k_cmd_name(u16 cmd, char *buf, int bufsize)
317 {
318 #define MWL8K_CMDNAME(x) case MWL8K_CMD_##x: do {\
319 snprintf(buf, bufsize, "%s", #x);\
320 return buf;\
321 } while (0)
322 switch (cmd & ~0x8000) {
323 MWL8K_CMDNAME(CODE_DNLD);
324 MWL8K_CMDNAME(GET_HW_SPEC);
325 MWL8K_CMDNAME(SET_HW_SPEC);
326 MWL8K_CMDNAME(MAC_MULTICAST_ADR);
327 MWL8K_CMDNAME(GET_STAT);
328 MWL8K_CMDNAME(RADIO_CONTROL);
329 MWL8K_CMDNAME(RF_TX_POWER);
330 MWL8K_CMDNAME(RF_ANTENNA);
331 MWL8K_CMDNAME(SET_BEACON);
332 MWL8K_CMDNAME(SET_PRE_SCAN);
333 MWL8K_CMDNAME(SET_POST_SCAN);
334 MWL8K_CMDNAME(SET_RF_CHANNEL);
335 MWL8K_CMDNAME(SET_AID);
336 MWL8K_CMDNAME(SET_RATE);
337 MWL8K_CMDNAME(SET_FINALIZE_JOIN);
338 MWL8K_CMDNAME(RTS_THRESHOLD);
339 MWL8K_CMDNAME(SET_SLOT);
340 MWL8K_CMDNAME(SET_EDCA_PARAMS);
341 MWL8K_CMDNAME(SET_WMM_MODE);
342 MWL8K_CMDNAME(MIMO_CONFIG);
343 MWL8K_CMDNAME(USE_FIXED_RATE);
344 MWL8K_CMDNAME(ENABLE_SNIFFER);
345 MWL8K_CMDNAME(SET_MAC_ADDR);
346 MWL8K_CMDNAME(SET_RATEADAPT_MODE);
347 MWL8K_CMDNAME(BSS_START);
348 MWL8K_CMDNAME(SET_NEW_STN);
349 MWL8K_CMDNAME(UPDATE_STADB);
350 default:
351 snprintf(buf, bufsize, "0x%x", cmd);
352 }
353 #undef MWL8K_CMDNAME
354
355 return buf;
356 }
357
358 /* Hardware and firmware reset */
359 static void mwl8k_hw_reset(struct mwl8k_priv *priv)
360 {
361 iowrite32(MWL8K_H2A_INT_RESET,
362 priv->regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
363 iowrite32(MWL8K_H2A_INT_RESET,
364 priv->regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
365 msleep(20);
366 }
367
368 /* Release fw image */
369 static void mwl8k_release_fw(struct firmware **fw)
370 {
371 if (*fw == NULL)
372 return;
373 release_firmware(*fw);
374 *fw = NULL;
375 }
376
377 static void mwl8k_release_firmware(struct mwl8k_priv *priv)
378 {
379 mwl8k_release_fw(&priv->fw_ucode);
380 mwl8k_release_fw(&priv->fw_helper);
381 }
382
383 /* Request fw image */
384 static int mwl8k_request_fw(struct mwl8k_priv *priv,
385 const char *fname, struct firmware **fw)
386 {
387 /* release current image */
388 if (*fw != NULL)
389 mwl8k_release_fw(fw);
390
391 return request_firmware((const struct firmware **)fw,
392 fname, &priv->pdev->dev);
393 }
394
395 static int mwl8k_request_firmware(struct mwl8k_priv *priv)
396 {
397 struct mwl8k_device_info *di = priv->device_info;
398 int rc;
399
400 if (di->helper_image != NULL) {
401 rc = mwl8k_request_fw(priv, di->helper_image, &priv->fw_helper);
402 if (rc) {
403 printk(KERN_ERR "%s: Error requesting helper "
404 "firmware file %s\n", pci_name(priv->pdev),
405 di->helper_image);
406 return rc;
407 }
408 }
409
410 rc = mwl8k_request_fw(priv, di->fw_image, &priv->fw_ucode);
411 if (rc) {
412 printk(KERN_ERR "%s: Error requesting firmware file %s\n",
413 pci_name(priv->pdev), di->fw_image);
414 mwl8k_release_fw(&priv->fw_helper);
415 return rc;
416 }
417
418 return 0;
419 }
420
421 struct mwl8k_cmd_pkt {
422 __le16 code;
423 __le16 length;
424 __u8 seq_num;
425 __u8 macid;
426 __le16 result;
427 char payload[0];
428 } __attribute__((packed));
429
430 /*
431 * Firmware loading.
432 */
433 static int
434 mwl8k_send_fw_load_cmd(struct mwl8k_priv *priv, void *data, int length)
435 {
436 void __iomem *regs = priv->regs;
437 dma_addr_t dma_addr;
438 int loops;
439
440 dma_addr = pci_map_single(priv->pdev, data, length, PCI_DMA_TODEVICE);
441 if (pci_dma_mapping_error(priv->pdev, dma_addr))
442 return -ENOMEM;
443
444 iowrite32(dma_addr, regs + MWL8K_HIU_GEN_PTR);
445 iowrite32(0, regs + MWL8K_HIU_INT_CODE);
446 iowrite32(MWL8K_H2A_INT_DOORBELL,
447 regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
448 iowrite32(MWL8K_H2A_INT_DUMMY,
449 regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
450
451 loops = 1000;
452 do {
453 u32 int_code;
454
455 int_code = ioread32(regs + MWL8K_HIU_INT_CODE);
456 if (int_code == MWL8K_INT_CODE_CMD_FINISHED) {
457 iowrite32(0, regs + MWL8K_HIU_INT_CODE);
458 break;
459 }
460
461 cond_resched();
462 udelay(1);
463 } while (--loops);
464
465 pci_unmap_single(priv->pdev, dma_addr, length, PCI_DMA_TODEVICE);
466
467 return loops ? 0 : -ETIMEDOUT;
468 }
469
470 static int mwl8k_load_fw_image(struct mwl8k_priv *priv,
471 const u8 *data, size_t length)
472 {
473 struct mwl8k_cmd_pkt *cmd;
474 int done;
475 int rc = 0;
476
477 cmd = kmalloc(sizeof(*cmd) + 256, GFP_KERNEL);
478 if (cmd == NULL)
479 return -ENOMEM;
480
481 cmd->code = cpu_to_le16(MWL8K_CMD_CODE_DNLD);
482 cmd->seq_num = 0;
483 cmd->macid = 0;
484 cmd->result = 0;
485
486 done = 0;
487 while (length) {
488 int block_size = length > 256 ? 256 : length;
489
490 memcpy(cmd->payload, data + done, block_size);
491 cmd->length = cpu_to_le16(block_size);
492
493 rc = mwl8k_send_fw_load_cmd(priv, cmd,
494 sizeof(*cmd) + block_size);
495 if (rc)
496 break;
497
498 done += block_size;
499 length -= block_size;
500 }
501
502 if (!rc) {
503 cmd->length = 0;
504 rc = mwl8k_send_fw_load_cmd(priv, cmd, sizeof(*cmd));
505 }
506
507 kfree(cmd);
508
509 return rc;
510 }
511
512 static int mwl8k_feed_fw_image(struct mwl8k_priv *priv,
513 const u8 *data, size_t length)
514 {
515 unsigned char *buffer;
516 int may_continue, rc = 0;
517 u32 done, prev_block_size;
518
519 buffer = kmalloc(1024, GFP_KERNEL);
520 if (buffer == NULL)
521 return -ENOMEM;
522
523 done = 0;
524 prev_block_size = 0;
525 may_continue = 1000;
526 while (may_continue > 0) {
527 u32 block_size;
528
529 block_size = ioread32(priv->regs + MWL8K_HIU_SCRATCH);
530 if (block_size & 1) {
531 block_size &= ~1;
532 may_continue--;
533 } else {
534 done += prev_block_size;
535 length -= prev_block_size;
536 }
537
538 if (block_size > 1024 || block_size > length) {
539 rc = -EOVERFLOW;
540 break;
541 }
542
543 if (length == 0) {
544 rc = 0;
545 break;
546 }
547
548 if (block_size == 0) {
549 rc = -EPROTO;
550 may_continue--;
551 udelay(1);
552 continue;
553 }
554
555 prev_block_size = block_size;
556 memcpy(buffer, data + done, block_size);
557
558 rc = mwl8k_send_fw_load_cmd(priv, buffer, block_size);
559 if (rc)
560 break;
561 }
562
563 if (!rc && length != 0)
564 rc = -EREMOTEIO;
565
566 kfree(buffer);
567
568 return rc;
569 }
570
571 static int mwl8k_load_firmware(struct ieee80211_hw *hw)
572 {
573 struct mwl8k_priv *priv = hw->priv;
574 struct firmware *fw = priv->fw_ucode;
575 int rc;
576 int loops;
577
578 if (!memcmp(fw->data, "\x01\x00\x00\x00", 4)) {
579 struct firmware *helper = priv->fw_helper;
580
581 if (helper == NULL) {
582 printk(KERN_ERR "%s: helper image needed but none "
583 "given\n", pci_name(priv->pdev));
584 return -EINVAL;
585 }
586
587 rc = mwl8k_load_fw_image(priv, helper->data, helper->size);
588 if (rc) {
589 printk(KERN_ERR "%s: unable to load firmware "
590 "helper image\n", pci_name(priv->pdev));
591 return rc;
592 }
593 msleep(5);
594
595 rc = mwl8k_feed_fw_image(priv, fw->data, fw->size);
596 } else {
597 rc = mwl8k_load_fw_image(priv, fw->data, fw->size);
598 }
599
600 if (rc) {
601 printk(KERN_ERR "%s: unable to load firmware image\n",
602 pci_name(priv->pdev));
603 return rc;
604 }
605
606 iowrite32(MWL8K_MODE_STA, priv->regs + MWL8K_HIU_GEN_PTR);
607
608 loops = 500000;
609 do {
610 u32 ready_code;
611
612 ready_code = ioread32(priv->regs + MWL8K_HIU_INT_CODE);
613 if (ready_code == MWL8K_FWAP_READY) {
614 priv->ap_fw = 1;
615 break;
616 } else if (ready_code == MWL8K_FWSTA_READY) {
617 priv->ap_fw = 0;
618 break;
619 }
620
621 cond_resched();
622 udelay(1);
623 } while (--loops);
624
625 return loops ? 0 : -ETIMEDOUT;
626 }
627
628
629 /* DMA header used by firmware and hardware. */
630 struct mwl8k_dma_data {
631 __le16 fwlen;
632 struct ieee80211_hdr wh;
633 char data[0];
634 } __attribute__((packed));
635
636 /* Routines to add/remove DMA header from skb. */
637 static inline void mwl8k_remove_dma_header(struct sk_buff *skb, __le16 qos)
638 {
639 struct mwl8k_dma_data *tr;
640 int hdrlen;
641
642 tr = (struct mwl8k_dma_data *)skb->data;
643 hdrlen = ieee80211_hdrlen(tr->wh.frame_control);
644
645 if (hdrlen != sizeof(tr->wh)) {
646 if (ieee80211_is_data_qos(tr->wh.frame_control)) {
647 memmove(tr->data - hdrlen, &tr->wh, hdrlen - 2);
648 *((__le16 *)(tr->data - 2)) = qos;
649 } else {
650 memmove(tr->data - hdrlen, &tr->wh, hdrlen);
651 }
652 }
653
654 if (hdrlen != sizeof(*tr))
655 skb_pull(skb, sizeof(*tr) - hdrlen);
656 }
657
658 static inline void mwl8k_add_dma_header(struct sk_buff *skb)
659 {
660 struct ieee80211_hdr *wh;
661 int hdrlen;
662 struct mwl8k_dma_data *tr;
663
664 /*
665 * Add a firmware DMA header; the firmware requires that we
666 * present a 2-byte payload length followed by a 4-address
667 * header (without QoS field), followed (optionally) by any
668 * WEP/ExtIV header (but only filled in for CCMP).
669 */
670 wh = (struct ieee80211_hdr *)skb->data;
671
672 hdrlen = ieee80211_hdrlen(wh->frame_control);
673 if (hdrlen != sizeof(*tr))
674 skb_push(skb, sizeof(*tr) - hdrlen);
675
676 if (ieee80211_is_data_qos(wh->frame_control))
677 hdrlen -= 2;
678
679 tr = (struct mwl8k_dma_data *)skb->data;
680 if (wh != &tr->wh)
681 memmove(&tr->wh, wh, hdrlen);
682 if (hdrlen != sizeof(tr->wh))
683 memset(((void *)&tr->wh) + hdrlen, 0, sizeof(tr->wh) - hdrlen);
684
685 /*
686 * Firmware length is the length of the fully formed "802.11
687 * payload". That is, everything except for the 802.11 header.
688 * This includes all crypto material including the MIC.
689 */
690 tr->fwlen = cpu_to_le16(skb->len - sizeof(*tr));
691 }
692
693
694 /*
695 * Packet reception for 88w8366 AP firmware.
696 */
697 struct mwl8k_rxd_8366_ap {
698 __le16 pkt_len;
699 __u8 sq2;
700 __u8 rate;
701 __le32 pkt_phys_addr;
702 __le32 next_rxd_phys_addr;
703 __le16 qos_control;
704 __le16 htsig2;
705 __le32 hw_rssi_info;
706 __le32 hw_noise_floor_info;
707 __u8 noise_floor;
708 __u8 pad0[3];
709 __u8 rssi;
710 __u8 rx_status;
711 __u8 channel;
712 __u8 rx_ctrl;
713 } __attribute__((packed));
714
715 #define MWL8K_8366_AP_RATE_INFO_MCS_FORMAT 0x80
716 #define MWL8K_8366_AP_RATE_INFO_40MHZ 0x40
717 #define MWL8K_8366_AP_RATE_INFO_RATEID(x) ((x) & 0x3f)
718
719 #define MWL8K_8366_AP_RX_CTRL_OWNED_BY_HOST 0x80
720
721 static void mwl8k_rxd_8366_ap_init(void *_rxd, dma_addr_t next_dma_addr)
722 {
723 struct mwl8k_rxd_8366_ap *rxd = _rxd;
724
725 rxd->next_rxd_phys_addr = cpu_to_le32(next_dma_addr);
726 rxd->rx_ctrl = MWL8K_8366_AP_RX_CTRL_OWNED_BY_HOST;
727 }
728
729 static void mwl8k_rxd_8366_ap_refill(void *_rxd, dma_addr_t addr, int len)
730 {
731 struct mwl8k_rxd_8366_ap *rxd = _rxd;
732
733 rxd->pkt_len = cpu_to_le16(len);
734 rxd->pkt_phys_addr = cpu_to_le32(addr);
735 wmb();
736 rxd->rx_ctrl = 0;
737 }
738
739 static int
740 mwl8k_rxd_8366_ap_process(void *_rxd, struct ieee80211_rx_status *status,
741 __le16 *qos)
742 {
743 struct mwl8k_rxd_8366_ap *rxd = _rxd;
744
745 if (!(rxd->rx_ctrl & MWL8K_8366_AP_RX_CTRL_OWNED_BY_HOST))
746 return -1;
747 rmb();
748
749 memset(status, 0, sizeof(*status));
750
751 status->signal = -rxd->rssi;
752 status->noise = -rxd->noise_floor;
753
754 if (rxd->rate & MWL8K_8366_AP_RATE_INFO_MCS_FORMAT) {
755 status->flag |= RX_FLAG_HT;
756 if (rxd->rate & MWL8K_8366_AP_RATE_INFO_40MHZ)
757 status->flag |= RX_FLAG_40MHZ;
758 status->rate_idx = MWL8K_8366_AP_RATE_INFO_RATEID(rxd->rate);
759 } else {
760 int i;
761
762 for (i = 0; i < ARRAY_SIZE(mwl8k_rates_24); i++) {
763 if (mwl8k_rates_24[i].hw_value == rxd->rate) {
764 status->rate_idx = i;
765 break;
766 }
767 }
768 }
769
770 if (rxd->channel > 14) {
771 status->band = IEEE80211_BAND_5GHZ;
772 if (!(status->flag & RX_FLAG_HT))
773 status->rate_idx -= 5;
774 } else {
775 status->band = IEEE80211_BAND_2GHZ;
776 }
777 status->freq = ieee80211_channel_to_frequency(rxd->channel);
778
779 *qos = rxd->qos_control;
780
781 return le16_to_cpu(rxd->pkt_len);
782 }
783
784 static struct rxd_ops rxd_8366_ap_ops = {
785 .rxd_size = sizeof(struct mwl8k_rxd_8366_ap),
786 .rxd_init = mwl8k_rxd_8366_ap_init,
787 .rxd_refill = mwl8k_rxd_8366_ap_refill,
788 .rxd_process = mwl8k_rxd_8366_ap_process,
789 };
790
791 /*
792 * Packet reception for STA firmware.
793 */
794 struct mwl8k_rxd_sta {
795 __le16 pkt_len;
796 __u8 link_quality;
797 __u8 noise_level;
798 __le32 pkt_phys_addr;
799 __le32 next_rxd_phys_addr;
800 __le16 qos_control;
801 __le16 rate_info;
802 __le32 pad0[4];
803 __u8 rssi;
804 __u8 channel;
805 __le16 pad1;
806 __u8 rx_ctrl;
807 __u8 rx_status;
808 __u8 pad2[2];
809 } __attribute__((packed));
810
811 #define MWL8K_STA_RATE_INFO_SHORTPRE 0x8000
812 #define MWL8K_STA_RATE_INFO_ANTSELECT(x) (((x) >> 11) & 0x3)
813 #define MWL8K_STA_RATE_INFO_RATEID(x) (((x) >> 3) & 0x3f)
814 #define MWL8K_STA_RATE_INFO_40MHZ 0x0004
815 #define MWL8K_STA_RATE_INFO_SHORTGI 0x0002
816 #define MWL8K_STA_RATE_INFO_MCS_FORMAT 0x0001
817
818 #define MWL8K_STA_RX_CTRL_OWNED_BY_HOST 0x02
819
820 static void mwl8k_rxd_sta_init(void *_rxd, dma_addr_t next_dma_addr)
821 {
822 struct mwl8k_rxd_sta *rxd = _rxd;
823
824 rxd->next_rxd_phys_addr = cpu_to_le32(next_dma_addr);
825 rxd->rx_ctrl = MWL8K_STA_RX_CTRL_OWNED_BY_HOST;
826 }
827
828 static void mwl8k_rxd_sta_refill(void *_rxd, dma_addr_t addr, int len)
829 {
830 struct mwl8k_rxd_sta *rxd = _rxd;
831
832 rxd->pkt_len = cpu_to_le16(len);
833 rxd->pkt_phys_addr = cpu_to_le32(addr);
834 wmb();
835 rxd->rx_ctrl = 0;
836 }
837
838 static int
839 mwl8k_rxd_sta_process(void *_rxd, struct ieee80211_rx_status *status,
840 __le16 *qos)
841 {
842 struct mwl8k_rxd_sta *rxd = _rxd;
843 u16 rate_info;
844
845 if (!(rxd->rx_ctrl & MWL8K_STA_RX_CTRL_OWNED_BY_HOST))
846 return -1;
847 rmb();
848
849 rate_info = le16_to_cpu(rxd->rate_info);
850
851 memset(status, 0, sizeof(*status));
852
853 status->signal = -rxd->rssi;
854 status->noise = -rxd->noise_level;
855 status->antenna = MWL8K_STA_RATE_INFO_ANTSELECT(rate_info);
856 status->rate_idx = MWL8K_STA_RATE_INFO_RATEID(rate_info);
857
858 if (rate_info & MWL8K_STA_RATE_INFO_SHORTPRE)
859 status->flag |= RX_FLAG_SHORTPRE;
860 if (rate_info & MWL8K_STA_RATE_INFO_40MHZ)
861 status->flag |= RX_FLAG_40MHZ;
862 if (rate_info & MWL8K_STA_RATE_INFO_SHORTGI)
863 status->flag |= RX_FLAG_SHORT_GI;
864 if (rate_info & MWL8K_STA_RATE_INFO_MCS_FORMAT)
865 status->flag |= RX_FLAG_HT;
866
867 if (rxd->channel > 14) {
868 status->band = IEEE80211_BAND_5GHZ;
869 if (!(status->flag & RX_FLAG_HT))
870 status->rate_idx -= 5;
871 } else {
872 status->band = IEEE80211_BAND_2GHZ;
873 }
874 status->freq = ieee80211_channel_to_frequency(rxd->channel);
875
876 *qos = rxd->qos_control;
877
878 return le16_to_cpu(rxd->pkt_len);
879 }
880
881 static struct rxd_ops rxd_sta_ops = {
882 .rxd_size = sizeof(struct mwl8k_rxd_sta),
883 .rxd_init = mwl8k_rxd_sta_init,
884 .rxd_refill = mwl8k_rxd_sta_refill,
885 .rxd_process = mwl8k_rxd_sta_process,
886 };
887
888
889 #define MWL8K_RX_DESCS 256
890 #define MWL8K_RX_MAXSZ 3800
891
892 static int mwl8k_rxq_init(struct ieee80211_hw *hw, int index)
893 {
894 struct mwl8k_priv *priv = hw->priv;
895 struct mwl8k_rx_queue *rxq = priv->rxq + index;
896 int size;
897 int i;
898
899 rxq->rxd_count = 0;
900 rxq->head = 0;
901 rxq->tail = 0;
902
903 size = MWL8K_RX_DESCS * priv->rxd_ops->rxd_size;
904
905 rxq->rxd = pci_alloc_consistent(priv->pdev, size, &rxq->rxd_dma);
906 if (rxq->rxd == NULL) {
907 printk(KERN_ERR "%s: failed to alloc RX descriptors\n",
908 wiphy_name(hw->wiphy));
909 return -ENOMEM;
910 }
911 memset(rxq->rxd, 0, size);
912
913 rxq->buf = kmalloc(MWL8K_RX_DESCS * sizeof(*rxq->buf), GFP_KERNEL);
914 if (rxq->buf == NULL) {
915 printk(KERN_ERR "%s: failed to alloc RX skbuff list\n",
916 wiphy_name(hw->wiphy));
917 pci_free_consistent(priv->pdev, size, rxq->rxd, rxq->rxd_dma);
918 return -ENOMEM;
919 }
920 memset(rxq->buf, 0, MWL8K_RX_DESCS * sizeof(*rxq->buf));
921
922 for (i = 0; i < MWL8K_RX_DESCS; i++) {
923 int desc_size;
924 void *rxd;
925 int nexti;
926 dma_addr_t next_dma_addr;
927
928 desc_size = priv->rxd_ops->rxd_size;
929 rxd = rxq->rxd + (i * priv->rxd_ops->rxd_size);
930
931 nexti = i + 1;
932 if (nexti == MWL8K_RX_DESCS)
933 nexti = 0;
934 next_dma_addr = rxq->rxd_dma + (nexti * desc_size);
935
936 priv->rxd_ops->rxd_init(rxd, next_dma_addr);
937 }
938
939 return 0;
940 }
941
942 static int rxq_refill(struct ieee80211_hw *hw, int index, int limit)
943 {
944 struct mwl8k_priv *priv = hw->priv;
945 struct mwl8k_rx_queue *rxq = priv->rxq + index;
946 int refilled;
947
948 refilled = 0;
949 while (rxq->rxd_count < MWL8K_RX_DESCS && limit--) {
950 struct sk_buff *skb;
951 dma_addr_t addr;
952 int rx;
953 void *rxd;
954
955 skb = dev_alloc_skb(MWL8K_RX_MAXSZ);
956 if (skb == NULL)
957 break;
958
959 addr = pci_map_single(priv->pdev, skb->data,
960 MWL8K_RX_MAXSZ, DMA_FROM_DEVICE);
961
962 rxq->rxd_count++;
963 rx = rxq->tail++;
964 if (rxq->tail == MWL8K_RX_DESCS)
965 rxq->tail = 0;
966 rxq->buf[rx].skb = skb;
967 pci_unmap_addr_set(&rxq->buf[rx], dma, addr);
968
969 rxd = rxq->rxd + (rx * priv->rxd_ops->rxd_size);
970 priv->rxd_ops->rxd_refill(rxd, addr, MWL8K_RX_MAXSZ);
971
972 refilled++;
973 }
974
975 return refilled;
976 }
977
978 /* Must be called only when the card's reception is completely halted */
979 static void mwl8k_rxq_deinit(struct ieee80211_hw *hw, int index)
980 {
981 struct mwl8k_priv *priv = hw->priv;
982 struct mwl8k_rx_queue *rxq = priv->rxq + index;
983 int i;
984
985 for (i = 0; i < MWL8K_RX_DESCS; i++) {
986 if (rxq->buf[i].skb != NULL) {
987 pci_unmap_single(priv->pdev,
988 pci_unmap_addr(&rxq->buf[i], dma),
989 MWL8K_RX_MAXSZ, PCI_DMA_FROMDEVICE);
990 pci_unmap_addr_set(&rxq->buf[i], dma, 0);
991
992 kfree_skb(rxq->buf[i].skb);
993 rxq->buf[i].skb = NULL;
994 }
995 }
996
997 kfree(rxq->buf);
998 rxq->buf = NULL;
999
1000 pci_free_consistent(priv->pdev,
1001 MWL8K_RX_DESCS * priv->rxd_ops->rxd_size,
1002 rxq->rxd, rxq->rxd_dma);
1003 rxq->rxd = NULL;
1004 }
1005
1006
1007 /*
1008 * Scan a list of BSSIDs to process for finalize join.
1009 * Allows for extension to process multiple BSSIDs.
1010 */
1011 static inline int
1012 mwl8k_capture_bssid(struct mwl8k_priv *priv, struct ieee80211_hdr *wh)
1013 {
1014 return priv->capture_beacon &&
1015 ieee80211_is_beacon(wh->frame_control) &&
1016 !compare_ether_addr(wh->addr3, priv->capture_bssid);
1017 }
1018
1019 static inline void mwl8k_save_beacon(struct ieee80211_hw *hw,
1020 struct sk_buff *skb)
1021 {
1022 struct mwl8k_priv *priv = hw->priv;
1023
1024 priv->capture_beacon = false;
1025 memset(priv->capture_bssid, 0, ETH_ALEN);
1026
1027 /*
1028 * Use GFP_ATOMIC as rxq_process is called from
1029 * the primary interrupt handler, memory allocation call
1030 * must not sleep.
1031 */
1032 priv->beacon_skb = skb_copy(skb, GFP_ATOMIC);
1033 if (priv->beacon_skb != NULL)
1034 ieee80211_queue_work(hw, &priv->finalize_join_worker);
1035 }
1036
1037 static int rxq_process(struct ieee80211_hw *hw, int index, int limit)
1038 {
1039 struct mwl8k_priv *priv = hw->priv;
1040 struct mwl8k_rx_queue *rxq = priv->rxq + index;
1041 int processed;
1042
1043 processed = 0;
1044 while (rxq->rxd_count && limit--) {
1045 struct sk_buff *skb;
1046 void *rxd;
1047 int pkt_len;
1048 struct ieee80211_rx_status status;
1049 __le16 qos;
1050
1051 skb = rxq->buf[rxq->head].skb;
1052 if (skb == NULL)
1053 break;
1054
1055 rxd = rxq->rxd + (rxq->head * priv->rxd_ops->rxd_size);
1056
1057 pkt_len = priv->rxd_ops->rxd_process(rxd, &status, &qos);
1058 if (pkt_len < 0)
1059 break;
1060
1061 rxq->buf[rxq->head].skb = NULL;
1062
1063 pci_unmap_single(priv->pdev,
1064 pci_unmap_addr(&rxq->buf[rxq->head], dma),
1065 MWL8K_RX_MAXSZ, PCI_DMA_FROMDEVICE);
1066 pci_unmap_addr_set(&rxq->buf[rxq->head], dma, 0);
1067
1068 rxq->head++;
1069 if (rxq->head == MWL8K_RX_DESCS)
1070 rxq->head = 0;
1071
1072 rxq->rxd_count--;
1073
1074 skb_put(skb, pkt_len);
1075 mwl8k_remove_dma_header(skb, qos);
1076
1077 /*
1078 * Check for a pending join operation. Save a
1079 * copy of the beacon and schedule a tasklet to
1080 * send a FINALIZE_JOIN command to the firmware.
1081 */
1082 if (mwl8k_capture_bssid(priv, (void *)skb->data))
1083 mwl8k_save_beacon(hw, skb);
1084
1085 memcpy(IEEE80211_SKB_RXCB(skb), &status, sizeof(status));
1086 ieee80211_rx_irqsafe(hw, skb);
1087
1088 processed++;
1089 }
1090
1091 return processed;
1092 }
1093
1094
1095 /*
1096 * Packet transmission.
1097 */
1098
1099 #define MWL8K_TXD_STATUS_OK 0x00000001
1100 #define MWL8K_TXD_STATUS_OK_RETRY 0x00000002
1101 #define MWL8K_TXD_STATUS_OK_MORE_RETRY 0x00000004
1102 #define MWL8K_TXD_STATUS_MULTICAST_TX 0x00000008
1103 #define MWL8K_TXD_STATUS_FW_OWNED 0x80000000
1104
1105 #define MWL8K_QOS_QLEN_UNSPEC 0xff00
1106 #define MWL8K_QOS_ACK_POLICY_MASK 0x0060
1107 #define MWL8K_QOS_ACK_POLICY_NORMAL 0x0000
1108 #define MWL8K_QOS_ACK_POLICY_BLOCKACK 0x0060
1109 #define MWL8K_QOS_EOSP 0x0010
1110
1111 struct mwl8k_tx_desc {
1112 __le32 status;
1113 __u8 data_rate;
1114 __u8 tx_priority;
1115 __le16 qos_control;
1116 __le32 pkt_phys_addr;
1117 __le16 pkt_len;
1118 __u8 dest_MAC_addr[ETH_ALEN];
1119 __le32 next_txd_phys_addr;
1120 __le32 reserved;
1121 __le16 rate_info;
1122 __u8 peer_id;
1123 __u8 tx_frag_cnt;
1124 } __attribute__((packed));
1125
1126 #define MWL8K_TX_DESCS 128
1127
1128 static int mwl8k_txq_init(struct ieee80211_hw *hw, int index)
1129 {
1130 struct mwl8k_priv *priv = hw->priv;
1131 struct mwl8k_tx_queue *txq = priv->txq + index;
1132 int size;
1133 int i;
1134
1135 txq->len = 0;
1136 txq->head = 0;
1137 txq->tail = 0;
1138
1139 size = MWL8K_TX_DESCS * sizeof(struct mwl8k_tx_desc);
1140
1141 txq->txd = pci_alloc_consistent(priv->pdev, size, &txq->txd_dma);
1142 if (txq->txd == NULL) {
1143 printk(KERN_ERR "%s: failed to alloc TX descriptors\n",
1144 wiphy_name(hw->wiphy));
1145 return -ENOMEM;
1146 }
1147 memset(txq->txd, 0, size);
1148
1149 txq->skb = kmalloc(MWL8K_TX_DESCS * sizeof(*txq->skb), GFP_KERNEL);
1150 if (txq->skb == NULL) {
1151 printk(KERN_ERR "%s: failed to alloc TX skbuff list\n",
1152 wiphy_name(hw->wiphy));
1153 pci_free_consistent(priv->pdev, size, txq->txd, txq->txd_dma);
1154 return -ENOMEM;
1155 }
1156 memset(txq->skb, 0, MWL8K_TX_DESCS * sizeof(*txq->skb));
1157
1158 for (i = 0; i < MWL8K_TX_DESCS; i++) {
1159 struct mwl8k_tx_desc *tx_desc;
1160 int nexti;
1161
1162 tx_desc = txq->txd + i;
1163 nexti = (i + 1) % MWL8K_TX_DESCS;
1164
1165 tx_desc->status = 0;
1166 tx_desc->next_txd_phys_addr =
1167 cpu_to_le32(txq->txd_dma + nexti * sizeof(*tx_desc));
1168 }
1169
1170 return 0;
1171 }
1172
1173 static inline void mwl8k_tx_start(struct mwl8k_priv *priv)
1174 {
1175 iowrite32(MWL8K_H2A_INT_PPA_READY,
1176 priv->regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
1177 iowrite32(MWL8K_H2A_INT_DUMMY,
1178 priv->regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
1179 ioread32(priv->regs + MWL8K_HIU_INT_CODE);
1180 }
1181
1182 static void mwl8k_dump_tx_rings(struct ieee80211_hw *hw)
1183 {
1184 struct mwl8k_priv *priv = hw->priv;
1185 int i;
1186
1187 for (i = 0; i < MWL8K_TX_QUEUES; i++) {
1188 struct mwl8k_tx_queue *txq = priv->txq + i;
1189 int fw_owned = 0;
1190 int drv_owned = 0;
1191 int unused = 0;
1192 int desc;
1193
1194 for (desc = 0; desc < MWL8K_TX_DESCS; desc++) {
1195 struct mwl8k_tx_desc *tx_desc = txq->txd + desc;
1196 u32 status;
1197
1198 status = le32_to_cpu(tx_desc->status);
1199 if (status & MWL8K_TXD_STATUS_FW_OWNED)
1200 fw_owned++;
1201 else
1202 drv_owned++;
1203
1204 if (tx_desc->pkt_len == 0)
1205 unused++;
1206 }
1207
1208 printk(KERN_ERR "%s: txq[%d] len=%d head=%d tail=%d "
1209 "fw_owned=%d drv_owned=%d unused=%d\n",
1210 wiphy_name(hw->wiphy), i,
1211 txq->len, txq->head, txq->tail,
1212 fw_owned, drv_owned, unused);
1213 }
1214 }
1215
1216 /*
1217 * Must be called with priv->fw_mutex held and tx queues stopped.
1218 */
1219 #define MWL8K_TX_WAIT_TIMEOUT_MS 5000
1220
1221 static int mwl8k_tx_wait_empty(struct ieee80211_hw *hw)
1222 {
1223 struct mwl8k_priv *priv = hw->priv;
1224 DECLARE_COMPLETION_ONSTACK(tx_wait);
1225 int retry;
1226 int rc;
1227
1228 might_sleep();
1229
1230 /*
1231 * The TX queues are stopped at this point, so this test
1232 * doesn't need to take ->tx_lock.
1233 */
1234 if (!priv->pending_tx_pkts)
1235 return 0;
1236
1237 retry = 0;
1238 rc = 0;
1239
1240 spin_lock_bh(&priv->tx_lock);
1241 priv->tx_wait = &tx_wait;
1242 while (!rc) {
1243 int oldcount;
1244 unsigned long timeout;
1245
1246 oldcount = priv->pending_tx_pkts;
1247
1248 spin_unlock_bh(&priv->tx_lock);
1249 timeout = wait_for_completion_timeout(&tx_wait,
1250 msecs_to_jiffies(MWL8K_TX_WAIT_TIMEOUT_MS));
1251 spin_lock_bh(&priv->tx_lock);
1252
1253 if (timeout) {
1254 WARN_ON(priv->pending_tx_pkts);
1255 if (retry) {
1256 printk(KERN_NOTICE "%s: tx rings drained\n",
1257 wiphy_name(hw->wiphy));
1258 }
1259 break;
1260 }
1261
1262 if (priv->pending_tx_pkts < oldcount) {
1263 printk(KERN_NOTICE "%s: waiting for tx rings "
1264 "to drain (%d -> %d pkts)\n",
1265 wiphy_name(hw->wiphy), oldcount,
1266 priv->pending_tx_pkts);
1267 retry = 1;
1268 continue;
1269 }
1270
1271 priv->tx_wait = NULL;
1272
1273 printk(KERN_ERR "%s: tx rings stuck for %d ms\n",
1274 wiphy_name(hw->wiphy), MWL8K_TX_WAIT_TIMEOUT_MS);
1275 mwl8k_dump_tx_rings(hw);
1276
1277 rc = -ETIMEDOUT;
1278 }
1279 spin_unlock_bh(&priv->tx_lock);
1280
1281 return rc;
1282 }
1283
1284 #define MWL8K_TXD_SUCCESS(status) \
1285 ((status) & (MWL8K_TXD_STATUS_OK | \
1286 MWL8K_TXD_STATUS_OK_RETRY | \
1287 MWL8K_TXD_STATUS_OK_MORE_RETRY))
1288
1289 static int
1290 mwl8k_txq_reclaim(struct ieee80211_hw *hw, int index, int limit, int force)
1291 {
1292 struct mwl8k_priv *priv = hw->priv;
1293 struct mwl8k_tx_queue *txq = priv->txq + index;
1294 int processed;
1295
1296 processed = 0;
1297 while (txq->len > 0 && limit--) {
1298 int tx;
1299 struct mwl8k_tx_desc *tx_desc;
1300 unsigned long addr;
1301 int size;
1302 struct sk_buff *skb;
1303 struct ieee80211_tx_info *info;
1304 u32 status;
1305
1306 tx = txq->head;
1307 tx_desc = txq->txd + tx;
1308
1309 status = le32_to_cpu(tx_desc->status);
1310
1311 if (status & MWL8K_TXD_STATUS_FW_OWNED) {
1312 if (!force)
1313 break;
1314 tx_desc->status &=
1315 ~cpu_to_le32(MWL8K_TXD_STATUS_FW_OWNED);
1316 }
1317
1318 txq->head = (tx + 1) % MWL8K_TX_DESCS;
1319 BUG_ON(txq->len == 0);
1320 txq->len--;
1321 priv->pending_tx_pkts--;
1322
1323 addr = le32_to_cpu(tx_desc->pkt_phys_addr);
1324 size = le16_to_cpu(tx_desc->pkt_len);
1325 skb = txq->skb[tx];
1326 txq->skb[tx] = NULL;
1327
1328 BUG_ON(skb == NULL);
1329 pci_unmap_single(priv->pdev, addr, size, PCI_DMA_TODEVICE);
1330
1331 mwl8k_remove_dma_header(skb, tx_desc->qos_control);
1332
1333 /* Mark descriptor as unused */
1334 tx_desc->pkt_phys_addr = 0;
1335 tx_desc->pkt_len = 0;
1336
1337 info = IEEE80211_SKB_CB(skb);
1338 ieee80211_tx_info_clear_status(info);
1339 if (MWL8K_TXD_SUCCESS(status))
1340 info->flags |= IEEE80211_TX_STAT_ACK;
1341
1342 ieee80211_tx_status_irqsafe(hw, skb);
1343
1344 processed++;
1345 }
1346
1347 if (processed && priv->radio_on && !mutex_is_locked(&priv->fw_mutex))
1348 ieee80211_wake_queue(hw, index);
1349
1350 return processed;
1351 }
1352
1353 /* must be called only when the card's transmit is completely halted */
1354 static void mwl8k_txq_deinit(struct ieee80211_hw *hw, int index)
1355 {
1356 struct mwl8k_priv *priv = hw->priv;
1357 struct mwl8k_tx_queue *txq = priv->txq + index;
1358
1359 mwl8k_txq_reclaim(hw, index, INT_MAX, 1);
1360
1361 kfree(txq->skb);
1362 txq->skb = NULL;
1363
1364 pci_free_consistent(priv->pdev,
1365 MWL8K_TX_DESCS * sizeof(struct mwl8k_tx_desc),
1366 txq->txd, txq->txd_dma);
1367 txq->txd = NULL;
1368 }
1369
1370 static int
1371 mwl8k_txq_xmit(struct ieee80211_hw *hw, int index, struct sk_buff *skb)
1372 {
1373 struct mwl8k_priv *priv = hw->priv;
1374 struct ieee80211_tx_info *tx_info;
1375 struct mwl8k_vif *mwl8k_vif;
1376 struct ieee80211_hdr *wh;
1377 struct mwl8k_tx_queue *txq;
1378 struct mwl8k_tx_desc *tx;
1379 dma_addr_t dma;
1380 u32 txstatus;
1381 u8 txdatarate;
1382 u16 qos;
1383
1384 wh = (struct ieee80211_hdr *)skb->data;
1385 if (ieee80211_is_data_qos(wh->frame_control))
1386 qos = le16_to_cpu(*((__le16 *)ieee80211_get_qos_ctl(wh)));
1387 else
1388 qos = 0;
1389
1390 mwl8k_add_dma_header(skb);
1391 wh = &((struct mwl8k_dma_data *)skb->data)->wh;
1392
1393 tx_info = IEEE80211_SKB_CB(skb);
1394 mwl8k_vif = MWL8K_VIF(tx_info->control.vif);
1395
1396 if (tx_info->flags & IEEE80211_TX_CTL_ASSIGN_SEQ) {
1397 wh->seq_ctrl &= cpu_to_le16(IEEE80211_SCTL_FRAG);
1398 wh->seq_ctrl |= cpu_to_le16(mwl8k_vif->seqno);
1399 mwl8k_vif->seqno += 0x10;
1400 }
1401
1402 /* Setup firmware control bit fields for each frame type. */
1403 txstatus = 0;
1404 txdatarate = 0;
1405 if (ieee80211_is_mgmt(wh->frame_control) ||
1406 ieee80211_is_ctl(wh->frame_control)) {
1407 txdatarate = 0;
1408 qos |= MWL8K_QOS_QLEN_UNSPEC | MWL8K_QOS_EOSP;
1409 } else if (ieee80211_is_data(wh->frame_control)) {
1410 txdatarate = 1;
1411 if (is_multicast_ether_addr(wh->addr1))
1412 txstatus |= MWL8K_TXD_STATUS_MULTICAST_TX;
1413
1414 qos &= ~MWL8K_QOS_ACK_POLICY_MASK;
1415 if (tx_info->flags & IEEE80211_TX_CTL_AMPDU)
1416 qos |= MWL8K_QOS_ACK_POLICY_BLOCKACK;
1417 else
1418 qos |= MWL8K_QOS_ACK_POLICY_NORMAL;
1419 }
1420
1421 dma = pci_map_single(priv->pdev, skb->data,
1422 skb->len, PCI_DMA_TODEVICE);
1423
1424 if (pci_dma_mapping_error(priv->pdev, dma)) {
1425 printk(KERN_DEBUG "%s: failed to dma map skb, "
1426 "dropping TX frame.\n", wiphy_name(hw->wiphy));
1427 dev_kfree_skb(skb);
1428 return NETDEV_TX_OK;
1429 }
1430
1431 spin_lock_bh(&priv->tx_lock);
1432
1433 txq = priv->txq + index;
1434
1435 BUG_ON(txq->skb[txq->tail] != NULL);
1436 txq->skb[txq->tail] = skb;
1437
1438 tx = txq->txd + txq->tail;
1439 tx->data_rate = txdatarate;
1440 tx->tx_priority = index;
1441 tx->qos_control = cpu_to_le16(qos);
1442 tx->pkt_phys_addr = cpu_to_le32(dma);
1443 tx->pkt_len = cpu_to_le16(skb->len);
1444 tx->rate_info = 0;
1445 if (!priv->ap_fw && tx_info->control.sta != NULL)
1446 tx->peer_id = MWL8K_STA(tx_info->control.sta)->peer_id;
1447 else
1448 tx->peer_id = 0;
1449 wmb();
1450 tx->status = cpu_to_le32(MWL8K_TXD_STATUS_FW_OWNED | txstatus);
1451
1452 txq->len++;
1453 priv->pending_tx_pkts++;
1454
1455 txq->tail++;
1456 if (txq->tail == MWL8K_TX_DESCS)
1457 txq->tail = 0;
1458
1459 if (txq->head == txq->tail)
1460 ieee80211_stop_queue(hw, index);
1461
1462 mwl8k_tx_start(priv);
1463
1464 spin_unlock_bh(&priv->tx_lock);
1465
1466 return NETDEV_TX_OK;
1467 }
1468
1469
1470 /*
1471 * Firmware access.
1472 *
1473 * We have the following requirements for issuing firmware commands:
1474 * - Some commands require that the packet transmit path is idle when
1475 * the command is issued. (For simplicity, we'll just quiesce the
1476 * transmit path for every command.)
1477 * - There are certain sequences of commands that need to be issued to
1478 * the hardware sequentially, with no other intervening commands.
1479 *
1480 * This leads to an implementation of a "firmware lock" as a mutex that
1481 * can be taken recursively, and which is taken by both the low-level
1482 * command submission function (mwl8k_post_cmd) as well as any users of
1483 * that function that require issuing of an atomic sequence of commands,
1484 * and quiesces the transmit path whenever it's taken.
1485 */
1486 static int mwl8k_fw_lock(struct ieee80211_hw *hw)
1487 {
1488 struct mwl8k_priv *priv = hw->priv;
1489
1490 if (priv->fw_mutex_owner != current) {
1491 int rc;
1492
1493 mutex_lock(&priv->fw_mutex);
1494 ieee80211_stop_queues(hw);
1495
1496 rc = mwl8k_tx_wait_empty(hw);
1497 if (rc) {
1498 ieee80211_wake_queues(hw);
1499 mutex_unlock(&priv->fw_mutex);
1500
1501 return rc;
1502 }
1503
1504 priv->fw_mutex_owner = current;
1505 }
1506
1507 priv->fw_mutex_depth++;
1508
1509 return 0;
1510 }
1511
1512 static void mwl8k_fw_unlock(struct ieee80211_hw *hw)
1513 {
1514 struct mwl8k_priv *priv = hw->priv;
1515
1516 if (!--priv->fw_mutex_depth) {
1517 ieee80211_wake_queues(hw);
1518 priv->fw_mutex_owner = NULL;
1519 mutex_unlock(&priv->fw_mutex);
1520 }
1521 }
1522
1523
1524 /*
1525 * Command processing.
1526 */
1527
1528 /* Timeout firmware commands after 10s */
1529 #define MWL8K_CMD_TIMEOUT_MS 10000
1530
1531 static int mwl8k_post_cmd(struct ieee80211_hw *hw, struct mwl8k_cmd_pkt *cmd)
1532 {
1533 DECLARE_COMPLETION_ONSTACK(cmd_wait);
1534 struct mwl8k_priv *priv = hw->priv;
1535 void __iomem *regs = priv->regs;
1536 dma_addr_t dma_addr;
1537 unsigned int dma_size;
1538 int rc;
1539 unsigned long timeout = 0;
1540 u8 buf[32];
1541
1542 cmd->result = 0xffff;
1543 dma_size = le16_to_cpu(cmd->length);
1544 dma_addr = pci_map_single(priv->pdev, cmd, dma_size,
1545 PCI_DMA_BIDIRECTIONAL);
1546 if (pci_dma_mapping_error(priv->pdev, dma_addr))
1547 return -ENOMEM;
1548
1549 rc = mwl8k_fw_lock(hw);
1550 if (rc) {
1551 pci_unmap_single(priv->pdev, dma_addr, dma_size,
1552 PCI_DMA_BIDIRECTIONAL);
1553 return rc;
1554 }
1555
1556 priv->hostcmd_wait = &cmd_wait;
1557 iowrite32(dma_addr, regs + MWL8K_HIU_GEN_PTR);
1558 iowrite32(MWL8K_H2A_INT_DOORBELL,
1559 regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
1560 iowrite32(MWL8K_H2A_INT_DUMMY,
1561 regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
1562
1563 timeout = wait_for_completion_timeout(&cmd_wait,
1564 msecs_to_jiffies(MWL8K_CMD_TIMEOUT_MS));
1565
1566 priv->hostcmd_wait = NULL;
1567
1568 mwl8k_fw_unlock(hw);
1569
1570 pci_unmap_single(priv->pdev, dma_addr, dma_size,
1571 PCI_DMA_BIDIRECTIONAL);
1572
1573 if (!timeout) {
1574 printk(KERN_ERR "%s: Command %s timeout after %u ms\n",
1575 wiphy_name(hw->wiphy),
1576 mwl8k_cmd_name(cmd->code, buf, sizeof(buf)),
1577 MWL8K_CMD_TIMEOUT_MS);
1578 rc = -ETIMEDOUT;
1579 } else {
1580 int ms;
1581
1582 ms = MWL8K_CMD_TIMEOUT_MS - jiffies_to_msecs(timeout);
1583
1584 rc = cmd->result ? -EINVAL : 0;
1585 if (rc)
1586 printk(KERN_ERR "%s: Command %s error 0x%x\n",
1587 wiphy_name(hw->wiphy),
1588 mwl8k_cmd_name(cmd->code, buf, sizeof(buf)),
1589 le16_to_cpu(cmd->result));
1590 else if (ms > 2000)
1591 printk(KERN_NOTICE "%s: Command %s took %d ms\n",
1592 wiphy_name(hw->wiphy),
1593 mwl8k_cmd_name(cmd->code, buf, sizeof(buf)),
1594 ms);
1595 }
1596
1597 return rc;
1598 }
1599
1600 static int mwl8k_post_pervif_cmd(struct ieee80211_hw *hw,
1601 struct ieee80211_vif *vif,
1602 struct mwl8k_cmd_pkt *cmd)
1603 {
1604 if (vif != NULL)
1605 cmd->macid = MWL8K_VIF(vif)->macid;
1606 return mwl8k_post_cmd(hw, cmd);
1607 }
1608
1609 /*
1610 * Setup code shared between STA and AP firmware images.
1611 */
1612 static void mwl8k_setup_2ghz_band(struct ieee80211_hw *hw)
1613 {
1614 struct mwl8k_priv *priv = hw->priv;
1615
1616 BUILD_BUG_ON(sizeof(priv->channels_24) != sizeof(mwl8k_channels_24));
1617 memcpy(priv->channels_24, mwl8k_channels_24, sizeof(mwl8k_channels_24));
1618
1619 BUILD_BUG_ON(sizeof(priv->rates_24) != sizeof(mwl8k_rates_24));
1620 memcpy(priv->rates_24, mwl8k_rates_24, sizeof(mwl8k_rates_24));
1621
1622 priv->band_24.band = IEEE80211_BAND_2GHZ;
1623 priv->band_24.channels = priv->channels_24;
1624 priv->band_24.n_channels = ARRAY_SIZE(mwl8k_channels_24);
1625 priv->band_24.bitrates = priv->rates_24;
1626 priv->band_24.n_bitrates = ARRAY_SIZE(mwl8k_rates_24);
1627
1628 hw->wiphy->bands[IEEE80211_BAND_2GHZ] = &priv->band_24;
1629 }
1630
1631 static void mwl8k_setup_5ghz_band(struct ieee80211_hw *hw)
1632 {
1633 struct mwl8k_priv *priv = hw->priv;
1634
1635 BUILD_BUG_ON(sizeof(priv->channels_50) != sizeof(mwl8k_channels_50));
1636 memcpy(priv->channels_50, mwl8k_channels_50, sizeof(mwl8k_channels_50));
1637
1638 BUILD_BUG_ON(sizeof(priv->rates_50) != sizeof(mwl8k_rates_50));
1639 memcpy(priv->rates_50, mwl8k_rates_50, sizeof(mwl8k_rates_50));
1640
1641 priv->band_50.band = IEEE80211_BAND_5GHZ;
1642 priv->band_50.channels = priv->channels_50;
1643 priv->band_50.n_channels = ARRAY_SIZE(mwl8k_channels_50);
1644 priv->band_50.bitrates = priv->rates_50;
1645 priv->band_50.n_bitrates = ARRAY_SIZE(mwl8k_rates_50);
1646
1647 hw->wiphy->bands[IEEE80211_BAND_5GHZ] = &priv->band_50;
1648 }
1649
1650 /*
1651 * CMD_GET_HW_SPEC (STA version).
1652 */
1653 struct mwl8k_cmd_get_hw_spec_sta {
1654 struct mwl8k_cmd_pkt header;
1655 __u8 hw_rev;
1656 __u8 host_interface;
1657 __le16 num_mcaddrs;
1658 __u8 perm_addr[ETH_ALEN];
1659 __le16 region_code;
1660 __le32 fw_rev;
1661 __le32 ps_cookie;
1662 __le32 caps;
1663 __u8 mcs_bitmap[16];
1664 __le32 rx_queue_ptr;
1665 __le32 num_tx_queues;
1666 __le32 tx_queue_ptrs[MWL8K_TX_QUEUES];
1667 __le32 caps2;
1668 __le32 num_tx_desc_per_queue;
1669 __le32 total_rxd;
1670 } __attribute__((packed));
1671
1672 #define MWL8K_CAP_MAX_AMSDU 0x20000000
1673 #define MWL8K_CAP_GREENFIELD 0x08000000
1674 #define MWL8K_CAP_AMPDU 0x04000000
1675 #define MWL8K_CAP_RX_STBC 0x01000000
1676 #define MWL8K_CAP_TX_STBC 0x00800000
1677 #define MWL8K_CAP_SHORTGI_40MHZ 0x00400000
1678 #define MWL8K_CAP_SHORTGI_20MHZ 0x00200000
1679 #define MWL8K_CAP_RX_ANTENNA_MASK 0x000e0000
1680 #define MWL8K_CAP_TX_ANTENNA_MASK 0x0001c000
1681 #define MWL8K_CAP_DELAY_BA 0x00003000
1682 #define MWL8K_CAP_MIMO 0x00000200
1683 #define MWL8K_CAP_40MHZ 0x00000100
1684 #define MWL8K_CAP_BAND_MASK 0x00000007
1685 #define MWL8K_CAP_5GHZ 0x00000004
1686 #define MWL8K_CAP_2GHZ4 0x00000001
1687
1688 static void
1689 mwl8k_set_ht_caps(struct ieee80211_hw *hw,
1690 struct ieee80211_supported_band *band, u32 cap)
1691 {
1692 int rx_streams;
1693 int tx_streams;
1694
1695 band->ht_cap.ht_supported = 1;
1696
1697 if (cap & MWL8K_CAP_MAX_AMSDU)
1698 band->ht_cap.cap |= IEEE80211_HT_CAP_MAX_AMSDU;
1699 if (cap & MWL8K_CAP_GREENFIELD)
1700 band->ht_cap.cap |= IEEE80211_HT_CAP_GRN_FLD;
1701 if (cap & MWL8K_CAP_AMPDU) {
1702 hw->flags |= IEEE80211_HW_AMPDU_AGGREGATION;
1703 band->ht_cap.ampdu_factor = IEEE80211_HT_MAX_AMPDU_64K;
1704 band->ht_cap.ampdu_density = IEEE80211_HT_MPDU_DENSITY_NONE;
1705 }
1706 if (cap & MWL8K_CAP_RX_STBC)
1707 band->ht_cap.cap |= IEEE80211_HT_CAP_RX_STBC;
1708 if (cap & MWL8K_CAP_TX_STBC)
1709 band->ht_cap.cap |= IEEE80211_HT_CAP_TX_STBC;
1710 if (cap & MWL8K_CAP_SHORTGI_40MHZ)
1711 band->ht_cap.cap |= IEEE80211_HT_CAP_SGI_40;
1712 if (cap & MWL8K_CAP_SHORTGI_20MHZ)
1713 band->ht_cap.cap |= IEEE80211_HT_CAP_SGI_20;
1714 if (cap & MWL8K_CAP_DELAY_BA)
1715 band->ht_cap.cap |= IEEE80211_HT_CAP_DELAY_BA;
1716 if (cap & MWL8K_CAP_40MHZ)
1717 band->ht_cap.cap |= IEEE80211_HT_CAP_SUP_WIDTH_20_40;
1718
1719 rx_streams = hweight32(cap & MWL8K_CAP_RX_ANTENNA_MASK);
1720 tx_streams = hweight32(cap & MWL8K_CAP_TX_ANTENNA_MASK);
1721
1722 band->ht_cap.mcs.rx_mask[0] = 0xff;
1723 if (rx_streams >= 2)
1724 band->ht_cap.mcs.rx_mask[1] = 0xff;
1725 if (rx_streams >= 3)
1726 band->ht_cap.mcs.rx_mask[2] = 0xff;
1727 band->ht_cap.mcs.rx_mask[4] = 0x01;
1728 band->ht_cap.mcs.tx_params = IEEE80211_HT_MCS_TX_DEFINED;
1729
1730 if (rx_streams != tx_streams) {
1731 band->ht_cap.mcs.tx_params |= IEEE80211_HT_MCS_TX_RX_DIFF;
1732 band->ht_cap.mcs.tx_params |= (tx_streams - 1) <<
1733 IEEE80211_HT_MCS_TX_MAX_STREAMS_SHIFT;
1734 }
1735 }
1736
1737 static void
1738 mwl8k_set_caps(struct ieee80211_hw *hw, u32 caps)
1739 {
1740 struct mwl8k_priv *priv = hw->priv;
1741
1742 if ((caps & MWL8K_CAP_2GHZ4) || !(caps & MWL8K_CAP_BAND_MASK)) {
1743 mwl8k_setup_2ghz_band(hw);
1744 if (caps & MWL8K_CAP_MIMO)
1745 mwl8k_set_ht_caps(hw, &priv->band_24, caps);
1746 }
1747
1748 if (caps & MWL8K_CAP_5GHZ) {
1749 mwl8k_setup_5ghz_band(hw);
1750 if (caps & MWL8K_CAP_MIMO)
1751 mwl8k_set_ht_caps(hw, &priv->band_50, caps);
1752 }
1753 }
1754
1755 static int mwl8k_cmd_get_hw_spec_sta(struct ieee80211_hw *hw)
1756 {
1757 struct mwl8k_priv *priv = hw->priv;
1758 struct mwl8k_cmd_get_hw_spec_sta *cmd;
1759 int rc;
1760 int i;
1761
1762 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
1763 if (cmd == NULL)
1764 return -ENOMEM;
1765
1766 cmd->header.code = cpu_to_le16(MWL8K_CMD_GET_HW_SPEC);
1767 cmd->header.length = cpu_to_le16(sizeof(*cmd));
1768
1769 memset(cmd->perm_addr, 0xff, sizeof(cmd->perm_addr));
1770 cmd->ps_cookie = cpu_to_le32(priv->cookie_dma);
1771 cmd->rx_queue_ptr = cpu_to_le32(priv->rxq[0].rxd_dma);
1772 cmd->num_tx_queues = cpu_to_le32(MWL8K_TX_QUEUES);
1773 for (i = 0; i < MWL8K_TX_QUEUES; i++)
1774 cmd->tx_queue_ptrs[i] = cpu_to_le32(priv->txq[i].txd_dma);
1775 cmd->num_tx_desc_per_queue = cpu_to_le32(MWL8K_TX_DESCS);
1776 cmd->total_rxd = cpu_to_le32(MWL8K_RX_DESCS);
1777
1778 rc = mwl8k_post_cmd(hw, &cmd->header);
1779
1780 if (!rc) {
1781 SET_IEEE80211_PERM_ADDR(hw, cmd->perm_addr);
1782 priv->num_mcaddrs = le16_to_cpu(cmd->num_mcaddrs);
1783 priv->fw_rev = le32_to_cpu(cmd->fw_rev);
1784 priv->hw_rev = cmd->hw_rev;
1785 mwl8k_set_caps(hw, le32_to_cpu(cmd->caps));
1786 priv->ap_macids_supported = 0x00000000;
1787 priv->sta_macids_supported = 0x00000001;
1788 }
1789
1790 kfree(cmd);
1791 return rc;
1792 }
1793
1794 /*
1795 * CMD_GET_HW_SPEC (AP version).
1796 */
1797 struct mwl8k_cmd_get_hw_spec_ap {
1798 struct mwl8k_cmd_pkt header;
1799 __u8 hw_rev;
1800 __u8 host_interface;
1801 __le16 num_wcb;
1802 __le16 num_mcaddrs;
1803 __u8 perm_addr[ETH_ALEN];
1804 __le16 region_code;
1805 __le16 num_antenna;
1806 __le32 fw_rev;
1807 __le32 wcbbase0;
1808 __le32 rxwrptr;
1809 __le32 rxrdptr;
1810 __le32 ps_cookie;
1811 __le32 wcbbase1;
1812 __le32 wcbbase2;
1813 __le32 wcbbase3;
1814 } __attribute__((packed));
1815
1816 static int mwl8k_cmd_get_hw_spec_ap(struct ieee80211_hw *hw)
1817 {
1818 struct mwl8k_priv *priv = hw->priv;
1819 struct mwl8k_cmd_get_hw_spec_ap *cmd;
1820 int rc;
1821
1822 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
1823 if (cmd == NULL)
1824 return -ENOMEM;
1825
1826 cmd->header.code = cpu_to_le16(MWL8K_CMD_GET_HW_SPEC);
1827 cmd->header.length = cpu_to_le16(sizeof(*cmd));
1828
1829 memset(cmd->perm_addr, 0xff, sizeof(cmd->perm_addr));
1830 cmd->ps_cookie = cpu_to_le32(priv->cookie_dma);
1831
1832 rc = mwl8k_post_cmd(hw, &cmd->header);
1833
1834 if (!rc) {
1835 int off;
1836
1837 SET_IEEE80211_PERM_ADDR(hw, cmd->perm_addr);
1838 priv->num_mcaddrs = le16_to_cpu(cmd->num_mcaddrs);
1839 priv->fw_rev = le32_to_cpu(cmd->fw_rev);
1840 priv->hw_rev = cmd->hw_rev;
1841 mwl8k_setup_2ghz_band(hw);
1842 priv->ap_macids_supported = 0x000000ff;
1843 priv->sta_macids_supported = 0x00000000;
1844
1845 off = le32_to_cpu(cmd->wcbbase0) & 0xffff;
1846 iowrite32(cpu_to_le32(priv->txq[0].txd_dma), priv->sram + off);
1847
1848 off = le32_to_cpu(cmd->rxwrptr) & 0xffff;
1849 iowrite32(cpu_to_le32(priv->rxq[0].rxd_dma), priv->sram + off);
1850
1851 off = le32_to_cpu(cmd->rxrdptr) & 0xffff;
1852 iowrite32(cpu_to_le32(priv->rxq[0].rxd_dma), priv->sram + off);
1853
1854 off = le32_to_cpu(cmd->wcbbase1) & 0xffff;
1855 iowrite32(cpu_to_le32(priv->txq[1].txd_dma), priv->sram + off);
1856
1857 off = le32_to_cpu(cmd->wcbbase2) & 0xffff;
1858 iowrite32(cpu_to_le32(priv->txq[2].txd_dma), priv->sram + off);
1859
1860 off = le32_to_cpu(cmd->wcbbase3) & 0xffff;
1861 iowrite32(cpu_to_le32(priv->txq[3].txd_dma), priv->sram + off);
1862 }
1863
1864 kfree(cmd);
1865 return rc;
1866 }
1867
1868 /*
1869 * CMD_SET_HW_SPEC.
1870 */
1871 struct mwl8k_cmd_set_hw_spec {
1872 struct mwl8k_cmd_pkt header;
1873 __u8 hw_rev;
1874 __u8 host_interface;
1875 __le16 num_mcaddrs;
1876 __u8 perm_addr[ETH_ALEN];
1877 __le16 region_code;
1878 __le32 fw_rev;
1879 __le32 ps_cookie;
1880 __le32 caps;
1881 __le32 rx_queue_ptr;
1882 __le32 num_tx_queues;
1883 __le32 tx_queue_ptrs[MWL8K_TX_QUEUES];
1884 __le32 flags;
1885 __le32 num_tx_desc_per_queue;
1886 __le32 total_rxd;
1887 } __attribute__((packed));
1888
1889 #define MWL8K_SET_HW_SPEC_FLAG_HOST_DECR_MGMT 0x00000080
1890 #define MWL8K_SET_HW_SPEC_FLAG_HOSTFORM_PROBERESP 0x00000020
1891 #define MWL8K_SET_HW_SPEC_FLAG_HOSTFORM_BEACON 0x00000010
1892
1893 static int mwl8k_cmd_set_hw_spec(struct ieee80211_hw *hw)
1894 {
1895 struct mwl8k_priv *priv = hw->priv;
1896 struct mwl8k_cmd_set_hw_spec *cmd;
1897 int rc;
1898 int i;
1899
1900 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
1901 if (cmd == NULL)
1902 return -ENOMEM;
1903
1904 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_HW_SPEC);
1905 cmd->header.length = cpu_to_le16(sizeof(*cmd));
1906
1907 cmd->ps_cookie = cpu_to_le32(priv->cookie_dma);
1908 cmd->rx_queue_ptr = cpu_to_le32(priv->rxq[0].rxd_dma);
1909 cmd->num_tx_queues = cpu_to_le32(MWL8K_TX_QUEUES);
1910 for (i = 0; i < MWL8K_TX_QUEUES; i++)
1911 cmd->tx_queue_ptrs[i] = cpu_to_le32(priv->txq[i].txd_dma);
1912 cmd->flags = cpu_to_le32(MWL8K_SET_HW_SPEC_FLAG_HOST_DECR_MGMT |
1913 MWL8K_SET_HW_SPEC_FLAG_HOSTFORM_PROBERESP |
1914 MWL8K_SET_HW_SPEC_FLAG_HOSTFORM_BEACON);
1915 cmd->num_tx_desc_per_queue = cpu_to_le32(MWL8K_TX_DESCS);
1916 cmd->total_rxd = cpu_to_le32(MWL8K_RX_DESCS);
1917
1918 rc = mwl8k_post_cmd(hw, &cmd->header);
1919 kfree(cmd);
1920
1921 return rc;
1922 }
1923
1924 /*
1925 * CMD_MAC_MULTICAST_ADR.
1926 */
1927 struct mwl8k_cmd_mac_multicast_adr {
1928 struct mwl8k_cmd_pkt header;
1929 __le16 action;
1930 __le16 numaddr;
1931 __u8 addr[0][ETH_ALEN];
1932 };
1933
1934 #define MWL8K_ENABLE_RX_DIRECTED 0x0001
1935 #define MWL8K_ENABLE_RX_MULTICAST 0x0002
1936 #define MWL8K_ENABLE_RX_ALL_MULTICAST 0x0004
1937 #define MWL8K_ENABLE_RX_BROADCAST 0x0008
1938
1939 static struct mwl8k_cmd_pkt *
1940 __mwl8k_cmd_mac_multicast_adr(struct ieee80211_hw *hw, int allmulti,
1941 int mc_count, struct dev_addr_list *mclist)
1942 {
1943 struct mwl8k_priv *priv = hw->priv;
1944 struct mwl8k_cmd_mac_multicast_adr *cmd;
1945 int size;
1946
1947 if (allmulti || mc_count > priv->num_mcaddrs) {
1948 allmulti = 1;
1949 mc_count = 0;
1950 }
1951
1952 size = sizeof(*cmd) + mc_count * ETH_ALEN;
1953
1954 cmd = kzalloc(size, GFP_ATOMIC);
1955 if (cmd == NULL)
1956 return NULL;
1957
1958 cmd->header.code = cpu_to_le16(MWL8K_CMD_MAC_MULTICAST_ADR);
1959 cmd->header.length = cpu_to_le16(size);
1960 cmd->action = cpu_to_le16(MWL8K_ENABLE_RX_DIRECTED |
1961 MWL8K_ENABLE_RX_BROADCAST);
1962
1963 if (allmulti) {
1964 cmd->action |= cpu_to_le16(MWL8K_ENABLE_RX_ALL_MULTICAST);
1965 } else if (mc_count) {
1966 int i;
1967
1968 cmd->action |= cpu_to_le16(MWL8K_ENABLE_RX_MULTICAST);
1969 cmd->numaddr = cpu_to_le16(mc_count);
1970 for (i = 0; i < mc_count && mclist; i++) {
1971 if (mclist->da_addrlen != ETH_ALEN) {
1972 kfree(cmd);
1973 return NULL;
1974 }
1975 memcpy(cmd->addr[i], mclist->da_addr, ETH_ALEN);
1976 mclist = mclist->next;
1977 }
1978 }
1979
1980 return &cmd->header;
1981 }
1982
1983 /*
1984 * CMD_GET_STAT.
1985 */
1986 struct mwl8k_cmd_get_stat {
1987 struct mwl8k_cmd_pkt header;
1988 __le32 stats[64];
1989 } __attribute__((packed));
1990
1991 #define MWL8K_STAT_ACK_FAILURE 9
1992 #define MWL8K_STAT_RTS_FAILURE 12
1993 #define MWL8K_STAT_FCS_ERROR 24
1994 #define MWL8K_STAT_RTS_SUCCESS 11
1995
1996 static int mwl8k_cmd_get_stat(struct ieee80211_hw *hw,
1997 struct ieee80211_low_level_stats *stats)
1998 {
1999 struct mwl8k_cmd_get_stat *cmd;
2000 int rc;
2001
2002 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2003 if (cmd == NULL)
2004 return -ENOMEM;
2005
2006 cmd->header.code = cpu_to_le16(MWL8K_CMD_GET_STAT);
2007 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2008
2009 rc = mwl8k_post_cmd(hw, &cmd->header);
2010 if (!rc) {
2011 stats->dot11ACKFailureCount =
2012 le32_to_cpu(cmd->stats[MWL8K_STAT_ACK_FAILURE]);
2013 stats->dot11RTSFailureCount =
2014 le32_to_cpu(cmd->stats[MWL8K_STAT_RTS_FAILURE]);
2015 stats->dot11FCSErrorCount =
2016 le32_to_cpu(cmd->stats[MWL8K_STAT_FCS_ERROR]);
2017 stats->dot11RTSSuccessCount =
2018 le32_to_cpu(cmd->stats[MWL8K_STAT_RTS_SUCCESS]);
2019 }
2020 kfree(cmd);
2021
2022 return rc;
2023 }
2024
2025 /*
2026 * CMD_RADIO_CONTROL.
2027 */
2028 struct mwl8k_cmd_radio_control {
2029 struct mwl8k_cmd_pkt header;
2030 __le16 action;
2031 __le16 control;
2032 __le16 radio_on;
2033 } __attribute__((packed));
2034
2035 static int
2036 mwl8k_cmd_radio_control(struct ieee80211_hw *hw, bool enable, bool force)
2037 {
2038 struct mwl8k_priv *priv = hw->priv;
2039 struct mwl8k_cmd_radio_control *cmd;
2040 int rc;
2041
2042 if (enable == priv->radio_on && !force)
2043 return 0;
2044
2045 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2046 if (cmd == NULL)
2047 return -ENOMEM;
2048
2049 cmd->header.code = cpu_to_le16(MWL8K_CMD_RADIO_CONTROL);
2050 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2051 cmd->action = cpu_to_le16(MWL8K_CMD_SET);
2052 cmd->control = cpu_to_le16(priv->radio_short_preamble ? 3 : 1);
2053 cmd->radio_on = cpu_to_le16(enable ? 0x0001 : 0x0000);
2054
2055 rc = mwl8k_post_cmd(hw, &cmd->header);
2056 kfree(cmd);
2057
2058 if (!rc)
2059 priv->radio_on = enable;
2060
2061 return rc;
2062 }
2063
2064 static int mwl8k_cmd_radio_disable(struct ieee80211_hw *hw)
2065 {
2066 return mwl8k_cmd_radio_control(hw, 0, 0);
2067 }
2068
2069 static int mwl8k_cmd_radio_enable(struct ieee80211_hw *hw)
2070 {
2071 return mwl8k_cmd_radio_control(hw, 1, 0);
2072 }
2073
2074 static int
2075 mwl8k_set_radio_preamble(struct ieee80211_hw *hw, bool short_preamble)
2076 {
2077 struct mwl8k_priv *priv = hw->priv;
2078
2079 priv->radio_short_preamble = short_preamble;
2080
2081 return mwl8k_cmd_radio_control(hw, 1, 1);
2082 }
2083
2084 /*
2085 * CMD_RF_TX_POWER.
2086 */
2087 #define MWL8K_TX_POWER_LEVEL_TOTAL 8
2088
2089 struct mwl8k_cmd_rf_tx_power {
2090 struct mwl8k_cmd_pkt header;
2091 __le16 action;
2092 __le16 support_level;
2093 __le16 current_level;
2094 __le16 reserved;
2095 __le16 power_level_list[MWL8K_TX_POWER_LEVEL_TOTAL];
2096 } __attribute__((packed));
2097
2098 static int mwl8k_cmd_rf_tx_power(struct ieee80211_hw *hw, int dBm)
2099 {
2100 struct mwl8k_cmd_rf_tx_power *cmd;
2101 int rc;
2102
2103 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2104 if (cmd == NULL)
2105 return -ENOMEM;
2106
2107 cmd->header.code = cpu_to_le16(MWL8K_CMD_RF_TX_POWER);
2108 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2109 cmd->action = cpu_to_le16(MWL8K_CMD_SET);
2110 cmd->support_level = cpu_to_le16(dBm);
2111
2112 rc = mwl8k_post_cmd(hw, &cmd->header);
2113 kfree(cmd);
2114
2115 return rc;
2116 }
2117
2118 /*
2119 * CMD_RF_ANTENNA.
2120 */
2121 struct mwl8k_cmd_rf_antenna {
2122 struct mwl8k_cmd_pkt header;
2123 __le16 antenna;
2124 __le16 mode;
2125 } __attribute__((packed));
2126
2127 #define MWL8K_RF_ANTENNA_RX 1
2128 #define MWL8K_RF_ANTENNA_TX 2
2129
2130 static int
2131 mwl8k_cmd_rf_antenna(struct ieee80211_hw *hw, int antenna, int mask)
2132 {
2133 struct mwl8k_cmd_rf_antenna *cmd;
2134 int rc;
2135
2136 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2137 if (cmd == NULL)
2138 return -ENOMEM;
2139
2140 cmd->header.code = cpu_to_le16(MWL8K_CMD_RF_ANTENNA);
2141 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2142 cmd->antenna = cpu_to_le16(antenna);
2143 cmd->mode = cpu_to_le16(mask);
2144
2145 rc = mwl8k_post_cmd(hw, &cmd->header);
2146 kfree(cmd);
2147
2148 return rc;
2149 }
2150
2151 /*
2152 * CMD_SET_BEACON.
2153 */
2154 struct mwl8k_cmd_set_beacon {
2155 struct mwl8k_cmd_pkt header;
2156 __le16 beacon_len;
2157 __u8 beacon[0];
2158 };
2159
2160 static int mwl8k_cmd_set_beacon(struct ieee80211_hw *hw,
2161 struct ieee80211_vif *vif, u8 *beacon, int len)
2162 {
2163 struct mwl8k_cmd_set_beacon *cmd;
2164 int rc;
2165
2166 cmd = kzalloc(sizeof(*cmd) + len, GFP_KERNEL);
2167 if (cmd == NULL)
2168 return -ENOMEM;
2169
2170 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_BEACON);
2171 cmd->header.length = cpu_to_le16(sizeof(*cmd) + len);
2172 cmd->beacon_len = cpu_to_le16(len);
2173 memcpy(cmd->beacon, beacon, len);
2174
2175 rc = mwl8k_post_pervif_cmd(hw, vif, &cmd->header);
2176 kfree(cmd);
2177
2178 return rc;
2179 }
2180
2181 /*
2182 * CMD_SET_PRE_SCAN.
2183 */
2184 struct mwl8k_cmd_set_pre_scan {
2185 struct mwl8k_cmd_pkt header;
2186 } __attribute__((packed));
2187
2188 static int mwl8k_cmd_set_pre_scan(struct ieee80211_hw *hw)
2189 {
2190 struct mwl8k_cmd_set_pre_scan *cmd;
2191 int rc;
2192
2193 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2194 if (cmd == NULL)
2195 return -ENOMEM;
2196
2197 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_PRE_SCAN);
2198 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2199
2200 rc = mwl8k_post_cmd(hw, &cmd->header);
2201 kfree(cmd);
2202
2203 return rc;
2204 }
2205
2206 /*
2207 * CMD_SET_POST_SCAN.
2208 */
2209 struct mwl8k_cmd_set_post_scan {
2210 struct mwl8k_cmd_pkt header;
2211 __le32 isibss;
2212 __u8 bssid[ETH_ALEN];
2213 } __attribute__((packed));
2214
2215 static int
2216 mwl8k_cmd_set_post_scan(struct ieee80211_hw *hw, const __u8 *mac)
2217 {
2218 struct mwl8k_cmd_set_post_scan *cmd;
2219 int rc;
2220
2221 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2222 if (cmd == NULL)
2223 return -ENOMEM;
2224
2225 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_POST_SCAN);
2226 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2227 cmd->isibss = 0;
2228 memcpy(cmd->bssid, mac, ETH_ALEN);
2229
2230 rc = mwl8k_post_cmd(hw, &cmd->header);
2231 kfree(cmd);
2232
2233 return rc;
2234 }
2235
2236 /*
2237 * CMD_SET_RF_CHANNEL.
2238 */
2239 struct mwl8k_cmd_set_rf_channel {
2240 struct mwl8k_cmd_pkt header;
2241 __le16 action;
2242 __u8 current_channel;
2243 __le32 channel_flags;
2244 } __attribute__((packed));
2245
2246 static int mwl8k_cmd_set_rf_channel(struct ieee80211_hw *hw,
2247 struct ieee80211_conf *conf)
2248 {
2249 struct ieee80211_channel *channel = conf->channel;
2250 struct mwl8k_cmd_set_rf_channel *cmd;
2251 int rc;
2252
2253 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2254 if (cmd == NULL)
2255 return -ENOMEM;
2256
2257 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_RF_CHANNEL);
2258 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2259 cmd->action = cpu_to_le16(MWL8K_CMD_SET);
2260 cmd->current_channel = channel->hw_value;
2261
2262 if (channel->band == IEEE80211_BAND_2GHZ)
2263 cmd->channel_flags |= cpu_to_le32(0x00000001);
2264 else if (channel->band == IEEE80211_BAND_5GHZ)
2265 cmd->channel_flags |= cpu_to_le32(0x00000004);
2266
2267 if (conf->channel_type == NL80211_CHAN_NO_HT ||
2268 conf->channel_type == NL80211_CHAN_HT20)
2269 cmd->channel_flags |= cpu_to_le32(0x00000080);
2270 else if (conf->channel_type == NL80211_CHAN_HT40MINUS)
2271 cmd->channel_flags |= cpu_to_le32(0x000001900);
2272 else if (conf->channel_type == NL80211_CHAN_HT40PLUS)
2273 cmd->channel_flags |= cpu_to_le32(0x000000900);
2274
2275 rc = mwl8k_post_cmd(hw, &cmd->header);
2276 kfree(cmd);
2277
2278 return rc;
2279 }
2280
2281 /*
2282 * CMD_SET_AID.
2283 */
2284 #define MWL8K_FRAME_PROT_DISABLED 0x00
2285 #define MWL8K_FRAME_PROT_11G 0x07
2286 #define MWL8K_FRAME_PROT_11N_HT_40MHZ_ONLY 0x02
2287 #define MWL8K_FRAME_PROT_11N_HT_ALL 0x06
2288
2289 struct mwl8k_cmd_update_set_aid {
2290 struct mwl8k_cmd_pkt header;
2291 __le16 aid;
2292
2293 /* AP's MAC address (BSSID) */
2294 __u8 bssid[ETH_ALEN];
2295 __le16 protection_mode;
2296 __u8 supp_rates[14];
2297 } __attribute__((packed));
2298
2299 static void legacy_rate_mask_to_array(u8 *rates, u32 mask)
2300 {
2301 int i;
2302 int j;
2303
2304 /*
2305 * Clear nonstandard rates 4 and 13.
2306 */
2307 mask &= 0x1fef;
2308
2309 for (i = 0, j = 0; i < 14; i++) {
2310 if (mask & (1 << i))
2311 rates[j++] = mwl8k_rates_24[i].hw_value;
2312 }
2313 }
2314
2315 static int
2316 mwl8k_cmd_set_aid(struct ieee80211_hw *hw,
2317 struct ieee80211_vif *vif, u32 legacy_rate_mask)
2318 {
2319 struct mwl8k_cmd_update_set_aid *cmd;
2320 u16 prot_mode;
2321 int rc;
2322
2323 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2324 if (cmd == NULL)
2325 return -ENOMEM;
2326
2327 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_AID);
2328 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2329 cmd->aid = cpu_to_le16(vif->bss_conf.aid);
2330 memcpy(cmd->bssid, vif->bss_conf.bssid, ETH_ALEN);
2331
2332 if (vif->bss_conf.use_cts_prot) {
2333 prot_mode = MWL8K_FRAME_PROT_11G;
2334 } else {
2335 switch (vif->bss_conf.ht_operation_mode &
2336 IEEE80211_HT_OP_MODE_PROTECTION) {
2337 case IEEE80211_HT_OP_MODE_PROTECTION_20MHZ:
2338 prot_mode = MWL8K_FRAME_PROT_11N_HT_40MHZ_ONLY;
2339 break;
2340 case IEEE80211_HT_OP_MODE_PROTECTION_NONHT_MIXED:
2341 prot_mode = MWL8K_FRAME_PROT_11N_HT_ALL;
2342 break;
2343 default:
2344 prot_mode = MWL8K_FRAME_PROT_DISABLED;
2345 break;
2346 }
2347 }
2348 cmd->protection_mode = cpu_to_le16(prot_mode);
2349
2350 legacy_rate_mask_to_array(cmd->supp_rates, legacy_rate_mask);
2351
2352 rc = mwl8k_post_cmd(hw, &cmd->header);
2353 kfree(cmd);
2354
2355 return rc;
2356 }
2357
2358 /*
2359 * CMD_SET_RATE.
2360 */
2361 struct mwl8k_cmd_set_rate {
2362 struct mwl8k_cmd_pkt header;
2363 __u8 legacy_rates[14];
2364
2365 /* Bitmap for supported MCS codes. */
2366 __u8 mcs_set[16];
2367 __u8 reserved[16];
2368 } __attribute__((packed));
2369
2370 static int
2371 mwl8k_cmd_set_rate(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
2372 u32 legacy_rate_mask, u8 *mcs_rates)
2373 {
2374 struct mwl8k_cmd_set_rate *cmd;
2375 int rc;
2376
2377 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2378 if (cmd == NULL)
2379 return -ENOMEM;
2380
2381 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_RATE);
2382 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2383 legacy_rate_mask_to_array(cmd->legacy_rates, legacy_rate_mask);
2384 memcpy(cmd->mcs_set, mcs_rates, 16);
2385
2386 rc = mwl8k_post_cmd(hw, &cmd->header);
2387 kfree(cmd);
2388
2389 return rc;
2390 }
2391
2392 /*
2393 * CMD_FINALIZE_JOIN.
2394 */
2395 #define MWL8K_FJ_BEACON_MAXLEN 128
2396
2397 struct mwl8k_cmd_finalize_join {
2398 struct mwl8k_cmd_pkt header;
2399 __le32 sleep_interval; /* Number of beacon periods to sleep */
2400 __u8 beacon_data[MWL8K_FJ_BEACON_MAXLEN];
2401 } __attribute__((packed));
2402
2403 static int mwl8k_cmd_finalize_join(struct ieee80211_hw *hw, void *frame,
2404 int framelen, int dtim)
2405 {
2406 struct mwl8k_cmd_finalize_join *cmd;
2407 struct ieee80211_mgmt *payload = frame;
2408 int payload_len;
2409 int rc;
2410
2411 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2412 if (cmd == NULL)
2413 return -ENOMEM;
2414
2415 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_FINALIZE_JOIN);
2416 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2417 cmd->sleep_interval = cpu_to_le32(dtim ? dtim : 1);
2418
2419 payload_len = framelen - ieee80211_hdrlen(payload->frame_control);
2420 if (payload_len < 0)
2421 payload_len = 0;
2422 else if (payload_len > MWL8K_FJ_BEACON_MAXLEN)
2423 payload_len = MWL8K_FJ_BEACON_MAXLEN;
2424
2425 memcpy(cmd->beacon_data, &payload->u.beacon, payload_len);
2426
2427 rc = mwl8k_post_cmd(hw, &cmd->header);
2428 kfree(cmd);
2429
2430 return rc;
2431 }
2432
2433 /*
2434 * CMD_SET_RTS_THRESHOLD.
2435 */
2436 struct mwl8k_cmd_set_rts_threshold {
2437 struct mwl8k_cmd_pkt header;
2438 __le16 action;
2439 __le16 threshold;
2440 } __attribute__((packed));
2441
2442 static int
2443 mwl8k_cmd_set_rts_threshold(struct ieee80211_hw *hw, int rts_thresh)
2444 {
2445 struct mwl8k_cmd_set_rts_threshold *cmd;
2446 int rc;
2447
2448 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2449 if (cmd == NULL)
2450 return -ENOMEM;
2451
2452 cmd->header.code = cpu_to_le16(MWL8K_CMD_RTS_THRESHOLD);
2453 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2454 cmd->action = cpu_to_le16(MWL8K_CMD_SET);
2455 cmd->threshold = cpu_to_le16(rts_thresh);
2456
2457 rc = mwl8k_post_cmd(hw, &cmd->header);
2458 kfree(cmd);
2459
2460 return rc;
2461 }
2462
2463 /*
2464 * CMD_SET_SLOT.
2465 */
2466 struct mwl8k_cmd_set_slot {
2467 struct mwl8k_cmd_pkt header;
2468 __le16 action;
2469 __u8 short_slot;
2470 } __attribute__((packed));
2471
2472 static int mwl8k_cmd_set_slot(struct ieee80211_hw *hw, bool short_slot_time)
2473 {
2474 struct mwl8k_cmd_set_slot *cmd;
2475 int rc;
2476
2477 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2478 if (cmd == NULL)
2479 return -ENOMEM;
2480
2481 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_SLOT);
2482 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2483 cmd->action = cpu_to_le16(MWL8K_CMD_SET);
2484 cmd->short_slot = short_slot_time;
2485
2486 rc = mwl8k_post_cmd(hw, &cmd->header);
2487 kfree(cmd);
2488
2489 return rc;
2490 }
2491
2492 /*
2493 * CMD_SET_EDCA_PARAMS.
2494 */
2495 struct mwl8k_cmd_set_edca_params {
2496 struct mwl8k_cmd_pkt header;
2497
2498 /* See MWL8K_SET_EDCA_XXX below */
2499 __le16 action;
2500
2501 /* TX opportunity in units of 32 us */
2502 __le16 txop;
2503
2504 union {
2505 struct {
2506 /* Log exponent of max contention period: 0...15 */
2507 __le32 log_cw_max;
2508
2509 /* Log exponent of min contention period: 0...15 */
2510 __le32 log_cw_min;
2511
2512 /* Adaptive interframe spacing in units of 32us */
2513 __u8 aifs;
2514
2515 /* TX queue to configure */
2516 __u8 txq;
2517 } ap;
2518 struct {
2519 /* Log exponent of max contention period: 0...15 */
2520 __u8 log_cw_max;
2521
2522 /* Log exponent of min contention period: 0...15 */
2523 __u8 log_cw_min;
2524
2525 /* Adaptive interframe spacing in units of 32us */
2526 __u8 aifs;
2527
2528 /* TX queue to configure */
2529 __u8 txq;
2530 } sta;
2531 };
2532 } __attribute__((packed));
2533
2534 #define MWL8K_SET_EDCA_CW 0x01
2535 #define MWL8K_SET_EDCA_TXOP 0x02
2536 #define MWL8K_SET_EDCA_AIFS 0x04
2537
2538 #define MWL8K_SET_EDCA_ALL (MWL8K_SET_EDCA_CW | \
2539 MWL8K_SET_EDCA_TXOP | \
2540 MWL8K_SET_EDCA_AIFS)
2541
2542 static int
2543 mwl8k_cmd_set_edca_params(struct ieee80211_hw *hw, __u8 qnum,
2544 __u16 cw_min, __u16 cw_max,
2545 __u8 aifs, __u16 txop)
2546 {
2547 struct mwl8k_priv *priv = hw->priv;
2548 struct mwl8k_cmd_set_edca_params *cmd;
2549 int rc;
2550
2551 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2552 if (cmd == NULL)
2553 return -ENOMEM;
2554
2555 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_EDCA_PARAMS);
2556 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2557 cmd->action = cpu_to_le16(MWL8K_SET_EDCA_ALL);
2558 cmd->txop = cpu_to_le16(txop);
2559 if (priv->ap_fw) {
2560 cmd->ap.log_cw_max = cpu_to_le32(ilog2(cw_max + 1));
2561 cmd->ap.log_cw_min = cpu_to_le32(ilog2(cw_min + 1));
2562 cmd->ap.aifs = aifs;
2563 cmd->ap.txq = qnum;
2564 } else {
2565 cmd->sta.log_cw_max = (u8)ilog2(cw_max + 1);
2566 cmd->sta.log_cw_min = (u8)ilog2(cw_min + 1);
2567 cmd->sta.aifs = aifs;
2568 cmd->sta.txq = qnum;
2569 }
2570
2571 rc = mwl8k_post_cmd(hw, &cmd->header);
2572 kfree(cmd);
2573
2574 return rc;
2575 }
2576
2577 /*
2578 * CMD_SET_WMM_MODE.
2579 */
2580 struct mwl8k_cmd_set_wmm_mode {
2581 struct mwl8k_cmd_pkt header;
2582 __le16 action;
2583 } __attribute__((packed));
2584
2585 static int mwl8k_cmd_set_wmm_mode(struct ieee80211_hw *hw, bool enable)
2586 {
2587 struct mwl8k_priv *priv = hw->priv;
2588 struct mwl8k_cmd_set_wmm_mode *cmd;
2589 int rc;
2590
2591 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2592 if (cmd == NULL)
2593 return -ENOMEM;
2594
2595 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_WMM_MODE);
2596 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2597 cmd->action = cpu_to_le16(!!enable);
2598
2599 rc = mwl8k_post_cmd(hw, &cmd->header);
2600 kfree(cmd);
2601
2602 if (!rc)
2603 priv->wmm_enabled = enable;
2604
2605 return rc;
2606 }
2607
2608 /*
2609 * CMD_MIMO_CONFIG.
2610 */
2611 struct mwl8k_cmd_mimo_config {
2612 struct mwl8k_cmd_pkt header;
2613 __le32 action;
2614 __u8 rx_antenna_map;
2615 __u8 tx_antenna_map;
2616 } __attribute__((packed));
2617
2618 static int mwl8k_cmd_mimo_config(struct ieee80211_hw *hw, __u8 rx, __u8 tx)
2619 {
2620 struct mwl8k_cmd_mimo_config *cmd;
2621 int rc;
2622
2623 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2624 if (cmd == NULL)
2625 return -ENOMEM;
2626
2627 cmd->header.code = cpu_to_le16(MWL8K_CMD_MIMO_CONFIG);
2628 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2629 cmd->action = cpu_to_le32((u32)MWL8K_CMD_SET);
2630 cmd->rx_antenna_map = rx;
2631 cmd->tx_antenna_map = tx;
2632
2633 rc = mwl8k_post_cmd(hw, &cmd->header);
2634 kfree(cmd);
2635
2636 return rc;
2637 }
2638
2639 /*
2640 * CMD_USE_FIXED_RATE (STA version).
2641 */
2642 struct mwl8k_cmd_use_fixed_rate_sta {
2643 struct mwl8k_cmd_pkt header;
2644 __le32 action;
2645 __le32 allow_rate_drop;
2646 __le32 num_rates;
2647 struct {
2648 __le32 is_ht_rate;
2649 __le32 enable_retry;
2650 __le32 rate;
2651 __le32 retry_count;
2652 } rate_entry[8];
2653 __le32 rate_type;
2654 __le32 reserved1;
2655 __le32 reserved2;
2656 } __attribute__((packed));
2657
2658 #define MWL8K_USE_AUTO_RATE 0x0002
2659 #define MWL8K_UCAST_RATE 0
2660
2661 static int mwl8k_cmd_use_fixed_rate_sta(struct ieee80211_hw *hw)
2662 {
2663 struct mwl8k_cmd_use_fixed_rate_sta *cmd;
2664 int rc;
2665
2666 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2667 if (cmd == NULL)
2668 return -ENOMEM;
2669
2670 cmd->header.code = cpu_to_le16(MWL8K_CMD_USE_FIXED_RATE);
2671 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2672 cmd->action = cpu_to_le32(MWL8K_USE_AUTO_RATE);
2673 cmd->rate_type = cpu_to_le32(MWL8K_UCAST_RATE);
2674
2675 rc = mwl8k_post_cmd(hw, &cmd->header);
2676 kfree(cmd);
2677
2678 return rc;
2679 }
2680
2681 /*
2682 * CMD_USE_FIXED_RATE (AP version).
2683 */
2684 struct mwl8k_cmd_use_fixed_rate_ap {
2685 struct mwl8k_cmd_pkt header;
2686 __le32 action;
2687 __le32 allow_rate_drop;
2688 __le32 num_rates;
2689 struct mwl8k_rate_entry_ap {
2690 __le32 is_ht_rate;
2691 __le32 enable_retry;
2692 __le32 rate;
2693 __le32 retry_count;
2694 } rate_entry[4];
2695 u8 multicast_rate;
2696 u8 multicast_rate_type;
2697 u8 management_rate;
2698 } __attribute__((packed));
2699
2700 static int
2701 mwl8k_cmd_use_fixed_rate_ap(struct ieee80211_hw *hw, int mcast, int mgmt)
2702 {
2703 struct mwl8k_cmd_use_fixed_rate_ap *cmd;
2704 int rc;
2705
2706 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2707 if (cmd == NULL)
2708 return -ENOMEM;
2709
2710 cmd->header.code = cpu_to_le16(MWL8K_CMD_USE_FIXED_RATE);
2711 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2712 cmd->action = cpu_to_le32(MWL8K_USE_AUTO_RATE);
2713 cmd->multicast_rate = mcast;
2714 cmd->management_rate = mgmt;
2715
2716 rc = mwl8k_post_cmd(hw, &cmd->header);
2717 kfree(cmd);
2718
2719 return rc;
2720 }
2721
2722 /*
2723 * CMD_ENABLE_SNIFFER.
2724 */
2725 struct mwl8k_cmd_enable_sniffer {
2726 struct mwl8k_cmd_pkt header;
2727 __le32 action;
2728 } __attribute__((packed));
2729
2730 static int mwl8k_cmd_enable_sniffer(struct ieee80211_hw *hw, bool enable)
2731 {
2732 struct mwl8k_cmd_enable_sniffer *cmd;
2733 int rc;
2734
2735 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2736 if (cmd == NULL)
2737 return -ENOMEM;
2738
2739 cmd->header.code = cpu_to_le16(MWL8K_CMD_ENABLE_SNIFFER);
2740 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2741 cmd->action = cpu_to_le32(!!enable);
2742
2743 rc = mwl8k_post_cmd(hw, &cmd->header);
2744 kfree(cmd);
2745
2746 return rc;
2747 }
2748
2749 /*
2750 * CMD_SET_MAC_ADDR.
2751 */
2752 struct mwl8k_cmd_set_mac_addr {
2753 struct mwl8k_cmd_pkt header;
2754 union {
2755 struct {
2756 __le16 mac_type;
2757 __u8 mac_addr[ETH_ALEN];
2758 } mbss;
2759 __u8 mac_addr[ETH_ALEN];
2760 };
2761 } __attribute__((packed));
2762
2763 #define MWL8K_MAC_TYPE_PRIMARY_CLIENT 0
2764 #define MWL8K_MAC_TYPE_SECONDARY_CLIENT 1
2765 #define MWL8K_MAC_TYPE_PRIMARY_AP 2
2766 #define MWL8K_MAC_TYPE_SECONDARY_AP 3
2767
2768 static int mwl8k_cmd_set_mac_addr(struct ieee80211_hw *hw,
2769 struct ieee80211_vif *vif, u8 *mac)
2770 {
2771 struct mwl8k_priv *priv = hw->priv;
2772 struct mwl8k_vif *mwl8k_vif = MWL8K_VIF(vif);
2773 struct mwl8k_cmd_set_mac_addr *cmd;
2774 int mac_type;
2775 int rc;
2776
2777 mac_type = MWL8K_MAC_TYPE_PRIMARY_AP;
2778 if (vif != NULL && vif->type == NL80211_IFTYPE_STATION) {
2779 if (mwl8k_vif->macid + 1 == ffs(priv->sta_macids_supported))
2780 mac_type = MWL8K_MAC_TYPE_PRIMARY_CLIENT;
2781 else
2782 mac_type = MWL8K_MAC_TYPE_SECONDARY_CLIENT;
2783 } else if (vif != NULL && vif->type == NL80211_IFTYPE_AP) {
2784 if (mwl8k_vif->macid + 1 == ffs(priv->ap_macids_supported))
2785 mac_type = MWL8K_MAC_TYPE_PRIMARY_AP;
2786 else
2787 mac_type = MWL8K_MAC_TYPE_SECONDARY_AP;
2788 }
2789
2790 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2791 if (cmd == NULL)
2792 return -ENOMEM;
2793
2794 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_MAC_ADDR);
2795 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2796 if (priv->ap_fw) {
2797 cmd->mbss.mac_type = cpu_to_le16(mac_type);
2798 memcpy(cmd->mbss.mac_addr, mac, ETH_ALEN);
2799 } else {
2800 memcpy(cmd->mac_addr, mac, ETH_ALEN);
2801 }
2802
2803 rc = mwl8k_post_pervif_cmd(hw, vif, &cmd->header);
2804 kfree(cmd);
2805
2806 return rc;
2807 }
2808
2809 /*
2810 * CMD_SET_RATEADAPT_MODE.
2811 */
2812 struct mwl8k_cmd_set_rate_adapt_mode {
2813 struct mwl8k_cmd_pkt header;
2814 __le16 action;
2815 __le16 mode;
2816 } __attribute__((packed));
2817
2818 static int mwl8k_cmd_set_rateadapt_mode(struct ieee80211_hw *hw, __u16 mode)
2819 {
2820 struct mwl8k_cmd_set_rate_adapt_mode *cmd;
2821 int rc;
2822
2823 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2824 if (cmd == NULL)
2825 return -ENOMEM;
2826
2827 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_RATEADAPT_MODE);
2828 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2829 cmd->action = cpu_to_le16(MWL8K_CMD_SET);
2830 cmd->mode = cpu_to_le16(mode);
2831
2832 rc = mwl8k_post_cmd(hw, &cmd->header);
2833 kfree(cmd);
2834
2835 return rc;
2836 }
2837
2838 /*
2839 * CMD_BSS_START.
2840 */
2841 struct mwl8k_cmd_bss_start {
2842 struct mwl8k_cmd_pkt header;
2843 __le32 enable;
2844 } __attribute__((packed));
2845
2846 static int mwl8k_cmd_bss_start(struct ieee80211_hw *hw,
2847 struct ieee80211_vif *vif, int enable)
2848 {
2849 struct mwl8k_cmd_bss_start *cmd;
2850 int rc;
2851
2852 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2853 if (cmd == NULL)
2854 return -ENOMEM;
2855
2856 cmd->header.code = cpu_to_le16(MWL8K_CMD_BSS_START);
2857 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2858 cmd->enable = cpu_to_le32(enable);
2859
2860 rc = mwl8k_post_pervif_cmd(hw, vif, &cmd->header);
2861 kfree(cmd);
2862
2863 return rc;
2864 }
2865
2866 /*
2867 * CMD_SET_NEW_STN.
2868 */
2869 struct mwl8k_cmd_set_new_stn {
2870 struct mwl8k_cmd_pkt header;
2871 __le16 aid;
2872 __u8 mac_addr[6];
2873 __le16 stn_id;
2874 __le16 action;
2875 __le16 rsvd;
2876 __le32 legacy_rates;
2877 __u8 ht_rates[4];
2878 __le16 cap_info;
2879 __le16 ht_capabilities_info;
2880 __u8 mac_ht_param_info;
2881 __u8 rev;
2882 __u8 control_channel;
2883 __u8 add_channel;
2884 __le16 op_mode;
2885 __le16 stbc;
2886 __u8 add_qos_info;
2887 __u8 is_qos_sta;
2888 __le32 fw_sta_ptr;
2889 } __attribute__((packed));
2890
2891 #define MWL8K_STA_ACTION_ADD 0
2892 #define MWL8K_STA_ACTION_REMOVE 2
2893
2894 static int mwl8k_cmd_set_new_stn_add(struct ieee80211_hw *hw,
2895 struct ieee80211_vif *vif,
2896 struct ieee80211_sta *sta)
2897 {
2898 struct mwl8k_cmd_set_new_stn *cmd;
2899 u32 rates;
2900 int rc;
2901
2902 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2903 if (cmd == NULL)
2904 return -ENOMEM;
2905
2906 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_NEW_STN);
2907 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2908 cmd->aid = cpu_to_le16(sta->aid);
2909 memcpy(cmd->mac_addr, sta->addr, ETH_ALEN);
2910 cmd->stn_id = cpu_to_le16(sta->aid);
2911 cmd->action = cpu_to_le16(MWL8K_STA_ACTION_ADD);
2912 if (hw->conf.channel->band == IEEE80211_BAND_2GHZ)
2913 rates = sta->supp_rates[IEEE80211_BAND_2GHZ];
2914 else
2915 rates = sta->supp_rates[IEEE80211_BAND_5GHZ] << 5;
2916 cmd->legacy_rates = cpu_to_le32(rates);
2917 if (sta->ht_cap.ht_supported) {
2918 cmd->ht_rates[0] = sta->ht_cap.mcs.rx_mask[0];
2919 cmd->ht_rates[1] = sta->ht_cap.mcs.rx_mask[1];
2920 cmd->ht_rates[2] = sta->ht_cap.mcs.rx_mask[2];
2921 cmd->ht_rates[3] = sta->ht_cap.mcs.rx_mask[3];
2922 cmd->ht_capabilities_info = cpu_to_le16(sta->ht_cap.cap);
2923 cmd->mac_ht_param_info = (sta->ht_cap.ampdu_factor & 3) |
2924 ((sta->ht_cap.ampdu_density & 7) << 2);
2925 cmd->is_qos_sta = 1;
2926 }
2927
2928 rc = mwl8k_post_pervif_cmd(hw, vif, &cmd->header);
2929 kfree(cmd);
2930
2931 return rc;
2932 }
2933
2934 static int mwl8k_cmd_set_new_stn_add_self(struct ieee80211_hw *hw,
2935 struct ieee80211_vif *vif)
2936 {
2937 struct mwl8k_cmd_set_new_stn *cmd;
2938 int rc;
2939
2940 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2941 if (cmd == NULL)
2942 return -ENOMEM;
2943
2944 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_NEW_STN);
2945 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2946 memcpy(cmd->mac_addr, vif->addr, ETH_ALEN);
2947
2948 rc = mwl8k_post_pervif_cmd(hw, vif, &cmd->header);
2949 kfree(cmd);
2950
2951 return rc;
2952 }
2953
2954 static int mwl8k_cmd_set_new_stn_del(struct ieee80211_hw *hw,
2955 struct ieee80211_vif *vif, u8 *addr)
2956 {
2957 struct mwl8k_cmd_set_new_stn *cmd;
2958 int rc;
2959
2960 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2961 if (cmd == NULL)
2962 return -ENOMEM;
2963
2964 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_NEW_STN);
2965 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2966 memcpy(cmd->mac_addr, addr, ETH_ALEN);
2967 cmd->action = cpu_to_le16(MWL8K_STA_ACTION_REMOVE);
2968
2969 rc = mwl8k_post_pervif_cmd(hw, vif, &cmd->header);
2970 kfree(cmd);
2971
2972 return rc;
2973 }
2974
2975 /*
2976 * CMD_UPDATE_STADB.
2977 */
2978 struct ewc_ht_info {
2979 __le16 control1;
2980 __le16 control2;
2981 __le16 control3;
2982 } __attribute__((packed));
2983
2984 struct peer_capability_info {
2985 /* Peer type - AP vs. STA. */
2986 __u8 peer_type;
2987
2988 /* Basic 802.11 capabilities from assoc resp. */
2989 __le16 basic_caps;
2990
2991 /* Set if peer supports 802.11n high throughput (HT). */
2992 __u8 ht_support;
2993
2994 /* Valid if HT is supported. */
2995 __le16 ht_caps;
2996 __u8 extended_ht_caps;
2997 struct ewc_ht_info ewc_info;
2998
2999 /* Legacy rate table. Intersection of our rates and peer rates. */
3000 __u8 legacy_rates[12];
3001
3002 /* HT rate table. Intersection of our rates and peer rates. */
3003 __u8 ht_rates[16];
3004 __u8 pad[16];
3005
3006 /* If set, interoperability mode, no proprietary extensions. */
3007 __u8 interop;
3008 __u8 pad2;
3009 __u8 station_id;
3010 __le16 amsdu_enabled;
3011 } __attribute__((packed));
3012
3013 struct mwl8k_cmd_update_stadb {
3014 struct mwl8k_cmd_pkt header;
3015
3016 /* See STADB_ACTION_TYPE */
3017 __le32 action;
3018
3019 /* Peer MAC address */
3020 __u8 peer_addr[ETH_ALEN];
3021
3022 __le32 reserved;
3023
3024 /* Peer info - valid during add/update. */
3025 struct peer_capability_info peer_info;
3026 } __attribute__((packed));
3027
3028 #define MWL8K_STA_DB_MODIFY_ENTRY 1
3029 #define MWL8K_STA_DB_DEL_ENTRY 2
3030
3031 /* Peer Entry flags - used to define the type of the peer node */
3032 #define MWL8K_PEER_TYPE_ACCESSPOINT 2
3033
3034 static int mwl8k_cmd_update_stadb_add(struct ieee80211_hw *hw,
3035 struct ieee80211_vif *vif,
3036 struct ieee80211_sta *sta)
3037 {
3038 struct mwl8k_cmd_update_stadb *cmd;
3039 struct peer_capability_info *p;
3040 u32 rates;
3041 int rc;
3042
3043 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
3044 if (cmd == NULL)
3045 return -ENOMEM;
3046
3047 cmd->header.code = cpu_to_le16(MWL8K_CMD_UPDATE_STADB);
3048 cmd->header.length = cpu_to_le16(sizeof(*cmd));
3049 cmd->action = cpu_to_le32(MWL8K_STA_DB_MODIFY_ENTRY);
3050 memcpy(cmd->peer_addr, sta->addr, ETH_ALEN);
3051
3052 p = &cmd->peer_info;
3053 p->peer_type = MWL8K_PEER_TYPE_ACCESSPOINT;
3054 p->basic_caps = cpu_to_le16(vif->bss_conf.assoc_capability);
3055 p->ht_support = sta->ht_cap.ht_supported;
3056 p->ht_caps = sta->ht_cap.cap;
3057 p->extended_ht_caps = (sta->ht_cap.ampdu_factor & 3) |
3058 ((sta->ht_cap.ampdu_density & 7) << 2);
3059 if (hw->conf.channel->band == IEEE80211_BAND_2GHZ)
3060 rates = sta->supp_rates[IEEE80211_BAND_2GHZ];
3061 else
3062 rates = sta->supp_rates[IEEE80211_BAND_5GHZ] << 5;
3063 legacy_rate_mask_to_array(p->legacy_rates, rates);
3064 memcpy(p->ht_rates, sta->ht_cap.mcs.rx_mask, 16);
3065 p->interop = 1;
3066 p->amsdu_enabled = 0;
3067
3068 rc = mwl8k_post_cmd(hw, &cmd->header);
3069 kfree(cmd);
3070
3071 return rc ? rc : p->station_id;
3072 }
3073
3074 static int mwl8k_cmd_update_stadb_del(struct ieee80211_hw *hw,
3075 struct ieee80211_vif *vif, u8 *addr)
3076 {
3077 struct mwl8k_cmd_update_stadb *cmd;
3078 int rc;
3079
3080 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
3081 if (cmd == NULL)
3082 return -ENOMEM;
3083
3084 cmd->header.code = cpu_to_le16(MWL8K_CMD_UPDATE_STADB);
3085 cmd->header.length = cpu_to_le16(sizeof(*cmd));
3086 cmd->action = cpu_to_le32(MWL8K_STA_DB_DEL_ENTRY);
3087 memcpy(cmd->peer_addr, addr, ETH_ALEN);
3088
3089 rc = mwl8k_post_cmd(hw, &cmd->header);
3090 kfree(cmd);
3091
3092 return rc;
3093 }
3094
3095
3096 /*
3097 * Interrupt handling.
3098 */
3099 static irqreturn_t mwl8k_interrupt(int irq, void *dev_id)
3100 {
3101 struct ieee80211_hw *hw = dev_id;
3102 struct mwl8k_priv *priv = hw->priv;
3103 u32 status;
3104
3105 status = ioread32(priv->regs + MWL8K_HIU_A2H_INTERRUPT_STATUS);
3106 if (!status)
3107 return IRQ_NONE;
3108
3109 if (status & MWL8K_A2H_INT_TX_DONE) {
3110 status &= ~MWL8K_A2H_INT_TX_DONE;
3111 tasklet_schedule(&priv->poll_tx_task);
3112 }
3113
3114 if (status & MWL8K_A2H_INT_RX_READY) {
3115 status &= ~MWL8K_A2H_INT_RX_READY;
3116 tasklet_schedule(&priv->poll_rx_task);
3117 }
3118
3119 if (status)
3120 iowrite32(~status, priv->regs + MWL8K_HIU_A2H_INTERRUPT_STATUS);
3121
3122 if (status & MWL8K_A2H_INT_OPC_DONE) {
3123 if (priv->hostcmd_wait != NULL)
3124 complete(priv->hostcmd_wait);
3125 }
3126
3127 if (status & MWL8K_A2H_INT_QUEUE_EMPTY) {
3128 if (!mutex_is_locked(&priv->fw_mutex) &&
3129 priv->radio_on && priv->pending_tx_pkts)
3130 mwl8k_tx_start(priv);
3131 }
3132
3133 return IRQ_HANDLED;
3134 }
3135
3136 static void mwl8k_tx_poll(unsigned long data)
3137 {
3138 struct ieee80211_hw *hw = (struct ieee80211_hw *)data;
3139 struct mwl8k_priv *priv = hw->priv;
3140 int limit;
3141 int i;
3142
3143 limit = 32;
3144
3145 spin_lock_bh(&priv->tx_lock);
3146
3147 for (i = 0; i < MWL8K_TX_QUEUES; i++)
3148 limit -= mwl8k_txq_reclaim(hw, i, limit, 0);
3149
3150 if (!priv->pending_tx_pkts && priv->tx_wait != NULL) {
3151 complete(priv->tx_wait);
3152 priv->tx_wait = NULL;
3153 }
3154
3155 spin_unlock_bh(&priv->tx_lock);
3156
3157 if (limit) {
3158 writel(~MWL8K_A2H_INT_TX_DONE,
3159 priv->regs + MWL8K_HIU_A2H_INTERRUPT_STATUS);
3160 } else {
3161 tasklet_schedule(&priv->poll_tx_task);
3162 }
3163 }
3164
3165 static void mwl8k_rx_poll(unsigned long data)
3166 {
3167 struct ieee80211_hw *hw = (struct ieee80211_hw *)data;
3168 struct mwl8k_priv *priv = hw->priv;
3169 int limit;
3170
3171 limit = 32;
3172 limit -= rxq_process(hw, 0, limit);
3173 limit -= rxq_refill(hw, 0, limit);
3174
3175 if (limit) {
3176 writel(~MWL8K_A2H_INT_RX_READY,
3177 priv->regs + MWL8K_HIU_A2H_INTERRUPT_STATUS);
3178 } else {
3179 tasklet_schedule(&priv->poll_rx_task);
3180 }
3181 }
3182
3183
3184 /*
3185 * Core driver operations.
3186 */
3187 static int mwl8k_tx(struct ieee80211_hw *hw, struct sk_buff *skb)
3188 {
3189 struct mwl8k_priv *priv = hw->priv;
3190 int index = skb_get_queue_mapping(skb);
3191 int rc;
3192
3193 if (!priv->radio_on) {
3194 printk(KERN_DEBUG "%s: dropped TX frame since radio "
3195 "disabled\n", wiphy_name(hw->wiphy));
3196 dev_kfree_skb(skb);
3197 return NETDEV_TX_OK;
3198 }
3199
3200 rc = mwl8k_txq_xmit(hw, index, skb);
3201
3202 return rc;
3203 }
3204
3205 static int mwl8k_start(struct ieee80211_hw *hw)
3206 {
3207 struct mwl8k_priv *priv = hw->priv;
3208 int rc;
3209
3210 rc = request_irq(priv->pdev->irq, mwl8k_interrupt,
3211 IRQF_SHARED, MWL8K_NAME, hw);
3212 if (rc) {
3213 printk(KERN_ERR "%s: failed to register IRQ handler\n",
3214 wiphy_name(hw->wiphy));
3215 return -EIO;
3216 }
3217
3218 /* Enable TX reclaim and RX tasklets. */
3219 tasklet_enable(&priv->poll_tx_task);
3220 tasklet_enable(&priv->poll_rx_task);
3221
3222 /* Enable interrupts */
3223 iowrite32(MWL8K_A2H_EVENTS, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK);
3224
3225 rc = mwl8k_fw_lock(hw);
3226 if (!rc) {
3227 rc = mwl8k_cmd_radio_enable(hw);
3228
3229 if (!priv->ap_fw) {
3230 if (!rc)
3231 rc = mwl8k_cmd_enable_sniffer(hw, 0);
3232
3233 if (!rc)
3234 rc = mwl8k_cmd_set_pre_scan(hw);
3235
3236 if (!rc)
3237 rc = mwl8k_cmd_set_post_scan(hw,
3238 "\x00\x00\x00\x00\x00\x00");
3239 }
3240
3241 if (!rc)
3242 rc = mwl8k_cmd_set_rateadapt_mode(hw, 0);
3243
3244 if (!rc)
3245 rc = mwl8k_cmd_set_wmm_mode(hw, 0);
3246
3247 mwl8k_fw_unlock(hw);
3248 }
3249
3250 if (rc) {
3251 iowrite32(0, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK);
3252 free_irq(priv->pdev->irq, hw);
3253 tasklet_disable(&priv->poll_tx_task);
3254 tasklet_disable(&priv->poll_rx_task);
3255 }
3256
3257 return rc;
3258 }
3259
3260 static void mwl8k_stop(struct ieee80211_hw *hw)
3261 {
3262 struct mwl8k_priv *priv = hw->priv;
3263 int i;
3264
3265 mwl8k_cmd_radio_disable(hw);
3266
3267 ieee80211_stop_queues(hw);
3268
3269 /* Disable interrupts */
3270 iowrite32(0, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK);
3271 free_irq(priv->pdev->irq, hw);
3272
3273 /* Stop finalize join worker */
3274 cancel_work_sync(&priv->finalize_join_worker);
3275 if (priv->beacon_skb != NULL)
3276 dev_kfree_skb(priv->beacon_skb);
3277
3278 /* Stop TX reclaim and RX tasklets. */
3279 tasklet_disable(&priv->poll_tx_task);
3280 tasklet_disable(&priv->poll_rx_task);
3281
3282 /* Return all skbs to mac80211 */
3283 for (i = 0; i < MWL8K_TX_QUEUES; i++)
3284 mwl8k_txq_reclaim(hw, i, INT_MAX, 1);
3285 }
3286
3287 static int mwl8k_add_interface(struct ieee80211_hw *hw,
3288 struct ieee80211_vif *vif)
3289 {
3290 struct mwl8k_priv *priv = hw->priv;
3291 struct mwl8k_vif *mwl8k_vif;
3292 u32 macids_supported;
3293 int macid;
3294
3295 /*
3296 * Reject interface creation if sniffer mode is active, as
3297 * STA operation is mutually exclusive with hardware sniffer
3298 * mode. (Sniffer mode is only used on STA firmware.)
3299 */
3300 if (priv->sniffer_enabled) {
3301 printk(KERN_INFO "%s: unable to create STA "
3302 "interface due to sniffer mode being enabled\n",
3303 wiphy_name(hw->wiphy));
3304 return -EINVAL;
3305 }
3306
3307
3308 switch (vif->type) {
3309 case NL80211_IFTYPE_AP:
3310 macids_supported = priv->ap_macids_supported;
3311 break;
3312 case NL80211_IFTYPE_STATION:
3313 macids_supported = priv->sta_macids_supported;
3314 break;
3315 default:
3316 return -EINVAL;
3317 }
3318
3319 macid = ffs(macids_supported & ~priv->macids_used);
3320 if (!macid--)
3321 return -EBUSY;
3322
3323 /* Setup driver private area. */
3324 mwl8k_vif = MWL8K_VIF(vif);
3325 memset(mwl8k_vif, 0, sizeof(*mwl8k_vif));
3326 mwl8k_vif->vif = vif;
3327 mwl8k_vif->macid = macid;
3328 mwl8k_vif->seqno = 0;
3329
3330 /* Set the mac address. */
3331 mwl8k_cmd_set_mac_addr(hw, vif, vif->addr);
3332
3333 if (priv->ap_fw)
3334 mwl8k_cmd_set_new_stn_add_self(hw, vif);
3335
3336 priv->macids_used |= 1 << mwl8k_vif->macid;
3337 list_add_tail(&mwl8k_vif->list, &priv->vif_list);
3338
3339 return 0;
3340 }
3341
3342 static void mwl8k_remove_interface(struct ieee80211_hw *hw,
3343 struct ieee80211_vif *vif)
3344 {
3345 struct mwl8k_priv *priv = hw->priv;
3346 struct mwl8k_vif *mwl8k_vif = MWL8K_VIF(vif);
3347
3348 if (priv->ap_fw)
3349 mwl8k_cmd_set_new_stn_del(hw, vif, vif->addr);
3350
3351 mwl8k_cmd_set_mac_addr(hw, vif, "\x00\x00\x00\x00\x00\x00");
3352
3353 priv->macids_used &= ~(1 << mwl8k_vif->macid);
3354 list_del(&mwl8k_vif->list);
3355 }
3356
3357 static int mwl8k_config(struct ieee80211_hw *hw, u32 changed)
3358 {
3359 struct ieee80211_conf *conf = &hw->conf;
3360 struct mwl8k_priv *priv = hw->priv;
3361 int rc;
3362
3363 if (conf->flags & IEEE80211_CONF_IDLE) {
3364 mwl8k_cmd_radio_disable(hw);
3365 return 0;
3366 }
3367
3368 rc = mwl8k_fw_lock(hw);
3369 if (rc)
3370 return rc;
3371
3372 rc = mwl8k_cmd_radio_enable(hw);
3373 if (rc)
3374 goto out;
3375
3376 rc = mwl8k_cmd_set_rf_channel(hw, conf);
3377 if (rc)
3378 goto out;
3379
3380 if (conf->power_level > 18)
3381 conf->power_level = 18;
3382 rc = mwl8k_cmd_rf_tx_power(hw, conf->power_level);
3383 if (rc)
3384 goto out;
3385
3386 if (priv->ap_fw) {
3387 rc = mwl8k_cmd_rf_antenna(hw, MWL8K_RF_ANTENNA_RX, 0x7);
3388 if (!rc)
3389 rc = mwl8k_cmd_rf_antenna(hw, MWL8K_RF_ANTENNA_TX, 0x7);
3390 } else {
3391 rc = mwl8k_cmd_mimo_config(hw, 0x7, 0x7);
3392 }
3393
3394 out:
3395 mwl8k_fw_unlock(hw);
3396
3397 return rc;
3398 }
3399
3400 static void
3401 mwl8k_bss_info_changed_sta(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
3402 struct ieee80211_bss_conf *info, u32 changed)
3403 {
3404 struct mwl8k_priv *priv = hw->priv;
3405 u32 ap_legacy_rates;
3406 u8 ap_mcs_rates[16];
3407 int rc;
3408
3409 if (mwl8k_fw_lock(hw))
3410 return;
3411
3412 /*
3413 * No need to capture a beacon if we're no longer associated.
3414 */
3415 if ((changed & BSS_CHANGED_ASSOC) && !vif->bss_conf.assoc)
3416 priv->capture_beacon = false;
3417
3418 /*
3419 * Get the AP's legacy and MCS rates.
3420 */
3421 if (vif->bss_conf.assoc) {
3422 struct ieee80211_sta *ap;
3423
3424 rcu_read_lock();
3425
3426 ap = ieee80211_find_sta(vif, vif->bss_conf.bssid);
3427 if (ap == NULL) {
3428 rcu_read_unlock();
3429 goto out;
3430 }
3431
3432 if (hw->conf.channel->band == IEEE80211_BAND_2GHZ) {
3433 ap_legacy_rates = ap->supp_rates[IEEE80211_BAND_2GHZ];
3434 } else {
3435 ap_legacy_rates =
3436 ap->supp_rates[IEEE80211_BAND_5GHZ] << 5;
3437 }
3438 memcpy(ap_mcs_rates, ap->ht_cap.mcs.rx_mask, 16);
3439
3440 rcu_read_unlock();
3441 }
3442
3443 if ((changed & BSS_CHANGED_ASSOC) && vif->bss_conf.assoc) {
3444 rc = mwl8k_cmd_set_rate(hw, vif, ap_legacy_rates, ap_mcs_rates);
3445 if (rc)
3446 goto out;
3447
3448 rc = mwl8k_cmd_use_fixed_rate_sta(hw);
3449 if (rc)
3450 goto out;
3451 }
3452
3453 if (changed & BSS_CHANGED_ERP_PREAMBLE) {
3454 rc = mwl8k_set_radio_preamble(hw,
3455 vif->bss_conf.use_short_preamble);
3456 if (rc)
3457 goto out;
3458 }
3459
3460 if (changed & BSS_CHANGED_ERP_SLOT) {
3461 rc = mwl8k_cmd_set_slot(hw, vif->bss_conf.use_short_slot);
3462 if (rc)
3463 goto out;
3464 }
3465
3466 if (vif->bss_conf.assoc &&
3467 (changed & (BSS_CHANGED_ASSOC | BSS_CHANGED_ERP_CTS_PROT |
3468 BSS_CHANGED_HT))) {
3469 rc = mwl8k_cmd_set_aid(hw, vif, ap_legacy_rates);
3470 if (rc)
3471 goto out;
3472 }
3473
3474 if (vif->bss_conf.assoc &&
3475 (changed & (BSS_CHANGED_ASSOC | BSS_CHANGED_BEACON_INT))) {
3476 /*
3477 * Finalize the join. Tell rx handler to process
3478 * next beacon from our BSSID.
3479 */
3480 memcpy(priv->capture_bssid, vif->bss_conf.bssid, ETH_ALEN);
3481 priv->capture_beacon = true;
3482 }
3483
3484 out:
3485 mwl8k_fw_unlock(hw);
3486 }
3487
3488 static void
3489 mwl8k_bss_info_changed_ap(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
3490 struct ieee80211_bss_conf *info, u32 changed)
3491 {
3492 int rc;
3493
3494 if (mwl8k_fw_lock(hw))
3495 return;
3496
3497 if (changed & BSS_CHANGED_ERP_PREAMBLE) {
3498 rc = mwl8k_set_radio_preamble(hw,
3499 vif->bss_conf.use_short_preamble);
3500 if (rc)
3501 goto out;
3502 }
3503
3504 if (changed & BSS_CHANGED_BASIC_RATES) {
3505 int idx;
3506 int rate;
3507
3508 /*
3509 * Use lowest supported basic rate for multicasts
3510 * and management frames (such as probe responses --
3511 * beacons will always go out at 1 Mb/s).
3512 */
3513 idx = ffs(vif->bss_conf.basic_rates);
3514 if (idx)
3515 idx--;
3516
3517 if (hw->conf.channel->band == IEEE80211_BAND_2GHZ)
3518 rate = mwl8k_rates_24[idx].hw_value;
3519 else
3520 rate = mwl8k_rates_50[idx].hw_value;
3521
3522 mwl8k_cmd_use_fixed_rate_ap(hw, rate, rate);
3523 }
3524
3525 if (changed & (BSS_CHANGED_BEACON_INT | BSS_CHANGED_BEACON)) {
3526 struct sk_buff *skb;
3527
3528 skb = ieee80211_beacon_get(hw, vif);
3529 if (skb != NULL) {
3530 mwl8k_cmd_set_beacon(hw, vif, skb->data, skb->len);
3531 kfree_skb(skb);
3532 }
3533 }
3534
3535 if (changed & BSS_CHANGED_BEACON_ENABLED)
3536 mwl8k_cmd_bss_start(hw, vif, info->enable_beacon);
3537
3538 out:
3539 mwl8k_fw_unlock(hw);
3540 }
3541
3542 static void
3543 mwl8k_bss_info_changed(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
3544 struct ieee80211_bss_conf *info, u32 changed)
3545 {
3546 struct mwl8k_priv *priv = hw->priv;
3547
3548 if (!priv->ap_fw)
3549 mwl8k_bss_info_changed_sta(hw, vif, info, changed);
3550 else
3551 mwl8k_bss_info_changed_ap(hw, vif, info, changed);
3552 }
3553
3554 static u64 mwl8k_prepare_multicast(struct ieee80211_hw *hw,
3555 int mc_count, struct dev_addr_list *mclist)
3556 {
3557 struct mwl8k_cmd_pkt *cmd;
3558
3559 /*
3560 * Synthesize and return a command packet that programs the
3561 * hardware multicast address filter. At this point we don't
3562 * know whether FIF_ALLMULTI is being requested, but if it is,
3563 * we'll end up throwing this packet away and creating a new
3564 * one in mwl8k_configure_filter().
3565 */
3566 cmd = __mwl8k_cmd_mac_multicast_adr(hw, 0, mc_count, mclist);
3567
3568 return (unsigned long)cmd;
3569 }
3570
3571 static int
3572 mwl8k_configure_filter_sniffer(struct ieee80211_hw *hw,
3573 unsigned int changed_flags,
3574 unsigned int *total_flags)
3575 {
3576 struct mwl8k_priv *priv = hw->priv;
3577
3578 /*
3579 * Hardware sniffer mode is mutually exclusive with STA
3580 * operation, so refuse to enable sniffer mode if a STA
3581 * interface is active.
3582 */
3583 if (!list_empty(&priv->vif_list)) {
3584 if (net_ratelimit())
3585 printk(KERN_INFO "%s: not enabling sniffer "
3586 "mode because STA interface is active\n",
3587 wiphy_name(hw->wiphy));
3588 return 0;
3589 }
3590
3591 if (!priv->sniffer_enabled) {
3592 if (mwl8k_cmd_enable_sniffer(hw, 1))
3593 return 0;
3594 priv->sniffer_enabled = true;
3595 }
3596
3597 *total_flags &= FIF_PROMISC_IN_BSS | FIF_ALLMULTI |
3598 FIF_BCN_PRBRESP_PROMISC | FIF_CONTROL |
3599 FIF_OTHER_BSS;
3600
3601 return 1;
3602 }
3603
3604 static struct mwl8k_vif *mwl8k_first_vif(struct mwl8k_priv *priv)
3605 {
3606 if (!list_empty(&priv->vif_list))
3607 return list_entry(priv->vif_list.next, struct mwl8k_vif, list);
3608
3609 return NULL;
3610 }
3611
3612 static void mwl8k_configure_filter(struct ieee80211_hw *hw,
3613 unsigned int changed_flags,
3614 unsigned int *total_flags,
3615 u64 multicast)
3616 {
3617 struct mwl8k_priv *priv = hw->priv;
3618 struct mwl8k_cmd_pkt *cmd = (void *)(unsigned long)multicast;
3619
3620 /*
3621 * AP firmware doesn't allow fine-grained control over
3622 * the receive filter.
3623 */
3624 if (priv->ap_fw) {
3625 *total_flags &= FIF_ALLMULTI | FIF_BCN_PRBRESP_PROMISC;
3626 kfree(cmd);
3627 return;
3628 }
3629
3630 /*
3631 * Enable hardware sniffer mode if FIF_CONTROL or
3632 * FIF_OTHER_BSS is requested.
3633 */
3634 if (*total_flags & (FIF_CONTROL | FIF_OTHER_BSS) &&
3635 mwl8k_configure_filter_sniffer(hw, changed_flags, total_flags)) {
3636 kfree(cmd);
3637 return;
3638 }
3639
3640 /* Clear unsupported feature flags */
3641 *total_flags &= FIF_ALLMULTI | FIF_BCN_PRBRESP_PROMISC;
3642
3643 if (mwl8k_fw_lock(hw)) {
3644 kfree(cmd);
3645 return;
3646 }
3647
3648 if (priv->sniffer_enabled) {
3649 mwl8k_cmd_enable_sniffer(hw, 0);
3650 priv->sniffer_enabled = false;
3651 }
3652
3653 if (changed_flags & FIF_BCN_PRBRESP_PROMISC) {
3654 if (*total_flags & FIF_BCN_PRBRESP_PROMISC) {
3655 /*
3656 * Disable the BSS filter.
3657 */
3658 mwl8k_cmd_set_pre_scan(hw);
3659 } else {
3660 struct mwl8k_vif *mwl8k_vif;
3661 const u8 *bssid;
3662
3663 /*
3664 * Enable the BSS filter.
3665 *
3666 * If there is an active STA interface, use that
3667 * interface's BSSID, otherwise use a dummy one
3668 * (where the OUI part needs to be nonzero for
3669 * the BSSID to be accepted by POST_SCAN).
3670 */
3671 mwl8k_vif = mwl8k_first_vif(priv);
3672 if (mwl8k_vif != NULL)
3673 bssid = mwl8k_vif->vif->bss_conf.bssid;
3674 else
3675 bssid = "\x01\x00\x00\x00\x00\x00";
3676
3677 mwl8k_cmd_set_post_scan(hw, bssid);
3678 }
3679 }
3680
3681 /*
3682 * If FIF_ALLMULTI is being requested, throw away the command
3683 * packet that ->prepare_multicast() built and replace it with
3684 * a command packet that enables reception of all multicast
3685 * packets.
3686 */
3687 if (*total_flags & FIF_ALLMULTI) {
3688 kfree(cmd);
3689 cmd = __mwl8k_cmd_mac_multicast_adr(hw, 1, 0, NULL);
3690 }
3691
3692 if (cmd != NULL) {
3693 mwl8k_post_cmd(hw, cmd);
3694 kfree(cmd);
3695 }
3696
3697 mwl8k_fw_unlock(hw);
3698 }
3699
3700 static int mwl8k_set_rts_threshold(struct ieee80211_hw *hw, u32 value)
3701 {
3702 return mwl8k_cmd_set_rts_threshold(hw, value);
3703 }
3704
3705 static int mwl8k_sta_remove(struct ieee80211_hw *hw,
3706 struct ieee80211_vif *vif,
3707 struct ieee80211_sta *sta)
3708 {
3709 struct mwl8k_priv *priv = hw->priv;
3710
3711 if (priv->ap_fw)
3712 return mwl8k_cmd_set_new_stn_del(hw, vif, sta->addr);
3713 else
3714 return mwl8k_cmd_update_stadb_del(hw, vif, sta->addr);
3715 }
3716
3717 static int mwl8k_sta_add(struct ieee80211_hw *hw,
3718 struct ieee80211_vif *vif,
3719 struct ieee80211_sta *sta)
3720 {
3721 struct mwl8k_priv *priv = hw->priv;
3722 int ret;
3723
3724 if (!priv->ap_fw) {
3725 ret = mwl8k_cmd_update_stadb_add(hw, vif, sta);
3726 if (ret >= 0) {
3727 MWL8K_STA(sta)->peer_id = ret;
3728 return 0;
3729 }
3730
3731 return ret;
3732 }
3733
3734 return mwl8k_cmd_set_new_stn_add(hw, vif, sta);
3735 }
3736
3737 static int mwl8k_conf_tx(struct ieee80211_hw *hw, u16 queue,
3738 const struct ieee80211_tx_queue_params *params)
3739 {
3740 struct mwl8k_priv *priv = hw->priv;
3741 int rc;
3742
3743 rc = mwl8k_fw_lock(hw);
3744 if (!rc) {
3745 if (!priv->wmm_enabled)
3746 rc = mwl8k_cmd_set_wmm_mode(hw, 1);
3747
3748 if (!rc)
3749 rc = mwl8k_cmd_set_edca_params(hw, queue,
3750 params->cw_min,
3751 params->cw_max,
3752 params->aifs,
3753 params->txop);
3754
3755 mwl8k_fw_unlock(hw);
3756 }
3757
3758 return rc;
3759 }
3760
3761 static int mwl8k_get_stats(struct ieee80211_hw *hw,
3762 struct ieee80211_low_level_stats *stats)
3763 {
3764 return mwl8k_cmd_get_stat(hw, stats);
3765 }
3766
3767 static int
3768 mwl8k_ampdu_action(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
3769 enum ieee80211_ampdu_mlme_action action,
3770 struct ieee80211_sta *sta, u16 tid, u16 *ssn)
3771 {
3772 switch (action) {
3773 case IEEE80211_AMPDU_RX_START:
3774 case IEEE80211_AMPDU_RX_STOP:
3775 if (!(hw->flags & IEEE80211_HW_AMPDU_AGGREGATION))
3776 return -ENOTSUPP;
3777 return 0;
3778 default:
3779 return -ENOTSUPP;
3780 }
3781 }
3782
3783 static const struct ieee80211_ops mwl8k_ops = {
3784 .tx = mwl8k_tx,
3785 .start = mwl8k_start,
3786 .stop = mwl8k_stop,
3787 .add_interface = mwl8k_add_interface,
3788 .remove_interface = mwl8k_remove_interface,
3789 .config = mwl8k_config,
3790 .bss_info_changed = mwl8k_bss_info_changed,
3791 .prepare_multicast = mwl8k_prepare_multicast,
3792 .configure_filter = mwl8k_configure_filter,
3793 .set_rts_threshold = mwl8k_set_rts_threshold,
3794 .sta_add = mwl8k_sta_add,
3795 .sta_remove = mwl8k_sta_remove,
3796 .conf_tx = mwl8k_conf_tx,
3797 .get_stats = mwl8k_get_stats,
3798 .ampdu_action = mwl8k_ampdu_action,
3799 };
3800
3801 static void mwl8k_finalize_join_worker(struct work_struct *work)
3802 {
3803 struct mwl8k_priv *priv =
3804 container_of(work, struct mwl8k_priv, finalize_join_worker);
3805 struct sk_buff *skb = priv->beacon_skb;
3806 struct ieee80211_mgmt *mgmt = (void *)skb->data;
3807 int len = skb->len - offsetof(struct ieee80211_mgmt, u.beacon.variable);
3808 const u8 *tim = cfg80211_find_ie(WLAN_EID_TIM,
3809 mgmt->u.beacon.variable, len);
3810 int dtim_period = 1;
3811
3812 if (tim && tim[1] >= 2)
3813 dtim_period = tim[3];
3814
3815 mwl8k_cmd_finalize_join(priv->hw, skb->data, skb->len, dtim_period);
3816
3817 dev_kfree_skb(skb);
3818 priv->beacon_skb = NULL;
3819 }
3820
3821 enum {
3822 MWL8363 = 0,
3823 MWL8687,
3824 MWL8366,
3825 };
3826
3827 static struct mwl8k_device_info mwl8k_info_tbl[] __devinitdata = {
3828 [MWL8363] = {
3829 .part_name = "88w8363",
3830 .helper_image = "mwl8k/helper_8363.fw",
3831 .fw_image = "mwl8k/fmimage_8363.fw",
3832 },
3833 [MWL8687] = {
3834 .part_name = "88w8687",
3835 .helper_image = "mwl8k/helper_8687.fw",
3836 .fw_image = "mwl8k/fmimage_8687.fw",
3837 },
3838 [MWL8366] = {
3839 .part_name = "88w8366",
3840 .helper_image = "mwl8k/helper_8366.fw",
3841 .fw_image = "mwl8k/fmimage_8366.fw",
3842 .ap_rxd_ops = &rxd_8366_ap_ops,
3843 },
3844 };
3845
3846 MODULE_FIRMWARE("mwl8k/helper_8363.fw");
3847 MODULE_FIRMWARE("mwl8k/fmimage_8363.fw");
3848 MODULE_FIRMWARE("mwl8k/helper_8687.fw");
3849 MODULE_FIRMWARE("mwl8k/fmimage_8687.fw");
3850 MODULE_FIRMWARE("mwl8k/helper_8366.fw");
3851 MODULE_FIRMWARE("mwl8k/fmimage_8366.fw");
3852
3853 static DEFINE_PCI_DEVICE_TABLE(mwl8k_pci_id_table) = {
3854 { PCI_VDEVICE(MARVELL, 0x2a0a), .driver_data = MWL8363, },
3855 { PCI_VDEVICE(MARVELL, 0x2a0c), .driver_data = MWL8363, },
3856 { PCI_VDEVICE(MARVELL, 0x2a24), .driver_data = MWL8363, },
3857 { PCI_VDEVICE(MARVELL, 0x2a2b), .driver_data = MWL8687, },
3858 { PCI_VDEVICE(MARVELL, 0x2a30), .driver_data = MWL8687, },
3859 { PCI_VDEVICE(MARVELL, 0x2a40), .driver_data = MWL8366, },
3860 { PCI_VDEVICE(MARVELL, 0x2a43), .driver_data = MWL8366, },
3861 { },
3862 };
3863 MODULE_DEVICE_TABLE(pci, mwl8k_pci_id_table);
3864
3865 static int __devinit mwl8k_probe(struct pci_dev *pdev,
3866 const struct pci_device_id *id)
3867 {
3868 static int printed_version = 0;
3869 struct ieee80211_hw *hw;
3870 struct mwl8k_priv *priv;
3871 int rc;
3872 int i;
3873
3874 if (!printed_version) {
3875 printk(KERN_INFO "%s version %s\n", MWL8K_DESC, MWL8K_VERSION);
3876 printed_version = 1;
3877 }
3878
3879
3880 rc = pci_enable_device(pdev);
3881 if (rc) {
3882 printk(KERN_ERR "%s: Cannot enable new PCI device\n",
3883 MWL8K_NAME);
3884 return rc;
3885 }
3886
3887 rc = pci_request_regions(pdev, MWL8K_NAME);
3888 if (rc) {
3889 printk(KERN_ERR "%s: Cannot obtain PCI resources\n",
3890 MWL8K_NAME);
3891 goto err_disable_device;
3892 }
3893
3894 pci_set_master(pdev);
3895
3896
3897 hw = ieee80211_alloc_hw(sizeof(*priv), &mwl8k_ops);
3898 if (hw == NULL) {
3899 printk(KERN_ERR "%s: ieee80211 alloc failed\n", MWL8K_NAME);
3900 rc = -ENOMEM;
3901 goto err_free_reg;
3902 }
3903
3904 SET_IEEE80211_DEV(hw, &pdev->dev);
3905 pci_set_drvdata(pdev, hw);
3906
3907 priv = hw->priv;
3908 priv->hw = hw;
3909 priv->pdev = pdev;
3910 priv->device_info = &mwl8k_info_tbl[id->driver_data];
3911
3912
3913 priv->sram = pci_iomap(pdev, 0, 0x10000);
3914 if (priv->sram == NULL) {
3915 printk(KERN_ERR "%s: Cannot map device SRAM\n",
3916 wiphy_name(hw->wiphy));
3917 goto err_iounmap;
3918 }
3919
3920 /*
3921 * If BAR0 is a 32 bit BAR, the register BAR will be BAR1.
3922 * If BAR0 is a 64 bit BAR, the register BAR will be BAR2.
3923 */
3924 priv->regs = pci_iomap(pdev, 1, 0x10000);
3925 if (priv->regs == NULL) {
3926 priv->regs = pci_iomap(pdev, 2, 0x10000);
3927 if (priv->regs == NULL) {
3928 printk(KERN_ERR "%s: Cannot map device registers\n",
3929 wiphy_name(hw->wiphy));
3930 goto err_iounmap;
3931 }
3932 }
3933
3934
3935 /* Reset firmware and hardware */
3936 mwl8k_hw_reset(priv);
3937
3938 /* Ask userland hotplug daemon for the device firmware */
3939 rc = mwl8k_request_firmware(priv);
3940 if (rc) {
3941 printk(KERN_ERR "%s: Firmware files not found\n",
3942 wiphy_name(hw->wiphy));
3943 goto err_stop_firmware;
3944 }
3945
3946 /* Load firmware into hardware */
3947 rc = mwl8k_load_firmware(hw);
3948 if (rc) {
3949 printk(KERN_ERR "%s: Cannot start firmware\n",
3950 wiphy_name(hw->wiphy));
3951 goto err_stop_firmware;
3952 }
3953
3954 /* Reclaim memory once firmware is successfully loaded */
3955 mwl8k_release_firmware(priv);
3956
3957
3958 if (priv->ap_fw) {
3959 priv->rxd_ops = priv->device_info->ap_rxd_ops;
3960 if (priv->rxd_ops == NULL) {
3961 printk(KERN_ERR "%s: Driver does not have AP "
3962 "firmware image support for this hardware\n",
3963 wiphy_name(hw->wiphy));
3964 goto err_stop_firmware;
3965 }
3966 } else {
3967 priv->rxd_ops = &rxd_sta_ops;
3968 }
3969
3970 priv->sniffer_enabled = false;
3971 priv->wmm_enabled = false;
3972 priv->pending_tx_pkts = 0;
3973
3974
3975 /*
3976 * Extra headroom is the size of the required DMA header
3977 * minus the size of the smallest 802.11 frame (CTS frame).
3978 */
3979 hw->extra_tx_headroom =
3980 sizeof(struct mwl8k_dma_data) - sizeof(struct ieee80211_cts);
3981
3982 hw->channel_change_time = 10;
3983
3984 hw->queues = MWL8K_TX_QUEUES;
3985
3986 /* Set rssi and noise values to dBm */
3987 hw->flags |= IEEE80211_HW_SIGNAL_DBM | IEEE80211_HW_NOISE_DBM;
3988 hw->vif_data_size = sizeof(struct mwl8k_vif);
3989 hw->sta_data_size = sizeof(struct mwl8k_sta);
3990
3991 priv->macids_used = 0;
3992 INIT_LIST_HEAD(&priv->vif_list);
3993
3994 /* Set default radio state and preamble */
3995 priv->radio_on = 0;
3996 priv->radio_short_preamble = 0;
3997
3998 /* Finalize join worker */
3999 INIT_WORK(&priv->finalize_join_worker, mwl8k_finalize_join_worker);
4000
4001 /* TX reclaim and RX tasklets. */
4002 tasklet_init(&priv->poll_tx_task, mwl8k_tx_poll, (unsigned long)hw);
4003 tasklet_disable(&priv->poll_tx_task);
4004 tasklet_init(&priv->poll_rx_task, mwl8k_rx_poll, (unsigned long)hw);
4005 tasklet_disable(&priv->poll_rx_task);
4006
4007 /* Power management cookie */
4008 priv->cookie = pci_alloc_consistent(priv->pdev, 4, &priv->cookie_dma);
4009 if (priv->cookie == NULL)
4010 goto err_stop_firmware;
4011
4012 rc = mwl8k_rxq_init(hw, 0);
4013 if (rc)
4014 goto err_free_cookie;
4015 rxq_refill(hw, 0, INT_MAX);
4016
4017 mutex_init(&priv->fw_mutex);
4018 priv->fw_mutex_owner = NULL;
4019 priv->fw_mutex_depth = 0;
4020 priv->hostcmd_wait = NULL;
4021
4022 spin_lock_init(&priv->tx_lock);
4023
4024 priv->tx_wait = NULL;
4025
4026 for (i = 0; i < MWL8K_TX_QUEUES; i++) {
4027 rc = mwl8k_txq_init(hw, i);
4028 if (rc)
4029 goto err_free_queues;
4030 }
4031
4032 iowrite32(0, priv->regs + MWL8K_HIU_A2H_INTERRUPT_STATUS);
4033 iowrite32(0, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK);
4034 iowrite32(MWL8K_A2H_INT_TX_DONE | MWL8K_A2H_INT_RX_READY,
4035 priv->regs + MWL8K_HIU_A2H_INTERRUPT_CLEAR_SEL);
4036 iowrite32(0xffffffff, priv->regs + MWL8K_HIU_A2H_INTERRUPT_STATUS_MASK);
4037
4038 rc = request_irq(priv->pdev->irq, mwl8k_interrupt,
4039 IRQF_SHARED, MWL8K_NAME, hw);
4040 if (rc) {
4041 printk(KERN_ERR "%s: failed to register IRQ handler\n",
4042 wiphy_name(hw->wiphy));
4043 goto err_free_queues;
4044 }
4045
4046 /*
4047 * Temporarily enable interrupts. Initial firmware host
4048 * commands use interrupts and avoid polling. Disable
4049 * interrupts when done.
4050 */
4051 iowrite32(MWL8K_A2H_EVENTS, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK);
4052
4053 /* Get config data, mac addrs etc */
4054 if (priv->ap_fw) {
4055 rc = mwl8k_cmd_get_hw_spec_ap(hw);
4056 if (!rc)
4057 rc = mwl8k_cmd_set_hw_spec(hw);
4058 } else {
4059 rc = mwl8k_cmd_get_hw_spec_sta(hw);
4060 }
4061 if (rc) {
4062 printk(KERN_ERR "%s: Cannot initialise firmware\n",
4063 wiphy_name(hw->wiphy));
4064 goto err_free_irq;
4065 }
4066
4067 hw->wiphy->interface_modes = 0;
4068 if (priv->ap_macids_supported)
4069 hw->wiphy->interface_modes |= BIT(NL80211_IFTYPE_AP);
4070 if (priv->sta_macids_supported)
4071 hw->wiphy->interface_modes |= BIT(NL80211_IFTYPE_STATION);
4072
4073
4074 /* Turn radio off */
4075 rc = mwl8k_cmd_radio_disable(hw);
4076 if (rc) {
4077 printk(KERN_ERR "%s: Cannot disable\n", wiphy_name(hw->wiphy));
4078 goto err_free_irq;
4079 }
4080
4081 /* Clear MAC address */
4082 rc = mwl8k_cmd_set_mac_addr(hw, NULL, "\x00\x00\x00\x00\x00\x00");
4083 if (rc) {
4084 printk(KERN_ERR "%s: Cannot clear MAC address\n",
4085 wiphy_name(hw->wiphy));
4086 goto err_free_irq;
4087 }
4088
4089 /* Disable interrupts */
4090 iowrite32(0, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK);
4091 free_irq(priv->pdev->irq, hw);
4092
4093 rc = ieee80211_register_hw(hw);
4094 if (rc) {
4095 printk(KERN_ERR "%s: Cannot register device\n",
4096 wiphy_name(hw->wiphy));
4097 goto err_free_queues;
4098 }
4099
4100 printk(KERN_INFO "%s: %s v%d, %pM, %s firmware %u.%u.%u.%u\n",
4101 wiphy_name(hw->wiphy), priv->device_info->part_name,
4102 priv->hw_rev, hw->wiphy->perm_addr,
4103 priv->ap_fw ? "AP" : "STA",
4104 (priv->fw_rev >> 24) & 0xff, (priv->fw_rev >> 16) & 0xff,
4105 (priv->fw_rev >> 8) & 0xff, priv->fw_rev & 0xff);
4106
4107 return 0;
4108
4109 err_free_irq:
4110 iowrite32(0, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK);
4111 free_irq(priv->pdev->irq, hw);
4112
4113 err_free_queues:
4114 for (i = 0; i < MWL8K_TX_QUEUES; i++)
4115 mwl8k_txq_deinit(hw, i);
4116 mwl8k_rxq_deinit(hw, 0);
4117
4118 err_free_cookie:
4119 if (priv->cookie != NULL)
4120 pci_free_consistent(priv->pdev, 4,
4121 priv->cookie, priv->cookie_dma);
4122
4123 err_stop_firmware:
4124 mwl8k_hw_reset(priv);
4125 mwl8k_release_firmware(priv);
4126
4127 err_iounmap:
4128 if (priv->regs != NULL)
4129 pci_iounmap(pdev, priv->regs);
4130
4131 if (priv->sram != NULL)
4132 pci_iounmap(pdev, priv->sram);
4133
4134 pci_set_drvdata(pdev, NULL);
4135 ieee80211_free_hw(hw);
4136
4137 err_free_reg:
4138 pci_release_regions(pdev);
4139
4140 err_disable_device:
4141 pci_disable_device(pdev);
4142
4143 return rc;
4144 }
4145
4146 static void __devexit mwl8k_shutdown(struct pci_dev *pdev)
4147 {
4148 printk(KERN_ERR "===>%s(%u)\n", __func__, __LINE__);
4149 }
4150
4151 static void __devexit mwl8k_remove(struct pci_dev *pdev)
4152 {
4153 struct ieee80211_hw *hw = pci_get_drvdata(pdev);
4154 struct mwl8k_priv *priv;
4155 int i;
4156
4157 if (hw == NULL)
4158 return;
4159 priv = hw->priv;
4160
4161 ieee80211_stop_queues(hw);
4162
4163 ieee80211_unregister_hw(hw);
4164
4165 /* Remove TX reclaim and RX tasklets. */
4166 tasklet_kill(&priv->poll_tx_task);
4167 tasklet_kill(&priv->poll_rx_task);
4168
4169 /* Stop hardware */
4170 mwl8k_hw_reset(priv);
4171
4172 /* Return all skbs to mac80211 */
4173 for (i = 0; i < MWL8K_TX_QUEUES; i++)
4174 mwl8k_txq_reclaim(hw, i, INT_MAX, 1);
4175
4176 for (i = 0; i < MWL8K_TX_QUEUES; i++)
4177 mwl8k_txq_deinit(hw, i);
4178
4179 mwl8k_rxq_deinit(hw, 0);
4180
4181 pci_free_consistent(priv->pdev, 4, priv->cookie, priv->cookie_dma);
4182
4183 pci_iounmap(pdev, priv->regs);
4184 pci_iounmap(pdev, priv->sram);
4185 pci_set_drvdata(pdev, NULL);
4186 ieee80211_free_hw(hw);
4187 pci_release_regions(pdev);
4188 pci_disable_device(pdev);
4189 }
4190
4191 static struct pci_driver mwl8k_driver = {
4192 .name = MWL8K_NAME,
4193 .id_table = mwl8k_pci_id_table,
4194 .probe = mwl8k_probe,
4195 .remove = __devexit_p(mwl8k_remove),
4196 .shutdown = __devexit_p(mwl8k_shutdown),
4197 };
4198
4199 static int __init mwl8k_init(void)
4200 {
4201 return pci_register_driver(&mwl8k_driver);
4202 }
4203
4204 static void __exit mwl8k_exit(void)
4205 {
4206 pci_unregister_driver(&mwl8k_driver);
4207 }
4208
4209 module_init(mwl8k_init);
4210 module_exit(mwl8k_exit);
4211
4212 MODULE_DESCRIPTION(MWL8K_DESC);
4213 MODULE_VERSION(MWL8K_VERSION);
4214 MODULE_AUTHOR("Lennert Buytenhek <buytenh@marvell.com>");
4215 MODULE_LICENSE("GPL");
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